kernel/ipq806x: Create kernel files for v6.6 (from v6.1)
[openwrt/openwrt.git] / target / linux / ipq806x / patches-6.6 / 107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch
diff --git a/target/linux/ipq806x/patches-6.6/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch b/target/linux/ipq806x/patches-6.6/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch
new file mode 100644 (file)
index 0000000..16e924b
--- /dev/null
@@ -0,0 +1,268 @@
+From 076ebb6e1799c4c7a1d2e07510d88b9e9b57b551 Mon Sep 17 00:00:00 2001
+From: Ansuel Smith <ansuelsmth@gmail.com>
+Date: Tue, 18 Jan 2022 00:03:47 +0100
+Subject: [PATCH v3 13/18] ARM: dts: qcom: add opp table for cpu and l2 for
+ ipq8064
+
+Add opp table for cpu and l2 cache. While the current cpufreq is
+the generic one that doesn't scale the L2 cache, we add the l2
+cache opp anyway for the sake of completeness. This will be handy in the
+future when a dedicated cpufreq driver is introduced for krait cores
+that will correctly scale l2 cache with the core freq.
+
+Opp-level is set based on the logic of
+0: idle level
+1: normal level
+2: turbo level
+
+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
+Tested-by: Jonathan McDowell <noodles@earth.li>
+---
+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 99 +++++++++++++++++++++++++++++
+ 1 file changed, 99 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -48,6 +48,105 @@
+               };
+       };
++      opp_table_l2: opp_table_l2 {
++              compatible = "operating-points-v2";
++
++              opp-384000000 {
++                      opp-hz = /bits/ 64 <384000000>;
++                      opp-microvolt = <1100000>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <0>;
++              };
++
++              opp-1000000000 {
++                      opp-hz = /bits/ 64 <1000000000>;
++                      opp-microvolt = <1100000>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <1>;
++              };
++
++              opp-1200000000 {
++                      opp-hz = /bits/ 64 <1200000000>;
++                      opp-microvolt = <1150000>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <2>;
++              };
++      };
++
++      opp_table0: opp_table0 {
++              compatible = "operating-points-v2-kryo-cpu";
++              nvmem-cells = <&speedbin_efuse>;
++
++              /*
++               * Voltage thresholds are <target min max>
++               */
++              opp-384000000 {
++                      opp-hz = /bits/ 64 <384000000>;
++                      opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
++                      opp-microvolt-speed0-pvs1-v0 = <925000 878750 971250>;
++                      opp-microvolt-speed0-pvs2-v0 = <875000 831250 918750>;
++                      opp-microvolt-speed0-pvs3-v0 = <800000 760000 840000>;
++                      opp-supported-hw = <0x1>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <0>;
++              };
++
++              opp-600000000 {
++                      opp-hz = /bits/ 64 <600000000>;
++                      opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
++                      opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>;
++                      opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>;
++                      opp-microvolt-speed0-pvs3-v0 = <850000 807500 892500>;
++                      opp-supported-hw = <0x1>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <1>;
++              };
++
++              opp-800000000 {
++                      opp-hz = /bits/ 64 <800000000>;
++                      opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
++                      opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>;
++                      opp-microvolt-speed0-pvs2-v0 = <995000 945250 1044750>;
++                      opp-microvolt-speed0-pvs3-v0 = <900000 855000 945000>;
++                      opp-supported-hw = <0x1>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <1>;
++              };
++
++              opp-1000000000 {
++                      opp-hz = /bits/ 64 <1000000000>;
++                      opp-microvolt-speed0-pvs0-v0 = <1150000 1092500 1207500>;
++                      opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
++                      opp-microvolt-speed0-pvs2-v0 = <1025000 973750 1076250>;
++                      opp-microvolt-speed0-pvs3-v0 = <950000 902500 997500>;
++                      opp-supported-hw = <0x1>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <1>;
++              };
++
++              opp-1200000000 {
++                      opp-hz = /bits/ 64 <1200000000>;
++                      opp-microvolt-speed0-pvs0-v0 = <1200000 1140000 1260000>;
++                      opp-microvolt-speed0-pvs1-v0 = <1125000 1068750 1181250>;
++                      opp-microvolt-speed0-pvs2-v0 = <1075000 1021250 1128750>;
++                      opp-microvolt-speed0-pvs3-v0 = <1000000 950000 1050000>;
++                      opp-supported-hw = <0x1>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <2>;
++              };
++
++              opp-1400000000 {
++                      opp-hz = /bits/ 64 <1400000000>;
++                      opp-microvolt-speed0-pvs0-v0 = <1250000 1187500 1312500>;
++                      opp-microvolt-speed0-pvs1-v0 = <1175000 1116250 1233750>;
++                      opp-microvolt-speed0-pvs2-v0 = <1125000 1068750 1181250>;
++                      opp-microvolt-speed0-pvs3-v0 = <1050000 997500 1102500>;
++                      opp-supported-hw = <0x1>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <2>;
++              };
++      };
++
+       thermal-zones {
+               sensor0-thermal {
+                       polling-delay-passive = <0>;
+--- a/arch/arm/boot/dts/qcom-ipq8065.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8065.dtsi
+@@ -6,3 +6,92 @@
+       model = "Qualcomm Technologies, Inc. IPQ8065";
+       compatible = "qcom,ipq8065", "qcom,ipq8064";
+ };
++
++&opp_table_l2 {
++      /delete-node/opp-1200000000;
++
++      opp-1400000000 {
++              opp-hz = /bits/ 64 <1400000000>;
++              opp-microvolt = <1150000>;
++              clock-latency-ns = <100000>;
++              opp-level = <2>;
++      };
++};
++
++&opp_table0 {
++      /*
++       * On ipq8065 1.2 ghz freq is not present
++       * Remove it to make cpufreq work and not
++       * complain for missing definition
++       */
++
++      /delete-node/opp-1200000000;
++
++      /*
++       * Voltage thresholds are <target min max>
++       */
++      opp-384000000 {
++              opp-microvolt-speed0-pvs0-v0 = <975000 926250 1023750>;
++              opp-microvolt-speed0-pvs1-v0 = <950000 902500 997500>;
++              opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>;
++              opp-microvolt-speed0-pvs3-v0 = <900000 855000 945000>;
++              opp-microvolt-speed0-pvs4-v0 = <875000 831250 918750>;
++              opp-microvolt-speed0-pvs5-v0 = <825000 783750 866250>;
++              opp-microvolt-speed0-pvs6-v0 = <775000 736250 813750>;
++      };
++
++      opp-600000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
++              opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>;
++              opp-microvolt-speed0-pvs2-v0 = <950000 902500 997500>;
++              opp-microvolt-speed0-pvs3-v0 = <925000 878750 971250>;
++              opp-microvolt-speed0-pvs4-v0 = <900000 855000 945000>;
++              opp-microvolt-speed0-pvs5-v0 = <850000 807500 892500>;
++              opp-microvolt-speed0-pvs6-v0 = <800000 760000 840000>;
++      };
++
++      opp-800000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
++              opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>;
++              opp-microvolt-speed0-pvs2-v0 = <1000000 950000 1050000>;
++              opp-microvolt-speed0-pvs3-v0 = <975000 926250 1023750>;
++              opp-microvolt-speed0-pvs4-v0 = <950000 902500 997500>;
++              opp-microvolt-speed0-pvs5-v0 = <900000 855000 945000>;
++              opp-microvolt-speed0-pvs6-v0 = <850000 807500 892500>;
++      };
++
++      opp-1000000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
++              opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
++              opp-microvolt-speed0-pvs2-v0 = <1050000 997500 1102500>;
++              opp-microvolt-speed0-pvs3-v0 = <1025000 973750 1076250>;
++              opp-microvolt-speed0-pvs4-v0 = <1000000 950000 1050000>;
++              opp-microvolt-speed0-pvs5-v0 = <950000 902500 997500>;
++              opp-microvolt-speed0-pvs6-v0 = <900000 855000 945000>;
++      };
++
++      opp-1400000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1175000 1116250 1233750>;
++              opp-microvolt-speed0-pvs1-v0 = <1150000 1092500 1207500>;
++              opp-microvolt-speed0-pvs2-v0 = <1125000 1068750 1181250>;
++              opp-microvolt-speed0-pvs3-v0 = <1100000 1045000 1155000>;
++              opp-microvolt-speed0-pvs4-v0 = <1075000 1021250 1128750>;
++              opp-microvolt-speed0-pvs5-v0 = <1025000 973750 1076250>;
++              opp-microvolt-speed0-pvs6-v0 = <975000 926250 1023750>;
++              opp-level = <1>;
++      };
++
++      opp-1725000000 {
++              opp-hz = /bits/ 64 <1725000000>;
++              opp-microvolt-speed0-pvs0-v0 = <1262500 1199375 1325625>;
++              opp-microvolt-speed0-pvs1-v0 = <1225000 1163750 1286250>;
++              opp-microvolt-speed0-pvs2-v0 = <1200000 1140000 1260000>;
++              opp-microvolt-speed0-pvs3-v0 = <1175000 1116250 1233750>;
++              opp-microvolt-speed0-pvs4-v0 = <1150000 1092500 1207500>;
++              opp-microvolt-speed0-pvs5-v0 = <1100000 1045000 1155000>;
++              opp-microvolt-speed0-pvs6-v0 = <1050000 997500 1102500>;
++              opp-supported-hw = <0x1>;
++              clock-latency-ns = <100000>;
++              opp-level = <2>;
++      };
++};
+--- a/arch/arm/boot/dts/qcom-ipq8062.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8062.dtsi
+@@ -6,3 +6,39 @@
+       model = "Qualcomm Technologies, Inc. IPQ8062";
+       compatible = "qcom,ipq8062", "qcom,ipq8064";
+ };
++
++&opp_table0 {
++      /delete-node/opp-1200000000;
++      /delete-node/opp-1400000000;
++
++      /*
++       * Voltage thresholds are <target min max>
++       */
++      opp-384000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
++              opp-microvolt-speed0-pvs1-v0 = < 925000 878750  971250>;
++              opp-microvolt-speed0-pvs2-v0 = < 875000 831250  918750>;
++              opp-microvolt-speed0-pvs3-v0 = < 800000 760000  840000>;
++      };
++
++      opp-600000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
++              opp-microvolt-speed0-pvs1-v0 = < 975000 926250 1023750>;
++              opp-microvolt-speed0-pvs2-v0 = < 925000 878750  971250>;
++              opp-microvolt-speed0-pvs3-v0 = < 850000 807500  892500>;
++      };
++
++      opp-800000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
++              opp-microvolt-speed0-pvs1-v0 = <1025000  973750 1076250>;
++              opp-microvolt-speed0-pvs2-v0 = < 995000  945250 1044750>;
++              opp-microvolt-speed0-pvs3-v0 = < 900000  855000  945000>;
++      };
++
++      opp-1000000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1150000 1092500 1207500>;
++              opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
++              opp-microvolt-speed0-pvs2-v0 = <1025000  973750 1076250>;
++              opp-microvolt-speed0-pvs3-v0 = < 950000  902500  997500>;
++      };
++};