#include "reset.h"
enum {
-@@ -4402,6 +4403,22 @@ static struct clk_branch gcc_pcie0_axi_s
+@@ -4404,6 +4405,22 @@ static struct clk_branch gcc_pcie0_axi_s
},
};
static const struct alpha_pll_config ubi32_pll_config = {
.l = 0x4e,
.config_ctl_val = 0x200d4aa8,
-@@ -4805,6 +4822,11 @@ static const struct qcom_reset_map gcc_i
+@@ -4807,6 +4824,11 @@ static const struct qcom_reset_map gcc_i
[GCC_PCIE1_AXI_MASTER_STICKY_ARES] = { 0x76040, 6 },
};
static const struct of_device_id gcc_ipq8074_match_table[] = {
{ .compatible = "qcom,gcc-ipq8074" },
{ }
-@@ -4827,6 +4849,8 @@ static const struct qcom_cc_desc gcc_ipq
+@@ -4829,6 +4851,8 @@ static const struct qcom_cc_desc gcc_ipq
.num_resets = ARRAY_SIZE(gcc_ipq8074_resets),
.clk_hws = gcc_ipq8074_hws,
.num_clk_hws = ARRAY_SIZE(gcc_ipq8074_hws),