--- /dev/null
+From 95dac4a842a3c66f69f949b48f9075e16275f77b Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Jun 2013 15:48:47 +0200
+Subject: [PATCH 07/36] 115-sidewinder_support.patch
+
+---
+ arch/arm/mach-ixp4xx/Kconfig | 10 +-
+ arch/arm/mach-ixp4xx/Makefile | 2 +
+ arch/arm/mach-ixp4xx/sidewinder-pci.c | 68 ++++++++++++++
+ arch/arm/mach-ixp4xx/sidewinder-setup.c | 151 +++++++++++++++++++++++++++++++
+ 4 files changed, 230 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/mach-ixp4xx/sidewinder-pci.c
+ create mode 100644 arch/arm/mach-ixp4xx/sidewinder-setup.c
+
+--- a/arch/arm/mach-ixp4xx/Kconfig
++++ b/arch/arm/mach-ixp4xx/Kconfig
+@@ -77,6 +77,14 @@ config MACH_PRONGHORN
+ config MACH_PRONGHORNMETRO
+ def_bool MACH_PRONGHORN
+
++config MACH_SIDEWINDER
++ bool "ADI Sidewinder"
++ select PCI
++ help
++ Say 'Y' here if you want your kernel to support the ADI
++ Engineering Sidewinder board. For more information on this
++ platform, see http://www.adiengineering.com
++
+ config ARCH_IXDP425
+ bool "IXDP425"
+ help
+@@ -173,7 +181,7 @@ config MACH_ARCOM_VULCAN
+ #
+ config CPU_IXP46X
+ bool
+- depends on MACH_IXDP465
++ depends on MACH_IXDP465 || MACH_SIDEWINDER
+ default y
+
+ config CPU_IXP43X
+--- a/arch/arm/mach-ixp4xx/Makefile
++++ b/arch/arm/mach-ixp4xx/Makefile
+@@ -20,6 +20,7 @@ obj-pci-$(CONFIG_MACH_WG302V2) += wg302
+ obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
+ obj-pci-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-pci.o
+ obj-pci-$(CONFIG_MACH_PRONGHORN) += pronghorn-pci.o
++obj-pci-$(CONFIG_MACH_SIDEWINDER) += sidewinder-pci.o
+
+ obj-y += common.o
+
+@@ -41,6 +42,7 @@ obj-$(CONFIG_MACH_FSG) += fsg-setup.o
+ obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o
+ obj-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-setup.o
+ obj-$(CONFIG_MACH_PRONGHORN) += pronghorn-setup.o
++obj-$(CONFIG_MACH_SIDEWINDER) += sidewinder-setup.o
+
+ obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
+ obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
+--- /dev/null
++++ b/arch/arm/mach-ixp4xx/sidewinder-pci.c
+@@ -0,0 +1,67 @@
++/*
++ * arch/arch/mach-ixp4xx/pronghornmetro-pci.c
++ *
++ * PCI setup routines for ADI Engineering Sidewinder
++ *
++ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ * based on coyote-pci.c:
++ * Copyright (C) 2002 Jungo Software Technologies.
++ * Copyright (C) 2003 MontaVista Softwrae, Inc.
++ *
++ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <linux/kernel.h>
++#include <linux/pci.h>
++#include <linux/init.h>
++#include <linux/irq.h>
++
++#include <asm/mach-types.h>
++#include <mach/hardware.h>
++#include <asm/irq.h>
++
++#include <asm/mach/pci.h>
++
++void __init sidewinder_pci_preinit(void)
++{
++ irq_set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
++ irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
++ irq_set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW);
++
++ ixp4xx_pci_preinit();
++}
++
++static int __init sidewinder_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
++{
++ if (slot == 1)
++ return IRQ_IXP4XX_GPIO11;
++ else if (slot == 2)
++ return IRQ_IXP4XX_GPIO10;
++ else if (slot == 3)
++ return IRQ_IXP4XX_GPIO9;
++ else
++ return -1;
++}
++
++struct hw_pci sidewinder_pci __initdata = {
++ .nr_controllers = 1,
++ .preinit = sidewinder_pci_preinit,
++ .ops = &ixp4xx_ops,
++ .setup = ixp4xx_setup,
++ .map_irq = sidewinder_map_irq,
++};
++
++int __init sidewinder_pci_init(void)
++{
++ if (machine_is_sidewinder())
++ pci_common_init(&sidewinder_pci);
++ return 0;
++}
++
++subsys_initcall(sidewinder_pci_init);
+--- /dev/null
++++ b/arch/arm/mach-ixp4xx/sidewinder-setup.c
+@@ -0,0 +1,155 @@
++/*
++ * arch/arm/mach-ixp4xx/sidewinder-setup.c
++ *
++ * Board setup for the ADI Engineering Sidewinder
++ *
++ * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org>
++ *
++ * based on coyote-setup.c:
++ * Copyright (C) 2003-2005 MontaVista Software, Inc.
++ *
++ * Author: Imre Kaloz <Kaloz@openwrt.org>
++ */
++
++#include <linux/kernel.h>
++#include <linux/serial.h>
++#include <linux/serial_8250.h>
++#include <linux/dma-mapping.h>
++
++#include <asm/mach-types.h>
++#include <asm/mach/arch.h>
++#include <asm/mach/flash.h>
++
++static struct flash_platform_data sidewinder_flash_data = {
++ .map_name = "cfi_probe",
++ .width = 2,
++};
++
++static struct resource sidewinder_flash_resource = {
++ .flags = IORESOURCE_MEM,
++};
++
++static struct platform_device sidewinder_flash = {
++ .name = "IXP4XX-Flash",
++ .id = 0,
++ .dev = {
++ .platform_data = &sidewinder_flash_data,
++ },
++ .num_resources = 1,
++ .resource = &sidewinder_flash_resource,
++};
++
++static struct resource sidewinder_uart_resources[] = {
++ {
++ .start = IXP4XX_UART1_BASE_PHYS,
++ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
++ .flags = IORESOURCE_MEM,
++ },
++ {
++ .start = IXP4XX_UART2_BASE_PHYS,
++ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
++ .flags = IORESOURCE_MEM,
++ }
++};
++
++static struct plat_serial8250_port sidewinder_uart_data[] = {
++ {
++ .mapbase = IXP4XX_UART1_BASE_PHYS,
++ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
++ .irq = IRQ_IXP4XX_UART1,
++ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
++ .iotype = UPIO_MEM,
++ .regshift = 2,
++ .uartclk = IXP4XX_UART_XTAL,
++ },
++ {
++ .mapbase = IXP4XX_UART2_BASE_PHYS,
++ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
++ .irq = IRQ_IXP4XX_UART2,
++ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
++ .iotype = UPIO_MEM,
++ .regshift = 2,
++ .uartclk = IXP4XX_UART_XTAL,
++ },
++ { },
++};
++
++static struct platform_device sidewinder_uart = {
++ .name = "serial8250",
++ .id = PLAT8250_DEV_PLATFORM,
++ .dev = {
++ .platform_data = sidewinder_uart_data,
++ },
++ .num_resources = ARRAY_SIZE(sidewinder_uart_resources),
++ .resource = sidewinder_uart_resources,
++};
++
++static struct eth_plat_info sidewinder_plat_eth[] = {
++ {
++ .phy = 5,
++ .rxq = 3,
++ .txreadyq = 20,
++ }, {
++ .phy = IXP4XX_ETH_PHY_MAX_ADDR,
++ .phy_mask = 0x1e,
++ .rxq = 4,
++ .txreadyq = 21,
++ }, {
++ .phy = 31,
++ .rxq = 2,
++ .txreadyq = 19,
++ }
++};
++
++static struct platform_device sidewinder_eth[] = {
++ {
++ .name = "ixp4xx_eth",
++ .id = IXP4XX_ETH_NPEB,
++ .dev.platform_data = sidewinder_plat_eth,
++ .dev.coherent_dma_mask = DMA_BIT_MASK(32),
++ }, {
++ .name = "ixp4xx_eth",
++ .id = IXP4XX_ETH_NPEC,
++ .dev.platform_data = sidewinder_plat_eth + 1,
++ .dev.coherent_dma_mask = DMA_BIT_MASK(32),
++ }, {
++ .name = "ixp4xx_eth",
++ .id = IXP4XX_ETH_NPEA,
++ .dev.platform_data = sidewinder_plat_eth + 2,
++ .dev.coherent_dma_mask = DMA_BIT_MASK(32),
++ }
++};
++
++static struct platform_device *sidewinder_devices[] __initdata = {
++ &sidewinder_flash,
++ &sidewinder_uart,
++ &sidewinder_eth[0],
++ &sidewinder_eth[1],
++ &sidewinder_eth[2],
++};
++
++static void __init sidewinder_init(void)
++{
++ ixp4xx_sys_init();
++
++ sidewinder_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
++ sidewinder_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_64M - 1;
++
++ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
++ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
++
++ platform_add_devices(sidewinder_devices, ARRAY_SIZE(sidewinder_devices));
++}
++
++MACHINE_START(SIDEWINDER, "ADI Engineering Sidewinder")
++ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
++ .map_io = ixp4xx_map_io,
++ .init_irq = ixp4xx_init_irq,
++ .init_time = ixp4xx_timer_init,
++ .atag_offset = 0x0100,
++ .init_machine = sidewinder_init,
++#if defined(CONFIG_PCI)
++ .dma_zone_size = SZ_64M,
++#endif
++ .restart = ixp4xx_restart,
++MACHINE_END
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