+++ /dev/null
-From 25a44e2d71af99e9f6f243aeea0e36bb4b7766a1 Mon Sep 17 00:00:00 2001
-From: Emil Renner Berthing <kernel@esmil.dk>
-Date: Sat, 1 Apr 2023 19:19:20 +0800
-Subject: [PATCH 12/95] reset: Create subdirectory for StarFive drivers
-
-This moves the StarFive JH7100 reset driver to a new subdirectory in
-preparation for adding more StarFive reset drivers.
-
-Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
-Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
-Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
-Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
-Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
----
- drivers/reset/Kconfig | 8 +-------
- drivers/reset/Makefile | 2 +-
- drivers/reset/starfive/Kconfig | 8 ++++++++
- drivers/reset/starfive/Makefile | 2 ++
- drivers/reset/{ => starfive}/reset-starfive-jh7100.c | 0
- 5 files changed, 12 insertions(+), 8 deletions(-)
- create mode 100644 drivers/reset/starfive/Kconfig
- create mode 100644 drivers/reset/starfive/Makefile
- rename drivers/reset/{ => starfive}/reset-starfive-jh7100.c (100%)
-
-diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
-index 6ae5aa46a6b2..6aa8f243b30c 100644
---- a/drivers/reset/Kconfig
-+++ b/drivers/reset/Kconfig
-@@ -232,13 +232,6 @@ config RESET_SOCFPGA
- This enables the reset driver for the SoCFPGA ARMv7 platforms. This
- driver gets initialized early during platform init calls.
-
--config RESET_STARFIVE_JH7100
-- bool "StarFive JH7100 Reset Driver"
-- depends on ARCH_STARFIVE || COMPILE_TEST
-- default ARCH_STARFIVE
-- help
-- This enables the reset controller driver for the StarFive JH7100 SoC.
--
- config RESET_SUNPLUS
- bool "Sunplus SoCs Reset Driver" if COMPILE_TEST
- default ARCH_SUNPLUS
-@@ -320,6 +313,7 @@ config RESET_ZYNQ
- help
- This enables the reset controller driver for Xilinx Zynq SoCs.
-
-+source "drivers/reset/starfive/Kconfig"
- source "drivers/reset/sti/Kconfig"
- source "drivers/reset/hisilicon/Kconfig"
- source "drivers/reset/tegra/Kconfig"
-diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
-index 3e7e5fd633a8..7fec5af6c964 100644
---- a/drivers/reset/Makefile
-+++ b/drivers/reset/Makefile
-@@ -1,6 +1,7 @@
- # SPDX-License-Identifier: GPL-2.0
- obj-y += core.o
- obj-y += hisilicon/
-+obj-y += starfive/
- obj-$(CONFIG_ARCH_STI) += sti/
- obj-$(CONFIG_ARCH_TEGRA) += tegra/
- obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
-@@ -30,7 +31,6 @@ obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o
- obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
- obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
- obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
--obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o
- obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o
- obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
- obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
-diff --git a/drivers/reset/starfive/Kconfig b/drivers/reset/starfive/Kconfig
-new file mode 100644
-index 000000000000..abbf0c52d03e
---- /dev/null
-+++ b/drivers/reset/starfive/Kconfig
-@@ -0,0 +1,8 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+
-+config RESET_STARFIVE_JH7100
-+ bool "StarFive JH7100 Reset Driver"
-+ depends on ARCH_STARFIVE || COMPILE_TEST
-+ default ARCH_STARFIVE
-+ help
-+ This enables the reset controller driver for the StarFive JH7100 SoC.
-diff --git a/drivers/reset/starfive/Makefile b/drivers/reset/starfive/Makefile
-new file mode 100644
-index 000000000000..670d049423f5
---- /dev/null
-+++ b/drivers/reset/starfive/Makefile
-@@ -0,0 +1,2 @@
-+# SPDX-License-Identifier: GPL-2.0
-+obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o
-diff --git a/drivers/reset/reset-starfive-jh7100.c b/drivers/reset/starfive/reset-starfive-jh7100.c
-similarity index 100%
-rename from drivers/reset/reset-starfive-jh7100.c
-rename to drivers/reset/starfive/reset-starfive-jh7100.c
---
-2.20.1
-