jh71x0: refresh patches and configs once again

[openwrt/staging/wigyori.git] / target / linux / jh71x0 / patches-6.1 / 0021-riscv-dts-starfive-Add-initial-StarFive-JH7110-devic.patch

diff --git a/target/linux/jh71x0/patches-6.1/0021-riscv-dts-starfive-Add-initial-StarFive-JH7110-devic.patch b/target/linux/jh71x0/patches-6.1/0021-riscv-dts-starfive-Add-initial-StarFive-JH7110-devic.patch
index 663b80731f62ab6091e65267b885ff0198afe422..17364be9af44a600328d29f0a70660641e0753ee 100644 (file)
--- a/target/linux/jh71x0/patches-6.1/0021-riscv-dts-starfive-Add-initial-StarFive-JH7110-devic.patch
+++ b/target/linux/jh71x0/patches-6.1/0021-riscv-dts-starfive-Add-initial-StarFive-JH7110-devic.patch
@@ -1,7 +1,7 @@
-From 8df7be8965ada807883af081f5f55c1fb5a87e89 Mon Sep 17 00:00:00 2001
+From ca57ce82224c21f93ad43754474fb8de1baf5caa Mon Sep 17 00:00:00 2001
 From: Emil Renner Berthing <kernel@esmil.dk>
 Date: Sat, 1 Apr 2023 19:19:31 +0800
-Subject: [PATCH 021/129] riscv: dts: starfive: Add initial StarFive JH7110
+Subject: [PATCH 021/122] riscv: dts: starfive: Add initial StarFive JH7110
  device tree
 
 Add initial device tree for the JH7110 RISC-V SoC by StarFive
@@ -24,7 +24,7 @@ Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
  create mode 100644 arch/riscv/boot/dts/starfive/jh7110.dtsi
 
 diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
-index 69774bb36..4a0a341ad 100644
+index 69774bb362d6..4a0a341ad363 100644
 --- a/arch/riscv/Kconfig.socs
 +++ b/arch/riscv/Kconfig.socs
 @@ -7,6 +7,8 @@ config SOC_MICROCHIP_POLARFIRE
@@ -48,7 +48,7 @@ index 69774bb36..4a0a341ad 100644
        select PINCTRL
 diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
 new file mode 100644
-index 000000000..4c5fdb905
+index 000000000000..4c5fdb905da8
 --- /dev/null
 +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
 @@ -0,0 +1,500 @@
@@ -553,5 +553,5 @@ index 000000000..4c5fdb905
 +      };
 +};
 -- 
-2.25.1
+2.20.1