jh71x0: update patches and config

[openwrt/staging/wigyori.git] / target / linux / jh71x0 / patches-6.1 / 0038-riscv-dts-starfive-jh7110-Add-syscon-nodes.patch

diff --git a/target/linux/jh71x0/patches-6.1/0038-riscv-dts-starfive-jh7110-Add-syscon-nodes.patch b/target/linux/jh71x0/patches-6.1/0038-riscv-dts-starfive-jh7110-Add-syscon-nodes.patch
new file mode 100644 (file)
index 0000000..432e8ac
--- /dev/null
+++ b/target/linux/jh71x0/patches-6.1/0038-riscv-dts-starfive-jh7110-Add-syscon-nodes.patch
@@ -0,0 +1,57 @@
+From 1e2033fec038af252b27470854e315dcbb57abb5 Mon Sep 17 00:00:00 2001
+From: William Qiu <william.qiu@starfivetech.com>
+Date: Thu, 6 Apr 2023 15:46:34 +0800
+Subject: [PATCH 038/129] riscv: dts: starfive: jh7110: Add syscon nodes
+
+Add stg_syscon/sys_syscon/aon_syscon nodes for JH7110 Soc.
+
+Signed-off-by: William Qiu <william.qiu@starfivetech.com>
+Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
+Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
+---
+ arch/riscv/boot/dts/starfive/jh7110.dtsi | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
+index 4c5fdb905..f271c3184 100644
+--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
++++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
+@@ -353,6 +353,11 @@
+                       status = "disabled";
+               };
+ 
++              stg_syscon: syscon@10240000 {
++                      compatible = "starfive,jh7110-stg-syscon", "syscon";
++                      reg = <0x0 0x10240000 0x0 0x1000>;
++              };
++
+               uart3: serial@12000000 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x0 0x12000000 0x0 0x10000>;
+@@ -457,6 +462,11 @@
+                       #reset-cells = <1>;
+               };
+ 
++              sys_syscon: syscon@13030000 {
++                      compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd";
++                      reg = <0x0 0x13030000 0x0 0x1000>;
++              };
++
+               sysgpio: pinctrl@13040000 {
+                       compatible = "starfive,jh7110-sys-pinctrl";
+                       reg = <0x0 0x13040000 0x0 0x10000>;
+@@ -486,6 +496,11 @@
+                       #reset-cells = <1>;
+               };
+ 
++              aon_syscon: syscon@17010000 {
++                      compatible = "starfive,jh7110-aon-syscon", "syscon", "simple-mfd";
++                      reg = <0x0 0x17010000 0x0 0x1000>;
++              };
++
+               aongpio: pinctrl@17020000 {
+                       compatible = "starfive,jh7110-aon-pinctrl";
+                       reg = <0x0 0x17020000 0x0 0x10000>;
+-- 
+2.25.1
+