jh71x0: update patches and config

[openwrt/staging/wigyori.git] / target / linux / jh71x0 / patches-6.1 / 0111-dts-6.1-starfive-add-dma-controller-node.patch

diff --git a/target/linux/jh71x0/patches-6.1/0111-dts-6.1-starfive-add-dma-controller-node.patch b/target/linux/jh71x0/patches-6.1/0111-dts-6.1-starfive-add-dma-controller-node.patch
deleted file mode 100644 (file)
index fcac5a4..0000000
--- a/target/linux/jh71x0/patches-6.1/0111-dts-6.1-starfive-add-dma-controller-node.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From eb5f958d0a591ec1665f70d0b01d8e1e4c3dc617 Mon Sep 17 00:00:00 2001
-From: Zoltan HERPAI <wigyori@uid0.hu>
-Date: Mon, 29 May 2023 02:04:47 +0200
-Subject: [PATCH 111/111] dts/6.1: starfive: add dma controller node
-
-Add the dma controller node for the Starfive JH7110 SoC.
-
-Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
----
- arch/riscv/boot/dts/starfive/jh7110.dtsi | 18 ++++++++++++++++++
- 1 file changed, 18 insertions(+)
-
-diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
-index d7ce27623b9e..2a51c3c152f4 100644
---- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
-+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
-@@ -612,6 +612,24 @@
-                                <&syscrg JH7110_SYSRST_WDT_CORE>;
-               };
- 
-+              dma: dma-controller@16050000 {
-+                      compatible = "starfive,jh7110-axi-dma";
-+                      reg = <0x0 0x16050000 0x0 0x10000>;
-+                      clocks = <&stgcrg JH7110_STGCLK_DMA1P_AXI>,
-+                               <&stgcrg JH7110_STGCLK_DMA1P_AHB>;
-+                      clock-names = "core-clk", "cfgr-clk";
-+                      resets = <&stgcrg JH7110_STGRST_DMA1P_AXI>,
-+                               <&stgcrg JH7110_STGRST_DMA1P_AHB>;
-+                      interrupts = <73>;
-+                      #dma-cells = <1>;
-+                      dma-channels = <4>;
-+                      snps,dma-masters = <1>;
-+                      snps,data-width = <3>;
-+                      snps,block-size = <65536 65536 65536 65536>;
-+                      snps,priority = <0 1 2 3>;
-+                      snps,axi-max-burst-len = <16>;
-+              };
-+
-               aoncrg: clock-controller@17000000 {
-                       compatible = "starfive,jh7110-aoncrg";
-                       reg = <0x0 0x17000000 0x0 0x10000>;
--- 
-2.20.1
-