jh71x0: update patches and config

[openwrt/staging/wigyori.git] / target / linux / jh71x0 / patches-6.1 / 0112-dt-bindings-rng-Add-StarFive-TRNG-module.patch

diff --git a/target/linux/jh71x0/patches-6.1/0112-dt-bindings-rng-Add-StarFive-TRNG-module.patch b/target/linux/jh71x0/patches-6.1/0112-dt-bindings-rng-Add-StarFive-TRNG-module.patch
new file mode 100644 (file)
index 0000000..a60e887
--- /dev/null
+++ b/target/linux/jh71x0/patches-6.1/0112-dt-bindings-rng-Add-StarFive-TRNG-module.patch
@@ -0,0 +1,82 @@
+From 45ecaa27c2a85d1498daac20ed95da71bd363d8c Mon Sep 17 00:00:00 2001
+From: Jia Jie Ho <jiajie.ho@starfivetech.com>
+Date: Tue, 17 Jan 2023 09:54:43 +0800
+Subject: [PATCH 112/129] dt-bindings: rng: Add StarFive TRNG module
+
+Add documentation to describe Starfive true random number generator
+module.
+
+Co-developed-by: Jenny Zhang <jenny.zhang@starfivetech.com>
+Signed-off-by: Jenny Zhang <jenny.zhang@starfivetech.com>
+Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
+Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
+---
+ .../bindings/rng/starfive,jh7110-trng.yaml    | 55 +++++++++++++++++++
+ 1 file changed, 55 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/rng/starfive,jh7110-trng.yaml
+
+diff --git a/Documentation/devicetree/bindings/rng/starfive,jh7110-trng.yaml b/Documentation/devicetree/bindings/rng/starfive,jh7110-trng.yaml
+new file mode 100644
+index 000000000..2b76ce25a
+--- /dev/null
++++ b/Documentation/devicetree/bindings/rng/starfive,jh7110-trng.yaml
+@@ -0,0 +1,55 @@
++# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/rng/starfive,jh7110-trng.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: StarFive SoC TRNG Module
++
++maintainers:
++  - Jia Jie Ho <jiajie.ho@starfivetech.com>
++
++properties:
++  compatible:
++    const: starfive,jh7110-trng
++
++  reg:
++    maxItems: 1
++
++  clocks:
++    items:
++      - description: Hardware reference clock
++      - description: AHB reference clock
++
++  clock-names:
++    items:
++      - const: hclk
++      - const: ahb
++
++  resets:
++    maxItems: 1
++
++  interrupts:
++    maxItems: 1
++
++required:
++  - compatible
++  - reg
++  - clocks
++  - clock-names
++  - resets
++  - interrupts
++
++additionalProperties: false
++
++examples:
++  - |
++    rng: rng@1600C000 {
++        compatible = "starfive,jh7110-trng";
++        reg = <0x1600C000 0x4000>;
++        clocks = <&clk 15>, <&clk 16>;
++        clock-names = "hclk", "ahb";
++        resets = <&reset 3>;
++        interrupts = <30>;
++    };
++...
+-- 
+2.25.1
+