layerscape: add LS1043A Rev1.1 support

[openwrt/staging/yousong.git] / target / linux / layerscape / patches-4.4 / 0240-ARM-dts-ls1021a-add-SCFG-MSI-dts-node.patch

diff --git a/target/linux/layerscape/patches-4.4/0240-ARM-dts-ls1021a-add-SCFG-MSI-dts-node.patch b/target/linux/layerscape/patches-4.4/0240-ARM-dts-ls1021a-add-SCFG-MSI-dts-node.patch
new file mode 100644 (file)
index 0000000..760ea00
--- /dev/null
+++ b/target/linux/layerscape/patches-4.4/0240-ARM-dts-ls1021a-add-SCFG-MSI-dts-node.patch
@@ -0,0 +1,61 @@
+From b57dcab78fdc76a6c56c2df71518fb022429e244 Mon Sep 17 00:00:00 2001
+From: Minghuan Lian <Minghuan.Lian@nxp.com>
+Date: Wed, 6 Apr 2016 19:02:07 +0800
+Subject: [PATCH 02/13] ARM: dts: ls1021a: add SCFG MSI dts node
+
+Cherry-pick upstream patch.
+
+Add SCFG MSI dts node and add msi-parent property to PCIe dts node
+that points to the corresponding MSI node.
+
+Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
+Tested-by: Alexander Stein <alexander.stein@systec-electronic.com>
+Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+---
+ arch/arm/boot/dts/ls1021a.dtsi | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
+index 38272d0..527f653 100644
+--- a/arch/arm/boot/dts/ls1021a.dtsi
++++ b/arch/arm/boot/dts/ls1021a.dtsi
+@@ -119,6 +119,20 @@
+ 
+               };
+ 
++              msi1: msi-controller@1570e00 {
++                      compatible = "fsl,1s1021a-msi";
++                      reg = <0x0 0x1570e00 0x0 0x8>;
++                      msi-controller;
++                      interrupts =  <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
++              };
++
++              msi2: msi-controller@1570e08 {
++                      compatible = "fsl,1s1021a-msi";
++                      reg = <0x0 0x1570e08 0x0 0x8>;
++                      msi-controller;
++                      interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
++              };
++
+               ifc: ifc@1530000 {
+                       compatible = "fsl,ifc", "simple-bus";
+                       reg = <0x0 0x1530000 0x0 0x10000>;
+@@ -554,6 +568,7 @@
+                       bus-range = <0x0 0xff>;
+                       ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
+                                 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
++                      msi-parent = <&msi1>;
+                       #interrupt-cells = <1>;
+                       interrupt-map-mask = <0 0 0 7>;
+                       interrupt-map = <0000 0 0 1 &gic GIC_SPI 91  IRQ_TYPE_LEVEL_HIGH>,
+@@ -576,6 +591,7 @@
+                       bus-range = <0x0 0xff>;
+                       ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
+                                 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
++                      msi-parent = <&msi2>;
+                       #interrupt-cells = <1>;
+                       interrupt-map-mask = <0 0 0 7>;
+                       interrupt-map = <0000 0 0 1 &gic GIC_SPI 92  IRQ_TYPE_LEVEL_HIGH>,
+-- 
+2.1.0.27.g96db324
+