layerscape: add 64b/32b target for ls1043ardb device

[openwrt/staging/yousong.git] / target / linux / layerscape / patches-4.4 / 3008-armv8-aarch32-Add-SMP-support-for-32-bit-Linux.patch

diff --git a/target/linux/layerscape/patches-4.4/3008-armv8-aarch32-Add-SMP-support-for-32-bit-Linux.patch b/target/linux/layerscape/patches-4.4/3008-armv8-aarch32-Add-SMP-support-for-32-bit-Linux.patch
new file mode 100644 (file)
index 0000000..31f1d98
--- /dev/null
+++ b/target/linux/layerscape/patches-4.4/3008-armv8-aarch32-Add-SMP-support-for-32-bit-Linux.patch
@@ -0,0 +1,103 @@
+From 5d06e90bd0e3bdd104b7b25173e05617f02dc44d Mon Sep 17 00:00:00 2001
+From: Alison Wang <b18965@freescale.com>
+Date: Fri, 13 May 2016 15:09:47 +0800
+Subject: [PATCH 08/70] armv8: aarch32: Add SMP support for 32-bit Linux
+
+The patch adds SMP support for running 32-bit Linux kernel. Spin-table
+method is used for SMP support.
+
+Signed-off-by: Alison Wang <alison.wang@nxp.com>
+Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
+---
+ arch/arm/mach-imx/common.h       |    1 +
+ arch/arm/mach-imx/mach-ls1043a.c |    1 +
+ arch/arm/mach-imx/platsmp.c      |   49 ++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 51 insertions(+)
+
+--- a/arch/arm/mach-imx/common.h
++++ b/arch/arm/mach-imx/common.h
+@@ -155,5 +155,6 @@ static inline void imx_init_l2cache(void
+ 
+ extern struct smp_operations imx_smp_ops;
+ extern struct smp_operations ls1021a_smp_ops;
++extern const struct smp_operations layerscape_smp_ops;
+ 
+ #endif
+--- a/arch/arm/mach-imx/mach-ls1043a.c
++++ b/arch/arm/mach-imx/mach-ls1043a.c
+@@ -17,5 +17,6 @@ static const char * const ls1043a_dt_com
+ };
+ 
+ DT_MACHINE_START(LS1043A, "Freescale LS1043A")
++      .smp            = smp_ops(layerscape_smp_ops),
+       .dt_compat      = ls1043a_dt_compat,
+ MACHINE_END
+--- a/arch/arm/mach-imx/platsmp.c
++++ b/arch/arm/mach-imx/platsmp.c
+@@ -14,6 +14,7 @@
+ #include <linux/of_address.h>
+ #include <linux/of.h>
+ #include <linux/smp.h>
++#include <linux/types.h>
+ 
+ #include <asm/cacheflush.h>
+ #include <asm/page.h>
+@@ -26,6 +27,8 @@
+ u32 g_diag_reg;
+ static void __iomem *scu_base;
+ 
++static u64 cpu_release_addr[NR_CPUS];
++
+ static struct map_desc scu_io_desc __initdata = {
+       /* .virtual and .pfn are run-time assigned */
+       .length         = SZ_4K,
+@@ -127,3 +130,49 @@ struct smp_operations  ls1021a_smp_ops _
+       .smp_prepare_cpus       = ls1021a_smp_prepare_cpus,
+       .smp_boot_secondary     = ls1021a_boot_secondary,
+ };
++
++static int layerscape_smp_boot_secondary(unsigned int cpu,
++                                       struct task_struct *idle)
++{
++      u32 secondary_startup_phys;
++      __le32 __iomem *release_addr;
++
++      secondary_startup_phys = virt_to_phys(secondary_startup);
++
++      release_addr = ioremap_cache((u32)cpu_release_addr[cpu],
++                                   sizeof(u64));
++      if (!release_addr)
++              return -ENOMEM;
++
++      writel_relaxed(secondary_startup_phys, release_addr);
++      writel_relaxed(0, release_addr + 1);
++      __cpuc_flush_dcache_area((__force void *)release_addr,
++                               sizeof(u64));
++
++      sev();
++
++      iounmap(release_addr);
++
++      return 0;
++}
++
++static void layerscape_smp_init_cpus(void)
++{
++      struct device_node *dnt = NULL;
++      unsigned int cpu = 0;
++
++      while ((dnt = of_find_node_by_type(dnt, "cpu"))) {
++              if (of_property_read_u64(dnt, "cpu-release-addr",
++                  &cpu_release_addr[cpu])) {
++                      pr_err("CPU %d: missing or invalid cpu-release-addr property\n",
++                      cpu);
++              }
++
++              cpu++;
++      }
++}
++
++const struct smp_operations layerscape_smp_ops __initconst = {
++      .smp_init_cpus          = layerscape_smp_init_cpus,
++      .smp_boot_secondary     = layerscape_smp_boot_secondary,
++};