/* FLEXCAN FD Bit Timing register (FDCBT) bits */
#define FLEXCAN_FDCBT_FPRESDIV(x) (((x) & 0x3ff) << 20)
-@@ -1101,7 +1104,7 @@ static void flexcan_set_bittiming(struct
+@@ -1108,7 +1111,7 @@ static void flexcan_set_bittiming(struct
struct can_bittiming *bt = &priv->can.bittiming;
struct can_bittiming *dbt = &priv->can.data_bittiming;
struct flexcan_regs __iomem *regs = priv->regs;
reg = priv->read(®s->ctrl);
reg &= ~(FLEXCAN_CTRL_LPB | FLEXCAN_CTRL_SMP | FLEXCAN_CTRL_LOM);
-@@ -1173,6 +1176,19 @@ static void flexcan_set_bittiming(struct
+@@ -1180,6 +1183,19 @@ static void flexcan_set_bittiming(struct
FLEXCAN_FDCBT_FPROPSEG(dbt->prop_seg);
priv->write(reg_fdcbt, ®s->fdcbt);
if (bt->brp != dbt->brp)
netdev_warn(dev, "Warning!! data brp = %d and brp = %d don't match.\n"
"flexcan may not work. consider using different bitrate or data bitrate\n",
-@@ -1322,6 +1338,7 @@ static int flexcan_chip_start(struct net
+@@ -1331,6 +1347,7 @@ static int flexcan_chip_start(struct net
/* FDCTRL */
if (priv->can.ctrlmode_supported & CAN_CTRLMODE_FD) {
reg_fdctrl = priv->read(®s->fdctrl) & ~FLEXCAN_FDCTRL_FDRATE;