mediatek: backport upstream mediatek patches

[openwrt/staging/blogic.git] / target / linux / mediatek / patches-4.14 / 0215-arm64-dts-mt7622-turn-uart0-clock-to-real-ones.patch

diff --git a/target/linux/mediatek/patches-4.14/0215-arm64-dts-mt7622-turn-uart0-clock-to-real-ones.patch b/target/linux/mediatek/patches-4.14/0215-arm64-dts-mt7622-turn-uart0-clock-to-real-ones.patch
new file mode 100644 (file)
index 0000000..541c46b
--- /dev/null
+++ b/target/linux/mediatek/patches-4.14/0215-arm64-dts-mt7622-turn-uart0-clock-to-real-ones.patch
@@ -0,0 +1,50 @@
+From 84b3092b3773777de1ba1ad142e53247fb881ddd Mon Sep 17 00:00:00 2001
+From: Sean Wang <sean.wang@mediatek.com>
+Date: Thu, 28 Dec 2017 18:00:11 +0800
+Subject: [PATCH 215/224] arm64: dts: mt7622: turn uart0 clock to real ones
+
+This patch also cleans up two oscillators that provide clocks for MT7623.
+Switch the uart clocks to the real ones while at it.
+
+Signed-off-by: Sean Wang <sean.wang@mediatek.com>
+Cc: Matthias Brugger <matthias.bgg@gmail.com>
+---
+ arch/arm64/boot/dts/mediatek/mt7622.dtsi | 15 ++-------------
+ 1 file changed, 2 insertions(+), 13 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+index 7256879de4c9..d8a17d10e2ff 100644
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -91,18 +91,6 @@
+               };
+       };
+ 
+-      uart_clk: dummy25m {
+-              compatible = "fixed-clock";
+-              #clock-cells = <0>;
+-              clock-frequency = <25000000>;
+-      };
+-
+-      bus_clk: dummy280m {
+-              compatible = "fixed-clock";
+-              #clock-cells = <0>;
+-              clock-frequency = <280000000>;
+-      };
+-
+       pwrap_clk: dummy40m {
+               compatible = "fixed-clock";
+               clock-frequency = <40000000>;
+@@ -234,7 +222,8 @@
+                            "mediatek,mt6577-uart";
+               reg = <0 0x11002000 0 0x400>;
+               interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
+-              clocks = <&uart_clk>, <&bus_clk>;
++              clocks = <&topckgen CLK_TOP_UART_SEL>,
++                       <&pericfg CLK_PERI_UART1_PD>;
+               clock-names = "baud", "bus";
+               status = "disabled";
+       };
+-- 
+2.11.0
+