mediatek: remove left-overs from Linux 5.10
[openwrt/staging/chunkeey.git] / target / linux / mediatek / patches-5.10 / 200-phy-phy-mtk-tphy-Add-hifsys-support.patch
diff --git a/target/linux/mediatek/patches-5.10/200-phy-phy-mtk-tphy-Add-hifsys-support.patch b/target/linux/mediatek/patches-5.10/200-phy-phy-mtk-tphy-Add-hifsys-support.patch
deleted file mode 100644 (file)
index 95f4be1..0000000
+++ /dev/null
@@ -1,66 +0,0 @@
-From 28f9a5e2a3f5441ab5594669ed82da11e32277a9 Mon Sep 17 00:00:00 2001
-From: Kristian Evensen <kristian.evensen@gmail.com>
-Date: Mon, 30 Apr 2018 14:38:01 +0200
-Subject: [PATCH] phy: phy-mtk-tphy: Add hifsys-support
-
----
- drivers/phy/mediatek/phy-mtk-tphy.c | 20 ++++++++++++++++++++
- 1 file changed, 20 insertions(+)
-
---- a/drivers/phy/mediatek/phy-mtk-tphy.c
-+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
-@@ -15,6 +15,8 @@
- #include <linux/of_device.h>
- #include <linux/phy/phy.h>
- #include <linux/platform_device.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/regmap.h>
- /* version V1 sub-banks offset base address */
- /* banks shared by multiple phys */
-@@ -267,6 +269,9 @@
- #define RG_CDR_BIRLTD0_GEN3_MSK               GENMASK(4, 0)
- #define RG_CDR_BIRLTD0_GEN3_VAL(x)    (0x1f & (x))
-+#define HIF_SYSCFG1                   0x14
-+#define HIF_SYSCFG1_PHY2_MASK         (0x3 << 20)
-+
- enum mtk_phy_version {
-       MTK_PHY_V1 = 1,
-       MTK_PHY_V2,
-@@ -315,6 +320,7 @@ struct mtk_tphy {
-       void __iomem *sif_base; /* only shared sif */
-       const struct mtk_phy_pdata *pdata;
-       struct mtk_phy_instance **phys;
-+      struct regmap *hif;
-       int nphys;
-       int src_ref_clk; /* MHZ, reference clock for slew rate calibrate */
-       int src_coef; /* coefficient for slew rate calibrate */
-@@ -634,6 +640,10 @@ static void pcie_phy_instance_init(struc
-       if (tphy->pdata->version != MTK_PHY_V1)
-               return;
-+      if (tphy->hif)
-+              regmap_update_bits(tphy->hif, HIF_SYSCFG1,
-+                                 HIF_SYSCFG1_PHY2_MASK, 0);
-+
-       tmp = readl(u3_banks->phya + U3P_U3_PHYA_DA_REG0);
-       tmp &= ~(P3A_RG_XTAL_EXT_PE1H | P3A_RG_XTAL_EXT_PE2H);
-       tmp |= P3A_RG_XTAL_EXT_PE1H_VAL(0x2) | P3A_RG_XTAL_EXT_PE2H_VAL(0x2);
-@@ -1136,6 +1146,16 @@ static int mtk_tphy_probe(struct platfor
-               &tphy->src_ref_clk);
-       device_property_read_u32(dev, "mediatek,src-coef", &tphy->src_coef);
-+      if (of_find_property(np, "mediatek,phy-switch", NULL)) {
-+              tphy->hif = syscon_regmap_lookup_by_phandle(np,
-+                                                          "mediatek,phy-switch");
-+              if (IS_ERR(tphy->hif)) {
-+                      dev_err(&pdev->dev,
-+                              "missing \"mediatek,phy-switch\" phandle\n");
-+                      return PTR_ERR(tphy->hif);
-+              }
-+      }
-+
-       port = 0;
-       for_each_child_of_node(np, child_np) {
-               struct mtk_phy_instance *instance;