--- /dev/null
+From d4f08a703565abf47baa5a77d05365cf4598d55c Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Sun, 19 Mar 2023 12:56:52 +0000
+Subject: [PATCH 1/2] dt-bindings: arm: mediatek: sgmiisys: Convert to DT
+ schema
+
+Convert mediatek,sgmiiisys bindings to DT schema format.
+Add maintainer Matthias Brugger, no maintainers were listed in the
+original documentation.
+As this node is also referenced by the Ethernet controller and used
+as SGMII PCS add this fact to the description.
+Move the file to Documentation/devicetree/bindings/net/pcs/ which seems
+more appropriate given that the great majority of registers are related
+to SGMII PCS functionality and only one register represents clock bits.
+
+Reviewed-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ .../arm/mediatek/mediatek,sgmiisys.txt | 27 ----------
+ .../bindings/net/pcs/mediatek,sgmiisys.yaml | 49 +++++++++++++++++++
+ 2 files changed, 49 insertions(+), 27 deletions(-)
+ delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.txt
+ create mode 100644 Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml
+
+--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.txt
++++ /dev/null
+@@ -1,27 +0,0 @@
+-MediaTek SGMIISYS controller
+-============================
+-
+-The MediaTek SGMIISYS controller provides various clocks to the system.
+-
+-Required Properties:
+-
+-- compatible: Should be:
+- - "mediatek,mt7622-sgmiisys", "syscon"
+- - "mediatek,mt7629-sgmiisys", "syscon"
+- - "mediatek,mt7981-sgmiisys_0", "syscon"
+- - "mediatek,mt7981-sgmiisys_1", "syscon"
+- - "mediatek,mt7986-sgmiisys_0", "syscon"
+- - "mediatek,mt7986-sgmiisys_1", "syscon"
+-- #clock-cells: Must be 1
+-
+-The SGMIISYS controller uses the common clk binding from
+-Documentation/devicetree/bindings/clock/clock-bindings.txt
+-The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+-
+-Example:
+-
+-sgmiisys: sgmiisys@1b128000 {
+- compatible = "mediatek,mt7622-sgmiisys", "syscon";
+- reg = <0 0x1b128000 0 0x1000>;
+- #clock-cells = <1>;
+-};
+--- /dev/null
++++ b/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml
+@@ -0,0 +1,49 @@
++# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/net/pcs/mediatek,sgmiisys.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: MediaTek SGMIISYS Controller
++
++maintainers:
++ - Matthias Brugger <matthias.bgg@gmail.com>
++
++description:
++ The MediaTek SGMIISYS controller provides a SGMII PCS and some clocks
++ to the ethernet subsystem to which it is attached.
++
++properties:
++ compatible:
++ items:
++ - enum:
++ - mediatek,mt7622-sgmiisys
++ - mediatek,mt7629-sgmiisys
++ - mediatek,mt7986-sgmiisys_0
++ - mediatek,mt7986-sgmiisys_1
++ - const: syscon
++
++ reg:
++ maxItems: 1
++
++ '#clock-cells':
++ const: 1
++
++required:
++ - compatible
++ - reg
++ - '#clock-cells'
++
++additionalProperties: false
++
++examples:
++ - |
++ soc {
++ #address-cells = <2>;
++ #size-cells = <2>;
++ sgmiisys: syscon@1b128000 {
++ compatible = "mediatek,mt7622-sgmiisys", "syscon";
++ reg = <0 0x1b128000 0 0x1000>;
++ #clock-cells = <1>;
++ };
++ };