qualcommax: backport more changes for ipq6018 and ipq8074
[openwrt/staging/wigyori.git] / target / linux / qualcommax / patches-6.1 / 0038-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch
diff --git a/target/linux/qualcommax/patches-6.1/0038-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch b/target/linux/qualcommax/patches-6.1/0038-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch
deleted file mode 100644 (file)
index ffd9cf0..0000000
+++ /dev/null
@@ -1,123 +0,0 @@
-From 47e161a7873b0891f4e01a69a839f6161d816ea8 Mon Sep 17 00:00:00 2001
-From: Robert Marko <robimarko@gmail.com>
-Date: Wed, 25 Oct 2023 14:57:57 +0530
-Subject: [PATCH] cpufreq: qcom-nvmem: add support for IPQ6018
-
-IPQ6018 SoC series comes in multiple SKU-s, and not all of them support
-high frequency OPP points.
-
-SoC itself does however have a single bit in QFPROM to indicate the CPU
-speed-bin.
-That bit is used to indicate frequency limit of 1.5GHz, but that alone is
-not enough as IPQ6000 only goes up to 1.2GHz, but SMEM ID can be used to
-limit it further.
-
-IPQ6018 compatible is blacklisted from DT platdev as the cpufreq device
-will get created by NVMEM CPUFreq driver.
-
-Signed-off-by: Robert Marko <robimarko@gmail.com>
-[ Viresh: Fixed rebase conflict. ]
-Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
----
- drivers/cpufreq/cpufreq-dt-platdev.c |  1 +
- drivers/cpufreq/qcom-cpufreq-nvmem.c | 58 ++++++++++++++++++++++++++++++++++++
- 2 files changed, 59 insertions(+)
-
---- a/drivers/cpufreq/cpufreq-dt-platdev.c
-+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
-@@ -163,6 +163,7 @@ static const struct of_device_id blockli
-       { .compatible = "ti,dra7", },
-       { .compatible = "ti,omap3", },
-+      { .compatible = "qcom,ipq6018", },
-       { .compatible = "qcom,ipq8064", },
-       { .compatible = "qcom,ipq8074", },
-       { .compatible = "qcom,apq8064", },
---- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
-+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
-@@ -36,6 +36,8 @@ enum ipq8074_versions {
-       IPQ8074_ACORN_VERSION,
- };
-+#define IPQ6000_VERSION       BIT(2)
-+
- struct qcom_cpufreq_drv;
- struct qcom_cpufreq_match_data {
-@@ -209,6 +211,57 @@ len_error:
-       return ret;
- }
-+static int qcom_cpufreq_ipq6018_name_version(struct device *cpu_dev,
-+                                           struct nvmem_cell *speedbin_nvmem,
-+                                           char **pvs_name,
-+                                           struct qcom_cpufreq_drv *drv)
-+{
-+      u32 msm_id;
-+      int ret;
-+      u8 *speedbin;
-+      *pvs_name = NULL;
-+
-+      ret = qcom_smem_get_soc_id(&msm_id);
-+      if (ret)
-+              return ret;
-+
-+      speedbin = nvmem_cell_read(speedbin_nvmem, NULL);
-+      if (IS_ERR(speedbin))
-+              return PTR_ERR(speedbin);
-+
-+      switch (msm_id) {
-+      case QCOM_ID_IPQ6005:
-+      case QCOM_ID_IPQ6010:
-+      case QCOM_ID_IPQ6018:
-+      case QCOM_ID_IPQ6028:
-+              /* Fuse Value    Freq    BIT to set
-+               * ---------------------------------
-+               *   2’b0     No Limit     BIT(0)
-+               *   2’b1     1.5 GHz      BIT(1)
-+               */
-+              drv->versions = 1 << (unsigned int)(*speedbin);
-+              break;
-+      case QCOM_ID_IPQ6000:
-+              /*
-+               * IPQ6018 family only has one bit to advertise the CPU
-+               * speed-bin, but that is not enough for IPQ6000 which
-+               * is only rated up to 1.2GHz.
-+               * So for IPQ6000 manually set BIT(2) based on SMEM ID.
-+               */
-+              drv->versions = IPQ6000_VERSION;
-+              break;
-+      default:
-+              dev_err(cpu_dev,
-+                      "SoC ID %u is not part of IPQ6018 family, limiting to 1.2GHz!\n",
-+                      msm_id);
-+              drv->versions = IPQ6000_VERSION;
-+              break;
-+      }
-+
-+      kfree(speedbin);
-+      return 0;
-+}
-+
- static int qcom_cpufreq_ipq8074_name_version(struct device *cpu_dev,
-                                            struct nvmem_cell *speedbin_nvmem,
-                                            char **pvs_name,
-@@ -265,6 +318,10 @@ static const struct qcom_cpufreq_match_d
-       .get_version = qcom_cpufreq_ipq8074_name_version,
- };
-+static const struct qcom_cpufreq_match_data match_data_ipq6018 = {
-+      .get_version = qcom_cpufreq_ipq6018_name_version,
-+};
-+
- static int qcom_cpufreq_probe(struct platform_device *pdev)
- {
-       struct qcom_cpufreq_drv *drv;
-@@ -409,6 +466,7 @@ static const struct of_device_id qcom_cp
-       { .compatible = "qcom,apq8096", .data = &match_data_kryo },
-       { .compatible = "qcom,msm8996", .data = &match_data_kryo },
-       { .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
-+      { .compatible = "qcom,ipq6018", .data = &match_data_ipq6018 },
-       { .compatible = "qcom,ipq8064", .data = &match_data_krait },
-       { .compatible = "qcom,ipq8074", .data = &match_data_ipq8074 },
-       { .compatible = "qcom,apq8064", .data = &match_data_krait },