compatible = "tplink,c50-v3", "mediatek,mt7628an-soc";
model = "TP-Link Archer C50 v3";
- gpio-keys-polled {
+ aliases {
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
+ };
+
+ keys {
compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
poll-interval = <20>;
reset {
};
};
- gpio-leds {
+ leds {
compatible = "gpio-leds";
lan {
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
};
- power {
+ led_power: power {
label = "c50-v3:green:power";
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
};
wan {
label = "c50-v3:green:wan";
- gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
};
wan_orange {
label = "c50-v3:orange:wan";
- gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
};
wlan {
wlan5 {
label = "c50-v3:green:wlan5g";
- gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
};
wps {
label = "c50-v3:green:wps";
- gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
};
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x28000>;
- ieee80211-freq-limit = <5000000 6000000>;
- mtd-mac-address = <&factory 0xf100>;
- mtd-mac-address-increment = <(-1)>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x28000>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ mtd-mac-address = <&factory 0xf100>;
+ mtd-mac-address-increment = <(-1)>;
};
};