--- /dev/null
+/dts-v1/;
+
+#include "rt3050.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "planex,mzk-wdpr", "ralink,rt3052-soc";
+ model = "Planex MZK-WDPR";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ cfi@1f000000 {
+ compatible = "cfi-flash";
+ reg = <0x1f000000 0x800000>;
+
+ bank-width = <2>;
+ device-width = <2>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0 0x30000>;
+ read-only;
+ };
+
+ partition@30000 {
+ label = "u-boot-env";
+ reg = <0x30000 0x10000>;
+ read-only;
+ };
+
+ factory: partition@40000 {
+ label = "factory";
+ reg = <0x40000 0x10000>;
+ read-only;
+ };
+
+ partition@7f0000 {
+ label = "Data3G";
+ reg = <0x7f0000 0x10000>;
+ read-only;
+ };
+
+ partition@50000 {
+ compatible = "denx,uimage";
+ label = "firmware";
+ reg = <0x50000 0x680000>;
+ };
+ };
+ };
+
+ gpio-export {
+ compatible = "gpio-export";
+
+ lcd_ctrl1 {
+ gpio-export,name = "lcd_ctrl1";
+ gpio-export,output = <0>;
+ gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&pinctrl {
+ state_default: pinctrl0 {
+ gpio {
+ ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+ ralink,function = "gpio";
+ };
+ };
+};
+
+ðernet {
+ mtd-mac-address = <&factory 0x28>;
+};
+
+&esw {
+ mediatek,portmap = <0x2f>;
+};
+
+&wmac {
+ ralink,mtd-eeprom = <&factory 0>;
+};
+
+&otg {
+ status = "okay";
+};