ramips: rt305x: fix CPU clock detection on RT3352

[openwrt/openwrt.git] / target / linux / ramips / files / arch / mips / include / asm / mach-ralink / rt305x_regs.h

diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
index 9e1aa66429109dd4900a33f5851b8059ede3815a..e121582055913665576effa8eea385dd902d3188 100644 (file)
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
@@ -80,6 +80,11 @@
 #define RT305X_SYSCFG_SRAM_CS0_MODE_WDT                1
 #define RT305X_SYSCFG_SRAM_CS0_MODE_BTCOEX     2
 
+#define RT3352_SYSCFG0_CPUCLK_SHIFT    8
+#define RT3352_SYSCFG0_CPUCLK_MASK     0x1
+#define RT3352_SYSCFG0_CPUCLK_LOW      0x0
+#define RT3352_SYSCFG0_CPUCLK_HIGH     0x1
+
 #define RT305X_GPIO_MODE_I2C           BIT(0)
 #define RT305X_GPIO_MODE_SPI           BIT(1)
 #define RT305X_GPIO_MODE_UART0_SHIFT   2