--- a/arch/mips/ralink/mt7621.c
+++ b/arch/mips/ralink/mt7621.c
-@@ -7,6 +7,7 @@
-
- #include <linux/kernel.h>
+@@ -9,6 +9,7 @@
#include <linux/init.h>
+ #include <linux/slab.h>
+ #include <linux/sys_soc.h>
+#include <linux/jiffies.h>
#include <asm/mipsregs.h>
#include <asm/smp-ops.h>
-@@ -14,6 +15,7 @@
+@@ -16,6 +17,7 @@
#include <asm/mach-ralink/ralink_regs.h>
#include <asm/mach-ralink/mt7621.h>
#include <asm/mips-boards/launch.h>
#include <pinmux.h>
-@@ -175,6 +177,58 @@ bool plat_cpu_core_present(int core)
+@@ -161,6 +163,58 @@ bool plat_cpu_core_present(int core)
return true;
}
void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE);
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
-@@ -58,6 +58,7 @@ choice
- select CLKSRC_MIPS_GIC
+@@ -63,6 +63,7 @@ choice
select HAVE_PCI if PCI_MT7621
+ select SOC_BUS
select WEAK_REORDERING_BEYOND_LLSC
+ select GENERIC_CLOCKEVENTS_BROADCAST
endchoice