sw_w32(0x00200020, RTL838X_STORM_CTRL_BURST_PPS_1); // MC and BC
// Include IFG in storm control
- sw_w32_mask(0, 1 << 6, RTL838X_STORM_CTRL);
+ sw_w32_mask(0, BIT(6), RTL838X_STORM_CTRL);
// Rate control is based on bytes/s (0 = packets)
- sw_w32_mask(0, 1 << 5, RTL838X_STORM_CTRL);
+ sw_w32_mask(0, BIT(5), RTL838X_STORM_CTRL);
// Bandwidth control includes preamble and IFG (10 Bytes)
sw_w32_mask(0, 1, RTL838X_SCHED_CTRL);
* for UC and MC for both known and unknown addresses */
for (i = 0; i < priv->cpu_port; i++) {
if (priv->ports[i].phy) {
- sw_w32((1 << 18) | 0x8000, RTL838X_STORM_CTRL_PORT_UC(i));
- sw_w32((1 << 18) | 0x8000, RTL838X_STORM_CTRL_PORT_MC(i));
+ sw_w32(BIT(18) | 0x8000, RTL838X_STORM_CTRL_PORT_UC(i));
+ sw_w32(BIT(18) | 0x8000, RTL838X_STORM_CTRL_PORT_MC(i));
sw_w32(0x000, RTL838X_STORM_CTRL_PORT_BC(i));
rtl83xx_storm_enable(priv, i, true);
}