--- /dev/null
+From 948026d8d24e6f81571cf9e941d81892049b7279 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sat, 31 Dec 2022 16:01:45 -0600
+Subject: [PATCH 20/25] riscv: dts: allwinner: d1: Add crypto engine node
+
+D1 contains a crypto engine which is supported by the sun8i-ce driver.
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
+---
+ arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
+index 4115be5a66cb..53346a5aadf7 100644
+--- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
++++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
+@@ -386,6 +386,18 @@
+ #size-cells = <1>;
+ };
+
++ crypto: crypto@3040000 {
++ compatible = "allwinner,sun20i-d1-crypto";
++ reg = <0x3040000 0x800>;
++ interrupts = <SOC_PERIPHERAL_IRQ(52) IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&ccu CLK_BUS_CE>,
++ <&ccu CLK_CE>,
++ <&ccu CLK_MBUS_CE>,
++ <&rtc CLK_IOSC>;
++ clock-names = "bus", "mod", "ram", "trng";
++ resets = <&ccu RST_BUS_CE>;
++ };
++
+ mbus: dram-controller@3102000 {
+ compatible = "allwinner,sun20i-d1-mbus";
+ reg = <0x3102000 0x1000>,
+--
+2.20.1
+