X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Fat91%2Fpatches-5.15%2F246-clk-at91-sama7g5-set-low-limit-for-mck0-at-32KHz.patch;fp=target%2Flinux%2Fat91%2Fpatches-5.15%2F246-clk-at91-sama7g5-set-low-limit-for-mck0-at-32KHz.patch;h=922cf0b69c32f4c5a71ccd188e9338710b960b55;hb=eb758a8fec2cee24e528008052fa2bd58482ca3a;hp=0000000000000000000000000000000000000000;hpb=c5c37886cff1705ba9be9b33df3ab121bd27fe6b;p=openwrt%2Fstaging%2Fdedeckeh.git diff --git a/target/linux/at91/patches-5.15/246-clk-at91-sama7g5-set-low-limit-for-mck0-at-32KHz.patch b/target/linux/at91/patches-5.15/246-clk-at91-sama7g5-set-low-limit-for-mck0-at-32KHz.patch new file mode 100644 index 0000000000..922cf0b69c --- /dev/null +++ b/target/linux/at91/patches-5.15/246-clk-at91-sama7g5-set-low-limit-for-mck0-at-32KHz.patch @@ -0,0 +1,26 @@ +From 9fd5a49f6da9de5da83f4a53eccefad647ab15ed Mon Sep 17 00:00:00 2001 +From: Claudiu Beznea +Date: Mon, 11 Oct 2021 14:27:18 +0300 +Subject: [PATCH 246/247] clk: at91: sama7g5: set low limit for mck0 at 32KHz + +MCK0 could go as low as 32KHz. Set this limit. + +Signed-off-by: Claudiu Beznea +Link: https://lore.kernel.org/r/20211011112719.3951784-15-claudiu.beznea@microchip.com +Acked-by: Nicolas Ferre +Signed-off-by: Stephen Boyd +--- + drivers/clk/at91/sama7g5.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clk/at91/sama7g5.c ++++ b/drivers/clk/at91/sama7g5.c +@@ -850,7 +850,7 @@ static const struct { + + /* MCK0 characteristics. */ + static const struct clk_master_characteristics mck0_characteristics = { +- .output = { .min = 50000000, .max = 200000000 }, ++ .output = { .min = 32768, .max = 200000000 }, + .divisors = { 1, 2, 4, 3, 5 }, + .have_div3_pres = 1, + };