X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Fbcm63xx%2Fpatches-5.15%2F512-board_bcm6328.patch;fp=target%2Flinux%2Fbcm63xx%2Fpatches-5.15%2F512-board_bcm6328.patch;h=9a68484c5f48ad1801d4352876076c7f21b2ff88;hb=2317a7426ed95978e7f4feaebb00bc909ffced34;hp=0000000000000000000000000000000000000000;hpb=0f14619e301059848761eb6c973c0bb85f211b94;p=openwrt%2Fstaging%2Fnoltari.git diff --git a/target/linux/bcm63xx/patches-5.15/512-board_bcm6328.patch b/target/linux/bcm63xx/patches-5.15/512-board_bcm6328.patch new file mode 100644 index 0000000000..9a68484c5f --- /dev/null +++ b/target/linux/bcm63xx/patches-5.15/512-board_bcm6328.patch @@ -0,0 +1,699 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -343,6 +343,651 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_963281TAN = { ++ .name = "963281TAN", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++}; ++ ++static struct board_info __initdata board_A4001N = { ++ .name = "96328dg2x2", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ }, ++}; ++ ++static struct board_info __initdata board_A4001N1 = { ++ .name = "963281T_TEF", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ }, ++}; ++ ++static struct sprom_fixup __initdata ad1018_fixups[] = { ++ { .offset = 6, .value = 0x1c00 }, ++ { .offset = 65, .value = 0x1256 }, ++ { .offset = 96, .value = 0x2046 }, ++ { .offset = 97, .value = 0xfe69 }, ++ { .offset = 98, .value = 0x1726 }, ++ { .offset = 99, .value = 0xfa5c }, ++ { .offset = 112, .value = 0x2046 }, ++ { .offset = 113, .value = 0xfea8 }, ++ { .offset = 114, .value = 0x1978 }, ++ { .offset = 115, .value = 0xfa26 }, ++ { .offset = 161, .value = 0x2222 }, ++ { .offset = 169, .value = 0x2222 }, ++ { .offset = 171, .value = 0x2222 }, ++ { .offset = 173, .value = 0x2222 }, ++ { .offset = 174, .value = 0x4444 }, ++ { .offset = 175, .value = 0x2222 }, ++ { .offset = 176, .value = 0x4444 }, ++}; ++ ++static struct board_info __initdata board_AD1018 = { ++ .name = "96328avngr", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "FIBRE", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "LAN3", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "LAN2", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "LAN1", ++ }, ++ }, ++ }, ++ ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .type = SPROM_BCM43217, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ .board_fixups = ad1018_fixups, ++ .num_board_fixups = ARRAY_SIZE(ad1018_fixups), ++ }, ++}; ++ ++static struct sprom_fixup __initdata ar5381u_fixups[] = { ++ { .offset = 97, .value = 0xfee5 }, ++ { .offset = 98, .value = 0x157c }, ++ { .offset = 99, .value = 0xfae7 }, ++ { .offset = 113, .value = 0xfefa }, ++ { .offset = 114, .value = 0x15d6 }, ++ { .offset = 115, .value = 0xfaf8 }, ++}; ++ ++static struct board_info __initdata board_AR5381u = { ++ .name = "96328A-1241N", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ .board_fixups = ar5381u_fixups, ++ .num_board_fixups = ARRAY_SIZE(ar5381u_fixups), ++ }, ++}; ++ ++static struct sprom_fixup __initdata ar5387un_fixups[] = { ++ { .offset = 2, .value = 0x05bb }, ++ { .offset = 65, .value = 0x1204 }, ++ { .offset = 78, .value = 0x0303 }, ++ { .offset = 79, .value = 0x0202 }, ++ { .offset = 80, .value = 0xff02 }, ++ { .offset = 87, .value = 0x0315 }, ++ { .offset = 88, .value = 0x0315 }, ++ { .offset = 96, .value = 0x2048 }, ++ { .offset = 97, .value = 0xff11 }, ++ { .offset = 98, .value = 0x1567 }, ++ { .offset = 99, .value = 0xfb24 }, ++ { .offset = 100, .value = 0x3e3c }, ++ { .offset = 101, .value = 0x4038 }, ++ { .offset = 102, .value = 0xfe7f }, ++ { .offset = 103, .value = 0x1279 }, ++ { .offset = 112, .value = 0x2048 }, ++ { .offset = 113, .value = 0xff03 }, ++ { .offset = 114, .value = 0x154c }, ++ { .offset = 115, .value = 0xfb27 }, ++ { .offset = 116, .value = 0x3e3c }, ++ { .offset = 117, .value = 0x4038 }, ++ { .offset = 118, .value = 0xfe87 }, ++ { .offset = 119, .value = 0x1233 }, ++ { .offset = 203, .value = 0x2226 }, ++}; ++ ++static struct board_info __initdata board_AR5387un = { ++ .name = "96328A-1441N1", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ .board_fixups = ar5387un_fixups, ++ .num_board_fixups = ARRAY_SIZE(ar5387un_fixups), ++ }, ++}; ++ ++static struct board_info __initdata board_dsl_274xb_f1 = { ++ .name = "AW4339U", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ ++ .has_caldata = 1, ++ .caldata = { ++ { ++ .vendor = PCI_VENDOR_ID_ATHEROS, ++ .caldata_offset = 0x7d1000, ++ .slot = 0, ++ .led_pin = -1, ++ .led_active_high = 1, ++ }, ++ }, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 4", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 3", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 2", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 1", ++ }, ++ }, ++ }, ++}; ++ ++static struct board_info __initdata board_FAST2704V2 = { ++ .name = "F@ST2704V2", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .has_usbd = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++}; ++ ++static struct board_info __initdata board_PDG_A4001N_A_000_1A1_AX = { ++ .name = "96328avng", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ }, ++}; ++ ++static struct board_info __initdata board_PDG_A4101N_A_000_1A1_AE = { ++ .name = "96328avngv", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ }, ++}; ++ ++static struct board_info __initdata board_R5010UNV2 = { ++ .name = "96328ang", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .type = SPROM_BCM43217, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ }, ++}; ++ ++static struct board_info __initdata board_TG582N = { ++ .name = "DANT-1", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ }, ++}; ++ ++static struct board_info __initdata board_TG582N_TELECOM_ITALIA = { ++ .name = "DANT-V", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ }, ++}; ++ ++static struct board_info __initdata board_W3400V6 = { ++ .name = "96328ang", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6328 */ + + /* +@@ -689,6 +1334,20 @@ static const struct board_info __initcon + #endif /* CONFIG_BCM63XX_CPU_6318 */ + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, ++ &board_963281TAN, ++ &board_A4001N, ++ &board_A4001N1, ++ &board_AD1018, ++ &board_AR5381u, ++ &board_AR5387un, ++ &board_dsl_274xb_f1, ++ &board_FAST2704V2, ++ &board_PDG_A4001N_A_000_1A1_AX, ++ &board_PDG_A4101N_A_000_1A1_AE, ++ &board_TG582N, ++ &board_TG582N_TELECOM_ITALIA, ++ &board_R5010UNV2, ++ &board_W3400V6, + #endif /* CONFIG_BCM63XX_CPU_6328 */ + #ifdef CONFIG_BCM63XX_CPU_6338 + &board_96338gw, +@@ -728,7 +1387,23 @@ static struct of_device_id const bcm963x + { .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, }, + #endif /* CONFIG_BCM63XX_CPU_6318 */ + #ifdef CONFIG_BCM63XX_CPU_6328 ++ { .compatible = "adb,a4001n", .data = &board_A4001N, }, ++ { .compatible = "adb,a4001n1", .data = &board_A4001N1, }, ++ { .compatible = "adb,pdg-a4001n-a-000-1a1-ax", .data = &board_PDG_A4001N_A_000_1A1_AX, }, ++ { .compatible = "adb,pdg-a4101n-a-000-1a1-ae", .data = &board_PDG_A4101N_A_000_1A1_AE, }, + { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, ++ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, }, ++ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, }, ++ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, }, ++ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, }, ++ { .compatible = "d-link,dsl-2750u-c1", .data = &board_A4001N, }, ++ { .compatible = "innacomm,w3400v6", .data = &board_W3400V6, }, ++ { .compatible = "nucom,r5010un-v2", .data = &board_R5010UNV2, }, ++ { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, }, ++ { .compatible = "sercomm,ad1018", .data = &board_AD1018, }, ++ { .compatible = "sercomm,ad1018-nor", .data = &board_AD1018, }, ++ { .compatible = "technicolor,tg582n", .data = &board_TG582N, }, ++ { .compatible = "technicolor,tg582n-telecom-italia", .data = &board_TG582N_TELECOM_ITALIA, }, + #endif /* CONFIG_BCM63XX_CPU_6328 */ + #ifdef CONFIG_BCM63XX_CPU_6338 + { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },