X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Fbrcm2708%2Fpatches-4.19%2F950-0290-bcm2835-dma-Add-support-for-per-channel-flags.patch;fp=target%2Flinux%2Fbrcm2708%2Fpatches-4.19%2F950-0290-bcm2835-dma-Add-support-for-per-channel-flags.patch;h=ff564390cff07e1784097f560ffad1ca19dbf07d;hb=84d555aa74434392b682fd9eb0fa701c89a046d6;hp=0000000000000000000000000000000000000000;hpb=953973c2991e8640549a55df7a0574a1abac8644;p=openwrt%2Fstaging%2Fchunkeey.git diff --git a/target/linux/brcm2708/patches-4.19/950-0290-bcm2835-dma-Add-support-for-per-channel-flags.patch b/target/linux/brcm2708/patches-4.19/950-0290-bcm2835-dma-Add-support-for-per-channel-flags.patch new file mode 100644 index 0000000000..ff564390cf --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0290-bcm2835-dma-Add-support-for-per-channel-flags.patch @@ -0,0 +1,48 @@ +From 4ebec374d97c0bba1e41558071bfa062894b07a0 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 20 Jul 2018 22:03:41 +0100 +Subject: [PATCH] bcm2835-dma: Add support for per-channel flags + +Add the ability to interpret the high bits of the dreq specifier as +flags to be included in the DMA_CS register. The motivation for this +change is the ability to set the DISDEBUG flag for SD card transfers +to avoid corruption when using the VPU debugger. + +Signed-off-by: Phil Elwell +--- + drivers/dma/bcm2835-dma.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +--- a/drivers/dma/bcm2835-dma.c ++++ b/drivers/dma/bcm2835-dma.c +@@ -146,6 +146,10 @@ struct bcm2835_desc { + #define BCM2835_DMA_S_DREQ BIT(10) /* enable SREQ for source */ + #define BCM2835_DMA_S_IGNORE BIT(11) /* ignore source reads - read 0 */ + #define BCM2835_DMA_BURST_LENGTH(x) ((x & 15) << 12) ++#define BCM2835_DMA_CS_FLAGS(x) (x & (BCM2835_DMA_PRIORITY(15) | \ ++ BCM2835_DMA_PANIC_PRIORITY(15) | \ ++ BCM2835_DMA_WAIT_FOR_WRITES | \ ++ BCM2835_DMA_DIS_DEBUG)) + #define BCM2835_DMA_PER_MAP(x) ((x & 31) << 16) /* REQ source */ + #define BCM2835_DMA_WAIT(x) ((x & 31) << 21) /* add DMA-wait cycles */ + #define BCM2835_DMA_NO_WIDE_BURSTS BIT(26) /* no 2 beat write bursts */ +@@ -461,7 +465,8 @@ static void bcm2835_dma_start_desc(struc + c->desc = d = to_bcm2835_dma_desc(&vd->tx); + + writel(d->cb_list[0].paddr, c->chan_base + BCM2835_DMA_ADDR); +- writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS); ++ writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq), ++ c->chan_base + BCM2835_DMA_CS); + } + + static irqreturn_t bcm2835_dma_callback(int irq, void *data) +@@ -488,7 +493,8 @@ static irqreturn_t bcm2835_dma_callback( + * if this IRQ handler is threaded.) If the channel is finished, it + * will remain idle despite the ACTIVE flag being set. + */ +- writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE, ++ writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE | ++ BCM2835_DMA_CS_FLAGS(c->dreq), + c->chan_base + BCM2835_DMA_CS); + + d = c->desc;