X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Flayerscape%2Fpatches-5.4%2F302-dts-0062-sdk-dts-ls1046frwy-move-dma-coherent-from-soc-to-its.patch;fp=target%2Flinux%2Flayerscape%2Fpatches-5.4%2F302-dts-0062-sdk-dts-ls1046frwy-move-dma-coherent-from-soc-to-its.patch;h=c2e08730b243aedfdd2aae9cf6595763cc5aed48;hb=cddd4591404fb4c53dc0b3c0b15b942cdbed4356;hp=0000000000000000000000000000000000000000;hpb=d1d2c0b5579ea4f69a42246c9318539d61ba1999;p=openwrt%2Fstaging%2Fwigyori.git diff --git a/target/linux/layerscape/patches-5.4/302-dts-0062-sdk-dts-ls1046frwy-move-dma-coherent-from-soc-to-its.patch b/target/linux/layerscape/patches-5.4/302-dts-0062-sdk-dts-ls1046frwy-move-dma-coherent-from-soc-to-its.patch new file mode 100644 index 0000000000..c2e08730b2 --- /dev/null +++ b/target/linux/layerscape/patches-5.4/302-dts-0062-sdk-dts-ls1046frwy-move-dma-coherent-from-soc-to-its.patch @@ -0,0 +1,235 @@ +From 7d5fcedd45e066db0d2735a753a86af31ba44722 Mon Sep 17 00:00:00 2001 +From: Ran Wang +Date: Wed, 29 May 2019 16:18:06 +0800 +Subject: [PATCH] sdk: dts: ls1046frwy move dma-coherent from soc to its child + nodes + +Since SMMU is not supported for SDK version, USB function will down if +still apply property 'dma-coherent' in scope of soc (USB driver is not +ready to support it alone) in SDK device trees, decide to remove it. +And add dma-coherent on other non-USB child nodes under soc. + +Signed-off-by: Ran Wang +--- + .../boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts | 174 +++++++++++++++++++++ + .../boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts | 4 + + 2 files changed, 178 insertions(+) + +--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts +@@ -24,6 +24,8 @@ + }; + + &soc { ++/delete-property/ dma-coherent; ++ + #include "qoriq-dpaa-eth.dtsi" + #include "qoriq-fman3-0-6oh.dtsi" + +@@ -65,3 +67,175 @@ + &fman0 { + compatible = "fsl,fman", "simple-bus"; + }; ++ ++&clockgen { ++ dma-coherent; ++}; ++ ++&scfg { ++ dma-coherent; ++}; ++ ++&crypto { ++ dma-coherent; ++}; ++ ++&dcfg { ++ dma-coherent; ++}; ++ ++&ifc { ++ dma-coherent; ++}; ++ ++&qspi { ++ dma-coherent; ++}; ++ ++&esdhc { ++ dma-coherent; ++}; ++ ++&ddr { ++ dma-coherent; ++}; ++ ++&tmu { ++ dma-coherent; ++}; ++ ++&qman { ++ dma-coherent; ++}; ++ ++&bman { ++ dma-coherent; ++}; ++ ++&bportals { ++ dma-coherent; ++}; ++ ++&qportals { ++ dma-coherent; ++}; ++ ++&dspi { ++ dma-coherent; ++}; ++ ++&i2c0 { ++ dma-coherent; ++}; ++ ++&i2c1 { ++ dma-coherent; ++}; ++ ++&i2c2 { ++ dma-coherent; ++}; ++ ++&i2c3 { ++ dma-coherent; ++}; ++ ++&duart0 { ++ dma-coherent; ++}; ++ ++&duart1 { ++ dma-coherent; ++}; ++ ++&duart2 { ++ dma-coherent; ++}; ++ ++&duart3 { ++ dma-coherent; ++}; ++ ++&gpio0 { ++ dma-coherent; ++}; ++ ++&gpio1 { ++ dma-coherent; ++}; ++ ++&gpio2 { ++ dma-coherent; ++}; ++ ++&gpio3 { ++ dma-coherent; ++}; ++ ++&lpuart0 { ++ dma-coherent; ++}; ++ ++&lpuart1 { ++ dma-coherent; ++}; ++ ++&lpuart2 { ++ dma-coherent; ++}; ++ ++&lpuart3 { ++ dma-coherent; ++}; ++ ++&lpuart4 { ++ dma-coherent; ++}; ++ ++&lpuart5 { ++ dma-coherent; ++}; ++ ++&ftm0 { ++ dma-coherent; ++}; ++ ++&wdog0 { ++ dma-coherent; ++}; ++ ++&edma0 { ++ dma-coherent; ++}; ++ ++&sata { ++ dma-coherent; ++}; ++ ++&qdma { ++ dma-coherent; ++}; ++ ++&msi1 { ++ dma-coherent; ++}; ++ ++&msi2 { ++ dma-coherent; ++}; ++ ++&msi3 { ++ dma-coherent; ++}; ++ ++&fman0 { ++ dma-coherent; ++}; ++ ++&ptp_timer0 { ++ dma-coherent; ++}; ++ ++&fsldpaa { ++ dma-coherent; ++}; +--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts +@@ -14,6 +14,7 @@ + fsl,bpid = <7>; + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>; + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>; ++ dma-coherent; + }; + + bp8: buffer-pool@8 { +@@ -21,6 +22,7 @@ + fsl,bpid = <8>; + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; ++ dma-coherent; + }; + + bp9: buffer-pool@9 { +@@ -28,10 +30,12 @@ + fsl,bpid = <9>; + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; ++ dma-coherent; + }; + + fsl,dpaa { + compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus"; ++ dma-coherent; + + ethernet@0 { + compatible = "fsl,dpa-ethernet-init";