X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Fmediatek%2Fpatches-4.14%2F0155-mmc-mediatek-add-busy_check-support.patch;fp=target%2Flinux%2Fmediatek%2Fpatches-4.14%2F0155-mmc-mediatek-add-busy_check-support.patch;h=1e7aa7e7d79f4ae3eddc93ac94dc220140c9aa55;hb=050da2107a7eb2a571a8a3d0cee21cc6a44b72b8;hp=0000000000000000000000000000000000000000;hpb=4f67c1522d92bc4512c3ecf58c38ff9886530b48;p=openwrt%2Fstaging%2Fchunkeey.git

diff --git a/target/linux/mediatek/patches-4.14/0155-mmc-mediatek-add-busy_check-support.patch b/target/linux/mediatek/patches-4.14/0155-mmc-mediatek-add-busy_check-support.patch
new file mode 100644
index 0000000000..1e7aa7e7d7
--- /dev/null
+++ b/target/linux/mediatek/patches-4.14/0155-mmc-mediatek-add-busy_check-support.patch
@@ -0,0 +1,72 @@
+From 788d269aee4c612d5cd97b896ea5d22f19137097 Mon Sep 17 00:00:00 2001
+From: Chaotian Jing <chaotian.jing@mediatek.com>
+Date: Mon, 16 Oct 2017 09:46:34 +0800
+Subject: [PATCH 155/224] mmc: mediatek: add busy_check support
+
+bit7 of PATCH_BIT1 has different meaning in new design, to
+compatible with previous platform, clear this bit in new
+platform.
+
+Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
+Tested-by: Sean Wang <sean.wang@mediatek.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+---
+ drivers/mmc/host/mtk-sd.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
+index 8113bacc1540..eceaee86ba4d 100644
+--- a/drivers/mmc/host/mtk-sd.c
++++ b/drivers/mmc/host/mtk-sd.c
+@@ -316,6 +316,7 @@ struct mtk_mmc_compatible {
+ 	u32 pad_tune_reg;
+ 	bool async_fifo;
+ 	bool data_tune;
++	bool busy_check;
+ };
+ 
+ struct msdc_tune_para {
+@@ -380,6 +381,7 @@ static const struct mtk_mmc_compatible mt8135_compat = {
+ 	.pad_tune_reg = MSDC_PAD_TUNE,
+ 	.async_fifo = false,
+ 	.data_tune = false,
++	.busy_check = false,
+ };
+ 
+ static const struct mtk_mmc_compatible mt8173_compat = {
+@@ -388,6 +390,7 @@ static const struct mtk_mmc_compatible mt8173_compat = {
+ 	.pad_tune_reg = MSDC_PAD_TUNE,
+ 	.async_fifo = false,
+ 	.data_tune = false,
++	.busy_check = false,
+ };
+ 
+ static const struct mtk_mmc_compatible mt2701_compat = {
+@@ -396,6 +399,7 @@ static const struct mtk_mmc_compatible mt2701_compat = {
+ 	.pad_tune_reg = MSDC_PAD_TUNE0,
+ 	.async_fifo = true,
+ 	.data_tune = true,
++	.busy_check = false,
+ };
+ 
+ static const struct mtk_mmc_compatible mt2712_compat = {
+@@ -404,6 +408,7 @@ static const struct mtk_mmc_compatible mt2712_compat = {
+ 	.pad_tune_reg = MSDC_PAD_TUNE0,
+ 	.async_fifo = true,
+ 	.data_tune = true,
++	.busy_check = true,
+ };
+ 
+ static const struct of_device_id msdc_of_ids[] = {
+@@ -1275,6 +1280,8 @@ static void msdc_init_hw(struct msdc_host *host)
+ 	sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
+ 	writel(0xffff4089, host->base + MSDC_PATCH_BIT1);
+ 	sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL);
++	if (host->dev_comp->busy_check)
++		sdr_clr_bits(host->base + MSDC_PATCH_BIT1, (1 << 7));
+ 	if (host->dev_comp->async_fifo) {
+ 		sdr_set_field(host->base + MSDC_PATCH_BIT2,
+ 			      MSDC_PB2_RESPWAIT, 3);
+-- 
+2.11.0
+