ar71xx: Remove TX/RX delay from pll_1000 for OM5P-AN
authorFelix Fietkau <nbd@openwrt.org>
Mon, 20 Apr 2015 15:00:20 +0000 (15:00 +0000)
committerFelix Fietkau <nbd@openwrt.org>
Mon, 20 Apr 2015 15:00:20 +0000 (15:00 +0000)
commit5c6925a23b84430782ab84eac75ade065c6adbb3
tree345d0467c4fe510e76e8d902cf77a187e3c7d856
parente2e2fb168b33c24e61e01e7a2697c035a94ca7b9
ar71xx: Remove TX/RX delay from pll_1000 for OM5P-AN

The tx/rx delay bits in the ETH_XMII_CONTROL register have to be unset when the
enable_rgmii_rx_delay/enable_rgmii_tx_delay will be set in the AT803x PHY.
Othwise the throughput in gigabit mode is heavily reduced.

Signed-off-by: Sven Eckelmann <sven@open-mesh.org>
SVN-Revision: 45521
target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c