ar71xx: move ar724x_pci_* helpers to ar724x-pci.c

SVN-Revision: 20282

diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
index 8ac5598ce3b3b015fe93e1546f18433ba5e2a463..31d2fd8e4d4d84cb6cfb1f2e2bb71be9835aac16 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
+++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
@@ -356,36 +356,6 @@ void ar71xx_ddr_flush(u32 reg);
 
 #define AR724X_PCI_INT_DEV0            BIT(14)
 
-static inline void ar724x_pci_wr(unsigned reg, u32 val)
-{
-       void __iomem *base;
-
-       base = ioremap_nocache(AR724X_PCI_CTRL_BASE, AR724X_PCI_CTRL_SIZE);
-       __raw_writel(val, base + reg);
-       (void) __raw_readl(base + reg);
-       iounmap(base);
-}
-
-static inline void ar724x_pci_wr_nf(unsigned reg, u32 val)
-{
-       void __iomem *base;
-
-       base = ioremap_nocache(AR724X_PCI_CTRL_BASE, AR724X_PCI_CTRL_SIZE);
-       __raw_writel(val, base + reg);
-       iounmap(base);
-}
-
-static inline u32 ar724x_pci_rr(unsigned reg)
-{
-       void __iomem *base;
-       u32 ret;
-
-       base = ioremap_nocache(AR724X_PCI_CTRL_BASE, AR724X_PCI_CTRL_SIZE);
-       ret = __raw_readl(base + reg);
-       iounmap(base);
-       return ret;
-}
-
 /*
  * RESET block
  */

diff --git a/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c b/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c
index 617d1eb8bf861d07f727423584ed5bb39d8b7749..9d37561aa03250c59fa7e81e541255e8616eee27 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c
+++ b/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c
@@ -34,6 +34,36 @@ static int ar724x_pci_fixup_enable;
 
 static DEFINE_SPINLOCK(ar724x_pci_lock);
 
+static inline void ar724x_pci_wr(unsigned reg, u32 val)
+{
+       void __iomem *base;
+
+       base = ioremap_nocache(AR724X_PCI_CTRL_BASE, AR724X_PCI_CTRL_SIZE);
+       __raw_writel(val, base + reg);
+       (void) __raw_readl(base + reg);
+       iounmap(base);
+}
+
+static inline void ar724x_pci_wr_nf(unsigned reg, u32 val)
+{
+       void __iomem *base;
+
+       base = ioremap_nocache(AR724X_PCI_CTRL_BASE, AR724X_PCI_CTRL_SIZE);
+       __raw_writel(val, base + reg);
+       iounmap(base);
+}
+
+static inline u32 ar724x_pci_rr(unsigned reg)
+{
+       void __iomem *base;
+       u32 ret;
+
+       base = ioremap_nocache(AR724X_PCI_CTRL_BASE, AR724X_PCI_CTRL_SIZE);
+       ret = __raw_readl(base + reg);
+       iounmap(base);
+       return ret;
+}
+
 static void ar724x_pci_read(void __iomem *base, int where, int size, u32 *value)
 {
        unsigned long flags;