--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ compatible = "oraybox,x1", "mediatek,mt7628an-soc";
+ model = "OrayBox X1";
+
+ aliases {
+ led-boot = &led_status_white;
+ led-failsafe = &led_status_red;
+ led-running = &led_status_white;
+ led-upgrade = &led_status_red;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_status_blue: status-blue {
+ label = "blue:status";
+ gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
+ };
+
+ led_status_red: status-red {
+ label = "red:status";
+ gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ led_status_white: status-white {
+ label = "white:status";
+ gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0 0x30000>;
+ read-only;
+ };
+
+ partition@30000 {
+ label = "kpanic";
+ reg = <0x30000 0x10000>;
+ read-only;
+ };
+
+ partition@40000 {
+ label = "factory";
+ reg = <0x40000 0x10000>;
+ read-only;
+ };
+
+ partition@50000 {
+ compatible = "denx,uimage";
+ label = "firmware";
+ reg = <0x50000 0xf00000>;
+ };
+
+ bdinfo: partition@fe0000 {
+ label = "bdinfo";
+ reg = <0xfe0000 0x10000>;
+ read-only;
+ };
+
+ partition@ff0000 {
+ label = "reserve";
+ reg = <0xff0000 0x10000>;
+ read-only;
+ };
+ };
+ };
+};
+
+&state_default {
+ gpio {
+ groups = "jtag", "wdt";
+ function = "gpio";
+ };
+};
+
+ðernet {
+ nvmem-cells = <&macaddr_bdinfo_9>;
+ nvmem-cell-names = "mac-address";
+};
+
+&wmac {
+ status = "okay";
+};
+
+&bdinfo {
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_bdinfo_9: macaddr@9 {
+ reg = <0x9 0x6>;
+ };
+};