mediatek/filogic: add OpenWrt One support
authorJohn Crispin <john@phrozen.org>
Thu, 4 Apr 2024 20:38:50 +0000 (22:38 +0200)
committerJohn Crispin <john@phrozen.org>
Tue, 21 May 2024 08:40:20 +0000 (10:40 +0200)
filogic: Add support for D-Link AQUILA PRO AI M30

Specification:
 - MT7981 CPU using 2.4GHz and 5GHz WiFi (both AX)
 - 1GB RAM
 - 16MB NOR
 - 128MB NAND
 - 3 LEDs (red, green, blue, white)
 - 2 buttons (reset, user defined)
 - 1 2.5Gbit WAN port (Airoha EN8811h)
 - 1 1Gbit LAN ports
 - 1 single lane M.2 SSD slot
 - 1 mikroBus socket
 - externel HW WDT (25s refresh time)
 - i2c RTC (with battery backup)

Serial Interface
 - UBS-C CDC-ACM
 - 3 Pins GND, RX, TX
 - Settings: 115200, 8N1

MAC addresses are not populated on the early samples.

Signed-off-by: John Crispin <john@phrozen.org>
target/linux/mediatek/dts/mt7981b-openwrt-one.dts [new file with mode: 0644]
target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
target/linux/mediatek/filogic/base-files/etc/board.d/02_network
target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata
target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
target/linux/mediatek/image/filogic.mk

diff --git a/target/linux/mediatek/dts/mt7981b-openwrt-one.dts b/target/linux/mediatek/dts/mt7981b-openwrt-one.dts
new file mode 100644 (file)
index 0000000..b2223f8
--- /dev/null
@@ -0,0 +1,457 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+/dts-v1/;
+#include "mt7981.dtsi"
+
+/ {
+       model = "OpenWrt One";
+       compatible = "openwrt,one", "mediatek,mt7981";
+
+       aliases {
+               ethernet0 = &gmac0;
+               ethernet1 = &gmac1;
+               serial0 = &uart0;
+               led-boot = &led_status_white;
+               led-failsafe = &led_status_red;
+               led-running = &led_status_green;
+               led-upgrade = &led_status_green;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+               rootdisk = <&ubi_fit_volume>;
+       };
+
+       memory {
+               reg = <0 0x40000000 0 0x40000000>;
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_5v: regulator-5v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-5V";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+
+               user {
+                       label = "user";
+                       linux,code = <BTN_0>;
+                       gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
+               };
+
+               reset {
+                       label = "reset";
+                       linux,code = <KEY_RESTART>;
+                       gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+               };
+       };
+
+       pwm-leds {
+               compatible = "pwm-leds";
+
+               led_status_white: led-0 {
+                       color = <LED_COLOR_ID_WHITE>;
+                       function = LED_FUNCTION_STATUS;
+                       pwms = <&pwm 0 10000>;
+                       linux,default-trigger = "pattern";
+                       led-pattern = <0 500 25 500>;
+               };
+
+               led_status_green: led-1 {
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_STATUS;
+                       pwms = <&pwm 1 10000>;
+               };
+       };
+
+       gpio-leds {
+               compatible = "gpio-leds";
+
+               led_status_red: led-0 {
+                       color = <LED_COLOR_ID_RED>;
+                       function = LED_FUNCTION_STATUS;
+                       gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               led-1 {
+                       function = LED_FUNCTION_LAN;
+                       color = <LED_COLOR_ID_AMBER>;
+                       gpios = <&pio 34 GPIO_ACTIVE_LOW>;
+               };
+
+               led-2 {
+                       function = LED_FUNCTION_LAN;
+                       color = <LED_COLOR_ID_GREEN>;
+                       gpios = <&pio 35 GPIO_ACTIVE_LOW>;
+               };
+       };
+
+       gpio-export {
+               compatible = "gpio-export";
+
+                gpio-0 {
+                       gpio-export,name = "mikrobus-reset";
+                       gpio-export,output = <1>;
+                       gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
+               };
+
+               gpio-1 {
+                       gpio-export,name = "watchdog-enable";
+                       gpio-export,output = <1>;
+                       gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
+               };
+
+               gpio-2 {
+                       gpio-export,name = "usb-enable";
+                       gpio-export,output = <1>;
+                       gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       gpio-watchdog {
+               compatible = "linux,wdt-gpio";
+               gpios = <&pio 8 GPIO_ACTIVE_LOW>;
+               hw_algo = "toggle";
+               hw_margin_ms = <25000>;
+               always-running;
+       };
+};
+
+&eth {
+       status = "okay";
+
+       gmac0: mac@0 {
+               compatible = "mediatek,eth-mac";
+               reg = <0>;
+               phy-handle = <&phy15>;
+               phy-mode = "2500base-x";
+               nvmem-cell-names = "mac-address";
+               nvmem-cells = <&macaddr_factory_4>;
+       };
+
+       gmac1: mac@1 {
+               compatible = "mediatek,eth-mac";
+               reg = <1>;
+               phy-mode = "gmii";
+               phy-handle = <&int_gbe_phy>;
+               nvmem-cell-names = "mac-address";
+               nvmem-cells = <&macaddr_factory_a>;
+       };
+};
+
+&mdio_bus {
+       phy15: phy@f {
+               reg = <0xf>;
+
+               airoha,pnswap-rx;
+
+               interrupt-parent = <&pio>;
+               interrupts = <38 IRQ_TYPE_EDGE_FALLING>;
+               reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
+               reset-assert-us = <10000>;
+               reset-deassert-us = <20000>;
+
+               phy-mode = "2500base-x";
+               full-duplex;
+               pause;
+
+               leds {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       led@0 {
+                               reg = <0>;
+                               function = LED_FUNCTION_WAN;
+                               color = <LED_COLOR_ID_AMBER>;
+                       };
+
+                       led@1 {
+                               reg = <1>;
+                               function = LED_FUNCTION_WAN;
+                               color = <LED_COLOR_ID_GREEN>;
+                       };
+               };
+       };
+};
+
+&crypto {
+       status = "okay";
+};
+
+&pio {
+       spi0_flash_pins: spi0-pins {
+               mux {
+                       function = "spi";
+                       groups = "spi0", "spi0_wp_hold";
+               };
+
+               conf-pu {
+                       pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+                       drive-strength = <MTK_DRIVE_8mA>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+               };
+
+               conf-pd {
+                       pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+                       drive-strength = <MTK_DRIVE_8mA>;
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+               };
+       };
+
+       spi1_flash_pins: spi1-pins {
+               mux {
+                       function = "spi";
+                       groups = "spi1_1";
+               };
+
+               conf-pu {
+                       pins = "SPI1_CS";
+                       drive-strength = <MTK_DRIVE_8mA>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+               };
+
+               conf-pd {
+                       pins = "SPI1_CLK", "SPI1_MOSI", "SPI1_MISO";
+                       drive-strength = <MTK_DRIVE_8mA>;
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+               };
+       };
+
+       spi2_flash_pins: spi2-pins {
+               mux {
+                       function = "spi";
+                       groups = "spi2";
+               };
+
+               conf-pu {
+                       pins = "SPI2_CS", "SPI2_WP";
+                       drive-strength = <MTK_DRIVE_8mA>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+               };
+
+               conf-pd {
+                       pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
+                       drive-strength = <MTK_DRIVE_8mA>;
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+               };
+       };
+
+       i2c_pins: i2c-pins {
+               mux {
+                       function = "i2c";
+                       groups = "i2c0_0";
+               };
+       };
+
+       uart2_pins: uart2-pins {
+               mux {
+                       function = "uart";
+                       groups = "uart2_0_tx_rx";
+               };
+       };
+
+       pwm_pins: pwm-pins {
+               mux {
+                       function = "pwm";
+                       groups = "pwm0_0", "pwm1_1";
+               };
+       };
+
+       pcie_pins: pcie-pins {
+               mux {
+                       function = "pcie";
+                       groups = "pcie_pereset";
+               };
+       };
+};
+
+&pwm {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pwm_pins>;
+       status = "okay";
+};
+
+&i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c_pins>;
+       status = "okay";
+
+       rtc@51 {
+               compatible = "nxp,pcf8563";
+               reg = <0x51>;
+       };
+};
+
+&spi0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi0_flash_pins>;
+       cs-gpios = <0>, <0>;
+       #address-cells = <1>;
+       #size-cells = <0>;
+       status = "okay";
+
+       flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-nand";
+               reg = <1>;
+               spi-max-frequency = <52000000>;
+
+               spi-cal-enable;
+               spi-cal-mode = "read-data";
+               spi-cal-datalen = <7>;
+               spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
+               spi-cal-addrlen = <5>;
+               spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "bl2";
+                               reg = <0x0 0x100000>;
+                               read-only;
+                       };
+
+                       partition@580000 {
+                               label = "ubi";
+                               reg = <0x100000 0x7F00000>;
+                               compatible = "linux,ubi";
+
+                               volumes {
+                                       ubi_fit_volume: ubi-volume-fit {
+                                               volname = "fit";
+                                       };
+                               };
+                       };
+               };
+       };
+};
+
+&spi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi1_flash_pins>;
+       status = "okay";
+};
+
+&spi2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi2_flash_pins>;
+       status = "okay";
+
+       flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+
+               spi-max-frequency = <52000000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "bl2-nor";
+                               reg = <0x00000 0x40000>;
+                       };
+
+                       partition@40000 {
+                               label = "factory";
+                               reg = <0x40000 0xc0000>;
+                               read-only;
+
+                               nvmem-layout {
+                                       compatible = "fixed-layout";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       eeprom_factory_0: eeprom@0 {
+                                               reg = <0x0 0x1000>;
+                                       };
+
+                                       macaddr_factory_4: macaddr@4 {
+                                               compatible = "mac-base";
+                                               reg = <0x24 0x6>;
+                                               #nvmem-cell-cells = <1>;
+                                       };
+
+                                       macaddr_factory_a: macaddr@a {
+                                               compatible = "mac-base";
+                                               reg = <0x2a 0x6>;
+                                               #nvmem-cell-cells = <1>;
+                                       };
+                               };
+                       };
+
+                       partition@100000 {
+                               label = "fip-nor";
+                               reg = <0x100000 0x80000>;
+                       };
+
+                       partition@180000 {
+                               label = "recovery";
+                               reg = <0x180000 0xc80000>;
+                       };
+               };
+       };
+};
+
+&xhci {
+       phys = <&u2port0 PHY_TYPE_USB2>;
+       vusb33-supply = <&reg_3p3v>;
+       vbus-supply = <&reg_5v>;
+       mediatek,u3p-dis-msk = <0x01>;
+       status = "okay";
+};
+
+&uart0 {
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins>;
+       status = "okay";
+};
+
+&usb_phy {
+       status = "okay";
+};
+
+&watchdog {
+       status = "okay";
+};
+
+&wifi {
+       nvmem-cells = <&eeprom_factory_0>;
+       nvmem-cell-names = "eeprom";
+       status = "okay";
+};
+
+&pcie {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie_pins>;
+       status = "okay";
+};
+
+&sgmiisys0 {
+       /delete-node/ mediatek,pnswap;
+};
index b5a25546717acdeab83e0cf91ecd1bdc5d94c736..ec239cb0cf06375badd148d88a2862ddbc178834 100644 (file)
@@ -59,6 +59,12 @@ openembed,som7981)
        ucidef_set_led_netdev "lanact" "LANACT" "green:lan" "eth1" "rx tx"
        ucidef_set_led_netdev "lanlink" "LANLINK" "amber:lan" "eth1" "link"
        ;;
+openwrt,one)
+       ucidef_set_led_netdev "wanact" "WANACT" "mdio-bus:0f:green:wan" "eth0" "rx tx"
+       ucidef_set_led_netdev "wanlink" "WANLINK" "mdio-bus:0f:amber:wan" "eth0" "link"
+       ucidef_set_led_netdev "lanact" "LANACT" "green:lan" "eth1" "rx tx"
+       ucidef_set_led_netdev "lanlink" "LANLINK" "amber:lan" "eth1" "link"
+       ;;
 routerich,ax3000)
        ucidef_set_led_netdev "lan-1" "lan-1" "blue:lan-1" "lan1" "link tx rx"
        ucidef_set_led_netdev "lan-2" "lan-2" "blue:lan-2" "lan2" "link tx rx"
index 4de3cf044d145f86f98a6c5098797bf2f72b6257..fc4bc07b2f8599a0a8670d444063009ca778c3c2 100644 (file)
@@ -59,7 +59,8 @@ mediatek_setup_interfaces()
        glinet,gl-mt3000|\
        glinet,gl-x3000|\
        glinet,gl-xe3000|\
-       openembed,som7981)
+       openembed,som7981|\
+       openwrt,one)
                ucidef_set_interfaces_lan_wan eth1 eth0
                ;;
        dlink,aquila-pro-ai-m30-a1)
index bd68ef74156921380f0aca4dbcf0e9197aeb2a5e..27a16e0fb79e22dff9550010bc006eb99ad6d120 100644 (file)
@@ -31,6 +31,9 @@ case "$FIRMWARE" in
                        ;;
                esac
                ;;
+       openwrt,one)
+               caldata_extract "factory" 0x0 0x1000
+               ;;
        ubnt,unifi-6-plus)
                caldata_extract_mmc "factory" 0x0 0x1000
                ;;
index e7b347dc5f9828c75e6a9be50daa92b0dad89346..9b46111d33b2b6f7c1ee85e4f26fc83821dccd84 100755 (executable)
@@ -86,6 +86,7 @@ platform_do_upgrade() {
        bananapi,bpi-r4-poe|\
        mediatek,mt7988a-rfb|\
        jdcloud,re-cp-03|\
+       openwrt,one|\
        tplink,tl-xdr4288|\
        tplink,tl-xdr6086|\
        tplink,tl-xdr6088|\
index 5c2f67eb992a12a98017d7bac5736b038befcf99..e85d67f2ae7c4026be1c1e857eebe5bcceaaa0b8 100644 (file)
@@ -951,6 +951,54 @@ define Device/openembed_som7981
 endef
 TARGET_DEVICES += openembed_som7981
 
+define Build/append-openwrt-one-eeprom
+        dd if=$(STAGING_DIR_IMAGE)/mt7981_eeprom_mt7976_dbdc.bin >> $@
+endef
+
+define Device/openwrt_one
+  DEVICE_VENDOR := OpenWrt
+  DEVICE_MODEL := One
+  DEVICE_DTS := mt7981b-openwrt-one
+  DEVICE_DTS_DIR := ../dts
+  DEVICE_DTC_FLAGS := --pad 4096
+  DEVICE_DTS_LOADADDR := 0x43f00000
+  DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware kmod-rtc-pcf8563 kmod-usb3 kmod-nvme kmod-phy-airoha-en8811h
+  KERNEL_LOADADDR := 0x44000000
+  KERNEL := kernel-bin | gzip
+  KERNEL_INITRAMFS := kernel-bin | lzma | \
+       fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
+  KERNEL_INITRAMFS_SUFFIX := .itb
+  KERNEL_IN_UBI := 1
+  UBOOTENV_IN_UBI := 1
+  IMAGES := sysupgrade.itb
+  IMAGE_SIZE := $$(shell expr 64 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m
+  IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-with-rootfs | pad-rootfs | append-metadata
+  ARTIFACTS := \
+       nor-preloader.bin nor-bl31-uboot.fip \
+       snand-preloader.bin snand-bl31-uboot.fip \
+       factory.ubi snand-factory.bin nor-factory.bin
+  ARTIFACT/nor-preloader.bin           := mt7981-bl2 nor-ddr4
+  ARTIFACT/nor-bl31-uboot.fip          := mt7981-bl31-uboot openwrt_one-nor
+  ARTIFACT/snand-preloader.bin         := mt7981-bl2 spim-nand-ubi-ddr4
+  ARTIFACT/snand-bl31-uboot.fip                := mt7981-bl31-uboot openwrt_one-snand
+  ARTIFACT/factory.ubi                 := ubinize-image fit squashfs-sysupgrade.itb
+  ARTIFACT/snand-factory.bin           := mt7981-bl2 spim-nand-ubi-ddr4 | pad-to 256k | \
+                                          mt7981-bl2 spim-nand-ubi-ddr4 | pad-to 512k | \
+                                          mt7981-bl2 spim-nand-ubi-ddr4 | pad-to 768k | \
+                                          mt7981-bl2 spim-nand-ubi-ddr4 | pad-to 1024k | \
+                                          ubinize-image fit squashfs-sysupgrade.itb
+  ARTIFACT/nor-factory.bin             := mt7981-bl2 nor-ddr4 | pad-to 256k | \
+                                          append-openwrt-one-eeprom | pad-to 1024k | \
+                                          mt7981-bl31-uboot openwrt_one-nor | pad-to 512k | \
+                                          append-image-stage initramfs.itb
+  UBINIZE_OPTS := -E 5
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  UBINIZE_PARTS := fip=:$(STAGING_DIR_IMAGE)/mt7981_openwrt_one-snand-u-boot.fip recovery=:$(KDIR)/tmp/openwrt-mediatek-filogic-openwrt_one-initramfs.itb \
+                  $(if $(wildcard $(TOPDIR)/openwrt-mediatek-filogic-openwrt_one-calibration.itb), calibration=:$(TOPDIR)/openwrt-mediatek-filogic-openwrt_one-calibration.itb)
+endef
+TARGET_DEVICES += openwrt_one
+
 define Device/qihoo_360t7
   DEVICE_VENDOR := Qihoo
   DEVICE_MODEL := 360T7