ar71xx: fix trailing statements location
authorGabor Juhos <juhosg@openwrt.org>
Fri, 12 Nov 2010 18:50:47 +0000 (18:50 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Fri, 12 Nov 2010 18:50:47 +0000 (18:50 +0000)
Signed-off-by: Arnaud Lacombe <lacombar@gmail.com>
SVN-Revision: 23976

target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c
target/linux/ar71xx/files/arch/mips/ar71xx/early_printk.c

index 5d05562de0e75b586c6517ae5fd741e316b05c16..6c88985ccf9736c7e9a8aaf15c3484a761c04420 100644 (file)
@@ -157,10 +157,12 @@ EXPORT_SYMBOL_GPL(ar71xx_device_stopped);
 void ar71xx_ddr_flush(u32 reg)
 {
        ar71xx_ddr_wr(reg, 1);
-       while ((ar71xx_ddr_rr(reg) & 0x1));
+       while ((ar71xx_ddr_rr(reg) & 0x1))
+               ;
 
        ar71xx_ddr_wr(reg, 1);
-       while ((ar71xx_ddr_rr(reg) & 0x1));
+       while ((ar71xx_ddr_rr(reg) & 0x1))
+               ;
 }
 EXPORT_SYMBOL_GPL(ar71xx_ddr_flush);
 
index 4661d970b0f377b2db2d7aa0c36ee3e946d9cb7f..76f69c562b8c4d563e95938376854cc6e82427a2 100644 (file)
 
 void prom_putchar(unsigned char ch)
 {
-       while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
+       while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0)
+               ;
        UART_WRITE(UART_TX, ch);
-       while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
+       while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0)
+               ;
 }