--- /dev/null
+From 0501f2e5ff28a02295e42fc9e7164a20ef4c30d5 Mon Sep 17 00:00:00 2001
+From: Andreas Fenkart <afenkart@gmail.com>
+Date: Thu, 5 Nov 2015 10:04:23 +0100
+Subject: [PATCH] mtd: spi-nor: mx25l3205d/mx25l6405d: append SECT_4K
+
+according datasheet both chips can erase 4kByte sectors individually
+
+Signed-off-by: Andreas Fenkart <andreas.fenkart@dev.digitalstrom.org>
+Signed-off-by: Brian Norris <computersforpeace@gmail.com>
+---
+ drivers/mtd/spi-nor/spi-nor.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/mtd/spi-nor/spi-nor.c
++++ b/drivers/mtd/spi-nor/spi-nor.c
+@@ -715,9 +715,9 @@ static const struct flash_info spi_nor_i
+ { "mx25l4005a", INFO(0xc22013, 0, 64 * 1024, 8, SECT_4K) },
+ { "mx25l8005", INFO(0xc22014, 0, 64 * 1024, 16, 0) },
+ { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) },
+- { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, 0) },
++ { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) },
+ { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) },
+- { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, 0) },
++ { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
+ { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
+ { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
+ { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
}
/*
-@@ -716,9 +849,9 @@ static const struct flash_info spi_nor_i
- { "mx25l4005a", INFO(0xc22013, 0, 64 * 1024, 8, SECT_4K) },
- { "mx25l8005", INFO(0xc22014, 0, 64 * 1024, 16, 0) },
- { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) },
-- { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, 0) },
-+ { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) },
- { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) },
-- { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, 0) },
-+ { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
- { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
- { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
- { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
-@@ -733,8 +866,8 @@ static const struct flash_info spi_nor_i
+@@ -735,8 +868,8 @@ static const struct flash_info spi_nor_i
{ "n25q032a", INFO(0x20bb16, 0, 64 * 1024, 64, SPI_NOR_QUAD_READ) },
{ "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_QUAD_READ) },
{ "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_QUAD_READ) },
{ "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ) },
{ "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
{ "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
-@@ -768,6 +901,7 @@ static const struct flash_info spi_nor_i
+@@ -770,6 +903,7 @@ static const struct flash_info spi_nor_i
{ "s25fl008k", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "s25fl016k", INFO(0xef4015, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "s25fl064k", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) },
{ "s25fl132k", INFO(0x014016, 0, 64 * 1024, 64, SECT_4K) },
{ "s25fl164k", INFO(0x014017, 0, 64 * 1024, 128, SECT_4K) },
{ "s25fl204k", INFO(0x014013, 0, 64 * 1024, 8, SECT_4K | SPI_NOR_DUAL_READ) },
-@@ -831,11 +965,23 @@ static const struct flash_info spi_nor_i
+@@ -833,11 +967,23 @@ static const struct flash_info spi_nor_i
{ "w25x16", INFO(0xef3015, 0, 64 * 1024, 32, SECT_4K) },
{ "w25x32", INFO(0xef3016, 0, 64 * 1024, 64, SECT_4K) },
{ "w25q32", INFO(0xef4016, 0, 64 * 1024, 64, SECT_4K) },
{ "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) },
{ "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) },
{ "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
-@@ -858,7 +1004,7 @@ static const struct flash_info *spi_nor_
+@@ -860,7 +1006,7 @@ static const struct flash_info *spi_nor_
tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
if (tmp < 0) {
return ERR_PTR(tmp);
}
-@@ -869,7 +1015,7 @@ static const struct flash_info *spi_nor_
+@@ -871,7 +1017,7 @@ static const struct flash_info *spi_nor_
return &spi_nor_ids[tmp];
}
}
id[0], id[1], id[2]);
return ERR_PTR(-ENODEV);
}
-@@ -1015,6 +1161,8 @@ static int macronix_quad_enable(struct s
+@@ -1017,6 +1163,8 @@ static int macronix_quad_enable(struct s
int ret, val;
val = read_sr(nor);
write_enable(nor);
write_sr(nor, val | SR_QUAD_EN_MX);
-@@ -1096,7 +1244,7 @@ static int set_quad_mode(struct spi_nor
+@@ -1098,7 +1246,7 @@ static int set_quad_mode(struct spi_nor
static int spi_nor_check(struct spi_nor *nor)
{
if (!nor->dev || !nor->read || !nor->write ||
pr_err("spi-nor: please fill all the necessary fields!\n");
return -EINVAL;
}
-@@ -1109,7 +1257,7 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -1111,7 +1259,7 @@ int spi_nor_scan(struct spi_nor *nor, co
const struct flash_info *info = NULL;
struct device *dev = nor->dev;
struct mtd_info *mtd = &nor->mtd;
int ret;
int i;
-@@ -1159,9 +1307,11 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -1161,9 +1309,11 @@ int spi_nor_scan(struct spi_nor *nor, co
if (JEDEC_MFR(info) == SNOR_MFR_ATMEL ||
JEDEC_MFR(info) == SNOR_MFR_INTEL ||
JEDEC_MFR(info) == SNOR_MFR_MACRONIX ||
}
if (!mtd->name)
-@@ -1175,7 +1325,8 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -1177,7 +1327,8 @@ int spi_nor_scan(struct spi_nor *nor, co
mtd->_read = spi_nor_read;
/* NOR protection support for STmicro/Micron chips and similar */
nor->flash_lock = stm_lock;
nor->flash_unlock = stm_unlock;
nor->flash_is_locked = stm_is_locked;
-@@ -1195,6 +1346,8 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -1197,6 +1348,8 @@ int spi_nor_scan(struct spi_nor *nor, co
if (info->flags & USE_FSR)
nor->flags |= SNOR_F_USE_FSR;
#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
/* prefer "small sector" erase if possible */
-@@ -1297,6 +1450,12 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -1299,6 +1452,12 @@ int spi_nor_scan(struct spi_nor *nor, co
nor->addr_width = 3;
}