lantiq: dts: assign the MDIO pins to the gsw node
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Mon, 8 Jul 2019 09:40:25 +0000 (11:40 +0200)
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>
Sun, 22 Dec 2019 00:24:23 +0000 (01:24 +0100)
Assign the MDIO pins to the switch node instead of using pin hogging
(where pins are assigned to the pin controller).
This is the preferred way of assigning pins upstream.

This converts amazonse, ar9 and vr9. danube is skipped because the pin
controller doesn't define a pinmux for the MDIO pins (some of the SoC
pads may be hardwired to the MDIO pins instead of being configurable).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
19 files changed:
target/linux/lantiq/files/arch/mips/boot/dts/ARV7519RW22.dts
target/linux/lantiq/files/arch/mips/boot/dts/ASL56026.dts
target/linux/lantiq/files/arch/mips/boot/dts/BTHOMEHUBV5A.dts
target/linux/lantiq/files/arch/mips/boot/dts/DM200.dts
target/linux/lantiq/files/arch/mips/boot/dts/EASY80920.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/FRITZ3370-REV2.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/FRITZ736X.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/FRITZ7412.dts
target/linux/lantiq/files/arch/mips/boot/dts/P2601HNFX.dts
target/linux/lantiq/files/arch/mips/boot/dts/P2812HNUFX.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/TDW89X0.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/VG3503J.dts
target/linux/lantiq/files/arch/mips/boot/dts/VGV7510KW22.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/VGV7519.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/VR200.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/WBMR300.dts
target/linux/lantiq/files/arch/mips/boot/dts/amazonse.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/ar9.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/vr9.dtsi

index f245fe370b3de665e5f32cea5600232675d699d5..d6c521cfe7e0f9132fc24cd583f48344d71d4191 100644 (file)
        pinctrl-0 = <&state_default>;
 
        state_default: pinmux {
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
                pcie-rst {
                        lantiq,pins = "io21";
                        lantiq,pull = <0>;
index 1c7f03c3554fb5e1339b0c30ea5aa465eccb0353..3d10f582b01fcbdb0e08d09f6778883f21d6425c 100644 (file)
        lantiq,gphy-mode = <GPHY_MODE_FE>;
 };
 
-&gpio {
-       pinctrl-names = "default";
-       pinctrl-0 = <&state_default>;
-
-       state_default: pinmux {
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
-       };
-};
-
 &localbus {
        flash@0 {
                compatible = "lantiq,nor";
index c105f0a9aed616c3cf16d497b8457a04fe80a3b5..186ed37a9cc93f8b70527d22f08d07de7b8c6def 100644 (file)
        pinctrl-0 = <&state_default>;
 
        state_default: pinmux {
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
                pci_rst {
                        lantiq,pins = "io21";
                        lantiq,output = <1>;
index 4796123c2085ec77f11b8b74a6810ecbf6d377ac..362dccfda7f358a5c71ecdd8cfbf18ca4369eaea 100644 (file)
 };
 
 &gpio {
-       pinctrl-names = "default";
-       pinctrl-0 = <&state_default>;
-
-       state_default: pinmux {
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
-       };
-
        pins_spi_default: pins_spi_default {
                spi_in {
                        lantiq,groups = "spi_di";
index b7ccb4ed575fc85d8d6301424dcae4906101a938..d09a9626bb6b495dbf3377722c7561db3e77c31f 100644 (file)
                                        "nand rd", "nand rdy";
                        lantiq,function = "ebu";
                };
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
                pci {
                        lantiq,groups = "gnt1", "req1";
                        lantiq,function = "pci";
index 02e95899697edf3ddd2b1de2e5ddc82f9ac71c76..6790815a24ec8eb13cb10194eb16aa02e5db0191 100644 (file)
        pinctrl-0 = <&state_default>;
 
        state_default: pinmux {
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
-
                nand {
                        lantiq,groups = "nand cle", "nand ale",
                                        "nand rd", "nand cs1", "nand rdy";
index f58a414a28f21b7fa17bb197bf40af3ff5bdcc43..1553d2f7f44924c9f3c737dece3ad3673689b0c2 100644 (file)
        pinctrl-0 = <&state_default>;
 
        state_default: pinmux {
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
-
                phy-rst {
                        lantiq,pins = "io37", "io44";
                        lantiq,pull = <0>;
index ccf61663ba1ea77dbd65e9fc6791d0f745017b5e..04aa99d185732e74e9aa1014c1203d7a7fb73a4b 100644 (file)
        pinctrl-0 = <&state_default>;
 
        state_default: pinmux {
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
                pcie-rst {
                        lantiq,pins = "io11";
                        lantiq,open-drain = <1>;
index 62e5e70169e9a6daed09628ec75d27a25b21a5cd..c238826932efacec4c56c9295b72826f17331470 100644 (file)
                        lantiq,open-drain;
                        lantiq,pull = <0>;
                };
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
        };
 
        usb_vbus: regulator-usb-vbus {
index 9956a5b89fda5ffb7b12cb3132316f72defdb834..274abcc50313d81b5c0c521372300ca7c0dc3518 100644 (file)
                        lantiq,groups = "exin3";
                        lantiq,function = "exin";
                };
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
                gphy-leds {
                        lantiq,groups = "gphy0 led1", "gphy1 led1",
                                        "gphy0 led2", "gphy1 led2";
index 1a7d90a5bf9ec80f0aac9d8e0d4d3a4d30a35d13..00475e734e07f17c45f9c2ad359bf2d9c7008f14 100644 (file)
        pinctrl-0 = <&state_default>;
 
        state_default: pinmux {
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
                gphy-leds {
                        lantiq,groups = "gphy0 led1", "gphy1 led1";
                        lantiq,function = "gphy";
index 2d52176430abc493816048ac1552dd38d1521d4e..f37980a536123a3d1be615a48135fabccedd898c 100644 (file)
        pinctrl-0 = <&state_default>;
 
        state_default: pinmux {
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
                gphy-leds {
                        lantiq,groups = "gphy0 led0", "gphy0 led1",
                                        "gphy0 led2", "gphy1 led0",
index f10a9dd8e6b264530acddf539fe530da5a9e60c9..6dc45f057d987ef82294db45a73c84ee41bcb116 100644 (file)
                        lantiq,pull = <2>;
                        lantiq,output = <1>;
                };
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
                pci-rst {
                        lantiq,pins = "io21";
                        lantiq,open-drain = <0>;
index 0b3e72d3ab8080d7cb5f61cb3af280fdd7aaca3c..e71e3837ea43b3b7e659dd537457fe2b7fdd3d6d 100644 (file)
                        lantiq,output = <1>;
                        lantiq,pull = <0>;
                };
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
                pci-rst {
                        lantiq,pins = "io21";
                        lantiq,open-drain = <0>;
index 3c04785314fa6ce35e0e8c86ab09ddcc4df5f0c6..7fedcee92f5cb73a2d9dd9dd27e84ba5c49230a5 100644 (file)
        pinctrl-0 = <&state_default>;
 
        state_default: pinmux {
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
                gphy-leds {
                        lantiq,groups = "gphy0 led1", "gphy1 led1";
                        lantiq,function = "gphy";
index 48f6dc71a1a3d1af05405a32b5222d1ef848c5f0..7e5f58c71e01cce6943524bbb27d3b604090ab69 100644 (file)
        pinctrl-0 = <&state_default>;
 
        state_default: pinmux {
-               mdio {
-                       lantiq,groups = "mdio";
-                       lantiq,function = "mdio";
-               };
                phy-rst {
                        lantiq,pins = "io42";
                        lantiq,pull = <0>;
index feb4cd529a05ac8259af00caf661811563311a49..33dc5612bf6d1870d868126ad0b2f16ff2f75ce3 100644 (file)
                        #gpio-cells = <2>;
                        gpio-controller;
                        reg = <0xe100b10 0xa0>;
+
+                       mdio_pins: mdio {
+                               mux {
+                                       lantiq,groups = "mdio";
+                                       lantiq,function = "mdio";
+                               };
+                       };
                };
 
                asc1: serial@e100c00 {
                        reg = <0xe180000 0x40000>;
                        interrupt-parent = <&icu0>;
                        interrupts = <105 109>;
+                       pinctrl-0 = <&mdio_pins>;
+                       pinctrl-names = "default";
                };
        };
 
index 37b44aecdd041c6841584e72ba7b52eef7998919..3244908e323ef6bbf2023b19471f69b97d9723f7 100644 (file)
                        #gpio-cells = <2>;
                        gpio-controller;
                        reg = <0xe100b10 0xa0>;
+
+                       mdio_pins: mdio {
+                               mux {
+                                       lantiq,groups = "mdio";
+                                       lantiq,function = "mdio";
+                               };
+                       };
                };
 
                stp: stp@e100bb0 {
                        interrupt-parent = <&icu0>;
                        interrupts = <73 72>;
                        mac-address = [ 00 11 22 33 44 55 ];
+                       pinctrl-0 = <&mdio_pins>;
+                       pinctrl-names = "default";
                };
 
                ppe@e234000 {
index e8b87dbcc7de2fb928a4e602f1a650030d2f7c35..81e2fea54943ad4619b50dbc7214c63e628a467e 100644 (file)
                        #gpio-cells = <2>;
                        gpio-controller;
                        reg = <0xe100b10 0xa0>;
+
+                       mdio_pins: mdio {
+                               mux {
+                                       lantiq,groups = "mdio";
+                                       lantiq,function = "mdio";
+                               };
+                       };
                };
 
                stp: stp@e100bb0 {
                        resets = <&reset0 21 16>, <&reset0 8 8>;
                        reset-names = "switch", "ppe";
                        lantiq,phys = <&gphy0>, <&gphy1>;
+                       pinctrl-0 = <&mdio_pins>;
+                       pinctrl-names = "default";
                };
 
                mei@e116000 {