--- /dev/null
+Index: linux-2.6.24.7/arch/arm/configs/glofiish_defconfig
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/configs/glofiish_defconfig 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,1728 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24
++# Wed Nov 12 00:27:24 2008
++#
++CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_GENERIC_GPIO=y
++# CONFIG_GENERIC_TIME is not set
++# CONFIG_GENERIC_CLOCKEVENTS is not set
++CONFIG_MMU=y
++CONFIG_NO_IOPORT=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_ZONE_DMA=y
++CONFIG_VECTORS_BASE=0xffff0000
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_LOCK_KERNEL=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++# CONFIG_AUDIT is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++# CONFIG_FAIR_GROUP_SCHED is not set
++# CONFIG_SYSFS_DEPRECATED is not set
++# CONFIG_RELAY is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++# CONFIG_EMBEDDED is not set
++CONFIG_UID16=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_SLAB=y
++# CONFIG_SLUB is not set
++# CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODULE_FORCE_UNLOAD=y
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_KMOD=y
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=m
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=m
++# CONFIG_DEFAULT_AS is not set
++CONFIG_DEFAULT_DEADLINE=y
++# CONFIG_DEFAULT_CFQ is not set
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="deadline"
++
++#
++# System Type
++#
++# CONFIG_ARCH_AAEC2000 is not set
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++# CONFIG_ARCH_AT91 is not set
++# CONFIG_ARCH_CLPS7500 is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_CO285 is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IMX is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_L7200 is not set
++# CONFIG_ARCH_KS8695 is not set
++# CONFIG_ARCH_NS9XXX is not set
++# CONFIG_ARCH_MXC is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++CONFIG_ARCH_S3C2410=y
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_LH7A40X is not set
++# CONFIG_ARCH_DAVINCI is not set
++# CONFIG_ARCH_OMAP is not set
++CONFIG_PLAT_S3C24XX=y
++CONFIG_CPU_S3C244X=y
++CONFIG_S3C2410_DMA=y
++# CONFIG_S3C2410_DMA_DEBUG is not set
++CONFIG_MACH_SMDK=y
++CONFIG_PLAT_S3C=y
++CONFIG_CPU_LLSERIAL_S3C2410=y
++CONFIG_CPU_LLSERIAL_S3C2440=y
++
++#
++# Boot options
++#
++# CONFIG_S3C_BOOT_WATCHDOG is not set
++# CONFIG_S3C_BOOT_ERROR_RESET is not set
++
++#
++# Power management
++#
++# CONFIG_S3C2410_PM_CHECK is not set
++CONFIG_S3C_LOWLEVEL_UART_PORT=2
++
++#
++# S3C2400 Machines
++#
++CONFIG_CPU_S3C2410=y
++CONFIG_CPU_S3C2410_DMA=y
++CONFIG_S3C2410_PM=y
++CONFIG_S3C2410_GPIO=y
++CONFIG_S3C2410_CLOCK=y
++CONFIG_S3C2410_PWM=y
++
++#
++# S3C2410 Machines
++#
++# CONFIG_ARCH_SMDK2410 is not set
++# CONFIG_ARCH_H1940 is not set
++# CONFIG_MACH_N30 is not set
++# CONFIG_ARCH_BAST is not set
++# CONFIG_MACH_OTOM is not set
++# CONFIG_MACH_AML_M5900 is not set
++# CONFIG_MACH_VR1000 is not set
++CONFIG_MACH_QT2410=y
++# CONFIG_MACH_NEO1973_GTA01 is not set
++
++#
++# S3C2412 Machines
++#
++# CONFIG_MACH_SMDK2413 is not set
++# CONFIG_MACH_SMDK2412 is not set
++# CONFIG_MACH_VSTMS is not set
++CONFIG_CPU_S3C2440=y
++CONFIG_S3C2440_DMA=y
++# CONFIG_S3C2440_C_FIQ is not set
++
++#
++# S3C2440 Machines
++#
++# CONFIG_MACH_ANUBIS is not set
++# CONFIG_MACH_OSIRIS is not set
++# CONFIG_MACH_RX3715 is not set
++CONFIG_ARCH_S3C2440=y
++# CONFIG_MACH_NEXCODER_2440 is not set
++CONFIG_SMDK2440_CPU2440=y
++# CONFIG_MACH_HXD8 is not set
++# CONFIG_MACH_NEO1973_GTA02 is not set
++CONFIG_MACH_M800=y
++CONFIG_CPU_S3C2442=y
++
++#
++# S3C2442 Machines
++#
++CONFIG_SMDK2440_CPU2442=y
++
++#
++# S3C2443 Machines
++#
++# CONFIG_MACH_SMDK2443 is not set
++
++#
++# Processor Type
++#
++CONFIG_CPU_32=y
++CONFIG_CPU_ARM920T=y
++CONFIG_CPU_32v4T=y
++CONFIG_CPU_ABRT_EV4T=y
++CONFIG_CPU_CACHE_V4WT=y
++CONFIG_CPU_CACHE_VIVT=y
++CONFIG_CPU_COPY_V4WB=y
++CONFIG_CPU_TLB_V4WBI=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++
++#
++# Processor Features
++#
++CONFIG_ARM_THUMB=y
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
++# CONFIG_OUTER_CACHE is not set
++
++#
++# Bus support
++#
++# CONFIG_PCI_SYSCALL is not set
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Kernel Features
++#
++# CONFIG_TICK_ONESHOT is not set
++CONFIG_PREEMPT=y
++CONFIG_NO_IDLE_HZ=y
++CONFIG_HZ=200
++CONFIG_AEABI=y
++CONFIG_OABI_COMPAT=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4096
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=1
++CONFIG_BOUNCE=y
++CONFIG_VIRT_TO_BUS=y
++CONFIG_ALIGNMENT_TRAP=y
++
++#
++# Boot options
++#
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE="root=/dev/mmcblk0p1 rootdelay=5"
++# CONFIG_XIP_KERNEL is not set
++CONFIG_KEXEC=y
++CONFIG_ATAGS_PROC=y
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++CONFIG_FPE_NWFPE=y
++# CONFIG_FPE_NWFPE_XP is not set
++# CONFIG_FPE_FASTFPE is not set
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_AOUT is not set
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Power management options
++#
++CONFIG_PM=y
++CONFIG_PM_LEGACY=y
++CONFIG_PM_DEBUG=y
++# CONFIG_PM_VERBOSE is not set
++CONFIG_PM_SLEEP=y
++CONFIG_SUSPEND_UP_POSSIBLE=y
++CONFIG_SUSPEND=y
++CONFIG_APM_EMULATION=y
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++# CONFIG_XFRM_USER is not set
++# CONFIG_XFRM_SUB_POLICY is not set
++CONFIG_XFRM_MIGRATE=y
++CONFIG_NET_KEY=m
++CONFIG_NET_KEY_MIGRATE=y
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_ADVANCED_ROUTER=y
++CONFIG_ASK_IP_FIB_HASH=y
++# CONFIG_IP_FIB_TRIE is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_MULTIPLE_TABLES=y
++# CONFIG_IP_ROUTE_MULTIPATH is not set
++# CONFIG_IP_ROUTE_VERBOSE is not set
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++# CONFIG_IP_PNP_BOOTP is not set
++# CONFIG_IP_PNP_RARP is not set
++CONFIG_NET_IPIP=m
++CONFIG_NET_IPGRE=m
++# CONFIG_NET_IPGRE_BROADCAST is not set
++# CONFIG_IP_MROUTE is not set
++# CONFIG_ARPD is not set
++CONFIG_SYN_COOKIES=y
++CONFIG_INET_AH=m
++CONFIG_INET_ESP=m
++CONFIG_INET_IPCOMP=m
++CONFIG_INET_XFRM_TUNNEL=m
++CONFIG_INET_TUNNEL=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=m
++CONFIG_INET_XFRM_MODE_TUNNEL=m
++CONFIG_INET_XFRM_MODE_BEET=m
++# CONFIG_INET_LRO is not set
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++CONFIG_TCP_MD5SIG=y
++# CONFIG_IP_VS is not set
++CONFIG_IPV6=m
++# CONFIG_IPV6_PRIVACY is not set
++# CONFIG_IPV6_ROUTER_PREF is not set
++# CONFIG_IPV6_OPTIMISTIC_DAD is not set
++CONFIG_INET6_AH=m
++CONFIG_INET6_ESP=m
++CONFIG_INET6_IPCOMP=m
++# CONFIG_IPV6_MIP6 is not set
++CONFIG_INET6_XFRM_TUNNEL=m
++CONFIG_INET6_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_TRANSPORT=m
++CONFIG_INET6_XFRM_MODE_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_BEET=m
++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
++CONFIG_IPV6_SIT=m
++CONFIG_IPV6_TUNNEL=m
++# CONFIG_IPV6_MULTIPLE_TABLES is not set
++# CONFIG_NETWORK_SECMARK is not set
++CONFIG_NETFILTER=y
++# CONFIG_NETFILTER_DEBUG is not set
++
++#
++# Core Netfilter Configuration
++#
++CONFIG_NETFILTER_NETLINK=m
++CONFIG_NETFILTER_NETLINK_QUEUE=m
++CONFIG_NETFILTER_NETLINK_LOG=m
++CONFIG_NF_CONNTRACK_ENABLED=m
++CONFIG_NF_CONNTRACK=m
++CONFIG_NF_CT_ACCT=y
++CONFIG_NF_CONNTRACK_MARK=y
++CONFIG_NF_CONNTRACK_EVENTS=y
++CONFIG_NF_CT_PROTO_GRE=m
++CONFIG_NF_CT_PROTO_SCTP=m
++# CONFIG_NF_CT_PROTO_UDPLITE is not set
++# CONFIG_NF_CONNTRACK_AMANDA is not set
++CONFIG_NF_CONNTRACK_FTP=m
++CONFIG_NF_CONNTRACK_H323=m
++CONFIG_NF_CONNTRACK_IRC=m
++CONFIG_NF_CONNTRACK_NETBIOS_NS=m
++CONFIG_NF_CONNTRACK_PPTP=m
++CONFIG_NF_CONNTRACK_SANE=m
++CONFIG_NF_CONNTRACK_SIP=m
++CONFIG_NF_CONNTRACK_TFTP=m
++CONFIG_NF_CT_NETLINK=m
++CONFIG_NETFILTER_XTABLES=m
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
++CONFIG_NETFILTER_XT_TARGET_DSCP=m
++CONFIG_NETFILTER_XT_TARGET_MARK=m
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
++CONFIG_NETFILTER_XT_TARGET_NFLOG=m
++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
++# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
++CONFIG_NETFILTER_XT_MATCH_DCCP=m
++CONFIG_NETFILTER_XT_MATCH_DSCP=m
++CONFIG_NETFILTER_XT_MATCH_ESP=m
++CONFIG_NETFILTER_XT_MATCH_HELPER=m
++CONFIG_NETFILTER_XT_MATCH_LENGTH=m
++CONFIG_NETFILTER_XT_MATCH_LIMIT=m
++CONFIG_NETFILTER_XT_MATCH_MAC=m
++CONFIG_NETFILTER_XT_MATCH_MARK=m
++CONFIG_NETFILTER_XT_MATCH_POLICY=m
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
++CONFIG_NETFILTER_XT_MATCH_QUOTA=m
++CONFIG_NETFILTER_XT_MATCH_REALM=m
++CONFIG_NETFILTER_XT_MATCH_SCTP=m
++CONFIG_NETFILTER_XT_MATCH_STATE=m
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
++CONFIG_NETFILTER_XT_MATCH_STRING=m
++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_TIME is not set
++# CONFIG_NETFILTER_XT_MATCH_U32 is not set
++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
++
++#
++# IP: Netfilter Configuration
++#
++CONFIG_NF_CONNTRACK_IPV4=m
++CONFIG_NF_CONNTRACK_PROC_COMPAT=y
++# CONFIG_IP_NF_QUEUE is not set
++CONFIG_IP_NF_IPTABLES=m
++CONFIG_IP_NF_MATCH_IPRANGE=m
++CONFIG_IP_NF_MATCH_TOS=m
++# CONFIG_IP_NF_MATCH_RECENT is not set
++CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_AH=m
++CONFIG_IP_NF_MATCH_TTL=m
++CONFIG_IP_NF_MATCH_OWNER=m
++CONFIG_IP_NF_MATCH_ADDRTYPE=m
++CONFIG_IP_NF_FILTER=m
++CONFIG_IP_NF_TARGET_REJECT=m
++CONFIG_IP_NF_TARGET_LOG=m
++CONFIG_IP_NF_TARGET_ULOG=m
++CONFIG_NF_NAT=m
++CONFIG_NF_NAT_NEEDED=y
++CONFIG_IP_NF_TARGET_MASQUERADE=m
++CONFIG_IP_NF_TARGET_REDIRECT=m
++CONFIG_IP_NF_TARGET_NETMAP=m
++CONFIG_IP_NF_TARGET_SAME=m
++CONFIG_NF_NAT_SNMP_BASIC=m
++CONFIG_NF_NAT_PROTO_GRE=m
++CONFIG_NF_NAT_FTP=m
++CONFIG_NF_NAT_IRC=m
++CONFIG_NF_NAT_TFTP=m
++# CONFIG_NF_NAT_AMANDA is not set
++CONFIG_NF_NAT_PPTP=m
++CONFIG_NF_NAT_H323=m
++CONFIG_NF_NAT_SIP=m
++CONFIG_IP_NF_MANGLE=m
++CONFIG_IP_NF_TARGET_TOS=m
++CONFIG_IP_NF_TARGET_ECN=m
++CONFIG_IP_NF_TARGET_TTL=m
++CONFIG_IP_NF_TARGET_CLUSTERIP=m
++# CONFIG_IP_NF_RAW is not set
++# CONFIG_IP_NF_ARPTABLES is not set
++
++#
++# IPv6: Netfilter Configuration (EXPERIMENTAL)
++#
++CONFIG_NF_CONNTRACK_IPV6=m
++# CONFIG_IP6_NF_QUEUE is not set
++CONFIG_IP6_NF_IPTABLES=m
++CONFIG_IP6_NF_MATCH_RT=m
++CONFIG_IP6_NF_MATCH_OPTS=m
++CONFIG_IP6_NF_MATCH_FRAG=m
++CONFIG_IP6_NF_MATCH_HL=m
++CONFIG_IP6_NF_MATCH_OWNER=m
++CONFIG_IP6_NF_MATCH_IPV6HEADER=m
++CONFIG_IP6_NF_MATCH_AH=m
++CONFIG_IP6_NF_MATCH_MH=m
++CONFIG_IP6_NF_MATCH_EUI64=m
++CONFIG_IP6_NF_FILTER=m
++CONFIG_IP6_NF_TARGET_LOG=m
++CONFIG_IP6_NF_TARGET_REJECT=m
++CONFIG_IP6_NF_MANGLE=m
++CONFIG_IP6_NF_TARGET_HL=m
++# CONFIG_IP6_NF_RAW is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++CONFIG_NET_SCHED=y
++
++#
++# Queueing/Scheduling
++#
++CONFIG_NET_SCH_CBQ=m
++CONFIG_NET_SCH_HTB=m
++CONFIG_NET_SCH_HFSC=m
++CONFIG_NET_SCH_PRIO=m
++# CONFIG_NET_SCH_RR is not set
++CONFIG_NET_SCH_RED=m
++CONFIG_NET_SCH_SFQ=m
++CONFIG_NET_SCH_TEQL=m
++CONFIG_NET_SCH_TBF=m
++CONFIG_NET_SCH_GRED=m
++CONFIG_NET_SCH_DSMARK=m
++CONFIG_NET_SCH_NETEM=m
++CONFIG_NET_SCH_INGRESS=m
++
++#
++# Classification
++#
++CONFIG_NET_CLS=y
++CONFIG_NET_CLS_BASIC=m
++CONFIG_NET_CLS_TCINDEX=m
++CONFIG_NET_CLS_ROUTE4=m
++CONFIG_NET_CLS_ROUTE=y
++CONFIG_NET_CLS_FW=m
++CONFIG_NET_CLS_U32=m
++CONFIG_CLS_U32_PERF=y
++CONFIG_CLS_U32_MARK=y
++CONFIG_NET_CLS_RSVP=m
++CONFIG_NET_CLS_RSVP6=m
++# CONFIG_NET_EMATCH is not set
++# CONFIG_NET_CLS_ACT is not set
++# CONFIG_NET_CLS_POLICE is not set
++# CONFIG_NET_CLS_IND is not set
++CONFIG_NET_SCH_FIFO=y
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++CONFIG_BT=m
++CONFIG_BT_L2CAP=m
++CONFIG_BT_SCO=m
++CONFIG_BT_RFCOMM=m
++CONFIG_BT_RFCOMM_TTY=y
++CONFIG_BT_BNEP=m
++CONFIG_BT_BNEP_MC_FILTER=y
++CONFIG_BT_BNEP_PROTO_FILTER=y
++CONFIG_BT_HIDP=m
++
++#
++# Bluetooth device drivers
++#
++CONFIG_BT_HCIUSB=m
++CONFIG_BT_HCIUSB_SCO=y
++# CONFIG_BT_HCIBTSDIO is not set
++# CONFIG_BT_HCIUART is not set
++# CONFIG_BT_HCIBCM203X is not set
++# CONFIG_BT_HCIBPA10X is not set
++# CONFIG_BT_HCIBFUSB is not set
++# CONFIG_BT_HCIVHCI is not set
++# CONFIG_AF_RXRPC is not set
++CONFIG_FIB_RULES=y
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++CONFIG_WIRELESS_EXT=y
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++CONFIG_FW_LOADER=m
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++CONFIG_CONNECTOR=m
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++# CONFIG_MTD_AFS_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++CONFIG_MTD_CFI_INTELEXT=y
++# CONFIG_MTD_CFI_AMDSTD is not set
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++CONFIG_MTD_ABSENT=y
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_ARM_INTEGRATOR is not set
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++CONFIG_MTD_NAND=y
++CONFIG_MTD_NAND_VERIFY_WRITE=y
++# CONFIG_MTD_NAND_ECC_SMC is not set
++# CONFIG_MTD_NAND_MUSEUM_IDS is not set
++CONFIG_MTD_NAND_IDS=y
++CONFIG_MTD_NAND_S3C2410=y
++# CONFIG_MTD_NAND_S3C2410_DEBUG is not set
++CONFIG_MTD_NAND_S3C2410_HWECC=y
++# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++# CONFIG_MTD_NAND_NANDSIM is not set
++# CONFIG_MTD_NAND_PLATFORM is not set
++# CONFIG_MTD_ALAUDA is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=m
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++# CONFIG_BLK_DEV_NBD is not set
++CONFIG_BLK_DEV_UB=m
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=4096
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++# CONFIG_IDE is not set
++
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=m
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++# CONFIG_BLK_DEV_SR_VENDOR is not set
++CONFIG_CHR_DEV_SG=m
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++CONFIG_SCSI_SCAN_ASYNC=y
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++CONFIG_TUN=m
++# CONFIG_VETH is not set
++# CONFIG_PHYLIB is not set
++CONFIG_NET_ETHERNET=y
++CONFIG_MII=y
++# CONFIG_AX88796 is not set
++# CONFIG_SMC91X is not set
++# CONFIG_DM9000 is not set
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++CONFIG_NET_PCI=y
++# CONFIG_B44 is not set
++CONFIG_CS89x0=m
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++
++#
++# USB Network Adapters
++#
++CONFIG_USB_CATC=m
++CONFIG_USB_KAWETH=m
++CONFIG_USB_PEGASUS=m
++CONFIG_USB_RTL8150=m
++CONFIG_USB_USBNET=y
++CONFIG_USB_NET_AX8817X=m
++CONFIG_USB_NET_CDCETHER=m
++CONFIG_USB_NET_DM9601=m
++CONFIG_USB_NET_GL620A=m
++CONFIG_USB_NET_NET1080=m
++CONFIG_USB_NET_PLUSB=m
++CONFIG_USB_NET_MCS7830=m
++CONFIG_USB_NET_RNDIS_HOST=m
++CONFIG_USB_NET_CDC_SUBSET=m
++CONFIG_USB_ALI_M5632=y
++CONFIG_USB_AN2720=y
++CONFIG_USB_BELKIN=y
++CONFIG_USB_ARMLINUX=y
++CONFIG_USB_EPSON2888=y
++CONFIG_USB_KC2190=y
++CONFIG_USB_NET_ZAURUS=m
++# CONFIG_WAN is not set
++CONFIG_PPP=m
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_ASYNC=m
++CONFIG_PPP_SYNC_TTY=m
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++CONFIG_PPP_MPPE=m
++# CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_POLLDEV is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640
++# CONFIG_INPUT_JOYDEV is not set
++CONFIG_INPUT_EVDEV=y
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++CONFIG_KEYBOARD_STOWAWAY=m
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_KEYBOARD_M800=y
++CONFIG_KEYBOARD_QT2410=y
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++# CONFIG_MOUSE_GPIO is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++CONFIG_INPUT_TOUCHSCREEN=y
++# CONFIG_TOUCHSCREEN_ADS7846 is not set
++# CONFIG_TOUCHSCREEN_FUJITSU is not set
++CONFIG_TOUCHSCREEN_S3C2410=y
++# CONFIG_TOUCHSCREEN_S3C2410_DEBUG is not set
++# CONFIG_TOUCHSCREEN_GUNZE is not set
++# CONFIG_TOUCHSCREEN_ELO is not set
++# CONFIG_TOUCHSCREEN_MTOUCH is not set
++# CONFIG_TOUCHSCREEN_MK712 is not set
++# CONFIG_TOUCHSCREEN_PENMOUNT is not set
++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
++# CONFIG_TOUCHSCREEN_UCB1400 is not set
++# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
++CONFIG_INPUT_MISC=y
++# CONFIG_INPUT_ATI_REMOTE is not set
++# CONFIG_INPUT_ATI_REMOTE2 is not set
++# CONFIG_INPUT_KEYSPAN_REMOTE is not set
++# CONFIG_INPUT_POWERMATE is not set
++# CONFIG_INPUT_YEALINK is not set
++CONFIG_INPUT_UINPUT=m
++CONFIG_INPUT_LIS302DL=y
++
++#
++# Hardware I/O ports
++#
++CONFIG_SERIO=y
++# CONFIG_SERIO_SERPORT is not set
++# CONFIG_SERIO_RAW is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_VT_CONSOLE=y
++CONFIG_NR_TTY_DEVICES=4
++CONFIG_HW_CONSOLE=y
++CONFIG_VT_HW_CONSOLE_BINDING=y
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_S3C2410=y
++CONFIG_SERIAL_S3C2410_CONSOLE=y
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_NVRAM is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=y
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=y
++
++#
++# I2C Algorithms
++#
++# CONFIG_I2C_ALGOBIT is not set
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++# CONFIG_I2C_GPIO is not set
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++CONFIG_I2C_S3C2410=y
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++# CONFIG_I2C_TINY_USB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++CONFIG_SENSORS_PCF50606=y
++CONFIG_SENSORS_PCF50633=y
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++CONFIG_SENSORS_TSL256X=m
++# CONFIG_PCA9632 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_BITBANG=y
++CONFIG_SPI_S3C24XX=y
++CONFIG_SPI_S3C24XX_GPIO=y
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++CONFIG_POWER_SUPPLY=y
++# CONFIG_POWER_SUPPLY_DEBUG is not set
++# CONFIG_PDA_POWER is not set
++CONFIG_APM_POWER=y
++# CONFIG_BATTERY_DS2760 is not set
++CONFIG_BATTERY_BQ27000_HDQ=y
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_S3C2410_WATCHDOG=m
++
++#
++# USB-based Watchdog Cards
++#
++# CONFIG_USBPCWATCHDOG is not set
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++# CONFIG_MFD_GLAMO is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_UVESA is not set
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_S3C2410=y
++# CONFIG_FB_S3C2410_DEBUG is not set
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++# CONFIG_LCD_LTV350QV is not set
++CONFIG_BACKLIGHT_CLASS_DEVICE=y
++# CONFIG_BACKLIGHT_CORGI is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++CONFIG_DISPLAY_JBT6K74=y
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++CONFIG_FRAMEBUFFER_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
++# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
++CONFIG_FONTS=y
++# CONFIG_FONT_8x8 is not set
++# CONFIG_FONT_8x16 is not set
++CONFIG_FONT_6x11=y
++# CONFIG_FONT_7x14 is not set
++# CONFIG_FONT_PEARL_8x8 is not set
++# CONFIG_FONT_ACORN_8x8 is not set
++# CONFIG_FONT_MINI_4x6 is not set
++# CONFIG_FONT_SUN8x16 is not set
++# CONFIG_FONT_SUN12x22 is not set
++# CONFIG_FONT_10x18 is not set
++# CONFIG_LOGO is not set
++
++#
++# Sound
++#
++CONFIG_SOUND=y
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++CONFIG_SND_RAWMIDI=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# ALSA ARM devices
++#
++
++#
++# SPI devices
++#
++
++#
++# USB devices
++#
++# CONFIG_SND_USB_AUDIO is not set
++# CONFIG_SND_USB_CAIAQ is not set
++
++#
++# System on Chip audio support
++#
++CONFIG_SND_SOC=m
++CONFIG_SND_S3C24XX_SOC=m
++
++#
++# SoC Audio support for SuperH
++#
++
++#
++# Open Sound System
++#
++# CONFIG_SOUND_PRIME is not set
++CONFIG_HID_SUPPORT=y
++CONFIG_HID=y
++# CONFIG_HID_DEBUG is not set
++# CONFIG_HIDRAW is not set
++
++#
++# USB Input Devices
++#
++CONFIG_USB_HID=y
++# CONFIG_USB_HIDINPUT_POWERBOOK is not set
++# CONFIG_HID_FF is not set
++CONFIG_USB_HIDDEV=y
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++CONFIG_USB=y
++# CONFIG_USB_DEBUG is not set
++
++#
++# Miscellaneous USB options
++#
++CONFIG_USB_DEVICEFS=y
++CONFIG_USB_DEVICE_CLASS=y
++# CONFIG_USB_DYNAMIC_MINORS is not set
++CONFIG_USB_SUSPEND=y
++# CONFIG_USB_PERSIST is not set
++# CONFIG_USB_OTG is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_ISP116X_HCD is not set
++CONFIG_USB_OHCI_HCD=m
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
++CONFIG_USB_OHCI_LITTLE_ENDIAN=y
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++
++#
++# USB Device Class drivers
++#
++CONFIG_USB_ACM=m
++CONFIG_USB_PRINTER=m
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# may also be needed; see USB_STORAGE Help for more information
++#
++CONFIG_USB_STORAGE=m
++# CONFIG_USB_STORAGE_DEBUG is not set
++CONFIG_USB_STORAGE_DATAFAB=y
++CONFIG_USB_STORAGE_FREECOM=y
++# CONFIG_USB_STORAGE_ISD200 is not set
++CONFIG_USB_STORAGE_DPCM=y
++CONFIG_USB_STORAGE_USBAT=y
++CONFIG_USB_STORAGE_SDDR09=y
++CONFIG_USB_STORAGE_SDDR55=y
++CONFIG_USB_STORAGE_JUMPSHOT=y
++CONFIG_USB_STORAGE_ALAUDA=y
++CONFIG_USB_STORAGE_KARMA=y
++CONFIG_USB_LIBUSUAL=y
++
++#
++# USB Imaging devices
++#
++# CONFIG_USB_MDC800 is not set
++# CONFIG_USB_MICROTEK is not set
++CONFIG_USB_MON=y
++
++#
++# USB port drivers
++#
++
++#
++# USB Serial Converter support
++#
++CONFIG_USB_SERIAL=m
++CONFIG_USB_SERIAL_GENERIC=y
++CONFIG_USB_SERIAL_AIRCABLE=m
++CONFIG_USB_SERIAL_AIRPRIME=m
++CONFIG_USB_SERIAL_ARK3116=m
++CONFIG_USB_SERIAL_BELKIN=m
++# CONFIG_USB_SERIAL_CH341 is not set
++CONFIG_USB_SERIAL_WHITEHEAT=m
++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
++CONFIG_USB_SERIAL_CP2101=m
++CONFIG_USB_SERIAL_CYPRESS_M8=m
++CONFIG_USB_SERIAL_EMPEG=m
++CONFIG_USB_SERIAL_FTDI_SIO=m
++CONFIG_USB_SERIAL_FUNSOFT=m
++CONFIG_USB_SERIAL_VISOR=m
++CONFIG_USB_SERIAL_IPAQ=m
++CONFIG_USB_SERIAL_IR=m
++CONFIG_USB_SERIAL_EDGEPORT=m
++CONFIG_USB_SERIAL_EDGEPORT_TI=m
++CONFIG_USB_SERIAL_GARMIN=m
++CONFIG_USB_SERIAL_IPW=m
++CONFIG_USB_SERIAL_KEYSPAN_PDA=m
++CONFIG_USB_SERIAL_KEYSPAN=m
++CONFIG_USB_SERIAL_KEYSPAN_MPR=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19=y
++CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
++CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
++CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
++CONFIG_USB_SERIAL_KLSI=m
++CONFIG_USB_SERIAL_KOBIL_SCT=m
++CONFIG_USB_SERIAL_MCT_U232=m
++CONFIG_USB_SERIAL_MOS7720=m
++CONFIG_USB_SERIAL_MOS7840=m
++CONFIG_USB_SERIAL_NAVMAN=m
++CONFIG_USB_SERIAL_PL2303=m
++# CONFIG_USB_SERIAL_OTI6858 is not set
++CONFIG_USB_SERIAL_HP4X=m
++CONFIG_USB_SERIAL_SAFE=m
++CONFIG_USB_SERIAL_SAFE_PADDED=y
++CONFIG_USB_SERIAL_SIERRAWIRELESS=m
++CONFIG_USB_SERIAL_TI=m
++CONFIG_USB_SERIAL_CYBERJACK=m
++CONFIG_USB_SERIAL_XIRCOM=m
++CONFIG_USB_SERIAL_OPTION=m
++CONFIG_USB_SERIAL_OMNINET=m
++# CONFIG_USB_SERIAL_DEBUG is not set
++CONFIG_USB_EZUSB=y
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_AUERSWALD is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++# CONFIG_USB_BERRY_CHARGE is not set
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_PHIDGET is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_LD is not set
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
++# CONFIG_USB_TEST is not set
++
++#
++# USB DSL modem support
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++# CONFIG_USB_GADGET_ATMEL_USBA is not set
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++CONFIG_USB_GADGET_S3C2410=y
++CONFIG_USB_S3C2410=y
++# CONFIG_USB_S3C2410_DEBUG is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++# CONFIG_USB_GADGET_DUALSPEED is not set
++# CONFIG_USB_ZERO is not set
++CONFIG_USB_ETH=y
++CONFIG_USB_ETH_RNDIS=y
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FILE_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++CONFIG_USB_MIDI_GADGET=m
++
++#
++# SDIO support
++#
++# CONFIG_SDIO is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++CONFIG_MMC_UNSAFE_RESUME=y
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_BLOCK_BOUNCE=y
++CONFIG_SDIO_UART=m
++
++#
++# MMC/SD Host Controller Drivers
++#
++# CONFIG_MMC_SPI is not set
++CONFIG_MMC_S3C=y
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_S3C24XX=m
++# CONFIG_LEDS_GPIO is not set
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++CONFIG_RTC_DEBUG=y
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_CMOS is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_S3C=m
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++CONFIG_FS_POSIX_ACL=y
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++CONFIG_ROMFS_FS=y
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++CONFIG_DNOTIFY=y
++# CONFIG_AUTOFS_FS is not set
++CONFIG_AUTOFS4_FS=m
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++CONFIG_ISO9660_FS=m
++CONFIG_JOLIET=y
++# CONFIG_ZISOFS is not set
++CONFIG_UDF_FS=m
++CONFIG_UDF_NLS=y
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=m
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++CONFIG_JFFS2_SUMMARY=y
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++CONFIG_CRAMFS=y
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3=y
++# CONFIG_NFS_V3_ACL is not set
++CONFIG_NFS_V4=y
++# CONFIG_NFS_DIRECTIO is not set
++CONFIG_NFSD=m
++CONFIG_NFSD_V3=y
++# CONFIG_NFSD_V3_ACL is not set
++CONFIG_NFSD_V4=y
++CONFIG_NFSD_TCP=y
++CONFIG_ROOT_NFS=y
++CONFIG_LOCKD=y
++CONFIG_LOCKD_V4=y
++CONFIG_EXPORTFS=m
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=y
++CONFIG_SUNRPC_GSS=y
++# CONFIG_SUNRPC_BIND34 is not set
++CONFIG_RPCSEC_GSS_KRB5=y
++# CONFIG_RPCSEC_GSS_SPKM3 is not set
++# CONFIG_SMB_FS is not set
++CONFIG_CIFS=m
++# CONFIG_CIFS_STATS is not set
++CONFIG_CIFS_WEAK_PW_HASH=y
++# CONFIG_CIFS_XATTR is not set
++# CONFIG_CIFS_DEBUG2 is not set
++# CONFIG_CIFS_EXPERIMENTAL is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++CONFIG_NLS_CODEPAGE_850=m
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++CONFIG_NLS_CODEPAGE_936=m
++CONFIG_NLS_CODEPAGE_950=m
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=y
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++# CONFIG_MARKERS is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++# CONFIG_SCHED_DEBUG is not set
++# CONFIG_SCHEDSTATS is not set
++CONFIG_TIMER_STATS=y
++# CONFIG_DEBUG_SLAB is not set
++CONFIG_DEBUG_PREEMPT=y
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++CONFIG_DEBUG_INFO=y
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_SAMPLES is not set
++# CONFIG_DEBUG_USER is not set
++CONFIG_DEBUG_ERRORS=y
++# CONFIG_DEBUG_LL is not set
++CONFIG_DEBUG_S3C_UART=2
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++CONFIG_CRYPTO=y
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_HASH=y
++CONFIG_CRYPTO_MANAGER=y
++CONFIG_CRYPTO_HMAC=y
++CONFIG_CRYPTO_XCBC=m
++CONFIG_CRYPTO_NULL=m
++CONFIG_CRYPTO_MD4=m
++CONFIG_CRYPTO_MD5=y
++CONFIG_CRYPTO_SHA1=m
++CONFIG_CRYPTO_SHA256=m
++CONFIG_CRYPTO_SHA512=m
++CONFIG_CRYPTO_WP512=m
++CONFIG_CRYPTO_TGR192=m
++CONFIG_CRYPTO_GF128MUL=m
++CONFIG_CRYPTO_ECB=m
++CONFIG_CRYPTO_CBC=y
++CONFIG_CRYPTO_PCBC=m
++CONFIG_CRYPTO_LRW=m
++# CONFIG_CRYPTO_XTS is not set
++# CONFIG_CRYPTO_CRYPTD is not set
++CONFIG_CRYPTO_DES=y
++CONFIG_CRYPTO_FCRYPT=m
++CONFIG_CRYPTO_BLOWFISH=m
++CONFIG_CRYPTO_TWOFISH=m
++CONFIG_CRYPTO_TWOFISH_COMMON=m
++CONFIG_CRYPTO_SERPENT=m
++CONFIG_CRYPTO_AES=m
++CONFIG_CRYPTO_CAST5=m
++CONFIG_CRYPTO_CAST6=m
++CONFIG_CRYPTO_TEA=m
++CONFIG_CRYPTO_ARC4=m
++CONFIG_CRYPTO_KHAZAD=m
++CONFIG_CRYPTO_ANUBIS=m
++# CONFIG_CRYPTO_SEED is not set
++CONFIG_CRYPTO_DEFLATE=m
++CONFIG_CRYPTO_MICHAEL_MIC=m
++CONFIG_CRYPTO_CRC32C=m
++CONFIG_CRYPTO_CAMELLIA=m
++CONFIG_CRYPTO_TEST=m
++# CONFIG_CRYPTO_AUTHENC is not set
++CONFIG_CRYPTO_HW=y
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=m
++CONFIG_CRC16=m
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++CONFIG_LIBCRC32C=m
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_TEXTSEARCH=y
++CONFIG_TEXTSEARCH_KMP=m
++CONFIG_TEXTSEARCH_BM=m
++CONFIG_TEXTSEARCH_FSM=m
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
+Index: linux-2.6.24.7/arch/arm/configs/gta02-moredrivers-defconfig
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/configs/gta02-moredrivers-defconfig 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,1833 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24
++# Sat Mar 1 11:36:29 2008
++#
++CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_GENERIC_GPIO=y
++# CONFIG_GENERIC_TIME is not set
++# CONFIG_GENERIC_CLOCKEVENTS is not set
++CONFIG_MMU=y
++CONFIG_NO_IOPORT=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_ZONE_DMA=y
++CONFIG_FIQ=y
++CONFIG_VECTORS_BASE=0xffff0000
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_LOCK_KERNEL=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION="-mokodev"
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++# CONFIG_AUDIT is not set
++CONFIG_IKCONFIG=y
++CONFIG_IKCONFIG_PROC=y
++CONFIG_LOG_BUF_SHIFT=16
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
++# CONFIG_SYSFS_DEPRECATED is not set
++# CONFIG_RELAY is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++# CONFIG_EMBEDDED is not set
++CONFIG_UID16=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++CONFIG_KALLSYMS_ALL=y
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_SLAB=y
++# CONFIG_SLUB is not set
++# CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODULE_FORCE_UNLOAD=y
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_KMOD=y
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=m
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=m
++# CONFIG_DEFAULT_AS is not set
++CONFIG_DEFAULT_DEADLINE=y
++# CONFIG_DEFAULT_CFQ is not set
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="deadline"
++
++#
++# System Type
++#
++# CONFIG_ARCH_AAEC2000 is not set
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++# CONFIG_ARCH_AT91 is not set
++# CONFIG_ARCH_CLPS7500 is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_CO285 is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IMX is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_L7200 is not set
++# CONFIG_ARCH_KS8695 is not set
++# CONFIG_ARCH_NS9XXX is not set
++# CONFIG_ARCH_MXC is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++CONFIG_ARCH_S3C2410=y
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_LH7A40X is not set
++# CONFIG_ARCH_DAVINCI is not set
++# CONFIG_ARCH_OMAP is not set
++CONFIG_PLAT_S3C24XX=y
++CONFIG_CPU_S3C244X=y
++CONFIG_S3C2410_DMA=y
++# CONFIG_S3C2410_DMA_DEBUG is not set
++CONFIG_MACH_SMDK=y
++CONFIG_MACH_NEO1973=y
++CONFIG_PLAT_S3C=y
++CONFIG_CPU_LLSERIAL_S3C2410=y
++CONFIG_CPU_LLSERIAL_S3C2440=y
++
++#
++# Boot options
++#
++# CONFIG_S3C_BOOT_WATCHDOG is not set
++# CONFIG_S3C_BOOT_ERROR_RESET is not set
++
++#
++# Power management
++#
++# CONFIG_S3C2410_PM_DEBUG is not set
++# CONFIG_S3C2410_PM_CHECK is not set
++CONFIG_S3C_LOWLEVEL_UART_PORT=2
++
++#
++# S3C2400 Machines
++#
++CONFIG_CPU_S3C2410=y
++CONFIG_CPU_S3C2410_DMA=y
++CONFIG_S3C2410_PM=y
++CONFIG_S3C2410_GPIO=y
++CONFIG_S3C2410_CLOCK=y
++CONFIG_S3C2410_PWM=y
++
++#
++# S3C2410 Machines
++#
++# CONFIG_ARCH_SMDK2410 is not set
++# CONFIG_ARCH_H1940 is not set
++# CONFIG_MACH_N30 is not set
++# CONFIG_ARCH_BAST is not set
++# CONFIG_MACH_OTOM is not set
++# CONFIG_MACH_AML_M5900 is not set
++# CONFIG_MACH_VR1000 is not set
++CONFIG_MACH_QT2410=y
++CONFIG_MACH_NEO1973_GTA01=y
++
++#
++# S3C2412 Machines
++#
++# CONFIG_MACH_SMDK2413 is not set
++# CONFIG_MACH_SMDK2412 is not set
++# CONFIG_MACH_VSTMS is not set
++CONFIG_CPU_S3C2440=y
++CONFIG_S3C2440_DMA=y
++CONFIG_S3C2440_C_FIQ=y
++
++#
++# S3C2440 Machines
++#
++# CONFIG_MACH_ANUBIS is not set
++# CONFIG_MACH_OSIRIS is not set
++# CONFIG_MACH_RX3715 is not set
++CONFIG_ARCH_S3C2440=y
++# CONFIG_MACH_NEXCODER_2440 is not set
++CONFIG_SMDK2440_CPU2440=y
++CONFIG_MACH_HXD8=y
++CONFIG_MACH_NEO1973_GTA02=y
++# CONFIG_NEO1973_GTA02_2440 is not set
++CONFIG_CPU_S3C2442=y
++
++#
++# S3C2442 Machines
++#
++CONFIG_SMDK2440_CPU2442=y
++
++#
++# S3C2443 Machines
++#
++# CONFIG_MACH_SMDK2443 is not set
++
++#
++# Processor Type
++#
++CONFIG_CPU_32=y
++CONFIG_CPU_ARM920T=y
++CONFIG_CPU_32v4T=y
++CONFIG_CPU_ABRT_EV4T=y
++CONFIG_CPU_CACHE_V4WT=y
++CONFIG_CPU_CACHE_VIVT=y
++CONFIG_CPU_COPY_V4WB=y
++CONFIG_CPU_TLB_V4WBI=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++
++#
++# Processor Features
++#
++CONFIG_ARM_THUMB=y
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
++# CONFIG_OUTER_CACHE is not set
++
++#
++# Bus support
++#
++# CONFIG_PCI_SYSCALL is not set
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Kernel Features
++#
++# CONFIG_TICK_ONESHOT is not set
++CONFIG_PREEMPT=y
++CONFIG_NO_IDLE_HZ=y
++CONFIG_HZ=200
++CONFIG_AEABI=y
++CONFIG_OABI_COMPAT=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4096
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=1
++CONFIG_BOUNCE=y
++CONFIG_VIRT_TO_BUS=y
++CONFIG_ALIGNMENT_TRAP=y
++
++#
++# Boot options
++#
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE="unused -- bootloader passes ATAG list"
++# CONFIG_XIP_KERNEL is not set
++CONFIG_KEXEC=y
++CONFIG_ATAGS_PROC=y
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++CONFIG_FPE_NWFPE=y
++# CONFIG_FPE_NWFPE_XP is not set
++# CONFIG_FPE_FASTFPE is not set
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_AOUT is not set
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Power management options
++#
++CONFIG_PM=y
++CONFIG_PM_LEGACY=y
++CONFIG_PM_DEBUG=y
++CONFIG_PM_VERBOSE=y
++CONFIG_PM_SLEEP=y
++CONFIG_SUSPEND_UP_POSSIBLE=y
++CONFIG_SUSPEND=y
++CONFIG_APM_EMULATION=y
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++# CONFIG_XFRM_USER is not set
++# CONFIG_XFRM_SUB_POLICY is not set
++CONFIG_XFRM_MIGRATE=y
++CONFIG_NET_KEY=m
++CONFIG_NET_KEY_MIGRATE=y
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_ADVANCED_ROUTER=y
++CONFIG_ASK_IP_FIB_HASH=y
++# CONFIG_IP_FIB_TRIE is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_MULTIPLE_TABLES=y
++# CONFIG_IP_ROUTE_MULTIPATH is not set
++# CONFIG_IP_ROUTE_VERBOSE is not set
++CONFIG_IP_PNP=y
++# CONFIG_IP_PNP_DHCP is not set
++# CONFIG_IP_PNP_BOOTP is not set
++# CONFIG_IP_PNP_RARP is not set
++CONFIG_NET_IPIP=m
++CONFIG_NET_IPGRE=m
++# CONFIG_NET_IPGRE_BROADCAST is not set
++# CONFIG_IP_MROUTE is not set
++# CONFIG_ARPD is not set
++CONFIG_SYN_COOKIES=y
++CONFIG_INET_AH=m
++CONFIG_INET_ESP=m
++CONFIG_INET_IPCOMP=m
++CONFIG_INET_XFRM_TUNNEL=m
++CONFIG_INET_TUNNEL=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=m
++CONFIG_INET_XFRM_MODE_TUNNEL=m
++CONFIG_INET_XFRM_MODE_BEET=m
++# CONFIG_INET_LRO is not set
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++CONFIG_TCP_MD5SIG=y
++# CONFIG_IP_VS is not set
++CONFIG_IPV6=m
++# CONFIG_IPV6_PRIVACY is not set
++# CONFIG_IPV6_ROUTER_PREF is not set
++# CONFIG_IPV6_OPTIMISTIC_DAD is not set
++CONFIG_INET6_AH=m
++CONFIG_INET6_ESP=m
++CONFIG_INET6_IPCOMP=m
++# CONFIG_IPV6_MIP6 is not set
++CONFIG_INET6_XFRM_TUNNEL=m
++CONFIG_INET6_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_TRANSPORT=m
++CONFIG_INET6_XFRM_MODE_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_BEET=m
++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
++CONFIG_IPV6_SIT=m
++CONFIG_IPV6_TUNNEL=m
++# CONFIG_IPV6_MULTIPLE_TABLES is not set
++# CONFIG_NETWORK_SECMARK is not set
++CONFIG_NETFILTER=y
++# CONFIG_NETFILTER_DEBUG is not set
++CONFIG_BRIDGE_NETFILTER=y
++
++#
++# Core Netfilter Configuration
++#
++CONFIG_NETFILTER_NETLINK=m
++CONFIG_NETFILTER_NETLINK_QUEUE=m
++CONFIG_NETFILTER_NETLINK_LOG=m
++CONFIG_NF_CONNTRACK_ENABLED=m
++CONFIG_NF_CONNTRACK=m
++CONFIG_NF_CT_ACCT=y
++CONFIG_NF_CONNTRACK_MARK=y
++CONFIG_NF_CONNTRACK_EVENTS=y
++CONFIG_NF_CT_PROTO_GRE=m
++CONFIG_NF_CT_PROTO_SCTP=m
++# CONFIG_NF_CT_PROTO_UDPLITE is not set
++# CONFIG_NF_CONNTRACK_AMANDA is not set
++CONFIG_NF_CONNTRACK_FTP=m
++CONFIG_NF_CONNTRACK_H323=m
++CONFIG_NF_CONNTRACK_IRC=m
++CONFIG_NF_CONNTRACK_NETBIOS_NS=m
++CONFIG_NF_CONNTRACK_PPTP=m
++CONFIG_NF_CONNTRACK_SANE=m
++CONFIG_NF_CONNTRACK_SIP=m
++CONFIG_NF_CONNTRACK_TFTP=m
++CONFIG_NF_CT_NETLINK=m
++CONFIG_NETFILTER_XTABLES=m
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
++CONFIG_NETFILTER_XT_TARGET_DSCP=m
++CONFIG_NETFILTER_XT_TARGET_MARK=m
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
++CONFIG_NETFILTER_XT_TARGET_NFLOG=m
++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
++# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
++CONFIG_NETFILTER_XT_MATCH_DCCP=m
++CONFIG_NETFILTER_XT_MATCH_DSCP=m
++CONFIG_NETFILTER_XT_MATCH_ESP=m
++CONFIG_NETFILTER_XT_MATCH_HELPER=m
++CONFIG_NETFILTER_XT_MATCH_LENGTH=m
++CONFIG_NETFILTER_XT_MATCH_LIMIT=m
++CONFIG_NETFILTER_XT_MATCH_MAC=m
++CONFIG_NETFILTER_XT_MATCH_MARK=m
++CONFIG_NETFILTER_XT_MATCH_POLICY=m
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
++CONFIG_NETFILTER_XT_MATCH_QUOTA=m
++CONFIG_NETFILTER_XT_MATCH_REALM=m
++CONFIG_NETFILTER_XT_MATCH_SCTP=m
++CONFIG_NETFILTER_XT_MATCH_STATE=m
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
++CONFIG_NETFILTER_XT_MATCH_STRING=m
++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_TIME is not set
++# CONFIG_NETFILTER_XT_MATCH_U32 is not set
++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
++
++#
++# IP: Netfilter Configuration
++#
++CONFIG_NF_CONNTRACK_IPV4=m
++CONFIG_NF_CONNTRACK_PROC_COMPAT=y
++# CONFIG_IP_NF_QUEUE is not set
++CONFIG_IP_NF_IPTABLES=m
++CONFIG_IP_NF_MATCH_IPRANGE=m
++CONFIG_IP_NF_MATCH_TOS=m
++# CONFIG_IP_NF_MATCH_RECENT is not set
++CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_AH=m
++CONFIG_IP_NF_MATCH_TTL=m
++CONFIG_IP_NF_MATCH_OWNER=m
++CONFIG_IP_NF_MATCH_ADDRTYPE=m
++CONFIG_IP_NF_FILTER=m
++CONFIG_IP_NF_TARGET_REJECT=m
++CONFIG_IP_NF_TARGET_LOG=m
++CONFIG_IP_NF_TARGET_ULOG=m
++CONFIG_NF_NAT=m
++CONFIG_NF_NAT_NEEDED=y
++CONFIG_IP_NF_TARGET_MASQUERADE=m
++CONFIG_IP_NF_TARGET_REDIRECT=m
++CONFIG_IP_NF_TARGET_NETMAP=m
++CONFIG_IP_NF_TARGET_SAME=m
++CONFIG_NF_NAT_SNMP_BASIC=m
++CONFIG_NF_NAT_PROTO_GRE=m
++CONFIG_NF_NAT_FTP=m
++CONFIG_NF_NAT_IRC=m
++CONFIG_NF_NAT_TFTP=m
++# CONFIG_NF_NAT_AMANDA is not set
++CONFIG_NF_NAT_PPTP=m
++CONFIG_NF_NAT_H323=m
++CONFIG_NF_NAT_SIP=m
++CONFIG_IP_NF_MANGLE=m
++CONFIG_IP_NF_TARGET_TOS=m
++CONFIG_IP_NF_TARGET_ECN=m
++CONFIG_IP_NF_TARGET_TTL=m
++CONFIG_IP_NF_TARGET_CLUSTERIP=m
++# CONFIG_IP_NF_RAW is not set
++# CONFIG_IP_NF_ARPTABLES is not set
++
++#
++# IPv6: Netfilter Configuration (EXPERIMENTAL)
++#
++CONFIG_NF_CONNTRACK_IPV6=m
++# CONFIG_IP6_NF_QUEUE is not set
++CONFIG_IP6_NF_IPTABLES=m
++CONFIG_IP6_NF_MATCH_RT=m
++CONFIG_IP6_NF_MATCH_OPTS=m
++CONFIG_IP6_NF_MATCH_FRAG=m
++CONFIG_IP6_NF_MATCH_HL=m
++CONFIG_IP6_NF_MATCH_OWNER=m
++CONFIG_IP6_NF_MATCH_IPV6HEADER=m
++CONFIG_IP6_NF_MATCH_AH=m
++CONFIG_IP6_NF_MATCH_MH=m
++CONFIG_IP6_NF_MATCH_EUI64=m
++CONFIG_IP6_NF_FILTER=m
++CONFIG_IP6_NF_TARGET_LOG=m
++CONFIG_IP6_NF_TARGET_REJECT=m
++CONFIG_IP6_NF_MANGLE=m
++CONFIG_IP6_NF_TARGET_HL=m
++# CONFIG_IP6_NF_RAW is not set
++
++#
++# Bridge: Netfilter Configuration
++#
++CONFIG_BRIDGE_NF_EBTABLES=m
++CONFIG_BRIDGE_EBT_BROUTE=m
++CONFIG_BRIDGE_EBT_T_FILTER=m
++CONFIG_BRIDGE_EBT_T_NAT=m
++CONFIG_BRIDGE_EBT_802_3=m
++CONFIG_BRIDGE_EBT_AMONG=m
++CONFIG_BRIDGE_EBT_ARP=m
++CONFIG_BRIDGE_EBT_IP=m
++CONFIG_BRIDGE_EBT_LIMIT=m
++CONFIG_BRIDGE_EBT_MARK=m
++CONFIG_BRIDGE_EBT_PKTTYPE=m
++CONFIG_BRIDGE_EBT_STP=m
++CONFIG_BRIDGE_EBT_VLAN=m
++CONFIG_BRIDGE_EBT_ARPREPLY=m
++CONFIG_BRIDGE_EBT_DNAT=m
++CONFIG_BRIDGE_EBT_MARK_T=m
++CONFIG_BRIDGE_EBT_REDIRECT=m
++CONFIG_BRIDGE_EBT_SNAT=m
++CONFIG_BRIDGE_EBT_LOG=m
++CONFIG_BRIDGE_EBT_ULOG=m
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++CONFIG_BRIDGE=y
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++CONFIG_LLC=y
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++CONFIG_NET_SCHED=y
++
++#
++# Queueing/Scheduling
++#
++CONFIG_NET_SCH_CBQ=m
++CONFIG_NET_SCH_HTB=m
++CONFIG_NET_SCH_HFSC=m
++CONFIG_NET_SCH_PRIO=m
++# CONFIG_NET_SCH_RR is not set
++CONFIG_NET_SCH_RED=m
++CONFIG_NET_SCH_SFQ=m
++CONFIG_NET_SCH_TEQL=m
++CONFIG_NET_SCH_TBF=m
++CONFIG_NET_SCH_GRED=m
++CONFIG_NET_SCH_DSMARK=m
++CONFIG_NET_SCH_NETEM=m
++CONFIG_NET_SCH_INGRESS=m
++
++#
++# Classification
++#
++CONFIG_NET_CLS=y
++CONFIG_NET_CLS_BASIC=m
++CONFIG_NET_CLS_TCINDEX=m
++CONFIG_NET_CLS_ROUTE4=m
++CONFIG_NET_CLS_ROUTE=y
++CONFIG_NET_CLS_FW=m
++CONFIG_NET_CLS_U32=m
++CONFIG_CLS_U32_PERF=y
++CONFIG_CLS_U32_MARK=y
++CONFIG_NET_CLS_RSVP=m
++CONFIG_NET_CLS_RSVP6=m
++# CONFIG_NET_EMATCH is not set
++# CONFIG_NET_CLS_ACT is not set
++# CONFIG_NET_CLS_POLICE is not set
++# CONFIG_NET_CLS_IND is not set
++CONFIG_NET_SCH_FIFO=y
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++CONFIG_BT=y
++CONFIG_BT_L2CAP=y
++CONFIG_BT_SCO=y
++CONFIG_BT_RFCOMM=y
++CONFIG_BT_RFCOMM_TTY=y
++CONFIG_BT_BNEP=y
++CONFIG_BT_BNEP_MC_FILTER=y
++CONFIG_BT_BNEP_PROTO_FILTER=y
++CONFIG_BT_HIDP=y
++
++#
++# Bluetooth device drivers
++#
++CONFIG_BT_HCIUSB=y
++CONFIG_BT_HCIUSB_SCO=y
++# CONFIG_BT_HCIBTSDIO is not set
++# CONFIG_BT_HCIUART is not set
++# CONFIG_BT_HCIBCM203X is not set
++# CONFIG_BT_HCIBPA10X is not set
++# CONFIG_BT_HCIBFUSB is not set
++# CONFIG_BT_HCIVHCI is not set
++# CONFIG_AF_RXRPC is not set
++CONFIG_FIB_RULES=y
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++CONFIG_WIRELESS_EXT=y
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++CONFIG_FW_LOADER=m
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++CONFIG_CONNECTOR=m
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++CONFIG_MTD_CONCAT=y
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++# CONFIG_MTD_AFS_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++CONFIG_MTD_CFI_INTELEXT=y
++# CONFIG_MTD_CFI_AMDSTD is not set
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++CONFIG_MTD_ROM=y
++CONFIG_MTD_ABSENT=y
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x0
++CONFIG_MTD_PHYSMAP_LEN=0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_ARM_INTEGRATOR is not set
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++CONFIG_MTD_NAND=y
++CONFIG_MTD_NAND_VERIFY_WRITE=y
++# CONFIG_MTD_NAND_ECC_SMC is not set
++# CONFIG_MTD_NAND_MUSEUM_IDS is not set
++CONFIG_MTD_NAND_IDS=y
++CONFIG_MTD_NAND_S3C2410=y
++# CONFIG_MTD_NAND_S3C2410_DEBUG is not set
++CONFIG_MTD_NAND_S3C2410_HWECC=y
++# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++# CONFIG_MTD_NAND_NANDSIM is not set
++# CONFIG_MTD_NAND_PLATFORM is not set
++# CONFIG_MTD_ALAUDA is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++CONFIG_PNP=y
++CONFIG_PNP_DEBUG=y
++
++#
++# Protocols
++#
++# CONFIG_PNPACPI is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=m
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++# CONFIG_BLK_DEV_NBD is not set
++CONFIG_BLK_DEV_UB=m
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=4096
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=m
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++# CONFIG_BLK_DEV_SR_VENDOR is not set
++CONFIG_CHR_DEV_SG=m
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++CONFIG_SCSI_SCAN_ASYNC=y
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_ATA is not set
++CONFIG_MD=y
++# CONFIG_BLK_DEV_MD is not set
++CONFIG_BLK_DEV_DM=m
++# CONFIG_DM_DEBUG is not set
++CONFIG_DM_CRYPT=m
++CONFIG_DM_SNAPSHOT=m
++# CONFIG_DM_MIRROR is not set
++# CONFIG_DM_ZERO is not set
++# CONFIG_DM_MULTIPATH is not set
++# CONFIG_DM_DELAY is not set
++# CONFIG_DM_UEVENT is not set
++CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++CONFIG_TUN=m
++# CONFIG_VETH is not set
++# CONFIG_NET_SB1000 is not set
++# CONFIG_PHYLIB is not set
++CONFIG_NET_ETHERNET=y
++CONFIG_MII=y
++# CONFIG_AX88796 is not set
++# CONFIG_SMC91X is not set
++# CONFIG_DM9000 is not set
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++CONFIG_NET_PCI=y
++# CONFIG_B44 is not set
++CONFIG_CS89x0=m
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++
++#
++# USB Network Adapters
++#
++CONFIG_USB_CATC=m
++CONFIG_USB_KAWETH=m
++CONFIG_USB_PEGASUS=m
++CONFIG_USB_RTL8150=m
++CONFIG_USB_USBNET=y
++CONFIG_USB_NET_AX8817X=m
++CONFIG_USB_NET_CDCETHER=m
++CONFIG_USB_NET_DM9601=m
++CONFIG_USB_NET_GL620A=m
++CONFIG_USB_NET_NET1080=m
++CONFIG_USB_NET_PLUSB=m
++CONFIG_USB_NET_MCS7830=m
++CONFIG_USB_NET_RNDIS_HOST=m
++CONFIG_USB_NET_CDC_SUBSET=m
++CONFIG_USB_ALI_M5632=y
++CONFIG_USB_AN2720=y
++CONFIG_USB_BELKIN=y
++CONFIG_USB_ARMLINUX=y
++CONFIG_USB_EPSON2888=y
++CONFIG_USB_KC2190=y
++CONFIG_USB_NET_ZAURUS=m
++# CONFIG_WAN is not set
++CONFIG_PPP=m
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_ASYNC=m
++CONFIG_PPP_SYNC_TTY=m
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++CONFIG_PPP_MPPE=m
++# CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_POLLDEV is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640
++# CONFIG_INPUT_JOYDEV is not set
++CONFIG_INPUT_EVDEV=y
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++CONFIG_KEYBOARD_STOWAWAY=m
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_KEYBOARD_NEO1973=y
++CONFIG_KEYBOARD_QT2410=y
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++# CONFIG_MOUSE_GPIO is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++CONFIG_INPUT_TOUCHSCREEN=y
++# CONFIG_TOUCHSCREEN_ADS7846 is not set
++# CONFIG_TOUCHSCREEN_FUJITSU is not set
++CONFIG_TOUCHSCREEN_S3C2410=y
++# CONFIG_TOUCHSCREEN_S3C2410_DEBUG is not set
++# CONFIG_TOUCHSCREEN_GUNZE is not set
++# CONFIG_TOUCHSCREEN_ELO is not set
++# CONFIG_TOUCHSCREEN_MTOUCH is not set
++# CONFIG_TOUCHSCREEN_MK712 is not set
++# CONFIG_TOUCHSCREEN_PENMOUNT is not set
++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
++# CONFIG_TOUCHSCREEN_UCB1400 is not set
++# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
++CONFIG_INPUT_MISC=y
++# CONFIG_INPUT_ATI_REMOTE is not set
++# CONFIG_INPUT_ATI_REMOTE2 is not set
++# CONFIG_INPUT_KEYSPAN_REMOTE is not set
++# CONFIG_INPUT_POWERMATE is not set
++# CONFIG_INPUT_YEALINK is not set
++CONFIG_INPUT_UINPUT=m
++CONFIG_INPUT_LIS302DL=y
++
++#
++# Hardware I/O ports
++#
++CONFIG_SERIO=y
++# CONFIG_SERIO_SERPORT is not set
++# CONFIG_SERIO_RAW is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_VT_CONSOLE=y
++CONFIG_NR_TTY_DEVICES=4
++CONFIG_HW_CONSOLE=y
++CONFIG_VT_HW_CONSOLE_BINDING=y
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_S3C2410=y
++CONFIG_SERIAL_S3C2410_CONSOLE=y
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_NVRAM is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=y
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=y
++
++#
++# I2C Algorithms
++#
++# CONFIG_I2C_ALGOBIT is not set
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++# CONFIG_I2C_GPIO is not set
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++CONFIG_I2C_S3C2410=y
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++# CONFIG_I2C_TINY_USB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++CONFIG_SENSORS_PCF50606=y
++CONFIG_SENSORS_PCF50633=y
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++CONFIG_SENSORS_TSL256X=m
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_BITBANG=y
++# CONFIG_SPI_S3C24XX is not set
++CONFIG_SPI_S3C24XX_GPIO=y
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++CONFIG_POWER_SUPPLY=y
++CONFIG_POWER_SUPPLY_DEBUG=y
++CONFIG_PDA_POWER=y
++CONFIG_APM_POWER=y
++# CONFIG_BATTERY_DS2760 is not set
++# CONFIG_BATTERY_GTA01 is not set
++CONFIG_BATTERY_BQ27000_HDQ=y
++CONFIG_GTA02_HDQ=y
++CONFIG_HWMON=y
++# CONFIG_HWMON_VID is not set
++# CONFIG_SENSORS_AD7418 is not set
++# CONFIG_SENSORS_ADM1021 is not set
++# CONFIG_SENSORS_ADM1025 is not set
++# CONFIG_SENSORS_ADM1026 is not set
++# CONFIG_SENSORS_ADM1029 is not set
++# CONFIG_SENSORS_ADM1031 is not set
++# CONFIG_SENSORS_ADM9240 is not set
++# CONFIG_SENSORS_ADT7470 is not set
++# CONFIG_SENSORS_ATXP1 is not set
++# CONFIG_SENSORS_DS1621 is not set
++# CONFIG_SENSORS_F71805F is not set
++# CONFIG_SENSORS_F71882FG is not set
++# CONFIG_SENSORS_F75375S is not set
++# CONFIG_SENSORS_GL518SM is not set
++# CONFIG_SENSORS_GL520SM is not set
++# CONFIG_SENSORS_IT87 is not set
++# CONFIG_SENSORS_LM63 is not set
++# CONFIG_SENSORS_LM70 is not set
++# CONFIG_SENSORS_LM75 is not set
++# CONFIG_SENSORS_LM77 is not set
++# CONFIG_SENSORS_LM78 is not set
++# CONFIG_SENSORS_LM80 is not set
++# CONFIG_SENSORS_LM83 is not set
++# CONFIG_SENSORS_LM85 is not set
++# CONFIG_SENSORS_LM87 is not set
++# CONFIG_SENSORS_LM90 is not set
++# CONFIG_SENSORS_LM92 is not set
++# CONFIG_SENSORS_LM93 is not set
++# CONFIG_SENSORS_MAX1619 is not set
++# CONFIG_SENSORS_MAX6650 is not set
++# CONFIG_SENSORS_PC87360 is not set
++# CONFIG_SENSORS_PC87427 is not set
++# CONFIG_SENSORS_DME1737 is not set
++# CONFIG_SENSORS_SMSC47M1 is not set
++# CONFIG_SENSORS_SMSC47M192 is not set
++# CONFIG_SENSORS_SMSC47B397 is not set
++# CONFIG_SENSORS_THMC50 is not set
++# CONFIG_SENSORS_VT1211 is not set
++# CONFIG_SENSORS_W83781D is not set
++# CONFIG_SENSORS_W83791D is not set
++# CONFIG_SENSORS_W83792D is not set
++# CONFIG_SENSORS_W83793 is not set
++# CONFIG_SENSORS_W83L785TS is not set
++# CONFIG_SENSORS_W83627HF is not set
++# CONFIG_SENSORS_W83627EHF is not set
++# CONFIG_HWMON_DEBUG_CHIP is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_S3C2410_WATCHDOG=m
++
++#
++# USB-based Watchdog Cards
++#
++# CONFIG_USBPCWATCHDOG is not set
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++CONFIG_MFD_GLAMO=y
++CONFIG_MFD_GLAMO_FB=y
++CONFIG_MFD_GLAMO_SPI_GPIO=y
++CONFIG_MFD_GLAMO_SPI_FB=y
++CONFIG_MFD_GLAMO_MCI=y
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++CONFIG_DAB=y
++# CONFIG_USB_DABUSB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++CONFIG_VIDEO_OUTPUT_CONTROL=y
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_UVESA is not set
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_S3C2410=y
++# CONFIG_FB_S3C2410_DEBUG is not set
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++CONFIG_BACKLIGHT_CLASS_DEVICE=y
++# CONFIG_BACKLIGHT_CORGI is not set
++CONFIG_BACKLIGHT_GTA01=y
++
++#
++# Display device support
++#
++CONFIG_DISPLAY_SUPPORT=y
++
++#
++# Display hardware drivers
++#
++CONFIG_DISPLAY_JBT6K74=y
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++CONFIG_FRAMEBUFFER_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
++# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
++CONFIG_FONTS=y
++# CONFIG_FONT_8x8 is not set
++# CONFIG_FONT_8x16 is not set
++CONFIG_FONT_6x11=y
++# CONFIG_FONT_7x14 is not set
++# CONFIG_FONT_PEARL_8x8 is not set
++# CONFIG_FONT_ACORN_8x8 is not set
++# CONFIG_FONT_MINI_4x6 is not set
++# CONFIG_FONT_SUN8x16 is not set
++# CONFIG_FONT_SUN12x22 is not set
++# CONFIG_FONT_10x18 is not set
++# CONFIG_LOGO is not set
++
++#
++# Sound
++#
++CONFIG_SOUND=y
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=y
++CONFIG_SND_TIMER=y
++CONFIG_SND_PCM=y
++CONFIG_SND_HWDEP=y
++CONFIG_SND_RAWMIDI=y
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=y
++CONFIG_SND_PCM_OSS=y
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# ALSA ARM devices
++#
++
++#
++# SPI devices
++#
++
++#
++# USB devices
++#
++CONFIG_SND_USB_AUDIO=m
++# CONFIG_SND_USB_CAIAQ is not set
++
++#
++# System on Chip audio support
++#
++CONFIG_SND_SOC=y
++CONFIG_SND_S3C24XX_SOC=y
++CONFIG_SND_S3C24XX_SOC_I2S=y
++# CONFIG_SND_S3C24XX_SOC_NEO1973_WM8753 is not set
++CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753=y
++
++#
++# SoC Audio support for SuperH
++#
++CONFIG_SND_SOC_WM8753=y
++
++#
++# Open Sound System
++#
++# CONFIG_SOUND_PRIME is not set
++CONFIG_HID_SUPPORT=y
++CONFIG_HID=y
++# CONFIG_HID_DEBUG is not set
++# CONFIG_HIDRAW is not set
++
++#
++# USB Input Devices
++#
++CONFIG_USB_HID=y
++# CONFIG_USB_HIDINPUT_POWERBOOK is not set
++# CONFIG_HID_FF is not set
++CONFIG_USB_HIDDEV=y
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++CONFIG_USB=y
++# CONFIG_USB_DEBUG is not set
++
++#
++# Miscellaneous USB options
++#
++CONFIG_USB_DEVICEFS=y
++CONFIG_USB_DEVICE_CLASS=y
++# CONFIG_USB_DYNAMIC_MINORS is not set
++CONFIG_USB_SUSPEND=y
++CONFIG_USB_PERSIST=y
++# CONFIG_USB_OTG is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_ISP116X_HCD is not set
++CONFIG_USB_OHCI_HCD=y
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
++CONFIG_USB_OHCI_LITTLE_ENDIAN=y
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++
++#
++# USB Device Class drivers
++#
++CONFIG_USB_ACM=m
++CONFIG_USB_PRINTER=m
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# may also be needed; see USB_STORAGE Help for more information
++#
++CONFIG_USB_STORAGE=m
++# CONFIG_USB_STORAGE_DEBUG is not set
++CONFIG_USB_STORAGE_DATAFAB=y
++CONFIG_USB_STORAGE_FREECOM=y
++# CONFIG_USB_STORAGE_ISD200 is not set
++CONFIG_USB_STORAGE_DPCM=y
++CONFIG_USB_STORAGE_USBAT=y
++CONFIG_USB_STORAGE_SDDR09=y
++CONFIG_USB_STORAGE_SDDR55=y
++CONFIG_USB_STORAGE_JUMPSHOT=y
++CONFIG_USB_STORAGE_ALAUDA=y
++CONFIG_USB_STORAGE_KARMA=y
++CONFIG_USB_LIBUSUAL=y
++
++#
++# USB Imaging devices
++#
++# CONFIG_USB_MDC800 is not set
++# CONFIG_USB_MICROTEK is not set
++CONFIG_USB_MON=y
++
++#
++# USB port drivers
++#
++
++#
++# USB Serial Converter support
++#
++CONFIG_USB_SERIAL=y
++CONFIG_USB_SERIAL_GENERIC=y
++CONFIG_USB_SERIAL_AIRCABLE=m
++CONFIG_USB_SERIAL_AIRPRIME=m
++CONFIG_USB_SERIAL_ARK3116=m
++CONFIG_USB_SERIAL_BELKIN=m
++# CONFIG_USB_SERIAL_CH341 is not set
++CONFIG_USB_SERIAL_WHITEHEAT=m
++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
++CONFIG_USB_SERIAL_CP2101=m
++CONFIG_USB_SERIAL_CYPRESS_M8=m
++CONFIG_USB_SERIAL_EMPEG=m
++CONFIG_USB_SERIAL_FTDI_SIO=m
++CONFIG_USB_SERIAL_FUNSOFT=m
++CONFIG_USB_SERIAL_VISOR=m
++CONFIG_USB_SERIAL_IPAQ=m
++CONFIG_USB_SERIAL_IR=m
++CONFIG_USB_SERIAL_EDGEPORT=m
++CONFIG_USB_SERIAL_EDGEPORT_TI=m
++CONFIG_USB_SERIAL_GARMIN=m
++CONFIG_USB_SERIAL_IPW=m
++CONFIG_USB_SERIAL_KEYSPAN_PDA=m
++CONFIG_USB_SERIAL_KEYSPAN=m
++CONFIG_USB_SERIAL_KEYSPAN_MPR=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19=y
++CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
++CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
++CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
++CONFIG_USB_SERIAL_KLSI=m
++CONFIG_USB_SERIAL_KOBIL_SCT=m
++CONFIG_USB_SERIAL_MCT_U232=m
++CONFIG_USB_SERIAL_MOS7720=m
++CONFIG_USB_SERIAL_MOS7840=m
++CONFIG_USB_SERIAL_NAVMAN=m
++CONFIG_USB_SERIAL_PL2303=m
++# CONFIG_USB_SERIAL_OTI6858 is not set
++CONFIG_USB_SERIAL_HP4X=m
++CONFIG_USB_SERIAL_SAFE=m
++CONFIG_USB_SERIAL_SAFE_PADDED=y
++CONFIG_USB_SERIAL_SIERRAWIRELESS=m
++CONFIG_USB_SERIAL_TI=m
++CONFIG_USB_SERIAL_CYBERJACK=m
++CONFIG_USB_SERIAL_XIRCOM=m
++CONFIG_USB_SERIAL_OPTION=y
++CONFIG_USB_SERIAL_OMNINET=m
++# CONFIG_USB_SERIAL_DEBUG is not set
++CONFIG_USB_EZUSB=y
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_AUERSWALD is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++CONFIG_USB_BERRY_CHARGE=m
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_PHIDGET is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_LD is not set
++CONFIG_USB_TRANCEVIBRATOR=m
++CONFIG_USB_IOWARRIOR=m
++# CONFIG_USB_TEST is not set
++
++#
++# USB DSL modem support
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++# CONFIG_USB_GADGET_ATMEL_USBA is not set
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++CONFIG_USB_GADGET_S3C2410=y
++CONFIG_USB_S3C2410=y
++# CONFIG_USB_S3C2410_DEBUG is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++# CONFIG_USB_GADGET_DUALSPEED is not set
++# CONFIG_USB_ZERO is not set
++CONFIG_USB_ETH=y
++CONFIG_USB_ETH_RNDIS=y
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FILE_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_MIDI_GADGET is not set
++
++#
++# SDIO support
++#
++CONFIG_SDIO=y
++CONFIG_SDIO_S3C24XX=y
++CONFIG_SDIO_S3C24XX_DMA=y
++CONFIG_SDIO_AR6000_WLAN=y
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++CONFIG_MMC_UNSAFE_RESUME=y
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++# CONFIG_MMC_BLOCK_BOUNCE is not set
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++# CONFIG_MMC_SPI is not set
++# CONFIG_MMC_S3C is not set
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_S3C24XX=m
++CONFIG_LEDS_GPIO=y
++CONFIG_LEDS_NEO1973_VIBRATOR=y
++CONFIG_LEDS_NEO1973_GTA02=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++CONFIG_RTC_DEBUG=y
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_CMOS is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_S3C=m
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++CONFIG_ROMFS_FS=y
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++CONFIG_DNOTIFY=y
++# CONFIG_AUTOFS_FS is not set
++CONFIG_AUTOFS4_FS=m
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++CONFIG_ISO9660_FS=y
++CONFIG_JOLIET=y
++# CONFIG_ZISOFS is not set
++CONFIG_UDF_FS=y
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=m
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_YAFFS_FS=y
++CONFIG_YAFFS_YAFFS1=y
++CONFIG_YAFFS_9BYTE_TAGS=y
++CONFIG_YAFFS_YAFFS2=y
++CONFIG_YAFFS_AUTO_YAFFS2=y
++# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
++CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=10
++# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
++# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
++CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++CONFIG_JFFS2_SUMMARY=y
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++CONFIG_CRAMFS=y
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++# CONFIG_NETWORK_FILESYSTEMS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++CONFIG_NLS_CODEPAGE_850=m
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++CONFIG_NLS_CODEPAGE_936=m
++CONFIG_NLS_CODEPAGE_950=m
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=y
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_MARKERS=y
++
++#
++# Kernel hacking
++#
++CONFIG_PRINTK_TIME=y
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++CONFIG_DEBUG_SHIRQ=y
++CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
++# CONFIG_SCHEDSTATS is not set
++CONFIG_TIMER_STATS=y
++# CONFIG_DEBUG_SLAB is not set
++CONFIG_DEBUG_PREEMPT=y
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++CONFIG_DEBUG_SPINLOCK=y
++CONFIG_DEBUG_MUTEXES=y
++CONFIG_DEBUG_LOCK_ALLOC=y
++# CONFIG_PROVE_LOCKING is not set
++CONFIG_LOCKDEP=y
++CONFIG_LOCK_STAT=y
++CONFIG_DEBUG_LOCKDEP=y
++CONFIG_DEBUG_SPINLOCK_SLEEP=y
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++CONFIG_STACKTRACE=y
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++CONFIG_DEBUG_INFO=y
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++CONFIG_DEBUG_SG=y
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_SAMPLES is not set
++# CONFIG_DEBUG_USER is not set
++CONFIG_DEBUG_ERRORS=y
++# CONFIG_DEBUG_LL is not set
++# CONFIG_DEBUG_ICEDCC is not set
++# CONFIG_DEBUG_S3C_PORT is not set
++CONFIG_DEBUG_S3C_UART=2
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++CONFIG_CRYPTO=y
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_HASH=y
++CONFIG_CRYPTO_MANAGER=y
++CONFIG_CRYPTO_HMAC=y
++CONFIG_CRYPTO_XCBC=m
++CONFIG_CRYPTO_NULL=m
++CONFIG_CRYPTO_MD4=m
++CONFIG_CRYPTO_MD5=y
++CONFIG_CRYPTO_SHA1=m
++CONFIG_CRYPTO_SHA256=m
++CONFIG_CRYPTO_SHA512=m
++CONFIG_CRYPTO_WP512=m
++CONFIG_CRYPTO_TGR192=m
++CONFIG_CRYPTO_GF128MUL=m
++CONFIG_CRYPTO_ECB=m
++CONFIG_CRYPTO_CBC=y
++CONFIG_CRYPTO_PCBC=m
++CONFIG_CRYPTO_LRW=m
++# CONFIG_CRYPTO_XTS is not set
++# CONFIG_CRYPTO_CRYPTD is not set
++CONFIG_CRYPTO_DES=y
++CONFIG_CRYPTO_FCRYPT=m
++CONFIG_CRYPTO_BLOWFISH=m
++CONFIG_CRYPTO_TWOFISH=m
++CONFIG_CRYPTO_TWOFISH_COMMON=m
++CONFIG_CRYPTO_SERPENT=m
++CONFIG_CRYPTO_AES=m
++CONFIG_CRYPTO_CAST5=m
++CONFIG_CRYPTO_CAST6=m
++CONFIG_CRYPTO_TEA=m
++CONFIG_CRYPTO_ARC4=m
++CONFIG_CRYPTO_KHAZAD=m
++CONFIG_CRYPTO_ANUBIS=m
++# CONFIG_CRYPTO_SEED is not set
++CONFIG_CRYPTO_DEFLATE=m
++CONFIG_CRYPTO_MICHAEL_MIC=m
++CONFIG_CRYPTO_CRC32C=m
++CONFIG_CRYPTO_CAMELLIA=m
++CONFIG_CRYPTO_TEST=m
++# CONFIG_CRYPTO_AUTHENC is not set
++CONFIG_CRYPTO_HW=y
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=m
++CONFIG_CRC16=m
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++CONFIG_LIBCRC32C=m
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_TEXTSEARCH=y
++CONFIG_TEXTSEARCH_KMP=m
++CONFIG_TEXTSEARCH_BM=m
++CONFIG_TEXTSEARCH_FSM=m
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_DMA=y
+Index: linux-2.6.24.7/arch/arm/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/Kconfig 2008-12-11 22:46:48.000000000 +0100
+@@ -865,6 +865,13 @@ config KEXEC
+ initially work for you. It may help to enable device hotplugging
+ support.
+
++config ATAGS_PROC
++ bool "Export atags in procfs"
++ default n
++ help
++ Should the atags used to boot the kernel be exported in an "atags"
++ file in procfs. Useful with kexec.
++
+ endmenu
+
+ if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX )
+@@ -1064,6 +1071,8 @@ source "drivers/hid/Kconfig"
+
+ source "drivers/usb/Kconfig"
+
++source "drivers/sdio/Kconfig"
++
+ source "drivers/mmc/Kconfig"
+
+ source "drivers/leds/Kconfig"
+Index: linux-2.6.24.7/arch/arm/kernel/atags.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/kernel/atags.c 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,86 @@
++#include <linux/slab.h>
++#include <linux/kexec.h>
++#include <linux/proc_fs.h>
++#include <asm/setup.h>
++#include <asm/types.h>
++#include <asm/page.h>
++
++struct buffer {
++ size_t size;
++ char *data;
++};
++static struct buffer tags_buffer;
++
++static int
++read_buffer(char* page, char** start, off_t off, int count,
++ int* eof, void* data)
++{
++ struct buffer *buffer = (struct buffer *)data;
++
++ if (off >= buffer->size) {
++ *eof = 1;
++ return 0;
++ }
++
++ count = min((int) (buffer->size - off), count);
++
++ memcpy(page, &buffer->data[off], count);
++
++ return count;
++}
++
++
++static int
++create_proc_entries(void)
++{
++ struct proc_dir_entry* tags_entry;
++
++ tags_entry = create_proc_read_entry("atags", 0400, &proc_root, read_buffer, &tags_buffer);
++ if (!tags_entry)
++ return -ENOMEM;
++
++ return 0;
++}
++
++
++static char __initdata atags_copy_buf[KEXEC_BOOT_PARAMS_SIZE];
++static char __initdata *atags_copy;
++
++void __init save_atags(const struct tag *tags)
++{
++ atags_copy = atags_copy_buf;
++ memcpy(atags_copy, tags, KEXEC_BOOT_PARAMS_SIZE);
++}
++
++
++static int __init init_atags_procfs(void)
++{
++ struct tag *tag;
++ int error;
++
++ if (!atags_copy) {
++ printk(KERN_WARNING "Exporting ATAGs: No saved tags found\n");
++ return -EIO;
++ }
++
++ for (tag = (struct tag *) atags_copy; tag->hdr.size; tag = tag_next(tag))
++ ;
++
++ tags_buffer.size = ((char *) tag - atags_copy) + sizeof(tag->hdr);
++ tags_buffer.data = kmalloc(tags_buffer.size, GFP_KERNEL);
++ if (tags_buffer.data == NULL)
++ return -ENOMEM;
++ memcpy(tags_buffer.data, atags_copy, tags_buffer.size);
++
++ error = create_proc_entries();
++ if (error) {
++ printk(KERN_ERR "Exporting ATAGs: not enough memory\n");
++ kfree(tags_buffer.data);
++ tags_buffer.size = 0;
++ tags_buffer.data = NULL;
++ }
++
++ return error;
++}
++
++arch_initcall(init_atags_procfs);
+Index: linux-2.6.24.7/arch/arm/kernel/atags.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/kernel/atags.h 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,5 @@
++#ifdef CONFIG_ATAGS_PROC
++extern void save_atags(struct tag *tags);
++#else
++static inline void save_atags(struct tag *tags) { }
++#endif
+Index: linux-2.6.24.7/arch/arm/kernel/machine_kexec.c
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/kernel/machine_kexec.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/kernel/machine_kexec.c 2008-12-11 22:46:48.000000000 +0100
+@@ -21,6 +21,7 @@ extern void setup_mm_for_reboot(char mod
+ extern unsigned long kexec_start_address;
+ extern unsigned long kexec_indirection_page;
+ extern unsigned long kexec_mach_type;
++extern unsigned long kexec_boot_atags;
+
+ /*
+ * Provide a dummy crash_notes definition while crash dump arrives to arm.
+@@ -62,6 +63,7 @@ void machine_kexec(struct kimage *image)
+ kexec_start_address = image->start;
+ kexec_indirection_page = page_list;
+ kexec_mach_type = machine_arch_type;
++ kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
+
+ /* copy our kernel relocation code to the control code page */
+ memcpy(reboot_code_buffer,
+Index: linux-2.6.24.7/arch/arm/kernel/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/kernel/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/kernel/Makefile 2008-12-11 22:46:48.000000000 +0100
+@@ -19,6 +19,7 @@ obj-$(CONFIG_ISA_DMA) += dma-isa.o
+ obj-$(CONFIG_PCI) += bios32.o isa.o
+ obj-$(CONFIG_SMP) += smp.o
+ obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
++obj-$(CONFIG_ATAGS_PROC) += atags.o
+ obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
+
+ obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o
+Index: linux-2.6.24.7/arch/arm/kernel/relocate_kernel.S
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/kernel/relocate_kernel.S 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/kernel/relocate_kernel.S 2008-12-11 22:46:48.000000000 +0100
+@@ -7,23 +7,6 @@
+ .globl relocate_new_kernel
+ relocate_new_kernel:
+
+- /* Move boot params back to where the kernel expects them */
+-
+- ldr r0,kexec_boot_params_address
+- teq r0,#0
+- beq 8f
+-
+- ldr r1,kexec_boot_params_copy
+- mov r6,#KEXEC_BOOT_PARAMS_SIZE/4
+-7:
+- ldr r5,[r1],#4
+- str r5,[r0],#4
+- subs r6,r6,#1
+- bne 7b
+-
+-8:
+- /* Boot params moved, now go on with the kernel */
+-
+ ldr r0,kexec_indirection_page
+ ldr r1,kexec_start_address
+
+@@ -67,7 +50,7 @@ relocate_new_kernel:
+ mov lr,r1
+ mov r0,#0
+ ldr r1,kexec_mach_type
+- ldr r2,kexec_boot_params_address
++ ldr r2,kexec_boot_atags
+ mov pc,lr
+
+ .globl kexec_start_address
+@@ -82,14 +65,9 @@ kexec_indirection_page:
+ kexec_mach_type:
+ .long 0x0
+
+- /* phy addr where new kernel will expect to find boot params */
+- .globl kexec_boot_params_address
+-kexec_boot_params_address:
+- .long 0x0
+-
+- /* phy addr where old kernel put a copy of orig boot params */
+- .globl kexec_boot_params_copy
+-kexec_boot_params_copy:
++ /* phy addr of the atags for the new kernel */
++ .globl kexec_boot_atags
++kexec_boot_atags:
+ .long 0x0
+
+ relocate_new_kernel_end:
+Index: linux-2.6.24.7/arch/arm/kernel/setup.c
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/kernel/setup.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/kernel/setup.c 2008-12-11 22:46:48.000000000 +0100
+@@ -24,7 +24,6 @@
+ #include <linux/interrupt.h>
+ #include <linux/smp.h>
+ #include <linux/fs.h>
+-#include <linux/kexec.h>
+
+ #include <asm/cpu.h>
+ #include <asm/elf.h>
+@@ -39,6 +38,7 @@
+ #include <asm/mach/time.h>
+
+ #include "compat.h"
++#include "atags.h"
+
+ #ifndef MEM_SIZE
+ #define MEM_SIZE (16*1024*1024)
+@@ -784,23 +784,6 @@ static int __init customize_machine(void
+ }
+ arch_initcall(customize_machine);
+
+-#ifdef CONFIG_KEXEC
+-
+-/* Physical addr of where the boot params should be for this machine */
+-extern unsigned long kexec_boot_params_address;
+-
+-/* Physical addr of the buffer into which the boot params are copied */
+-extern unsigned long kexec_boot_params_copy;
+-
+-/* Pointer to the boot params buffer, for manipulation and display */
+-unsigned long kexec_boot_params;
+-EXPORT_SYMBOL(kexec_boot_params);
+-
+-/* The buffer itself - make sure it is sized correctly */
+-static unsigned long kexec_boot_params_buf[(KEXEC_BOOT_PARAMS_SIZE + 3) / 4];
+-
+-#endif
+-
+ void __init setup_arch(char **cmdline_p)
+ {
+ struct tag *tags = (struct tag *)&init_tags;
+@@ -819,18 +802,6 @@ void __init setup_arch(char **cmdline_p)
+ else if (mdesc->boot_params)
+ tags = phys_to_virt(mdesc->boot_params);
+
+-#ifdef CONFIG_KEXEC
+- kexec_boot_params_copy = virt_to_phys(kexec_boot_params_buf);
+- kexec_boot_params = (unsigned long)kexec_boot_params_buf;
+- if (__atags_pointer) {
+- kexec_boot_params_address = __atags_pointer;
+- memcpy((void *)kexec_boot_params, tags, KEXEC_BOOT_PARAMS_SIZE);
+- } else if (mdesc->boot_params) {
+- kexec_boot_params_address = mdesc->boot_params;
+- memcpy((void *)kexec_boot_params, tags, KEXEC_BOOT_PARAMS_SIZE);
+- }
+-#endif
+-
+ /*
+ * If we have the old style parameters, convert them to
+ * a tag list.
+@@ -846,6 +817,7 @@ void __init setup_arch(char **cmdline_p)
+ if (tags->hdr.tag == ATAG_CORE) {
+ if (meminfo.nr_banks != 0)
+ squash_mem_tags(tags);
++ save_atags(tags);
+ parse_tags(tags);
+ }
+
+Index: linux-2.6.24.7/arch/arm/mach-s3c2410/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/mach-s3c2410/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/mach-s3c2410/Kconfig 2008-12-11 22:46:48.000000000 +0100
+@@ -9,6 +9,7 @@ config CPU_S3C2410
+ depends on ARCH_S3C2410
+ select S3C2410_CLOCK
+ select S3C2410_GPIO
++ select S3C2410_PWM
+ select CPU_LLSERIAL_S3C2410
+ select S3C2410_PM if PM
+ help
+@@ -37,6 +38,11 @@ config S3C2410_CLOCK
+ help
+ Clock code for the S3C2410, and similar processors
+
++config S3C2410_PWM
++ bool
++ help
++ PWM timer code for the S3C2410, and similar processors
++
+
+ menu "S3C2410 Machines"
+
+@@ -107,8 +113,17 @@ config MACH_VR1000
+ config MACH_QT2410
+ bool "QT2410"
+ select CPU_S3C2410
++ select DISPLAY_JBT6K74
+ help
+ Say Y here if you are using the Armzone QT2410
+
++config MACH_NEO1973_GTA01
++ bool "FIC Neo1973 GSM Phone (GTA01 Hardware)"
++ select CPU_S3C2410
++ select MACH_NEO1973
++ select SENSORS_PCF50606
++ help
++ Say Y here if you are using the FIC Neo1973 GSM Phone
++
+ endmenu
+
+Index: linux-2.6.24.7/arch/arm/mach-s3c2410/mach-gta01.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2410/mach-gta01.c 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,763 @@
++/*
++ * linux/arch/arm/mach-s3c2410/mach-gta01.c
++ *
++ * S3C2410 Machine Support for the FIC Neo1973 GTA01
++ *
++ * Copyright (C) 2006-2007 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++
++#include <linux/kernel.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/list.h>
++#include <linux/timer.h>
++#include <linux/init.h>
++#include <linux/workqueue.h>
++#include <linux/platform_device.h>
++#include <linux/serial_core.h>
++#include <asm/arch/ts.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/spi_bitbang.h>
++#include <linux/mmc/mmc.h>
++#include <linux/mmc/host.h>
++
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/nand.h>
++#include <linux/mtd/nand_ecc.h>
++#include <linux/mtd/partitions.h>
++
++#include <linux/mmc/host.h>
++
++#include <linux/pcf50606.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++
++#include <asm/hardware.h>
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/mach-types.h>
++
++#include <asm/arch/regs-gpio.h>
++#include <asm/arch/fb.h>
++#include <asm/arch/mci.h>
++#include <asm/arch/spi.h>
++#include <asm/arch/spi-gpio.h>
++#include <asm/arch/usb-control.h>
++
++#include <asm/arch/gta01.h>
++
++#include <asm/plat-s3c/regs-serial.h>
++#include <asm/plat-s3c/nand.h>
++#include <asm/plat-s3c24xx/devs.h>
++#include <asm/plat-s3c24xx/cpu.h>
++#include <asm/plat-s3c24xx/pm.h>
++#include <asm/plat-s3c24xx/udc.h>
++#include <asm/plat-s3c24xx/neo1973.h>
++#include <asm/arch-s3c2410/neo1973-pm-gsm.h>
++
++#include "../plat-s3c24xx/neo1973_pm_gps.h"
++
++#include <linux/jbt6k74.h>
++
++static struct map_desc gta01_iodesc[] __initdata = {
++ {
++ .virtual = 0xe0000000,
++ .pfn = __phys_to_pfn(S3C2410_CS3+0x01000000),
++ .length = SZ_1M,
++ .type = MT_DEVICE
++ },
++};
++
++#define UCON S3C2410_UCON_DEFAULT
++#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
++#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
++/* UFCON for the gta01 sets the FIFO trigger level at 4, not 8 */
++#define UFCON_GTA01_PORT0 S3C2410_UFCON_FIFOMODE
++
++static struct s3c2410_uartcfg gta01_uartcfgs[] = {
++ [0] = {
++ .hwport = 0,
++ .flags = 0,
++ .ucon = UCON,
++ .ulcon = ULCON,
++ .ufcon = UFCON_GTA01_PORT0,
++ },
++ [1] = {
++ .hwport = 1,
++ .flags = 0,
++ .ucon = UCON,
++ .ulcon = ULCON,
++ .ufcon = UFCON,
++ },
++};
++
++/* PMU driver info */
++
++static int pmu_callback(struct device *dev, unsigned int feature,
++ enum pmu_event event)
++{
++ switch (feature) {
++ case PCF50606_FEAT_ACD:
++ switch (event) {
++ case PMU_EVT_INSERT:
++ pcf50606_charge_fast(pcf50606_global, 1);
++ break;
++ case PMU_EVT_REMOVE:
++ pcf50606_charge_fast(pcf50606_global, 0);
++ break;
++ default:
++ break;
++ }
++ break;
++ default:
++ break;
++ }
++
++ return 0;
++}
++
++static struct pcf50606_platform_data gta01_pcf_pdata = {
++ .used_features = PCF50606_FEAT_EXTON |
++ PCF50606_FEAT_MBC |
++ PCF50606_FEAT_BBC |
++ PCF50606_FEAT_RTC |
++ PCF50606_FEAT_WDT |
++ PCF50606_FEAT_CHGCUR |
++ PCF50606_FEAT_BATVOLT |
++ PCF50606_FEAT_BATTEMP,
++ .onkey_seconds_required = 3,
++ .cb = &pmu_callback,
++ .r_fix_batt = 10000,
++ .r_fix_batt_par = 10000,
++ .r_sense_milli = 220,
++ .rails = {
++ [PCF50606_REGULATOR_D1REG] = {
++ .name = "bt_3v15",
++ .voltage = {
++ .init = 3150,
++ .max = 3150,
++ },
++ },
++ [PCF50606_REGULATOR_D2REG] = {
++ .name = "gl_2v5",
++ .voltage = {
++ .init = 2500,
++ .max = 2500,
++ },
++ },
++ [PCF50606_REGULATOR_D3REG] = {
++ .name = "stby_1v8",
++ .flags = PMU_VRAIL_F_SUSPEND_ON,
++ .voltage = {
++ .init = 1800,
++ .max = 2100,
++ },
++ },
++ [PCF50606_REGULATOR_DCD] = {
++ .name = "gl_1v5",
++ .voltage = {
++ .init = 1500,
++ .max = 1500,
++ },
++ },
++ [PCF50606_REGULATOR_DCDE] = {
++ .name = "io_3v3",
++ .flags = PMU_VRAIL_F_SUSPEND_ON,
++ .voltage = {
++ .init = 3300,
++ .max = 3330,
++ },
++ },
++ [PCF50606_REGULATOR_DCUD] = {
++ .name = "core_1v8",
++ .flags = PMU_VRAIL_F_SUSPEND_ON,
++ .voltage = {
++ .init = 2100,
++ .max = 2100,
++ },
++ },
++ [PCF50606_REGULATOR_IOREG] = {
++ .name = "codec_3v3",
++ .voltage = {
++ .init = 3300,
++ .max = 3300,
++ },
++ },
++ [PCF50606_REGULATOR_LPREG] = {
++ .name = "lcm_3v3",
++ .voltage = {
++ .init = 3300,
++ .max = 3300,
++ },
++ }
++ },
++};
++
++static void cfg_pmu_vrail(struct pmu_voltage_rail *vrail, char *name,
++ unsigned int flags, unsigned int init,
++ unsigned int max)
++{
++ vrail->name = name;
++ vrail->flags = flags;
++ vrail->voltage.init = init;
++ vrail->voltage.max = max;
++}
++
++static void mangle_pmu_pdata_by_system_rev(void)
++{
++ switch (system_rev) {
++ case GTA01Bv4_SYSTEM_REV:
++ gta01_pcf_pdata.used_features |= PCF50606_FEAT_ACD;
++ break;
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv2_SYSTEM_REV:
++ gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG]
++ .name = "user1";
++ gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG]
++ .flags &= ~PMU_VRAIL_F_SUSPEND_ON;
++ gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG]
++ .flags = PMU_VRAIL_F_UNUSED;
++ break;
++ case GTA01v4_SYSTEM_REV:
++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_DCUD],
++ "core_1v8", PMU_VRAIL_F_SUSPEND_ON, 1800, 1800);
++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D1REG],
++ "vrf_3v", 0, 3000, 3000);
++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG],
++ "vtcxo_2v8", 0, 2800, 2800);
++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_DCD],
++ "gl_3v5", 0, 3500, 3500);
++ break;
++ case GTA01v3_SYSTEM_REV:
++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D1REG],
++ "vrf_3v", 0, 3000, 3000);
++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D2REG],
++ "sd_3v3", 0, 3300, 3300);
++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG],
++ "codec_3v3", 0, 3300, 3300);
++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_DCD],
++ "gpsio_3v3", 0, 3300, 3300);
++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_DCUD],
++ "core_1v8", PMU_VRAIL_F_SUSPEND_ON, 1800, 1800);
++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_IOREG],
++ "vtcxo_2v8", 0, 2800, 2800);
++ break;
++ }
++}
++
++static struct resource gta01_pmu_resources[] = {
++ [0] = {
++ .flags = IORESOURCE_IRQ,
++ .start = GTA01_IRQ_PCF50606,
++ .end = GTA01_IRQ_PCF50606,
++ },
++};
++
++struct platform_device gta01_pmu_dev = {
++ .name = "pcf50606",
++ .num_resources = ARRAY_SIZE(gta01_pmu_resources),
++ .resource = gta01_pmu_resources,
++ .dev = {
++ .platform_data = >a01_pcf_pdata,
++ },
++};
++
++/* LCD driver info */
++
++/* Configuration for 480x640 toppoly TD028TTEC1.
++ * Do not mark this as __initdata or it will break! */
++static struct s3c2410fb_display gta01_displays[] = {
++ {
++ .type = S3C2410_LCDCON1_TFT,
++ .width = 43,
++ .height = 58,
++ .xres = 480,
++ .yres = 640,
++ .bpp = 16,
++
++ .pixclock = 40000, /* HCLK/4 */
++ .left_margin = 104,
++ .right_margin = 8,
++ .hsync_len = 8,
++ .upper_margin = 2,
++ .lower_margin = 16,
++ .vsync_len = 2,
++ .lcdcon5 = S3C2410_LCDCON5_FRM565 |
++ S3C2410_LCDCON5_INVVCLK |
++ S3C2410_LCDCON5_INVVLINE |
++ S3C2410_LCDCON5_INVVFRAME |
++ S3C2410_LCDCON5_PWREN |
++ S3C2410_LCDCON5_HWSWP,
++ },
++ {
++ .type = S3C2410_LCDCON1_TFT,
++ .width = 43,
++ .height = 58,
++ .xres = 480,
++ .yres = 640,
++ .bpp = 32,
++
++ .pixclock = 40000, /* HCLK/4 */
++ .left_margin = 104,
++ .right_margin = 8,
++ .hsync_len = 8,
++ .upper_margin = 2,
++ .lower_margin = 16,
++ .vsync_len = 2,
++ .lcdcon5 = S3C2410_LCDCON5_FRM565 |
++ S3C2410_LCDCON5_INVVCLK |
++ S3C2410_LCDCON5_INVVLINE |
++ S3C2410_LCDCON5_INVVFRAME |
++ S3C2410_LCDCON5_PWREN |
++ S3C2410_LCDCON5_HWSWP,
++ },
++ {
++ .type = S3C2410_LCDCON1_TFT,
++ .width = 43,
++ .height = 58,
++ .xres = 240,
++ .yres = 320,
++ .bpp = 16,
++
++ .pixclock = 40000, /* HCLK/4 */
++ .left_margin = 104,
++ .right_margin = 8,
++ .hsync_len = 8,
++ .upper_margin = 2,
++ .lower_margin = 16,
++ .vsync_len = 2,
++ .lcdcon5 = S3C2410_LCDCON5_FRM565 |
++ S3C2410_LCDCON5_INVVCLK |
++ S3C2410_LCDCON5_INVVLINE |
++ S3C2410_LCDCON5_INVVFRAME |
++ S3C2410_LCDCON5_PWREN |
++ S3C2410_LCDCON5_HWSWP,
++ },
++};
++
++static struct s3c2410fb_mach_info gta01_lcd_cfg __initdata = {
++ .displays = gta01_displays,
++ .num_displays = ARRAY_SIZE(gta01_displays),
++ .default_display = 0,
++
++ .lpcsel = ((0xCE6) & ~7) | 1<<4,
++};
++
++static struct platform_device *gta01_devices[] __initdata = {
++ &s3c_device_usb,
++ &s3c_device_lcd,
++ &s3c_device_wdt,
++ &s3c_device_i2c,
++ &s3c_device_iis,
++ &s3c_device_sdi,
++ &s3c_device_usbgadget,
++ &s3c_device_nand,
++ &s3c_device_ts,
++};
++
++static struct s3c2410_nand_set gta01_nand_sets[] = {
++ [0] = {
++ .name = "neo1973-nand",
++ .nr_chips = 1,
++ .flags = S3C2410_NAND_BBT,
++ },
++};
++
++static struct s3c2410_platform_nand gta01_nand_info = {
++ .tacls = 20,
++ .twrph0 = 60,
++ .twrph1 = 20,
++ .nr_sets = ARRAY_SIZE(gta01_nand_sets),
++ .sets = gta01_nand_sets,
++};
++
++static void gta01_mmc_set_power(unsigned char power_mode, unsigned short vdd)
++{
++ int bit;
++ int mv = 1700; /* 1.7V for MMC_VDD_165_195 */
++
++ printk(KERN_DEBUG "mmc_set_power(power_mode=%u, vdd=%u)\n",
++ power_mode, vdd);
++
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ switch (power_mode) {
++ case MMC_POWER_OFF:
++ pcf50606_onoff_set(pcf50606_global,
++ PCF50606_REGULATOR_D2REG, 0);
++ break;
++ case MMC_POWER_ON:
++ /* translate MMC_VDD_* VDD bit to mv */
++ for (bit = 8; bit != 24; bit++)
++ if (vdd == (1 << bit))
++ mv += 100 * (bit - 4);
++ pcf50606_voltage_set(pcf50606_global,
++ PCF50606_REGULATOR_D2REG, mv);
++ pcf50606_onoff_set(pcf50606_global,
++ PCF50606_REGULATOR_D2REG, 1);
++ break;
++ }
++ break;
++ case GTA01v4_SYSTEM_REV:
++ case GTA01Bv2_SYSTEM_REV:
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ switch (power_mode) {
++ case MMC_POWER_OFF:
++ neo1973_gpb_setpin(GTA01_GPIO_SDMMC_ON, 1);
++ break;
++ case MMC_POWER_ON:
++ neo1973_gpb_setpin(GTA01_GPIO_SDMMC_ON, 0);
++ break;
++ }
++ break;
++ }
++}
++
++static int gta01_mmc_use_slow(void)
++{
++ return neo1973_pm_gps_is_on();
++}
++
++static struct s3c24xx_mci_pdata gta01_mmc_cfg = {
++ .gpio_detect = GTA01_GPIO_nSD_DETECT,
++ .set_power = >a01_mmc_set_power,
++ .use_slow = >a01_mmc_use_slow,
++ .ocr_avail = MMC_VDD_165_195|MMC_VDD_20_21|
++ MMC_VDD_21_22|MMC_VDD_22_23|MMC_VDD_23_24|
++ MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27|
++ MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
++ MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33,
++};
++
++static void gta01_udc_command(enum s3c2410_udc_cmd_e cmd)
++{
++ printk(KERN_DEBUG "%s(%d)\n", __func__, cmd);
++
++ switch (cmd) {
++ case S3C2410_UDC_P_ENABLE:
++ neo1973_gpb_setpin(GTA01_GPIO_USB_PULLUP, 1);
++ break;
++ case S3C2410_UDC_P_DISABLE:
++ neo1973_gpb_setpin(GTA01_GPIO_USB_PULLUP, 0);
++ break;
++ default:
++ break;
++ }
++}
++
++/* use a work queue, since I2C API inherently schedules
++ * and we get called in hardirq context from UDC driver */
++
++struct vbus_draw {
++ struct work_struct work;
++ int ma;
++};
++static struct vbus_draw gta01_udc_vbus_drawer;
++
++static void __gta01_udc_vbus_draw(struct work_struct *work)
++{
++ /* this is a fix to work around boot-time ordering problems if the
++ * s3c2410_udc is initialized before the pcf50606 driver has defined
++ * pcf50606_global */
++ if (!pcf50606_global)
++ return;
++
++ if (gta01_udc_vbus_drawer.ma >= 500) {
++ /* enable fast charge */
++ printk(KERN_DEBUG "udc: enabling fast charge\n");
++ pcf50606_charge_fast(pcf50606_global, 1);
++ } else {
++ /* disable fast charge */
++ printk(KERN_DEBUG "udc: disabling fast charge\n");
++ pcf50606_charge_fast(pcf50606_global, 0);
++ }
++}
++
++static void gta01_udc_vbus_draw(unsigned int ma)
++{
++ gta01_udc_vbus_drawer.ma = ma;
++ schedule_work(>a01_udc_vbus_drawer.work);
++}
++
++static struct s3c2410_udc_mach_info gta01_udc_cfg = {
++ .vbus_draw = gta01_udc_vbus_draw,
++};
++
++static struct s3c2410_ts_mach_info gta01_ts_cfg = {
++ .delay = 10000,
++ .presc = 50000000 / 1000000, /* 50 MHz PCLK / 1MHz */
++ /* simple averaging, 2^n samples */
++ .oversampling_shift = 5,
++ /* averaging filter length, 2^n */
++ .excursion_filter_len_bits = 5,
++ /* flagged for beauty contest on next sample if differs from
++ * average more than this
++ */
++ .reject_threshold_vs_avg = 2,
++};
++
++/* SPI */
++
++static void gta01_jbt6k74_reset(int devidx, int level)
++{
++ /* empty place holder; gta01 does not yet use this */
++ printk(KERN_DEBUG "gta01_jbt6k74_reset\n");
++}
++
++static void gta01_jbt6k74_resuming(int devidx)
++{
++ gta01bl_deferred_resume();
++}
++
++const struct jbt6k74_platform_data gta01_jbt6k74_pdata = {
++ .reset = gta01_jbt6k74_reset,
++ .resuming = gta01_jbt6k74_resuming,
++};
++
++static struct spi_board_info gta01_spi_board_info[] = {
++ {
++ .modalias = "jbt6k74",
++ .platform_data = >a01_jbt6k74_pdata,
++ /* controller_data */
++ /* irq */
++ .max_speed_hz = 10 * 1000 * 1000,
++ .bus_num = 1,
++ /* chip_select */
++ },
++};
++
++static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int csidx, int cs)
++{
++ switch (cs) {
++ case BITBANG_CS_ACTIVE:
++ s3c2410_gpio_setpin(S3C2410_GPG3, 0);
++ break;
++ case BITBANG_CS_INACTIVE:
++ s3c2410_gpio_setpin(S3C2410_GPG3, 1);
++ break;
++ }
++}
++
++static struct s3c2410_spigpio_info spi_gpio_cfg = {
++ .pin_clk = S3C2410_GPG7,
++ .pin_mosi = S3C2410_GPG6,
++ .pin_miso = S3C2410_GPG5,
++ .board_size = ARRAY_SIZE(gta01_spi_board_info),
++ .board_info = gta01_spi_board_info,
++ .chip_select = &spi_gpio_cs,
++ .num_chipselect = 2, /*** Should be 1 or 2 for gta01? ***/
++};
++
++static struct resource s3c_spi_lcm_resource[] = {
++ [0] = {
++ .start = S3C2410_GPG3,
++ .end = S3C2410_GPG3,
++ },
++ [1] = {
++ .start = S3C2410_GPG5,
++ .end = S3C2410_GPG5,
++ },
++ [2] = {
++ .start = S3C2410_GPG6,
++ .end = S3C2410_GPG6,
++ },
++ [3] = {
++ .start = S3C2410_GPG7,
++ .end = S3C2410_GPG7,
++ },
++};
++
++struct platform_device s3c_device_spi_lcm = {
++ .name = "spi_s3c24xx_gpio",
++ .id = 1,
++ .num_resources = ARRAY_SIZE(s3c_spi_lcm_resource),
++ .resource = s3c_spi_lcm_resource,
++ .dev = {
++ .platform_data = &spi_gpio_cfg,
++ },
++};
++
++static struct gta01bl_machinfo backlight_machinfo = {
++ .default_intensity = 1,
++ .max_intensity = 1,
++ .limit_mask = 1,
++ .defer_resume_backlight = 1,
++};
++
++static struct resource gta01_bl_resources[] = {
++ [0] = {
++ .start = GTA01_GPIO_BACKLIGHT,
++ .end = GTA01_GPIO_BACKLIGHT,
++ },
++};
++
++struct platform_device gta01_bl_dev = {
++ .name = "gta01-bl",
++ .num_resources = ARRAY_SIZE(gta01_bl_resources),
++ .resource = gta01_bl_resources,
++ .dev = {
++ .platform_data = &backlight_machinfo,
++ },
++};
++
++static struct resource gta01_led_resources[] = {
++ [0] = {
++ .start = GTA01_GPIO_VIBRATOR_ON,
++ .end = GTA01_GPIO_VIBRATOR_ON,
++ },
++};
++
++struct platform_device gta01_led_dev = {
++ .name = "neo1973-vibrator",
++ .num_resources = ARRAY_SIZE(gta01_led_resources),
++ .resource = gta01_led_resources,
++};
++
++static struct resource gta01_button_resources[] = {
++ [0] = {
++ .start = GTA01_GPIO_AUX_KEY,
++ .end = GTA01_GPIO_AUX_KEY,
++ },
++ [1] = {
++ .start = GTA01_GPIO_HOLD_KEY,
++ .end = GTA01_GPIO_HOLD_KEY,
++ },
++ [2] = {
++ .start = GTA01_GPIO_JACK_INSERT,
++ .end = GTA01_GPIO_JACK_INSERT,
++ },
++};
++
++struct platform_device gta01_button_dev = {
++ .name = "neo1973-button",
++ .num_resources = ARRAY_SIZE(gta01_button_resources),
++ .resource = gta01_button_resources,
++};
++
++static struct platform_device gta01_pm_gsm_dev = {
++ .name = "neo1973-pm-gsm",
++};
++
++/* USB */
++static struct s3c2410_hcd_info gta01_usb_info = {
++ .port[0] = {
++ .flags = S3C_HCDFLG_USED,
++ },
++ .port[1] = {
++ .flags = 0,
++ },
++};
++
++static void __init gta01_map_io(void)
++{
++ s3c24xx_init_io(gta01_iodesc, ARRAY_SIZE(gta01_iodesc));
++ s3c24xx_init_clocks(12*1000*1000);
++ s3c24xx_init_uarts(gta01_uartcfgs, ARRAY_SIZE(gta01_uartcfgs));
++}
++
++static irqreturn_t gta01_modem_irq(int irq, void *param)
++{
++ printk(KERN_DEBUG "GSM wakeup interrupt (IRQ %d)\n", irq);
++ gta_gsm_interrupts++;
++ return IRQ_HANDLED;
++}
++
++static void __init gta01_machine_init(void)
++{
++ int rc;
++
++ if (system_rev == GTA01v4_SYSTEM_REV ||
++ system_rev == GTA01Bv2_SYSTEM_REV ||
++ system_rev == GTA01Bv3_SYSTEM_REV ||
++ system_rev == GTA01Bv4_SYSTEM_REV) {
++ gta01_udc_cfg.udc_command = gta01_udc_command;
++ gta01_mmc_cfg.ocr_avail = MMC_VDD_32_33;
++ }
++
++ s3c_device_usb.dev.platform_data = >a01_usb_info;
++ s3c_device_nand.dev.platform_data = >a01_nand_info;
++ s3c_device_sdi.dev.platform_data = >a01_mmc_cfg;
++
++ s3c24xx_fb_set_platdata(>a01_lcd_cfg);
++
++ INIT_WORK(>a01_udc_vbus_drawer.work, __gta01_udc_vbus_draw);
++ s3c24xx_udc_set_platdata(>a01_udc_cfg);
++ set_s3c2410ts_info(>a01_ts_cfg);
++
++ /* Set LCD_RESET / XRES to high */
++ s3c2410_gpio_cfgpin(S3C2410_GPC6, S3C2410_GPIO_OUTPUT);
++ s3c2410_gpio_setpin(S3C2410_GPC6, 1);
++
++ /* SPI chip select is gpio output */
++ s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPIO_OUTPUT);
++ s3c2410_gpio_setpin(S3C2410_GPG3, 1);
++ platform_device_register(&s3c_device_spi_lcm);
++
++ platform_device_register(>a01_bl_dev);
++ platform_device_register(>a01_button_dev);
++ platform_device_register(>a01_pm_gsm_dev);
++
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ case GTA01v4_SYSTEM_REV:
++ /* just use the default (GTA01_IRQ_PCF50606) */
++ break;
++ case GTA01Bv2_SYSTEM_REV:
++ case GTA01Bv3_SYSTEM_REV:
++ /* just use the default (GTA01_IRQ_PCF50606) */
++ gta01_led_resources[0].start =
++ gta01_led_resources[0].end = GTA01Bv2_GPIO_VIBRATOR_ON;
++ break;
++ case GTA01Bv4_SYSTEM_REV:
++ gta01_pmu_resources[0].start =
++ gta01_pmu_resources[0].end = GTA01Bv4_IRQ_PCF50606;
++ gta01_led_resources[0].start =
++ gta01_led_resources[0].end = GTA01Bv4_GPIO_VIBRATOR_ON;
++ break;
++ }
++ mangle_pmu_pdata_by_system_rev();
++ platform_device_register(>a01_pmu_dev);
++ platform_device_register(>a01_led_dev);
++
++ platform_add_devices(gta01_devices, ARRAY_SIZE(gta01_devices));
++
++ s3c2410_pm_init();
++
++ set_irq_type(GTA01_IRQ_MODEM, IRQT_RISING);
++ rc = request_irq(GTA01_IRQ_MODEM, gta01_modem_irq, IRQF_DISABLED,
++ "modem", NULL);
++ enable_irq_wake(GTA01_IRQ_MODEM);
++ printk(KERN_DEBUG "Enabled GSM wakeup IRQ %d (rc=%d)\n",
++ GTA01_IRQ_MODEM, rc);
++}
++
++MACHINE_START(NEO1973_GTA01, "GTA01")
++ .phys_io = S3C2410_PA_UART,
++ .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
++ .boot_params = S3C2410_SDRAM_PA + 0x100,
++ .map_io = gta01_map_io,
++ .init_irq = s3c24xx_init_irq,
++ .init_machine = gta01_machine_init,
++ .timer = &s3c24xx_timer,
++MACHINE_END
+Index: linux-2.6.24.7/arch/arm/mach-s3c2410/mach-h1940.c
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/mach-s3c2410/mach-h1940.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/mach-s3c2410/mach-h1940.c 2008-12-11 22:46:48.000000000 +0100
+@@ -38,6 +38,7 @@
+ #include <asm/arch/h1940.h>
+ #include <asm/arch/h1940-latch.h>
+ #include <asm/arch/fb.h>
++#include <asm/arch/tc.h>
+ #include <asm/plat-s3c24xx/udc.h>
+
+ #include <asm/plat-s3c24xx/clock.h>
+@@ -129,6 +130,11 @@ static struct s3c2410_udc_mach_info h194
+ .vbus_pin_inverted = 1,
+ };
+
++static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = {
++ .delay = 10000,
++ .presc = 49,
++ .oversampling_shift = 2,
++};
+
+ /**
+ * Set lcd on or off
+@@ -186,6 +192,7 @@ static struct platform_device *h1940_dev
+ &s3c_device_i2c,
+ &s3c_device_iis,
+ &s3c_device_usbgadget,
++ &s3c_device_ts,
+ &s3c_device_leds,
+ &s3c_device_bluetooth,
+ };
+@@ -214,6 +221,7 @@ static void __init h1940_init(void)
+ u32 tmp;
+
+ s3c24xx_fb_set_platdata(&h1940_fb_info);
++ set_s3c2410ts_info(&h1940_ts_cfg);
+ s3c24xx_udc_set_platdata(&h1940_udc_cfg);
+
+ /* Turn off suspend on both USB ports, and switch the
+Index: linux-2.6.24.7/arch/arm/mach-s3c2410/mach-qt2410.c
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/mach-s3c2410/mach-qt2410.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/mach-s3c2410/mach-qt2410.c 2008-12-11 22:46:48.000000000 +0100
+@@ -1,6 +1,6 @@
+ /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
+ *
+- * Copyright (C) 2006 by OpenMoko, Inc.
++ * Copyright (C) 2006 by Openmoko, Inc.
+ * Author: Harald Welte <laforge@openmoko.org>
+ * All rights reserved.
+ *
+@@ -214,7 +214,7 @@ static struct platform_device qt2410_led
+
+ /* SPI */
+
+-static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs)
++static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int csidx, int cs)
+ {
+ switch (cs) {
+ case BITBANG_CS_ACTIVE:
+@@ -321,6 +321,24 @@ static int __init qt2410_tft_setup(char
+
+ __setup("tft=", qt2410_tft_setup);
+
++static struct resource qt2410_button_resources[] = {
++ [0] = {
++ .start = S3C2410_GPF0,
++ .end = S3C2410_GPF0,
++ },
++ [1] = {
++ .start = S3C2410_GPF2,
++ .end = S3C2410_GPF2,
++ },
++};
++
++struct platform_device qt2410_button_dev = {
++ .name ="qt2410-button",
++ .num_resources = ARRAY_SIZE(qt2410_button_resources),
++ .resource = qt2410_button_resources,
++};
++
++
+ static void __init qt2410_map_io(void)
+ {
+ s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
+Index: linux-2.6.24.7/arch/arm/mach-s3c2410/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/mach-s3c2410/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/mach-s3c2410/Makefile 2008-12-11 22:46:48.000000000 +0100
+@@ -16,6 +16,7 @@ obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o
+ obj-$(CONFIG_S3C2410_PM) += pm.o sleep.o
+ obj-$(CONFIG_S3C2410_GPIO) += gpio.o
+ obj-$(CONFIG_S3C2410_CLOCK) += clock.o
++obj-$(CONFIG_S3C2410_PWM) += pwm.o
+
+ # Machine support
+
+@@ -29,3 +30,4 @@ obj-$(CONFIG_MACH_AML_M5900) += mach-aml
+ obj-$(CONFIG_BAST_PC104_IRQ) += bast-irq.o
+ obj-$(CONFIG_MACH_VR1000) += mach-vr1000.o usb-simtec.o
+ obj-$(CONFIG_MACH_QT2410) += mach-qt2410.o
++obj-$(CONFIG_MACH_NEO1973_GTA01)+= mach-gta01.o
+Index: linux-2.6.24.7/arch/arm/mach-s3c2410/pwm.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2410/pwm.c 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,277 @@
++/*
++ * arch/arm/mach-s3c2410/3c2410-pwm.c
++ *
++ * Copyright (c) by Javi Roman <javiroman@kernel-labs.org>
++ * for the Openmoko Project.
++ *
++ * S3C2410A SoC PWM support
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
++ *
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <asm/hardware.h>
++#include <asm/plat-s3c/regs-timer.h>
++#include <asm/arch/pwm.h>
++
++#ifdef CONFIG_PM
++ static unsigned long standby_reg_tcon;
++ static unsigned long standby_reg_tcfg0;
++ static unsigned long standby_reg_tcfg1;
++#endif
++
++int s3c2410_pwm_disable(struct s3c2410_pwm *pwm)
++{
++ unsigned long tcon;
++
++ /* stop timer */
++ tcon = __raw_readl(S3C2410_TCON);
++ tcon &= 0xffffff00;
++ __raw_writel(tcon, S3C2410_TCON);
++
++ clk_disable(pwm->pclk);
++ clk_put(pwm->pclk);
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(s3c2410_pwm_disable);
++
++int s3c2410_pwm_init(struct s3c2410_pwm *pwm)
++{
++ pwm->pclk = clk_get(NULL, "timers");
++ if (IS_ERR(pwm->pclk))
++ return PTR_ERR(pwm->pclk);
++
++ clk_enable(pwm->pclk);
++ pwm->pclk_rate = clk_get_rate(pwm->pclk);
++ return 0;
++}
++EXPORT_SYMBOL_GPL(s3c2410_pwm_init);
++
++int s3c2410_pwm_enable(struct s3c2410_pwm *pwm)
++{
++ unsigned long tcfg0, tcfg1, tcnt, tcmp;
++
++ /* control registers bits */
++ tcfg1 = __raw_readl(S3C2410_TCFG1);
++ tcfg0 = __raw_readl(S3C2410_TCFG0);
++
++ /* divider & scaler slection */
++ switch (pwm->timerid) {
++ case PWM0:
++ tcfg1 &= ~S3C2410_TCFG1_MUX0_MASK;
++ tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK;
++ break;
++ case PWM1:
++ tcfg1 &= ~S3C2410_TCFG1_MUX1_MASK;
++ tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK;
++ break;
++ case PWM2:
++ tcfg1 &= ~S3C2410_TCFG1_MUX2_MASK;
++ tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
++ break;
++ case PWM3:
++ tcfg1 &= ~S3C2410_TCFG1_MUX3_MASK;
++ tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
++ break;
++ case PWM4:
++ /* timer four is not capable of doing PWM */
++ break;
++ default:
++ clk_disable(pwm->pclk);
++ clk_put(pwm->pclk);
++ return -1;
++ }
++
++ /* divider & scaler values */
++ tcfg1 |= pwm->divider;
++ __raw_writel(tcfg1, S3C2410_TCFG1);
++
++ switch (pwm->timerid) {
++ case PWM0:
++ case PWM1:
++ tcfg0 |= pwm->prescaler;
++ __raw_writel(tcfg0, S3C2410_TCFG0);
++ break;
++ default:
++ if ((tcfg0 | pwm->prescaler) != tcfg0) {
++ printk(KERN_WARNING "not changing prescaler of PWM %u,"
++ " since it's shared with timer4 (clock tick)\n",
++ pwm->timerid);
++ }
++ break;
++ }
++
++ /* timer count and compare buffer initial values */
++ tcnt = pwm->counter;
++ tcmp = pwm->comparer;
++
++ __raw_writel(tcnt, S3C2410_TCNTB(pwm->timerid));
++ __raw_writel(tcmp, S3C2410_TCMPB(pwm->timerid));
++
++ /* ensure timer is stopped */
++ s3c2410_pwm_stop(pwm);
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(s3c2410_pwm_enable);
++
++int s3c2410_pwm_start(struct s3c2410_pwm *pwm)
++{
++ unsigned long tcon;
++
++ tcon = __raw_readl(S3C2410_TCON);
++
++ switch (pwm->timerid) {
++ case PWM0:
++ tcon |= S3C2410_TCON_T0START;
++ tcon &= ~S3C2410_TCON_T0MANUALUPD;
++ break;
++ case PWM1:
++ tcon |= S3C2410_TCON_T1START;
++ tcon &= ~S3C2410_TCON_T1MANUALUPD;
++ break;
++ case PWM2:
++ tcon |= S3C2410_TCON_T2START;
++ tcon &= ~S3C2410_TCON_T2MANUALUPD;
++ break;
++ case PWM3:
++ tcon |= S3C2410_TCON_T3START;
++ tcon &= ~S3C2410_TCON_T3MANUALUPD;
++ break;
++ case PWM4:
++ /* timer four is not capable of doing PWM */
++ default:
++ return -ENODEV;
++ }
++
++ __raw_writel(tcon, S3C2410_TCON);
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(s3c2410_pwm_start);
++
++int s3c2410_pwm_stop(struct s3c2410_pwm *pwm)
++{
++ unsigned long tcon;
++
++ tcon = __raw_readl(S3C2410_TCON);
++
++ switch (pwm->timerid) {
++ case PWM0:
++ tcon &= ~0x00000000;
++ tcon |= S3C2410_TCON_T0RELOAD;
++ tcon |= S3C2410_TCON_T0MANUALUPD;
++ break;
++ case PWM1:
++ tcon &= ~0x00000080;
++ tcon |= S3C2410_TCON_T1RELOAD;
++ tcon |= S3C2410_TCON_T1MANUALUPD;
++ break;
++ case PWM2:
++ tcon &= ~0x00000800;
++ tcon |= S3C2410_TCON_T2RELOAD;
++ tcon |= S3C2410_TCON_T2MANUALUPD;
++ break;
++ case PWM3:
++ tcon &= ~0x00008000;
++ tcon |= S3C2410_TCON_T3RELOAD;
++ tcon |= S3C2410_TCON_T3MANUALUPD;
++ break;
++ case PWM4:
++ /* timer four is not capable of doing PWM */
++ default:
++ return -ENODEV;
++ }
++
++ __raw_writel(tcon, S3C2410_TCON);
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(s3c2410_pwm_stop);
++
++int s3c2410_pwm_duty_cycle(int reg_value, struct s3c2410_pwm *pwm)
++{
++ __raw_writel(reg_value, S3C2410_TCMPB(pwm->timerid));
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(s3c2410_pwm_duty_cycle);
++
++int s3c2410_pwm_dumpregs(void)
++{
++ printk(KERN_INFO "TCON: %08lx, TCFG0: %08lx, TCFG1: %08lx\n",
++ (unsigned long) __raw_readl(S3C2410_TCON),
++ (unsigned long) __raw_readl(S3C2410_TCFG0),
++ (unsigned long) __raw_readl(S3C2410_TCFG1));
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(s3c2410_pwm_dumpregs);
++
++static int __init s3c24xx_pwm_probe(struct platform_device *pdev)
++{
++ dev_info(&pdev->dev, "s3c24xx_pwm is registered \n");
++
++ return 0;
++}
++
++#ifdef CONFIG_PM
++static int s3c24xx_pwm_suspend(struct platform_device *pdev, pm_message_t state)
++{
++ /* PWM config should be kept in suspending */
++ standby_reg_tcon = __raw_readl(S3C2410_TCON);
++ standby_reg_tcfg0 = __raw_readl(S3C2410_TCFG0);
++ standby_reg_tcfg1 = __raw_readl(S3C2410_TCFG1);
++
++ return 0;
++}
++
++static int s3c24xx_pwm_resume(struct platform_device *pdev)
++{
++ __raw_writel(standby_reg_tcon, S3C2410_TCON);
++ __raw_writel(standby_reg_tcfg0, S3C2410_TCFG0);
++ __raw_writel(standby_reg_tcfg1, S3C2410_TCFG1);
++
++ return 0;
++}
++#else
++#define sc32440_pwm_suspend NULL
++#define sc32440_pwm_resume NULL
++#endif
++
++static struct platform_driver s3c24xx_pwm_driver = {
++ .driver = {
++ .name = "s3c24xx_pwm",
++ .owner = THIS_MODULE,
++ },
++ .probe = s3c24xx_pwm_probe,
++ .suspend = s3c24xx_pwm_suspend,
++ .resume = s3c24xx_pwm_resume,
++};
++
++static int __init s3c24xx_pwm_init(void)
++{
++ return platform_driver_register(&s3c24xx_pwm_driver);
++}
++
++static void __exit s3c24xx_pwm_exit(void)
++{
++}
++
++MODULE_AUTHOR("Javi Roman <javiroman@kernel-labs.org>");
++MODULE_LICENSE("GPL");
++
++module_init(s3c24xx_pwm_init);
++module_exit(s3c24xx_pwm_exit);
+Index: linux-2.6.24.7/arch/arm/mach-s3c2412/s3c2412.c
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/mach-s3c2412/s3c2412.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/mach-s3c2412/s3c2412.c 2008-12-11 22:46:48.000000000 +0100
+@@ -214,5 +214,8 @@ int __init s3c2412_init(void)
+ {
+ printk("S3C2412: Initialising architecture\n");
+
++ /* make sure SD/MMC driver can distinguish 2412 from 2410 */
++ s3c_device_sdi.name = "s3c2412-sdi";
++
+ return sysdev_register(&s3c2412_sysdev);
+ }
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/bits.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/bits.h 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,48 @@
++/*
++ * Copyright (C) Samsung Electroincs 2003
++ * Author: SW.LEE <hitchcar@samsung.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ */
++
++#ifndef __SW_BITS_H
++#define __SW_BITS_H
++
++#define BIT0 0x00000001
++#define BIT1 0x00000002
++#define BIT2 0x00000004
++#define BIT3 0x00000008
++#define BIT4 0x00000010
++#define BIT5 0x00000020
++#define BIT6 0x00000040
++#define BIT7 0x00000080
++#define BIT8 0x00000100
++#define BIT9 0x00000200
++#define BIT10 0x00000400
++#define BIT11 0x00000800
++#define BIT12 0x00001000
++#define BIT13 0x00002000
++#define BIT14 0x00004000
++#define BIT15 0x00008000
++#define BIT16 0x00010000
++#define BIT17 0x00020000
++#define BIT18 0x00040000
++#define BIT19 0x00080000
++#define BIT20 0x00100000
++#define BIT21 0x00200000
++#define BIT22 0x00400000
++#define BIT23 0x00800000
++#define BIT24 0x01000000
++#define BIT25 0x02000000
++#define BIT26 0x04000000
++#define BIT27 0x08000000
++#define BIT28 0x10000000
++#define BIT29 0x20000000
++#define BIT30 0x40000000
++#define BIT31 0x80000000
++
++#endif
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/camif.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/camif.c 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,1047 @@
++/*
++ * Copyright (C) 2004 Samsung Electronics
++ * SW.LEE <hitchcar@samsung.com>
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License 2. See the file COPYING in the main directory of this archive
++ * for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/sched.h>
++#include <linux/irq.h>
++#include <linux/completion.h>
++#include <linux/delay.h>
++#include <linux/slab.h>
++#include <linux/vmalloc.h>
++#include <linux/miscdevice.h>
++#include <linux/wait.h>
++#include <linux/miscdevice.h>
++#include <asm/io.h>
++#include <asm/semaphore.h>
++#include <asm/hardware.h>
++#include <asm/uaccess.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/clk.h>
++
++#ifdef CONFIG_ARCH_S3C24A0A
++#include <asm/arch/S3C24A0.h>
++#include <asm/arch/clocks.h>
++#else
++#include <asm/arch/regs-gpio.h>
++#include <asm/arch/regs-gpioj.h>
++#include <asm/arch/regs-irq.h>
++#endif
++
++#include "cam_reg.h"
++//#define SW_DEBUG
++#define CONFIG_VIDEO_V4L1_COMPAT
++#include <linux/videodev.h>
++#include "camif.h"
++#include "miscdevice.h"
++
++static int camif_dma_burst(camif_cfg_t *);
++static int camif_scaler(camif_cfg_t *);
++
++/* For SXGA Image */
++#define RESERVE_MEM 15*1024*1024
++#define YUV_MEM 10*1024*1024
++#define RGB_MEM (RESERVE_MEM - YUV_MEM)
++
++static int camif_malloc(camif_cfg_t *cfg)
++{
++ unsigned int t_size;
++ unsigned int daon = cfg->target_x *cfg->target_y;
++
++ if(cfg->dma_type & CAMIF_CODEC) {
++ if (cfg->fmt & CAMIF_OUT_YCBCR420) {
++ t_size = daon * 3 / 2 ;
++ }
++ else { t_size = daon * 2; /* CAMIF_OUT_YCBCR422 */ }
++ t_size = t_size *cfg->pp_num;
++
++#ifndef SAMSUNG_SXGA_CAM
++ cfg->pp_virt_buf = dma_alloc_coherent(cfg->v->dev,
++ t_size, &cfg->pp_phys_buf,
++ GFP_KERNEL);
++#else
++ printk(KERN_INFO "Reserving High RAM Addresses \n");
++ cfg->pp_phys_buf = PHYS_OFFSET + (MEM_SIZE - RESERVE_MEM);
++ cfg->pp_virt_buf = ioremap_nocache(cfg->pp_phys_buf, YUV_MEM);
++#endif
++
++ if ( !cfg->pp_virt_buf ) {
++ printk(KERN_ERR"CAMERA:Failed to request YCBCR MEM\n");
++ return -ENOMEM;
++ }
++ memset(cfg->pp_virt_buf, 0, t_size);
++ cfg->pp_totalsize = t_size;
++ return 0;
++ }
++ if ( cfg->dma_type & CAMIF_PREVIEW ) {
++ if (cfg->fmt & CAMIF_RGB16)
++ t_size = daon * 2; /* 4byte per two pixel*/
++ else {
++ assert(cfg->fmt & CAMIF_RGB24);
++ t_size = daon * 4; /* 4byte per one pixel */
++ }
++ t_size = t_size * cfg->pp_num;
++#ifndef SAMSUNG_SXGA_CAM
++ cfg->pp_virt_buf = dma_alloc_coherent(cfg->v->dev,
++ t_size, &cfg->pp_phys_buf,
++ GFP_KERNEL);
++#else
++ printk(KERN_INFO "Reserving High RAM Addresses \n");
++ cfg->pp_phys_buf = PHYS_OFFSET + (MEM_SIZE - RESERVE_MEM ) + YUV_MEM;
++ cfg->pp_virt_buf = ioremap_nocache(cfg->pp_phys_buf,RGB_MEM);
++#endif
++ if ( !cfg->pp_virt_buf ) {
++ printk(KERN_ERR"CAMERA:Failed to request RGB MEM\n");
++ return -ENOMEM;
++ }
++ memset(cfg->pp_virt_buf, 0, t_size);
++ cfg->pp_totalsize = t_size;
++ return 0;
++ }
++
++ return 0; /* Never come. */
++}
++
++static int camif_demalloc(camif_cfg_t *cfg)
++{
++#ifndef SAMSUNG_SXGA_CAM
++ if ( cfg->pp_virt_buf ) {
++ dma_free_coherent(cfg->v->dev, cfg->pp_totalsize,
++ cfg->pp_virt_buf, cfg->pp_phys_buf);
++ cfg->pp_virt_buf = 0;
++ }
++#else
++ iounmap(cfg->pp_virt_buf);
++ cfg->pp_virt_buf = 0;
++#endif
++ return 0;
++}
++
++/*
++ * advise a person to use this func in ISR
++ * index value indicates the next frame count to be used
++ */
++int camif_g_frame_num(camif_cfg_t *cfg)
++{
++ int index = 0;
++
++ if (cfg->dma_type & CAMIF_CODEC ) {
++ index = FRAME_CNT(readl(camregs + S3C2440_CAM_REG_CICOSTATUS));
++ DPRINTK("CAMIF_CODEC frame %d \n", index);
++ }
++ else {
++ assert(cfg->dma_type & CAMIF_PREVIEW );
++ index = FRAME_CNT(readl(camregs + S3C2440_CAM_REG_CIPRSTATUS));
++ DPRINTK("CAMIF_PREVIEW frame %d 0x%08X \n", index,
++ readl(camregs + S3C2440_CAM_REG_CIPRSTATUS));
++ }
++ cfg->now_frame_num = (index + 2) % 4; /* When 4 PingPong */
++ return index; /* meaningless */
++}
++
++static int camif_pp_codec(camif_cfg_t *cfg)
++{
++ u32 i, c_size; /* Cb,Cr size */
++ u32 one_p_size;
++ u32 daon = cfg->target_x * cfg->target_y;
++ if (cfg->fmt & CAMIF_OUT_YCBCR420)
++ c_size = daon / 4;
++ else {
++ assert(cfg->fmt & CAMIF_OUT_YCBCR422);
++ c_size = daon / 2;
++ }
++ switch ( cfg->pp_num ) {
++ case 1 :
++ for (i =0 ; i < 4; i++) {
++ cfg->img_buf[i].virt_y = cfg->pp_virt_buf;
++ cfg->img_buf[i].phys_y = cfg->pp_phys_buf;
++ cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + daon;
++ cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + daon;
++ cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + daon + c_size;
++ cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + daon + c_size;
++ writel(cfg->img_buf[i].phys_y, camregs + S3C2440_CAM_REG_CICOYSA(i));
++ writel(cfg->img_buf[i].phys_cb, camregs + S3C2440_CAM_REG_CICOCBSA(i));
++ writel(cfg->img_buf[i].phys_cr, camregs + S3C2440_CAM_REG_CICOCRSA(i));
++ }
++ break;
++ case 2:
++#define TRY (( i%2 ) ? 1 :0)
++ one_p_size = daon + 2*c_size;
++ for (i = 0; i < 4 ; i++) {
++ cfg->img_buf[i].virt_y = cfg->pp_virt_buf + TRY * one_p_size;
++ cfg->img_buf[i].phys_y = cfg->pp_phys_buf + TRY * one_p_size;
++ cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + daon + TRY * one_p_size;
++ cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + daon + TRY * one_p_size;
++ cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + daon + c_size + TRY * one_p_size;
++ cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + daon + c_size + TRY * one_p_size;
++ writel(cfg->img_buf[i].phys_y, camregs + S3C2440_CAM_REG_CICOYSA(i));
++ writel(cfg->img_buf[i].phys_cb, camregs + S3C2440_CAM_REG_CICOCBSA(i));
++ writel(cfg->img_buf[i].phys_cr, camregs + S3C2440_CAM_REG_CICOCRSA(i));
++ }
++ break;
++ case 4:
++ one_p_size = daon + 2*c_size;
++ for (i = 0; i < 4 ; i++) {
++ cfg->img_buf[i].virt_y = cfg->pp_virt_buf + i * one_p_size;
++ cfg->img_buf[i].phys_y = cfg->pp_phys_buf + i * one_p_size;
++ cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + daon + i * one_p_size;
++ cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + daon + i * one_p_size;
++ cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + daon + c_size + i * one_p_size;
++ cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + daon + c_size + i * one_p_size;
++ writel(cfg->img_buf[i].phys_y, camregs + S3C2440_CAM_REG_CICOYSA(i));
++ writel(cfg->img_buf[i].phys_cb, camregs + S3C2440_CAM_REG_CICOCBSA(i));
++ writel(cfg->img_buf[i].phys_cr, camregs + S3C2440_CAM_REG_CICOCRSA(i));
++ }
++ break;
++ default:
++ printk("Invalid PingPong Number %d \n",cfg->pp_num);
++ panic("halt\n");
++}
++ return 0;
++}
++
++/* RGB Buffer Allocation */
++static int camif_pp_preview(camif_cfg_t *cfg)
++{
++ int i;
++ u32 daon = cfg->target_x * cfg->target_y;
++
++ if(cfg->fmt & CAMIF_RGB24)
++ daon = daon * 4 ;
++ else {
++ assert (cfg->fmt & CAMIF_RGB16);
++ daon = daon *2;
++ }
++ switch ( cfg->pp_num ) {
++ case 1:
++ for ( i = 0; i < 4 ; i++ ) {
++ cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf ;
++ cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf ;
++ writel(cfg->img_buf[i].phys_rgb, camregs + S3C2440_CAM_REG_CICOCRSA(i));
++ }
++ break;
++ case 2:
++ for ( i = 0; i < 4 ; i++) {
++ cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf + TRY * daon;
++ cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf + TRY * daon;
++ writel(cfg->img_buf[i].phys_rgb, camregs + S3C2440_CAM_REG_CICOCRSA(i));
++ }
++ break;
++ case 4:
++ for ( i = 0; i < 4 ; i++) {
++ cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf + i * daon;
++ cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf + i * daon;
++ writel(cfg->img_buf[i].phys_rgb, camregs + S3C2440_CAM_REG_CICOCRSA(i));
++ }
++ break;
++ default:
++ printk("Invalid PingPong Number %d \n",cfg->pp_num);
++ panic("halt\n");
++ }
++ return 0;
++}
++
++static int camif_pingpong(camif_cfg_t *cfg)
++{
++ if (cfg->dma_type & CAMIF_CODEC ) {
++ camif_pp_codec(cfg);
++ }
++
++ if ( cfg->dma_type & CAMIF_PREVIEW) {
++ camif_pp_preview(cfg);
++ }
++ return 0;
++}
++
++
++/*********** Image Convert *******************************/
++/* Return Format
++ * Supported by Hardware
++ * V4L2_PIX_FMT_YUV420,
++ * V4L2_PIX_FMT_YUV422P,
++ * V4L2_PIX_FMT_BGR32 (BGR4)
++ * -----------------------------------
++ * V4L2_PIX_FMT_RGB565(X)
++ * Currenly 2byte --> BGR656 Format
++ * S3C2440A,S3C24A0 supports vairants with reversed FMT_RGB565
++ i.e blue toward the least, red towards the most significant bit
++ -- by SW.LEE
++ */
++
++
++/*
++ * After calling camif_g_frame_num,
++ * this func must be called
++ */
++u8 * camif_g_frame(camif_cfg_t *cfg)
++{
++ u8 * ret = NULL;
++ int cnt = cfg->now_frame_num;
++
++ if(cfg->dma_type & CAMIF_PREVIEW) {
++ ret = cfg->img_buf[cnt].virt_rgb;
++ }
++ if (cfg->dma_type & CAMIF_CODEC) {
++ ret = cfg->img_buf[cnt].virt_y;
++ }
++ return ret;
++}
++
++/* This function must be called in module initial time */
++static int camif_source_fmt(camif_gc_t *gc)
++{
++ u32 cmd = 0;
++
++ /* Configure CISRCFMT --Source Format */
++ if (gc->itu_fmt & CAMIF_ITU601) {
++ cmd = CAMIF_ITU601;
++ }
++ else {
++ assert ( gc->itu_fmt & CAMIF_ITU656);
++ cmd = CAMIF_ITU656;
++ }
++ cmd |= SOURCE_HSIZE(gc->source_x)| SOURCE_VSIZE(gc->source_y);
++ /* Order422 */
++ cmd |= gc->order422;
++ writel(cmd, camregs + S3C2440_CAM_REG_CISRCFMT);
++
++ return 0 ;
++}
++
++
++/*
++ * Codec Input YCBCR422 will be Fixed
++ */
++static int camif_target_fmt(camif_cfg_t *cfg)
++{
++ u32 cmd = 0;
++
++ if (cfg->dma_type & CAMIF_CODEC) {
++ /* YCBCR setting */
++ cmd = TARGET_HSIZE(cfg->target_x)| TARGET_VSIZE(cfg->target_y);
++ if ( cfg->fmt & CAMIF_OUT_YCBCR420 ) {
++ cmd |= OUT_YCBCR420|IN_YCBCR422;
++ }
++ else {
++ assert(cfg->fmt & CAMIF_OUT_YCBCR422);
++ cmd |= OUT_YCBCR422|IN_YCBCR422;
++ }
++ writel(cmd | cfg->flip, camregs + S3C2440_CAM_REG_CICOTRGFMT);
++
++ } else {
++ assert(cfg->dma_type & CAMIF_PREVIEW);
++ writel(TARGET_HSIZE(cfg->target_x)|TARGET_VSIZE(cfg->target_y)|cfg->flip,
++ camregs + S3C2440_CAM_REG_CIPRTRGFMT);
++ }
++ return 0;
++}
++
++void camif_change_flip(camif_cfg_t *cfg)
++{
++ u32 cmd = readl(camregs + S3C2440_CAM_REG_CICOTRGFMT);
++
++ cmd &= ~(BIT14|BIT15);
++ cmd |= cfg->flip;
++
++ writel(cmd, camregs + S3C2440_CAM_REG_CICOTRGFMT);
++}
++
++
++
++/* Must:
++ * Before calling this function,
++ * you must use "camif_dynamic_open"
++ * If you want to enable both CODEC and preview
++ * you must do it at the same time.
++ */
++int camif_capture_start(camif_cfg_t *cfg)
++{
++ u32 n_cmd = 0; /* Next Command */
++
++ switch(cfg->exec) {
++ case CAMIF_BOTH_DMA_ON:
++ camif_reset(CAMIF_RESET, 0); /* Flush Camera Core Buffer */
++ writel(readl(camregs + S3C2440_CAM_REG_CIPRSCCTRL) |
++ SCALERSTART, camregs + S3C2440_CAM_REG_CIPRSCCTRL);
++ writel(readl(camregs + S3C2440_CAM_REG_CICOSCCTRL) |
++ SCALERSTART, camregs + S3C2440_CAM_REG_CICOSCCTRL);
++ n_cmd = CAMIF_CAP_PREVIEW_ON | CAMIF_CAP_CODEC_ON;
++ break;
++ case CAMIF_DMA_ON:
++ camif_reset(CAMIF_RESET, 0); /* Flush Camera Core Buffer */
++ if (cfg->dma_type&CAMIF_CODEC) {
++ writel(readl(camregs + S3C2440_CAM_REG_CICOSCCTRL) |
++ SCALERSTART, camregs + S3C2440_CAM_REG_CICOSCCTRL);
++ n_cmd = CAMIF_CAP_CODEC_ON;
++ } else {
++ writel(readl(camregs + S3C2440_CAM_REG_CIPRSCCTRL) |
++ SCALERSTART, camregs + S3C2440_CAM_REG_CIPRSCCTRL);
++ n_cmd = CAMIF_CAP_PREVIEW_ON;
++ }
++
++ /* wait until Sync Time expires */
++ /* First settting, to wait VSYNC fall */
++ /* By VESA spec,in 640x480 @60Hz
++ MAX Delay Time is around 64us which "while" has.*/
++ while(VSYNC & readl(camregs + S3C2440_CAM_REG_CICOSTATUS));
++ break;
++ default:
++ break;
++}
++ writel(n_cmd | CAMIF_CAP_ON, camregs + S3C2440_CAM_REG_CIIMGCPT);
++ return 0;
++}
++
++
++int camif_capture_stop(camif_cfg_t *cfg)
++{
++ u32 n_cmd = readl(camregs + S3C2440_CAM_REG_CIIMGCPT); /* Next Command */
++
++ switch(cfg->exec) {
++ case CAMIF_BOTH_DMA_OFF:
++ writel(readl(camregs + S3C2440_CAM_REG_CIPRSCCTRL) &
++ ~SCALERSTART, camregs + S3C2440_CAM_REG_CIPRSCCTRL);
++ writel(readl(camregs + S3C2440_CAM_REG_CICOSCCTRL) &
++ ~SCALERSTART, camregs + S3C2440_CAM_REG_CICOSCCTRL);
++ n_cmd = 0;
++ break;
++ case CAMIF_DMA_OFF_L_IRQ: /* fall thru */
++ case CAMIF_DMA_OFF:
++ if (cfg->dma_type&CAMIF_CODEC) {
++ writel(readl(camregs + S3C2440_CAM_REG_CICOSCCTRL) &
++ ~SCALERSTART, camregs + S3C2440_CAM_REG_CICOSCCTRL);
++ n_cmd &= ~CAMIF_CAP_CODEC_ON;
++ if (!(n_cmd & CAMIF_CAP_PREVIEW_ON))
++ n_cmd = 0;
++ } else {
++ writel(readl(camregs + S3C2440_CAM_REG_CIPRSCCTRL) &
++ ~SCALERSTART, camregs + S3C2440_CAM_REG_CIPRSCCTRL);
++ n_cmd &= ~CAMIF_CAP_PREVIEW_ON;
++ if (!(n_cmd & CAMIF_CAP_CODEC_ON))
++ n_cmd = 0;
++ }
++ break;
++ default:
++ panic("Unexpected \n");
++ }
++ writel(n_cmd, camregs + S3C2440_CAM_REG_CIIMGCPT);
++
++ if (cfg->exec == CAMIF_DMA_OFF_L_IRQ) { /* Last IRQ */
++ if (cfg->dma_type & CAMIF_CODEC)
++ writel(readl(camregs + S3C2440_CAM_REG_CICOCTRL) |
++ LAST_IRQ_EN, camregs + S3C2440_CAM_REG_CICOCTRL);
++ else
++ writel(readl(camregs + S3C2440_CAM_REG_CIPRCTRL) |
++ LAST_IRQ_EN, camregs + S3C2440_CAM_REG_CIPRCTRL);
++ }
++#if 0
++ else { /* to make internal state machine of CAMERA stop */
++ camif_reset(CAMIF_RESET, 0);
++ }
++#endif
++ return 0;
++}
++
++
++/* LastIRQEn is autoclear */
++void camif_last_irq_en(camif_cfg_t *cfg)
++{
++ if ((cfg->exec == CAMIF_BOTH_DMA_ON) || (cfg->dma_type & CAMIF_CODEC))
++ writel(readl(camregs + S3C2440_CAM_REG_CICOCTRL) |
++ LAST_IRQ_EN, camregs + S3C2440_CAM_REG_CICOCTRL);
++
++ if ((cfg->exec == CAMIF_BOTH_DMA_ON) || !(cfg->dma_type & CAMIF_CODEC))
++ writel(readl(camregs + S3C2440_CAM_REG_CIPRCTRL) |
++ LAST_IRQ_EN, camregs + S3C2440_CAM_REG_CIPRCTRL);
++}
++
++static int
++camif_scaler_internal(u32 srcWidth, u32 dstWidth, u32 *ratio, u32 *shift)
++{
++ if(srcWidth>=64*dstWidth){
++ printk(KERN_ERR"CAMERA:out of prescaler range: srcWidth /dstWidth = %d(< 64)\n",
++ srcWidth/dstWidth);
++ return 1;
++ }
++ else if(srcWidth>=32*dstWidth){
++ *ratio=32;
++ *shift=5;
++ }
++ else if(srcWidth>=16*dstWidth){
++ *ratio=16;
++ *shift=4;
++ }
++ else if(srcWidth>=8*dstWidth){
++ *ratio=8;
++ *shift=3;
++ }
++ else if(srcWidth>=4*dstWidth){
++ *ratio=4;
++ *shift=2;
++ }
++ else if(srcWidth>=2*dstWidth){
++ *ratio=2;
++ *shift=1;
++ }
++ else {
++ *ratio=1;
++ *shift=0;
++ }
++ return 0;
++}
++
++
++int camif_g_fifo_status(camif_cfg_t *cfg)
++{
++ u32 reg;
++
++ if (cfg->dma_type & CAMIF_CODEC) {
++ u32 flag = CO_OVERFLOW_Y | CO_OVERFLOW_CB | CO_OVERFLOW_CR;
++ reg = readl(camregs + S3C2440_CAM_REG_CICOSTATUS);
++ if (reg & flag) {
++ printk("CODEC: FIFO error(0x%08x) and corrected\n",reg);
++ /* FIFO Error Count ++ */
++ writel(readl(camregs + S3C2440_CAM_REG_CIWDOFST) |
++ CO_FIFO_Y | CO_FIFO_CB | CO_FIFO_CR,
++ camregs + S3C2440_CAM_REG_CIWDOFST);
++
++ writel(readl(camregs + S3C2440_CAM_REG_CIWDOFST) &
++ ~(CO_FIFO_Y | CO_FIFO_CB | CO_FIFO_CR),
++ camregs + S3C2440_CAM_REG_CIWDOFST);
++ return 1; /* Error */
++ }
++ }
++ if (cfg->dma_type & CAMIF_PREVIEW) {
++ u32 flag = PR_OVERFLOW_CB | PR_OVERFLOW_CR;
++ reg = readl(camregs + S3C2440_CAM_REG_CIPRSTATUS);
++ if (reg & flag) {
++ printk("PREVIEW:FIFO error(0x%08x) and corrected\n",reg);
++ writel(readl(camregs + S3C2440_CAM_REG_CIWDOFST) |
++ CO_FIFO_CB | CO_FIFO_CR,
++ camregs + S3C2440_CAM_REG_CIWDOFST);
++
++ writel(readl(camregs + S3C2440_CAM_REG_CIWDOFST) &
++ ~(CO_FIFO_Y | CO_FIFO_CB | CO_FIFO_CR),
++ camregs + S3C2440_CAM_REG_CIWDOFST);
++ /* FIFO Error Count ++ */
++ return 1; /* Error */
++ }
++ }
++ return 0; /* No Error */
++}
++
++
++/* Policy:
++ * if codec or preview define the win offset,
++ * other must follow that value.
++ */
++int camif_win_offset(camif_gc_t *gc )
++{
++ u32 h = gc->win_hor_ofst;
++ u32 v = gc->win_ver_ofst;
++
++ /*Clear Overflow */
++ writel(CO_FIFO_Y | CO_FIFO_CB | CO_FIFO_CR | PR_FIFO_CB | PR_FIFO_CB,
++ camregs + S3C2440_CAM_REG_CIWDOFST);
++ writel(0, camregs + S3C2440_CAM_REG_CIWDOFST);
++
++ if (!h && !v) {
++ writel(0, camregs + S3C2440_CAM_REG_CIWDOFST);
++ return 0;
++ }
++
++ writel(WINOFEN | WINHOROFST(h) | WINVEROFST(v), camregs + S3C2440_CAM_REG_CIWDOFST);
++ return 0;
++}
++
++/*
++ * when you change the resolution in a specific camera,
++ * sometimes, it is necessary to change the polarity
++ * -- SW.LEE
++ */
++static void camif_polarity(camif_gc_t *gc)
++{
++ u32 cmd = readl(camregs + S3C2440_CAM_REG_CIGCTRL);;
++
++ cmd = cmd & ~(BIT26|BIT25|BIT24); /* clear polarity */
++ if (gc->polarity_pclk)
++ cmd |= GC_INVPOLPCLK;
++ if (gc->polarity_vsync)
++ cmd |= GC_INVPOLVSYNC;
++ if (gc->polarity_href)
++ cmd |= GC_INVPOLHREF;
++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) |
++ cmd, camregs + S3C2440_CAM_REG_CIGCTRL);
++}
++
++
++int camif_dynamic_open(camif_cfg_t *cfg)
++{
++ camif_win_offset(cfg->gc);
++ camif_polarity(cfg->gc);
++
++ if(camif_scaler(cfg)) {
++ printk(KERN_ERR "CAMERA:Preview Scaler, Change WinHorOfset or Target Size\n");
++ return 1;
++ }
++ camif_target_fmt(cfg);
++ if (camif_dma_burst(cfg)) {
++ printk(KERN_ERR "CAMERA:DMA Busrt Length Error \n");
++ return 1;
++ }
++ if(camif_malloc(cfg) ) {
++ printk(KERN_ERR " Instead of using consistent_alloc()\n"
++ " lease use dedicated memory allocation for DMA memory\n");
++ return -1;
++ }
++ camif_pingpong(cfg);
++ return 0;
++}
++
++int camif_dynamic_close(camif_cfg_t *cfg)
++{
++ camif_demalloc(cfg);
++ return 0;
++}
++
++static int camif_target_area(camif_cfg_t *cfg)
++{
++ u32 rect = cfg->target_x * cfg->target_y;
++
++ if (cfg->dma_type & CAMIF_CODEC)
++ writel(rect, camregs + S3C2440_CAM_REG_CICOTAREA);
++
++ if (cfg->dma_type & CAMIF_PREVIEW)
++ writel(rect, camregs + S3C2440_CAM_REG_CIPRTAREA);
++
++ return 0;
++}
++
++static int inline camif_hw_reg(camif_cfg_t *cfg)
++{
++ u32 cmd = 0;
++
++ if (cfg->dma_type & CAMIF_CODEC) {
++ writel(PRE_SHIFT(cfg->sc.shfactor) |
++ PRE_HRATIO(cfg->sc.prehratio) |
++ PRE_VRATIO(cfg->sc.prevratio),
++ camregs + S3C2440_CAM_REG_CICOSCPRERATIO);
++ writel(PRE_DST_WIDTH(cfg->sc.predst_x) |
++ PRE_DST_HEIGHT(cfg->sc.predst_y),
++ camregs + S3C2440_CAM_REG_CICOSCPREDST);
++
++ /* Differ from Preview */
++ if (cfg->sc.scalerbypass)
++ cmd |= SCALERBYPASS;
++ if (cfg->sc.scaleup_h & cfg->sc.scaleup_v)
++ cmd |= BIT30|BIT29;
++ writel(cmd | MAIN_HRATIO(cfg->sc.mainhratio) |
++ MAIN_VRATIO(cfg->sc.mainvratio),
++ camregs + S3C2440_CAM_REG_CICOSCCTRL);
++ return 0;
++ }
++ if (cfg->dma_type & CAMIF_PREVIEW) {
++ writel(PRE_SHIFT(cfg->sc.shfactor) |
++ PRE_HRATIO(cfg->sc.prehratio) |
++ PRE_VRATIO(cfg->sc.prevratio),
++ camregs + S3C2440_CAM_REG_CIPRSCPRERATIO);
++ writel(PRE_DST_WIDTH(cfg->sc.predst_x) |
++ PRE_DST_HEIGHT(cfg->sc.predst_y),
++ camregs + S3C2440_CAM_REG_CIPRSCPREDST);
++ /* Differ from Codec */
++ if (cfg->fmt & CAMIF_RGB24)
++ cmd |= RGB_FMT24;
++ if (cfg->sc.scaleup_h & cfg->sc.scaleup_v)
++ cmd |= BIT29 | BIT28;
++ writel(cmd | MAIN_HRATIO(cfg->sc.mainhratio) | S_METHOD |
++ MAIN_VRATIO(cfg->sc.mainvratio),
++ camregs + S3C2440_CAM_REG_CIPRSCCTRL);
++ return 0;
++ }
++
++ panic("CAMERA:DMA_TYPE Wrong \n");
++ return 0;
++}
++
++
++/* Configure Pre-scaler control & main scaler control register */
++static int camif_scaler(camif_cfg_t *cfg)
++{
++ int tx = cfg->target_x, ty = cfg->target_y;
++ int sx, sy;
++
++ if (tx <= 0 || ty <= 0)
++ panic("CAMERA: Invalid target size \n");
++
++ sx = cfg->gc->source_x - 2 * cfg->gc->win_hor_ofst;
++ sy = cfg->gc->source_y - 2 * cfg->gc->win_ver_ofst;
++ if (sx <= 0 || sy <= 0)
++ panic("CAMERA: Invalid source size \n");
++
++ cfg->sc.modified_src_x = sx;
++ cfg->sc.modified_src_y = sy;
++
++ /* Pre-scaler control register 1 */
++ camif_scaler_internal(sx, tx, &cfg->sc.prehratio, &cfg->sc.hfactor);
++ camif_scaler_internal(sy, ty, &cfg->sc.prevratio, &cfg->sc.vfactor);
++
++ if (cfg->dma_type & CAMIF_PREVIEW)
++ if ((sx / cfg->sc.prehratio) > 640) {
++ printk(KERN_INFO "CAMERA: Internal Preview line "
++ "buffer is 640 pixels\n");
++ return 1; /* Error */
++ }
++
++ cfg->sc.shfactor = 10 - (cfg->sc.hfactor + cfg->sc.vfactor);
++ /* Pre-scaler control register 2 */
++ cfg->sc.predst_x = sx / cfg->sc.prehratio;
++ cfg->sc.predst_y = sy / cfg->sc.prevratio;
++
++ /* Main-scaler control register */
++ cfg->sc.mainhratio = (sx << 8) / (tx << cfg->sc.hfactor);
++ cfg->sc.mainvratio = (sy << 8) / (ty << cfg->sc.vfactor);
++ DPRINTK(" sx %d, sy %d tx %d ty %d \n", sx, sy, tx, ty);
++ DPRINTK(" hfactor %d vfactor %d \n",cfg->sc.hfactor, cfg->sc.vfactor);
++
++ cfg->sc.scaleup_h = (sx <= tx) ? 1: 0;
++ cfg->sc.scaleup_v = (sy <= ty) ? 1: 0;
++ if (cfg->sc.scaleup_h != cfg->sc.scaleup_v)
++ printk(KERN_ERR "scaleup_h must be same to scaleup_v \n");
++
++ camif_hw_reg(cfg);
++ camif_target_area(cfg);
++
++ return 0;
++}
++
++/******************************************************
++ CalculateBurstSize - Calculate the busrt lengths
++ Description:
++ - dstHSize: the number of the byte of H Size.
++********************************************************/
++static void camif_g_bsize(u32 hsize, u32 *mburst, u32 *rburst)
++{
++ u32 tmp;
++
++ tmp = (hsize / 4) % 16;
++ switch(tmp) {
++ case 0:
++ *mburst=16;
++ *rburst=16;
++ break;
++ case 4:
++ *mburst=16;
++ *rburst=4;
++ break;
++ case 8:
++ *mburst=16;
++ *rburst=8;
++ break;
++ default:
++ tmp=(hsize / 4) % 8;
++ switch(tmp) {
++ case 0:
++ *mburst = 8;
++ *rburst = 8;
++ break;
++ case 4:
++ *mburst = 8;
++ *rburst = 4;
++ default:
++ *mburst = 4;
++ tmp = (hsize / 4) % 4;
++ *rburst= (tmp) ? tmp: 4;
++ break;
++ }
++ break;
++ }
++}
++
++/* SXGA 1028x1024*/
++/* XGA 1024x768 */
++/* SVGA 800x600 */
++/* VGA 640x480 */
++/* CIF 352x288 */
++/* QVGA 320x240 */
++/* QCIF 176x144 */
++/* ret val
++ 1 : DMA Size Error
++*/
++#define BURST_ERR 1
++static int camif_dma_burst(camif_cfg_t *cfg)
++{
++ int width = cfg->target_x;
++
++ if (cfg->dma_type & CAMIF_CODEC ) {
++ u32 yburst_m, yburst_r;
++ u32 cburst_m, cburst_r;
++ /* CODEC DMA WIDHT is multiple of 16 */
++ if (width % 16)
++ return BURST_ERR; /* DMA Burst Length Error */
++ camif_g_bsize(width, &yburst_m, &yburst_r);
++ camif_g_bsize(width / 2, &cburst_m, &cburst_r);
++
++ writel(YBURST_M(yburst_m) | CBURST_M(cburst_m) |
++ YBURST_R(yburst_r) | CBURST_R(cburst_r),
++ camregs + S3C2440_CAM_REG_CICOCTRL);
++ }
++
++ if (cfg->dma_type & CAMIF_PREVIEW) {
++ u32 rgburst_m, rgburst_r;
++ if(cfg->fmt == CAMIF_RGB24) {
++ if (width % 2)
++ return BURST_ERR; /* DMA Burst Length Error */
++ camif_g_bsize(width*4,&rgburst_m,&rgburst_r);
++ } else { /* CAMIF_RGB16 */
++ if ((width / 2) %2)
++ return BURST_ERR; /* DMA Burst Length Error */
++ camif_g_bsize(width*2,&rgburst_m,&rgburst_r);
++ }
++
++ writel(RGBURST_M(rgburst_m) | RGBURST_R(rgburst_r),
++ camregs + S3C2440_CAM_REG_CIPRCTRL);
++ }
++ return 0;
++}
++
++static int camif_gpio_init(void)
++{
++#ifdef CONFIG_ARCH_S3C24A0A
++ /* S3C24A0A has the dedicated signal pins for Camera */
++#else
++ s3c2410_gpio_cfgpin(S3C2440_GPJ0, S3C2440_GPJ0_CAMDATA0);
++ s3c2410_gpio_cfgpin(S3C2440_GPJ1, S3C2440_GPJ1_CAMDATA1);
++ s3c2410_gpio_cfgpin(S3C2440_GPJ2, S3C2440_GPJ2_CAMDATA2);
++ s3c2410_gpio_cfgpin(S3C2440_GPJ3, S3C2440_GPJ3_CAMDATA3);
++ s3c2410_gpio_cfgpin(S3C2440_GPJ4, S3C2440_GPJ4_CAMDATA4);
++ s3c2410_gpio_cfgpin(S3C2440_GPJ5, S3C2440_GPJ5_CAMDATA5);
++ s3c2410_gpio_cfgpin(S3C2440_GPJ6, S3C2440_GPJ6_CAMDATA6);
++ s3c2410_gpio_cfgpin(S3C2440_GPJ7, S3C2440_GPJ7_CAMDATA7);
++
++ s3c2410_gpio_cfgpin(S3C2440_GPJ8, S3C2440_GPJ8_CAMPCLK);
++ s3c2410_gpio_cfgpin(S3C2440_GPJ9, S3C2440_GPJ9_CAMVSYNC);
++ s3c2410_gpio_cfgpin(S3C2440_GPJ10, S3C2440_GPJ10_CAMHREF);
++ s3c2410_gpio_cfgpin(S3C2440_GPJ11, S3C2440_GPJ11_CAMCLKOUT);
++ s3c2410_gpio_cfgpin(S3C2440_GPJ12, S3C2440_GPJ12_CAMRESET);
++#endif
++ return 0;
++}
++
++
++#define ROUND_ADD 0x100000
++
++#ifdef CONFIG_ARCH_S3C24A0A
++int camif_clock_init(camif_gc_t *gc)
++{
++ unsigned int upll, camclk_div, camclk;
++
++ if (!gc) camclk = 24000000;
++ else {
++ camclk = gc->camclk;
++ if (camclk > 48000000)
++ printk(KERN_ERR "Wrong Camera Clock\n");
++ }
++
++ CLKCON |= CLKCON_CAM_UPLL | CLKCON_CAM_HCLK;
++ upll = get_bus_clk(GET_UPLL);
++ printk(KERN_INFO "CAMERA:Default UPLL %08d and Assing 96Mhz to UPLL\n",upll);
++ UPLLCON = FInsrt(56, fPLL_MDIV) | FInsrt(2, fPLL_PDIV)| FInsrt(1, fPLL_SDIV);
++ upll = get_bus_clk(GET_UPLL);
++
++ camclk_div = (upll+ROUND_ADD) / camclk - 1;
++ CLKDIVN = (CLKDIVN & 0xFF) | CLKDIVN_CAM(camclk_div);
++ printk(KERN_INFO"CAMERA:upll %d MACRO 0x%08X CLKDIVN 0x%08X \n",
++ upll, CLKDIVN_CAM(camclk_div), CLKDIVN);
++ writel(0, camregs + S3C2440_CAM_REG_CIIMGCPT); /* Dummy ? */
++
++ return 0;
++}
++#else
++int camif_clock_init(camif_gc_t *gc)
++{
++ unsigned int camclk;
++ struct clk *clk_camif = clk_get(NULL, "camif");
++ struct clk *clk_camif_upll = clk_get(NULL, "camif-upll");
++
++ if (!gc)
++ camclk = 24000000;
++ else {
++ camclk = gc->camclk;
++ if (camclk > 48000000)
++ printk(KERN_ERR "Wrong Camera Clock\n");
++ }
++
++ clk_set_rate(clk_camif, camclk);
++
++ clk_enable(clk_camif);
++ clk_enable(clk_camif_upll);
++
++
++#if 0
++ CLKCON |= CLKCON_CAMIF;
++ upll = elfin_get_bus_clk(GET_UPLL);
++ printk(KERN_INFO "CAMERA:Default UPLL %08d and Assing 96Mhz to UPLL\n",upll);
++ {
++ UPLLCON = FInsrt(60, fPLL_MDIV) | FInsrt(4, fPLL_PDIV)| FInsrt(1, fPLL_SDIV);
++ CLKDIVN |= DIVN_UPLL; /* For USB */
++ upll = elfin_get_bus_clk(GET_UPLL);
++ }
++
++ camclk_div = (upll+ROUND_ADD) /(camclk * 2) -1;
++ CAMDIVN = CAMCLK_SET_DIV|(camclk_div&0xf);
++ printk(KERN_INFO "CAMERA:upll %08d cam_clk %08d CAMDIVN 0x%08x \n",upll,camclk, CAMDIVN);
++#endif
++ writel(0, camregs + S3C2440_CAM_REG_CIIMGCPT); /* Dummy ? */
++
++ return 0;
++}
++#endif
++
++/*
++ Reset Camera IP in CPU
++ Reset External Sensor
++ */
++void camif_reset(int is, int delay)
++{
++ switch (is) {
++ case CAMIF_RESET:
++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) |
++ GC_SWRST,
++ camregs + S3C2440_CAM_REG_CIGCTRL);
++ mdelay(1);
++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) &
++ ~GC_SWRST,
++ camregs + S3C2440_CAM_REG_CIGCTRL);
++ break;
++ case CAMIF_EX_RESET_AH: /*Active High */
++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) &
++ ~GC_CAMRST,
++ camregs + S3C2440_CAM_REG_CIGCTRL);
++ udelay(200);
++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) |
++ GC_CAMRST,
++ camregs + S3C2440_CAM_REG_CIGCTRL);
++ udelay(delay);
++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) &
++ ~GC_CAMRST,
++ camregs + S3C2440_CAM_REG_CIGCTRL);
++ break;
++ case CAMIF_EX_RESET_AL: /*Active Low */
++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) |
++ GC_CAMRST,
++ camregs + S3C2440_CAM_REG_CIGCTRL);
++ udelay(200);
++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) &
++ ~GC_CAMRST,
++ camregs + S3C2440_CAM_REG_CIGCTRL);
++ udelay(delay);
++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) |
++ GC_CAMRST,
++ camregs + S3C2440_CAM_REG_CIGCTRL);
++ break;
++ default:
++ break;
++ }
++}
++
++/* For Camera Operation,
++ * we can give the high priority to REQ2 of ARBITER1
++ */
++
++/* Please move me into proper place
++ * camif_gc_t is not because "rmmod imgsenor" will delete the instance of camif_gc_t
++ */
++static u32 old_priority;
++
++static void camif_bus_priority(int flag)
++{
++ if (flag) {
++#ifdef CONFIG_ARCH_S3C24A0A
++ old_priority = PRIORITY0;
++ PRIORITY0 = PRIORITY_I_FIX;
++ PRIORITY1 = PRIORITY_I_FIX;
++
++#else
++ old_priority = readl(S3C2410_PRIORITY);
++ writel(readl(S3C2410_PRIORITY) & ~(3<<7), S3C2410_PRIORITY);
++ writel(readl(S3C2410_PRIORITY) | (1<<7), S3C2410_PRIORITY); /* Arbiter 1, REQ2 first */
++ writel(readl(S3C2410_PRIORITY) & ~(1<<1), S3C2410_PRIORITY); /* Disable Priority Rotate */
++#endif
++ }
++ else {
++#ifdef CONFIG_ARCH_S3C24A0A
++ PRIORITY0 = old_priority;
++ PRIORITY1 = old_priority;
++#else
++ writel(old_priority, S3C2410_PRIORITY);
++#endif
++ }
++}
++
++static void inline camif_clock_off(void)
++{
++#if defined (CONFIG_ARCH_S3C24A0A)
++ writel(0, camregs + S3C2440_CAM_REG_CIIMGCPT);
++
++ CLKCON &= ~CLKCON_CAM_UPLL;
++ CLKCON &= ~CLKCON_CAM_HCLK;
++#else
++ struct clk *clk_camif = clk_get(NULL, "camif");
++ struct clk *clk_camif_upll = clk_get(NULL, "camif-upll");
++
++ writel(0, camregs + S3C2440_CAM_REG_CIIMGCPT);
++
++ clk_disable(clk_camif);
++ clk_disable(clk_camif_upll);
++#endif
++}
++
++
++/* Init external image sensor
++ * Before make some value into image senor,
++ * you must set up the pixel clock.
++ */
++void camif_setup_sensor(void)
++{
++ camif_reset(CAMIF_RESET, 0);
++ camif_gpio_init();
++ camif_clock_init(NULL);
++/* Sometimes ,Before loading I2C module, we need the reset signal */
++#ifdef CONFIG_ARCH_S3C24A0A
++ camif_reset(CAMIF_EX_RESET_AL,1000);
++#else
++ camif_reset(CAMIF_EX_RESET_AH,1000);
++#endif
++}
++
++void camif_hw_close(camif_cfg_t *cfg)
++{
++ camif_bus_priority(0);
++ camif_clock_off();
++}
++
++void camif_hw_open(camif_gc_t *gc)
++{
++ camif_source_fmt(gc);
++ camif_win_offset(gc);
++ camif_bus_priority(1);
++}
++
++
++
++/*
++ * Local variables:
++ * tab-width: 8
++ * c-indent-level: 8
++ * c-basic-offset: 8
++ * c-set-style: "K&R"
++ * End:
++ */
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/camif_fsm.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/camif_fsm.c 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,432 @@
++/*
++ Copyright (C) 2004 Samsung Electronics
++ SW.LEE <hitchcar@sec.samsung.com>
++
++ This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 2 of the License, or
++ (at your option) any later version.
++*/
++
++#include <linux/version.h>
++#include <linux/module.h>
++#include <linux/delay.h>
++#include <linux/errno.h>
++#include <linux/fs.h>
++#include <linux/kernel.h>
++#include <linux/major.h>
++#include <linux/slab.h>
++#include <linux/poll.h>
++#include <linux/signal.h>
++#include <linux/ioport.h>
++#include <linux/sched.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/kmod.h>
++#include <linux/vmalloc.h>
++#include <linux/init.h>
++#include <linux/pagemap.h>
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/semaphore.h>
++#include <linux/miscdevice.h>
++
++#define CONFIG_VIDEO_V4L1_COMPAT
++#include <linux/videodev.h>
++#include "camif.h"
++
++//#define SW_DEBUG
++static void camif_start_p_with_c(camif_cfg_t *cfg);
++
++#include "camif.h"
++const char *fsm_version =
++ "$Id: camif_fsm.c,v 1.3 2004/04/27 10:26:28 swlee Exp $";
++
++
++/*
++ * FSM function is the place where Synchronization in not necessary
++ * because IRS calls this functions.
++ */
++
++ssize_t camif_p_1fsm_start(camif_cfg_t *cfg)
++{
++ //camif_reset(CAMIF_RESET,0);
++ cfg->exec = CAMIF_DMA_ON;
++ camif_capture_start(cfg);
++ camif_last_irq_en(cfg);
++ cfg->status = CAMIF_STARTED;
++ cfg->fsm = CAMIF_1nd_INT;
++ return 0;
++}
++
++
++ssize_t camif_p_2fsm_start(camif_cfg_t *cfg)
++{
++ camif_reset(CAMIF_RESET,0);/* FIFO Count goes to zero */
++ cfg->exec = CAMIF_DMA_ON;
++ camif_capture_start(cfg);
++ cfg->status = CAMIF_STARTED;
++ cfg->fsm = CAMIF_1nd_INT;
++ return 0;
++}
++
++
++ssize_t camif_4fsm_start(camif_cfg_t *cfg)
++{
++ camif_reset(CAMIF_RESET,0); /* FIFO Count goes to zero */
++ cfg->exec = CAMIF_DMA_ON;
++ camif_capture_start(cfg);
++ cfg->status = CAMIF_STARTED;
++ cfg->fsm = CAMIF_1nd_INT;
++ cfg->perf.frames = 0;
++ return 0;
++}
++
++
++/* Policy:
++ cfg->perf.frames set in camif_fsm.c
++ cfg->status set in video-driver.c
++ */
++
++/*
++ * Don't insert camif_reset(CAM_RESET, 0 ) into this func
++ */
++ssize_t camif_p_stop(camif_cfg_t *cfg)
++{
++ cfg->exec = CAMIF_DMA_OFF;
++// cfg->status = CAMIF_STOPPED;
++ camif_capture_stop(cfg);
++ cfg->perf.frames = 0; /* Dupplicated ? */
++ return 0;
++}
++
++/* When C working, P asks C to play togehter */
++/* Only P must call this function */
++void camif_start_c_with_p (camif_cfg_t *cfg, camif_cfg_t *other)
++{
++// cfg->gc->other = get_camif(CODEC_MINOR);
++ cfg->gc->other = other;
++ camif_start_p_with_c(cfg);
++}
++
++static void camif_start_p_with_c(camif_cfg_t *cfg)
++{
++ camif_cfg_t *other = (camif_cfg_t *)cfg->gc->other;
++ /* Preview Stop */
++ cfg->exec = CAMIF_DMA_OFF;
++ camif_capture_stop(cfg);
++ /* Start P and C */
++ camif_reset(CAMIF_RESET, 0);
++ cfg->exec =CAMIF_BOTH_DMA_ON;
++ camif_capture_start(cfg);
++ cfg->fsm = CAMIF_1nd_INT; /* For Preview */
++ if(!other) panic("Unexpected Error \n");
++ other->fsm = CAMIF_1nd_INT; /* For Preview */
++}
++
++static void camif_auto_restart(camif_cfg_t *cfg)
++{
++// if (cfg->dma_type & CAMIF_CODEC) return;
++ if (cfg->auto_restart)
++ camif_start_p_with_c(cfg);
++}
++
++
++/* Supposed that PREVIEW already running
++ * request PREVIEW to start with Codec
++ */
++static int camif_check_global(camif_cfg_t *cfg)
++{
++ int ret = 0;
++
++ if (down_interruptible(&cfg->gc->lock))
++ return -ERESTARTSYS;
++ if ( cfg->gc->status & CWANT2START ) {
++ cfg->gc->status &= ~CWANT2START;
++ cfg->auto_restart = 1;
++ ret = 1;
++ }
++ else {
++ ret = 0; /* There is no codec */
++ cfg->auto_restart = 0; /* Duplicated ..Dummy */
++ }
++
++ up(&cfg->gc->lock);
++
++ return ret;
++}
++
++/*
++ * 1nd INT : Start Interrupt
++ * Xnd INT : enable Last IRQ : pingpong get the valid data
++ * Ynd INT : Stop Codec or Preview : pingpong get the valid data
++ * Znd INT : Last IRQ : valid data
++ */
++#define CHECK_FREQ 5
++int camif_enter_p_4fsm(camif_cfg_t *cfg)
++{
++ int ret = 0;
++
++ cfg->perf.frames++;
++ if (cfg->fsm == CAMIF_NORMAL_INT)
++ if (cfg->perf.frames % CHECK_FREQ == 0)
++ ret = camif_check_global(cfg);
++ if (ret > 0) cfg->fsm = CAMIF_Xnd_INT; /* Codec wait for Preview */
++
++ switch (cfg->fsm) {
++ case CAMIF_1nd_INT: /* Start IRQ */
++ cfg->fsm = CAMIF_NORMAL_INT;
++ ret = INSTANT_SKIP;
++ DPRINTK(KERN_INFO "1nd INT \n");
++ break;
++ case CAMIF_NORMAL_INT:
++ cfg->status = CAMIF_INT_HAPPEN;
++ cfg->fsm = CAMIF_NORMAL_INT;
++ ret = INSTANT_GO;
++ DPRINTK(KERN_INFO "NORMAL INT \n");
++ break;
++ case CAMIF_Xnd_INT:
++ camif_last_irq_en(cfg);/* IRQ for Enabling LAST IRQ */
++ cfg->status = CAMIF_INT_HAPPEN;
++ cfg->fsm = CAMIF_Ynd_INT;
++ ret = INSTANT_GO;
++ DPRINTK(KERN_INFO "Xnd INT \n");
++ break;
++ case CAMIF_Ynd_INT: /* Capture Stop */
++ cfg->exec = CAMIF_DMA_OFF;
++ cfg->status = CAMIF_INT_HAPPEN;
++ camif_capture_stop(cfg);
++ cfg->fsm = CAMIF_Znd_INT;
++ ret = INSTANT_GO;
++ DPRINTK(KERN_INFO "Ynd INT \n");
++ break;
++ case CAMIF_Znd_INT: /* LAST IRQ (Dummy IRQ */
++ cfg->fsm = CAMIF_DUMMY_INT;
++ cfg->status = CAMIF_INT_HAPPEN;
++ ret = INSTANT_GO;
++ camif_auto_restart(cfg); /* Automatically Restart Camera */
++ DPRINTK(KERN_INFO "Znd INT \n");
++ break;
++ case CAMIF_DUMMY_INT:
++ cfg->status = CAMIF_STOPPED; /* Dupplicate ? */
++ ret = INSTANT_SKIP;
++// DPRINTK(KERN_INFO "Dummy INT \n");
++ break;
++ default:
++ printk(KERN_INFO "Unexpect INT %d \n",cfg->fsm);
++ ret = INSTANT_SKIP;
++ break;
++ }
++ return ret;
++}
++
++
++/*
++ * NO autorestart included in this function
++ */
++int camif_enter_c_4fsm(camif_cfg_t *cfg)
++{
++ int ret;
++
++ cfg->perf.frames++;
++#if 0
++ if ( (cfg->fsm==CAMIF_NORMAL_INT)
++ && (cfg->perf.frames>cfg->restart_limit-1)
++ )
++ cfg->fsm = CAMIF_Xnd_INT;
++#endif
++ switch (cfg->fsm) {
++ case CAMIF_1nd_INT: /* Start IRQ */
++ cfg->fsm = CAMIF_NORMAL_INT;
++// cfg->status = CAMIF_STARTED; /* need this to meet auto-restart */
++ ret = INSTANT_SKIP;
++ DPRINTK(KERN_INFO "1nd INT \n");
++ break;
++ case CAMIF_NORMAL_INT:
++ cfg->status = CAMIF_INT_HAPPEN;
++ cfg->fsm = CAMIF_NORMAL_INT;
++ ret = INSTANT_GO;
++ DPRINTK(KERN_INFO "NORMALd INT \n");
++ break;
++ case CAMIF_Xnd_INT:
++ camif_last_irq_en(cfg);/* IRQ for Enabling LAST IRQ */
++ cfg->status = CAMIF_INT_HAPPEN;
++ cfg->fsm = CAMIF_Ynd_INT;
++ ret = INSTANT_GO;
++ DPRINTK(KERN_INFO "Xnd INT \n");
++ break;
++ case CAMIF_Ynd_INT: /* Capture Stop */
++ cfg->exec = CAMIF_DMA_OFF;
++ cfg->status = CAMIF_INT_HAPPEN;
++ camif_capture_stop(cfg);
++ cfg->fsm = CAMIF_Znd_INT;
++ ret = INSTANT_GO;
++ DPRINTK(KERN_INFO "Ynd INT \n");
++ break;
++ case CAMIF_Znd_INT: /* LAST IRQ (Dummy IRQ */
++ cfg->fsm = CAMIF_DUMMY_INT;
++ cfg->status = CAMIF_INT_HAPPEN;
++ ret = INSTANT_GO;
++ DPRINTK(KERN_INFO "Znd INT \n");
++ break;
++ case CAMIF_DUMMY_INT:
++ cfg->status = CAMIF_STOPPED; /* Dupplicate ? */
++ ret = INSTANT_SKIP;
++ break;
++ default:
++ printk(KERN_INFO "Unexpect INT %d \n",cfg->fsm);
++ ret = INSTANT_SKIP;
++ break;
++ }
++ return ret;
++}
++
++/* 4 Interrups State Machine is for two pingpong
++ * 1nd INT : Start Interrupt
++ * Xnd INT : enable Last IRQ : pingpong get the valid data
++ * Ynd INT : Stop Codec or Preview : pingpong get the valid data
++ * Znd INT : Last IRQ : valid data
++ *
++ * Note:
++ * Before calling this func, you must call camif_reset
++ */
++
++int camif_enter_2fsm(camif_cfg_t *cfg) /* Codec FSM */
++{
++ int ret;
++
++ cfg->perf.frames++;
++ switch (cfg->fsm) {
++ case CAMIF_1nd_INT: /* Start IRQ */
++ cfg->fsm = CAMIF_Xnd_INT;
++ ret = INSTANT_SKIP;
++// printk(KERN_INFO "1nd INT \n");
++ break;
++ case CAMIF_Xnd_INT:
++ camif_last_irq_en(cfg);/* IRQ for Enabling LAST IRQ */
++ cfg->now_frame_num = 0;
++ cfg->status = CAMIF_INT_HAPPEN;
++ cfg->fsm = CAMIF_Ynd_INT;
++ ret = INSTANT_GO;
++// printk(KERN_INFO "2nd INT \n");
++ break;
++ case CAMIF_Ynd_INT: /* Capture Stop */
++ cfg->exec = CAMIF_DMA_OFF;
++ cfg->now_frame_num = 1;
++ cfg->status = CAMIF_INT_HAPPEN;
++ camif_capture_stop(cfg);
++ cfg->fsm = CAMIF_Znd_INT;
++ ret = INSTANT_GO;
++// printk(KERN_INFO "Ynd INT \n");
++ break;
++ case CAMIF_Znd_INT: /* LAST IRQ (Dummy IRQ */
++ cfg->now_frame_num = 0;
++// cfg->fsm = CAMIF_DUMMY_INT;
++ cfg->status = CAMIF_INT_HAPPEN;
++ ret = INSTANT_GO;
++// printk(KERN_INFO "Znd INT \n");
++ break;
++ case CAMIF_DUMMY_INT:
++ cfg->status = CAMIF_STOPPED; /* Dupplicate ? */
++ ret = INSTANT_SKIP;
++ printk(KERN_INFO "Dummy INT \n");
++ break;
++ default: /* CAMIF_PENDING_INT */
++ printk(KERN_INFO "Unexpect INT \n");
++ ret = INSTANT_SKIP;
++ break;
++ }
++ return ret;
++}
++
++
++/* 2 Interrups State Machine is for one pingpong
++ * 1nd INT : Stop Codec or Preview : pingpong get the valid data
++ * 2nd INT : Last IRQ : dummy data
++ */
++int camif_enter_1fsm(camif_cfg_t *cfg) /* Codec FSM */
++{
++ int ret;
++
++ cfg->perf.frames++;
++ switch (cfg->fsm) {
++ case CAMIF_Ynd_INT: /* IRQ for Enabling LAST IRQ */
++ cfg->exec = CAMIF_DMA_OFF;
++ camif_capture_stop(cfg);
++ cfg->fsm = CAMIF_Znd_INT;
++ ret = INSTANT_SKIP;
++ // printk(KERN_INFO "Ynd INT \n");
++ break;
++ case CAMIF_Znd_INT: /* LAST IRQ (Dummy IRQ */
++ cfg->fsm = CAMIF_DUMMY_INT;
++ cfg->status = CAMIF_INT_HAPPEN;
++ ret = INSTANT_GO;
++ // printk(KERN_INFO "Znd INT \n");
++ break;
++ case CAMIF_DUMMY_INT:
++ cfg->status = CAMIF_STOPPED; /* Dupplicate ? */
++ ret = INSTANT_SKIP;
++ printk(KERN_INFO "Dummy INT \n");
++ break;
++ default:
++ printk(KERN_INFO "Unexpect INT \n");
++ ret = INSTANT_SKIP;
++ break;
++ }
++ return ret;
++}
++
++
++/*
++ * GLOBAL STATUS CONTROL FUNCTION
++ *
++ */
++
++
++/* Supposed that PREVIEW already running
++ * request PREVIEW to start with Codec
++ */
++int camif_callback_start(camif_cfg_t *cfg)
++{
++ int doit = 1;
++ while (doit) {
++ if (down_interruptible(&cfg->gc->lock)) {
++ return -ERESTARTSYS;
++ }
++ cfg->gc->status = CWANT2START;
++ cfg->gc->other = cfg;
++ up(&cfg->gc->lock);
++ doit = 0;
++ }
++ return 0;
++}
++
++/*
++ * Return status of Preview Machine
++ ret value :
++ 0: Preview is not working
++ X: Codec must follow PREVIEW start
++*/
++int camif_check_preview(camif_cfg_t *cfg)
++{
++ int ret = 0;
++
++ if (down_interruptible(&cfg->gc->lock)) {
++ ret = -ERESTARTSYS;
++ return ret;
++ }
++ if (cfg->gc->user == 1) ret = 0;
++ // else if (cfg->gc->status & PNOTWORKING) ret = 0;
++ else ret = 1;
++ up(&cfg->gc->lock);
++ return ret;
++}
++
++
++
++
++/*
++ * Local variables:
++ * c-basic-offset: 8
++ * End:
++ */
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/camif.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/camif.h 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,304 @@
++/*
++ FIMC2.0 Camera Header File
++
++ Copyright (C) 2003 Samsung Electronics (SW.LEE: hitchcar@samsung.com)
++
++ Author : SW.LEE <hitchcar@samsung.com>
++
++ This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 2 of the License, or
++ (at your option) any later version.
++*
++*/
++
++
++#ifndef __FIMC20_CAMIF_H_
++#define __FIMC20_CAMIF_H_
++
++#ifdef __KERNEL__
++
++#include "bits.h"
++#include "videodev.h"
++#include <asm/types.h>
++#include <linux/i2c.h>
++
++#endif /* __KERNEL__ */
++
++#ifndef O_NONCAP
++#define O_NONCAP O_TRUNC
++#endif
++
++/* Codec or Preview Status */
++#define CAMIF_STARTED BIT1
++#define CAMIF_STOPPED BIT2
++#define CAMIF_INT_HAPPEN BIT3
++
++/* Codec or Preview : Interrupt FSM */
++#define CAMIF_1nd_INT BIT7
++#define CAMIF_Xnd_INT BIT8
++#define CAMIF_Ynd_INT BIT9
++#define CAMIF_Znd_INT BIT10
++#define CAMIF_NORMAL_INT BIT11
++#define CAMIF_DUMMY_INT BIT12
++#define CAMIF_PENDING_INT 0
++
++
++/* CAMIF RESET Definition */
++#define CAMIF_RESET BIT0
++#define CAMIF_EX_RESET_AL BIT1 /* Active Low */
++#define CAMIF_EX_RESET_AH BIT2 /* Active High */
++
++
++enum camif_itu_fmt {
++ CAMIF_ITU601 = BIT31,
++ CAMIF_ITU656 = 0
++};
++
++/* It is possbie to use two device simultaneously */
++enum camif_dma_type {
++ CAMIF_PREVIEW = BIT0,
++ CAMIF_CODEC = BIT1,
++};
++
++enum camif_order422 {
++ CAMIF_YCBYCR = 0,
++ CAMIF_YCRYCB = BIT14,
++ CAMIF_CBYCRY = BIT15,
++ CAMIF_CRYCBY = BIT14 | BIT15
++};
++
++enum flip_mode {
++ CAMIF_FLIP = 0,
++ CAMIF_FLIP_X = BIT14,
++ CAMIF_FLIP_Y = BIT15,
++ CAMIF_FLIP_MIRROR = BIT14 |BIT15,
++};
++
++enum camif_codec_fmt {
++ /* Codec part */
++ CAMIF_IN_YCBCR420 = BIT0, /* Currently IN_YCBCR format fixed */
++ CAMIF_IN_YCBCR422 = BIT1,
++ CAMIF_OUT_YCBCR420 = BIT4,
++ CAMIF_OUT_YCBCR422 = BIT5,
++ /* Preview Part */
++ CAMIF_RGB16 = BIT2,
++ CAMIF_RGB24 = BIT3,
++};
++
++enum camif_capturing {
++ CAMIF_BOTH_DMA_ON = BIT4,
++ CAMIF_DMA_ON = BIT3,
++ CAMIF_BOTH_DMA_OFF = BIT1,
++ CAMIF_DMA_OFF = BIT0,
++ /*------------------------*/
++ CAMIF_DMA_OFF_L_IRQ= BIT5,
++};
++
++typedef struct camif_performance
++{
++ int frames;
++ int framesdropped;
++ __u64 bytesin;
++ __u64 bytesout;
++ __u32 reserved[4];
++} camif_perf_t;
++
++
++typedef struct {
++ dma_addr_t phys_y;
++ dma_addr_t phys_cb;
++ dma_addr_t phys_cr;
++ u8 *virt_y;
++ u8 *virt_cb;
++ u8 *virt_cr;
++ dma_addr_t phys_rgb;
++ u8 *virt_rgb;
++}img_buf_t;
++
++
++/* this structure convers the CIWDOFFST, prescaler, mainscaler */
++typedef struct {
++ u32 modified_src_x; /* After windows applyed to source_x */
++ u32 modified_src_y;
++ u32 hfactor;
++ u32 vfactor;
++ u32 shfactor; /* SHfactor = 10 - ( hfactor + vfactor ) */
++ u32 prehratio;
++ u32 prevratio;
++ u32 predst_x;
++ u32 predst_y;
++ u32 scaleup_h;
++ u32 scaleup_v;
++ u32 mainhratio;
++ u32 mainvratio;
++ u32 scalerbypass; /* only codec */
++} scaler_t;
++
++
++enum v4l2_status {
++ CAMIF_V4L2_INIT = BIT0,
++ CAMIF_v4L2_DIRTY = BIT1,
++};
++
++
++/* Global Status Definition */
++#define PWANT2START BIT0
++#define CWANT2START BIT1
++#define BOTH_STARTED (PWANT2START|CWANT2START)
++#define PNOTWORKING BIT4
++#define C_WORKING BIT5
++
++typedef struct {
++ struct semaphore lock;
++ enum camif_itu_fmt itu_fmt;
++ enum camif_order422 order422;
++ u32 win_hor_ofst;
++ u32 win_ver_ofst;
++ u32 camclk; /* External Image Sensor Camera Clock */
++ u32 source_x;
++ u32 source_y;
++ u32 polarity_pclk;
++ u32 polarity_vsync;
++ u32 polarity_href;
++ struct i2c_client *sensor;
++ u32 user; /* MAX 2 (codec, preview) */
++ u32 old_priority; /* BUS PRIORITY register */
++ u32 status;
++ u32 init_sensor;/* initializing sensor */
++ void *other; /* Codec camif_cfg_t */
++ u32 reset_type; /* External Sensor Reset Type */
++ u32 reset_udelay;
++} camif_gc_t; /* gobal control register */
++
++
++/* when App want to change v4l2 parameter,
++ * we instantly store it into v4l2_t v2
++ * and then reflect it to hardware
++ */
++typedef struct v4l2 {
++ struct v4l2_fmtdesc *fmtdesc;
++ struct v4l2_pix_format fmt; /* current pixel format */
++ struct v4l2_input input;
++ struct video_picture picture;
++ enum v4l2_status status;
++ int used_fmt ; /* used format index */
++} v4l2_t;
++
++
++typedef struct camif_c_t {
++ struct video_device *v;
++ /* V4L2 param only for v4l2 driver */
++ v4l2_t v2;
++ camif_gc_t *gc; /* Common between Codec and Preview */
++ /* logical parameter */
++ wait_queue_head_t waitq;
++ u32 status; /* Start/Stop */
++ u32 fsm; /* Start/Stop */
++ u32 open_count; /* duplicated */
++ int irq;
++ char shortname[16];
++ u32 target_x;
++ u32 target_y;
++ scaler_t sc;
++ enum flip_mode flip;
++ enum camif_dma_type dma_type;
++ /* 4 pingpong Frame memory */
++ u8 *pp_virt_buf;
++ dma_addr_t pp_phys_buf;
++ u32 pp_totalsize;
++ u32 pp_num; /* used pingpong memory number */
++ img_buf_t img_buf[4];
++ enum camif_codec_fmt fmt;
++ enum camif_capturing exec;
++ camif_perf_t perf;
++ u32 now_frame_num;
++ u32 auto_restart; /* Only For Preview */
++} camif_cfg_t;
++
++#ifdef SW_DEBUG
++#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
++#else
++#define DPRINTK(fmt, args...)
++#endif
++
++
++#ifdef SW_DEBUG
++#define assert(expr) \
++ if(!(expr)) { \
++ printk( "Assertion failed! %s,%s,%s,line=%d\n", \
++ #expr,__FILE__,__FUNCTION__,__LINE__); \
++ }
++#else
++#define assert(expr)
++#endif
++
++
++
++extern int camif_capture_start(camif_cfg_t *);
++extern int camif_capture_stop(camif_cfg_t *);
++extern int camif_g_frame_num(camif_cfg_t *);
++extern u8 * camif_g_frame(camif_cfg_t *);
++extern int camif_win_offset(camif_gc_t *);
++extern void camif_hw_open(camif_gc_t *);
++extern void camif_hw_close(camif_cfg_t *);
++extern int camif_dynamic_open(camif_cfg_t *);
++extern int camif_dynamic_close(camif_cfg_t *);
++extern void camif_reset(int,int);
++extern void camif_setup_sensor(void);
++extern int camif_g_fifo_status(camif_cfg_t *);
++extern void camif_last_irq_en(camif_cfg_t *);
++extern void camif_change_flip(camif_cfg_t *);
++
++
++/* Todo
++ * API Interface function to both Character and V4L2 Drivers
++ */
++extern int camif_do_write(struct file *,const char *, size_t, loff_t *);
++extern int camif_do_ioctl(struct inode *, struct file *,unsigned int, void *);
++
++
++/*
++ * API for Decoder (S5x532, OV7620..)
++ */
++void camif_register_decoder(struct i2c_client *);
++void camif_unregister_decoder(struct i2c_client*);
++
++
++
++/* API for FSM */
++#define INSTANT_SKIP 0
++#define INSTANT_GO 1
++
++extern ssize_t camif_p_1fsm_start(camif_cfg_t *);
++extern ssize_t camif_p_2fsm_start(camif_cfg_t *);
++extern ssize_t camif_4fsm_start(camif_cfg_t *);
++extern ssize_t camif_p_stop(camif_cfg_t *);
++extern int camif_enter_p_4fsm(camif_cfg_t *);
++extern int camif_enter_c_4fsm(camif_cfg_t *);
++extern int camif_enter_2fsm(camif_cfg_t *);
++extern int camif_enter_1fsm(camif_cfg_t *);
++extern int camif_check_preview(camif_cfg_t *);
++extern int camif_callback_start(camif_cfg_t *);
++extern int camif_clock_init(camif_gc_t *);
++
++/*
++ * V4L2 Part
++ */
++#define VID_HARDWARE_SAMSUNG_FIMC20 236
++
++
++
++
++
++#endif
++
++
++/*
++ * Local variables:
++ * tab-width: 8
++ * c-indent-level: 8
++ * c-basic-offset: 8
++ * c-set-style: "K&R"
++ * End:
++ */
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/cam_reg.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/cam_reg.h 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,234 @@
++ /*----------------------------------------------------------
++ * (C) 2004 Samsung Electronics
++ * SW.LEE < hitchcar@samsung.com>
++ *
++ ----------------------------------------------------------- */
++
++#ifndef __FIMC20_CAMERA_H__
++#define __FIMC20_CAMERA_H__
++
++extern u32 * camregs;
++
++#ifdef CONFIG_ARCH_S3C24A0
++#define CAM_BASE_ADD 0x48000000
++#else /* S3C2440A */
++#define CAM_BASE_ADD 0x4F000000
++#endif
++
++#if ! defined(FExtr)
++#define UData(Data) ((unsigned long) (Data))
++#define FExtr(Data, Field) \
++ ((UData (Data) >> FShft (Field)) & FAlnMsk (Field))
++#define FInsrt(Value, Field) \
++ (UData (Value) << FShft (Field))
++#define FSize(Field) ((Field) >> 16)
++#define FShft(Field) ((Field) & 0x0000FFFF)
++#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field))
++#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1)
++#define F1stBit(Field) (UData (1) << FShft (Field))
++#define Fld(Size, Shft) (((Size) << 16) + (Shft))
++#endif
++
++/*
++ * CAMERA IP
++ * P-port is used as RGB Capturing device which including scale and crop
++ * those who want to see(preview ) the image on display needs RGB image.
++ *
++ * C-port is used as YCbCr(4:2:0, 4:2:2) Capturing device which including the scale and crop
++ * the prefix of C-port have the meaning of "Codec" ex. mpeg4, h263.. which requries the
++ YCBCB format not RGB
++ */
++
++#define S3C2440_CAM_REG_CISRCFMT (0x00) // RW Input Source Format
++#define S3C2440_CAM_REG_CIWDOFST (0x04) // Window offset register
++#define S3C2440_CAM_REG_CIGCTRL (0x08) // Global control register
++#define S3C2440_CAM_REG_CICOYSA0 (0x18) // Y 1 st frame start ads
++#define S3C2440_CAM_REG_CICOYSA1 (0x1C) // Y 2 nd frame start ads
++#define S3C2440_CAM_REG_CICOYSA2 (0x20) // Y 3 rd frame start ads
++#define S3C2440_CAM_REG_CICOYSA3 (0x24) // Y 4 th frame start ads
++#define S3C2440_CAM_REG_CICOCBSA0 (0x28) // Cb 1 st frame start ads
++#define S3C2440_CAM_REG_CICOCBSA1 (0x2C) // Cb 2 nd frame start ads
++#define S3C2440_CAM_REG_CICOCBSA2 (0x30) // Cb 3 rd frame start ads
++#define S3C2440_CAM_REG_CICOCBSA3 (0x34) // Cb 4 th frame start ads
++#define S3C2440_CAM_REG_CICOCRSA0 (0x38) // Cr 1 st frame start ads
++#define S3C2440_CAM_REG_CICOCRSA1 (0x3C) // Cr 2 nd frame start ads
++#define S3C2440_CAM_REG_CICOCRSA2 (0x40) // Cr 3 rd frame start ads
++#define S3C2440_CAM_REG_CICOCRSA3 (0x44) // Cr 4 th frame start ads
++#define S3C2440_CAM_REG_CICOTRGFMT (0x48) // Target img format of codec
++#define S3C2440_CAM_REG_CICOCTRL (0x4C) // Codec DMA control related
++#define S3C2440_CAM_REG_CICOSCPRERATIO (0x50) // Codec pre-scaler ratio
++#define S3C2440_CAM_REG_CICOSCPREDST (0x54) // Codec pre-scaler dest
++#define S3C2440_CAM_REG_CICOSCCTRL (0x58) // Codec main-scaler control
++#define S3C2440_CAM_REG_CICOTAREA (0x5C) // Codec pre-scaler dest
++#define S3C2440_CAM_REG_CICOSTATUS (0x64) // Codec path status
++#define S3C2440_CAM_REG_CIPRCLRSA0 (0x6C) // RGB 1 st frame start ads
++#define S3C2440_CAM_REG_CIPRCLRSA1 (0x70) // RGB 2 nd frame start ads
++#define S3C2440_CAM_REG_CIPRCLRSA2 (0x74) // RGB 3 rd frame start ads
++#define S3C2440_CAM_REG_CIPRCLRSA3 (0x78) // RGB 4 th frame start ads
++#define S3C2440_CAM_REG_CIPRTRGFMT (0x7C) // Target img fmt of preview
++#define S3C2440_CAM_REG_CIPRCTRL (0x80) // Preview DMA ctl related
++#define S3C2440_CAM_REG_CIPRSCPRERATIO (0x84) // Preview pre-scaler ratio
++#define S3C2440_CAM_REG_CIPRSCPREDST (0x88) // Preview pre-scaler dest
++#define S3C2440_CAM_REG_CIPRSCCTRL (0x8C) // Preview main-scaler ctl
++#define S3C2440_CAM_REG_CIPRTAREA (0x90) // Preview pre-scaler dest
++#define S3C2440_CAM_REG_CIPRSTATUS (0x98) // Preview path status
++#define S3C2440_CAM_REG_CIIMGCPT (0xA0) // Image capture enable cmd
++
++#define S3C2440_CAM_REG_CICOYSA(__x) (0x18 + (__x)*4 )
++#define S3C2440_CAM_REG_CICOCBSA(__x) (0x28 + (__x)*4 )
++#define S3C2440_CAM_REG_CICOCRSA(__x) (0x38 + (__x)*4 )
++#define S3C2440_CAM_REG_CIPRCLRSA(__x) (0x6C + (__x)*4 )
++
++/* CISRCFMT BitField */
++#define SRCFMT_ITU601 BIT31
++#define SRCFMT_ITU656 0
++#define SRCFMT_UVOFFSET_128 BIT30
++#define fCAM_SIZE_H Fld(13, 16)
++#define fCAM_SIZE_V Fld(13, 0)
++#define SOURCE_HSIZE(x) FInsrt((x), fCAM_SIZE_H)
++#define SOURCE_VSIZE(x) FInsrt((x), fCAM_SIZE_V)
++
++
++/* Window Option Register */
++#define WINOFEN BIT31
++#define CO_FIFO_Y BIT30
++#define CO_FIFO_CB BIT15
++#define CO_FIFO_CR BIT14
++#define PR_FIFO_CB BIT13
++#define PR_FIFO_CR BIT12
++#define fWINHOR Fld(11, 16)
++#define fWINVER Fld(11, 0)
++#define WINHOROFST(x) FInsrt((x), fWINHOR)
++#define WINVEROFST(x) FInsrt((x), fWINVER)
++
++/* Global Control Register */
++#define GC_SWRST BIT31
++#define GC_CAMRST BIT30
++#define GC_INVPOLPCLK BIT26
++#define GC_INVPOLVSYNC BIT25
++#define GC_INVPOLHREF BIT24
++
++/*--------------------------------------------------
++ REGISTER BIT FIELD DEFINITION TO
++ YCBCR and RGB
++----------------------------------------------------*/
++/* Codec Target Format Register */
++#define IN_YCBCR420 0
++#define IN_YCBCR422 BIT31
++#define OUT_YCBCR420 0
++#define OUT_YCBCR422 BIT30
++
++#if 0
++#define FLIP_NORMAL 0
++#define FLIP_X (BIT14)
++#define FLIP_Y (BIT15)
++#define FLIP_MIRROR (BIT14|BIT15)
++#endif
++
++/** BEGIN ************************************/
++/* Cotents: Common in both P and C port */
++#define fTARGET_HSIZE Fld(13,16)
++#define TARGET_HSIZE(x) FInsrt((x), fTARGET_HSIZE)
++#define fTARGET_VSIZE Fld(13,0)
++#define TARGET_VSIZE(x) FInsrt((x), fTARGET_VSIZE)
++#define FLIP_X_MIRROR BIT14
++#define FLIP_Y_MIRROR BIT15
++#define FLIP_180_MIRROR (BIT14 | BIT15)
++/** END *************************************/
++
++/* Codec DMA Control Register */
++#define fYBURST_M Fld(5,19)
++#define fYBURST_R Fld(5,14)
++#define fCBURST_M Fld(5,9)
++#define fCBURST_R Fld(5,4)
++#define YBURST_M(x) FInsrt((x), fYBURST_M)
++#define CBURST_M(x) FInsrt((x), fCBURST_M)
++#define YBURST_R(x) FInsrt((x), fYBURST_R)
++#define CBURST_R(x) FInsrt((x), fCBURST_R)
++#define LAST_IRQ_EN BIT2 /* Common in both P and C port */
++/*
++ * Check the done signal of capturing image for JPEG
++ * !!! AutoClear Bit
++ */
++
++
++/* (Codec, Preview ) Pre-Scaler Control Register 1 */
++#define fSHIFT Fld(4,28)
++#define PRE_SHIFT(x) FInsrt((x), fSHIFT)
++#define fRATIO_H Fld(7,16)
++#define PRE_HRATIO(x) FInsrt((x), fRATIO_H)
++#define fRATIO_V Fld(7,0)
++#define PRE_VRATIO(x) FInsrt((x), fRATIO_V)
++
++/* (Codec, Preview ) Pre-Scaler Control Register 2*/
++#define fDST_WIDTH Fld(12,16)
++#define fDST_HEIGHT Fld(12,0)
++#define PRE_DST_WIDTH(x) FInsrt((x), fDST_WIDTH)
++#define PRE_DST_HEIGHT(x) FInsrt((x), fDST_HEIGHT)
++
++
++/* (Codec, Preview) Main-scaler control Register */
++#define S_METHOD BIT31 /* Sampling method only for P-port */
++#define SCALERSTART BIT15
++/* Codec scaler bypass for upper 2048x2048
++ where ImgCptEn_CoSC and ImgCptEn_PrSC should be 0
++*/
++
++#define SCALERBYPASS BIT31
++#define RGB_FMT24 BIT30
++#define RGB_FMT16 0
++
++/*
++#define SCALE_UP_H BIT29
++#define SCALE_UP_V BIT28
++*/
++
++#define fMAIN_HRATIO Fld(9, 16)
++#define MAIN_HRATIO(x) FInsrt((x), fMAIN_HRATIO)
++
++#define SCALER_START BIT15
++
++#define fMAIN_VRATIO Fld(9, 0)
++#define MAIN_VRATIO(x) FInsrt((x), fMAIN_VRATIO)
++
++/* (Codec, Preview ) DMA Target AREA Register */
++#define fCICOTAREA Fld(26,0)
++#define TARGET_DMA_AREA(x) FInsrt((x), fCICOTAREA)
++
++/* Preview DMA Control Register */
++#define fRGBURST_M Fld(5,19)
++#define fRGBURST_R Fld(5,14)
++#define RGBURST_M(x) FInsrt((x), fRGBURST_M)
++#define RGBURST_R(x) FInsrt((x), fRGBURST_R)
++
++
++/* (Codec, Preview) Status Register */
++#define CO_OVERFLOW_Y BIT31
++#define CO_OVERFLOW_CB BIT30
++#define CO_OVERFLOW_CR BIT29
++#define PR_OVERFLOW_CB BIT31
++#define PR_OVERFLOW_CR BIT30
++
++#define VSYNC BIT28
++
++#define fFRAME_CNT Fld(2,26)
++#define FRAME_CNT(x) FExtr((x),fFRAME_CNT)
++
++#define WIN_OFF_EN BIT25
++#define fFLIP_MODE Fld(2,23)
++#define FLIP_MODE(x) EExtr((x), fFLIP_MODE)
++#define CAP_STATUS_CAMIF BIT22
++#define CAP_STATUS_CODEC BIT21
++#define CAP_STATUS_PREVIEW BIT21
++#define VSYNC_A BIT20
++#define VSYNC_B BIT19
++
++/* Image Capture Enable Regiser */
++#define CAMIF_CAP_ON BIT31
++#define CAMIF_CAP_CODEC_ON BIT30
++#define CAMIF_CAP_PREVIEW_ON BIT29
++
++
++
++
++#endif /* S3C2440_CAMER_H */
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/imgsensor.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/imgsensor.c 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,250 @@
++/*
++ * Copyright (C) 2004 Samsung Electronics
++ * SW.LEE <hitchcar@samsung.com>
++ *
++ * Copyright (C) 2000 Russell King : pcf8583.c
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Driver for FIMC20 Camera Decoder
++ */
++
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/i2c.h>
++#include <linux/slab.h>
++#include <linux/string.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++
++
++#ifdef CONFIG_ARCH_S3C24A0A
++#else
++//#include <asm/arch/S3C2440.h>
++#endif
++
++#define SW_DEBUG
++#define CONFIG_VIDEO_V4L1_COMPAT
++#include <linux/videodev.h>
++#include "camif.h"
++#include "sensor.h"
++
++#ifndef SAMSUNG_SXGA_CAM
++#include "s5x532_rev36.h"
++#else
++#include "sxga.h"
++#endif
++
++static struct i2c_driver s5x532_driver;
++static camif_gc_t data = {
++ itu_fmt: CAMIF_ITU601,
++ order422: CAMIF_YCBYCR,
++ camclk: 24000000,
++#ifndef SAMSUNG_SXGA_CAM
++ source_x: 640,
++ source_y: 480,
++ win_hor_ofst: 112,
++ win_ver_ofst: 20,
++#else
++ source_x: 1280,
++ source_y: 1024,
++ win_hor_ofst: 0,
++ win_ver_ofst: 0,
++#endif
++ polarity_pclk:1,
++ polarity_href:0,
++#ifdef CONFIG_ARCH_S3C24A0A
++ reset_type:CAMIF_EX_RESET_AL, /* Active Low */
++#else
++ reset_type:CAMIF_EX_RESET_AH, /* Ref board has inverted signal */
++#endif
++ reset_udelay:2000,
++};
++
++#define CAM_ID 0x5a
++
++static unsigned short ignore = I2C_CLIENT_END;
++static unsigned short normal_addr[] = { (CAM_ID>>1), I2C_CLIENT_END };
++static struct i2c_client_address_data addr_data = {
++ normal_i2c: normal_addr,
++ probe: &ignore,
++ ignore: &ignore,
++};
++
++s5x532_t s5x532_regs_mirror[S5X532_REGS];
++
++unsigned char
++s5x532_read(struct i2c_client *client, unsigned char subaddr)
++{
++ int ret;
++ unsigned char buf[1];
++ struct i2c_msg msg ={ client->addr, 0, 1, buf};
++ buf[0] = subaddr;
++
++ ret = i2c_transfer(client->adapter,&msg, 1) == 1 ? 0 : -EIO;
++ if (ret == -EIO) {
++ printk(" I2C write Error \n");
++ return -EIO;
++ }
++
++ msg.flags = I2C_M_RD;
++ ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
++
++ return buf[0];
++}
++
++
++static int
++s5x532_write(struct i2c_client *client,
++ unsigned char subaddr, unsigned char val)
++{
++ unsigned char buf[2];
++ struct i2c_msg msg = { client->addr, 0, 2, buf};
++
++ buf[0]= subaddr;
++ buf[1]= val;
++
++ return i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
++}
++
++void inline s5x532_init(struct i2c_client *sam_client)
++{
++ int i;
++
++ printk(KERN_ERR "s5x532_init \n");
++ for (i = 0; i < S5X532_INIT_REGS; i++) {
++ s5x532_write(sam_client,
++ s5x532_reg[i].subaddr, s5x532_reg[i].value );
++ }
++
++#ifdef YOU_WANT_TO_CHECK_IMG_SENSOR
++ for (i = 0; i < S5X532_INIT_REGS;i++) {
++ if ( s5x532_reg[i].subaddr == PAGE_ADDRESS ) {
++ s5x532_write(sam_client,
++ s5x532_reg[i].subaddr, s5x532_reg[i].value);
++
++ printk(KERN_ERR "Page: Subaddr %02x = 0x%02x\n",
++ s5x532_reg[i].subaddr, s5x532_regs_mirror[i].value);
++
++
++ } else
++ {
++ s5x532_regs_mirror[i].subaddr = s5x532_reg[i].subaddr;
++ s5x532_regs_mirror[i].value =
++ s5x532_read(sam_client,s5x532_reg[i].subaddr);
++ printk(KERN_ERR "Subaddr %02x = 0x%02x\n",
++ s5x532_reg[i].subaddr, s5x532_regs_mirror[i].value);
++ }
++ }
++#endif
++
++}
++
++static int
++s5x532_attach(struct i2c_adapter *adap, int addr, int kind)
++{
++ struct i2c_client *c;
++
++ c = kmalloc(sizeof(*c), GFP_KERNEL);
++ if (!c) return -ENOMEM;
++
++ strcpy(c->name, "S5X532");
++// c->id = s5x532_driver.id;
++ c->flags = 0 /* I2C_CLIENT_ALLOW_USE */;
++ c->addr = addr;
++ c->adapter = adap;
++ c->driver = &s5x532_driver;
++ data.sensor = c;
++ i2c_set_clientdata(c, &data);
++
++ camif_register_decoder(c);
++ return i2c_attach_client(c);
++}
++
++static int s5x532_probe(struct i2c_adapter *adap)
++{
++ return i2c_probe(adap, &addr_data, s5x532_attach);
++}
++
++static int s5x532_detach(struct i2c_client *client)
++{
++ i2c_detach_client(client);
++ camif_unregister_decoder(client);
++ return 0;
++}
++
++static int
++s5x532_command(struct i2c_client *client, unsigned int cmd, void *arg)
++{
++ switch (cmd) {
++ case SENSOR_INIT:
++ s5x532_init(client);
++ printk(KERN_INFO "CAMERA: S5X532 Sensor initialized\n");
++ break;
++ case USER_ADD:
++ /* MOD_INC_USE_COUNT; uh.. 2.6 deals with this, old-timer */
++ break;
++ case USER_EXIT:
++ /* MOD_DEC_USE_COUNT; */
++ break;
++/* Todo
++ case SENSOR_BRIGHTNESS:
++ change_sensor();
++ break;
++*/
++ default:
++ panic("Unexpect Sensor Command \n");
++ break;
++ }
++ return 0;
++}
++
++static struct i2c_driver s5x532_driver = {
++ driver: { name: "S5X532" },
++ id: 0, /* optional in i2c-id.h I2C_ALGO_S3C, */
++ attach_adapter: s5x532_probe,
++ detach_client: s5x532_detach,
++ command: s5x532_command
++};
++
++static void iic_gpio_port(void)
++{
++/* FIXME: no gpio config for i2c !!!
++#ifdef CONFIG_ARCH_S3C24A0A
++#else
++ GPECON &= ~(0xf <<28);
++ GPECON |= 0xa <<28;
++#endif
++*/
++}
++
++static __init int camif_sensor_init(void)
++{
++ iic_gpio_port();
++ return i2c_add_driver(&s5x532_driver);
++}
++
++
++static __init void camif_sensor_exit(void)
++{
++ i2c_del_driver(&s5x532_driver);
++}
++
++module_init(camif_sensor_init)
++module_exit(camif_sensor_exit)
++
++MODULE_AUTHOR("SW.LEE <hitchcar@sec.samsung.com>");
++MODULE_DESCRIPTION("I2C Client Driver For Fimc2.0 MISC Driver");
++MODULE_LICENSE("GPL");
++
++
++
++/*
++ * Local variables:
++ * c-basic-offset: 8
++ * End:
++ */
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/Kconfig
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/Kconfig 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,7 @@
++
++config S3C2440_CAMERA
++ bool "S3C24xx Camera interface"
++ depends on ARCH_S3C2410
++ help
++ Camera driver for S3C2440 camera unit
++
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/Makefile 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,8 @@
++obj-$(CONFIG_S3C2440_CAMERA) += \
++ videodev.o \
++ imgsensor.o \
++ video-driver.o \
++ camif.o \
++ camif_fsm.o \
++ qt-driver.o
++
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/miscdevice.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/miscdevice.h 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,18 @@
++
++ /*----------------------------------------------------------
++ * (C) 2004 Samsung Electronics
++ * SW.LEE < hitchcar@samsung.com>
++ *
++ ----------------------------------------------------------- */
++
++#ifndef _LINUX_S3C_MISCDEVICE_H
++#define _LINUX_S3C_MISCDEVICE_H
++
++#define CODEC_MINOR 212
++#define PREVIEW_MINOR 213
++
++
++
++
++
++#endif
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/qt-driver.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/qt-driver.c 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,172 @@
++/*
++ * SW.LEE <hitchcar@samsung.com>
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License 2. See the file COPYING in the main directory of this archive
++ * for more details.
++ */
++
++#include <linux/version.h>
++#include <linux/module.h>
++#include <linux/delay.h>
++#include <linux/errno.h>
++#include <linux/fs.h>
++#include <linux/kernel.h>
++#include <linux/major.h>
++#include <linux/slab.h>
++#include <linux/poll.h>
++#include <linux/signal.h>
++#include <linux/ioport.h>
++#include <linux/sched.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/kmod.h>
++#include <linux/vmalloc.h>
++#include <linux/init.h>
++#include <asm/io.h>
++#include <asm/page.h>
++#include <asm/irq.h>
++#include <asm/semaphore.h>
++#include <linux/miscdevice.h>
++
++//#define SW_DEBUG
++
++#define CONFIG_VIDEO_V4L1_COMPAT
++#include <linux/videodev.h>
++#include "camif.h"
++#include "miscdevice.h"
++#include "cam_reg.h"
++#include "sensor.h"
++#include "userapp.h"
++
++extern camif_cfg_t * get_camif(int nr);
++
++
++/************************* Sharp Zarus API **************************
++* refering to Camera Driver API for SL-5000D/SL-5600 revision 1.00
++* April 11, 2002.
++ SW.LEE <hitchcar@sec.samsung.com>
++ I want to use Sharp Camera Application.
++*
++*/
++
++#define READ_MODE_STATUS 0x1
++#define READ_MODE_IMAGE 0x0
++#define CAPTURE_SPEED
++#define H_FLIP
++#define V_FLIP
++typedef enum sharp_readmode
++{
++ IMAGE = 0, STATUS = 1,
++ FASTER = 0, BETTER = 2,
++ XNOFLIP = 0, XFLIP = 4,
++ YNOFLIP = 0, YFLIP = 8,
++ AUTOMATICFLIP = -1
++} ReadMode_t;
++
++
++static struct sharp_param_t {
++ ReadMode_t readMode;
++ char CameraStatus[4];
++} sharp_param = { STATUS, {'s','m','c','A'}};
++
++
++camif_param_t qt_parm = { 640,480,240,320,16,0};
++
++static void setReadMode(const char *b,size_t count)
++{
++ int i = *(b+2) - 48 ;
++ if ( 4 == count ) {
++ i = (*(b+3) - 48) + i * 10;
++ }
++
++ // DPRINTK(" setReadMode %s conversion value %d \n",b , i);
++ if ( i & STATUS ) {
++ // DPRINTK(" STATUS MODE \n");
++ sharp_param.readMode = i;
++ }
++ else {
++ // DPRINTK(" IMAGE MODE \n");
++ sharp_param.readMode = i;
++ }
++}
++
++
++
++
++extern ssize_t camif_p_read(struct file *, char *, size_t , loff_t *);
++
++ssize_t z_read(struct file *f, char *buf, size_t count, loff_t *pos)
++{
++ size_t end;
++
++ if (sharp_param.readMode & STATUS ) {
++ buf[0] = sharp_param.CameraStatus[0];
++ buf[1] = sharp_param.CameraStatus[1];
++ buf[2] = sharp_param.CameraStatus[2];
++ buf[3] = sharp_param.CameraStatus[3];
++ end = 4;
++ return end;
++ }
++ else { /* Image ReadMode */
++ /*
++ if (( sharp_param.readMode & (BETTER|X FLIP|YFLIP)))
++ DPRINTK(" Not Supporting BETTER|XFLIP|YFLIP\n");
++ */
++ return camif_p_read(f,buf,count,pos);
++ }
++}
++
++static void z_config(camif_cfg_t *cfg,int x, int y)
++{
++ cfg->target_x = x;
++ cfg->target_y = y;
++ cfg->fmt = CAMIF_RGB16;
++ if (camif_dynamic_open(cfg)) {
++ panic(" Eror Happens \n");
++ }
++}
++
++
++ssize_t z_write(struct file *f, const char *b, size_t c, loff_t *pos)
++{
++ int array[5];
++ int zoom = 1;
++ camif_cfg_t *cfg;
++
++ cfg = get_camif(MINOR(f->f_dentry->d_inode->i_rdev));
++// DPRINTK(" param %s count %d \n",b, c );
++
++ switch(*b) {
++ case 'M':
++ setReadMode(b, c);
++ break;
++ case 'B': /* Clear the latch flag of shutter button */
++ DPRINTK(" clear latch flag of camera's shutter button\n");
++ sharp_param.CameraStatus[0]='s';
++ break;
++ case 'Y': /* I don't know how to set Shutter pressed */
++ DPRINTK(" set latch flag n");
++ sharp_param.CameraStatus[0]='S';
++ break;
++ case 'S': /* Camera Image Resolution */
++ case 'R': /* Donot support Rotation */
++ DPRINTK(" param %s count %d \n",b, c );
++ get_options((char *)(b+2), 5, array);
++ if ( array[3] == 512 ) zoom = 2;
++ z_config(cfg, array[1] * zoom , array[2] * zoom );
++ camif_4fsm_start(cfg);
++ break;
++ case 'C':
++ DPRINTK(" param %s count %d \n",b, c );
++ DPRINTK(" Start the camera to capture \n");
++ sharp_param.CameraStatus[2]='C';
++ camif_4fsm_start(cfg);
++ break;
++ default:
++ printk("Unexpected param %s count %d \n",b, c );
++ }
++
++ return c;
++}
++
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/qt.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/qt.h 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,18 @@
++/*
++ * SW.LEE <hitchcar@samsung.com>
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License 2. See the file COPYING in the main directory of this archive
++ * for more details.
++ */
++
++#ifndef __Z_API_H_
++#define __Z_API_H_
++
++extern ssize_t z_read(struct file *f, char *buf, size_t count, loff_t *pos);
++extern ssize_t z_write(struct file *f, const char *b, size_t c, loff_t *pos);
++
++
++
++#endif
++
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/s5x532.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/s5x532.h 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,143 @@
++/*
++ * 2004 (C) Samsung Electronics
++ * SW.LEE <hitchcar@sec.samsung.com>
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License 2. See the file COPYING in the main directory of this archive
++ * for more details.
++ */
++
++
++#ifndef _SMDK2440_S5X532_H_
++#define _SMDK2440_S5X532_H_
++
++
++#define CHIP_DELAY 0xFF
++
++typedef struct samsung_t{
++ unsigned char subaddr;
++ unsigned char value;
++ unsigned char page;
++} s5x532_t;
++
++s5x532_t s5x532_reg[] = {
++ // page 5
++ {0xec,0x05},
++ {0x08,0x55,0x5},
++ {0x0a,0x75,0x5},
++ {0x0c,0x90,0x5},
++ {0x0e,0x18,0x5},
++ {0x12,0x09,0x5},
++ {0x14,0x9d,0x5},
++ {0x16,0x90,0x5},
++ {0x1a,0x18,0x5},
++ {0x1c,0x0c,0x5},
++ {0x1e,0x09,0x5},
++ {0x20,0x06,0x5},
++ {0x22,0x20,0x5},
++ {0x2a,0x00,0x5},
++ {0x2d,0x04,0x5},
++ {0x12,0x24,0x5},
++ // page 3
++ {0xec,0x03,0x3},
++ {0x0c,0x09,0x3},
++ {0x6c,0x09,0x3},
++ {0x2b,0x10,0x3}, // momo clock inversion
++ // page 2
++ {0xec,0x02,0x2},
++ {0x03,0x09,0x2},
++ {0x05,0x08,0x2},
++ {0x06,0x01,0x2},
++ {0x07,0xf8,0x2},
++ {0x15,0x25,0x2},
++ {0x30,0x29,0x2},
++ {0x36,0x12,0x2},
++ {0x38,0x04,0x2},
++ {0x1b,0x77,0x2}, // 24MHz : 0x77, 12MHz : 0x22
++ {0x1c,0x77,0x2}, // 24MHz : 0x77, 12MHz : 0x22
++ // page 1
++ {0xec,0x01,0x1},
++ {0x00,0x03,0x1}, //
++ {0x0a,0x08,0x1}, // 0x0-QQVGA, 0x06-CIF, 0x02-QCIF, 0x08-VGA, 0x04-QVGA, 0x0a-SXGA
++ {0x0c,0x00,0x1}, // Pattern selectio. 0-CIS, 1-Color bar, 2-Ramp, 3-Blue screen
++ {0x10,0x27,0x1},
++ // 0x21-ITU-R656(CrYCbY), 0x25-ITU-R601(CrYCbY), 0x26-ITU-R601(YCbYCr)
++ {0x50,0x21,0x1}, // Hblank
++ {0x51,0x00,0x1}, // Hblank
++ {0x52,0xA1,0x1}, // Hblank
++ {0x53,0x02,0x1}, // Hblank
++ {0x54,0x01,0x1}, // Vblank
++ {0x55,0x00,0x1}, // Vblank
++ {0x56,0xE1,0x1}, // Vblank
++ {0x57,0x01,0x1}, // Vblank
++ {0x58,0x21,0x1}, // Hsync
++ {0x59,0x00,0x1}, // Hsync
++ {0x5a,0xA1,0x1}, // Hsync
++ {0x5b,0x02,0x1}, // Hsync
++ {0x5c,0x03,0x1}, // Vref
++ {0x5d,0x00,0x1}, // Vref
++ {0x5e,0x05,0x1}, // Vref
++ {0x5f,0x00,0x1}, // Vref
++ {0x70,0x0E,0x1},
++ {0x71,0xD6,0x1},
++ {0x72,0x30,0x1},
++ {0x73,0xDB,0x1},
++ {0x74,0x0E,0x1},
++ {0x75,0xD6,0x1},
++ {0x76,0x18,0x1},
++ {0x77,0xF5,0x1},
++ {0x78,0x0E,0x1},
++ {0x79,0xD6,0x1},
++ {0x7a,0x28,0x1},
++ {0x7b,0xE6,0x1},
++ {0x50,0x00,0x1},
++ {0x5c,0x00,0x1},
++
++ // page 0
++ {0xec,0x00,0x0},
++ {0x79,0x01,0x0},
++ {0x58,0x90,0x0},
++ {0x59,0xA0,0x0},
++ {0x5a,0x50,0x0},
++ {0x5b,0x70,0x0},
++ {0x5c,0xD0,0x0},
++ {0x5d,0xC0,0x0},
++ {0x5e,0x28,0x0},
++ {0x5f,0x08,0x0},
++ {0x50,0x90,0x0},
++ {0x51,0xA0,0x0},
++ {0x52,0x50,0x0},
++ {0x53,0x70,0x0},
++ {0x54,0xD0,0x0},
++ {0x55,0xC0,0x0},
++ {0x56,0x28,0x0},
++ {0x57,0x00,0x0},
++ {0x48,0x90,0x0},
++ {0x49,0xA0,0x0},
++ {0x4a,0x50,0x0},
++ {0x4b,0x70,0x0},
++ {0x4c,0xD0,0x0},
++ {0x4d,0xC0,0x0},
++ {0x4e,0x28,0x0},
++ {0x4f,0x08,0x0},
++ {0x72,0x82,0x0}, // main clock = 24MHz:0xd2, 16M:0x82, 12M:0x54
++ {0x75,0x05,0x0} // absolute vertical mirror. junon
++
++};
++
++
++#define S5X532_INIT_REGS (sizeof(s5x532_reg)/sizeof(s5x532_reg[0]))
++#define S5X532_RISC_REGS 0xEB
++#define S5X532_ISP_REGS 0xFB /* S5C7323X */
++#define S5X532_CIS_REGS 0x2F /* S5K437LA03 */
++
++
++#define PAGE_ADDRESS 0xEC
++
++//#define S5X532_REGS (S5X532_RISC_REGS+S5X532_ISP_REGS+S5X532_CIS_REGS)
++#define S5X532_REGS (0x1000)
++
++
++
++#endif
++
++
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/s5x532_rev36.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/s5x532_rev36.h 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,208 @@
++/*
++ * 2004 (C) Samsung Electronics
++ * SW.LEE <hitchcar@sec.samsung.com>
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License 2. See the file COPYING in the main directory of this archive
++ * for more details.
++ */
++
++
++#ifndef _SMDK2440_S5X532_H_
++#define _SMDK2440_S5X532_H_
++
++
++#define CHIP_DELAY 0xFF
++
++typedef struct samsung_t{
++ unsigned char subaddr;
++ unsigned char value;
++ unsigned char page;
++} s5x532_t;
++
++s5x532_t s5x532_reg[] = {
++
++ //=============== page0 ===============//
++ {0xec,0x00,0x00},
++ {0x02,0x00,0x00},
++ {0x14,0x60,0x00},
++ {0x15,0x60,0x00},
++ {0x16,0x60,0x00},
++ {0x1b,0x20,0x00},
++ {0x1c,0x20,0x00},
++ {0x1d,0x20,0x00},
++ {0x1e,0x20,0x00},
++ {0x72,0xdc,0x00},
++ {0x73,0x11,0x00},
++ {0x76,0x82,0x00},
++ {0x77,0x90,0x00},
++ {0x78,0x6c,0x00},
++ {0x0a,0x02,0x00},
++ {0x34,0x0d,0x00},
++ {0x35,0x0a,0x00},
++ {0x36,0x05,0x00},
++ {0x37,0x05,0x00},
++ {0x38,0x06,0x00},
++ {0x39,0x08,0x00},
++ {0x3A,0x0d,0x00},
++ {0x3B,0x0d,0x00},
++ {0x3C,0x18,0x00},
++ {0x3D,0xE0,0x00},
++ {0x3E,0x20,0x00},
++ {0x66,0x02,0x00},
++ {0x6c,0x40,0x00},
++ {0x7c,0x01,0x00},
++ {0x0D,0x24,0x00},
++ {0x40,0x1B,0x00},
++ {0x41,0x4F,0x00},
++ {0x42,0x24,0x00},
++ {0x43,0x3E,0x00},
++ {0x44,0x32,0x00},
++ {0x45,0x30,0x00},
++ {0x48,0xa0,0x00},
++ {0x49,0xd0,0x00},
++ {0x4A,0x28,0x00},
++ {0x4B,0x7d,0x00},
++ {0x4C,0xd0,0x00},
++ {0x4D,0xe0,0x00},
++ {0x4E,0x1a,0x00},
++ {0x4F,0xa0,0x00},
++ {0x50,0xc0,0x00},
++ {0x51,0xc0,0x00},
++ {0x52,0x42,0x00},
++ {0x53,0x7e,0x00},
++ {0x54,0xc0,0x00},
++ {0x55,0xf0,0x00},
++ {0x56,0x1e,0x00},
++ {0x57,0xe0,0x00},
++ {0x58,0xc0,0x00},
++ {0x59,0xa0,0x00},
++ {0x5A,0x4a,0x00},
++ {0x5B,0x7e,0x00},
++ {0x5C,0xc0,0x00},
++ {0x5D,0xf0,0x00},
++ {0x5E,0x2a,0x00},
++ {0x5F,0x10,0x00},
++ {0x79,0x00,0x00},
++ {0x7a,0x00,0x00},
++ {0xe0,0x0f,0x00},
++ {0xe3,0x14,0x00},
++ {0xe5,0x48,0x00},
++ {0xe7,0x58,0x00},
++
++ //=============== page1 ===============//
++ {0xec,0x01,0x01},
++ {0x10,0x05,0x01},
++ {0x20,0xde,0x01},
++ {0x0b,0x06,0x01},
++ {0x30,0x00,0x01},
++ {0x31,0x00,0x01},
++ {0x32,0x00,0x01},
++ {0x24,0x28,0x01},
++ {0x25,0x3F,0x01},
++ {0x26,0x65,0x01},
++ {0x27,0xA1,0x01},
++ {0x28,0xFF,0x01},
++ {0x29,0x96,0x01},
++ {0x2A,0x85,0x01},
++ {0x2B,0xFF,0x01},
++ {0x2C,0x00,0x01},
++ {0x2D,0x1B,0x01},
++ {0xB0,0x28,0x01},
++ {0xB1,0x3F,0x01},
++ {0xB2,0x65,0x01},
++ {0xB3,0xA1,0x01},
++ {0xB4,0xFF,0x01},
++ {0xB5,0x96,0x01},
++ {0xB6,0x85,0x01},
++ {0xB7,0xFF,0x01},
++ {0xB8,0x00,0x01},
++ {0xB9,0x1B,0x01},
++ {0x15,0x15,0x01},
++ {0x18,0x85,0x01},
++ {0x1f,0x05,0x01},
++ {0x87,0x40,0x01},
++ {0x37,0x60,0x01},
++ {0x38,0xd5,0x01},
++ {0x48,0xa0,0x01},
++ {0x61,0x54,0x01},
++ {0x62,0x54,0x01},
++ {0x63,0x14,0x01},
++ {0x64,0x14,0x01},
++ {0x6d,0x12,0x01},
++ {0x78,0x09,0x01},
++ {0x79,0xD7,0x01},
++ {0x7A,0x14,0x01},
++ {0x7B,0xEE,0x01},
++
++ //=============== page2 ===============//
++ {0xec,0x02,0x02},
++ {0x2c,0x76,0x02},
++ {0x25,0x25,0x02},
++ {0x27,0x27,0x02},
++ {0x30,0x29,0x02},
++ {0x36,0x08,0x02},
++ {0x38,0x04,0x02},
++
++ //=============== page3 ===============//
++ {0xec,0x03,0x03},
++ {0x08,0x00,0x03},
++ {0x09,0x33,0x03},
++
++ //=============== page4 ===============//
++ {0xec,0x04,0x04},
++ {0x00,0x21,0x04},
++ {0x01,0x00,0x04},
++ {0x02,0x9d,0x04},
++ {0x03,0x02,0x04},
++ {0x04,0x04,0x04},
++ {0x05,0x00,0x04},
++ {0x06,0x1f,0x04},
++ {0x07,0x02,0x04},
++ {0x08,0x21,0x04},
++ {0x09,0x00,0x04},
++ {0x0a,0x9d,0x04},
++ {0x0b,0x02,0x04},
++ {0x0c,0x04,0x04},
++ {0x0d,0x00,0x04},
++ {0x0e,0x20,0x04},
++ {0x0f,0x02,0x04},
++ {0x1b,0x3c,0x04},
++ {0x1c,0x3c,0x04},
++
++ //=============== page5 ===============//
++ {0xec,0x05,0x05},
++ {0x1f,0x00,0x05},
++ {0x08,0x59,0x05},
++ {0x0a,0x71,0x05},
++ {0x1e,0x23,0x05},
++ {0x0e,0x3c,0x05},
++
++ //=============== page7 ===============//
++ {0xec,0x07,0x07},
++ {0x11,0xfe,0x07},
++
++ // added by junon
++ {0xec,0x01,0x07},
++ {0x10,0x26,0x07},
++ // 0x21-ITU-R656(CbYCrY), 0x25-ITU-R601(CbYCrY), 0x26-ITU-R601(YCrYCb)
++
++
++};
++
++
++#define S5X532_INIT_REGS (sizeof(s5x532_reg)/sizeof(s5x532_reg[0]))
++#define S5X532_RISC_REGS 0xEB
++#define S5X532_ISP_REGS 0xFB /* S5C7323X */
++#define S5X532_CIS_REGS 0x2F /* S5K437LA03 */
++
++
++#define PAGE_ADDRESS 0xEC
++
++//#define S5X532_REGS (S5X532_RISC_REGS+S5X532_ISP_REGS+S5X532_CIS_REGS)
++#define S5X532_REGS (0x1000)
++
++
++
++#endif
++
++
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/sensor.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/sensor.h 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,20 @@
++/*
++ *
++ * Copyright (C) 2004 Samsung Electronics
++ * SW.LEE <hitchcar@sec.samsung.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#ifndef __SENSOR_CMD_H_
++#define __SENSOR_CMD_H_
++
++#include "bits.h"
++
++#define SENSOR_INIT BIT0
++#define USER_ADD BIT1
++#define USER_EXIT BIT2
++
++#endif
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/sxga.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/sxga.h 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,504 @@
++/*
++ * 2004 (C) Samsung Electronics
++ * SW.LEE <hitchcar@sec.samsung.com>
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License 2. See the file COPYING in the main directory of this archive
++ * for more details.
++ */
++
++
++#ifndef _SAMSUNG_SXGA_H_
++#define _SAMSUNG_SXGA_H_
++
++
++#define CHIP_DELAY 0xFF
++
++typedef struct samsung_t{
++ unsigned char subaddr;
++ unsigned char value;
++ unsigned char page;
++} s5x532_t;
++
++s5x532_t s5x532_reg[] = {
++ // page 0
++ {0xec,0x00,0x0},
++ {0x0c,0x38,0x0},
++ {0x0d,0x24,0x0},
++ {0x13,0x10,0x0},
++ {0x14,0x10,0x0},
++ {0x15,0x10,0x0},
++ {0x16,0x10,0x0},
++ {0x17,0x20,0x0},
++ {0x18,0x30,0x0},
++ {0x19,0x30,0x0},
++ {0x1a,0x10,0x0},
++ {0x1b,0x10,0x0},
++
++ {0x2d,0x40,0x0},
++ {0x3e,0x10,0x0},
++ {0x34,0x0a,0x0},
++ {0x39,0x04,0x0},
++ {0x3a,0x02,0x0},
++ {0x31,0x05,0x0},
++
++ {0x40,0x1d,0x0},
++ {0x41,0x50,0x0},
++ {0x42,0x24,0x0},
++ {0x43,0x3f,0x0},
++ {0x44,0x30,0x0},
++ {0x45,0x31,0x0},
++
++ {0x48,0xa0,0x0},
++ {0x49,0xc0,0x0},
++ {0x4a,0x58,0x0},
++ {0x4b,0x50,0x0},
++ {0x4c,0xb0,0x0},
++ {0x4d,0xc0,0x0},
++ {0x4e,0x30,0x0},
++ {0x4f,0x20,0x0},
++
++ {0x50,0xa0,0x0},
++ {0x51,0xc0,0x0},
++ {0x52,0x50,0x0},
++ {0x53,0x60,0x0},
++ {0x54,0xb0,0x0},
++ {0x55,0xc0,0x0},
++ {0x56,0x20,0x0},
++ {0x57,0x08,0x0},
++// {0x72,0x50,0x0}, // Clock 16
++ {0x72,0x78,0x0}, // Clock 24Mhz
++// {0x72,0xf0,0x0}, // Clock 48Mhz
++ // page 1
++ {0xec,0x01,0x1},
++ {0x10,0x17,0x1}, // ITU-R601
++ /*
++ [3:2] : out_sel
++ 00 : 656
++ 01 : 601
++ 10 : RGB
++ 11 : CIS
++ [1] : YC_SEL
++ [0] : CBCR_SEL
++ */
++
++ {0x0b,0x06,0x1}, // 6
++ {0x20,0xa8,0x1}, //b0); // Highlight C Supp 040215
++ {0x22,0x26,0x1}, //2f); 040225
++
++ {0x24,0x08,0x1}, //00); //1F); 040226
++ {0x25,0x10,0x1}, //10); //34);
++ {0x26,0x40,0x1}, //56);
++ {0x27,0x80,0x1}, //8D);
++ {0x28,0x2c,0x1}, //E7);
++ {0x29,0xd6,0x1}, //7C);
++ {0x2A,0x0c,0x1}, //70);
++ {0x2B,0xFF,0x1}, //FF);
++ {0x2C,0x00,0x1}, //00);
++ {0x2D,0x5f,0x1}, //1B);
++ //
++ {0xB0,0x08,0x1}, //00); //1F); 040226
++ {0xB1,0x10,0x1}, //10); //34);50
++ {0xB2,0x40,0x1}, //36);
++ {0xB3,0x80,0x1}, //6D);
++ {0xB4,0x2c,0x1}, //b7);
++ {0xB5,0xd6,0x1}, //7C);
++ {0xB6,0x0c,0x1}, //70);
++ {0xB7,0xFF,0x1}, //FF);
++ {0xB8,0x00,0x1}, //00);
++ {0xB9,0x5f,0x1}, //1B);
++
++
++ {0xc2,0x01,0x1}, // shading On
++ {0xc3,0x80,0x1},
++ {0xc4,0x02,0x1},
++ {0xc5,0x00,0x1},
++ {0xc6,0x01,0x1},
++ {0xc7,0x00,0x1},
++ {0xc8,0x05,0x1},
++ {0xc9,0x00,0x1},
++ {0xca,0x04,0x1},
++
++ // shading 5
++ {0xd0,0xb5,0x1},
++ {0xd1,0x9c,0x1},
++ {0xd2,0x8d,0x1},
++ {0xd3,0x84,0x1},
++ {0xd4,0x84,0x1},
++ {0xd5,0x91,0x1},
++ {0xd6,0xa0,0x1},
++ {0xd7,0xb5,0x1},
++
++ {0xd8,0xc0,0x1},
++ {0xd9,0xa6,0x1},
++ {0xda,0x93,0x1},
++ {0xdb,0x85,0x1},
++ {0xdc,0x85,0x1},
++ {0xdd,0x90,0x1},
++ {0xde,0xa0,0x1},
++ {0xdf,0xb8,0x1},
++
++ // Page 2
++ {0xec,0x02,0x02},
++
++ {0x2d,0x02,0x02},
++ {0x20,0x13,0x02},
++ {0x21,0x13,0x2},
++ {0x22,0x13,0x2},
++ {0x23,0x13,0x2},
++ {0x2e,0x85,0x2},
++ {0x2f,0x34,0x2},
++ {0x30,0x00,0x2},
++ {0x28,0x94,0x2},
++
++
++ // page 3
++ {0xec,0x03,0x03},
++ {0x10,0x00,0x3},
++ {0x20,0x00,0x3},
++ {0x21,0x20,0x3},
++ {0x22,0x00,0x3},
++ {0x23,0x00,0x3},
++ {0x40,0x20,0x3},
++ {0x41,0x20,0x3},
++ {0x42,0x20,0x3},
++ {0x43,0x20,0x3},
++ {0x60,0x00,0x3},
++ {0x61,0x00,0x3},
++ {0x62,0x00,0x3},
++ {0x63,0x00,0x3},
++ {0x64,0x04,0x3},
++ {0x65,0x1C,0x3},
++ {0x66,0x05,0x3},
++ {0x67,0x1C,0x3},
++ {0x68,0x00,0x3},
++ {0x69,0x2D,0x3},
++ {0x6a,0x00,0x3},
++ {0x6b,0x72,0x3},
++ {0x6c,0x00,0x3},
++ {0x6d,0x00,0x3},
++ {0x6e,0x16,0x3}, // 2.38
++ {0x6f,0x16,0x3}, // 2.38
++ {0x70,0x00,0x3},
++ {0x71,0x00,0x3},
++ {0x72,0x45,0x3},
++ {0x73,0x00,0x3},
++ {0x74,0x1C,0x3},
++ {0x75,0x05,0x3},
++
++ {0x80,0x00,0x3}, //for 0.02 _ 44
++ {0x81,0x00,0x3},
++ {0x82,0x00,0x3},
++ {0x83,0x00,0x3},
++ {0x84,0x04,0x3},
++ {0x85,0x1c,0x3},
++ {0x86,0x05,0x3},
++ {0x87,0x1c,0x3},
++ {0x88,0x00,0x3},
++ {0x89,0x2d,0x3},
++ {0x8a,0x00,0x3},
++ {0x8b,0xcc,0x3},
++ {0x8c,0x00,0x3},
++ {0x8d,0x00,0x3},
++ {0x8e,0x08,0x3},
++ {0x8f,0x08,0x3},
++ {0x90,0x01,0x3},
++ {0x91,0x00,0x3},
++ {0x92,0x91,0x3},
++ {0x93,0x00,0x3},
++ {0x94,0x88,0x3},
++ {0x95,0x02,0x3},
++
++
++
++ // page 4
++ {0xec,0x04,0x04},
++ {0x3f,0x09,0x04}, // VGA : old board :0x08 , new board ; 0X09
++ {0x18,0x00,0x04}, // sxga
++ {0x1c,0x41,0x04},
++ {0x20,0x41,0x04}, // vga center 040215
++ {0x22,0xc1,0x04},// a1);
++ {0x23,0x02,0x04},
++ {0x28,0x41,0x04},
++ {0x2a,0xc1,0x04},// a1);
++ {0x2b,0x02,0x04},
++
++ {0x3c,0x0b,0x04}, //f); // vga
++ {0x58,0x11,0x04},
++ {0x5c,0x14,0x04},
++ {0x60,0x21,0x04},
++ {0x61,0x00,0x04},
++ {0x62,0xB1,0x04},
++ {0x63,0x02,0x04},
++ {0x64,0x01,0x04},
++ {0x65,0x00,0x04},
++ {0x66,0x01,0x04},
++ {0x67,0x02,0x04},
++ {0x68,0x21,0x04},
++ {0x69,0x00,0x04},
++ {0x6a,0xB1,0x04},
++ {0x6b,0x02,0x04},
++ {0x6c,0x01,0x04},
++ {0x6d,0x00,0x04},
++ {0x6e,0x01,0x04},
++ {0x6f,0x02,0x04},
++ {0x70,0x2D,0x04},
++ {0x71,0x00,0x04},
++ {0x72,0xd3,0x04}, // 14
++ {0x73,0x05,0x04}, // 15
++ {0x74,0x1C,0x04},
++ {0x75,0x05,0x04},
++ {0x76,0x1b,0x04}, // HendL
++ {0x77,0x0b,0x04}, // HendH
++ {0x78,0x01,0x04}, // 5.00
++ {0x79,0x80,0x04}, // 5.2a
++ {0x7a,0x33,0x04},
++ {0x7b,0x00,0x04},
++ {0x7c,0x38,0x04}, // 5.0e
++ {0x7d,0x03,0x04},
++ {0x7e,0x00,0x04},
++ {0x7f,0x0A,0x04},
++
++ {0x80,0x2e,0x04},
++ {0x81,0x00,0x04},
++ {0x82,0xae,0x04},
++ {0x83,0x02,0x04},
++ {0x84,0x00,0x04},
++ {0x85,0x00,0x04},
++ {0x86,0x01,0x04},
++ {0x87,0x02,0x04},
++ {0x88,0x2e,0x04},
++ {0x89,0x00,0x04},
++ {0x8a,0xae,0x04},
++ {0x8b,0x02,0x04},
++ {0x8c,0x1c,0x04},
++ {0x8d,0x00,0x04},
++ {0x8e,0x04,0x04},
++ {0x8f,0x02,0x04},
++ {0x90,0x2d,0x04},
++ {0x91,0x00,0x04},
++ {0x92,0xa5,0x04},
++ {0x93,0x00,0x04},
++ {0x94,0x88,0x04},
++ {0x95,0x02,0x04},
++ {0x96,0xb3,0x04},
++ {0x97,0x06,0x04},
++ {0x98,0x01,0x04},
++ {0x99,0x00,0x04},
++ {0x9a,0x33,0x04},
++ {0x9b,0x30,0x04},
++ {0x9c,0x50,0x04},
++ {0x9d,0x30,0x04},
++ {0x9e,0x01,0x04},
++ {0x9f,0x08,0x04},
++
++ // page 5
++ {0xec,0x05,0x05},
++ {0x5a,0x22,0x05},
++
++ // page 6
++ {0xec,0x06,0x06},
++ {0x14,0x1e,0x06},
++ {0x15,0xb4,0x04},
++ {0x16,0x25,0x04},
++ {0x17,0x74,0x04},
++
++ {0x10,0x48,0x04},
++ {0x11,0xa0,0x04},
++ {0x12,0x40,0x04}, // 040216 AE1 window ÁÙÀÓ
++ {0x13,0x70,0x04},
++
++ {0x1a,0x29,0x04}, // 040217 AWB window ÁÙÀÓ
++ {0x30,0x40,0x04},
++ {0x31,0xa2,0x04},
++ {0x32,0x50,0x04},
++ {0x33,0xbc,0x04},
++ {0x34,0x10,0x04},
++ {0x35,0xd2,0x04},
++ {0x36,0x18,0x04},
++ {0x37,0xf5,0x04},
++ {0x38,0x10,0x04},
++ {0x39,0xd3,0x04},
++ {0x3a,0x1a,0x04},
++ {0x3b,0xf0,0x04},
++
++ // page 7
++ {0xec,0x07,0x07},
++ {0x08,0xff,0x7},
++ {0x38,0x01,0x7}, //07); 040315
++ {0x39,0x01,0x7}, //02); //4); 040223 040315
++ {0x11,0xfe,0x7}, //fe); // green -2 040303
++ {0x2a,0x20,0x7},
++ {0x2b,0x20,0x7},
++ {0x2c,0x10,0x7},
++ {0x2d,0x00,0x7},
++ {0x2e,0xf0,0x7},
++ {0x2f,0xd0,0x7},
++ {0x3a,0xf0,0x7},
++ {0x23,0x07,0x7}, // for ESD
++
++ // page 0
++ {0xec,0x00,0x00},
++ {0x8a,0x04,0x00},
++
++ // page 1
++ {0xec,0x01,0x01},
++ {0xe5,0xb0,0x01},
++ {0xe5,0xb0,0x01},
++ {0xc2,0x01,0x01},
++
++ {0x61,0x7b,0x01},
++ {0x62,0x7b,0x01},
++ {0x63,0x1b,0x01},
++ {0x64,0x1b,0x01},
++
++ // page 0
++ {0xec,0x00,0x00},
++ {0x7e,0x04,0x00},
++
++ // page 4
++ {0xec,0x04,0x04},
++ {0x04,0x02,0x04},
++ {0x06,0x02,0x04},
++
++ // page 1
++ {0xec,0x01,0x01},
++ {0x10,0x05,0x01},
++ {0x54,0x02,0x01},
++ {0x56,0x02,0x01},
++
++ // page 3
++ {0xec,0x03,0x03},
++ {0x0e,0x08,0x03},
++ {0x0f,0x08,0x03},
++
++ // page 4
++ {0xec,0x04,0x04},
++ {0x00,0x30,0x04},
++ {0x0a,0x30,0x04},
++
++ // page 5
++ {0xec,0x05,0x05},
++ {0x08,0x33,0x05},
++
++ // page 0
++ {0xec,0x00,0x00},
++ {0x02,0x00,0x00},
++
++ // page 4
++//scale out
++ {0xec,0x04,0x04},
++ {0x02,0x20,0x04},
++ {0x1c,0x4f,0x04},
++
++ // page 1
++ {0xec,0x01,0x01},
++ {0x52,0x20,0x01},
++
++ // page 5
++ {0xec,0x05,0x05},
++ {0x0e,0x4f,0x05},
++
++//ae speed
++ // page 0
++ {0xec,0x00,0x00},
++ {0x92,0x80,0x00},
++ {0x93,0x02,0x00},
++ {0x94,0x04,0x00},
++ {0x95,0x04,0x00},
++ {0x96,0x04,0x00},
++ {0x97,0x04,0x00},
++ {0x9b,0x47,0x00},
++
++ {0xec,0x00,0x00},
++ {0x40,0x17,0x00},
++ {0x41,0x4c,0x00},
++ {0x42,0x1d,0x00},
++ {0x43,0x3e,0x00},
++ {0x44,0x2a,0x00},
++ {0x45,0x2d,0x00},
++
++ {0xec,0x01,0x01},
++ {0x20,0xd0,0x01}, //high light color reference
++
++ {0xec,0x00,0x00},
++ {0x7e,0x00,0x00},
++ {0x73,0x11,0x00}, // 41
++ {0x78,0x78,0x00},
++
++ {0xec,0x07,0x07},
++ {0x1b,0x3e,0x07},
++
++ {0xec,0x00,0x00},
++ {0x48,0xA0,0x00}, //s48C0
++ {0x49,0xB0,0x00}, //s49B0
++ {0x4a,0x30,0x00}, //s4a20
++ {0x4b,0x70,0x00}, //s4b70
++ {0x4c,0xD0,0x00}, //s4cA0
++ {0x4d,0xB0,0x00}, //s4dB0
++ {0x4e,0x30,0x00}, //s4e30
++ {0x4f,0xF0,0x00}, //s4fF0
++ {0x50,0xA0,0x00}, //s50D0
++ {0x51,0xB0,0x00}, //s51B0
++ {0x52,0x25,0x00}, //s5210
++ {0x53,0x70,0x00}, //s5370
++ {0x54,0xD0,0x00}, //s5490
++ {0x55,0xD0,0x00}, //s55B0
++ {0x56,0x3A,0x00}, //s5640
++ {0x57,0xD0,0x00}, //s57D0
++ {0x58,0xA0,0x00}, //s58D0
++ {0x59,0xA0,0x00}, //s59B0
++ {0x5a,0x32,0x00}, //s5a0A
++ {0x5b,0x7A,0x00}, //s5b7A
++ {0x5c,0xB0,0x00}, //s5c90
++ {0x5d,0xC0,0x00}, //s5dC0
++ {0x5e,0x3E,0x00}, //s5e4A
++ {0x5f,0xfa,0x00}, //s5fD0
++
++ // gamma
++ {0xec,0x01,0x01},
++ {0x24,0x31,0x01},
++ {0x25,0x4C,0x01},
++ {0x26,0x75,0x01},
++ {0x27,0xB5,0x01},
++ {0x28,0x17,0x01},
++ {0x29,0xAE,0x01},
++ {0x2A,0x97,0x01},
++ {0x2B,0xFF,0x01},
++ {0x2C,0x00,0x01},
++ {0x2D,0x5B,0x01},
++
++ {0xB0,0x31,0x01},
++ {0xB1,0x4C,0x01},
++ {0xB2,0x75,0x01},
++ {0xB3,0xB5,0x01},
++ {0xB4,0x17,0x01},
++ {0xB5,0xAE,0x01},
++ {0xB6,0x97,0x01},
++ {0xB7,0xFF,0x01},
++ {0xB8,0x00,0x01},
++ {0xB9,0x5B,0x01},
++
++ {0xec,0x00,0x00},
++ {0x77,0xb0,0x00},
++ {0x39,0x06,0x00},
++ {0x3a,0x08,0x00},
++
++};
++
++
++#define S5X532_INIT_REGS (sizeof(s5x532_reg)/sizeof(s5x532_reg[0]))
++#define S5X532_RISC_REGS 0xEB
++#define S5X532_ISP_REGS 0xFB /* S5C7323X */
++#define S5X532_CIS_REGS 0x2F /* S5K437LA03 */
++
++
++#define PAGE_ADDRESS 0xEC
++
++//#define S5X532_REGS (S5X532_RISC_REGS+S5X532_ISP_REGS+S5X532_CIS_REGS)
++#define S5X532_REGS (0x1000)
++
++
++
++#endif
++
++
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/userapp.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/userapp.h 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,44 @@
++/*
++ Character Driver API Interface
++
++ Copyright (C) 2003 Samsung Electronics (SW.LEE: hitchcar@samsung.com)
++
++ This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 2 of the License, or
++ (at your option) any later version.
++
++*/
++
++#ifndef __FIMC20_CAMIF_USR_APP_H_
++#define __FIMC20_CAMIF_USR_APP_H_
++
++
++/*
++ * IOCTL Command for Character Driver
++ */
++
++#define CMD_CAMERA_INIT 0x23
++/* Test Application Usage */
++typedef struct {
++ int src_x;
++ int src_y;
++ int dst_x;
++ int dst_y;
++ int bpp;
++ int flip;
++} camif_param_t;
++
++
++
++#endif
++
++
++/*
++ * Local variables:
++ * tab-width: 8
++ * c-indent-level: 8
++ * c-basic-offset: 8
++ * c-set-style: "K&R"
++ * End:
++ */
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/v4l2_api.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/v4l2_api.c 2008-12-11 22:46:48.000000000 +0100
+@@ -0,0 +1,311 @@
++/*
++ * . 2004-01-03: SW.LEE <hitchcar@sec.samsung.com>
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License 2. See the file COPYING in the main directory of this archive
++ * for more details.
++ */
++
++#include <linux/config.h>
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/sched.h>
++#include <linux/irq.h>
++#include <linux/tqueue.h>
++#include <linux/locks.h>
++#include <linux/completion.h>
++#include <linux/delay.h>
++#include <linux/slab.h>
++#include <linux/vmalloc.h>
++#include <linux/miscdevice.h>
++#include <linux/wait.h>
++
++#include <asm/io.h>
++#include <asm/semaphore.h>
++#include <asm/hardware.h>
++#include <asm/uaccess.h>
++
++#include <asm/arch/cpu_s3c2440.h>
++#include <asm/arch/S3C2440.h>
++
++#include "camif.h"
++#include "videodev.h"
++
++/*
++ Codec_formats/Preview_format[0] must be same to initial value of
++ preview_init_param/codec_init_param
++*/
++
++const struct v4l2_fmtdesc codec_formats[] = {
++ {
++ .index = 0,
++ .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
++// .flags = FORMAT_FLAGS_PLANAR,
++ .description = "4:2:2, planar, Y-Cb-Cr",
++ .pixelformat = V4L2_PIX_FMT_YUV422P,
++
++ },{
++ .index = 1,
++ .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
++// .flags = FORMAT_FLAGS_PLANAR,
++ .name = "4:2:0, planar, Y-Cb-Cr",
++ .fourcc = V4L2_PIX_FMT_YUV420,
++ }
++};
++
++
++/* Todo
++ FIMC V4L2_PIX_FMT_RGB565 is not same to that of V4L2spec
++ and so we need image convert to FIMC V4l2_PIX_FMT_RGB565.
++*/
++const struct v4l2_fmtdesc preview_formats[] = {
++ {
++ .index = 1,
++ .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
++ .description = "16 bpp RGB, le",
++ .fourcc = V4L2_PIX_FMT_RGB565,
++// .flags = FORMAT_FLAGS_PACKED,
++ },
++ {
++ .index = 0,
++ .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
++// .flags = FORMAT_FLAGS_PACKED,
++ .description = "32 bpp RGB, le",
++ .fourcc = V4L2_PIX_FMT_BGR32,
++ }
++}
++
++#define NUM_F ARRARY_SIZE(preview_formats)
++
++
++/*
++ * This function and v4l2 structure made for V4L2 API functions
++ * App <--> v4l2 <--> logical param <--> hardware
++ */
++static int camif_get_v4l2(camif_cfg_t *cfg)
++{
++ return 0;
++}
++
++
++/*
++** Gives the depth of a video4linux2 fourcc aka pixel format in bits.
++*/
++static int pixfmt2depth(int pixfmt,int *fmtptr)
++{
++ int fmt, depth;
++
++ switch (pixfmt) {
++ case V4L2_PIX_FMT_RGB565:
++ case V4L2_PIX_FMT_RGB565X:
++ fmt = CAMIF_RGB_16;
++ depth = 16;
++ break;
++ case V4L2_PIX_FMT_BGR24: /* Not tested */
++ case V4L2_PIX_FMT_RGB24:
++ fmt = CAMIF_RGB_24;
++ depth = 24;
++ break;
++ case V4L2_PIX_FMT_BGR32:
++ case V4L2_PIX_FMT_RGB32:
++ fmt = CAMIF_RGB_24;
++ depth 32;
++ break;
++ case V4L2_PIX_FMT_GREY: /* Not tested */
++ fmt = CAMIF_OUT_YCBCR420;
++ depth = 8;
++ break;
++ case V4L2_PIX_FMT_YUYV:
++ case V4L2_PIX_FMT_UYVY:
++ case V4L2_PIX_FMT_YUV422P:
++ fmt = CAMIF_OUT_YCBCR422;
++ depth = 16;
++ break;
++ case V4L2_PIX_FMT_YUV420:
++ fmt = CAMIF_OUT_YCBCR420;
++ depth = 12;
++ break;
++ }
++ if (fmtptr) *fmtptr = fmt;
++ return depth;
++}
++
++
++
++static int camif_s_v4l2(camif_cfg_t *cfg)
++{
++ int num = cfg->v2.used_fmt;
++
++ if ( !(cfg->v2.status&CAMIF_V4L2_INIT)) {
++ int depth;
++ int fourcc = v2.fmtdesc[num].pixelformat;
++
++ /* To define v4l2_fmtsdesc */
++ if (cfg->dma_type == CAMIF_CODEC)
++ cfg->v2->fmtdesc = codec_formats;
++ else
++ cfg->v2->fmtdesc = preview_formats;
++
++ /* To define v4l2_format used currently */
++ cfg->v2.fmt.width = cfg->target_x;
++ cfg->v2.fmt.height = cfg->target_y;
++ cfg->v2.fmt.field = V4L2_FIELD_NONE;
++ cfg->v2.fmt.pixelformat = fourcc;
++ depth = pixfmt2depth(fourcc,NULL);
++ cfg->v2.fmt.bytesperline= cfg->v2.fmt.width*depth >> 3;
++ cfg->v2.fmt.sizeimage =
++ cfg->v2.fmt.height * cfg->v2.fmt.bytesperline;
++
++ /* To define v4l2_input */
++ cfg->v2.input.index = 0;
++ if (cfg->dma_type == CAMIF_CODEC)
++ snprintf(cfg->v2.input.name, 31, "CAMIF CODEC");
++ else
++ snprintf(cfg->v2.input.name, 31, "CAMIF PREVIEW");
++ cfg->v2.input.type = V4L2_INPUT_TYPE_CAMERA;
++
++ /* Write the Status of v4l2 machine */
++ cfg->v2.status |= CAMIF_V4L2_INIT;
++ }
++ return 0;
++}
++
++
++static int camif_g_fmt(camif_cfg_t *cfg, struct v4l2_format *f)
++{
++ int size = sizeof(struct v4l2_pix_format);
++
++ switch (f->type) {
++ case V4L2_BUF_TYPE_VIDEO_CAPTURE:
++ memset(&f->fmt.pix,0,size);
++ memcpy(&f->fmt.pix,&cfg->v2.fmt,size);
++ return 0;
++ default:
++ return -EINVAL;
++ }
++}
++
++
++/* Copy v4l2 parameter into other element of camif_cfg_t */
++static int camif_s_try(camif_cfg_t *cfg, int f)
++{
++ int fmt;
++ cfg->target_x = cfg->v2.fmt.width;
++ cfg->target_y = cfg->v2.fmt.height;
++ pixfmt2depth(cfg->v2.fmt.pixelformat,&fmt);
++ cfg->fmt = fmt;
++ camif_dynamic_conf(cfg);
++}
++
++
++static int camif_s_fmt(camif_cfg_t *cfg, struct v4l2_format *f)
++{
++ int retval;
++
++ switch (f->type) {
++ case V4L2_BUF_TYPE_VIDEO_CAPTURE:
++ {
++ /* update our state informations */
++// down(&fh->cap.lock);
++ cfg->v2.fmt = f->pix;
++ cfg->v2.status |= CAMIF_v4L2_DIRTY;
++ camif_dynamic_conf(cfg);
++ cfg->v2.status &= ~CAMIF_v4L2_DIRTY; /* dummy ? */
++// up(&fh->cap.lock);
++
++ return 0;
++ }
++ default:
++ return -EINVAL;
++ }
++
++}
++
++/* Refer ioctl of videodeX.c and bttv-driver.c */
++int camif_do_ioctl
++(struct inode *inode, struct file *file,unsigned int cmd, void * arg)
++{
++ camif_cfg_t *cfg = file->private_data;
++ int ret = 0;
++
++ switch (cmd) {
++ case VIDIOC_QUERYCAP:
++ {
++ struct v4l2_capability *cap = arg;
++
++ strcpy(cap->driver,"Fimc Camera");
++ strlcpy(cap->card,cfg->v->name,sizeof(cap->card));
++ sprintf(cap->bus_info,"FIMC 2.0 AHB Bus");
++ cap->version = 0;
++ cap->capabilities =
++ V4L2_CAP_VIDEO_CAPTURE |V4L2_CAP_READWRITE;
++ return 0;
++ }
++ case VIDIOC_G_FMT:
++ {
++ struct v4l2_format *f = arg;
++ return camif_g_fmt(cfg,f);
++ }
++ case VIDIOC_S_FMT:
++ {
++ struct v4l2_format *f = arg;
++ return camif_s_fmt(cfg,f);
++ }
++
++ case VIDIOC_ENUM_FMT:
++ {
++ struct v4l2_fmtdesc *f = arg;
++ enum v4l2_buf_type type = f->type;
++ int index = f->index;
++
++ if (index >= NUM_F)
++ return -EINVAL;
++ switch (f->type) {
++ case V4L2_BUF_TYPE_VIDEO_CAPTURE:
++ break;
++ case V4L2_BUF_TYPE_VIDEO_OVERLAY:
++ case V4L2_BUF_TYPE_VBI_CAPTURE:
++ default:
++ return -EINVAL;
++ }
++ memset(f,0,sizeof(*f));
++ memcpy(f,cfg->v2.fmtdesc+index,sizeof(*f));
++ return 0;
++ }
++ case VIDIOC_G_INPUT:
++ {
++ u32 *i = arg;
++ *i = cfg->v2.input;
++ return 0;
++ }
++ case VIDIOC_S_INPUT:
++ {
++ int index = *((int *)arg);
++ if (index != 0)
++ return -EINVAL;
++ cfg->v2.input.index = index;
++ return 0;
++ }
++
++ default:
++ return -ENOIOCTLCMD; /* errno.h */
++ } /* End of Switch */
++
++
++}
++
++
++
++
++
++
++
++/*
++ * Local variables:
++ * tab-width: 8
++ * c-indent-level: 8
++ * c-basic-offset: 8
++ * c-set-style: "K&R"
++ * End:
++ */
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/videodev2.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/videodev2.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,938 @@
++#ifndef __LINUX_VIDEODEV2_H
++#define __LINUX_VIDEODEV2_H
++/*
++ * Video for Linux Two
++ *
++ * Header file for v4l or V4L2 drivers and applications, for
++ * Linux kernels 2.2.x or 2.4.x.
++ *
++ * See http://bytesex.org/v4l/ for API specs and other
++ * v4l2 documentation.
++ *
++ * Author: Bill Dirks <bdirks@pacbell.net>
++ * Justin Schoeman
++ * et al.
++ */
++#ifdef __KERNEL__
++#include <linux/time.h> /* need struct timeval */
++#endif
++
++/*
++ * M I S C E L L A N E O U S
++ */
++
++/* Four-character-code (FOURCC) */
++#define v4l2_fourcc(a,b,c,d)\
++ (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24))
++
++/*
++ * E N U M S
++ */
++enum v4l2_field {
++ V4L2_FIELD_ANY = 0, /* driver can choose from none,
++ top, bottom, interlaced
++ depending on whatever it thinks
++ is approximate ... */
++ V4L2_FIELD_NONE = 1, /* this device has no fields ... */
++ V4L2_FIELD_TOP = 2, /* top field only */
++ V4L2_FIELD_BOTTOM = 3, /* bottom field only */
++ V4L2_FIELD_INTERLACED = 4, /* both fields interlaced */
++ V4L2_FIELD_SEQ_TB = 5, /* both fields sequential into one
++ buffer, top-bottom order */
++ V4L2_FIELD_SEQ_BT = 6, /* same as above + bottom-top order */
++ V4L2_FIELD_ALTERNATE = 7, /* both fields alternating into
++ separate buffers */
++};
++#define V4L2_FIELD_HAS_TOP(field) \
++ ((field) == V4L2_FIELD_TOP ||\
++ (field) == V4L2_FIELD_INTERLACED ||\
++ (field) == V4L2_FIELD_SEQ_TB ||\
++ (field) == V4L2_FIELD_SEQ_BT)
++#define V4L2_FIELD_HAS_BOTTOM(field) \
++ ((field) == V4L2_FIELD_BOTTOM ||\
++ (field) == V4L2_FIELD_INTERLACED ||\
++ (field) == V4L2_FIELD_SEQ_TB ||\
++ (field) == V4L2_FIELD_SEQ_BT)
++#define V4L2_FIELD_HAS_BOTH(field) \
++ ((field) == V4L2_FIELD_INTERLACED ||\
++ (field) == V4L2_FIELD_SEQ_TB ||\
++ (field) == V4L2_FIELD_SEQ_BT)
++
++enum v4l2_buf_type {
++ V4L2_BUF_TYPE_VIDEO_CAPTURE = 1,
++ V4L2_BUF_TYPE_VIDEO_OUTPUT = 2,
++ V4L2_BUF_TYPE_VIDEO_OVERLAY = 3,
++ V4L2_BUF_TYPE_VBI_CAPTURE = 4,
++ V4L2_BUF_TYPE_VBI_OUTPUT = 5,
++ V4L2_BUF_TYPE_PRIVATE = 0x80,
++};
++
++enum v4l2_ctrl_type {
++ V4L2_CTRL_TYPE_INTEGER = 1,
++ V4L2_CTRL_TYPE_BOOLEAN = 2,
++ V4L2_CTRL_TYPE_MENU = 3,
++ V4L2_CTRL_TYPE_BUTTON = 4,
++};
++
++enum v4l2_tuner_type {
++ V4L2_TUNER_RADIO = 1,
++ V4L2_TUNER_ANALOG_TV = 2,
++};
++
++enum v4l2_memory {
++ V4L2_MEMORY_MMAP = 1,
++ V4L2_MEMORY_USERPTR = 2,
++ V4L2_MEMORY_OVERLAY = 3,
++};
++
++/* see also http://vektor.theorem.ca/graphics/ycbcr/ */
++enum v4l2_colorspace {
++ /* ITU-R 601 -- broadcast NTSC/PAL */
++ V4L2_COLORSPACE_SMPTE170M = 1,
++
++ /* 1125-Line (US) HDTV */
++ V4L2_COLORSPACE_SMPTE240M = 2,
++
++ /* HD and modern captures. */
++ V4L2_COLORSPACE_REC709 = 3,
++
++ /* broken BT878 extents (601, luma range 16-253 instead of 16-235) */
++ V4L2_COLORSPACE_BT878 = 4,
++
++ /* These should be useful. Assume 601 extents. */
++ V4L2_COLORSPACE_470_SYSTEM_M = 5,
++ V4L2_COLORSPACE_470_SYSTEM_BG = 6,
++
++ /* I know there will be cameras that send this. So, this is
++ * unspecified chromaticities and full 0-255 on each of the
++ * Y'CbCr components
++ */
++ V4L2_COLORSPACE_JPEG = 7,
++
++ /* For RGB colourspaces, this is probably a good start. */
++ V4L2_COLORSPACE_SRGB = 8,
++};
++
++enum v4l2_priority {
++ V4L2_PRIORITY_UNSET = 0, /* not initialized */
++ V4L2_PRIORITY_BACKGROUND = 1,
++ V4L2_PRIORITY_INTERACTIVE = 2,
++ V4L2_PRIORITY_RECORD = 3,
++ V4L2_PRIORITY_DEFAULT = V4L2_PRIORITY_INTERACTIVE,
++};
++
++struct v4l2_rect {
++ __s32 left;
++ __s32 top;
++ __s32 width;
++ __s32 height;
++};
++
++struct v4l2_fract {
++ __u32 numerator;
++ __u32 denominator;
++};
++
++/*
++ * D R I V E R C A P A B I L I T I E S
++ */
++struct v4l2_capability
++{
++ __u8 driver[16]; /* i.e. "bttv" */
++ __u8 card[32]; /* i.e. "Hauppauge WinTV" */
++ __u8 bus_info[32]; /* "PCI:" + pci_name(pci_dev) */
++ __u32 version; /* should use KERNEL_VERSION() */
++ __u32 capabilities; /* Device capabilities */
++ __u32 reserved[4];
++};
++
++/* Values for 'capabilities' field */
++#define V4L2_CAP_VIDEO_CAPTURE 0x00000001 /* Is a video capture device */
++#define V4L2_CAP_VIDEO_OUTPUT 0x00000002 /* Is a video output device */
++#define V4L2_CAP_VIDEO_OVERLAY 0x00000004 /* Can do video overlay */
++#define V4L2_CAP_VBI_CAPTURE 0x00000010 /* Is a VBI capture device */
++#define V4L2_CAP_VBI_OUTPUT 0x00000020 /* Is a VBI output device */
++#define V4L2_CAP_RDS_CAPTURE 0x00000100 /* RDS data capture */
++
++#define V4L2_CAP_TUNER 0x00010000 /* has a tuner */
++#define V4L2_CAP_AUDIO 0x00020000 /* has audio support */
++#define V4L2_CAP_RADIO 0x00040000 /* is a radio device */
++
++#define V4L2_CAP_READWRITE 0x01000000 /* read/write systemcalls */
++#define V4L2_CAP_ASYNCIO 0x02000000 /* async I/O */
++#define V4L2_CAP_STREAMING 0x04000000 /* streaming I/O ioctls */
++
++/*
++ * V I D E O I M A G E F O R M A T
++ */
++
++struct v4l2_pix_format
++{
++ __u32 width;
++ __u32 height;
++ __u32 pixelformat;
++ enum v4l2_field field;
++ __u32 bytesperline; /* for padding, zero if unused */
++ __u32 sizeimage;
++ enum v4l2_colorspace colorspace;
++ __u32 priv; /* private data, depends on pixelformat */
++};
++
++/* Pixel format FOURCC depth Description */
++#define V4L2_PIX_FMT_RGB332 v4l2_fourcc('R','G','B','1') /* 8 RGB-3-3-2 */
++#define V4L2_PIX_FMT_RGB555 v4l2_fourcc('R','G','B','O') /* 16 RGB-5-5-5 */
++#define V4L2_PIX_FMT_RGB565 v4l2_fourcc('R','G','B','P') /* 16 RGB-5-6-5 */
++#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R','G','B','Q') /* 16 RGB-5-5-5 BE */
++#define V4L2_PIX_FMT_RGB565X v4l2_fourcc('R','G','B','R') /* 16 RGB-5-6-5 BE */
++#define V4L2_PIX_FMT_BGR24 v4l2_fourcc('B','G','R','3') /* 24 BGR-8-8-8 */
++#define V4L2_PIX_FMT_RGB24 v4l2_fourcc('R','G','B','3') /* 24 RGB-8-8-8 */
++#define V4L2_PIX_FMT_BGR32 v4l2_fourcc('B','G','R','4') /* 32 BGR-8-8-8-8 */
++#define V4L2_PIX_FMT_RGB32 v4l2_fourcc('R','G','B','4') /* 32 RGB-8-8-8-8 */
++#define V4L2_PIX_FMT_GREY v4l2_fourcc('G','R','E','Y') /* 8 Greyscale */
++#define V4L2_PIX_FMT_YVU410 v4l2_fourcc('Y','V','U','9') /* 9 YVU 4:1:0 */
++#define V4L2_PIX_FMT_YVU420 v4l2_fourcc('Y','V','1','2') /* 12 YVU 4:2:0 */
++#define V4L2_PIX_FMT_YUYV v4l2_fourcc('Y','U','Y','V') /* 16 YUV 4:2:2 */
++#define V4L2_PIX_FMT_UYVY v4l2_fourcc('U','Y','V','Y') /* 16 YUV 4:2:2 */
++#define V4L2_PIX_FMT_YUV422P v4l2_fourcc('4','2','2','P') /* 16 YVU422 planar */
++#define V4L2_PIX_FMT_YUV411P v4l2_fourcc('4','1','1','P') /* 16 YVU411 planar */
++#define V4L2_PIX_FMT_Y41P v4l2_fourcc('Y','4','1','P') /* 12 YUV 4:1:1 */
++
++/* two planes -- one Y, one Cr + Cb interleaved */
++#define V4L2_PIX_FMT_NV12 v4l2_fourcc('N','V','1','2') /* 12 Y/CbCr 4:2:0 */
++#define V4L2_PIX_FMT_NV21 v4l2_fourcc('N','V','2','1') /* 12 Y/CrCb 4:2:0 */
++
++/* The following formats are not defined in the V4L2 specification */
++#define V4L2_PIX_FMT_YUV410 v4l2_fourcc('Y','U','V','9') /* 9 YUV 4:1:0 */
++#define V4L2_PIX_FMT_YUV420 v4l2_fourcc('Y','U','1','2') /* 12 YUV 4:2:0 */
++#define V4L2_PIX_FMT_YYUV v4l2_fourcc('Y','Y','U','V') /* 16 YUV 4:2:2 */
++#define V4L2_PIX_FMT_HI240 v4l2_fourcc('H','I','2','4') /* 8 8-bit color */
++
++/* compressed formats */
++#define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M','J','P','G') /* Motion-JPEG */
++#define V4L2_PIX_FMT_JPEG v4l2_fourcc('J','P','E','G') /* JFIF JPEG */
++#define V4L2_PIX_FMT_DV v4l2_fourcc('d','v','s','d') /* 1394 */
++#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M','P','E','G') /* MPEG */
++
++/* Vendor-specific formats */
++#define V4L2_PIX_FMT_WNVA v4l2_fourcc('W','N','V','A') /* Winnov hw compress */
++
++/*
++ * F O R M A T E N U M E R A T I O N
++ */
++struct v4l2_fmtdesc
++{
++ __u32 index; /* Format number */
++ enum v4l2_buf_type type; /* buffer type */
++ __u32 flags;
++ __u8 description[32]; /* Description string */
++ __u32 pixelformat; /* Format fourcc */
++ __u32 reserved[4];
++};
++
++#define V4L2_FMT_FLAG_COMPRESSED 0x0001
++
++
++/*
++ * T I M E C O D E
++ */
++struct v4l2_timecode
++{
++ __u32 type;
++ __u32 flags;
++ __u8 frames;
++ __u8 seconds;
++ __u8 minutes;
++ __u8 hours;
++ __u8 userbits[4];
++};
++
++/* Type */
++#define V4L2_TC_TYPE_24FPS 1
++#define V4L2_TC_TYPE_25FPS 2
++#define V4L2_TC_TYPE_30FPS 3
++#define V4L2_TC_TYPE_50FPS 4
++#define V4L2_TC_TYPE_60FPS 5
++
++/* Flags */
++#define V4L2_TC_FLAG_DROPFRAME 0x0001 /* "drop-frame" mode */
++#define V4L2_TC_FLAG_COLORFRAME 0x0002
++#define V4L2_TC_USERBITS_field 0x000C
++#define V4L2_TC_USERBITS_USERDEFINED 0x0000
++#define V4L2_TC_USERBITS_8BITCHARS 0x0008
++/* The above is based on SMPTE timecodes */
++
++
++/*
++ * C O M P R E S S I O N P A R A M E T E R S
++ */
++#if 0
++/* ### generic compression settings don't work, there is too much
++ * ### codec-specific stuff. Maybe reuse that for MPEG codec settings
++ * ### later ... */
++struct v4l2_compression
++{
++ __u32 quality;
++ __u32 keyframerate;
++ __u32 pframerate;
++ __u32 reserved[5];
++
++/* what we'll need for MPEG, extracted from some postings on
++ the v4l list (Gert Vervoort, PlasmaJohn).
++
++system stream:
++ - type: elementary stream(ES), packatised elementary stream(s) (PES)
++ program stream(PS), transport stream(TS)
++ - system bitrate
++ - PS packet size (DVD: 2048 bytes, VCD: 2324 bytes)
++ - TS video PID
++ - TS audio PID
++ - TS PCR PID
++ - TS system information tables (PAT, PMT, CAT, NIT and SIT)
++ - (MPEG-1 systems stream vs. MPEG-2 program stream (TS not supported
++ by MPEG-1 systems)
++
++audio:
++ - type: MPEG (+Layer I,II,III), AC-3, LPCM
++ - bitrate
++ - sampling frequency (DVD: 48 Khz, VCD: 44.1 KHz, 32 kHz)
++ - Trick Modes? (ff, rew)
++ - Copyright
++ - Inverse Telecine
++
++video:
++ - picturesize (SIF, 1/2 D1, 2/3 D1, D1) and PAL/NTSC norm can be set
++ through excisting V4L2 controls
++ - noise reduction, parameters encoder specific?
++ - MPEG video version: MPEG-1, MPEG-2
++ - GOP (Group Of Pictures) definition:
++ - N: number of frames per GOP
++ - M: distance between reference (I,P) frames
++ - open/closed GOP
++ - quantiser matrix: inter Q matrix (64 bytes) and intra Q matrix (64 bytes)
++ - quantiser scale: linear or logarithmic
++ - scanning: alternate or zigzag
++ - bitrate mode: CBR (constant bitrate) or VBR (variable bitrate).
++ - target video bitrate for CBR
++ - target video bitrate for VBR
++ - maximum video bitrate for VBR - min. quantiser value for VBR
++ - max. quantiser value for VBR
++ - adaptive quantisation value
++ - return the number of bytes per GOP or bitrate for bitrate monitoring
++
++*/
++};
++#endif
++
++struct v4l2_jpegcompression
++{
++ int quality;
++
++ int APPn; /* Number of APP segment to be written,
++ * must be 0..15 */
++ int APP_len; /* Length of data in JPEG APPn segment */
++ char APP_data[60]; /* Data in the JPEG APPn segment. */
++
++ int COM_len; /* Length of data in JPEG COM segment */
++ char COM_data[60]; /* Data in JPEG COM segment */
++
++ __u32 jpeg_markers; /* Which markers should go into the JPEG
++ * output. Unless you exactly know what
++ * you do, leave them untouched.
++ * Inluding less markers will make the
++ * resulting code smaller, but there will
++ * be fewer aplications which can read it.
++ * The presence of the APP and COM marker
++ * is influenced by APP_len and COM_len
++ * ONLY, not by this property! */
++
++#define V4L2_JPEG_MARKER_DHT (1<<3) /* Define Huffman Tables */
++#define V4L2_JPEG_MARKER_DQT (1<<4) /* Define Quantization Tables */
++#define V4L2_JPEG_MARKER_DRI (1<<5) /* Define Restart Interval */
++#define V4L2_JPEG_MARKER_COM (1<<6) /* Comment segment */
++#define V4L2_JPEG_MARKER_APP (1<<7) /* App segment, driver will
++ * allways use APP0 */
++};
++
++
++/*
++ * M E M O R Y - M A P P I N G B U F F E R S
++ */
++struct v4l2_requestbuffers
++{
++ __u32 count;
++ enum v4l2_buf_type type;
++ enum v4l2_memory memory;
++ __u32 reserved[2];
++};
++
++struct v4l2_buffer
++{
++ __u32 index;
++ enum v4l2_buf_type type;
++ __u32 bytesused;
++ __u32 flags;
++ enum v4l2_field field;
++ struct timeval timestamp;
++ struct v4l2_timecode timecode;
++ __u32 sequence;
++
++ /* memory location */
++ enum v4l2_memory memory;
++ union {
++ __u32 offset;
++ unsigned long userptr;
++ } m;
++ __u32 length;
++
++ __u32 reserved[2];
++};
++
++/* Flags for 'flags' field */
++#define V4L2_BUF_FLAG_MAPPED 0x0001 /* Buffer is mapped (flag) */
++#define V4L2_BUF_FLAG_QUEUED 0x0002 /* Buffer is queued for processing */
++#define V4L2_BUF_FLAG_DONE 0x0004 /* Buffer is ready */
++#define V4L2_BUF_FLAG_KEYFRAME 0x0008 /* Image is a keyframe (I-frame) */
++#define V4L2_BUF_FLAG_PFRAME 0x0010 /* Image is a P-frame */
++#define V4L2_BUF_FLAG_BFRAME 0x0020 /* Image is a B-frame */
++#define V4L2_BUF_FLAG_TIMECODE 0x0100 /* timecode field is valid */
++
++/*
++ * O V E R L A Y P R E V I E W
++ */
++struct v4l2_framebuffer
++{
++ __u32 capability;
++ __u32 flags;
++/* FIXME: in theory we should pass something like PCI device + memory
++ * region + offset instead of some physical address */
++ void* base;
++ struct v4l2_pix_format fmt;
++};
++/* Flags for the 'capability' field. Read only */
++#define V4L2_FBUF_CAP_EXTERNOVERLAY 0x0001
++#define V4L2_FBUF_CAP_CHROMAKEY 0x0002
++#define V4L2_FBUF_CAP_LIST_CLIPPING 0x0004
++#define V4L2_FBUF_CAP_BITMAP_CLIPPING 0x0008
++/* Flags for the 'flags' field. */
++#define V4L2_FBUF_FLAG_PRIMARY 0x0001
++#define V4L2_FBUF_FLAG_OVERLAY 0x0002
++#define V4L2_FBUF_FLAG_CHROMAKEY 0x0004
++
++struct v4l2_clip
++{
++ struct v4l2_rect c;
++ struct v4l2_clip *next;
++};
++
++struct v4l2_window
++{
++ struct v4l2_rect w;
++ enum v4l2_field field;
++ __u32 chromakey;
++ struct v4l2_clip *clips;
++ __u32 clipcount;
++ void *bitmap;
++};
++
++
++/*
++ * C A P T U R E P A R A M E T E R S
++ */
++struct v4l2_captureparm
++{
++ __u32 capability; /* Supported modes */
++ __u32 capturemode; /* Current mode */
++ struct v4l2_fract timeperframe; /* Time per frame in .1us units */
++ __u32 extendedmode; /* Driver-specific extensions */
++ __u32 readbuffers; /* # of buffers for read */
++ __u32 reserved[4];
++};
++/* Flags for 'capability' and 'capturemode' fields */
++#define V4L2_MODE_HIGHQUALITY 0x0001 /* High quality imaging mode */
++#define V4L2_CAP_TIMEPERFRAME 0x1000 /* timeperframe field is supported */
++
++struct v4l2_outputparm
++{
++ __u32 capability; /* Supported modes */
++ __u32 outputmode; /* Current mode */
++ struct v4l2_fract timeperframe; /* Time per frame in seconds */
++ __u32 extendedmode; /* Driver-specific extensions */
++ __u32 writebuffers; /* # of buffers for write */
++ __u32 reserved[4];
++};
++
++/*
++ * I N P U T I M A G E C R O P P I N G
++ */
++
++struct v4l2_cropcap {
++ enum v4l2_buf_type type;
++ struct v4l2_rect bounds;
++ struct v4l2_rect defrect;
++ struct v4l2_fract pixelaspect;
++};
++
++struct v4l2_crop {
++ enum v4l2_buf_type type;
++ struct v4l2_rect c;
++};
++
++/*
++ * A N A L O G V I D E O S T A N D A R D
++ */
++
++typedef __u64 v4l2_std_id;
++
++/* one bit for each */
++#define V4L2_STD_PAL_B ((v4l2_std_id)0x00000001)
++#define V4L2_STD_PAL_B1 ((v4l2_std_id)0x00000002)
++#define V4L2_STD_PAL_G ((v4l2_std_id)0x00000004)
++#define V4L2_STD_PAL_H ((v4l2_std_id)0x00000008)
++#define V4L2_STD_PAL_I ((v4l2_std_id)0x00000010)
++#define V4L2_STD_PAL_D ((v4l2_std_id)0x00000020)
++#define V4L2_STD_PAL_D1 ((v4l2_std_id)0x00000040)
++#define V4L2_STD_PAL_K ((v4l2_std_id)0x00000080)
++
++#define V4L2_STD_PAL_M ((v4l2_std_id)0x00000100)
++#define V4L2_STD_PAL_N ((v4l2_std_id)0x00000200)
++#define V4L2_STD_PAL_Nc ((v4l2_std_id)0x00000400)
++#define V4L2_STD_PAL_60 ((v4l2_std_id)0x00000800)
++
++#define V4L2_STD_NTSC_M ((v4l2_std_id)0x00001000)
++#define V4L2_STD_NTSC_M_JP ((v4l2_std_id)0x00002000)
++
++#define V4L2_STD_SECAM_B ((v4l2_std_id)0x00010000)
++#define V4L2_STD_SECAM_D ((v4l2_std_id)0x00020000)
++#define V4L2_STD_SECAM_G ((v4l2_std_id)0x00040000)
++#define V4L2_STD_SECAM_H ((v4l2_std_id)0x00080000)
++#define V4L2_STD_SECAM_K ((v4l2_std_id)0x00100000)
++#define V4L2_STD_SECAM_K1 ((v4l2_std_id)0x00200000)
++#define V4L2_STD_SECAM_L ((v4l2_std_id)0x00400000)
++
++/* ATSC/HDTV */
++#define V4L2_STD_ATSC_8_VSB ((v4l2_std_id)0x01000000)
++#define V4L2_STD_ATSC_16_VSB ((v4l2_std_id)0x02000000)
++
++/* some common needed stuff */
++#define V4L2_STD_PAL_BG (V4L2_STD_PAL_B |\
++ V4L2_STD_PAL_B1 |\
++ V4L2_STD_PAL_G)
++#define V4L2_STD_PAL_DK (V4L2_STD_PAL_D |\
++ V4L2_STD_PAL_D1 |\
++ V4L2_STD_PAL_K)
++#define V4L2_STD_PAL (V4L2_STD_PAL_BG |\
++ V4L2_STD_PAL_DK |\
++ V4L2_STD_PAL_H |\
++ V4L2_STD_PAL_I)
++#define V4L2_STD_NTSC (V4L2_STD_NTSC_M |\
++ V4L2_STD_NTSC_M_JP)
++#define V4L2_STD_SECAM (V4L2_STD_SECAM_B |\
++ V4L2_STD_SECAM_D |\
++ V4L2_STD_SECAM_G |\
++ V4L2_STD_SECAM_H |\
++ V4L2_STD_SECAM_K |\
++ V4L2_STD_SECAM_K1 |\
++ V4L2_STD_SECAM_L)
++
++#define V4L2_STD_525_60 (V4L2_STD_PAL_M |\
++ V4L2_STD_PAL_60 |\
++ V4L2_STD_NTSC)
++#define V4L2_STD_625_50 (V4L2_STD_PAL |\
++ V4L2_STD_PAL_N |\
++ V4L2_STD_PAL_Nc |\
++ V4L2_STD_SECAM)
++
++#define V4L2_STD_UNKNOWN 0
++#define V4L2_STD_ALL (V4L2_STD_525_60 |\
++ V4L2_STD_625_50)
++
++struct v4l2_standard
++{
++ __u32 index;
++ v4l2_std_id id;
++ __u8 name[24];
++ struct v4l2_fract frameperiod; /* Frames, not fields */
++ __u32 framelines;
++ __u32 reserved[4];
++};
++
++
++/*
++ * V I D E O I N P U T S
++ */
++struct v4l2_input
++{
++ __u32 index; /* Which input */
++ __u8 name[32]; /* Label */
++ __u32 type; /* Type of input */
++ __u32 audioset; /* Associated audios (bitfield) */
++ __u32 tuner; /* Associated tuner */
++ v4l2_std_id std;
++ __u32 status;
++ __u32 reserved[4];
++};
++/* Values for the 'type' field */
++#define V4L2_INPUT_TYPE_TUNER 1
++#define V4L2_INPUT_TYPE_CAMERA 2
++
++/* field 'status' - general */
++#define V4L2_IN_ST_NO_POWER 0x00000001 /* Attached device is off */
++#define V4L2_IN_ST_NO_SIGNAL 0x00000002
++#define V4L2_IN_ST_NO_COLOR 0x00000004
++
++/* field 'status' - analog */
++#define V4L2_IN_ST_NO_H_LOCK 0x00000100 /* No horizontal sync lock */
++#define V4L2_IN_ST_COLOR_KILL 0x00000200 /* Color killer is active */
++
++/* field 'status' - digital */
++#define V4L2_IN_ST_NO_SYNC 0x00010000 /* No synchronization lock */
++#define V4L2_IN_ST_NO_EQU 0x00020000 /* No equalizer lock */
++#define V4L2_IN_ST_NO_CARRIER 0x00040000 /* Carrier recovery failed */
++
++/* field 'status' - VCR and set-top box */
++#define V4L2_IN_ST_MACROVISION 0x01000000 /* Macrovision detected */
++#define V4L2_IN_ST_NO_ACCESS 0x02000000 /* Conditional access denied */
++#define V4L2_IN_ST_VTR 0x04000000 /* VTR time constant */
++
++/*
++ * V I D E O O U T P U T S
++ */
++struct v4l2_output
++{
++ __u32 index; /* Which output */
++ __u8 name[32]; /* Label */
++ __u32 type; /* Type of output */
++ __u32 audioset; /* Associated audios (bitfield) */
++ __u32 modulator; /* Associated modulator */
++ v4l2_std_id std;
++ __u32 reserved[4];
++};
++/* Values for the 'type' field */
++#define V4L2_OUTPUT_TYPE_MODULATOR 1
++#define V4L2_OUTPUT_TYPE_ANALOG 2
++#define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY 3
++
++/*
++ * C O N T R O L S
++ */
++struct v4l2_control
++{
++ __u32 id;
++ __s32 value;
++};
++
++/* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
++struct v4l2_queryctrl
++{
++ __u32 id;
++ enum v4l2_ctrl_type type;
++ __u8 name[32]; /* Whatever */
++ __s32 minimum; /* Note signedness */
++ __s32 maximum;
++ __s32 step;
++ __s32 default_value;
++ __u32 flags;
++ __u32 reserved[2];
++};
++
++/* Used in the VIDIOC_QUERYMENU ioctl for querying menu items */
++struct v4l2_querymenu
++{
++ __u32 id;
++ __u32 index;
++ __u8 name[32]; /* Whatever */
++ __u32 reserved;
++};
++
++/* Control flags */
++#define V4L2_CTRL_FLAG_DISABLED 0x0001
++#define V4L2_CTRL_FLAG_GRABBED 0x0002
++
++/* Control IDs defined by V4L2 */
++#define V4L2_CID_BASE 0x00980900
++/* IDs reserved for driver specific controls */
++#define V4L2_CID_PRIVATE_BASE 0x08000000
++
++#define V4L2_CID_BRIGHTNESS (V4L2_CID_BASE+0)
++#define V4L2_CID_CONTRAST (V4L2_CID_BASE+1)
++#define V4L2_CID_SATURATION (V4L2_CID_BASE+2)
++#define V4L2_CID_HUE (V4L2_CID_BASE+3)
++#define V4L2_CID_AUDIO_VOLUME (V4L2_CID_BASE+5)
++#define V4L2_CID_AUDIO_BALANCE (V4L2_CID_BASE+6)
++#define V4L2_CID_AUDIO_BASS (V4L2_CID_BASE+7)
++#define V4L2_CID_AUDIO_TREBLE (V4L2_CID_BASE+8)
++#define V4L2_CID_AUDIO_MUTE (V4L2_CID_BASE+9)
++#define V4L2_CID_AUDIO_LOUDNESS (V4L2_CID_BASE+10)
++#define V4L2_CID_BLACK_LEVEL (V4L2_CID_BASE+11)
++#define V4L2_CID_AUTO_WHITE_BALANCE (V4L2_CID_BASE+12)
++#define V4L2_CID_DO_WHITE_BALANCE (V4L2_CID_BASE+13)
++#define V4L2_CID_RED_BALANCE (V4L2_CID_BASE+14)
++#define V4L2_CID_BLUE_BALANCE (V4L2_CID_BASE+15)
++#define V4L2_CID_GAMMA (V4L2_CID_BASE+16)
++#define V4L2_CID_WHITENESS (V4L2_CID_GAMMA) /* ? Not sure */
++#define V4L2_CID_EXPOSURE (V4L2_CID_BASE+17)
++#define V4L2_CID_AUTOGAIN (V4L2_CID_BASE+18)
++#define V4L2_CID_GAIN (V4L2_CID_BASE+19)
++#define V4L2_CID_HFLIP (V4L2_CID_BASE+20)
++#define V4L2_CID_VFLIP (V4L2_CID_BASE+21)
++#define V4L2_CID_HCENTER (V4L2_CID_BASE+22)
++#define V4L2_CID_VCENTER (V4L2_CID_BASE+23)
++#define V4L2_CID_LASTP1 (V4L2_CID_BASE+24) /* last CID + 1 */
++
++/*
++ * T U N I N G
++ */
++struct v4l2_tuner
++{
++ __u32 index;
++ __u8 name[32];
++ enum v4l2_tuner_type type;
++ __u32 capability;
++ __u32 rangelow;
++ __u32 rangehigh;
++ __u32 rxsubchans;
++ __u32 audmode;
++ __s32 signal;
++ __s32 afc;
++ __u32 reserved[4];
++};
++
++struct v4l2_modulator
++{
++ __u32 index;
++ __u8 name[32];
++ __u32 capability;
++ __u32 rangelow;
++ __u32 rangehigh;
++ __u32 txsubchans;
++ __u32 reserved[4];
++};
++
++/* Flags for the 'capability' field */
++#define V4L2_TUNER_CAP_LOW 0x0001
++#define V4L2_TUNER_CAP_NORM 0x0002
++#define V4L2_TUNER_CAP_STEREO 0x0010
++#define V4L2_TUNER_CAP_LANG2 0x0020
++#define V4L2_TUNER_CAP_SAP 0x0020
++#define V4L2_TUNER_CAP_LANG1 0x0040
++
++/* Flags for the 'rxsubchans' field */
++#define V4L2_TUNER_SUB_MONO 0x0001
++#define V4L2_TUNER_SUB_STEREO 0x0002
++#define V4L2_TUNER_SUB_LANG2 0x0004
++#define V4L2_TUNER_SUB_SAP 0x0004
++#define V4L2_TUNER_SUB_LANG1 0x0008
++
++/* Values for the 'audmode' field */
++#define V4L2_TUNER_MODE_MONO 0x0000
++#define V4L2_TUNER_MODE_STEREO 0x0001
++#define V4L2_TUNER_MODE_LANG2 0x0002
++#define V4L2_TUNER_MODE_SAP 0x0002
++#define V4L2_TUNER_MODE_LANG1 0x0003
++
++struct v4l2_frequency
++{
++ __u32 tuner;
++ enum v4l2_tuner_type type;
++ __u32 frequency;
++ __u32 reserved[8];
++};
++
++/*
++ * A U D I O
++ */
++struct v4l2_audio
++{
++ __u32 index;
++ __u8 name[32];
++ __u32 capability;
++ __u32 mode;
++ __u32 reserved[2];
++};
++/* Flags for the 'capability' field */
++#define V4L2_AUDCAP_STEREO 0x00001
++#define V4L2_AUDCAP_AVL 0x00002
++
++/* Flags for the 'mode' field */
++#define V4L2_AUDMODE_AVL 0x00001
++
++struct v4l2_audioout
++{
++ __u32 index;
++ __u8 name[32];
++ __u32 capability;
++ __u32 mode;
++ __u32 reserved[2];
++};
++
++/*
++ * D A T A S E R V I C E S ( V B I )
++ *
++ * Data services API by Michael Schimek
++ */
++
++struct v4l2_vbi_format
++{
++ __u32 sampling_rate; /* in 1 Hz */
++ __u32 offset;
++ __u32 samples_per_line;
++ __u32 sample_format; /* V4L2_PIX_FMT_* */
++ __s32 start[2];
++ __u32 count[2];
++ __u32 flags; /* V4L2_VBI_* */
++ __u32 reserved[2]; /* must be zero */
++};
++
++/* VBI flags */
++#define V4L2_VBI_UNSYNC (1<< 0)
++#define V4L2_VBI_INTERLACED (1<< 1)
++
++
++/*
++ * A G G R E G A T E S T R U C T U R E S
++ */
++
++/* Stream data format
++ */
++struct v4l2_format
++{
++ enum v4l2_buf_type type;
++ union
++ {
++ struct v4l2_pix_format pix; // V4L2_BUF_TYPE_VIDEO_CAPTURE
++ struct v4l2_window win; // V4L2_BUF_TYPE_VIDEO_OVERLAY
++ struct v4l2_vbi_format vbi; // V4L2_BUF_TYPE_VBI_CAPTURE
++ __u8 raw_data[200]; // user-defined
++ } fmt;
++};
++
++
++/* Stream type-dependent parameters
++ */
++struct v4l2_streamparm
++{
++ enum v4l2_buf_type type;
++ union
++ {
++ struct v4l2_captureparm capture;
++ struct v4l2_outputparm output;
++ __u8 raw_data[200]; /* user-defined */
++ } parm;
++};
++
++
++
++/*
++ * I O C T L C O D E S F O R V I D E O D E V I C E S
++ *
++ */
++#define VIDIOC_QUERYCAP _IOR ('V', 0, struct v4l2_capability)
++#define VIDIOC_RESERVED _IO ('V', 1)
++#define VIDIOC_ENUM_FMT _IOWR ('V', 2, struct v4l2_fmtdesc)
++#define VIDIOC_G_FMT _IOWR ('V', 4, struct v4l2_format)
++#define VIDIOC_S_FMT _IOWR ('V', 5, struct v4l2_format)
++#if 0
++#define VIDIOC_G_COMP _IOR ('V', 6, struct v4l2_compression)
++#define VIDIOC_S_COMP _IOW ('V', 7, struct v4l2_compression)
++#endif
++#define VIDIOC_REQBUFS _IOWR ('V', 8, struct v4l2_requestbuffers)
++#define VIDIOC_QUERYBUF _IOWR ('V', 9, struct v4l2_buffer)
++#define VIDIOC_G_FBUF _IOR ('V', 10, struct v4l2_framebuffer)
++#define VIDIOC_S_FBUF _IOW ('V', 11, struct v4l2_framebuffer)
++#define VIDIOC_OVERLAY _IOW ('V', 14, int)
++#define VIDIOC_QBUF _IOWR ('V', 15, struct v4l2_buffer)
++#define VIDIOC_DQBUF _IOWR ('V', 17, struct v4l2_buffer)
++#define VIDIOC_STREAMON _IOW ('V', 18, int)
++#define VIDIOC_STREAMOFF _IOW ('V', 19, int)
++#define VIDIOC_G_PARM _IOWR ('V', 21, struct v4l2_streamparm)
++#define VIDIOC_S_PARM _IOWR ('V', 22, struct v4l2_streamparm)
++#define VIDIOC_G_STD _IOR ('V', 23, v4l2_std_id)
++#define VIDIOC_S_STD _IOW ('V', 24, v4l2_std_id)
++#define VIDIOC_ENUMSTD _IOWR ('V', 25, struct v4l2_standard)
++#define VIDIOC_ENUMINPUT _IOWR ('V', 26, struct v4l2_input)
++#define VIDIOC_G_CTRL _IOWR ('V', 27, struct v4l2_control)
++#define VIDIOC_S_CTRL _IOWR ('V', 28, struct v4l2_control)
++#define VIDIOC_G_TUNER _IOWR ('V', 29, struct v4l2_tuner)
++#define VIDIOC_S_TUNER _IOW ('V', 30, struct v4l2_tuner)
++#define VIDIOC_G_AUDIO _IOR ('V', 33, struct v4l2_audio)
++#define VIDIOC_S_AUDIO _IOW ('V', 34, struct v4l2_audio)
++#define VIDIOC_QUERYCTRL _IOWR ('V', 36, struct v4l2_queryctrl)
++#define VIDIOC_QUERYMENU _IOWR ('V', 37, struct v4l2_querymenu)
++#define VIDIOC_G_INPUT _IOR ('V', 38, int)
++#define VIDIOC_S_INPUT _IOWR ('V', 39, int)
++#define VIDIOC_G_OUTPUT _IOR ('V', 46, int)
++#define VIDIOC_S_OUTPUT _IOWR ('V', 47, int)
++#define VIDIOC_ENUMOUTPUT _IOWR ('V', 48, struct v4l2_output)
++#define VIDIOC_G_AUDOUT _IOR ('V', 49, struct v4l2_audioout)
++#define VIDIOC_S_AUDOUT _IOW ('V', 50, struct v4l2_audioout)
++#define VIDIOC_G_MODULATOR _IOWR ('V', 54, struct v4l2_modulator)
++#define VIDIOC_S_MODULATOR _IOW ('V', 55, struct v4l2_modulator)
++#define VIDIOC_G_FREQUENCY _IOWR ('V', 56, struct v4l2_frequency)
++#define VIDIOC_S_FREQUENCY _IOW ('V', 57, struct v4l2_frequency)
++#define VIDIOC_CROPCAP _IOR ('V', 58, struct v4l2_cropcap)
++#define VIDIOC_G_CROP _IOWR ('V', 59, struct v4l2_crop)
++#define VIDIOC_S_CROP _IOW ('V', 60, struct v4l2_crop)
++#define VIDIOC_G_JPEGCOMP _IOR ('V', 61, struct v4l2_jpegcompression)
++#define VIDIOC_S_JPEGCOMP _IOW ('V', 62, struct v4l2_jpegcompression)
++#define VIDIOC_QUERYSTD _IOR ('V', 63, v4l2_std_id)
++#define VIDIOC_TRY_FMT _IOWR ('V', 64, struct v4l2_format)
++#define VIDIOC_ENUMAUDIO _IOWR ('V', 65, struct v4l2_audio)
++#define VIDIOC_ENUMAUDOUT _IOWR ('V', 66, struct v4l2_audioout)
++#define VIDIOC_G_PRIORITY _IOR ('V', 67, enum v4l2_priority)
++#define VIDIOC_S_PRIORITY _IOW ('V', 68, enum v4l2_priority)
++
++/* for compatibility, will go away some day */
++#define VIDIOC_OVERLAY_OLD _IOWR ('V', 14, int)
++#define VIDIOC_S_PARM_OLD _IOW ('V', 22, struct v4l2_streamparm)
++#define VIDIOC_S_CTRL_OLD _IOW ('V', 28, struct v4l2_control)
++#define VIDIOC_G_AUDIO_OLD _IOWR ('V', 33, struct v4l2_audio)
++#define VIDIOC_G_AUDOUT_OLD _IOWR ('V', 49, struct v4l2_audioout)
++
++#define BASE_VIDIOC_PRIVATE 192 /* 192-255 are private */
++
++
++#ifdef __KERNEL__
++/*
++ *
++ * V 4 L 2 D R I V E R H E L P E R A P I
++ *
++ * Some commonly needed functions for drivers (v4l2-common.o module)
++ */
++#include <linux/fs.h>
++
++/* Video standard functions */
++extern unsigned int v4l2_video_std_fps(struct v4l2_standard *vs);
++extern int v4l2_video_std_construct(struct v4l2_standard *vs,
++ int id, char *name);
++
++/* prority handling */
++struct v4l2_prio_state {
++ atomic_t prios[4];
++};
++int v4l2_prio_init(struct v4l2_prio_state *global);
++int v4l2_prio_change(struct v4l2_prio_state *global, enum v4l2_priority *local,
++ enum v4l2_priority new);
++int v4l2_prio_open(struct v4l2_prio_state *global, enum v4l2_priority *local);
++int v4l2_prio_close(struct v4l2_prio_state *global, enum v4l2_priority *local);
++enum v4l2_priority v4l2_prio_max(struct v4l2_prio_state *global);
++int v4l2_prio_check(struct v4l2_prio_state *global, enum v4l2_priority *local);
++
++/* names for fancy debug output */
++extern char *v4l2_field_names[];
++extern char *v4l2_type_names[];
++extern char *v4l2_ioctl_names[];
++
++/* Compatibility layer interface -- v4l1-compat module */
++typedef int (*v4l2_kioctl)(struct inode *inode, struct file *file,
++ unsigned int cmd, void *arg);
++int v4l_compat_translate_ioctl(struct inode *inode, struct file *file,
++ int cmd, void *arg, v4l2_kioctl driver_ioctl);
++
++#endif /* __KERNEL__ */
++#endif /* __LINUX_VIDEODEV2_H */
++
++/*
++ * Local variables:
++ * c-basic-offset: 8
++ * End:
++ */
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/videodev.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/videodev.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,332 @@
++/*
++ * Video capture interface for Linux Character Device Driver.
++ * based on
++ * Alan Cox, <alan@redhat.com> video4linux
++ *
++ * Author: SW.LEE <hitchcar@samsung.com>
++ * 2004 (C) Samsung Electronics
++ * Modified for S3C2440/S3C24A0 Interface
++ *
++ * This file is released under the GPLv2
++ */
++
++
++#include <linux/module.h>
++#include <linux/types.h>
++#include <linux/kernel.h>
++#include <linux/sched.h>
++#include <linux/smp_lock.h>
++#include <linux/mm.h>
++#include <linux/string.h>
++#include <linux/errno.h>
++#include <linux/init.h>
++#include <linux/kmod.h>
++#include <linux/slab.h>
++/* #include <linux/devfs_fs_kernel.h> */
++#include <linux/miscdevice.h>
++#include <asm/uaccess.h>
++#include <asm/system.h>
++#include <asm/semaphore.h>
++
++
++
++#define CONFIG_VIDEO_V4L1_COMPAT
++#include <linux/videodev.h>
++#include "camif.h"
++#include "miscdevice.h"
++
++
++static DECLARE_MUTEX(videodev_lock);
++
++const char *fimc_version = "$Id: videodev.c,v 1.1.1.1 2004/04/27 03:52:50 swlee Exp $";
++
++#define VIDEO_NAME "video4linux"
++
++
++#define VIDEO_NUM_DEVICES 2
++static struct video_device *video_device[VIDEO_NUM_DEVICES];
++
++static inline struct video_device * get_vd(int nr)
++{
++ if ( nr == CODEC_MINOR)
++ return video_device[0];
++ else {
++ assert ( nr & PREVIEW_MINOR);
++ return video_device[1];
++ }
++}
++
++static inline void set_vd ( struct video_device * vd, int nr)
++{
++ if ( nr == CODEC_MINOR)
++ video_device[0] = vd;
++ else {
++ assert ( nr & PREVIEW_MINOR);
++ video_device[1] = vd;
++ }
++}
++
++static inline int video_release(struct inode *inode, struct file *f)
++{
++ int minor = MINOR(inode->i_rdev);
++ struct video_device *vfd;
++
++ vfd = get_vd(minor);
++#if 1 /* needed until all drivers are fixed */
++ if (!vfd->release)
++ return 0;
++#endif
++ vfd->release(vfd);
++ return 0;
++}
++
++struct video_device* video_devdata(struct file *file)
++{
++ return video_device[iminor(file->f_dentry->d_inode)];
++}
++
++
++/*
++ * Open a video device.
++ */
++static int video_open(struct inode *inode, struct file *file)
++{
++ int minor = MINOR(inode->i_rdev);
++ int err = 0;
++ struct video_device *vfl;
++ struct file_operations const *old_fops;
++
++ down(&videodev_lock);
++
++ vfl = get_vd(minor);
++
++ old_fops = file->f_op;
++ file->f_op = fops_get(vfl->fops);
++ if(file->f_op->open)
++ err = file->f_op->open(inode,file);
++ if (err) {
++ fops_put(file->f_op);
++ file->f_op = fops_get(old_fops);
++ }
++ fops_put(old_fops);
++ up(&videodev_lock);
++ return err;
++}
++
++/*
++ * open/release helper functions -- handle exclusive opens
++ */
++extern int video_exclusive_open(struct inode *inode, struct file *file)
++{
++ struct video_device *vfl = get_vd(MINOR(inode->i_rdev));
++ int retval = 0;
++
++ mutex_lock(&vfl->lock);
++ if (vfl->users) {
++ retval = -EBUSY;
++ } else {
++ vfl->users++;
++ }
++ mutex_unlock(&vfl->lock);
++ return retval;
++}
++
++extern int video_exclusive_release(struct inode *inode, struct file *file)
++{
++ struct video_device *vfl = get_vd(MINOR(inode->i_rdev));
++ vfl->users--;
++ return 0;
++}
++
++int
++video_usercopy(struct inode *inode, struct file *file,
++ unsigned int cmd, unsigned long arg,
++ int (*func)(struct inode *inode, struct file *file,
++ unsigned int cmd, void *arg))
++{
++ char sbuf[128];
++ void *mbuf = NULL;
++ void *parg = NULL;
++ int err = -EINVAL;
++
++ // cmd = video_fix_command(cmd);
++
++ /* Copy arguments into temp kernel buffer */
++ switch (_IOC_DIR(cmd)) {
++ case _IOC_NONE:
++ parg = (void *)arg;
++ break;
++ case _IOC_READ:
++ case _IOC_WRITE:
++ case (_IOC_WRITE | _IOC_READ):
++ if (_IOC_SIZE(cmd) <= sizeof(sbuf)) {
++ parg = sbuf;
++ } else {
++ /* too big to allocate from stack */
++ mbuf = kmalloc(_IOC_SIZE(cmd),GFP_KERNEL);
++ if (NULL == mbuf)
++ return -ENOMEM;
++ parg = mbuf;
++ }
++
++ err = -EFAULT;
++ if (_IOC_DIR(cmd) & _IOC_WRITE)
++ if (copy_from_user(parg, (void *)arg, _IOC_SIZE(cmd)))
++ goto out;
++ break;
++ }
++
++ /* call driver */
++ err = func(inode, file, cmd, parg);
++ if (err == -ENOIOCTLCMD)
++ err = -EINVAL;
++ if (err < 0)
++ goto out;
++
++ /* Copy results into user buffer */
++ switch (_IOC_DIR(cmd))
++ {
++ case _IOC_READ:
++ case (_IOC_WRITE | _IOC_READ):
++ if (copy_to_user((void *)arg, parg, _IOC_SIZE(cmd)))
++ err = -EFAULT;
++ break;
++ }
++
++out:
++ if (mbuf)
++ kfree(mbuf);
++ return err;
++}
++
++
++static struct file_operations video_fops=
++{
++ .owner = THIS_MODULE,
++ .llseek = no_llseek,
++ .open = video_open,
++ .release = video_release,
++};
++
++static struct miscdevice codec_dev = {
++ minor: CODEC_MINOR,
++ name : "codec",
++ fops : &video_fops
++};
++
++static struct miscdevice preview_dev = {
++ minor: PREVIEW_MINOR,
++ name : "preview",
++ fops : &video_fops
++};
++
++
++/**
++ * video_register_device - register video4linux devices
++ * @vfd: video device structure we want to register
++ * @type: type of device to register
++ * @nr: minor number
++ *
++ * Zero is returned on success.
++ * type : ignored.
++ * nr :
++ * 0 Codec index
++ * 1 Preview index
++ */
++int video_register_device(struct video_device *vfd, int type, int nr)
++{
++ int ret=0;
++
++ /* pick a minor number */
++ down(&videodev_lock);
++ set_vd (vfd, nr);
++ vfd->minor=nr;
++ up(&videodev_lock);
++
++ switch (vfd->minor) {
++ case CODEC_MINOR:
++ ret = misc_register(&codec_dev);
++ if (ret) {
++ printk(KERN_ERR
++ "can't misc_register : codec on minor=%d\n", CODEC_MINOR);
++ panic(" Give me misc codec \n");
++ }
++ break;
++ case PREVIEW_MINOR:
++ ret = misc_register(&preview_dev);
++ if (ret) {
++ printk(KERN_ERR
++ "can't misc_register (preview) on minor=%d\n", PREVIEW_MINOR);
++ panic(" Give me misc codec \n");
++ }
++ break;
++ }
++
++#if 0 /* needed until all drivers are fixed */
++ if (!vfd->release)
++ printk(KERN_WARNING "videodev: \"%s\" has no release callback. "
++ "Please fix your driver for proper sysfs support, see "
++ "http://lwn.net/Articles/36850/\n", vfd->name);
++#endif
++ return 0;
++}
++
++/**
++ * video_unregister_device - unregister a video4linux device
++ * @vfd: the device to unregister
++ *
++ * This unregisters the passed device and deassigns the minor
++ * number. Future open calls will be met with errors.
++ */
++
++void video_unregister_device(struct video_device *vfd)
++{
++ down(&videodev_lock);
++
++ if(get_vd(vfd->minor)!=vfd)
++ panic("videodev: bad unregister");
++
++ if (vfd->minor== CODEC_MINOR)
++ misc_deregister(&codec_dev);
++ else
++ misc_deregister(&preview_dev);
++ set_vd (NULL, vfd->minor);
++ up(&videodev_lock);
++}
++
++
++/*
++ * Initialise video for linux
++ */
++
++static int __init videodev_init(void)
++{
++// printk(KERN_INFO "FIMC2.0 Built:"__DATE__" "__TIME__"\n%s\n",fimc_version);
++ return 0;
++}
++
++static void __exit videodev_exit(void)
++{
++}
++
++module_init(videodev_init)
++module_exit(videodev_exit)
++
++EXPORT_SYMBOL(video_register_device);
++EXPORT_SYMBOL(fimc_version);
++EXPORT_SYMBOL(video_unregister_device);
++EXPORT_SYMBOL(video_usercopy);
++EXPORT_SYMBOL(video_exclusive_open);
++EXPORT_SYMBOL(video_exclusive_release);
++
++
++MODULE_AUTHOR("SW.LEE <hitchcar@sec.samsung.com>");
++MODULE_DESCRIPTION("VideoDev For FIMC2.0 MISC Drivers");
++MODULE_LICENSE("GPL");
++
++
++/*
++ * Local variables:
++ * c-basic-offset: 8
++ * End:
++ */
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/videodev.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/videodev.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,108 @@
++//#ifndef __LINUX_S3C_VIDEODEV_H
++//#define __LINUX_S3C_VIDEODEV_H
++
++#include <linux/types.h>
++#include <linux/version.h>
++#include <media/v4l2-dev.h>
++
++#if 0
++struct video_device
++{
++ /* device info */
++ // struct device *dev;
++ char name[32];
++ int type; /* v4l1 */
++ int type2; /* v4l2 */
++ int hardware;
++ int minor;
++
++ /* device ops + callbacks */
++ struct file_operations *fops;
++ void (*release)(struct video_device *vfd);
++
++
++#if 1 /* to be removed in 2.7.x */
++ /* obsolete -- fops->owner is used instead */
++ struct module *owner;
++ /* dev->driver_data will be used instead some day.
++ * Use the video_{get|set}_drvdata() helper functions,
++ * so the switch over will be transparent for you.
++ * Or use {pci|usb}_{get|set}_drvdata() directly. */
++ void *priv;
++#endif
++
++ /* for videodev.c intenal usage -- please don't touch */
++ int users; /* video_exclusive_{open|close} ... */
++ struct semaphore lock; /* ... helper function uses these */
++ char devfs_name[64]; /* devfs */
++ // struct class_device class_dev; /* sysfs */
++};
++
++#define VIDEO_MAJOR 81
++
++#define VFL_TYPE_GRABBER 0
++
++
++extern int video_register_device(struct video_device *, int type, int nr);
++extern void video_unregister_device(struct video_device *);
++extern struct video_device* video_devdata(struct file*);
++
++
++
++struct video_picture
++{
++ __u16 brightness;
++ __u16 hue;
++ __u16 colour;
++ __u16 contrast;
++ __u16 whiteness; /* Black and white only */
++ __u16 depth; /* Capture depth */
++ __u16 palette; /* Palette in use */
++#define VIDEO_PALETTE_GREY 1 /* Linear greyscale */
++#define VIDEO_PALETTE_HI240 2 /* High 240 cube (BT848) */
++#define VIDEO_PALETTE_RGB565 3 /* 565 16 bit RGB */
++#define VIDEO_PALETTE_RGB24 4 /* 24bit RGB */
++#define VIDEO_PALETTE_RGB32 5 /* 32bit RGB */
++#define VIDEO_PALETTE_RGB555 6 /* 555 15bit RGB */
++#define VIDEO_PALETTE_YUV422 7 /* YUV422 capture */
++#define VIDEO_PALETTE_YUYV 8
++#define VIDEO_PALETTE_UYVY 9 /* The great thing about standards is ... */
++#define VIDEO_PALETTE_YUV420 10
++#define VIDEO_PALETTE_YUV411 11 /* YUV411 capture */
++#define VIDEO_PALETTE_RAW 12 /* RAW capture (BT848) */
++#define VIDEO_PALETTE_YUV422P 13 /* YUV 4:2:2 Planar */
++#define VIDEO_PALETTE_YUV411P 14 /* YUV 4:1:1 Planar */
++#define VIDEO_PALETTE_YUV420P 15 /* YUV 4:2:0 Planar */
++#define VIDEO_PALETTE_YUV410P 16 /* YUV 4:1:0 Planar */
++#define VIDEO_PALETTE_PLANAR 13 /* start of planar entries */
++#define VIDEO_PALETTE_COMPONENT 7 /* start of component entries */
++};
++
++extern int video_exclusive_open(struct inode *inode, struct file *file);
++extern int video_exclusive_release(struct inode *inode, struct file *file);
++extern int video_usercopy(struct inode *inode, struct file *file,
++ unsigned int cmd, unsigned long arg,
++ int (*func)(struct inode *inode, struct file *file,
++ unsigned int cmd, void *arg));
++
++
++
++
++#define VID_TYPE_CAPTURE 1 /* Can capture */
++#define VID_TYPE_CLIPPING 32 /* Can clip */
++#define VID_TYPE_FRAMERAM 64 /* Uses the frame buffer memory */
++#define VID_TYPE_SCALES 128 /* Scalable */
++#define VID_TYPE_SUBCAPTURE 512 /* Can capture subareas of the image */
++
++
++
++#endif
++//#endif
++
++#define VID_HARDWARE_SAMSUNG_FIMC 255
++
++/*
++ * Local variables:
++ * c-basic-offset: 8
++ * End:
++ */
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/video-driver.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/video-driver.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,624 @@
++/*
++ Copyright (C) 2004 Samsung Electronics
++ SW.LEE <hitchcar@sec.samsung.com>
++ This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 2 of the License, or
++ (at your option) any later version.
++*/
++
++#include <linux/version.h>
++#include <linux/module.h>
++#include <linux/delay.h>
++#include <linux/errno.h>
++#include <linux/fs.h>
++#include <linux/kernel.h>
++#include <linux/major.h>
++#include <linux/slab.h>
++#include <linux/poll.h>
++#include <linux/signal.h>
++#include <linux/ioport.h>
++#include <linux/sched.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/kmod.h>
++#include <linux/vmalloc.h>
++#include <linux/init.h>
++#include <asm/io.h>
++#include <asm/page.h>
++#include <asm/irq.h>
++#include <asm/semaphore.h>
++#include <linux/miscdevice.h>
++#include <asm/arch/irqs.h>
++
++//#define SW_DEBUG
++#define CONFIG_VIDEO_V4L1_COMPAT
++#include <linux/videodev.h>
++#include "camif.h"
++#include "miscdevice.h"
++#include "cam_reg.h"
++#include "sensor.h"
++#include "userapp.h"
++
++#ifdef Z_API
++#include "qt.h"
++#endif
++
++/* Codec and Preview */
++#define CAMIF_NUM 2
++static camif_cfg_t fimc[CAMIF_NUM];
++u32 *camregs;
++
++static const char *driver_version =
++ "$Id: video-driver.c,v 1.9 2004/06/02 03:10:36 swlee Exp $";
++extern const char *fimc_version;
++extern const char *fsm_version;
++
++extern void camif_start_c_with_p (camif_cfg_t *cfg, camif_cfg_t *other);
++
++camif_cfg_t * get_camif(int nr)
++{
++ camif_cfg_t *ret = NULL;
++ switch(nr) {
++ case CODEC_MINOR:
++ ret = &fimc[0];
++ break;
++ case PREVIEW_MINOR:
++ ret = &fimc[1];
++ break;
++ default:
++ panic("Unknow Minor Number \n");
++ }
++ return ret;
++}
++
++
++static int camif_codec_start(camif_cfg_t *cfg)
++{
++ int ret = 0;
++ ret =camif_check_preview(cfg);
++ switch(ret) {
++ case 0: /* Play alone */
++ DPRINTK("Start Alone \n");
++ camif_4fsm_start(cfg);
++ cfg->gc->status |= C_WORKING;
++ break;
++ case -ERESTARTSYS: /* Busy , retry */
++ //DPRINTK("Error \n");
++ printk("Error \n");
++ break;
++ case 1:
++ DPRINTK("need callback \n");
++ ret = camif_callback_start(cfg);
++ if(ret < 0 ) {
++ printk(KERN_INFO "Busy RESTART \n");
++ return ret; /* Busy, retry */
++ }
++ break;
++ }
++ return ret;
++}
++
++
++ssize_t camif_write (struct file *f, const char *b, size_t c,loff_t *offset)
++{
++ camif_cfg_t *cfg;
++
++ c = 0; /* return value */
++ DPRINTK("\n");
++ cfg = get_camif(MINOR(f->f_dentry->d_inode->i_rdev));
++ switch (*b) {
++ case 'O':
++ if (cfg->dma_type & CAMIF_PREVIEW) {
++ if (cfg->gc->status & C_WORKING) {
++ camif_start_c_with_p(cfg,get_camif(CODEC_MINOR));
++ }
++ else {
++ camif_4fsm_start(cfg);
++ }
++ }
++ else{
++ c = camif_codec_start(cfg);
++ if(c < 0) c = 1; /* Error and neet to retry */
++ }
++
++ break;
++ case 'X':
++ camif_p_stop(cfg);
++ break;
++ default:
++ panic("CAMERA:camif_write: Unexpected Param\n");
++ }
++ DPRINTK("end\n");
++
++ return c;
++}
++
++
++ssize_t camif_p_read(struct file *file, char *buf, size_t count, loff_t *pos)
++{
++ camif_cfg_t *cfg = NULL;
++ size_t end;
++
++ cfg = get_camif(MINOR(file->f_dentry->d_inode->i_rdev));
++ cfg->status = CAMIF_STARTED;
++
++ if (wait_event_interruptible(cfg->waitq,cfg->status == CAMIF_INT_HAPPEN))
++ return -ERESTARTSYS;
++
++ cfg->status = CAMIF_STOPPED;
++ end = min_t(size_t, cfg->pp_totalsize /cfg->pp_num, count);
++ if (copy_to_user(buf, camif_g_frame(cfg), end))
++ return -EFAULT;
++
++ return end;
++}
++
++
++static ssize_t
++camif_c_read(struct file *file, char *buf, size_t count, loff_t *pos)
++{
++ camif_cfg_t *cfg = NULL;
++ size_t end;
++
++ /* cfg = file->private_data; */
++ cfg = get_camif(MINOR(file->f_dentry->d_inode->i_rdev));
++#if 0
++ if(file->f_flags & O_NONBLOCK) {
++ printk(KERN_ERR"Don't Support NON_BLOCK \n");
++ }
++#endif
++
++ /* Change the below wait_event_interruptible func */
++ if (wait_event_interruptible(cfg->waitq,cfg->status == CAMIF_INT_HAPPEN))
++ return -ERESTARTSYS;
++ cfg->status = CAMIF_STOPPED;
++ end = min_t(size_t, cfg->pp_totalsize /cfg->pp_num, count);
++ if (copy_to_user(buf, camif_g_frame(cfg), end))
++ return -EFAULT;
++ return end;
++}
++
++
++static irqreturn_t camif_c_irq(int irq, void *dev_id)
++{
++ camif_cfg_t *cfg = (camif_cfg_t *)dev_id;
++
++ DPRINTK("\n");
++ camif_g_fifo_status(cfg);
++ camif_g_frame_num(cfg);
++ if(camif_enter_c_4fsm(cfg) != INSTANT_SKIP)
++ wake_up_interruptible(&cfg->waitq);
++
++ return IRQ_HANDLED;
++}
++
++static irqreturn_t camif_p_irq(int irq, void *dev_id)
++{
++ camif_cfg_t *cfg = (camif_cfg_t *)dev_id;
++
++ DPRINTK("\n");
++ camif_g_fifo_status(cfg);
++ camif_g_frame_num(cfg);
++ if(camif_enter_p_4fsm(cfg) != INSTANT_SKIP)
++ wake_up_interruptible(&cfg->waitq);
++#if 0
++ if( (cfg->perf.frames % 5) == 0)
++ DPRINTK("5\n");
++#endif
++
++ return IRQ_HANDLED;
++}
++
++static void camif_release_irq(camif_cfg_t *cfg)
++{
++ disable_irq(cfg->irq);
++ free_irq(cfg->irq, cfg);
++}
++
++static int camif_irq_request(camif_cfg_t *cfg)
++{
++ int ret = 0;
++
++ if (cfg->dma_type & CAMIF_CODEC) {
++ if ((ret = request_irq(cfg->irq, camif_c_irq,
++ 0, cfg->shortname, cfg))) {
++ printk("request_irq(CAM_C) failed.\n");
++ }
++ }
++ if (cfg->dma_type & CAMIF_PREVIEW) {
++ if ((ret = request_irq(cfg->irq, camif_p_irq,
++ 0, cfg->shortname, cfg))) {
++ printk("request_irq(CAM_P) failed.\n");
++ }
++ }
++ return 0;
++}
++
++static void camif_init_sensor(camif_cfg_t *cfg)
++{
++ camif_gc_t *gc = cfg->gc;
++ if (!gc->sensor)
++ panic("CAMERA:I2C Client(Img Sensor)Not registered\n");
++ if(!gc->init_sensor) {
++ camif_reset(gc->reset_type, gc->reset_udelay);
++ gc->sensor->driver->command(gc->sensor,SENSOR_INIT,NULL);
++ gc->init_sensor = 1; /*sensor init done */
++ }
++ gc->sensor->driver->command(gc->sensor, USER_ADD, NULL);
++}
++
++static int camif_open(struct inode *inode, struct file *file)
++{
++ int err;
++ camif_cfg_t * cfg = get_camif(MINOR(inode->i_rdev));
++
++ if(cfg->dma_type & CAMIF_PREVIEW) {
++ if(down_interruptible(&cfg->gc->lock))
++ return -ERESTARTSYS;
++ if (cfg->dma_type & CAMIF_PREVIEW) {
++ cfg->gc->status &= ~PNOTWORKING;
++ }
++ up(&cfg->gc->lock);
++ }
++ err = video_exclusive_open(inode,file);
++ cfg->gc->user++;
++ cfg->status = CAMIF_STOPPED;
++ if (err < 0) return err;
++ if (file->f_flags & O_NONCAP ) {
++ printk("Don't Support Non-capturing open \n");
++ return 0;
++ }
++ file->private_data = cfg;
++ camif_irq_request(cfg);
++ camif_init_sensor(cfg);
++ return 0;
++}
++
++#if 0
++static void print_pregs(void)
++{
++ printk(" CISRCFMT 0x%08X \n", CISRCFMT);
++ printk(" CIWDOFST 0x%08X \n", CIWDOFST);
++ printk(" CIGCTRL 0x%08X \n", CIGCTRL);
++ printk(" CIPRTRGFMT 0x%08X \n", CIPRTRGFMT);
++ printk(" CIPRCTRL 0x%08X \n", CIPRCTRL);
++ printk(" CIPRSCPRERATIO 0x%08X \n", CIPRSCPRERATIO);
++ printk(" CIPRSCPREDST 0x%08X \n", CIPRSCPREDST);
++ printk(" CIPRSCCTRL 0x%08X \n", CIPRSCCTRL);
++ printk(" CIPRTAREA 0x%08X \n", CIPRTAREA);
++ printk(" CIPRSTATUS 0x%08X \n", CIPRSTATUS);
++ printk(" CIIMGCPT 0x%08X \n", CIIMGCPT);
++}
++
++static void print_cregs(void)
++{
++ printk(" CISRCFMT 0x%08X \n", CISRCFMT);
++ printk(" CIWDOFST 0x%08X \n", CIWDOFST);
++ printk(" CIGCTRL 0x%08X \n", CIGCTRL);
++ printk(" CICOCTRL 0x%8X \n", CICOCTRL);
++ printk(" CICOSCPRERATIO 0x%08X \n", CICOSCPRERATIO);
++ printk(" CICOSCPREDST 0x%08X \n", CICOSCPREDST);
++ printk(" CICOSCCTRL 0x%08X \n", CICOSCCTRL);
++ printk(" CICOTAREA 0x%08X \n", CICOTAREA);
++ printk(" CICOSTATUS 0x%8X \n", CICOSTATUS);
++ printk(" CIIMGCPT 0x%08X \n", CIIMGCPT);
++}
++#endif
++
++
++static int camif_release(struct inode *inode, struct file *file)
++{
++ camif_cfg_t * cfg = get_camif(MINOR(inode->i_rdev));
++
++ //DPRINTK(" cfg->status 0x%0X cfg->gc->status 0x%0X \n", cfg->status,cfg->gc->status );
++ if (cfg->dma_type & CAMIF_PREVIEW) {
++ if(down_interruptible(&cfg->gc->lock))
++ return -ERESTARTSYS;
++ cfg->gc->status &= ~PWANT2START;
++ cfg->gc->status |= PNOTWORKING;
++ up(&cfg->gc->lock);
++ }
++ else {
++ cfg->gc->status &= ~CWANT2START; /* No need semaphore */
++ }
++ camif_dynamic_close(cfg);
++ camif_release_irq(cfg);
++ video_exclusive_release(inode,file);
++ camif_p_stop(cfg);
++ cfg->gc->sensor->driver->command(cfg->gc->sensor, USER_EXIT, NULL);
++ cfg->gc->user--;
++ cfg->status = CAMIF_STOPPED;
++ return 0;
++}
++
++static void fimc_config(camif_cfg_t *cfg,u32 x, u32 y, int bpp)
++{
++ cfg->target_x = x;
++ cfg->target_y = y;
++
++ switch (bpp) {
++ case 16:
++ cfg->fmt = CAMIF_RGB16;
++ break;
++ case 24:
++ cfg->fmt = CAMIF_RGB24;
++ break;
++ case 420:
++ cfg->fmt = CAMIF_IN_YCBCR422|CAMIF_OUT_YCBCR420;
++ break;
++ case 422:
++ cfg->fmt = CAMIF_IN_YCBCR422|CAMIF_OUT_YCBCR422;
++ break;
++ default:
++ panic("Wrong BPP \n");
++ }
++}
++
++
++static int
++camif_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
++{
++ int ret = 0;
++ camif_cfg_t *cfg = file->private_data;
++ camif_param_t par;
++
++ switch (cmd) {
++ case CMD_CAMERA_INIT:
++ if (copy_from_user(&par,(camif_param_t *)arg,
++ sizeof(camif_param_t)))
++ return -EFAULT;
++ fimc_config(cfg,par.dst_x, par.dst_y, par.bpp);
++ if (camif_dynamic_open(cfg)) {
++ printk(" Eror Happens \n");
++ ret = -1;
++ }
++
++ switch (par.flip) {
++ case 3 :
++ cfg->flip = CAMIF_FLIP_MIRROR;
++ break;
++ case 1 :
++ cfg->flip = CAMIF_FLIP_X;
++ break;
++ case 2 :
++ cfg->flip = CAMIF_FLIP_Y;
++ break;
++ case 0 :
++ default:
++ cfg->flip = CAMIF_FLIP;
++ }
++ break;
++ /* Todo
++ case CMD_SENSOR_BRIGHTNESS:
++ cfg->gc->sensor->driver->command(cfg->gc->sensor, SENSOR_BRIGHTNESS, NULL);
++ break;
++ */
++ default:
++ ret = -EINVAL;
++ break;
++ }
++
++ return ret;
++}
++
++
++#if 0
++static int camif_ioctl(struct inode *inode, struct file *file,
++ unsigned int cmd, unsigned long arg)
++{
++// camif_cfg_t *cfg = file->private_data;
++
++
++ switch (cmd) {
++/* case Some_other_action */
++ default:
++ return video_usercopy(inode, file, cmd, arg, camif_do_ioctl);
++ }
++}
++#endif
++
++static struct file_operations camif_c_fops =
++{
++ .owner = THIS_MODULE,
++ .open = camif_open,
++ .release = camif_release,
++ .ioctl = camif_ioctl,
++ .read = camif_c_read,
++ .write = camif_write,
++};
++
++static struct file_operations camif_p_fops =
++{
++ .owner = THIS_MODULE,
++ .open = camif_open,
++ .release = camif_release,
++ .ioctl = camif_ioctl,
++#ifdef Z_API
++ .read = z_read,
++ .write = z_write,
++#else
++ .read = camif_p_read,
++ .write = camif_write,
++#endif
++};
++
++static struct video_device codec_template =
++{
++ .name = "CODEC_IF",
++ .type = VID_TYPE_CAPTURE|VID_TYPE_CLIPPING|VID_TYPE_SCALES,
++/* .hardware = VID_HARDWARE_SAMSUNG_FIMC20, */
++ .fops = &camif_c_fops,
++// .release = camif_release
++ .minor = -1,
++};
++
++static struct video_device preview_template =
++{
++ .name = "PREVIEW_IF",
++ .type = VID_TYPE_CAPTURE|VID_TYPE_CLIPPING|VID_TYPE_SCALES,
++/* .hardware = VID_HARDWARE_SAMSUNG_FIMC20, */
++ .fops = &camif_p_fops,
++ .minor = -1,
++};
++
++static int preview_init(camif_cfg_t *cfg)
++{
++ char name[16]="CAM_PREVIEW";
++
++ memset(cfg, 0, sizeof(camif_cfg_t));
++ cfg->target_x = 640;
++ cfg->target_y = 480;
++ cfg->pp_num = 4;
++ cfg->dma_type = CAMIF_PREVIEW;
++ cfg->fmt = CAMIF_RGB16;
++ cfg->flip = CAMIF_FLIP_Y;
++ cfg->v = &preview_template;
++ mutex_init(&cfg->v->lock);
++ cfg->irq = IRQ_S3C2440_CAM_P;
++
++ strcpy(cfg->shortname,name);
++ init_waitqueue_head(&cfg->waitq);
++ cfg->status = CAMIF_STOPPED;
++ return cfg->status;
++}
++
++static int codec_init(camif_cfg_t *cfg)
++{
++ char name[16]="CAM_CODEC";
++
++ memset(cfg, 0, sizeof(camif_cfg_t));
++ cfg->target_x = 176;
++ cfg->target_y = 144;
++ cfg->pp_num = 4;
++ cfg->dma_type = CAMIF_CODEC;
++ cfg->fmt = CAMIF_IN_YCBCR422|CAMIF_OUT_YCBCR420;
++ cfg->flip = CAMIF_FLIP_X;
++ cfg->v = &codec_template;
++ mutex_init(&cfg->v->lock);
++ cfg->irq = IRQ_S3C2440_CAM_C;
++ strcpy(cfg->shortname,name);
++ init_waitqueue_head(&cfg->waitq);
++ cfg->status = CAMIF_STOPPED;
++ return cfg->status;
++}
++
++static void camif_init(void)
++{
++ camif_setup_sensor();
++}
++
++
++
++static void print_version(void)
++{
++ printk(KERN_INFO"FIMC built:"__DATE__ " "__TIME__"\n%s\n%s\n%s\n",
++ fimc_version, driver_version,fsm_version);
++}
++
++
++static int camif_m_in(void)
++{
++ int ret = -EINVAL;
++ camif_cfg_t * cfg;
++
++ printk(KERN_INFO"Starting S3C2440 Camera Driver\n");
++
++ camregs = ioremap(CAM_BASE_ADD, 0x100);
++ if (!camregs) {
++ printk(KERN_ERR"Unable to map camera regs\n");
++ ret = -ENOMEM;
++ goto bail1;
++ }
++
++ camif_init();
++ cfg = get_camif(CODEC_MINOR);
++ codec_init(cfg);
++
++ ret = video_register_device(cfg->v,0,CODEC_MINOR);
++ if (ret) {
++ printk(KERN_ERR"Couldn't register codec driver.\n");
++ goto bail2;
++ }
++ cfg = get_camif(PREVIEW_MINOR);
++ preview_init(cfg);
++ ret = video_register_device(cfg->v,0,PREVIEW_MINOR);
++ if (ret) {
++ printk(KERN_ERR"Couldn't register preview driver.\n");
++ goto bail3; /* hm seems it us unregistered the once */
++ }
++
++ print_version();
++ return 0;
++
++bail3:
++ video_unregister_device(cfg->v);
++bail2:
++ iounmap(camregs);
++ camregs = NULL;
++bail1:
++ return ret;
++}
++
++static void unconfig_device(camif_cfg_t *cfg)
++{
++ video_unregister_device(cfg->v);
++ camif_hw_close(cfg);
++ iounmap(camregs);
++ //memset(cfg, 0, sizeof(camif_cfg_t));
++ camregs = NULL;
++}
++
++static void camif_m_out(void) /* module out */
++{
++ camif_cfg_t *cfg;
++
++ cfg = get_camif(CODEC_MINOR);
++ unconfig_device(cfg);
++ cfg = get_camif(PREVIEW_MINOR);
++ unconfig_device(cfg);
++
++ return;
++}
++
++void camif_register_decoder(struct i2c_client *ptr)
++{
++ camif_cfg_t *cfg;
++ void * data = i2c_get_clientdata(ptr);
++
++ cfg =get_camif(CODEC_MINOR);
++ cfg->gc = (camif_gc_t *)(data);
++
++ cfg =get_camif(PREVIEW_MINOR);
++ cfg->gc = (camif_gc_t *)(data);
++
++ sema_init(&cfg->gc->lock, 1); /* global lock for both Codec and Preview */
++ cfg->gc->status |= PNOTWORKING; /* Default Value */
++ camif_hw_open(cfg->gc);
++}
++
++void camif_unregister_decoder(struct i2c_client *ptr)
++{
++ camif_gc_t *gc;
++ void * data = i2c_get_clientdata(ptr);
++
++ gc = (camif_gc_t *)(data);
++ gc->init_sensor = 0; /* need to modify */
++}
++
++module_init(camif_m_in);
++module_exit(camif_m_out);
++
++EXPORT_SYMBOL(camif_register_decoder);
++EXPORT_SYMBOL(camif_unregister_decoder);
++
++MODULE_AUTHOR("SW.LEE <hitchcar@sec.samsung.com>");
++MODULE_DESCRIPTION("Video-Driver For Fimc2.0 MISC Drivers");
++MODULE_LICENSE("GPL");
++
++
++/*
++ * Local variables:
++ * c-basic-offset: 8
++ * End:
++ */
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/fiq_c_isr.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/fiq_c_isr.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,291 @@
++/*
++ * Copyright 2007 Andy Green <andy@warmcat.com>
++ * S3C modfifications
++ * Copyright 2008 Andy Green <andy@openmoko.com>
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <asm/hardware.h>
++#include <asm/fiq.h>
++#include "fiq_c_isr.h"
++#include <linux/sysfs.h>
++#include <linux/device.h>
++#include <linux/platform_device.h>
++
++#include <asm/io.h>
++
++#include <asm/plat-s3c24xx/cpu.h>
++#include <asm/plat-s3c24xx/irq.h>
++
++#include <asm/arch/pwm.h>
++#include <asm/plat-s3c/regs-timer.h>
++
++/*
++ * Major Caveats for using FIQ
++ * ---------------------------
++ *
++ * 1) it CANNOT touch any vmalloc()'d memory, only memory
++ * that was kmalloc()'d. Static allocations in the monolithic kernel
++ * are kmalloc()'d so they are okay. You can touch memory-mapped IO, but
++ * the pointer for it has to have been stored in kmalloc'd memory. The
++ * reason for this is simple: every now and then Linux turns off interrupts
++ * and reorders the paging tables. If a FIQ happens during this time, the
++ * virtual memory space can be partly or entirely disordered or missing.
++ *
++ * 2) Because vmalloc() is used when a module is inserted, THIS FIQ
++ * ISR HAS TO BE IN THE MONOLITHIC KERNEL, not a module. But the way
++ * it is set up, you can all to enable and disable it from your module
++ * and intercommunicate with it through struct fiq_ipc
++ * fiq_ipc which you can define in
++ * asm/archfiq_ipc_type.h. The reason is the same as above, a
++ * FIQ could happen while even the ISR is not present in virtual memory
++ * space due to pagetables being changed at the time.
++ *
++ * 3) You can't call any Linux API code except simple macros
++ * - understand that FIQ can come in at any time, no matter what
++ * state of undress the kernel may privately be in, thinking it
++ * locked the door by turning off interrupts... FIQ is an
++ * unstoppable monster force (which is its value)
++ * - they are not vmalloc()'d memory safe
++ * - they might do crazy stuff like sleep: FIQ pisses fire and
++ * is not interested in 'sleep' that the weak seem to need
++ * - calling APIs from FIQ can re-enter un-renterable things
++ * - summary: you cannot interoperate with linux APIs directly in the FIQ ISR
++ *
++ * If you follow these rules, it is fantastic, an extremely powerful, solid,
++ * genuine hard realtime feature.
++ *
++ */
++
++/* more than enough to cover our jump instruction to the isr */
++#define SIZEOF_FIQ_JUMP 8
++/* more than enough to cover s3c2440_fiq_isr() in 4K blocks */
++#define SIZEOF_FIQ_ISR 0x2000
++/* increase the size of the stack that is active during FIQ as needed */
++static u8 u8aFiqStack[4096];
++
++/* only one FIQ ISR possible, okay to do these here */
++u32 _fiq_ack_mask; /* used by isr exit define */
++unsigned long _fiq_count_fiqs; /* used by isr exit define */
++static int _fiq_irq; /* private ; irq index we were started with, or 0 */
++struct s3c2410_pwm pwm_timer_fiq;
++int _fiq_timer_index;
++u16 _fiq_timer_divisor;
++
++
++/* this function must live in the monolithic kernel somewhere! A module is
++ * NOT good enough!
++ */
++extern void __attribute__ ((naked)) s3c2440_fiq_isr(void);
++
++
++/* this is copied into the hard FIQ vector during init */
++
++static void __attribute__ ((naked)) s3c2440_FIQ_Branch(void)
++{
++ asm __volatile__ (
++ "mov pc, r8 ; "
++ );
++}
++
++/* sysfs */
++
++static ssize_t show_count(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ return sprintf(buf, "%ld\n", _fiq_count_fiqs);
++}
++
++static DEVICE_ATTR(count, 0444, show_count, NULL);
++
++static struct attribute *s3c2440_fiq_sysfs_entries[] = {
++ &dev_attr_count.attr,
++ NULL
++};
++
++static struct attribute_group s3c2440_fiq_attr_group = {
++ .name = "fiq",
++ .attrs = s3c2440_fiq_sysfs_entries,
++};
++
++/*
++ * call this from your kernel module to set up the FIQ ISR to service FIQs,
++ * You need to have configured your FIQ input pin before anything will happen
++ *
++ * call it with, eg, IRQ_TIMER3 from asm-arm/arch-s3c2410/irqs.h
++ *
++ * you still need to clear the source interrupt in S3C2410_INTMSK to get
++ * anything good happening
++ */
++static int fiq_init_irq_source(int irq_index_fiq)
++{
++ int rc = 0;
++
++ if (!irq_index_fiq) /* no interrupt */
++ goto bail;
++
++ local_fiq_disable();
++
++ _fiq_irq = irq_index_fiq;
++ _fiq_ack_mask = 1 << (irq_index_fiq - S3C2410_CPUIRQ_OFFSET);
++ _fiq_timer_index = (irq_index_fiq - IRQ_TIMER0);
++
++ /* set up the timer to operate as a pwm device */
++
++ rc = s3c2410_pwm_init(&pwm_timer_fiq);
++ if (rc)
++ goto bail;
++
++ pwm_timer_fiq.timerid = PWM0 + _fiq_timer_index;
++ pwm_timer_fiq.prescaler = (6 - 1) / 2;
++ pwm_timer_fiq.divider = S3C2410_TCFG1_MUX3_DIV2;
++ /* default rate == ~32us */
++ pwm_timer_fiq.counter = pwm_timer_fiq.comparer = 3000;
++
++ rc = s3c2410_pwm_enable(&pwm_timer_fiq);
++ if (rc)
++ goto bail;
++
++ s3c2410_pwm_start(&pwm_timer_fiq);
++
++ _fiq_timer_divisor = 0xffff; /* so kick will work initially */
++
++ /* let our selected interrupt be a magic FIQ interrupt */
++ __raw_writel(_fiq_ack_mask, S3C2410_INTMOD);
++
++ /* it's ready to go as soon as we unmask the source in S3C2410_INTMSK */
++ local_fiq_enable();
++bail:
++ return rc;
++}
++
++
++/* call this from your kernel module to disable generation of FIQ actions */
++static void fiq_disable_irq_source(void)
++{
++ /* nothing makes FIQ any more */
++ __raw_writel(0, S3C2410_INTMOD);
++ local_fiq_disable();
++ _fiq_irq = 0; /* no active source interrupt now either */
++}
++
++/*
++ * fiq_kick() forces a FIQ event to happen shortly after leaving the routine
++ */
++void fiq_kick(void)
++{
++ unsigned long flags;
++ u32 tcon;
++
++ /* we have to take care about FIQ because this modification is
++ * non-atomic, FIQ could come in after the read and before the
++ * writeback and its changes to the register would be lost
++ * (platform INTMSK mod code is taken care of already)
++ */
++ local_save_flags(flags);
++ local_fiq_disable();
++ /* allow FIQs to resume */
++ __raw_writel(__raw_readl(S3C2410_INTMSK) &
++ ~(1 << (_fiq_irq - S3C2410_CPUIRQ_OFFSET)),
++ S3C2410_INTMSK);
++ tcon = __raw_readl(S3C2410_TCON) & ~S3C2410_TCON_T3START;
++ /* fake the timer to a count of 1 */
++ __raw_writel(1, S3C2410_TCNTB(_fiq_timer_index));
++ __raw_writel(tcon | S3C2410_TCON_T3MANUALUPD, S3C2410_TCON);
++ __raw_writel(tcon | S3C2410_TCON_T3MANUALUPD | S3C2410_TCON_T3START,
++ S3C2410_TCON);
++ __raw_writel(tcon | S3C2410_TCON_T3START, S3C2410_TCON);
++ local_irq_restore(flags);
++}
++EXPORT_SYMBOL_GPL(fiq_kick);
++
++
++
++
++static int __init sc32440_fiq_probe(struct platform_device *pdev)
++{
++ struct resource *r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
++
++ if (!r)
++ return -EIO;
++
++ /* configure for the interrupt we are meant to use */
++ printk(KERN_INFO"Enabling FIQ using irq %d\n", r->start);
++
++ fiq_init_irq_source(r->start);
++
++ return sysfs_create_group(&pdev->dev.kobj, &s3c2440_fiq_attr_group);
++}
++
++static int sc32440_fiq_remove(struct platform_device *pdev)
++{
++ fiq_disable_irq_source();
++ sysfs_remove_group(&pdev->dev.kobj, &s3c2440_fiq_attr_group);
++ return 0;
++}
++
++static void fiq_set_vector_and_regs(void)
++{
++ struct pt_regs regs;
++
++ /* prep the special FIQ mode regs */
++ memset(®s, 0, sizeof(regs));
++ regs.ARM_r8 = (unsigned long)s3c2440_fiq_isr;
++ regs.ARM_sp = (unsigned long)u8aFiqStack + sizeof(u8aFiqStack) - 4;
++ /* set up the special FIQ-mode-only registers from our regs */
++ set_fiq_regs(®s);
++ /* copy our jump to the real ISR into the hard vector address */
++ set_fiq_handler(s3c2440_FIQ_Branch, SIZEOF_FIQ_JUMP);
++}
++
++#ifdef CONFIG_PM
++static int sc32440_fiq_suspend(struct platform_device *pdev, pm_message_t state)
++{
++ /* nothing makes FIQ any more */
++ __raw_writel(0, S3C2410_INTMOD);
++ local_fiq_disable();
++
++ return 0;
++}
++
++static int sc32440_fiq_resume(struct platform_device *pdev)
++{
++ fiq_set_vector_and_regs();
++ fiq_init_irq_source(_fiq_irq);
++ return 0;
++}
++#else
++#define sc32440_fiq_suspend NULL
++#define sc32440_fiq_resume NULL
++#endif
++
++static struct platform_driver sc32440_fiq_driver = {
++ .driver = {
++ .name = "sc32440_fiq",
++ .owner = THIS_MODULE,
++ },
++
++ .probe = sc32440_fiq_probe,
++ .remove = __devexit_p(sc32440_fiq_remove),
++ .suspend = sc32440_fiq_suspend,
++ .resume = sc32440_fiq_resume,
++};
++
++static int __init sc32440_fiq_init(void)
++{
++ fiq_set_vector_and_regs();
++
++ return platform_driver_register(&sc32440_fiq_driver);
++}
++
++static void __exit sc32440_fiq_exit(void)
++{
++ fiq_disable_irq_source();
++}
++
++MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
++MODULE_LICENSE("GPL");
++
++module_init(sc32440_fiq_init);
++module_exit(sc32440_fiq_exit);
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/fiq_c_isr.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/fiq_c_isr.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,66 @@
++#ifndef _LINUX_FIQ_C_ISR_H
++#define _LINUX_FIQ_C_ISR_H
++
++#include <asm/arch-s3c2410/regs-irq.h>
++
++extern unsigned long _fiq_count_fiqs;
++extern u32 _fiq_ack_mask;
++extern int _fiq_timer_index;
++extern u16 _fiq_timer_divisor;
++
++/* This CANNOT be implemented in a module -- it has to be used in code
++ * included in the monolithic kernel
++ */
++
++#define FIQ_HANDLER_START() \
++void __attribute__ ((naked)) s3c2440_fiq_isr(void) \
++{\
++ /*\
++ * you can declare local vars here, take care to set the frame size\
++ * below accordingly if there are more than a few dozen bytes of them\
++ */\
++
++/* stick your locals here :-)
++ * Do NOT initialize them here! define them and initialize them after
++ * FIQ_HANDLER_ENTRY() is done.
++ */
++
++#define FIQ_HANDLER_ENTRY(LOCALS, FRAME) \
++ const int _FIQ_FRAME_SIZE = FRAME; \
++ /* entry takes care to store registers we will be treading on here */\
++ asm __volatile__ (\
++ "mov ip, sp ;"\
++ /* stash FIQ and r0-r8 normal regs */\
++ "stmdb sp!, {r0-r12, lr};"\
++ /* allow SP to get some space */\
++ "sub sp, sp, %1 ;"\
++ /* !! THIS SETS THE FRAME, adjust to > sizeof locals */\
++ "sub fp, sp, %0 ;"\
++ :\
++ : "rI" (LOCALS), "rI" (FRAME)\
++ :"r9"\
++ );
++
++/* stick your ISR code here and then end with... */
++
++#define FIQ_HANDLER_END() \
++ _fiq_count_fiqs++;\
++ __raw_writel(_fiq_ack_mask, S3C2410_SRCPND);\
++\
++ /* exit back to normal mode restoring everything */\
++ asm __volatile__ (\
++ /* pop our allocation */\
++ "add sp, sp, %0 ;"\
++ /* return FIQ regs back to pristine state\
++ * and get normal regs back\
++ */\
++ "ldmia sp!, {r0-r12, lr};"\
++\
++ /* return */\
++ "subs pc, lr, #4;"\
++ : \
++ : "rI" (_FIQ_FRAME_SIZE) \
++ );\
++}
++
++#endif /* _LINUX_FIQ_C_ISR_H */
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/mach-s3c2440/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -22,6 +22,13 @@ config S3C2440_DMA
+ help
+ Support for S3C2440 specific DMA code5A
+
++config S3C2440_C_FIQ
++ bool "FIQ ISR support in C"
++ depends on ARCH_S3C2410
++ select FIQ
++ help
++ Support for S3C2440 FIQ support in C -- see
++ ./arch/arm/macs3c2440/fiq_c_isr.c
+
+ menu "S3C2440 Machines"
+
+@@ -67,6 +74,37 @@ config SMDK2440_CPU2440
+ default y if ARCH_S3C2440
+ select CPU_S3C2440
+
++config MACH_HXD8
++ bool "FIC HXD8"
++ select CPU_S3C2440
++ select SENSORS_PCF50606
++ help
++ Say Y here if you are using the FIC Neo1973 GSM Phone
++
++config MACH_NEO1973_GTA02
++ bool "FIC Neo1973 GSM Phone (GTA02 Hardware)"
++ select CPU_S3C2442
++ select SENSORS_PCF50633
++ select POWER_SUPPLY
++ select GTA02_HDQ
++ help
++ Say Y here if you are using the FIC Neo1973 GSM Phone
++
++config NEO1973_GTA02_2440
++ bool "Old FIC Neo1973 GTA02 hardware using S3C2440 CPU"
++ depends on MACH_NEO1973_GTA02
++ select CPU_S3C2440
++ help
++ Say Y here if you are using an early hardware revision
++ of the FIC/Openmoko Neo1973 GTA02 GSM Phone.
++
++config MACH_M800
++ bool "E-TEN glofiish M800/X800"
++ select CPU_S3C2442
++ help
++ Say Y here if you are using the E-TEN glofiish M800/X800.
++
+
+ endmenu
+
++#source "arch/arm/mach-s3c2440/camera/Kconfig"
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/mach-glofiish.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/mach-glofiish.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,620 @@
++/*
++ * linux/arch/arm/mach-s3c2440/mach-glofiish.c
++ *
++ * S3C2440 Machine Support for the E-TEN glofiish X800/M800
++ *
++ * Copyright (C) 2008 by Harald Welte <laforge@gnumonks.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++
++#include <linux/kernel.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/list.h>
++#include <linux/delay.h>
++#include <linux/timer.h>
++#include <linux/init.h>
++#include <linux/workqueue.h>
++#include <linux/platform_device.h>
++#include <linux/serial_core.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/spi_bitbang.h>
++#include <linux/mmc/host.h>
++
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/nand.h>
++#include <linux/mtd/nand_ecc.h>
++#include <linux/mtd/partitions.h>
++#include <linux/mtd/physmap.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++
++#include <asm/hardware.h>
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/mach-types.h>
++
++#include <asm/arch-s3c2410/regs-irq.h>
++#include <asm/arch/regs-gpio.h>
++#include <asm/arch/regs-gpioj.h>
++#include <asm/arch/fb.h>
++#include <asm/arch/mci.h>
++#include <asm/arch/ts.h>
++#include <asm/arch/spi.h>
++#include <asm/arch/spi-gpio.h>
++#include <asm/arch/usb-control.h>
++
++#include <asm/arch/glofiish.h>
++#include <asm/arch/gta01.h>
++
++#include <asm/plat-s3c/regs-serial.h>
++#include <asm/plat-s3c/nand.h>
++#include <asm/plat-s3c24xx/devs.h>
++#include <asm/plat-s3c24xx/cpu.h>
++#include <asm/plat-s3c24xx/pm.h>
++#include <asm/plat-s3c24xx/udc.h>
++
++#include <linux/jbt6k74.h>
++
++/*
++ * this gets called every 1ms when we paniced.
++ */
++
++static long glofiish_panic_blink(long count)
++{
++ long delay = 0;
++ static long last_blink;
++ static char led;
++
++ if (count - last_blink < 100) /* 200ms period, fast blink */
++ return 0;
++
++ /* FIXME */
++#if 0
++ led ^= 1;
++ s3c2410_gpio_cfgpin(GTA02_GPIO_AUX_LED, S3C2410_GPIO_OUTPUT);
++ neo1973_gpb_setpin(GTA02_GPIO_AUX_LED, led);
++
++ last_blink = count;
++#endif
++ return delay;
++}
++
++struct platform_device gta02_version_device = {
++ .name = "neo1973-version",
++ .num_resources = 0,
++};
++
++struct platform_device gta02_resume_reason_device = {
++ .name = "neo1973-resume",
++ .num_resources = 0,
++};
++
++struct platform_device gta02_memconfig_device = {
++ .name = "neo1973-memconfig",
++ .num_resources = 0,
++};
++
++static struct map_desc m800_iodesc[] __initdata = {
++ {
++ .virtual = 0xe0000000,
++ .pfn = __phys_to_pfn(S3C2410_CS3+0x01000000),
++ .length = SZ_1M,
++ .type = MT_DEVICE
++ },
++};
++
++#define UCON S3C2410_UCON_DEFAULT
++#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
++#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
++
++static struct s3c2410_uartcfg m800_uartcfgs[] = {
++ [0] = {
++ .hwport = 0,
++ .flags = 0,
++ .ucon = UCON,
++ .ulcon = ULCON,
++ .ufcon = UFCON,
++ },
++ [1] = {
++ .hwport = 1,
++ .flags = 0,
++ .ucon = UCON,
++ .ulcon = ULCON,
++ .ufcon = UFCON,
++ },
++ [2] = {
++ .hwport = 2,
++ .flags = 0,
++ .ucon = UCON,
++ .ulcon = ULCON,
++ .ufcon = UFCON,
++ },
++
++};
++
++/* Configuration for 480x640 toppoly TD028TTEC1.
++ * Do not mark this as __initdata or it will break! */
++static struct s3c2410fb_display glofiish_displays[] = {
++ {
++ .type = S3C2410_LCDCON1_TFT,
++ .width = 43,
++ .height = 58,
++ .xres = 480,
++ .yres = 640,
++ .bpp = 16,
++
++ .pixclock = 40000, /* HCLK/4 */
++ .left_margin = 2,
++ .right_margin = 2,
++ .hsync_len = 2,
++ .upper_margin = 2,
++ .lower_margin = 66,
++ .vsync_len = 2,
++ .lcdcon5 = S3C2410_LCDCON5_FRM565 |
++ S3C2410_LCDCON5_INVVCLK |
++ S3C2410_LCDCON5_INVVLINE |
++ S3C2410_LCDCON5_INVVFRAME |
++ S3C2410_LCDCON5_PWREN |
++ S3C2410_LCDCON5_HWSWP,
++ },
++ {
++ .type = S3C2410_LCDCON1_TFT,
++ .width = 43,
++ .height = 58,
++ .xres = 480,
++ .yres = 640,
++ .bpp = 32,
++
++ .pixclock = 40000, /* HCLK/4 */
++ .left_margin = 104,
++ .right_margin = 8,
++ .hsync_len = 8,
++ .upper_margin = 2,
++ .lower_margin = 16,
++ .vsync_len = 2,
++ .lcdcon5 = S3C2410_LCDCON5_FRM565 |
++ S3C2410_LCDCON5_INVVCLK |
++ S3C2410_LCDCON5_INVVLINE |
++ S3C2410_LCDCON5_INVVFRAME |
++ S3C2410_LCDCON5_PWREN |
++ S3C2410_LCDCON5_HWSWP,
++ },
++ {
++ .type = S3C2410_LCDCON1_TFT,
++ .width = 43,
++ .height = 58,
++ .xres = 240,
++ .yres = 320,
++ .bpp = 16,
++
++ .pixclock = 40000, /* HCLK/4 */
++ .left_margin = 104,
++ .right_margin = 8,
++ .hsync_len = 8,
++ .upper_margin = 2,
++ .lower_margin = 16,
++ .vsync_len = 2,
++ .lcdcon5 = S3C2410_LCDCON5_FRM565 |
++ S3C2410_LCDCON5_INVVCLK |
++ S3C2410_LCDCON5_INVVLINE |
++ S3C2410_LCDCON5_INVVFRAME |
++ S3C2410_LCDCON5_PWREN |
++ S3C2410_LCDCON5_HWSWP,
++ },
++};
++
++static struct s3c2410fb_mach_info glofiish_lcd_cfg __initdata = {
++ .displays = glofiish_displays,
++ .num_displays = ARRAY_SIZE(glofiish_displays),
++ .default_display = 0,
++
++ .lpcsel = ((0xCE6) & ~7) | 1<<4,
++};
++
++
++static struct resource m800_sdio_resources[] = {
++ [0] = {
++ .flags = IORESOURCE_IRQ,
++ .start = IRQ_SDI,
++ .end = IRQ_SDI,
++ },
++ [1] = {
++ .flags = IORESOURCE_MEM,
++ .start = S3C2410_PA_SDI,
++ .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
++ },
++ [2] = {
++ .flags = IORESOURCE_DMA,
++ .start = 0, /* Channel 0 for SDI */
++ .end = 0,
++ },
++};
++
++static struct platform_device *glofiish_devices[] __initdata = {
++ &s3c_device_usb,
++ &s3c_device_lcd,
++ &s3c_device_wdt,
++ &s3c_device_i2c,
++ &s3c_device_iis,
++ &s3c_device_sdi,
++ &s3c_device_usbgadget,
++ &s3c_device_nand,
++ &s3c_device_ts,
++};
++
++static struct s3c2410_nand_set glofiish_nand_sets[] = {
++ [0] = {
++ .name = "glofiish-nand",
++ .nr_chips = 1,
++ .flags = S3C2410_NAND_BBT,
++ },
++};
++
++/* choose a set of timings derived from S3C@2442B MCP54
++ * data sheet (K5D2G13ACM-D075 MCP Memory)
++ */
++
++static struct s3c2410_platform_nand glofiish_nand_info = {
++ .tacls = 0,
++ .twrph0 = 25,
++ .twrph1 = 15,
++ .nr_sets = ARRAY_SIZE(glofiish_nand_sets),
++ .sets = glofiish_nand_sets,
++ .software_ecc = 1,
++};
++
++static struct s3c24xx_mci_pdata glofiish_mmc_cfg = {
++ .gpio_detect = M800_GPIO_nSD_DETECT,
++ .set_power = NULL,
++ .ocr_avail = MMC_VDD_32_33,
++};
++
++static void glofiish_udc_command(enum s3c2410_udc_cmd_e cmd)
++{
++ printk(KERN_DEBUG "%s(%d)\n", __func__, cmd);
++
++ switch (cmd) {
++ case S3C2410_UDC_P_ENABLE:
++ s3c2410_gpio_setpin(M800_GPIO_USB_PULLUP, 1);
++ break;
++ case S3C2410_UDC_P_DISABLE:
++ s3c2410_gpio_setpin(M800_GPIO_USB_PULLUP, 0);
++ break;
++ case S3C2410_UDC_P_RESET:
++ /* FIXME! */
++ break;
++ default:
++ break;
++ }
++}
++
++/* get PMU to set USB current limit accordingly */
++
++static void glofiish_udc_vbus_draw(unsigned int ma)
++{
++ //pcf50633_notify_usb_current_limit_change(pcf50633_global, ma);
++}
++
++static struct s3c2410_udc_mach_info glofiish_udc_cfg = {
++ .vbus_draw = glofiish_udc_vbus_draw,
++ .udc_command = glofiish_udc_command,
++
++};
++
++static struct s3c2410_ts_mach_info glofiish_ts_cfg = {
++ .delay = 10000,
++ .presc = 50000000 / 1000000, /* 50 MHz PCLK / 1MHz */
++ /* simple averaging, 2^n samples */
++ .oversampling_shift = 5,
++ /* averaging filter length, 2^n */
++ .excursion_filter_len_bits = 5,
++ /* flagged for beauty contest on next sample if differs from
++ * average more than this
++ */
++ .reject_threshold_vs_avg = 2,
++};
++
++
++/* SPI: LCM control interface attached to Glamo3362 */
++
++static void m800_jbt6k74_reset(int devidx, int level)
++{
++ //glamo_lcm_reset(level);
++ printk(KERN_DEBUG "gta01_jbt6k74_reset\n");
++}
++
++/* finally bring up deferred backlight resume now LCM is resumed itself */
++
++static void m800_jbt6k74_resuming(int devidx)
++{
++ //pcf50633_backlight_resume(pcf50633_global);
++ //gta01bl_deferred_resume();
++}
++
++const struct jbt6k74_platform_data jbt6k74_pdata = {
++ .reset = m800_jbt6k74_reset,
++ .resuming = m800_jbt6k74_resuming,
++};
++
++static struct spi_board_info glofiish_spi_board_info[] = {
++ {
++ .modalias = "jbt6k74",
++ /* platform_data */
++ .platform_data = &jbt6k74_pdata,
++ /* controller_data */
++ /* irq */
++ .max_speed_hz = 10 * 1000 * 1000,
++ .bus_num = 2,
++ /* chip_select */
++ },
++};
++
++static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int csidx, int cs)
++{
++ switch (cs) {
++ case BITBANG_CS_ACTIVE:
++ s3c2410_gpio_setpin(S3C2410_GPG3, 0);
++ break;
++ case BITBANG_CS_INACTIVE:
++ s3c2410_gpio_setpin(S3C2410_GPG3, 1);
++ break;
++ }
++}
++
++static struct s3c2410_spigpio_info spi_gpio_cfg = {
++ .pin_clk = S3C2410_GPG7,
++ .pin_mosi = S3C2410_GPG6,
++ .pin_miso = S3C2410_GPG5,
++ .board_size = ARRAY_SIZE(glofiish_spi_board_info),
++ .board_info = glofiish_spi_board_info,
++ .chip_select = &spi_gpio_cs,
++ .num_chipselect = 2, /*** Should be 1 or 2 for gta01? ***/
++};
++
++static struct resource s3c_spi_lcm_resource[] = {
++ [0] = {
++ .start = S3C2410_GPG3,
++ .end = S3C2410_GPG3,
++ },
++ [1] = {
++ .start = S3C2410_GPG5,
++ .end = S3C2410_GPG5,
++ },
++ [2] = {
++ .start = S3C2410_GPG6,
++ .end = S3C2410_GPG6,
++ },
++ [3] = {
++ .start = S3C2410_GPG7,
++ .end = S3C2410_GPG7,
++ },
++};
++
++struct platform_device s3c_device_spi_lcm = {
++ .name = "spi_s3c24xx_gpio",
++ .id = 1,
++ .num_resources = ARRAY_SIZE(s3c_spi_lcm_resource),
++ .resource = s3c_spi_lcm_resource,
++ .dev = {
++ .platform_data = &spi_gpio_cfg,
++ },
++};
++
++static struct gta01bl_machinfo backlight_machinfo = {
++ .default_intensity = 1,
++ .max_intensity = 1,
++ .limit_mask = 1,
++ .defer_resume_backlight = 1,
++};
++
++static struct resource gta01_bl_resources[] = {
++ [0] = {
++ .start = M800_GPIO_BACKLIGHT,
++ .end = M800_GPIO_BACKLIGHT,
++ },
++};
++
++struct platform_device gta01_bl_dev = {
++ .name = "gta01-bl",
++ .num_resources = ARRAY_SIZE(gta01_bl_resources),
++ .resource = gta01_bl_resources,
++ .dev = {
++ .platform_data = &backlight_machinfo,
++ },
++};
++
++
++#if 0 /* currently this is not used and we use gpio spi */
++static struct glamo_spi_info glamo_spi_cfg = {
++ .board_size = ARRAY_SIZE(gta02_spi_board_info),
++ .board_info = gta02_spi_board_info,
++};
++#endif /* 0 */
++
++#if 0
++static struct resource gta02_vibrator_resources[] = {
++ [0] = {
++ .start = GTA02_GPIO_VIBRATOR_ON,
++ .end = GTA02_GPIO_VIBRATOR_ON,
++ },
++};
++
++static struct platform_device gta02_vibrator_dev = {
++ .name = "neo1973-vibrator",
++ .num_resources = ARRAY_SIZE(gta02_vibrator_resources),
++ .resource = gta02_vibrator_resources,
++};
++
++static struct resource gta02_led_resources[] = {
++ {
++ .name = "gta02-power:orange",
++ .start = GTA02_GPIO_PWR_LED1,
++ .end = GTA02_GPIO_PWR_LED1,
++ }, {
++ .name = "gta02-power:blue",
++ .start = GTA02_GPIO_PWR_LED2,
++ .end = GTA02_GPIO_PWR_LED2,
++ }, {
++ .name = "gta02-aux:red",
++ .start = GTA02_GPIO_AUX_LED,
++ .end = GTA02_GPIO_AUX_LED,
++ },
++};
++
++struct platform_device gta02_led_dev = {
++ .name = "gta02-led",
++ .num_resources = ARRAY_SIZE(gta02_led_resources),
++ .resource = gta02_led_resources,
++};
++
++static struct resource gta02_button_resources[] = {
++ [0] = {
++ .start = GTA02_GPIO_AUX_KEY,
++ .end = GTA02_GPIO_AUX_KEY,
++ },
++ [1] = {
++ .start = GTA02_GPIO_HOLD_KEY,
++ .end = GTA02_GPIO_HOLD_KEY,
++ },
++ [2] = {
++ .start = GTA02_GPIO_JACK_INSERT,
++ .end = GTA02_GPIO_JACK_INSERT,
++ },
++};
++
++static struct platform_device gta02_button_dev = {
++ .name = "neo1973-button",
++ .num_resources = ARRAY_SIZE(gta02_button_resources),
++ .resource = gta02_button_resources,
++};
++#endif
++
++/* USB */
++static struct s3c2410_hcd_info glofiish_usb_info = {
++ .port[0] = {
++ .flags = S3C_HCDFLG_USED,
++ },
++ .port[1] = {
++ .flags = 0,
++ },
++};
++
++static struct resource m800_button_resources[] = {
++ [0] = {
++ .start = M800_GPIO_nKEY_POWER,
++ .end = M800_GPIO_nKEY_POWER,
++ },
++ [1] = {
++ .start = M800_GPIO_nKEY_CAMERA,
++ .end = M800_GPIO_nKEY_CAMERA,
++ },
++ [3] = {
++ .start = M800_GPIO_nKEY_RECORD,
++ .end = M800_GPIO_nKEY_RECORD,
++ },
++ [2] = {
++ .start = M800_GPIO_SLIDE,
++ .end = M800_GPIO_SLIDE,
++ },
++};
++
++static struct platform_device m800_button_dev = {
++ .name = "m800-button",
++ .num_resources = ARRAY_SIZE(m800_button_resources),
++ .resource = m800_button_resources,
++};
++
++static struct platform_device m800_pm_bt_dev = {
++ .name = "neo1973-pm-bt",
++};
++
++static void __init glofiish_map_io(void)
++{
++ s3c24xx_init_io(m800_iodesc, ARRAY_SIZE(m800_iodesc));
++ s3c24xx_init_clocks(16934400);
++ s3c24xx_init_uarts(m800_uartcfgs, ARRAY_SIZE(m800_uartcfgs));
++}
++
++static irqreturn_t gta02_modem_irq(int irq, void *param)
++{
++ printk(KERN_DEBUG "modem wakeup interrupt\n");
++ return IRQ_HANDLED;
++}
++
++static irqreturn_t ar6000_wow_irq(int irq, void *param)
++{
++ printk(KERN_DEBUG "ar6000_wow interrupt\n");
++ return IRQ_HANDLED;
++}
++
++/*
++ * hardware_ecc=1|0
++ */
++static char hardware_ecc_str[4] __initdata = "";
++
++static int __init hardware_ecc_setup(char *str)
++{
++ if (str)
++ strlcpy(hardware_ecc_str, str, sizeof(hardware_ecc_str));
++ return 1;
++}
++
++__setup("hardware_ecc=", hardware_ecc_setup);
++
++static void __init glofiish_machine_init(void)
++{
++ int rc;
++
++ /* set the panic callback to make AUX blink fast */
++ panic_blink = glofiish_panic_blink;
++
++ /* do not force soft ecc if we are asked to use hardware_ecc */
++ if (hardware_ecc_str[0] == '1')
++ glofiish_nand_info.software_ecc = 0;
++
++ s3c_device_usb.dev.platform_data = &glofiish_usb_info;
++ s3c_device_nand.dev.platform_data = &glofiish_nand_info;
++ s3c_device_sdi.dev.platform_data = &glofiish_mmc_cfg;
++
++ s3c24xx_fb_set_platdata(&glofiish_lcd_cfg);
++ s3c24xx_udc_set_platdata(&glofiish_udc_cfg);
++ set_s3c2410ts_info(&glofiish_ts_cfg);
++
++ platform_device_register(>a01_bl_dev);
++ platform_device_register(&m800_pm_bt_dev);
++ platform_device_register(&m800_button_dev);
++ platform_device_register(&s3c_device_spi_lcm);
++
++ platform_add_devices(glofiish_devices, ARRAY_SIZE(glofiish_devices));
++
++ s3c2410_pm_init();
++}
++
++MACHINE_START(M800, "Glofiish M800")
++ .phys_io = S3C2410_PA_UART,
++ .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
++ .boot_params = S3C2410_SDRAM_PA + 0x100,
++ .map_io = glofiish_map_io,
++ .init_irq = s3c24xx_init_irq,
++ .init_machine = glofiish_machine_init,
++ .timer = &s3c24xx_timer,
++MACHINE_END
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/mach-gta02.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/mach-gta02.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,1656 @@
++/*
++ * linux/arch/arm/mach-s3c2440/mach-gta02.c
++ *
++ * S3C2440 Machine Support for the FIC GTA02 (Neo1973)
++ *
++ * Copyright (C) 2006-2007 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++
++#include <linux/kernel.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/list.h>
++#include <linux/delay.h>
++#include <linux/timer.h>
++#include <linux/init.h>
++#include <linux/workqueue.h>
++#include <linux/platform_device.h>
++#include <linux/serial_core.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/glamo.h>
++#include <linux/spi/spi_bitbang.h>
++#include <linux/mmc/host.h>
++
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/nand.h>
++#include <linux/mtd/nand_ecc.h>
++#include <linux/mtd/partitions.h>
++#include <linux/mtd/physmap.h>
++
++#include <linux/pcf50633.h>
++#include <linux/lis302dl.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++
++#include <asm/hardware.h>
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/mach-types.h>
++
++#include <asm/arch-s3c2410/regs-irq.h>
++#include <asm/arch/regs-gpio.h>
++#include <asm/arch/regs-gpioj.h>
++#include <asm/arch/fb.h>
++#include <asm/arch/mci.h>
++#include <asm/arch/ts.h>
++#include <asm/arch/spi.h>
++#include <asm/arch/spi-gpio.h>
++#include <asm/arch/usb-control.h>
++
++#include <asm/arch/gta02.h>
++
++#include <asm/plat-s3c/regs-serial.h>
++#include <asm/plat-s3c/nand.h>
++#include <asm/plat-s3c24xx/devs.h>
++#include <asm/plat-s3c24xx/cpu.h>
++#include <asm/plat-s3c24xx/pm.h>
++#include <asm/plat-s3c24xx/udc.h>
++#include <asm/plat-s3c24xx/neo1973.h>
++#include <asm/arch-s3c2410/neo1973-pm-gsm.h>
++
++#include <linux/jbt6k74.h>
++
++#include <linux/glamofb.h>
++
++#include <asm/arch/fiq_ipc_gta02.h>
++#include "fiq_c_isr.h"
++#include <linux/gta02_hdq.h>
++#include <linux/bq27000_battery.h>
++
++#include "../plat-s3c24xx/neo1973_pm_gps.h"
++
++/* arbitrates which sensor IRQ owns the shared SPI bus */
++static spinlock_t motion_irq_lock;
++
++/* the dependency of jbt / LCM on pcf50633 resume */
++struct resume_dependency resume_dep_jbt_pcf;
++/* the dependency of jbt / LCM on glamo resume */
++struct resume_dependency resume_dep_jbt_glamo;
++/* the dependency of Glamo MCI on pcf50633 resume (has to power SD slot) */
++struct resume_dependency resume_dep_glamo_mci_pcf;
++
++
++static int gta02_charger_online_status;
++static int gta02_charger_active_status;
++
++/* define FIQ IPC struct */
++/*
++ * contains stuff FIQ ISR modifies and normal kernel code can see and use
++ * this is defined in <asm/arch/fiq_ipc_gta02.h>, you should customize
++ * the definition in there and include the same definition in your kernel
++ * module that wants to interoperate with your FIQ code.
++ */
++struct fiq_ipc fiq_ipc;
++EXPORT_SYMBOL(fiq_ipc);
++
++#define DIVISOR_FROM_US(x) ((x) << 1)
++
++#define FIQ_DIVISOR_VIBRATOR DIVISOR_FROM_US(100)
++
++#ifdef CONFIG_GTA02_HDQ
++/* HDQ specific */
++#define HDQ_SAMPLE_PERIOD_US 20
++/* private HDQ FSM state -- all other info interesting for caller in fiq_ipc */
++static enum hdq_bitbang_states hdq_state;
++static u8 hdq_ctr;
++static u8 hdq_ctr2;
++static u8 hdq_bit;
++static u8 hdq_shifter;
++static u8 hdq_tx_data_done;
++
++#define FIQ_DIVISOR_HDQ DIVISOR_FROM_US(HDQ_SAMPLE_PERIOD_US)
++#endif
++/* define FIQ ISR */
++
++FIQ_HANDLER_START()
++/* define your locals here -- no initializers though */
++ u16 divisor;
++FIQ_HANDLER_ENTRY(256, 512)
++/* Your ISR here :-) */
++ divisor = 0xffff;
++
++ /* Vibrator servicing */
++
++ if (fiq_ipc.vib_pwm_latched || fiq_ipc.vib_pwm) { /* not idle */
++ if (((u8)_fiq_count_fiqs) == fiq_ipc.vib_pwm_latched)
++ neo1973_gpb_setpin(fiq_ipc.vib_gpio_pin, 0);
++ if (((u8)_fiq_count_fiqs) == 0) {
++ fiq_ipc.vib_pwm_latched = fiq_ipc.vib_pwm;
++ if (fiq_ipc.vib_pwm_latched)
++ neo1973_gpb_setpin(fiq_ipc.vib_gpio_pin, 1);
++ }
++ divisor = FIQ_DIVISOR_VIBRATOR;
++ }
++
++#ifdef CONFIG_GTA02_HDQ
++ /* HDQ servicing */
++
++ switch (hdq_state) {
++ case HDQB_IDLE:
++ if (fiq_ipc.hdq_request_ctr == fiq_ipc.hdq_transaction_ctr)
++ break;
++ hdq_ctr = 210 / HDQ_SAMPLE_PERIOD_US;
++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 0);
++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT);
++ hdq_tx_data_done = 0;
++ hdq_state = HDQB_TX_BREAK;
++ break;
++
++ case HDQB_TX_BREAK: /* issue low for > 190us */
++ if (--hdq_ctr == 0) {
++ hdq_ctr = 60 / HDQ_SAMPLE_PERIOD_US;
++ hdq_state = HDQB_TX_BREAK_RECOVERY;
++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1);
++ }
++ break;
++
++ case HDQB_TX_BREAK_RECOVERY: /* issue low for > 40us */
++ if (--hdq_ctr)
++ break;
++ hdq_shifter = fiq_ipc.hdq_ads;
++ hdq_bit = 8; /* 8 bits of ads / rw */
++ hdq_tx_data_done = 0; /* doing ads */
++ /* fallthru on last one */
++ case HDQB_ADS_CALC:
++ if (hdq_shifter & 1)
++ hdq_ctr = 50 / HDQ_SAMPLE_PERIOD_US;
++ else
++ hdq_ctr = 120 / HDQ_SAMPLE_PERIOD_US;
++ /* carefully precompute the other phase length */
++ hdq_ctr2 = (210 - (hdq_ctr * HDQ_SAMPLE_PERIOD_US)) /
++ HDQ_SAMPLE_PERIOD_US;
++ hdq_state = HDQB_ADS_LOW;
++ hdq_shifter >>= 1;
++ hdq_bit--;
++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 0);
++ break;
++
++ case HDQB_ADS_LOW:
++ if (--hdq_ctr)
++ break;
++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1);
++ hdq_state = HDQB_ADS_HIGH;
++ break;
++
++ case HDQB_ADS_HIGH:
++ if (--hdq_ctr2 > 1) /* account for HDQB_ADS_CALC */
++ break;
++ if (hdq_bit) { /* more bits to do */
++ hdq_state = HDQB_ADS_CALC;
++ break;
++ }
++ /* no more bits, wait it out until hdq_ctr2 exhausted */
++ if (hdq_ctr2)
++ break;
++ /* ok no more bits and very last state */
++ hdq_ctr = 60 / HDQ_SAMPLE_PERIOD_US;
++ /* FIXME 0 = read */
++ if (fiq_ipc.hdq_ads & 0x80) { /* write the byte out */
++ /* set delay before payload */
++ hdq_ctr = 300 / HDQ_SAMPLE_PERIOD_US;
++ /* already high, no need to write */
++ hdq_state = HDQB_WAIT_TX;
++ break;
++ }
++ /* read the next byte */
++ hdq_bit = 8; /* 8 bits of data */
++ hdq_ctr = 3000 / HDQ_SAMPLE_PERIOD_US;
++ hdq_state = HDQB_WAIT_RX;
++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_INPUT);
++ break;
++
++ case HDQB_WAIT_TX: /* issue low for > 40us */
++ if (--hdq_ctr)
++ break;
++ if (!hdq_tx_data_done) { /* was that the data sent? */
++ hdq_tx_data_done++;
++ hdq_shifter = fiq_ipc.hdq_tx_data;
++ hdq_bit = 8; /* 8 bits of data */
++ hdq_state = HDQB_ADS_CALC; /* start sending */
++ break;
++ }
++ fiq_ipc.hdq_error = 0;
++ fiq_ipc.hdq_transaction_ctr++;
++ hdq_state = HDQB_IDLE; /* all tx is done */
++ /* idle in input mode, it's pulled up by 10K */
++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_INPUT);
++ break;
++
++ case HDQB_WAIT_RX: /* wait for battery to talk to us */
++ if (s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin) == 0) {
++ /* it talks to us! */
++ hdq_ctr2 = 1;
++ hdq_bit = 8; /* 8 bits of data */
++ /* timeout */
++ hdq_ctr = 300 / HDQ_SAMPLE_PERIOD_US;
++ hdq_state = HDQB_DATA_RX_LOW;
++ break;
++ }
++ if (--hdq_ctr == 0) { /* timed out, error */
++ fiq_ipc.hdq_error = 1;
++ fiq_ipc.hdq_transaction_ctr++;
++ hdq_state = HDQB_IDLE; /* abort */
++ }
++ break;
++
++ /*
++ * HDQ basically works by measuring the low time of the bit cell
++ * 32-50us --> '1', 80 - 145us --> '0'
++ */
++
++ case HDQB_DATA_RX_LOW:
++ if (s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin)) {
++ fiq_ipc.hdq_rx_data >>= 1;
++ if (hdq_ctr2 <= (65 / HDQ_SAMPLE_PERIOD_US))
++ fiq_ipc.hdq_rx_data |= 0x80;
++
++ if (--hdq_bit == 0) {
++ fiq_ipc.hdq_error = 0;
++ fiq_ipc.hdq_transaction_ctr++; /* done */
++ hdq_state = HDQB_IDLE;
++ } else
++ hdq_state = HDQB_DATA_RX_HIGH;
++ /* timeout */
++ hdq_ctr = 1000 / HDQ_SAMPLE_PERIOD_US;
++ hdq_ctr2 = 1;
++ break;
++ }
++ hdq_ctr2++;
++ if (--hdq_ctr)
++ break;
++ /* timed out, error */
++ fiq_ipc.hdq_error = 2;
++ fiq_ipc.hdq_transaction_ctr++;
++ hdq_state = HDQB_IDLE; /* abort */
++ break;
++
++ case HDQB_DATA_RX_HIGH:
++ if (!s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin)) {
++ /* it talks to us! */
++ hdq_ctr2 = 1;
++ /* timeout */
++ hdq_ctr = 400 / HDQ_SAMPLE_PERIOD_US;
++ hdq_state = HDQB_DATA_RX_LOW;
++ break;
++ }
++ if (--hdq_ctr)
++ break;
++ /* timed out, error */
++ fiq_ipc.hdq_error = 3;
++ fiq_ipc.hdq_transaction_ctr++;
++ /* we're in input mode already */
++ hdq_state = HDQB_IDLE; /* abort */
++ break;
++ }
++
++ if (hdq_state != HDQB_IDLE) /* ie, not idle */
++ if (divisor > FIQ_DIVISOR_HDQ)
++ divisor = FIQ_DIVISOR_HDQ; /* keep us going */
++#endif
++
++ /* disable further timer interrupts if nobody has any work
++ * or adjust rate according to who still has work
++ *
++ * CAUTION: it means forground code must disable FIQ around
++ * its own non-atomic S3C2410_INTMSK changes... not common
++ * thankfully and taken care of by the fiq-basis patch
++ */
++ if (divisor == 0xffff) /* mask the fiq irq source */
++ __raw_writel(__raw_readl(S3C2410_INTMSK) | _fiq_ack_mask,
++ S3C2410_INTMSK);
++ else /* still working, maybe at a different rate */
++ __raw_writel(divisor, S3C2410_TCNTB(_fiq_timer_index));
++ _fiq_timer_divisor = divisor;
++
++FIQ_HANDLER_END()
++
++
++/*
++ * this gets called every 1ms when we paniced.
++ */
++
++static long gta02_panic_blink(long count)
++{
++ long delay = 0;
++ static long last_blink;
++ static char led;
++
++ if (count - last_blink < 100) /* 200ms period, fast blink */
++ return 0;
++
++ led ^= 1;
++ s3c2410_gpio_cfgpin(GTA02_GPIO_AUX_LED, S3C2410_GPIO_OUTPUT);
++ neo1973_gpb_setpin(GTA02_GPIO_AUX_LED, led);
++
++ last_blink = count;
++ return delay;
++}
++
++
++/**
++ * returns PCB revision information in b9,b8 and b2,b1,b0
++ * Pre-GTA02 A6 returns 0x000
++ * GTA02 A6 returns 0x101
++ * ...
++ */
++
++int gta02_get_pcb_revision(void)
++{
++ int n;
++ int u = 0;
++ static unsigned long pinlist[] = {
++ GTA02_PCB_ID1_0,
++ GTA02_PCB_ID1_1,
++ GTA02_PCB_ID1_2,
++ GTA02_PCB_ID2_0,
++ GTA02_PCB_ID2_1,
++ };
++ static int pin_offset[] = {
++ 0, 1, 2, 8, 9
++ };
++
++ for (n = 0 ; n < ARRAY_SIZE(pinlist); n++) {
++ /*
++ * set the PCB version GPIO to be pulled-down input
++ * force low briefly first
++ */
++ s3c2410_gpio_cfgpin(pinlist[n], S3C2410_GPIO_OUTPUT);
++ s3c2410_gpio_setpin(pinlist[n], 0);
++ /* misnomer: it is a pullDOWN in 2442 */
++ s3c2410_gpio_pullup(pinlist[n], 1);
++ s3c2410_gpio_cfgpin(pinlist[n], S3C2410_GPIO_INPUT);
++
++ udelay(10);
++
++ if (s3c2410_gpio_getpin(pinlist[n]))
++ u |= 1 << pin_offset[n];
++
++ /*
++ * when not being interrogated, all of the revision GPIO
++ * are set to output HIGH without pulldown so no current flows
++ * if they are NC or pulled up.
++ */
++ s3c2410_gpio_setpin(pinlist[n], 1);
++ s3c2410_gpio_cfgpin(pinlist[n], S3C2410_GPIO_OUTPUT);
++ /* misnomer: it is a pullDOWN in 2442 */
++ s3c2410_gpio_pullup(pinlist[n], 0);
++ }
++
++ return u;
++}
++
++struct platform_device gta02_version_device = {
++ .name = "neo1973-version",
++ .num_resources = 0,
++};
++
++struct platform_device gta02_resume_reason_device = {
++ .name = "neo1973-resume",
++ .num_resources = 0,
++};
++
++struct platform_device gta02_memconfig_device = {
++ .name = "neo1973-memconfig",
++ .num_resources = 0,
++};
++
++static struct map_desc gta02_iodesc[] __initdata = {
++ {
++ .virtual = 0xe0000000,
++ .pfn = __phys_to_pfn(S3C2410_CS3+0x01000000),
++ .length = SZ_1M,
++ .type = MT_DEVICE
++ },
++};
++
++#define UCON S3C2410_UCON_DEFAULT
++#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
++#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
++
++static struct s3c2410_uartcfg gta02_uartcfgs[] = {
++ [0] = {
++ .hwport = 0,
++ .flags = 0,
++ .ucon = UCON,
++ .ulcon = ULCON,
++ .ufcon = UFCON,
++ },
++ [1] = {
++ .hwport = 1,
++ .flags = 0,
++ .ucon = UCON,
++ .ulcon = ULCON,
++ .ufcon = UFCON,
++ },
++ [2] = {
++ .hwport = 2,
++ .flags = 0,
++ .ucon = UCON,
++ .ulcon = ULCON,
++ .ufcon = UFCON,
++ },
++
++};
++
++/* BQ27000 Battery */
++
++static int gta02_get_charger_online_status(void)
++{
++ return gta02_charger_online_status;
++}
++
++static int gta02_get_charger_active_status(void)
++{
++ return gta02_charger_active_status;
++}
++
++
++struct bq27000_platform_data bq27000_pdata = {
++ .name = "bat",
++ .rsense_mohms = 20,
++ .hdq_read = gta02hdq_read,
++ .hdq_write = gta02hdq_write,
++ .hdq_initialized = gta02hdq_initialized,
++ .get_charger_online_status = gta02_get_charger_online_status,
++ .get_charger_active_status = gta02_get_charger_active_status
++};
++
++struct platform_device bq27000_battery_device = {
++ .name = "bq27000-battery",
++ .dev = {
++ .platform_data = &bq27000_pdata,
++ },
++};
++
++
++/* PMU driver info */
++
++static int pmu_callback(struct device *dev, unsigned int feature,
++ enum pmu_event event)
++{
++ switch (feature) {
++ case PCF50633_FEAT_MBC:
++ switch (event) {
++ case PMU_EVT_CHARGER_IDLE:
++ gta02_charger_active_status = 0;
++ break;
++ case PMU_EVT_CHARGER_ACTIVE:
++ gta02_charger_active_status = 1;
++ break;
++ case PMU_EVT_USB_INSERT:
++ gta02_charger_online_status = 1;
++ break;
++ case PMU_EVT_USB_REMOVE:
++ gta02_charger_online_status = 0;
++ break;
++ case PMU_EVT_INSERT: /* adapter is unsused */
++ case PMU_EVT_REMOVE: /* adapter is unused */
++ break;
++ default:
++ break;
++ }
++ break;
++ default:
++ break;
++ }
++
++ bq27000_charging_state_change(&bq27000_battery_device);
++ return 0;
++}
++
++static struct platform_device gta01_pm_gps_dev = {
++ .name = "neo1973-pm-gps",
++};
++
++static struct platform_device gta01_pm_bt_dev = {
++ .name = "neo1973-pm-bt",
++};
++
++/* this is called when pc50633 is probed, unfortunately quite late in the
++ * day since it is an I2C bus device. Here we can belatedly define some
++ * platform devices with the advantage that we can mark the pcf50633 as the
++ * parent. This makes them get suspended and resumed with their parent
++ * the pcf50633 still around.
++ */
++
++static void gta02_pcf50633_attach_child_devices(struct device *parent_device)
++{
++ gta01_pm_gps_dev.dev.parent = parent_device;
++ gta01_pm_bt_dev.dev.parent = parent_device;
++ platform_device_register(>a01_pm_bt_dev);
++ platform_device_register(>a01_pm_gps_dev);
++}
++
++static struct pcf50633_platform_data gta02_pcf_pdata = {
++ .used_features = PCF50633_FEAT_MBC |
++ PCF50633_FEAT_BBC |
++ PCF50633_FEAT_RTC |
++ PCF50633_FEAT_CHGCUR |
++ PCF50633_FEAT_BATVOLT |
++ PCF50633_FEAT_BATTEMP |
++ PCF50633_FEAT_PWM_BL,
++ .onkey_seconds_sig_init = 4,
++ .onkey_seconds_shutdown = 8,
++ .cb = &pmu_callback,
++ .r_fix_batt = 10000,
++ .r_fix_batt_par = 10000,
++ .r_sense_milli = 220,
++ .flag_use_apm_emulation = 0,
++ .resumers = {
++ [0] = PCF50633_INT1_USBINS |
++ PCF50633_INT1_USBREM |
++ PCF50633_INT1_ALARM,
++ [1] = PCF50633_INT2_ONKEYF,
++ [2] = PCF50633_INT3_ONKEY1S
++ },
++ /* warning: these get rewritten during machine init below
++ * depending on pcb variant
++ */
++ .rails = {
++ [PCF50633_REGULATOR_AUTO] = {
++ .name = "io_3v3",
++ .flags = PMU_VRAIL_F_SUSPEND_ON,
++ .voltage = {
++ .init = 3300,
++ .max = 3300,
++ },
++ },
++ [PCF50633_REGULATOR_DOWN1] = {
++ .name = "core_1v3",
++ /* Wow, when we are going into suspend, after pcf50633
++ * runs its suspend (which happens real early since it
++ * is an i2c device) we are running out of the 22uF cap
++ * on core_1v3 rail !!!!
++ */
++ .voltage = {
++ .init = 1300,
++ .max = 1600,
++ },
++ },
++ [PCF50633_REGULATOR_DOWN2] = {
++ .name = "core_1v8",
++ .flags = PMU_VRAIL_F_SUSPEND_ON,
++ .voltage = {
++ .init = 1800,
++ .max = 1800,
++ },
++ },
++ [PCF50633_REGULATOR_HCLDO] = {
++ .name = "sd_3v3",
++ .voltage = {
++ .init = 2000,
++ .max = 3300,
++ },
++ },
++ [PCF50633_REGULATOR_LDO1] = {
++ .name = "gsensor_3v3",
++ .voltage = {
++ .init = 1300,
++ .max = 1330,
++ },
++ },
++ [PCF50633_REGULATOR_LDO2] = {
++ .name = "codec_3v3",
++ .voltage = {
++ .init = 3300,
++ .max = 3300,
++ },
++ },
++ [PCF50633_REGULATOR_LDO3] = {
++ .name = "unused3",
++ .voltage = {
++ .init = 3000,
++ .max = 3000,
++ },
++ },
++ [PCF50633_REGULATOR_LDO4] = {
++ .name = "bt_3v2",
++ .voltage = {
++ .init = 2500,
++ .max = 3300,
++ },
++ },
++ [PCF50633_REGULATOR_LDO5] = {
++ .name = "rf3v",
++ .voltage = {
++ .init = 1500,
++ .max = 1500,
++ },
++ },
++ [PCF50633_REGULATOR_LDO6] = {
++ .name = "lcm_3v",
++ .flags = PMU_VRAIL_F_SUSPEND_ON,
++ .voltage = {
++ .init = 0,
++ .max = 3300,
++ },
++ },
++ [PCF50633_REGULATOR_MEMLDO] = {
++ .name = "memldo",
++ .flags = PMU_VRAIL_F_SUSPEND_ON,
++ .voltage = {
++ .init = 1800,
++ .max = 1800,
++ },
++ },
++ },
++ .defer_resume_backlight = 1,
++ .resume_backlight_ramp_speed = 5,
++ .attach_child_devices = gta02_pcf50633_attach_child_devices
++
++};
++
++#if 0 /* currently unused */
++static void cfg_pmu_vrail(struct pmu_voltage_rail *vrail, char *name,
++ unsigned int flags, unsigned int init,
++ unsigned int max)
++{
++ vrail->name = name;
++ vrail->flags = flags;
++ vrail->voltage.init = init;
++ vrail->voltage.max = max;
++}
++#endif
++
++static void mangle_pmu_pdata_by_system_rev(void)
++{
++ switch (system_rev) {
++ case GTA02v1_SYSTEM_REV:
++ /* FIXME: this is only in v1 due to wrong PMU variant */
++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_DOWN2].flags =
++ PMU_VRAIL_F_SUSPEND_ON;
++ break;
++ case GTA02v2_SYSTEM_REV:
++ case GTA02v3_SYSTEM_REV:
++ case GTA02v4_SYSTEM_REV:
++ case GTA02v5_SYSTEM_REV:
++ case GTA02v6_SYSTEM_REV:
++ /* we need to keep the 1.8V going since this is the SDRAM
++ * self-refresh voltage */
++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_DOWN2].flags =
++ PMU_VRAIL_F_SUSPEND_ON;
++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_DOWN2].name =
++ "io_1v8",
++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO1].name =
++ "gsensor_3v3",
++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO1].voltage.init =
++ 3300;
++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO1].voltage.max =
++ 3300;
++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO1].flags &=
++ ~PMU_VRAIL_F_SUSPEND_ON;
++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO3].flags =
++ PMU_VRAIL_F_UNUSED;
++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO5] = ((struct pmu_voltage_rail) {
++ .name = "rf_3v",
++ .voltage = {
++ .init = 0,
++ .max = 3000,
++ }
++ });
++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO6] =
++ ((struct pmu_voltage_rail) {
++ .name = "lcm_3v",
++ .flags = PMU_VRAIL_F_SUSPEND_ON,
++ .voltage = {
++ .init = 3000,
++ .max = 3000,
++ }
++ });
++ break;
++ default:
++ break;
++ }
++}
++
++static struct resource gta02_pmu_resources[] = {
++ [0] = {
++ .flags = IORESOURCE_IRQ,
++ .start = GTA02_IRQ_PCF50633,
++ .end = GTA02_IRQ_PCF50633,
++ },
++};
++
++struct platform_device gta02_pmu_dev = {
++ .name = "pcf50633",
++ .num_resources = ARRAY_SIZE(gta02_pmu_resources),
++ .resource = gta02_pmu_resources,
++ .dev = {
++ .platform_data = >a02_pcf_pdata,
++ },
++};
++
++/* FIQ */
++
++static struct resource sc32440_fiq_resources[] = {
++ [0] = {
++ .flags = IORESOURCE_IRQ,
++ .start = IRQ_TIMER3,
++ .end = IRQ_TIMER3,
++ },
++};
++
++struct platform_device sc32440_fiq_device = {
++ .name = "sc32440_fiq",
++ .num_resources = 1,
++ .resource = sc32440_fiq_resources,
++};
++
++#ifdef CONFIG_GTA02_HDQ
++/* HDQ */
++
++static struct resource gta02_hdq_resources[] = {
++ [0] = {
++ .start = GTA02v5_GPIO_HDQ,
++ .end = GTA02v5_GPIO_HDQ,
++ },
++};
++
++struct platform_device gta02_hdq_device = {
++ .name = "gta02-hdq",
++ .num_resources = 1,
++ .resource = gta02_hdq_resources,
++};
++#endif
++
++
++/* NOR Flash */
++
++#define GTA02_FLASH_BASE 0x18000000 /* GCS3 */
++#define GTA02_FLASH_SIZE 0x200000 /* 2MBytes */
++
++static struct physmap_flash_data gta02_nor_flash_data = {
++ .width = 2,
++};
++
++static struct resource gta02_nor_flash_resource = {
++ .start = GTA02_FLASH_BASE,
++ .end = GTA02_FLASH_BASE + GTA02_FLASH_SIZE - 1,
++ .flags = IORESOURCE_MEM,
++};
++
++static struct platform_device gta02_nor_flash = {
++ .name = "physmap-flash",
++ .id = 0,
++ .dev = {
++ .platform_data = >a02_nor_flash_data,
++ },
++ .resource = >a02_nor_flash_resource,
++ .num_resources = 1,
++};
++
++
++
++static struct resource gta02_sdio_resources[] = {
++ [0] = {
++ .flags = IORESOURCE_IRQ,
++ .start = IRQ_SDI,
++ .end = IRQ_SDI,
++ },
++ [1] = {
++ .flags = IORESOURCE_MEM,
++ .start = S3C2410_PA_SDI,
++ .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
++ },
++ [2] = {
++ .flags = IORESOURCE_DMA,
++ .start = 0, /* Channel 0 for SDI */
++ .end = 0,
++ },
++};
++
++
++static struct platform_device gta02_sdio_dev = {
++ .name = "s3c24xx-sdio",
++ .id = -1,
++ .dev = {
++ .coherent_dma_mask = 0xffffffff,
++ },
++ .resource = gta02_sdio_resources,
++ .num_resources = ARRAY_SIZE(gta02_sdio_resources),
++};
++
++struct platform_device s3c24xx_pwm_device = {
++ .name = "s3c24xx_pwm",
++ .num_resources = 0,
++};
++
++
++static struct platform_device *gta02_devices[] __initdata = {
++ &s3c_device_usb,
++ &s3c_device_wdt,
++ &s3c_device_i2c,
++ &s3c_device_iis,
++ // &s3c_device_sdi, /* FIXME: temporary disable to avoid s3cmci bind */
++ &s3c_device_usbgadget,
++ &s3c_device_nand,
++ &s3c_device_ts,
++ >a02_nor_flash,
++ &sc32440_fiq_device,
++ >a02_version_device,
++ >a02_memconfig_device,
++ >a02_resume_reason_device,
++ &s3c24xx_pwm_device,
++
++};
++
++static struct s3c2410_nand_set gta02_nand_sets[] = {
++ [0] = {
++ .name = "neo1973-nand",
++ .nr_chips = 1,
++ .flags = S3C2410_NAND_BBT,
++ },
++};
++
++/* choose a set of timings derived from S3C@2442B MCP54
++ * data sheet (K5D2G13ACM-D075 MCP Memory)
++ */
++
++static struct s3c2410_platform_nand gta02_nand_info = {
++ .tacls = 0,
++ .twrph0 = 25,
++ .twrph1 = 15,
++ .nr_sets = ARRAY_SIZE(gta02_nand_sets),
++ .sets = gta02_nand_sets,
++ .software_ecc = 1,
++};
++
++static struct s3c24xx_mci_pdata gta02_mmc_cfg = {
++ .gpio_detect = GTA02v1_GPIO_nSD_DETECT,
++ .set_power = NULL,
++ .ocr_avail = MMC_VDD_32_33,
++};
++
++static void gta02_udc_command(enum s3c2410_udc_cmd_e cmd)
++{
++ printk(KERN_DEBUG "%s(%d)\n", __func__, cmd);
++
++ switch (cmd) {
++ case S3C2410_UDC_P_ENABLE:
++ neo1973_gpb_setpin(GTA02_GPIO_USB_PULLUP, 1);
++ break;
++ case S3C2410_UDC_P_DISABLE:
++ neo1973_gpb_setpin(GTA02_GPIO_USB_PULLUP, 0);
++ break;
++ case S3C2410_UDC_P_RESET:
++ /* FIXME! */
++ break;
++ default:
++ break;
++ }
++}
++
++/* get PMU to set USB current limit accordingly */
++
++static void gta02_udc_vbus_draw(unsigned int ma)
++{
++ if (!pcf50633_global)
++ return;
++
++ pcf50633_notify_usb_current_limit_change(pcf50633_global, ma);
++}
++
++static struct s3c2410_udc_mach_info gta02_udc_cfg = {
++ .vbus_draw = gta02_udc_vbus_draw,
++ .udc_command = gta02_udc_command,
++
++};
++
++static struct s3c2410_ts_mach_info gta02_ts_cfg = {
++ .delay = 10000,
++ .presc = 50000000 / 1000000, /* 50 MHz PCLK / 1MHz */
++ /* simple averaging, 2^n samples */
++ .oversampling_shift = 5,
++ /* averaging filter length, 2^n */
++ .excursion_filter_len_bits = 5,
++ /* flagged for beauty contest on next sample if differs from
++ * average more than this
++ */
++ .reject_threshold_vs_avg = 2,
++};
++
++
++/* SPI: LCM control interface attached to Glamo3362 */
++
++static void gta02_jbt6k74_reset(int devidx, int level)
++{
++ glamo_lcm_reset(level);
++}
++
++/* finally bring up deferred backlight resume now LCM is resumed itself */
++
++static void gta02_jbt6k74_resuming(int devidx)
++{
++ pcf50633_backlight_resume(pcf50633_global);
++}
++
++static int gta02_jbt6k74_all_dependencies_resumed(int devidx)
++{
++ if (!resume_dep_jbt_pcf.called_flag)
++ return 0;
++
++ if (!resume_dep_jbt_glamo.called_flag)
++ return 0;
++
++ return 1;
++}
++
++/* register jbt resume action to be dependent on pcf50633 and glamo resume */
++
++static void gta02_jbt6k74_suspending(int devindex, struct spi_device *spi)
++{
++ void jbt6k74_resume(void *spi); /* little white lies about types */
++
++ resume_dep_jbt_pcf.callback = jbt6k74_resume;
++ resume_dep_jbt_pcf.context = (void *)spi;
++ pcf50633_register_resume_dependency(pcf50633_global,
++ &resume_dep_jbt_pcf);
++ resume_dep_jbt_glamo.callback = jbt6k74_resume;
++ resume_dep_jbt_glamo.context = (void *)spi;
++ glamo_register_resume_dependency(&resume_dep_jbt_glamo);
++}
++
++
++const struct jbt6k74_platform_data jbt6k74_pdata = {
++ .reset = gta02_jbt6k74_reset,
++ .resuming = gta02_jbt6k74_resuming,
++ .suspending = gta02_jbt6k74_suspending,
++ .all_dependencies_resumed = gta02_jbt6k74_all_dependencies_resumed,
++};
++
++static struct spi_board_info gta02_spi_board_info[] = {
++ {
++ .modalias = "jbt6k74",
++ /* platform_data */
++ .platform_data = &jbt6k74_pdata,
++ /* controller_data */
++ /* irq */
++ .max_speed_hz = 10 * 1000 * 1000,
++ .bus_num = 2,
++ /* chip_select */
++ },
++};
++
++#if 0 /* currently this is not used and we use gpio spi */
++static struct glamo_spi_info glamo_spi_cfg = {
++ .board_size = ARRAY_SIZE(gta02_spi_board_info),
++ .board_info = gta02_spi_board_info,
++};
++#endif /* 0 */
++
++static struct glamo_spigpio_info glamo_spigpio_cfg = {
++ .pin_clk = GLAMO_GPIO10_OUTPUT,
++ .pin_mosi = GLAMO_GPIO11_OUTPUT,
++ .pin_cs = GLAMO_GPIO12_OUTPUT,
++ .pin_miso = 0,
++ .board_size = ARRAY_SIZE(gta02_spi_board_info),
++ .board_info = gta02_spi_board_info,
++};
++
++static struct resource gta02_vibrator_resources[] = {
++ [0] = {
++ .start = GTA02_GPIO_VIBRATOR_ON,
++ .end = GTA02_GPIO_VIBRATOR_ON,
++ },
++};
++
++static struct platform_device gta02_vibrator_dev = {
++ .name = "neo1973-vibrator",
++ .num_resources = ARRAY_SIZE(gta02_vibrator_resources),
++ .resource = gta02_vibrator_resources,
++};
++
++/* SPI: Accelerometers attached to SPI of s3c244x */
++
++/*
++ * Situation is that Linux SPI can't work in an interrupt context, so we
++ * implement our own bitbang here. Arbitration is needed because not only
++ * can this interrupt happen at any time even if foreground wants to use
++ * the bitbang API from Linux, but multiple motion sensors can be on the
++ * same SPI bus, and multiple interrupts can happen.
++ *
++ * Foreground / interrupt arbitration is okay because the interrupts are
++ * disabled around all the foreground SPI code.
++ *
++ * Interrupt / Interrupt arbitration is evidently needed, otherwise we
++ * lose edge-triggered service after a while due to the two sensors sharing
++ * the SPI bus having irqs at the same time eventually.
++ *
++ * Servicing is typ 75 - 100us at 400MHz.
++ */
++
++/* #define DEBUG_SPEW_MS */
++
++struct lis302dl_platform_data lis302_pdata_top;
++struct lis302dl_platform_data lis302_pdata_bottom;
++
++/*
++ * generic SPI RX and TX bitbang
++ * only call with interrupts off!
++ */
++
++static void gta02_lis302dl_bitbang(struct lis302dl_info *lis, u8 *tx,
++ int tx_bytes, u8 *rx, int rx_bytes)
++{
++ struct lis302dl_platform_data *pdata = lis->pdata;
++ int n;
++ u8 shifter = 0;
++ unsigned long other_cs;
++
++ /*
++ * Huh.. "quirk"... CS on this device is not really "CS" like you can
++ * expect. Instead when 1 it selects I2C interface mode. Because we
++ * have 2 devices on one interface, the "disabled" device when we talk
++ * to an "enabled" device sees the clocks as I2C clocks, creating
++ * havoc.
++ *
++ * I2C sees MOSI going LOW while CLK HIGH as a START action, we must
++ * ensure this is never issued.
++ */
++
++ if (&lis302_pdata_top == pdata)
++ other_cs = lis302_pdata_bottom.pin_chip_select;
++ else
++ other_cs = lis302_pdata_top.pin_chip_select;
++
++ s3c2410_gpio_setpin(other_cs, 1);
++ s3c2410_gpio_setpin(pdata->pin_chip_select, 1);
++ s3c2410_gpio_setpin(pdata->pin_clk, 1);
++ s3c2410_gpio_setpin(pdata->pin_chip_select, 0);
++
++ /* send the register index, r/w and autoinc bits */
++ for (n = 0; n < (tx_bytes << 3); n++) {
++ if (!(n & 7))
++ shifter = tx[n >> 3];
++ s3c2410_gpio_setpin(pdata->pin_clk, 0);
++ s3c2410_gpio_setpin(pdata->pin_mosi, (shifter >> 7) & 1);
++ s3c2410_gpio_setpin(pdata->pin_clk, 0);
++ s3c2410_gpio_setpin(pdata->pin_clk, 1);
++ s3c2410_gpio_setpin(pdata->pin_clk, 1);
++ shifter <<= 1;
++ }
++
++ for (n = 0; n < (rx_bytes << 3); n++) { /* 8 bits each */
++ s3c2410_gpio_setpin(pdata->pin_clk, 0);
++ s3c2410_gpio_setpin(pdata->pin_clk, 0);
++ shifter <<= 1;
++ if (s3c2410_gpio_getpin(pdata->pin_miso))
++ shifter |= 1;
++ if ((n & 7) == 7)
++ rx[n >> 3] = shifter;
++ s3c2410_gpio_setpin(pdata->pin_clk, 1);
++ s3c2410_gpio_setpin(pdata->pin_clk, 1);
++ }
++ s3c2410_gpio_setpin(pdata->pin_chip_select, 1);
++ s3c2410_gpio_setpin(other_cs, 1);
++}
++
++
++static int gta02_lis302dl_bitbang_read_reg(struct lis302dl_info *lis, u8 reg)
++{
++ u8 data = 0xc0 | reg; /* read, autoincrement */
++ unsigned long flags;
++
++ local_irq_save(flags);
++
++ gta02_lis302dl_bitbang(lis, &data, 1, &data, 1);
++
++ local_irq_restore(flags);
++
++ return data;
++}
++
++static void gta02_lis302dl_bitbang_write_reg(struct lis302dl_info *lis, u8 reg,
++ u8 val)
++{
++ u8 data[2] = { 0x00 | reg, val }; /* write, no autoincrement */
++ unsigned long flags;
++
++ local_irq_save(flags);
++
++ gta02_lis302dl_bitbang(lis, &data[0], 2, NULL, 0);
++
++ local_irq_restore(flags);
++
++}
++
++
++void gta02_lis302dl_suspend_io(struct lis302dl_info *lis, int resume)
++{
++ struct lis302dl_platform_data *pdata = lis->pdata;
++
++ if (!resume) {
++ /*
++ * we don't want to power them with a high level
++ * because GSENSOR_3V3 is not up during suspend
++ */
++ s3c2410_gpio_setpin(pdata->pin_chip_select, 0);
++ s3c2410_gpio_setpin(pdata->pin_clk, 0);
++ s3c2410_gpio_setpin(pdata->pin_mosi, 0);
++ /* misnomer: it is a pullDOWN in 2442 */
++ s3c2410_gpio_pullup(pdata->pin_miso, 1);
++ return;
++ }
++
++ /* back to normal */
++ s3c2410_gpio_setpin(pdata->pin_chip_select, 1);
++ s3c2410_gpio_setpin(pdata->pin_clk, 1);
++ /* misnomer: it is a pullDOWN in 2442 */
++ s3c2410_gpio_pullup(pdata->pin_miso, 0);
++
++ s3c2410_gpio_cfgpin(pdata->pin_chip_select, S3C2410_GPIO_OUTPUT);
++ s3c2410_gpio_cfgpin(pdata->pin_clk, S3C2410_GPIO_OUTPUT);
++ s3c2410_gpio_cfgpin(pdata->pin_mosi, S3C2410_GPIO_OUTPUT);
++ s3c2410_gpio_cfgpin(pdata->pin_miso, S3C2410_GPIO_INPUT);
++
++}
++
++
++
++struct lis302dl_platform_data lis302_pdata_top = {
++ .name = "lis302-1 (top)",
++ .pin_chip_select= S3C2410_GPD12,
++ .pin_clk = S3C2410_GPG7,
++ .pin_mosi = S3C2410_GPG6,
++ .pin_miso = S3C2410_GPG5,
++ .interrupt = GTA02_IRQ_GSENSOR_1,
++ .open_drain = 1, /* altered at runtime by PCB rev */
++ .lis302dl_bitbang = gta02_lis302dl_bitbang,
++ .lis302dl_bitbang_reg_read = gta02_lis302dl_bitbang_read_reg,
++ .lis302dl_bitbang_reg_write = gta02_lis302dl_bitbang_write_reg,
++ .lis302dl_suspend_io = gta02_lis302dl_suspend_io,
++};
++
++struct lis302dl_platform_data lis302_pdata_bottom = {
++ .name = "lis302-2 (bottom)",
++ .pin_chip_select= S3C2410_GPD13,
++ .pin_clk = S3C2410_GPG7,
++ .pin_mosi = S3C2410_GPG6,
++ .pin_miso = S3C2410_GPG5,
++ .interrupt = GTA02_IRQ_GSENSOR_2,
++ .open_drain = 1, /* altered at runtime by PCB rev */
++ .lis302dl_bitbang = gta02_lis302dl_bitbang,
++ .lis302dl_bitbang_reg_read = gta02_lis302dl_bitbang_read_reg,
++ .lis302dl_bitbang_reg_write = gta02_lis302dl_bitbang_write_reg,
++ .lis302dl_suspend_io = gta02_lis302dl_suspend_io,
++};
++
++
++static struct platform_device s3c_device_spi_acc1 = {
++ .name = "lis302dl",
++ .id = 1,
++ .dev = {
++ .platform_data = &lis302_pdata_top,
++ },
++};
++
++static struct platform_device s3c_device_spi_acc2 = {
++ .name = "lis302dl",
++ .id = 2,
++ .dev = {
++ .platform_data = &lis302_pdata_bottom,
++ },
++};
++
++static struct resource gta02_led_resources[] = {
++ {
++ .name = "gta02-power:orange",
++ .start = GTA02_GPIO_PWR_LED1,
++ .end = GTA02_GPIO_PWR_LED1,
++ }, {
++ .name = "gta02-power:blue",
++ .start = GTA02_GPIO_PWR_LED2,
++ .end = GTA02_GPIO_PWR_LED2,
++ }, {
++ .name = "gta02-aux:red",
++ .start = GTA02_GPIO_AUX_LED,
++ .end = GTA02_GPIO_AUX_LED,
++ },
++};
++
++struct platform_device gta02_led_dev = {
++ .name = "gta02-led",
++ .num_resources = ARRAY_SIZE(gta02_led_resources),
++ .resource = gta02_led_resources,
++};
++
++static struct resource gta02_button_resources[] = {
++ [0] = {
++ .start = GTA02_GPIO_AUX_KEY,
++ .end = GTA02_GPIO_AUX_KEY,
++ },
++ [1] = {
++ .start = GTA02_GPIO_HOLD_KEY,
++ .end = GTA02_GPIO_HOLD_KEY,
++ },
++ [2] = {
++ .start = GTA02_GPIO_JACK_INSERT,
++ .end = GTA02_GPIO_JACK_INSERT,
++ },
++};
++
++static struct platform_device gta02_button_dev = {
++ .name = "neo1973-button",
++ .num_resources = ARRAY_SIZE(gta02_button_resources),
++ .resource = gta02_button_resources,
++};
++
++static struct platform_device gta02_pm_gsm_dev = {
++ .name = "neo1973-pm-gsm",
++};
++
++static struct platform_device gta02_pm_usbhost_dev = {
++ .name = "neo1973-pm-host",
++};
++
++
++/* USB */
++static struct s3c2410_hcd_info gta02_usb_info = {
++ .port[0] = {
++ .flags = S3C_HCDFLG_USED,
++ },
++ .port[1] = {
++ .flags = 0,
++ },
++};
++
++static int glamo_irq_is_wired(void)
++{
++ int rc;
++ int count = 0;
++
++ /*
++ * GTA02 S-Media IRQs prior to A5 are broken due to a lack of
++ * a pullup on the INT# line. Check for the bad behaviour.
++ */
++ s3c2410_gpio_setpin(S3C2410_GPG4, 0);
++ s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_OUTP);
++ s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_INP);
++ /*
++ * we force it low ourselves for a moment and resume being input.
++ * If there is a pullup, it won't stay low for long. But if the
++ * level converter is there as on < A5 revision, the weak keeper
++ * on the input of the LC will hold the line low indefinitiely
++ */
++ do
++ rc = s3c2410_gpio_getpin(S3C2410_GPG4);
++ while ((!rc) && ((count++) < 10));
++ if (rc) { /* it got pulled back up, it's good */
++ printk(KERN_INFO "Detected S-Media IRQ# pullup, "
++ "enabling interrupt\n");
++ return 0;
++ } else /* Gah we can't work with this level converter */
++ printk(KERN_WARNING "** Detected bad IRQ# circuit found"
++ " on pre-A5 GTA02: S-Media interrupt disabled **\n");
++ return -ENODEV;
++}
++
++
++static void
++gta02_glamo_mmc_set_power(unsigned char power_mode, unsigned short vdd)
++{
++ int mv = 1650;
++ int timeout = 500;
++
++ printk(KERN_DEBUG "mmc_set_power(power_mode=%u, vdd=%u\n",
++ power_mode, vdd);
++
++ switch (system_rev) {
++ case GTA02v1_SYSTEM_REV:
++ case GTA02v2_SYSTEM_REV:
++ break;
++ case GTA02v3_SYSTEM_REV:
++ case GTA02v4_SYSTEM_REV:
++ case GTA02v5_SYSTEM_REV:
++ case GTA02v6_SYSTEM_REV:
++ switch (power_mode) {
++ case MMC_POWER_ON:
++ case MMC_POWER_UP:
++ /* depend on pcf50633 driver init + not suspended */
++ while (pcf50633_ready(pcf50633_global) && (timeout--))
++ msleep(5);
++
++ if (timeout < 0) {
++ printk(KERN_ERR"gta02_glamo_mmc_set_power "
++ "BAILING on timeout\n");
++ return;
++ }
++ /* select and set the voltage */
++ if (vdd > 7)
++ mv += 350 + 100 * (vdd - 8);
++ printk(KERN_INFO "SD power -> %dmV\n", mv);
++ pcf50633_voltage_set(pcf50633_global,
++ PCF50633_REGULATOR_HCLDO, mv);
++ pcf50633_onoff_set(pcf50633_global,
++ PCF50633_REGULATOR_HCLDO, 1);
++ break;
++ case MMC_POWER_OFF:
++ /* power off happens during suspend, when pcf50633 can
++ * be already gone and not coming back... just forget
++ * the action then because pcf50633 suspend already
++ * dealt with it, otherwise we spin forever
++ */
++ if (pcf50633_ready(pcf50633_global))
++ return;
++ pcf50633_onoff_set(pcf50633_global,
++ PCF50633_REGULATOR_HCLDO, 0);
++ break;
++ }
++ break;
++ }
++}
++
++
++static int gta02_glamo_mci_all_dependencies_resumed(struct platform_device *dev)
++{
++ return resume_dep_glamo_mci_pcf.called_flag;
++}
++
++/* register jbt resume action to be dependent on pcf50633 and glamo resume */
++
++static void gta02_glamo_mci_suspending(struct platform_device *dev)
++{
++ int glamo_mci_resume(struct platform_device *dev);
++
++#if defined(CONFIG_MFD_GLAMO_MCI) && defined(CONFIG_PM)
++ resume_dep_glamo_mci_pcf.callback = (void (*)(void *))glamo_mci_resume;
++ resume_dep_glamo_mci_pcf.context = (void *)dev;
++ pcf50633_register_resume_dependency(pcf50633_global,
++ &resume_dep_glamo_mci_pcf);
++#endif
++}
++
++
++
++/* Smedia Glamo 3362 */
++
++/*
++ * we crank down SD Card clock dynamically when GPS is powered
++ */
++
++static int gta02_glamo_mci_use_slow(void)
++{
++ return neo1973_pm_gps_is_on();
++}
++
++static struct glamofb_platform_data gta02_glamo_pdata = {
++ .width = 43,
++ .height = 58,
++ /* 24.5MHz --> 40.816ns */
++ .pixclock = 40816,
++ .left_margin = 8,
++ .right_margin = 16,
++ .upper_margin = 2,
++ .lower_margin = 16,
++ .hsync_len = 8,
++ .vsync_len = 2,
++ .fb_mem_size = 0x400000, /* glamo has 8 megs of SRAM. we use 4 */
++ .xres = {
++ .min = 240,
++ .max = 640,
++ .defval = 480,
++ },
++ .yres = {
++ .min = 320,
++ .max = 640,
++ .defval = 640,
++ },
++ .bpp = {
++ .min = 16,
++ .max = 16,
++ .defval = 16,
++ },
++ //.spi_info = &glamo_spi_cfg,
++ .spigpio_info = &glamo_spigpio_cfg,
++
++ /* glamo MMC function platform data */
++ .glamo_set_mci_power = gta02_glamo_mmc_set_power,
++ .glamo_mci_use_slow = gta02_glamo_mci_use_slow,
++ .glamo_irq_is_wired = glamo_irq_is_wired,
++ .mci_suspending = gta02_glamo_mci_suspending,
++ .mci_all_dependencies_resumed =
++ gta02_glamo_mci_all_dependencies_resumed,
++};
++
++static struct resource gta02_glamo_resources[] = {
++ [0] = {
++ .start = S3C2410_CS1,
++ .end = S3C2410_CS1 + 0x1000000 - 1,
++ .flags = IORESOURCE_MEM,
++ },
++ [1] = {
++ .start = GTA02_IRQ_3D,
++ .end = GTA02_IRQ_3D,
++ .flags = IORESOURCE_IRQ,
++ },
++ [2] = {
++ .start = GTA02v1_GPIO_3D_RESET,
++ .end = GTA02v1_GPIO_3D_RESET,
++ },
++};
++
++static struct platform_device gta02_glamo_dev = {
++ .name = "glamo3362",
++ .num_resources = ARRAY_SIZE(gta02_glamo_resources),
++ .resource = gta02_glamo_resources,
++ .dev = {
++ .platform_data = >a02_glamo_pdata,
++ },
++};
++
++static void mangle_glamo_res_by_system_rev(void)
++{
++ switch (system_rev) {
++ case GTA02v1_SYSTEM_REV:
++ break;
++ default:
++ gta02_glamo_resources[2].start = GTA02_GPIO_3D_RESET;
++ gta02_glamo_resources[2].end = GTA02_GPIO_3D_RESET;
++ break;
++ }
++
++ switch (system_rev) {
++ case GTA02v1_SYSTEM_REV:
++ case GTA02v2_SYSTEM_REV:
++ case GTA02v3_SYSTEM_REV:
++ /* case GTA02v4_SYSTEM_REV: - FIXME: handle this later */
++ /* The hardware is missing a pull-up resistor and thus can't
++ * support the Smedia Glamo IRQ */
++ gta02_glamo_resources[1].start = 0;
++ gta02_glamo_resources[1].end = 0;
++ break;
++ }
++}
++
++static void __init gta02_map_io(void)
++{
++ s3c24xx_init_io(gta02_iodesc, ARRAY_SIZE(gta02_iodesc));
++ s3c24xx_init_clocks(12000000);
++ s3c24xx_init_uarts(gta02_uartcfgs, ARRAY_SIZE(gta02_uartcfgs));
++}
++
++static irqreturn_t gta02_modem_irq(int irq, void *param)
++{
++ printk(KERN_DEBUG "modem wakeup interrupt\n");
++ gta_gsm_interrupts++;
++ return IRQ_HANDLED;
++}
++
++static irqreturn_t ar6000_wow_irq(int irq, void *param)
++{
++ printk(KERN_DEBUG "ar6000_wow interrupt\n");
++ return IRQ_HANDLED;
++}
++
++/*
++ * hardware_ecc=1|0
++ */
++static char hardware_ecc_str[4] __initdata = "";
++
++static int __init hardware_ecc_setup(char *str)
++{
++ if (str)
++ strlcpy(hardware_ecc_str, str, sizeof(hardware_ecc_str));
++ return 1;
++}
++
++__setup("hardware_ecc=", hardware_ecc_setup);
++
++static void __init gta02_machine_init(void)
++{
++ int rc;
++
++ /* set the panic callback to make AUX blink fast */
++ panic_blink = gta02_panic_blink;
++
++ switch (system_rev) {
++ case GTA02v6_SYSTEM_REV:
++ /* we need push-pull interrupt from motion sensors */
++ lis302_pdata_top.open_drain = 0;
++ lis302_pdata_bottom.open_drain = 0;
++ break;
++ default:
++ break;
++ }
++
++ spin_lock_init(&motion_irq_lock);
++
++ /* do not force soft ecc if we are asked to use hardware_ecc */
++ if (hardware_ecc_str[0] == '1')
++ gta02_nand_info.software_ecc = 0;
++
++ s3c_device_usb.dev.platform_data = >a02_usb_info;
++ s3c_device_nand.dev.platform_data = >a02_nand_info;
++ s3c_device_sdi.dev.platform_data = >a02_mmc_cfg;
++
++ /* Only GTA02v1 has a SD_DETECT GPIO. Since the slot is not
++ * hot-pluggable, this is not required anyway */
++ switch (system_rev) {
++ case GTA02v1_SYSTEM_REV:
++ break;
++ default:
++ gta02_mmc_cfg.gpio_detect = 0;
++ break;
++ }
++
++ /* acc sensor chip selects */
++ s3c2410_gpio_setpin(S3C2410_GPD12, 1);
++ s3c2410_gpio_cfgpin(S3C2410_GPD12, S3C2410_GPIO_OUTPUT);
++ s3c2410_gpio_setpin(S3C2410_GPD13, 1);
++ s3c2410_gpio_cfgpin(S3C2410_GPD13, S3C2410_GPIO_OUTPUT);
++
++ s3c24xx_udc_set_platdata(>a02_udc_cfg);
++ set_s3c2410ts_info(>a02_ts_cfg);
++
++ /* FIXME: hardcoded WLAN module power-up */
++ s3c2410_gpio_cfgpin(GTA02_CHIP_PWD, S3C2410_GPIO_OUTPUT);
++
++ /* Power is down */
++ s3c2410_gpio_setpin(GTA02_CHIP_PWD, 1);
++ mdelay(100);
++
++ switch (system_rev) {
++ case GTA02v1_SYSTEM_REV:
++ s3c2410_gpio_setpin(GTA02_CHIP_PWD, 0);
++ break;
++ default:
++ /* Chip is in reset state */
++ s3c2410_gpio_setpin(GTA02_GPIO_nWLAN_RESET, 0);
++ s3c2410_gpio_cfgpin(GTA02_GPIO_nWLAN_RESET, S3C2410_GPIO_OUTPUT);
++ mdelay(100);
++ /* Power is up */
++ s3c2410_gpio_setpin(GTA02_CHIP_PWD, 0);
++ mdelay(100);
++ /* Chip is out of reset */
++ s3c2410_gpio_setpin(GTA02_GPIO_nWLAN_RESET, 1);
++ break;
++ }
++ mangle_glamo_res_by_system_rev();
++ platform_device_register(>a02_glamo_dev);
++
++ platform_device_register(&s3c_device_spi_acc1);
++ platform_device_register(&s3c_device_spi_acc2);
++ platform_device_register(>a02_button_dev);
++ platform_device_register(>a02_pm_gsm_dev);
++ platform_device_register(>a02_pm_usbhost_dev);
++
++ mangle_pmu_pdata_by_system_rev();
++ platform_device_register(>a02_pmu_dev);
++ platform_device_register(>a02_vibrator_dev);
++ platform_device_register(>a02_led_dev);
++
++
++ platform_device_register(>a02_sdio_dev);
++
++ platform_add_devices(gta02_devices, ARRAY_SIZE(gta02_devices));
++
++#ifdef CONFIG_GTA02_HDQ
++ switch (system_rev) {
++ case GTA02v5_SYSTEM_REV:
++ case GTA02v6_SYSTEM_REV:
++ platform_device_register(>a02_hdq_device);
++ platform_device_register(&bq27000_battery_device);
++ break;
++ default:
++ break;
++ }
++#endif
++ s3c2410_pm_init();
++
++ /* Make sure the modem can wake us up */
++ set_irq_type(GTA02_IRQ_MODEM, IRQT_RISING);
++ rc = request_irq(GTA02_IRQ_MODEM, gta02_modem_irq, IRQF_DISABLED,
++ "modem", NULL);
++ if (rc < 0)
++ printk(KERN_ERR "GTA02: can't request GSM modem wakeup IRQ\n");
++ enable_irq_wake(GTA02_IRQ_MODEM);
++
++ /* Make sure the wifi module can wake us up*/
++ set_irq_type(GTA02_IRQ_WLAN_GPIO1, IRQT_RISING);
++ rc = request_irq(GTA02_IRQ_WLAN_GPIO1, ar6000_wow_irq, IRQF_DISABLED,
++ "ar6000", NULL);
++
++ if (rc < 0)
++ printk(KERN_ERR "GTA02: can't request ar6k wakeup IRQ\n");
++ enable_irq_wake(GTA02_IRQ_WLAN_GPIO1);
++}
++
++MACHINE_START(NEO1973_GTA02, "GTA02")
++ .phys_io = S3C2410_PA_UART,
++ .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
++ .boot_params = S3C2410_SDRAM_PA + 0x100,
++ .map_io = gta02_map_io,
++ .init_irq = s3c24xx_init_irq,
++ .init_machine = gta02_machine_init,
++ .timer = &s3c24xx_timer,
++MACHINE_END
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/mach-hxd8.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/mach-hxd8.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,381 @@
++/* linux/arch/arm/mach-s3c2440/mach-hxd8.c
++ *
++ * S3C2440 Machine Support for the FIC HXD8
++ *
++ * Copyright (c) 2007 Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++
++#include <linux/kernel.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/list.h>
++#include <linux/timer.h>
++#include <linux/init.h>
++#include <linux/workqueue.h>
++#include <linux/serial_core.h>
++#include <linux/platform_device.h>
++#include <linux/mmc/host.h>
++
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/nand.h>
++#include <linux/mtd/nand_ecc.h>
++#include <linux/mtd/partitions.h>
++
++#include <linux/pcf50606.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++
++#include <asm/hardware.h>
++#include <asm/hardware/iomd.h>
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/mach-types.h>
++
++//#include <asm/debug-ll.h>
++#include <asm/arch/regs-gpio.h>
++#include <asm/arch/regs-lcd.h>
++#include <asm/arch/idle.h>
++#include <asm/arch/fb.h>
++#include <asm/arch/mci.h>
++#include <asm/arch/ts.h>
++#include <asm/arch/spi.h>
++#include <asm/arch/spi-gpio.h>
++#include <asm/arch/usb-control.h>
++
++#include <asm/arch-s3c2440/hxd8.h>
++#include <asm/arch/gta01.h>
++
++//#include "s3c2410.h"
++//#include "s3c2440.h"
++//#include "clock.h"
++#include <asm/plat-s3c/regs-serial.h>
++#include <asm/plat-s3c/nand.h>
++#include <asm/plat-s3c24xx/devs.h>
++#include <asm/plat-s3c24xx/cpu.h>
++#include <asm/plat-s3c24xx/pm.h>
++#include <asm/plat-s3c24xx/udc.h>
++
++static struct map_desc hxd8_iodesc[] __initdata = {
++ /* ISA IO Space map (memory space selected by A24) */
++
++ {
++ .virtual = (u32)S3C24XX_VA_ISA_WORD,
++ .pfn = __phys_to_pfn(S3C2410_CS2),
++ .length = 0x10000,
++ .type = MT_DEVICE,
++ }, {
++ .virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
++ .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
++ .length = SZ_4M,
++ .type = MT_DEVICE,
++ }, {
++ .virtual = (u32)S3C24XX_VA_ISA_BYTE,
++ .pfn = __phys_to_pfn(S3C2410_CS2),
++ .length = 0x10000,
++ .type = MT_DEVICE,
++ }, {
++ .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
++ .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
++ .length = SZ_4M,
++ .type = MT_DEVICE,
++ }
++};
++
++#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
++#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
++#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
++
++static struct s3c2410_uartcfg hxd8_uartcfgs[] __initdata = {
++ [0] = {
++ .hwport = 0,
++ .flags = 0,
++ .ucon = 0x3c5,
++ .ulcon = 0x03,
++ .ufcon = 0x51,
++ },
++ [1] = {
++ .hwport = 1,
++ .flags = 0,
++ .ucon = 0x3c5,
++ .ulcon = 0x03,
++ .ufcon = 0x51,
++ },
++ [2] = {
++ .hwport = 2,
++ .flags = 0,
++ .ucon = 0x3c5,
++ .ulcon = 0x03,
++ .ufcon = 0x51,
++ }
++};
++
++static struct s3c2410_nand_set hxd8_nand_sets[] = {
++ [0] = {
++ .name = "hxd8-nand",
++ .nr_chips = 1,
++ .flags = S3C2410_NAND_BBT,
++ },
++ [1] = {
++ .name = "hxd8-nand-1",
++ .nr_chips = 1,
++ .flags = S3C2410_NAND_BBT,
++ },
++ [2] = {
++ .name = "hxd8-nand-2",
++ .nr_chips = 1,
++ .flags = S3C2410_NAND_BBT,
++ },
++};
++
++/* choose a set of timings which should suit most 512Mbit
++ * chips and beyond.
++*/
++
++static struct s3c2410_platform_nand hxd8_nand_info = {
++ .tacls = 20,
++ .twrph0 = 60,
++ .twrph1 = 20,
++ .nr_sets = ARRAY_SIZE(hxd8_nand_sets),
++ .sets = hxd8_nand_sets,
++};
++
++/* PMU configuration */
++
++static struct pcf50606_platform_data hxd8_pcf_pdata = {
++ .used_features = PCF50606_FEAT_EXTON |
++ PCF50606_FEAT_BBC |
++ PCF50606_FEAT_WDT |
++ PCF50606_FEAT_RTC |
++ PCF50606_FEAT_PWM |
++ PCF50606_FEAT_PWM_BL |
++ PCF50606_FEAT_BATVOLT,
++ .onkey_seconds_required = 5,
++ .init_brightness = 8,
++ .rails = {
++ [PCF50606_REGULATOR_D1REG] = {
++ .name = "rc_3v3",
++ .voltage = {
++ .init = 3300,
++ .max = 3300,
++ },
++ },
++ [PCF50606_REGULATOR_D2REG] = {
++ .name = "gps_3v3",
++ .voltage = {
++ .init = 3300,
++ .max = 3300,
++ },
++ },
++ [PCF50606_REGULATOR_D3REG] = {
++ .name = "io2_3v3",
++ .voltage = {
++ .init = 3300,
++ .max = 3300,
++ },
++ },
++ [PCF50606_REGULATOR_DCD] = {
++ .name = "core_1v3",
++ .voltage = {
++ .init = 1300,
++ .max = 1500,
++ },
++ },
++ [PCF50606_REGULATOR_DCDE] = {
++ .name = "io1_3v3",
++ .voltage = {
++ .init = 3300,
++ .max = 3300,
++ },
++ },
++ [PCF50606_REGULATOR_DCUD] = {
++ .name = "rf_3v3",
++ .voltage = {
++ .init = 3300,
++ .max = 3300,
++ },
++ },
++ [PCF50606_REGULATOR_IOREG] = {
++ .name = "audio_3v3",
++ .voltage = {
++ .init = 3300,
++ .max = 3300,
++ },
++ },
++ [PCF50606_REGULATOR_LPREG] = {
++ .name = "lcm_3v3",
++ .voltage = {
++ .init = 3300,
++ .max = 3300,
++ },
++ },
++ },
++};
++
++static struct resource hxd8_pmu_resources[] = {
++ [0] = {
++ .flags = IORESOURCE_IRQ,
++ .start = HXD8_IRQ_PCF50606,
++ .end = HXD8_IRQ_PCF50606,
++ },
++};
++
++static struct platform_device hxd8_pmu_dev = {
++ .name = "pcf50606",
++ .num_resources = ARRAY_SIZE(hxd8_pmu_resources),
++ .resource = hxd8_pmu_resources,
++ .dev = {
++ .platform_data = &hxd8_pcf_pdata,
++ },
++};
++
++/* LCD driver info */
++
++static struct s3c2410fb_display hxd8_displays[] __initdata = {
++ {
++ .type = S3C2410_LCDCON1_TFT,
++ .width = 480,
++ .height = 272,
++ .xres = 480,
++ .yres = 272,
++ .bpp = 16,
++
++ .pixclock = 40000, /* HCLK/4 */
++ .left_margin = 2,
++ .right_margin = 2,
++ .hsync_len = 41,
++ .upper_margin = 2,
++ .lower_margin = 2,
++ .vsync_len = 10,
++ .lcdcon5 = S3C2410_LCDCON5_FRM565 |
++ S3C2410_LCDCON5_INVVLINE |
++ S3C2410_LCDCON5_INVVFRAME,
++ },
++};
++
++static struct s3c2410fb_mach_info hxd8_lcd_cfg __initdata = {
++ .displays = hxd8_displays,
++ .num_displays = ARRAY_SIZE(hxd8_displays),
++ .default_display = 1,
++
++ .lpcsel = ((0xCE6) & ~7),
++};
++
++static struct platform_device hxd8_pm_gsm_dev = {
++ .name = "neo1973-pm-gsm",
++};
++
++static void gta01_udc_command(enum s3c2410_udc_cmd_e cmd)
++{
++ printk(KERN_DEBUG "%s(%d)\n", __func__, cmd);
++
++ switch (cmd) {
++ case S3C2410_UDC_P_ENABLE:
++ s3c2410_gpio_setpin(HXD8_GPIO_USB_PULLUP, 1);
++ break;
++ case S3C2410_UDC_P_DISABLE:
++ s3c2410_gpio_setpin(HXD8_GPIO_USB_PULLUP, 0);
++ break;
++ case S3C2410_UDC_P_RESET:
++ /* FIXME! */
++ break;
++ default:
++ break;
++ }
++}
++
++/* USB Charger */
++
++static void hxd8_udc_vbus_draw(unsigned int ma)
++{
++ if (ma >= 500) {
++ /* enable fast charge */
++ printk(KERN_DEBUG "udc: enabling fast charge\n");
++ s3c2410_gpio_setpin(HXD8_GPIO_USB_CUR_SEL, 1);
++ } else {
++ /* disable fast charge */
++ printk(KERN_DEBUG "udc: disabling fast charge\n");
++ s3c2410_gpio_setpin(HXD8_GPIO_USB_CUR_SEL, 0);
++ }
++}
++
++static struct s3c2410_udc_mach_info hxd8_udc_cfg = {
++ .vbus_draw = hxd8_udc_vbus_draw,
++};
++
++/* Touch Screen */
++static struct s3c2410_ts_mach_info hxd8_ts_cfg = {
++ .delay = 10000,
++ .presc = 49,
++ .oversampling_shift = 4,
++};
++
++static struct platform_device *hxd8_devices[] __initdata = {
++ &s3c_device_usb,
++ &s3c_device_lcd,
++ &s3c_device_wdt,
++ &s3c_device_i2c,
++ &s3c_device_iis,
++ &s3c_device_sdi,
++ &s3c_device_usbgadget,
++ &s3c_device_nand,
++ &s3c_device_ts,
++};
++
++static void __init hxd8_map_io(void)
++{
++ s3c24xx_init_io(hxd8_iodesc, ARRAY_SIZE(hxd8_iodesc));
++ s3c24xx_init_clocks(16934400);
++ s3c24xx_init_uarts(hxd8_uartcfgs, ARRAY_SIZE(hxd8_uartcfgs));
++}
++
++static void __init hxd8_machine_init(void)
++{
++ hxd8_udc_cfg.udc_command = gta01_udc_command;
++ s3c_device_nand.dev.platform_data = &hxd8_nand_info;
++
++ s3c24xx_fb_set_platdata(&hxd8_lcd_cfg);
++
++ s3c24xx_udc_set_platdata(&hxd8_udc_cfg);
++ set_s3c2410ts_info(&hxd8_ts_cfg);
++
++ //platform_device_register(>a01_button_dev);
++ platform_device_register(&hxd8_pm_gsm_dev);
++
++ platform_device_register(&hxd8_pmu_dev);
++
++ platform_add_devices(hxd8_devices, ARRAY_SIZE(hxd8_devices));
++
++ s3c2410_pm_init();
++}
++
++MACHINE_START(HXD8, "HXD8")
++ /* Maintainer: Harald Welte <laforge@openmoko.org> */
++ .phys_io = S3C2410_PA_UART,
++ .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
++ .boot_params = S3C2410_SDRAM_PA + 0x100,
++
++ .init_irq = s3c24xx_init_irq,
++ .map_io = hxd8_map_io,
++ .init_machine = hxd8_machine_init,
++ .timer = &s3c24xx_timer,
++MACHINE_END
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/mach-s3c2440/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -13,6 +13,7 @@ obj-$(CONFIG_CPU_S3C2440) += s3c2440.o d
+ obj-$(CONFIG_CPU_S3C2440) += irq.o
+ obj-$(CONFIG_CPU_S3C2440) += clock.o
+ obj-$(CONFIG_S3C2440_DMA) += dma.o
++obj-$(CONFIG_S3C2440_C_FIQ) += fiq_c_isr.o
+
+ # Machine support
+
+@@ -21,3 +22,6 @@ obj-$(CONFIG_MACH_OSIRIS) += mach-osiris
+ obj-$(CONFIG_MACH_RX3715) += mach-rx3715.o
+ obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o
+ obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o
++obj-$(CONFIG_MACH_HXD8) += mach-hxd8.o
++obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
++obj-$(CONFIG_MACH_M800) += mach-glofiish.o
+Index: linux-2.6.24.7/arch/arm/mach-s3c2440/s3c2440.c
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/mach-s3c2440/s3c2440.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/mach-s3c2440/s3c2440.c 2008-12-11 22:46:49.000000000 +0100
+@@ -46,6 +46,9 @@ int __init s3c2440_init(void)
+ s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
+ s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT;
+
++ /* make sure SD/MMC driver can distinguish 2440 from 2410 */
++ s3c_device_sdi.name = "s3c2440-sdi";
++
+ /* register our system device for everything else */
+
+ return sysdev_register(&s3c2440_sysdev);
+Index: linux-2.6.24.7/arch/arm/mach-s3c2442/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/mach-s3c2442/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/mach-s3c2442/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -6,10 +6,11 @@
+
+ config CPU_S3C2442
+ bool
+- depends on ARCH_S3C2410
++ depends on CPU_S3C2440
+ select S3C2410_CLOCK
+ select S3C2410_GPIO
+ select S3C2410_PM if PM
++ select S3C2440_DMA if S3C2410_DMA
+ select CPU_S3C244X
+ select CPU_LLSERIAL_S3C2440
+ help
+Index: linux-2.6.24.7/arch/arm/mach-s3c2442/s3c2442.c
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/mach-s3c2442/s3c2442.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/mach-s3c2442/s3c2442.c 2008-12-11 22:46:49.000000000 +0100
+@@ -21,6 +21,7 @@
+
+ #include <asm/plat-s3c24xx/s3c2442.h>
+ #include <asm/plat-s3c24xx/cpu.h>
++#include <asm/plat-s3c24xx/devs.h>
+
+ static struct sys_device s3c2442_sysdev = {
+ .cls = &s3c2442_sysclass,
+@@ -30,5 +31,8 @@ int __init s3c2442_init(void)
+ {
+ printk("S3C2442: Initialising architecture\n");
+
++ /* make sure SD/MMC driver can distinguish 2440 from 2410 */
++ s3c_device_sdi.name = "s3c2440-sdi";
++
+ return sysdev_register(&s3c2442_sysdev);
+ }
+Index: linux-2.6.24.7/arch/arm/plat-s3c/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/plat-s3c/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/plat-s3c/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -61,7 +61,7 @@ comment "Power management"
+
+ config S3C2410_PM_DEBUG
+ bool "S3C2410 PM Suspend debug"
+- depends on PLAT_S3C && PM
++ depends on PLAT_S3C && PM && DEBUG_LL
+ help
+ Say Y here if you want verbose debugging from the PM Suspend and
+ Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/cpu.c
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/cpu.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/cpu.c 2008-12-11 22:46:49.000000000 +0100
+@@ -68,6 +68,7 @@ static const char name_s3c2410[] = "S3C
+ static const char name_s3c2412[] = "S3C2412";
+ static const char name_s3c2440[] = "S3C2440";
+ static const char name_s3c2442[] = "S3C2442";
++static const char name_s3c2442b[] = "S3C2442B";
+ static const char name_s3c2443[] = "S3C2443";
+ static const char name_s3c2410a[] = "S3C2410A";
+ static const char name_s3c2440a[] = "S3C2440A";
+@@ -119,6 +120,15 @@ static struct cpu_table cpu_ids[] __init
+ .name = name_s3c2442
+ },
+ {
++ .idcode = 0x32440aab,
++ .idmask = 0xffffffff,
++ .map_io = s3c244x_map_io,
++ .init_clocks = s3c244x_init_clocks,
++ .init_uarts = s3c244x_init_uarts,
++ .init = s3c2442_init,
++ .name = name_s3c2442b
++ },
++ {
+ .idcode = 0x32412001,
+ .idmask = 0xffffffff,
+ .map_io = s3c2412_map_io,
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/devs.c
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/devs.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/devs.c 2008-12-11 22:46:49.000000000 +0100
+@@ -24,6 +24,7 @@
+ #include <asm/mach/map.h>
+ #include <asm/mach/irq.h>
+ #include <asm/arch/fb.h>
++#include <asm/arch/ts.h>
+ #include <asm/hardware.h>
+ #include <asm/io.h>
+ #include <asm/irq.h>
+@@ -207,6 +208,23 @@ struct platform_device s3c_device_nand =
+
+ EXPORT_SYMBOL(s3c_device_nand);
+
++/* Touchscreen */
++struct platform_device s3c_device_ts = {
++ .name = "s3c2410-ts",
++ .id = -1,
++};
++
++EXPORT_SYMBOL(s3c_device_ts);
++
++static struct s3c2410_ts_mach_info s3c2410ts_info;
++
++void set_s3c2410ts_info(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
++{
++ memcpy(&s3c2410ts_info,hard_s3c2410ts_info,sizeof(struct s3c2410_ts_mach_info));
++ s3c_device_ts.dev.platform_data = &s3c2410ts_info;
++}
++EXPORT_SYMBOL(set_s3c2410ts_info);
++
+ /* USB Device (Gadget)*/
+
+ static struct resource s3c_usbgadget_resource[] = {
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/gpio.c
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/gpio.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/gpio.c 2008-12-11 22:46:49.000000000 +0100
+@@ -32,6 +32,7 @@
+ #include <asm/io.h>
+
+ #include <asm/arch/regs-gpio.h>
++#include <asm/arch/regs-gpioj.h>
+
+ void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
+ {
+@@ -186,3 +187,439 @@ int s3c2410_gpio_getirq(unsigned int pin
+ }
+
+ EXPORT_SYMBOL(s3c2410_gpio_getirq);
++
++int s3c2410_irq_to_gpio(unsigned int irq)
++{
++ /* not valid interrupts */
++ if (irq > 15 + IRQ_EINT8)
++ return -1;
++
++ if (irq < IRQ_EINT4)
++ return (irq - IRQ_EINT0) + S3C2410_GPF0;
++
++ if (irq < IRQ_EINT8)
++ return (irq - IRQ_EINT4) + S3C2410_GPF4;
++
++ return (irq - IRQ_EINT8) + S3C2410_GPG0;
++}
++
++EXPORT_SYMBOL(s3c2410_irq_to_gpio);
++
++static void pretty_dump(u32 cfg, u32 state, u32 pull,
++ const char ** function_names_2,
++ const char ** function_names_3,
++ const char * prefix,
++ int count)
++{
++ int n;
++ const char *tag_type = NULL,
++ *tag_state = NULL,
++ *tag_pulldown = NULL,
++ * level0 = "0",
++ * level1 = "1";
++
++ for (n = 0; n < count; n++) {
++ switch ((cfg >> (2 * n)) & 3) {
++ case 0:
++ tag_type = "input ";
++ break;
++ case 1:
++ tag_type = "OUTPUT ";
++ break;
++ case 2:
++ if (function_names_2) {
++ if (function_names_2[n])
++ tag_type = function_names_2[n];
++ else
++ tag_type = "*** ILLEGAL CFG (2) *** ";
++ } else
++ tag_type = "(function) ";
++ break;
++ default:
++ if (function_names_3) {
++ if (function_names_3[n])
++ tag_type = function_names_3[n];
++ else
++ tag_type = "*** ILLEGAL CFG (3) *** ";
++ } else
++ tag_type = "(function) ";
++ break;
++ }
++ if ((state >> n) & 1)
++ tag_state = level1;
++ else
++ tag_state = level0;
++
++ if (((pull >> n) & 1))
++ tag_pulldown = "";
++ else
++ tag_pulldown = "(pulldown)";
++
++ printk(KERN_INFO"%s%02d: %s %s %s\n", prefix, n, tag_type,
++ tag_state, tag_pulldown);
++ }
++ printk(KERN_INFO"\n");
++}
++
++static void pretty_dump_a(u32 cfg, u32 state,
++ const char ** function_names,
++ const char * prefix,
++ int count)
++{
++ int n;
++ const char *tag_type = NULL,
++ *tag_state = NULL,
++ * level0 = "0",
++ * level1 = "1";
++
++ for (n = 0; n < count; n++) {
++ switch ((cfg >> n) & 1) {
++ case 0:
++ tag_type = "OUTPUT ";
++ break;
++ default:
++ if (function_names) {
++ if (function_names[n])
++ tag_type = function_names[n];
++ else
++ tag_type = "*** ILLEGAL CFG *** ";
++ } else
++ tag_type = "(function) ";
++ break;
++ }
++ if ((state >> n) & 1)
++ tag_state = level1;
++ else
++ tag_state = level0;
++
++ printk(KERN_INFO"%s%02d: %s %s\n", prefix, n, tag_type,
++ tag_state);
++ }
++ printk(KERN_INFO"\n");
++}
++
++static const char * funcs_a[] = {
++ "ADDR0 ",
++ "ADDR16 ",
++ "ADDR17 ",
++ "ADDR18 ",
++ "ADDR19 ",
++ "ADDR20 ",
++ "ADDR21 ",
++ "ADDR22 ",
++ "ADDR23 ",
++ "ADDR24 ",
++ "ADDR25 ",
++ "ADDR26 ",
++ "nGCS[1] ",
++ "nGCS[2] ",
++ "nGCS[3] ",
++ "nGCS[4] ",
++ "nGCS[5] ",
++ "CLE ",
++ "ALE ",
++ "nFWE ",
++ "nFRE ",
++ "nRSTOUT ",
++ "nFCE ",
++ NULL,
++ NULL
++};
++
++
++static const char * funcs_b2[] = {
++ "TOUT0 ",
++ "TOUT1 ",
++ "TOUT2 ",
++ "TOUT3 ",
++ "TCLK[0] ",
++ "nXBACK ",
++ "nXBREQ ",
++ "nXDACK1 ",
++ "nXDREQ1 ",
++ "nXDACK0 ",
++ "nXDREQ0 ",
++};
++static const char * funcs_b3[] = {
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++};
++
++static const char * funcs_c2[] = {
++ "LEND ",
++ "VCLK ",
++ "VLINE ",
++ "VFRAME ",
++ "VM ",
++ "LCD_LPCOE ",
++ "LCD_LPCREV ",
++ "LCD_LPCREVB",
++ "VD[0] ",
++ "VD[1] ",
++ "VD[2] ",
++ "VD[3] ",
++ "VD[4] ",
++ "VD[5] ",
++ "VD[6] ",
++ "VD[7] ",
++};
++static const char * funcs_c3[] = {
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ "I2SSDI ",
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++};
++
++static const char * funcs_d2[] = {
++ "VD[8] ",
++ "VD[9] ",
++ "VD[10] ",
++ "VD[11] ",
++ "VD[12] ",
++ "VD[13] ",
++ "VD[14] ",
++ "VD[15] ",
++ "VD[16] ",
++ "VD[17] ",
++ "VD[18] ",
++ "VD[19] ",
++ "VD[20] ",
++ "VD[21] ",
++ "VD[22] ",
++ "VD[23] ",
++};
++static const char * funcs_d3[] = {
++ "nSPICS1 ",
++ "SPICLK1 ",
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ "SPIMISO1 ",
++ "SPIMOSI1 ",
++ "SPICLK1 ",
++ NULL,
++ NULL,
++ NULL,
++ "nSS1 ",
++ "nSS0 ",
++};
++
++static const char * funcs_e2[] = {
++ "I2SLRCK ",
++ "I2SSCLK ",
++ "CDCLK ",
++ "I2SDI ",
++ "I2SDO ",
++ "SDCLK ",
++ "SDCMD ",
++ "SDDAT0 ",
++ "SDDAT1 ",
++ "SDDAT2 ",
++ "SDDAT3 ",
++ "SPIMISO0 ",
++ "SPIMOSI0 ",
++ "SPICLK0 ",
++ "IICSCL ",
++ "IICSDA ",
++};
++static const char * funcs_e3[] = {
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++};
++
++static const char * funcs_f2[] = {
++ "EINT[0] ",
++ "EINT[1] ",
++ "EINT[2] ",
++ "EINT[3] ",
++ "EINT[4] ",
++ "EINT[5] ",
++ "EINT[6] ",
++ "EINT[7] ",
++};
++static const char * funcs_f3[] = {
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++};
++
++
++static const char * funcs_g2[] = {
++ "EINT[8] ",
++ "EINT[9] ",
++ "EINT[10] ",
++ "EINT[11] ",
++ "EINT[12] ",
++ "EINT[13] ",
++ "EINT[14] ",
++ "EINT[15] ",
++ "EINT[16] ",
++ "EINT[17] ",
++ "EINT[18] ",
++ "EINT[19] ",
++ "EINT[20] ",
++ "EINT[21] ",
++ "EINT[22] ",
++ "EINT[23] ",
++};
++static const char * funcs_g3[] = {
++ NULL,
++ NULL,
++ "nSS0 ",
++ "nSS1 ",
++ "LCD_PWRDN ",
++ "SPIMISO1 ",
++ "SPIMOSI1 ",
++ "SPICLK1 ",
++ NULL,
++ "nRTS1 ",
++ "nCTS1 ",
++ "TCLK[1] ",
++ "nSPICS0 ",
++ NULL,
++ NULL,
++ NULL,
++};
++
++static const char * funcs_h2[] = {
++ "nCTS0 ",
++ "nRTS0 ",
++ "TXD[0] ",
++ "RXD[0] ",
++ "TXD[1] ",
++ "RXD[1] ",
++ "TXD[2] ",
++ "RXD[2] ",
++ "UEXTCLK ",
++ "CLKOUT0 ",
++ "CLKOUT1 ",
++};
++static const char * funcs_h3[] = {
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ "nRTS1 ",
++ "nCTS1 ",
++ NULL,
++ "nSPICS0 ",
++ NULL,
++};
++
++static const char * funcs_j2[] = {
++ "CAMDATA[0] ",
++ "CAMDATA[1] ",
++ "CAMDATA[2] ",
++ "CAMDATA[3] ",
++ "CAMDATA[4] ",
++ "CAMDATA[5] ",
++ "CAMDATA[6] ",
++ "CAMDATA[7] ",
++ "CAMPCLK ",
++ "CAMVSYNC ",
++ "CAMHREF ",
++ "CAMCLKOUT ",
++ "CAMRESET ",
++};
++static const char * funcs_j3[] = {
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++};
++
++/* used to dump GPIO states at suspend */
++void s3c24xx_dump_gpio_states(void)
++{
++ pretty_dump_a(__raw_readl(S3C2410_GPACON),
++ __raw_readl(S3C2410_GPADAT),
++ funcs_a, "GPA", 25);
++ pretty_dump(__raw_readl(S3C2410_GPBCON),
++ __raw_readl(S3C2410_GPBDAT),
++ __raw_readl(S3C2410_GPBUP),
++ funcs_b2, funcs_b3, "GPB", 11);
++ pretty_dump(__raw_readl(S3C2410_GPCCON),
++ __raw_readl(S3C2410_GPCDAT),
++ __raw_readl(S3C2410_GPCUP),
++ funcs_c2, funcs_c3, "GPC", 16);
++ pretty_dump(__raw_readl(S3C2410_GPDCON),
++ __raw_readl(S3C2410_GPDDAT),
++ __raw_readl(S3C2410_GPDUP),
++ funcs_d2, funcs_d3, "GPD", 16);
++ pretty_dump(__raw_readl(S3C2410_GPECON),
++ __raw_readl(S3C2410_GPEDAT),
++ __raw_readl(S3C2410_GPEUP),
++ funcs_e2, funcs_e3, "GPE", 16);
++ pretty_dump(__raw_readl(S3C2410_GPFCON),
++ __raw_readl(S3C2410_GPFDAT),
++ __raw_readl(S3C2410_GPFUP),
++ funcs_f2, funcs_f3, "GPF", 8);
++ pretty_dump(__raw_readl(S3C2410_GPGCON),
++ __raw_readl(S3C2410_GPGDAT),
++ __raw_readl(S3C2410_GPGUP),
++ funcs_g2, funcs_g3, "GPG", 16);
++ pretty_dump(__raw_readl(S3C2410_GPHCON),
++ __raw_readl(S3C2410_GPHDAT),
++ __raw_readl(S3C2410_GPHUP),
++ funcs_h2, funcs_h3, "GPH", 11);
++ pretty_dump(__raw_readl(S3C2440_GPJCON),
++ __raw_readl(S3C2440_GPJDAT),
++ __raw_readl(S3C2440_GPJUP),
++ funcs_j2, funcs_j3, "GPJ", 13);
++
++}
++EXPORT_SYMBOL(s3c24xx_dump_gpio_states);
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/irq.c
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/irq.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/irq.c 2008-12-11 22:46:49.000000000 +0100
+@@ -133,12 +133,20 @@ static void
+ s3c_irq_mask(unsigned int irqno)
+ {
+ unsigned long mask;
+-
++#ifdef CONFIG_S3C2440_C_FIQ
++ unsigned long flags;
++#endif
+ irqno -= IRQ_EINT0;
+-
++#ifdef CONFIG_S3C2440_C_FIQ
++ local_save_flags(flags);
++ local_fiq_disable();
++#endif
+ mask = __raw_readl(S3C2410_INTMSK);
+ mask |= 1UL << irqno;
+ __raw_writel(mask, S3C2410_INTMSK);
++#ifdef CONFIG_S3C2440_C_FIQ
++ local_irq_restore(flags);
++#endif
+ }
+
+ static inline void
+@@ -155,9 +163,19 @@ s3c_irq_maskack(unsigned int irqno)
+ {
+ unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
+ unsigned long mask;
++#ifdef CONFIG_S3C2440_C_FIQ
++ unsigned long flags;
++#endif
+
++#ifdef CONFIG_S3C2440_C_FIQ
++ local_save_flags(flags);
++ local_fiq_disable();
++#endif
+ mask = __raw_readl(S3C2410_INTMSK);
+ __raw_writel(mask|bitval, S3C2410_INTMSK);
++#ifdef CONFIG_S3C2440_C_FIQ
++ local_irq_restore(flags);
++#endif
+
+ __raw_writel(bitval, S3C2410_SRCPND);
+ __raw_writel(bitval, S3C2410_INTPND);
+@@ -168,15 +186,25 @@ static void
+ s3c_irq_unmask(unsigned int irqno)
+ {
+ unsigned long mask;
++#ifdef CONFIG_S3C2440_C_FIQ
++ unsigned long flags;
++#endif
+
+ if (irqno != IRQ_TIMER4 && irqno != IRQ_EINT8t23)
+ irqdbf2("s3c_irq_unmask %d\n", irqno);
+
+ irqno -= IRQ_EINT0;
+
++#ifdef CONFIG_S3C2440_C_FIQ
++ local_save_flags(flags);
++ local_fiq_disable();
++#endif
+ mask = __raw_readl(S3C2410_INTMSK);
+ mask &= ~(1UL << irqno);
+ __raw_writel(mask, S3C2410_INTMSK);
++#ifdef CONFIG_S3C2440_C_FIQ
++ local_irq_restore(flags);
++#endif
+ }
+
+ struct irq_chip s3c_irq_level_chip = {
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -16,7 +16,7 @@ if PLAT_S3C24XX
+
+ config CPU_S3C244X
+ bool
+- depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
++ default y if CPU_S3C2440 || CPU_S3C2442
+ help
+ Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
+
+@@ -46,4 +46,9 @@ config MACH_SMDK
+ help
+ Common machine code for SMDK2410 and SMDK2440
+
++config MACH_NEO1973
++ bool
++ help
++ Common machine code for Neo1973 hardware
++
+ endif
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -28,3 +28,11 @@ obj-$(CONFIG_PM) += pm.o
+ obj-$(CONFIG_PM) += sleep.o
+ obj-$(CONFIG_S3C2410_DMA) += dma.o
+ obj-$(CONFIG_MACH_SMDK) += common-smdk.o
++obj-$(CONFIG_MACH_NEO1973) += neo1973_version.o \
++ neo1973_pm_host.o \
++ neo1973_pm_gsm.o \
++ neo1973_pm_gps.o \
++ neo1973_pm_bt.o \
++ neo1973_shadow.o \
++ neo1973_pm_resume_reason.o \
++ neo1973_memconfig.o
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_memconfig.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_memconfig.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,186 @@
++/*
++ * Memory access timing control sysfs for the s3c24xx based device
++ *
++ * (C) 2008 by Openmoko Inc.
++ * Author: Andy Green <andy@openmoko.com>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++
++#include <asm/hardware.h>
++#include <asm/mach-types.h>
++#include <asm/arch/regs-mem.h>
++
++static ssize_t neo1973_memconfig_read(struct device *dev,
++ struct device_attribute *attr, char *buf)
++{
++ int index = attr->attr.name[strlen(attr->attr.name) - 1] - '0';
++ u32 reg = *((u32 *)(S3C2410_MEMREG(((index + 1) << 2))));
++ static const char *meaning[][8] = {
++ {
++ [0] = "normal (1 data)",
++ [1] = "4 data",
++ [2] = "8 data",
++ [3] = "16 data",
++ }, {
++ [0] = "2 clocks",
++ [1] = "3 clocks",
++ [2] = "4 clocks",
++ [3] = "6 clocks",
++ }, {
++ [0] = "0 clocks",
++ [1] = "1 clock",
++ [2] = "2 clocks",
++ [3] = "4 clocks",
++ }, {
++ [0] = "1 clock",
++ [1] = "2 clocks",
++ [2] = "3 clocks",
++ [3] = "4 clocks",
++ [4] = "6 clocks",
++ [5] = "8 clocks",
++ [6] = "10 clocks",
++ [7] = "14 clocks",
++ }, { /* after this, only for CS6 and CS7 */
++ [0] = "ROM / SRAM",
++ [1] = "(illegal)",
++ [2] = "(illegal)",
++ [3] = "Sync DRAM",
++ }, {
++ [0] = "8 Column bits",
++ [1] = "9 Column bits",
++ [2] = "10 Column bits",
++ [3] = "(illegal)",
++ }, {
++ [0] = "2 clocks",
++ [1] = "3 clocks",
++ [2] = "4 clocks",
++ [3] = "(illegal)",
++ }
++ };
++
++ if (index >= 6)
++ if (((reg >> 15) & 3) == 3) /* DRAM */
++ return sprintf(buf, "BANKCON%d = 0x%08X\n DRAM:\n"
++ " Trcd = %s\n SCAN = %s\n", index,
++ reg, meaning[5][reg & 3],
++ meaning[1][(reg >> 2) & 3]);
++
++ return sprintf(buf, "BANKCON%d = 0x%08X\n Type = %s\n PMC = %s\n"
++ " Tacp = %s\n Tcah = %s\n Tcoh = %s\n Tacc = %s\n"
++ " Tcos = %s\n Tacs = %s\n",
++ index, reg, meaning[4][(reg >> 15) & 3],
++ meaning[0][reg & 3],
++ meaning[1][(reg >> 2) & 3],
++ meaning[2][(reg >> 4) & 3],
++ meaning[2][(reg >> 6) & 3],
++ meaning[3][(reg >> 8) & 7],
++ meaning[2][(reg >> 11) & 3],
++ meaning[2][(reg >> 13) & 3]);
++}
++
++static ssize_t neo1973_memconfig_write(struct device *dev,
++ struct device_attribute *attr, const char *buf, size_t count)
++{
++ int index = attr->attr.name[strlen(attr->attr.name) - 1] - '0';
++ unsigned long val = simple_strtoul(buf, NULL, 16);
++
++ dev_info(dev, "setting BANKCON%d <- 0x%08X\n", index, (u32)val);
++
++ *((u32 *)(S3C2410_MEMREG(((index + 1) << 2)))) = (u32)val;
++
++ return count;
++}
++
++
++static DEVICE_ATTR(BANKCON0, 0644, neo1973_memconfig_read,
++ neo1973_memconfig_write);
++static DEVICE_ATTR(BANKCON1, 0644, neo1973_memconfig_read,
++ neo1973_memconfig_write);
++static DEVICE_ATTR(BANKCON2, 0644, neo1973_memconfig_read,
++ neo1973_memconfig_write);
++static DEVICE_ATTR(BANKCON3, 0644, neo1973_memconfig_read,
++ neo1973_memconfig_write);
++static DEVICE_ATTR(BANKCON4, 0644, neo1973_memconfig_read,
++ neo1973_memconfig_write);
++static DEVICE_ATTR(BANKCON5, 0644, neo1973_memconfig_read,
++ neo1973_memconfig_write);
++static DEVICE_ATTR(BANKCON6, 0644, neo1973_memconfig_read,
++ neo1973_memconfig_write);
++static DEVICE_ATTR(BANKCON7, 0644, neo1973_memconfig_read,
++ neo1973_memconfig_write);
++
++static struct attribute *neo1973_memconfig_sysfs_entries[] = {
++ &dev_attr_BANKCON0.attr,
++ &dev_attr_BANKCON1.attr,
++ &dev_attr_BANKCON2.attr,
++ &dev_attr_BANKCON3.attr,
++ &dev_attr_BANKCON4.attr,
++ &dev_attr_BANKCON5.attr,
++ &dev_attr_BANKCON6.attr,
++ &dev_attr_BANKCON7.attr,
++ NULL
++};
++
++static struct attribute_group neo1973_memconfig_attr_group = {
++ .name = NULL,
++ .attrs = neo1973_memconfig_sysfs_entries,
++};
++
++static int __init neo1973_memconfig_probe(struct platform_device *pdev)
++{
++ dev_info(&pdev->dev, "starting\n");
++
++ switch (machine_arch_type) {
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ case MACH_TYPE_NEO1973_GTA01:
++ return -EINVAL;
++#endif /* CONFIG_MACH_NEO1973_GTA01 */
++ default:
++ break;
++ }
++
++ return sysfs_create_group(&pdev->dev.kobj,
++ &neo1973_memconfig_attr_group);
++}
++
++static int neo1973_memconfig_remove(struct platform_device *pdev)
++{
++ sysfs_remove_group(&pdev->dev.kobj, &neo1973_memconfig_attr_group);
++ return 0;
++}
++
++static struct platform_driver neo1973_memconfig_driver = {
++ .probe = neo1973_memconfig_probe,
++ .remove = neo1973_memconfig_remove,
++ .driver = {
++ .name = "neo1973-memconfig",
++ },
++};
++
++static int __devinit neo1973_memconfig_init(void)
++{
++ return platform_driver_register(&neo1973_memconfig_driver);
++}
++
++static void neo1973_memconfig_exit(void)
++{
++ platform_driver_unregister(&neo1973_memconfig_driver);
++}
++
++module_init(neo1973_memconfig_init);
++module_exit(neo1973_memconfig_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
++MODULE_DESCRIPTION("neo1973 memconfig");
++
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_bt.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_bt.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,265 @@
++/*
++ * Bluetooth PM code for the FIC Neo1973 GSM Phone
++ *
++ * (C) 2007 by Openmoko Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++
++#include <asm/hardware.h>
++#include <asm/mach-types.h>
++#include <asm/plat-s3c24xx/neo1973.h>
++
++#ifdef CONFIG_MACH_NEO1973_GTA01
++#include <asm/arch/gta01.h>
++#include <linux/pcf50606.h>
++#endif
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++#include <asm/arch/gta02.h>
++#include <linux/pcf50633.h>
++#endif
++
++#ifdef CONFIG_MACH_M800
++#include <asm/arch/glofiish.h>
++#endif
++
++#define DRVMSG "FIC Neo1973 Bluetooth Power Management"
++
++static ssize_t bt_read(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ if (!strcmp(attr->attr.name, "power_on")) {
++ switch (machine_arch_type) {
++
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ case MACH_TYPE_NEO1973_GTA01:
++ if (pcf50606_onoff_get(pcf50606_global,
++ PCF50606_REGULATOR_D1REG) &&
++ pcf50606_voltage_get(pcf50606_global,
++ PCF50606_REGULATOR_D1REG) == 3100)
++ goto out_1;
++ break;
++#endif /* CONFIG_MACH_NEO1973_GTA01 */
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ case MACH_TYPE_NEO1973_GTA02:
++ if (s3c2410_gpio_getpin(GTA02_GPIO_BT_EN))
++ goto out_1;
++ break;
++#endif /* CONFIG_MACH_NEO1973_GTA02 */
++
++#ifdef CONFIG_MACH_M800
++ case MACH_TYPE_M800:
++ if (s3c2410_gpio_getpin(M800_GPIO_BT_POWER_1) &&
++ s3c2410_gpio_getpin(M800_GPIO_BT_POWER_2))
++ goto out_1;
++ break;
++#endif /* CONFIG_MACH_M800 */
++
++ }
++ } else if (!strcmp(attr->attr.name, "reset")) {
++ switch (machine_arch_type) {
++
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ case MACH_TYPE_NEO1973_GTA01:
++ if (s3c2410_gpio_getpin(GTA01_GPIO_BT_EN) == 0)
++ goto out_1;
++ break;
++#endif /* CONFIG_MACH_NEO1973_GTA01 */
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ case MACH_TYPE_NEO1973_GTA02:
++ if (s3c2410_gpio_getpin(GTA02_GPIO_BT_EN) == 0)
++ goto out_1;
++ break;
++#endif /* CONFIG_MACH_NEO1973_GTA02 */
++
++ }
++ }
++
++ return strlcpy(buf, "0\n", 3);
++out_1:
++ return strlcpy(buf, "1\n", 3);
++}
++
++static ssize_t bt_write(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ unsigned long on = simple_strtoul(buf, NULL, 10);
++ unsigned int vol;
++
++ if (!strcmp(attr->attr.name, "power_on")) {
++ switch (machine_arch_type) {
++
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ case MACH_TYPE_NEO1973_GTA01:
++ /* if we are powering up, assert reset, then power,
++ * then release reset */
++ if (on) {
++ neo1973_gpb_setpin(GTA01_GPIO_BT_EN, 0);
++ pcf50606_voltage_set(pcf50606_global,
++ PCF50606_REGULATOR_D1REG,
++ 3100);
++ }
++ pcf50606_onoff_set(pcf50606_global,
++ PCF50606_REGULATOR_D1REG, on);
++ neo1973_gpb_setpin(GTA01_GPIO_BT_EN, on);
++ break;
++#endif /* CONFIG_MACH_NEO1973_GTA01 */
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ case MACH_TYPE_NEO1973_GTA02:
++ neo1973_gpb_setpin(GTA02_GPIO_BT_EN, on ? 0 : 1);
++ if (on)
++ pcf50633_voltage_set(pcf50633_global,
++ PCF50633_REGULATOR_LDO4, 3200);
++ pcf50633_onoff_set(pcf50633_global,
++ PCF50633_REGULATOR_LDO4, on);
++ vol = pcf50633_voltage_get(pcf50633_global,
++ PCF50633_REGULATOR_LDO4);
++ dev_info(dev, "GTA02 Set PCF50633 LDO4 = %d\n", vol);
++ break;
++#endif /* CONFIG_MACH_NEO1973_GTA02 */
++
++#ifdef CONFIG_MACH_M800
++ case MACH_TYPE_M800:
++ s3c2410_gpio_setpin(M800_GPIO_BT_POWER_1, on);
++ s3c2410_gpio_setpin(M800_GPIO_BT_POWER_2, on);
++ break;
++#endif /* CONFIG_MACH_M800 */
++ }
++ } else if (!strcmp(attr->attr.name, "reset")) {
++ /* reset is low-active, so we need to invert */
++ switch (machine_arch_type) {
++
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ case MACH_TYPE_NEO1973_GTA01:
++ neo1973_gpb_setpin(GTA01_GPIO_BT_EN, on ? 0 : 1);
++ break;
++#endif /* CONFIG_MACH_NEO1973_GTA01 */
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ case MACH_TYPE_NEO1973_GTA02:
++ neo1973_gpb_setpin(GTA02_GPIO_BT_EN, on ? 0 : 1);
++ break;
++#endif /* CONFIG_MACH_NEO1973_GTA02 */
++
++ }
++ }
++
++ return count;
++}
++
++static DEVICE_ATTR(power_on, 0644, bt_read, bt_write);
++static DEVICE_ATTR(reset, 0644, bt_read, bt_write);
++
++#ifdef CONFIG_PM
++static int gta01_bt_suspend(struct platform_device *pdev, pm_message_t state)
++{
++ dev_dbg(&pdev->dev, DRVMSG ": suspending\n");
++ /* FIXME: The PMU should save the PMU status, and the GPIO code should
++ * preserve the GPIO level, so there shouldn't be anything left to do
++ * for us, should there? */
++
++ return 0;
++}
++
++static int gta01_bt_resume(struct platform_device *pdev)
++{
++ dev_dbg(&pdev->dev, DRVMSG ": resuming\n");
++
++ return 0;
++}
++#else
++#define gta01_bt_suspend NULL
++#define gta01_bt_resume NULL
++#endif
++
++static struct attribute *gta01_bt_sysfs_entries[] = {
++ &dev_attr_power_on.attr,
++ &dev_attr_reset.attr,
++ NULL
++};
++
++static struct attribute_group gta01_bt_attr_group = {
++ .name = NULL,
++ .attrs = gta01_bt_sysfs_entries,
++};
++
++static int __init gta01_bt_probe(struct platform_device *pdev)
++{
++ dev_info(&pdev->dev, DRVMSG ": starting\n");
++
++ switch (machine_arch_type) {
++
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ case MACH_TYPE_NEO1973_GTA01:
++ /* we make sure that the voltage is off */
++ pcf50606_onoff_set(pcf50606_global,
++ PCF50606_REGULATOR_D1REG, 0);
++ /* we pull reset to low to make sure that the chip doesn't
++ * drain power through the reset line */
++ neo1973_gpb_setpin(GTA01_GPIO_BT_EN, 0);
++ break;
++#endif /* CONFIG_MACH_NEO1973_GTA01 */
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ case MACH_TYPE_NEO1973_GTA02:
++ /* we make sure that the voltage is off */
++ pcf50633_onoff_set(pcf50633_global,
++ PCF50633_REGULATOR_LDO4, 0);
++ /* we pull reset to low to make sure that the chip doesn't
++ * drain power through the reset line */
++ neo1973_gpb_setpin(GTA02_GPIO_BT_EN, 0);
++ break;
++#endif /* CONFIG_MACH_NEO1973_GTA02 */
++
++ }
++
++ return sysfs_create_group(&pdev->dev.kobj, >a01_bt_attr_group);
++}
++
++static int gta01_bt_remove(struct platform_device *pdev)
++{
++ sysfs_remove_group(&pdev->dev.kobj, >a01_bt_attr_group);
++
++ return 0;
++}
++
++static struct platform_driver gta01_bt_driver = {
++ .probe = gta01_bt_probe,
++ .remove = gta01_bt_remove,
++ .suspend = gta01_bt_suspend,
++ .resume = gta01_bt_resume,
++ .driver = {
++ .name = "neo1973-pm-bt",
++ },
++};
++
++static int __devinit gta01_bt_init(void)
++{
++ return platform_driver_register(>a01_bt_driver);
++}
++
++static void gta01_bt_exit(void)
++{
++ platform_driver_unregister(>a01_bt_driver);
++}
++
++module_init(gta01_bt_init);
++module_exit(gta01_bt_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
++MODULE_DESCRIPTION(DRVMSG);
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_gps.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_gps.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,689 @@
++/*
++ * GPS Power Management code for the FIC Neo1973 GSM Phone
++ *
++ * (C) 2007 by Openmoko Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/delay.h>
++#include <linux/platform_device.h>
++
++#include <asm/hardware.h>
++
++#include <asm/mach-types.h>
++
++#include <asm/plat-s3c24xx/neo1973.h>
++
++#ifdef CONFIG_MACH_NEO1973_GTA01
++#include <asm/arch/gta01.h>
++#include <linux/pcf50606.h>
++#endif
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++#include <asm/arch/gta02.h>
++#include <linux/pcf50633.h>
++#endif
++
++struct neo1973_pm_gps_data {
++ int power_was_on;
++};
++
++static struct neo1973_pm_gps_data neo1973_gps;
++
++int neo1973_pm_gps_is_on(void)
++{
++ return neo1973_gps.power_was_on;
++}
++EXPORT_SYMBOL_GPL(neo1973_pm_gps_is_on);
++
++/* This is the 2.8V supply for the RTC crystal, the mail clock crystal and
++ * the input to VDD_RF */
++static void gps_power_2v8_set(int on)
++{
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ case GTA01v4_SYSTEM_REV:
++ if (on)
++ pcf50606_voltage_set(pcf50606_global,
++ PCF50606_REGULATOR_IOREG, 2800);
++ pcf50606_onoff_set(pcf50606_global,
++ PCF50606_REGULATOR_IOREG, on);
++ break;
++ case GTA01Bv2_SYSTEM_REV:
++ s3c2410_gpio_setpin(GTA01_GPIO_GPS_EN_2V8, on);
++ break;
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ break;
++ }
++}
++
++static int gps_power_2v8_get(void)
++{
++ int ret = 0;
++
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ case GTA01v4_SYSTEM_REV:
++ if (pcf50606_onoff_get(pcf50606_global,
++ PCF50606_REGULATOR_IOREG) &&
++ pcf50606_voltage_get(pcf50606_global,
++ PCF50606_REGULATOR_IOREG) == 2800)
++ ret = 1;
++ break;
++ case GTA01Bv2_SYSTEM_REV:
++ if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_EN_2V8))
++ ret = 1;
++ break;
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ break;
++ }
++
++ return ret;
++}
++
++/* This is the 3V supply (AVDD) for the external RF frontend (LNA bias) */
++static void gps_power_3v_set(int on)
++{
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ case GTA01v4_SYSTEM_REV:
++ if (on)
++ pcf50606_voltage_set(pcf50606_global,
++ PCF50606_REGULATOR_D1REG, 3000);
++ pcf50606_onoff_set(pcf50606_global,
++ PCF50606_REGULATOR_D1REG, on);
++ break;
++ case GTA01Bv2_SYSTEM_REV:
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ s3c2410_gpio_setpin(GTA01_GPIO_GPS_EN_3V, on);
++ break;
++ }
++}
++
++static int gps_power_3v_get(void)
++{
++ int ret = 0;
++
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ case GTA01v4_SYSTEM_REV:
++ if (pcf50606_onoff_get(pcf50606_global,
++ PCF50606_REGULATOR_D1REG) &&
++ pcf50606_voltage_get(pcf50606_global,
++ PCF50606_REGULATOR_D1REG) == 3000)
++ ret = 1;
++ break;
++ case GTA01Bv2_SYSTEM_REV:
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_EN_3V))
++ ret = 1;
++ break;
++ }
++
++ return ret;
++}
++
++/* This is the 3.3V supply for VDD_IO and VDD_LPREG input */
++static void gps_power_3v3_set(int on)
++{
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ case GTA01v4_SYSTEM_REV:
++ case GTA01Bv2_SYSTEM_REV:
++ if (on)
++ pcf50606_voltage_set(pcf50606_global,
++ PCF50606_REGULATOR_DCD, 3300);
++ pcf50606_onoff_set(pcf50606_global,
++ PCF50606_REGULATOR_DCD, on);
++ break;
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ s3c2410_gpio_setpin(GTA01_GPIO_GPS_EN_3V3, on);
++ break;
++ }
++}
++
++static int gps_power_3v3_get(void)
++{
++ int ret = 0;
++
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ case GTA01v4_SYSTEM_REV:
++ case GTA01Bv2_SYSTEM_REV:
++ if (pcf50606_onoff_get(pcf50606_global,
++ PCF50606_REGULATOR_DCD) &&
++ pcf50606_voltage_get(pcf50606_global,
++ PCF50606_REGULATOR_DCD) == 3300)
++ ret = 1;
++ break;
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_EN_3V3))
++ ret = 1;
++ break;
++ }
++
++ return ret;
++}
++
++/* This is the 2.5V supply for VDD_PLLREG and VDD_COREREG input */
++static void gps_power_2v5_set(int on)
++{
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ /* This is CORE_1V8 and cannot be disabled */
++ break;
++ case GTA01v4_SYSTEM_REV:
++ case GTA01Bv2_SYSTEM_REV:
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ if (on)
++ pcf50606_voltage_set(pcf50606_global,
++ PCF50606_REGULATOR_D2REG, 2500);
++ pcf50606_onoff_set(pcf50606_global,
++ PCF50606_REGULATOR_D2REG, on);
++ break;
++ }
++}
++
++static int gps_power_2v5_get(void)
++{
++ int ret = 0;
++
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ /* This is CORE_1V8 and cannot be disabled */
++ ret = 1;
++ break;
++ case GTA01v4_SYSTEM_REV:
++ case GTA01Bv2_SYSTEM_REV:
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ if (pcf50606_onoff_get(pcf50606_global,
++ PCF50606_REGULATOR_D2REG) &&
++ pcf50606_voltage_get(pcf50606_global,
++ PCF50606_REGULATOR_D2REG) == 2500)
++ ret = 1;
++ break;
++ }
++
++ return ret;
++}
++
++/* This is the 1.5V supply for VDD_CORE */
++static void gps_power_1v5_set(int on)
++{
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ case GTA01v4_SYSTEM_REV:
++ case GTA01Bv2_SYSTEM_REV:
++ /* This is switched via 2v5 */
++ break;
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ if (on)
++ pcf50606_voltage_set(pcf50606_global,
++ PCF50606_REGULATOR_DCD, 1500);
++ pcf50606_onoff_set(pcf50606_global,
++ PCF50606_REGULATOR_DCD, on);
++ break;
++ }
++}
++
++static int gps_power_1v5_get(void)
++{
++ int ret = 0;
++
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ case GTA01v4_SYSTEM_REV:
++ case GTA01Bv2_SYSTEM_REV:
++ /* This is switched via 2v5 */
++ ret = 1;
++ break;
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ if (pcf50606_onoff_get(pcf50606_global,
++ PCF50606_REGULATOR_DCD) &&
++ pcf50606_voltage_get(pcf50606_global,
++ PCF50606_REGULATOR_DCD) == 1500)
++ ret = 1;
++ break;
++ }
++
++ return ret;
++}
++
++/* This is the POWERON pin */
++static void gps_pwron_set(int on)
++{
++
++ neo1973_gps.power_was_on = !!on;
++
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ if (machine_is_neo1973_gta01())
++ neo1973_gpb_setpin(GTA01_GPIO_GPS_PWRON, on);
++#endif /* CONFIG_MACH_NEO1973_GTA01 */
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ if (machine_is_neo1973_gta02()) {
++ if (on) {
++ pcf50633_voltage_set(pcf50633_global,
++ PCF50633_REGULATOR_LDO5, 3000);
++ /* return UART pins to being UART pins */
++ s3c2410_gpio_cfgpin(S3C2410_GPH4, S3C2410_GPH4_TXD1);
++ /* remove pulldown now it won't be floating any more */
++ s3c2410_gpio_pullup(S3C2410_GPH5, 0);
++ } else {
++ /*
++ * take care not to power unpowered GPS from UART TX
++ * return them to GPIO and force low
++ */
++ s3c2410_gpio_cfgpin(S3C2410_GPH4, S3C2410_GPH4_OUTP);
++ s3c2410_gpio_setpin(S3C2410_GPH4, 0);
++ /* don't let RX from unpowered GPS float */
++ s3c2410_gpio_pullup(S3C2410_GPH5, 1);
++ }
++ pcf50633_onoff_set(pcf50633_global,
++ PCF50633_REGULATOR_LDO5, on);
++ }
++#endif /* CONFIG_MACH_NEO1973_GTA02 */
++}
++
++static int gps_pwron_get(void)
++{
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ if (machine_is_neo1973_gta01())
++ return !!s3c2410_gpio_getpin(GTA01_GPIO_GPS_PWRON);
++#endif /* CONFIG_MACH_NEO1973_GTA01 */
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ if (machine_is_neo1973_gta02())
++ return !!pcf50633_onoff_get(pcf50633_global,
++ PCF50633_REGULATOR_LDO5);
++#endif /* CONFIG_MACH_NEO1973_GTA02 */
++ return -1;
++}
++
++/* This is the nRESET pin */
++static void gps_rst_set(int on)
++{
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ pcf50606_gpo0_set(pcf50606_global, on);
++ break;
++ case GTA01v4_SYSTEM_REV:
++ case GTA01Bv2_SYSTEM_REV:
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ s3c2410_gpio_setpin(GTA01_GPIO_GPS_RESET, on);
++ break;
++ }
++}
++
++static int gps_rst_get(void)
++{
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ if (pcf50606_gpo0_get(pcf50606_global))
++ return 1;
++ break;
++ case GTA01v4_SYSTEM_REV:
++ case GTA01Bv2_SYSTEM_REV:
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_RESET))
++ return 1;
++ break;
++ }
++
++ return 0;
++}
++
++static ssize_t power_gps_read(struct device *dev,
++ struct device_attribute *attr, char *buf)
++{
++ int ret = 0;
++
++ if (!strcmp(attr->attr.name, "power_tcxo_2v8")) {
++ ret = gps_power_2v8_get();
++ } else if (!strcmp(attr->attr.name, "power_avdd_3v")) {
++ ret = gps_power_3v_get();
++ } else if (!strcmp(attr->attr.name, "pwron")) {
++ ret = gps_pwron_get();
++ } else if (!strcmp(attr->attr.name, "reset")) {
++ ret = gps_rst_get();
++ } else if (!strcmp(attr->attr.name, "power_lp_io_3v3")) {
++ ret = gps_power_3v3_get();
++ } else if (!strcmp(attr->attr.name, "power_pll_core_2v5")) {
++ ret = gps_power_2v5_get();
++ } else if (!strcmp(attr->attr.name, "power_core_1v5") ||
++ !strcmp(attr->attr.name, "power_vdd_core_1v5")) {
++ ret = gps_power_1v5_get();
++ }
++
++ if (ret)
++ return strlcpy(buf, "1\n", 3);
++ else
++ return strlcpy(buf, "0\n", 3);
++}
++
++static ssize_t power_gps_write(struct device *dev,
++ struct device_attribute *attr, const char *buf,
++ size_t count)
++{
++ unsigned long on = simple_strtoul(buf, NULL, 10);
++
++ if (!strcmp(attr->attr.name, "power_tcxo_2v8")) {
++ gps_power_2v8_set(on);
++ } else if (!strcmp(attr->attr.name, "power_avdd_3v")) {
++ gps_power_3v_set(on);
++ } else if (!strcmp(attr->attr.name, "pwron")) {
++ gps_pwron_set(on);
++ } else if (!strcmp(attr->attr.name, "reset")) {
++ gps_rst_set(on);
++ } else if (!strcmp(attr->attr.name, "power_lp_io_3v3")) {
++ gps_power_3v3_set(on);
++ } else if (!strcmp(attr->attr.name, "power_pll_core_2v5")) {
++ gps_power_2v5_set(on);
++ } else if (!strcmp(attr->attr.name, "power_core_1v5") ||
++ !strcmp(attr->attr.name, "power_vdd_core_1v5")) {
++ gps_power_1v5_set(on);
++ }
++
++ return count;
++}
++
++static void gps_power_sequence_up(void)
++{
++ /* According to PMB2520 Data Sheet, Rev. 2006-06-05,
++ * Chapter 4.2.2 */
++
++ /* nRESET must be asserted low */
++ gps_rst_set(0);
++
++ /* POWERON must be de-asserted (low) */
++ gps_pwron_set(0);
++
++ /* Apply VDD_IO and VDD_LPREG_IN */
++ gps_power_3v3_set(1);
++
++ /* VDD_COREREG_IN, VDD_PLLREG_IN */
++ gps_power_1v5_set(1);
++ gps_power_2v5_set(1);
++
++ /* and VDD_RF may be applied */
++ gps_power_2v8_set(1);
++
++ /* We need to enable AVDD, since in GTA01Bv3 it is
++ * shared with RFREG_IN */
++ gps_power_3v_set(1);
++
++ msleep(3); /* Is 3ms enough? */
++
++ /* De-asert nRESET */
++ gps_rst_set(1);
++
++ /* Switch power on */
++ gps_pwron_set(1);
++
++}
++
++static void gps_power_sequence_down(void)
++{
++ /* According to PMB2520 Data Sheet, Rev. 2006-06-05,
++ * Chapter 4.2.3.1 */
++ gps_pwron_set(0);
++
++ /* Don't disable AVDD before PWRON is cleared, since
++ * in GTA01Bv3, AVDD and RFREG_IN are shared */
++ gps_power_3v_set(0);
++
++ /* Remove VDD_COREREG_IN, VDD_PLLREG_IN and VDD_REFREG_IN */
++ gps_power_1v5_set(0);
++ gps_power_2v5_set(0);
++ gps_power_2v8_set(0);
++
++ /* Remove VDD_LPREG_IN and VDD_IO */
++ gps_power_3v3_set(0);
++}
++
++
++static ssize_t power_sequence_read(struct device *dev,
++ struct device_attribute *attr,
++ char *buf)
++{
++ return strlcpy(buf, "power_up power_down\n", PAGE_SIZE);
++}
++
++static ssize_t power_sequence_write(struct device *dev,
++ struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ dev_dbg(dev, "wrote: '%s'\n", buf);
++
++ if (!strncmp(buf, "power_up", 8))
++ gps_power_sequence_up();
++ else if (!strncmp(buf, "power_down", 10))
++ gps_power_sequence_down();
++ else
++ return -EINVAL;
++
++ return count;
++}
++
++static DEVICE_ATTR(power_tcxo_2v8, 0644, power_gps_read, power_gps_write);
++static DEVICE_ATTR(power_avdd_3v, 0644, power_gps_read, power_gps_write);
++static DEVICE_ATTR(pwron, 0644, power_gps_read, power_gps_write);
++static DEVICE_ATTR(reset, 0644, power_gps_read, power_gps_write);
++static DEVICE_ATTR(power_lp_io_3v3, 0644, power_gps_read, power_gps_write);
++static DEVICE_ATTR(power_pll_core_2v5, 0644, power_gps_read, power_gps_write);
++static DEVICE_ATTR(power_core_1v5, 0644, power_gps_read, power_gps_write);
++static DEVICE_ATTR(power_vdd_core_1v5, 0644, power_gps_read, power_gps_write);
++static DEVICE_ATTR(power_sequence, 0644, power_sequence_read,
++ power_sequence_write);
++
++#ifdef CONFIG_PM
++static int gta01_pm_gps_suspend(struct platform_device *pdev,
++ pm_message_t state)
++{
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ if (machine_is_neo1973_gta01()) {
++ /* FIXME */
++ gps_power_sequence_down();
++ }
++#endif /* CONFIG_MACH_NEO1973_GTA01 */
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ if (machine_is_neo1973_gta02())
++ gps_pwron_set(0);
++#endif /* CONFIG_MACH_NEO1973_GTA02 */
++
++ return 0;
++}
++
++static int gta01_pm_gps_resume(struct platform_device *pdev)
++{
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ if (machine_is_neo1973_gta01())
++ if (neo1973_gps.power_was_on)
++ gps_power_sequence_up();
++#endif /* CONFIG_MACH_NEO1973_GTA01 */
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ if (machine_is_neo1973_gta02())
++ if (neo1973_gps.power_was_on)
++ gps_pwron_set(1);
++#endif /* CONFIG_MACH_NEO1973_GTA02 */
++
++ return 0;
++}
++#else
++#define gta01_pm_gps_suspend NULL
++#define gta01_pm_gps_resume NULL
++#endif
++
++static struct attribute *gta01_gps_sysfs_entries[] = {
++ &dev_attr_power_avdd_3v.attr,
++ &dev_attr_pwron.attr,
++ &dev_attr_reset.attr,
++ &dev_attr_power_lp_io_3v3.attr,
++ &dev_attr_power_pll_core_2v5.attr,
++ &dev_attr_power_sequence.attr,
++ NULL, /* power_core_1v5 */
++ NULL, /* power_vdd_core_1v5 */
++ NULL /* terminating entry */
++};
++
++static struct attribute_group gta01_gps_attr_group = {
++ .name = NULL,
++ .attrs = gta01_gps_sysfs_entries,
++};
++
++static struct attribute *gta02_gps_sysfs_entries[] = {
++ &dev_attr_pwron.attr,
++ NULL
++};
++
++static struct attribute_group gta02_gps_attr_group = {
++ .name = NULL,
++ .attrs = gta02_gps_sysfs_entries,
++};
++
++static int __init gta01_pm_gps_probe(struct platform_device *pdev)
++{
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ if (machine_is_neo1973_gta01()) {
++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_PWRON, S3C2410_GPIO_OUTPUT);
++
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ break;
++ case GTA01v4_SYSTEM_REV:
++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_RESET, S3C2410_GPIO_OUTPUT);
++ break;
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_3V3, S3C2410_GPIO_OUTPUT);
++ /* fallthrough */
++ case GTA01Bv2_SYSTEM_REV:
++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_2V8, S3C2410_GPIO_OUTPUT);
++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_3V, S3C2410_GPIO_OUTPUT);
++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_RESET, S3C2410_GPIO_OUTPUT);
++ break;
++ default:
++ dev_warn(&pdev->dev, "Unknown GTA01 Revision 0x%x, "
++ "AGPS PM features not available!!!\n",
++ system_rev);
++ return -1;
++ break;
++ }
++
++ gps_power_sequence_down();
++
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ case GTA01v4_SYSTEM_REV:
++ case GTA01Bv2_SYSTEM_REV:
++ gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-3] =
++ &dev_attr_power_tcxo_2v8.attr;
++ break;
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-3] =
++ &dev_attr_power_core_1v5.attr;
++ gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-2] =
++ &dev_attr_power_vdd_core_1v5.attr;
++ break;
++ }
++
++ return sysfs_create_group(&pdev->dev.kobj, >a01_gps_attr_group);
++ }
++#endif /* CONFIG_MACH_NEO1973_GTA01 */
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ if (machine_is_neo1973_gta02()) {
++ switch (system_rev) {
++ case GTA02v2_SYSTEM_REV:
++ case GTA02v3_SYSTEM_REV:
++ case GTA02v4_SYSTEM_REV:
++ case GTA02v5_SYSTEM_REV:
++ case GTA02v6_SYSTEM_REV:
++ pcf50633_voltage_set(pcf50633_global,
++ PCF50633_REGULATOR_LDO5, 3000);
++ pcf50633_onoff_set(pcf50633_global,
++ PCF50633_REGULATOR_LDO5, 0);
++ dev_info(&pdev->dev, "FIC Neo1973 GPS Power Managerment:"
++ "starting\n");
++ break;
++ default:
++ dev_warn(&pdev->dev, "Unknown GTA02 Revision 0x%x, "
++ "AGPS PM features not available!!!\n",
++ system_rev);
++ return -1;
++ break;
++ }
++ return sysfs_create_group(&pdev->dev.kobj, >a02_gps_attr_group);
++ }
++#endif /* CONFIG_MACH_NEO1973_GTA02 */
++ return -1;
++}
++
++static int gta01_pm_gps_remove(struct platform_device *pdev)
++{
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ if (machine_is_neo1973_gta01()) {
++ gps_power_sequence_down();
++ sysfs_remove_group(&pdev->dev.kobj, >a01_gps_attr_group);
++ }
++#endif /* CONFIG_MACH_NEO1973_GTA01 */
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ if (machine_is_neo1973_gta02()) {
++ pcf50633_onoff_set(pcf50633_global, PCF50633_REGULATOR_LDO5, 0);
++ sysfs_remove_group(&pdev->dev.kobj, >a02_gps_attr_group);
++ }
++#endif /* CONFIG_MACH_NEO1973_GTA02 */
++ return 0;
++}
++
++static struct platform_driver gta01_pm_gps_driver = {
++ .probe = gta01_pm_gps_probe,
++ .remove = gta01_pm_gps_remove,
++ .suspend = gta01_pm_gps_suspend,
++ .resume = gta01_pm_gps_resume,
++ .driver = {
++ .name = "neo1973-pm-gps",
++ },
++};
++
++static int __devinit gta01_pm_gps_init(void)
++{
++ return platform_driver_register(>a01_pm_gps_driver);
++}
++
++static void gta01_pm_gps_exit(void)
++{
++ platform_driver_unregister(>a01_pm_gps_driver);
++}
++
++module_init(gta01_pm_gps_init);
++module_exit(gta01_pm_gps_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
++MODULE_DESCRIPTION("FIC Neo1973 GPS Power Management");
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_gps.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_gps.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1 @@
++extern int neo1973_pm_gps_is_on(void);
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_gsm.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_gsm.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,373 @@
++/*
++ * GSM Management code for the FIC Neo1973 GSM Phone
++ *
++ * (C) 2007 by Openmoko Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/console.h>
++#include <linux/errno.h>
++#include <linux/interrupt.h>
++
++#include <asm/gpio.h>
++#include <asm/mach-types.h>
++#include <asm/arch/gta01.h>
++#include <asm/plat-s3c24xx/neo1973.h>
++#include <asm/arch/s3c24xx-serial.h>
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++#include <asm/arch/gta02.h>
++#include <linux/pcf50633.h>
++#include <asm/arch/regs-gpioj.h>
++#endif
++
++int gta_gsm_interrupts;
++EXPORT_SYMBOL(gta_gsm_interrupts);
++
++struct gta01pm_priv {
++ int gpio_ngsm_en;
++ int gpio_ndl_gsm;
++
++ struct console *con;
++};
++
++struct resume_dependency resume_dep_gsm_uart;
++
++static struct gta01pm_priv gta01_gsm;
++
++static struct console *find_s3c24xx_console(void)
++{
++ struct console *con;
++
++ acquire_console_sem();
++
++ for (con = console_drivers; con; con = con->next) {
++ if (!strcmp(con->name, "ttySAC"))
++ break;
++ }
++
++ release_console_sem();
++
++ return con;
++}
++
++static ssize_t gsm_read(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ if (!strcmp(attr->attr.name, "power_on")) {
++ if (s3c2410_gpio_getpin(GTA01_GPIO_MODEM_ON))
++ goto out_1;
++ } else if (!strcmp(attr->attr.name, "reset")) {
++ if (machine_is_neo1973_gta01() && s3c2410_gpio_getpin(GTA01_GPIO_MODEM_RST))
++ goto out_1;
++ else if (machine_is_neo1973_gta02() && s3c2410_gpio_getpin(GTA02_GPIO_MODEM_RST))
++ goto out_1;
++ } else if (!strcmp(attr->attr.name, "download")) {
++ if (machine_is_neo1973_gta01()) {
++ if (s3c2410_gpio_getpin(GTA01_GPIO_MODEM_DNLOAD))
++ goto out_1;
++ } else if (machine_is_neo1973_gta02()) {
++ if (!s3c2410_gpio_getpin(GTA02_GPIO_nDL_GSM))
++ goto out_1;
++ }
++ } else if (!strcmp(attr->attr.name, "flowcontrolled")) {
++ if (s3c2410_gpio_getcfg(S3C2410_GPH1) == S3C2410_GPIO_OUTPUT)
++ goto out_1;
++ }
++
++ return strlcpy(buf, "0\n", 3);
++out_1:
++ return strlcpy(buf, "1\n", 3);
++}
++
++static ssize_t gsm_write(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ unsigned long on = simple_strtoul(buf, NULL, 10);
++
++ if (!strcmp(attr->attr.name, "power_on")) {
++ if (on) {
++ if (gta01_gsm.con) {
++ dev_dbg(dev, "powering up GSM, thus "
++ "disconnecting serial console\n");
++
++ console_stop(gta01_gsm.con);
++ s3c24xx_serial_console_set_silence(1);
++ }
++
++ if (gta01_gsm.gpio_ngsm_en)
++ s3c2410_gpio_setpin(gta01_gsm.gpio_ngsm_en, 0);
++
++ switch (system_rev) {
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ case GTA02v2_SYSTEM_REV:
++ case GTA02v3_SYSTEM_REV:
++ case GTA02v4_SYSTEM_REV:
++ case GTA02v5_SYSTEM_REV:
++ case GTA02v6_SYSTEM_REV:
++ pcf50633_gpio_set(pcf50633_global,
++ PCF50633_GPIO2, 1);
++ break;
++#endif
++ }
++
++ neo1973_gpb_setpin(GTA01_GPIO_MODEM_ON, 1);
++ } else {
++ neo1973_gpb_setpin(GTA01_GPIO_MODEM_ON, 0);
++
++ switch (system_rev) {
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ case GTA02v2_SYSTEM_REV:
++ case GTA02v3_SYSTEM_REV:
++ case GTA02v4_SYSTEM_REV:
++ case GTA02v5_SYSTEM_REV:
++ case GTA02v6_SYSTEM_REV:
++ pcf50633_gpio_set(pcf50633_global,
++ PCF50633_GPIO2, 0);
++ break;
++#endif
++ }
++
++ if (gta01_gsm.gpio_ngsm_en)
++ s3c2410_gpio_setpin(gta01_gsm.gpio_ngsm_en, 1);
++
++ if (gta01_gsm.con) {
++ s3c24xx_serial_console_set_silence(0);
++ console_start(gta01_gsm.con);
++
++ dev_dbg(dev, "powered down GSM, thus enabling "
++ "serial console\n");
++ }
++ }
++ } else if (!strcmp(attr->attr.name, "reset")) {
++ if (machine_is_neo1973_gta01())
++ neo1973_gpb_setpin(GTA01_GPIO_MODEM_RST, on);
++ else if (machine_is_neo1973_gta02())
++ neo1973_gpb_setpin(GTA02_GPIO_MODEM_RST, on);
++ } else if (!strcmp(attr->attr.name, "download")) {
++ if (machine_is_neo1973_gta01())
++ s3c2410_gpio_setpin(GTA01_GPIO_MODEM_DNLOAD, on);
++
++ if (machine_is_neo1973_gta02()) {
++ /*
++ * the keyboard / buttons driver requests and enables
++ * the JACK_INSERT IRQ. We have to take care about
++ * not enabling and disabling the IRQ when it was
++ * already in that state or we get "unblanaced IRQ"
++ * kernel warnings and stack dumps. So we use the
++ * copy of the ndl_gsm state to figure out if we should
++ * enable or disable the jack interrupt
++ */
++ if (on) {
++ if (gta01_gsm.gpio_ndl_gsm)
++ disable_irq(gpio_to_irq(
++ GTA02_GPIO_JACK_INSERT));
++ } else {
++ if (!gta01_gsm.gpio_ndl_gsm)
++ enable_irq(gpio_to_irq(
++ GTA02_GPIO_JACK_INSERT));
++ }
++
++ gta01_gsm.gpio_ndl_gsm = !on;
++ s3c2410_gpio_setpin(GTA02_GPIO_nDL_GSM, !on);
++ }
++ } else if (!strcmp(attr->attr.name, "flowcontrolled")) {
++ if (on) {
++ gta_gsm_interrupts = 0;
++ s3c2410_gpio_setpin(S3C2410_GPH1, 1);
++ s3c2410_gpio_cfgpin(S3C2410_GPH1, S3C2410_GPH1_OUTP);
++ } else
++ s3c2410_gpio_cfgpin(S3C2410_GPH1, S3C2410_GPH1_nRTS0);
++ }
++
++ return count;
++}
++
++static DEVICE_ATTR(power_on, 0644, gsm_read, gsm_write);
++static DEVICE_ATTR(reset, 0644, gsm_read, gsm_write);
++static DEVICE_ATTR(download, 0644, gsm_read, gsm_write);
++static DEVICE_ATTR(flowcontrolled, 0644, gsm_read, gsm_write);
++
++#ifdef CONFIG_PM
++static int gta01_gsm_resume(struct platform_device *pdev);
++static int gta01_gsm_suspend(struct platform_device *pdev, pm_message_t state)
++{
++ /* GPIO state is saved/restored by S3C2410 core GPIO driver, so we
++ * don't need to do much here. */
++
++ /* If flowcontrol asserted, abort if GSM already interrupted */
++ if (s3c2410_gpio_getcfg(S3C2410_GPH1) == S3C2410_GPIO_OUTPUT) {
++ if (gta_gsm_interrupts)
++ goto busy;
++ }
++
++ /* disable DL GSM to prevent jack_insert becoming 'floating' */
++ if (machine_is_neo1973_gta02())
++ s3c2410_gpio_setpin(GTA02_GPIO_nDL_GSM, 1);
++
++ /* register our resume dependency on the appropriate UART being up */
++ resume_dep_gsm_uart.callback = gta01_gsm_resume;
++ resume_dep_gsm_uart.context = (void *)pdev;
++
++ s3c24xx_serial_register_resume_dependency(&resume_dep_gsm_uart, 0);
++
++ return 0;
++
++busy:
++ return -EBUSY;
++}
++
++static int
++gta01_gsm_suspend_late(struct platform_device *pdev, pm_message_t state)
++{
++ /* Last chance: abort if GSM already interrupted */
++ if (s3c2410_gpio_getcfg(S3C2410_GPH1) == S3C2410_GPIO_OUTPUT) {
++ if (gta_gsm_interrupts)
++ return -EBUSY;
++ }
++ return 0;
++}
++
++static int gta01_gsm_resume(struct platform_device *pdev)
++{
++ if (resume_dep_gsm_uart.called_flag != 1)
++ return 0;
++
++ resume_dep_gsm_uart.called_flag++; /* only run once */
++
++ /* GPIO state is saved/restored by S3C2410 core GPIO driver, so we
++ * don't need to do much here. */
++
++ /* Make sure that the kernel console on the serial port is still
++ * disabled. FIXME: resume ordering race with serial driver! */
++ if (gta01_gsm.con && s3c2410_gpio_getpin(GTA01_GPIO_MODEM_ON))
++ console_stop(gta01_gsm.con);
++
++ if (machine_is_neo1973_gta02())
++ s3c2410_gpio_setpin(GTA02_GPIO_nDL_GSM, gta01_gsm.gpio_ndl_gsm);
++
++ return 0;
++}
++#else
++#define gta01_gsm_suspend NULL
++#define gta01_gsm_suspend_late NULL
++#define gta01_gsm_resume NULL
++#endif
++
++static struct attribute *gta01_gsm_sysfs_entries[] = {
++ &dev_attr_power_on.attr,
++ &dev_attr_reset.attr,
++ &dev_attr_download.attr,
++ &dev_attr_flowcontrolled.attr,
++ NULL
++};
++
++static struct attribute_group gta01_gsm_attr_group = {
++ .name = NULL,
++ .attrs = gta01_gsm_sysfs_entries,
++};
++
++static int __init gta01_gsm_probe(struct platform_device *pdev)
++{
++ switch (system_rev) {
++ case GTA01v3_SYSTEM_REV:
++ gta01_gsm.gpio_ngsm_en = GTA01v3_GPIO_nGSM_EN;
++ break;
++ case GTA01v4_SYSTEM_REV:
++ gta01_gsm.gpio_ngsm_en = 0;
++ break;
++ case GTA01Bv2_SYSTEM_REV:
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ gta01_gsm.gpio_ngsm_en = GTA01Bv2_GPIO_nGSM_EN;
++ s3c2410_gpio_setpin(GTA01v3_GPIO_nGSM_EN, 0);
++ break;
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ case GTA02v1_SYSTEM_REV:
++ case GTA02v2_SYSTEM_REV:
++ case GTA02v3_SYSTEM_REV:
++ case GTA02v4_SYSTEM_REV:
++ case GTA02v5_SYSTEM_REV:
++ case GTA02v6_SYSTEM_REV:
++ gta01_gsm.gpio_ngsm_en = 0;
++ break;
++#endif
++ default:
++ dev_warn(&pdev->dev, "Unknown Neo1973 Revision 0x%x, "
++ "some PM features not available!!!\n",
++ system_rev);
++ break;
++ }
++
++ switch (system_rev) {
++ case GTA01v4_SYSTEM_REV:
++ case GTA01Bv2_SYSTEM_REV:
++ gta01_gsm_sysfs_entries[ARRAY_SIZE(gta01_gsm_sysfs_entries)-2] =
++ &dev_attr_download.attr;
++ break;
++ default:
++ break;
++ }
++
++ if (machine_is_neo1973_gta01()) {
++ gta01_gsm.con = find_s3c24xx_console();
++ if (!gta01_gsm.con)
++ dev_warn(&pdev->dev,
++ "cannot find S3C24xx console driver\n");
++ } else
++ gta01_gsm.con = NULL;
++
++ /* note that download initially disabled, and enforce that */
++ gta01_gsm.gpio_ndl_gsm = 1;
++ if (machine_is_neo1973_gta02())
++ s3c2410_gpio_setpin(GTA02_GPIO_nDL_GSM, 1);
++
++ init_resume_dependency_list(&resume_dep_gsm_uart);
++
++ return sysfs_create_group(&pdev->dev.kobj, >a01_gsm_attr_group);
++}
++
++static int gta01_gsm_remove(struct platform_device *pdev)
++{
++ sysfs_remove_group(&pdev->dev.kobj, >a01_gsm_attr_group);
++
++ return 0;
++}
++
++static struct platform_driver gta01_gsm_driver = {
++ .probe = gta01_gsm_probe,
++ .remove = gta01_gsm_remove,
++ .suspend = gta01_gsm_suspend,
++ .suspend_late = gta01_gsm_suspend_late,
++ .resume = gta01_gsm_resume,
++ .driver = {
++ .name = "neo1973-pm-gsm",
++ },
++};
++
++static int __devinit gta01_gsm_init(void)
++{
++ return platform_driver_register(>a01_gsm_driver);
++}
++
++static void gta01_gsm_exit(void)
++{
++ platform_driver_unregister(>a01_gsm_driver);
++}
++
++module_init(gta01_gsm_init);
++module_exit(gta01_gsm_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
++MODULE_DESCRIPTION("FIC Neo1973 GSM Power Management");
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_host.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_host.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,101 @@
++/*
++ * Bluetooth PM code for the FIC Neo1973 GSM Phone
++ *
++ * (C) 2007 by Openmoko Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++
++#include <asm/hardware.h>
++#include <asm/mach-types.h>
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++#include <asm/arch/gta02.h>
++#include <linux/pcf50633.h>
++
++static ssize_t pm_host_read(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ return sprintf(buf, "%d\n",
++ pcf50633_gpio_get(pcf50633_global, PCF50633_GPO));
++}
++
++static ssize_t pm_host_write(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ unsigned long on = simple_strtoul(buf, NULL, 10);
++
++ pcf50633_gpio_set(pcf50633_global, PCF50633_GPO, on);
++
++ return count;
++}
++
++static DEVICE_ATTR(hostmode, 0644, pm_host_read, pm_host_write);
++
++static struct attribute *neo1973_pm_host_sysfs_entries[] = {
++ &dev_attr_hostmode.attr,
++ NULL
++};
++
++static struct attribute_group neo1973_pm_host_attr_group = {
++ .name = NULL,
++ .attrs = neo1973_pm_host_sysfs_entries,
++};
++
++static int __init neo1973_pm_host_probe(struct platform_device *pdev)
++{
++ dev_info(&pdev->dev, "starting\n");
++
++ switch (machine_arch_type) {
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ case MACH_TYPE_NEO1973_GTA01:
++ return -EINVAL;
++#endif /* CONFIG_MACH_NEO1973_GTA01 */
++ default:
++ break;
++ }
++
++ return sysfs_create_group(&pdev->dev.kobj, &neo1973_pm_host_attr_group);
++}
++
++static int neo1973_pm_host_remove(struct platform_device *pdev)
++{
++ sysfs_remove_group(&pdev->dev.kobj, &neo1973_pm_host_attr_group);
++ return 0;
++}
++
++static struct platform_driver neo1973_pm_host_driver = {
++ .probe = neo1973_pm_host_probe,
++ .remove = neo1973_pm_host_remove,
++ .driver = {
++ .name = "neo1973-pm-host",
++ },
++};
++
++static int __devinit neo1973_pm_host_init(void)
++{
++ return platform_driver_register(&neo1973_pm_host_driver);
++}
++
++static void neo1973_pm_host_exit(void)
++{
++ platform_driver_unregister(&neo1973_pm_host_driver);
++}
++
++module_init(neo1973_pm_host_init);
++module_exit(neo1973_pm_host_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
++MODULE_DESCRIPTION("Neo1973 USB Host Power Management");
++#endif
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_resume_reason.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_resume_reason.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,147 @@
++/*
++ * Resume reason sysfs for the FIC Neo1973 GSM Phone
++ *
++ * (C) 2008 by Openmoko Inc.
++ * Author: Andy Green <andy@openmoko.com>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License resume_reason 2 as
++ * published by the Free Software Foundation
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/io.h>
++
++#include <asm/hardware.h>
++#include <asm/mach-types.h>
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++#include <asm/arch/gta02.h>
++#include <linux/pcf50633.h>
++#endif
++
++static unsigned int *gstatus4_mapped;
++static char *resume_reasons[][17] = { { /* GTA01 */
++ "EINT00_NULL",
++ "EINT01_GSM",
++ "EINT02_NULL",
++ "EINT03_NULL",
++ "EINT04_JACK",
++ "EINT05_SDCARD",
++ "EINT06_AUXKEY",
++ "EINT07_HOLDKEY",
++ "EINT08_NULL",
++ "EINT09_NULL",
++ "EINT10_NULL",
++ "EINT11_NULL",
++ "EINT12_NULL",
++ "EINT13_NULL",
++ "EINT14_NULL",
++ "EINT15_NULL",
++ NULL
++}, { /* GTA02 */
++ "EINT00_ACCEL1",
++ "EINT01_GSM",
++ "EINT02_BLUETOOTH",
++ "EINT03_DEBUGBRD",
++ "EINT04_JACK",
++ "EINT05_WLAN",
++ "EINT06_AUXKEY",
++ "EINT07_HOLDKEY",
++ "EINT08_ACCEL2",
++ "EINT09_PMU",
++ "EINT10_NULL",
++ "EINT11_NULL",
++ "EINT12_GLAMO",
++ "EINT13_NULL",
++ "EINT14_NULL",
++ "EINT15_NULL",
++ NULL
++} };
++
++static ssize_t resume_reason_read(struct device *dev,
++ struct device_attribute *attr,
++ char *buf)
++{
++ int bit = 0;
++ char *end = buf;
++ int gta = !!machine_is_neo1973_gta02();
++
++ for (bit = 0; resume_reasons[gta][bit]; bit++) {
++ if ((*gstatus4_mapped) & (1 << bit))
++ end += sprintf(end, "* %s\n", resume_reasons[gta][bit]);
++ else
++ end += sprintf(end, " %s\n", resume_reasons[gta][bit]);
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++ if ((gta) && (bit == 9)) /* PMU */
++ end += pcf50633_report_resumers(pcf50633_global, end);
++#endif
++ }
++
++ return end - buf;
++}
++
++
++static DEVICE_ATTR(resume_reason, 0644, resume_reason_read, NULL);
++
++static struct attribute *neo1973_resume_reason_sysfs_entries[] = {
++ &dev_attr_resume_reason.attr,
++ NULL
++};
++
++static struct attribute_group neo1973_resume_reason_attr_group = {
++ .name = NULL,
++ .attrs = neo1973_resume_reason_sysfs_entries,
++};
++
++static int __init neo1973_resume_reason_probe(struct platform_device *pdev)
++{
++ dev_info(&pdev->dev, "starting\n");
++
++ gstatus4_mapped = ioremap(0x560000BC /* GSTATUS4 */, 0x4);
++ if (!gstatus4_mapped) {
++ dev_err(&pdev->dev, "failed to ioremap() memory region\n");
++ return -EINVAL;
++ }
++
++ return sysfs_create_group(&pdev->dev.kobj,
++ &neo1973_resume_reason_attr_group);
++}
++
++static int neo1973_resume_reason_remove(struct platform_device *pdev)
++{
++ sysfs_remove_group(&pdev->dev.kobj, &neo1973_resume_reason_attr_group);
++ iounmap(gstatus4_mapped);
++ return 0;
++}
++
++static struct platform_driver neo1973_resume_reason_driver = {
++ .probe = neo1973_resume_reason_probe,
++ .remove = neo1973_resume_reason_remove,
++ .driver = {
++ .name = "neo1973-resume",
++ },
++};
++
++static int __devinit neo1973_resume_reason_init(void)
++{
++ return platform_driver_register(&neo1973_resume_reason_driver);
++}
++
++static void neo1973_resume_reason_exit(void)
++{
++ platform_driver_unregister(&neo1973_resume_reason_driver);
++}
++
++module_init(neo1973_resume_reason_init);
++module_exit(neo1973_resume_reason_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
++MODULE_DESCRIPTION("Neo1973 resume_reason");
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_shadow.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_shadow.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,86 @@
++/*
++ * include/asm-arm/plat-s3c24xx/neo1973.h
++ *
++ * Common utility code for GTA01 and GTA02
++ *
++ * Copyright (C) 2008 by Openmoko, Inc.
++ * Author: Holger Hans Peter Freyther <freyther@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++
++#include <linux/io.h>
++#include <linux/irq.h>
++
++#include <asm/gpio.h>
++#include <asm/plat-s3c24xx/neo1973.h>
++
++/**
++ * Shadow GPIO bank B handling. For the LEDs we need to keep track of the state
++ * in software. The s3c2410_gpio_setpin must not be used for GPIOs on bank B
++ */
++static unsigned long gpb_mask;
++static unsigned long gpb_state;
++
++void neo1973_gpb_add_shadow_gpio(unsigned int gpio)
++{
++ unsigned long offset = S3C2410_GPIO_OFFSET(gpio);
++ unsigned long flags;
++
++ local_irq_save(flags);
++ gpb_mask |= 1L << offset;
++ local_irq_restore(flags);
++}
++EXPORT_SYMBOL(neo1973_gpb_add_shadow_gpio);
++
++static void set_shadow_gpio(unsigned long offset, unsigned int value)
++{
++ unsigned long state = value != 0;
++
++ gpb_state &= ~(1L << offset);
++ gpb_state |= state << offset;
++}
++
++void neo1973_gpb_setpin(unsigned int pin, unsigned to)
++{
++ void __iomem *base = S3C24XX_GPIO_BASE(S3C2410_GPB0);
++ unsigned long offset = S3C2410_GPIO_OFFSET(pin);
++ unsigned long flags;
++ unsigned long dat;
++
++ BUG_ON(base != S3C24XX_GPIO_BASE(pin));
++
++ local_irq_save(flags);
++ dat = __raw_readl(base + 0x04);
++
++ /* Add the shadow values */
++ dat &= ~gpb_mask;
++ dat |= gpb_state;
++
++ /* Do the operation like s3c2410_gpio_setpin */
++ dat &= ~(1L << offset);
++ dat |= to << offset;
++
++ /* Update the shadow state */
++ if ((1L << offset) & gpb_mask)
++ set_shadow_gpio(offset, to);
++
++ __raw_writel(dat, base + 0x04);
++ local_irq_restore(flags);
++}
++EXPORT_SYMBOL(neo1973_gpb_setpin);
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_version.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_version.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,90 @@
++/*
++ * PCB version sysfs for the FIC Neo1973 GSM Phone
++ *
++ * (C) 2007 by Openmoko Inc.
++ * Author: Andy Green <andy@openmoko.com>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++
++#include <asm/hardware.h>
++#include <asm/mach-types.h>
++
++#ifdef CONFIG_MACH_NEO1973_GTA02
++#include <asm/arch/gta02.h>
++
++static ssize_t version_read(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ return sprintf(buf, "0x%03X\n", gta02_get_pcb_revision());
++}
++
++
++static DEVICE_ATTR(pcb, 0644, version_read, NULL);
++
++static struct attribute *neo1973_version_sysfs_entries[] = {
++ &dev_attr_pcb.attr,
++ NULL
++};
++
++static struct attribute_group neo1973_version_attr_group = {
++ .name = NULL,
++ .attrs = neo1973_version_sysfs_entries,
++};
++
++static int __init neo1973_version_probe(struct platform_device *pdev)
++{
++ dev_info(&pdev->dev, "starting\n");
++
++ switch (machine_arch_type) {
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ case MACH_TYPE_NEO1973_GTA01:
++ return -EINVAL;
++#endif /* CONFIG_MACH_NEO1973_GTA01 */
++ default:
++ break;
++ }
++
++ return sysfs_create_group(&pdev->dev.kobj, &neo1973_version_attr_group);
++}
++
++static int neo1973_version_remove(struct platform_device *pdev)
++{
++ sysfs_remove_group(&pdev->dev.kobj, &neo1973_version_attr_group);
++ return 0;
++}
++
++static struct platform_driver neo1973_version_driver = {
++ .probe = neo1973_version_probe,
++ .remove = neo1973_version_remove,
++ .driver = {
++ .name = "neo1973-version",
++ },
++};
++
++static int __devinit neo1973_version_init(void)
++{
++ return platform_driver_register(&neo1973_version_driver);
++}
++
++static void neo1973_version_exit(void)
++{
++ platform_driver_unregister(&neo1973_version_driver);
++}
++
++module_init(neo1973_version_init);
++module_exit(neo1973_version_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
++MODULE_DESCRIPTION("Neo1973 PCB version");
++#endif
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/pm.c
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/pm.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/pm.c 2008-12-11 22:46:49.000000000 +0100
+@@ -169,8 +169,15 @@ static void s3c2410_pm_debug_init(void)
+ }
+
+ #define DBG(fmt...) pm_dbg(fmt)
++#define RESTORE_DBG(fmt...) printk(KERN_DEBUG fmt)
+ #else
++#if 0
+ #define DBG(fmt...) printk(KERN_DEBUG fmt)
++#define RESTORE_DBG(fmt...) printk(KERN_DEBUG fmt)
++#else
++#define DBG(fmt...) do { } while (0)
++#define RESTORE_DBG(fmt...) do { } while (0)
++#endif
+
+ #define s3c2410_pm_debug_init() do { } while(0)
+
+@@ -392,7 +399,7 @@ void s3c2410_pm_do_save(struct sleep_sav
+ void s3c2410_pm_do_restore(struct sleep_save *ptr, int count)
+ {
+ for (; count > 0; count--, ptr++) {
+- printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n",
++ RESTORE_DBG("restore %p (restore %08lx, was %08x)\n",
+ ptr->reg, ptr->val, __raw_readl(ptr->reg));
+
+ __raw_writel(ptr->val, ptr->reg);
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/s3c244x.c
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/s3c244x.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/s3c244x.c 2008-12-11 22:46:49.000000000 +0100
+@@ -67,6 +67,7 @@ void __init s3c244x_map_io(struct map_de
+
+ s3c_device_i2c.name = "s3c2440-i2c";
+ s3c_device_nand.name = "s3c2440-nand";
++ s3c_device_ts.name = "s3c2440-ts";
+ s3c_device_usbgadget.name = "s3c2440-usbgadget";
+ }
+
+Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/time.c
+===================================================================
+--- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/time.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/arch/arm/plat-s3c24xx/time.c 2008-12-11 22:46:49.000000000 +0100
+@@ -3,6 +3,8 @@
+ * Copyright (C) 2003-2005 Simtec Electronics
+ * Ben Dooks, <ben@simtec.co.uk>
+ *
++ * dyn_tick support by Andrzej Zaborowski based on omap_dyn_tick_timer.
++ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+@@ -42,6 +44,10 @@
+
+ static unsigned long timer_startval;
+ static unsigned long timer_usec_ticks;
++static struct work_struct resume_work;
++
++unsigned long pclk;
++struct clk *clk;
+
+ #define TIMER_USEC_SHIFT 16
+
+@@ -179,11 +185,7 @@ static void s3c2410_timer_setup (void)
+ tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
+ tcfg1 |= S3C2410_TCFG1_MUX4_TCLK1;
+ } else {
+- unsigned long pclk;
+- struct clk *clk;
+-
+- /* for the h1940 (and others), we use the pclk from the core
+- * to generate the timer values. since values around 50 to
++ /* since values around 50 to
+ * 70MHz are not values we can directly generate the timer
+ * value from, we need to pre-scale and divide before using it.
+ *
+@@ -191,19 +193,9 @@ static void s3c2410_timer_setup (void)
+ * (8.45 ticks per usec)
+ */
+
+- /* this is used as default if no other timer can be found */
+-
+- clk = clk_get(NULL, "timers");
+- if (IS_ERR(clk))
+- panic("failed to get clock for system timer");
+-
+- clk_enable(clk);
+-
+- pclk = clk_get_rate(clk);
+-
+ /* configure clock tick */
+-
+ timer_usec_ticks = timer_mask_usec_ticks(6, pclk);
++ printk("timer_usec_ticks = %lu\n", timer_usec_ticks);
+
+ tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
+ tcfg1 |= S3C2410_TCFG1_MUX4_DIV2;
+@@ -247,16 +239,244 @@ static void s3c2410_timer_setup (void)
+ tcon |= S3C2410_TCON_T4START;
+ tcon &= ~S3C2410_TCON_T4MANUALUPD;
+ __raw_writel(tcon, S3C2410_TCON);
++
++ __raw_writel(__raw_readl(S3C2410_INTMSK) & (~(1UL << 14)),
++ S3C2410_INTMSK);
++
++}
++
++struct sys_timer s3c24xx_timer;
++static void timer_resume_work(struct work_struct *work)
++{
++ clk_enable(clk);
++
++#ifdef CONFIG_NO_IDLE_HZ
++ if (s3c24xx_timer.dyn_tick->state & DYN_TICK_ENABLED)
++ s3c24xx_timer.dyn_tick->enable();
++ else
++#endif
++ s3c2410_timer_setup();
+ }
+
+ static void __init s3c2410_timer_init (void)
+ {
++ if (!use_tclk1_12()) {
++ /* for the h1940 (and others), we use the pclk from the core
++ * to generate the timer values.
++ */
++
++ /* this is used as default if no other timer can be found */
++ clk = clk_get(NULL, "timers");
++ if (IS_ERR(clk))
++ panic("failed to get clock for system timer");
++
++ clk_enable(clk);
++
++ pclk = clk_get_rate(clk);
++ printk("pclk = %lu\n", pclk);
++ }
++
++ INIT_WORK(&resume_work, timer_resume_work);
+ s3c2410_timer_setup();
+ setup_irq(IRQ_TIMER4, &s3c2410_timer_irq);
+ }
+
++static void s3c2410_timer_resume_work(struct work_struct *work)
++{
++ s3c2410_timer_setup();
++}
++
++static void s3c2410_timer_resume(void)
++{
++ static DECLARE_WORK(work, s3c2410_timer_resume_work);
++ int res;
++
++ res = schedule_work(&work);
++ if (!res)
++ printk(KERN_ERR
++ "s3c2410_timer_resume_work already queued ???\n");
++}
++
++#ifdef CONFIG_NO_IDLE_HZ
++/*
++ * We'll set a constant prescaler so we don't have to bother setting it
++ * when reprogramming and so that we avoid costly divisions.
++ *
++ * (2 * HZ) << INPUT_FREQ_SHIFT is the desired frequency after prescaler.
++ * At HZ == 200, HZ * 1024 should work for PCLKs of up to ~53.5 MHz.
++ */
++#define INPUT_FREQ_SHIFT 9
++
++static int ticks_last;
++static int ticks_left;
++static uint32_t tcnto_last;
++
++static inline int s3c24xx_timer_read(void)
++{
++ uint32_t tcnto = __raw_readl(S3C2410_TCNTO(4));
++
++ /*
++ * WARNING: sometimes we get called before TCNTB has been
++ * loaded into the counter and TCNTO then returns its previous
++ * value and kill us, so don't do anything before counter is
++ * reloaded.
++ */
++ if (unlikely(tcnto == tcnto_last))
++ return ticks_last;
++
++ tcnto_last = -1;
++ return tcnto <<
++ ((__raw_readl(S3C2410_TCFG1) >> S3C2410_TCFG1_MUX4_SHIFT) & 3);
++}
++
++static inline void s3c24xx_timer_program(int ticks)
++{
++ uint32_t tcon = __raw_readl(S3C2410_TCON) & ~(7 << 20);
++ uint32_t tcfg1 = __raw_readl(S3C2410_TCFG1) & ~S3C2410_TCFG1_MUX4_MASK;
++
++ /* Just make sure the timer is stopped. */
++ __raw_writel(tcon, S3C2410_TCON);
++
++ /* TODO: add likely()ies / unlikely()ies */
++ if (ticks >> 18) {
++ ticks_last = min(ticks, 0xffff << 3);
++ ticks_left = ticks - ticks_last;
++ __raw_writel(tcfg1 | S3C2410_TCFG1_MUX4_DIV16, S3C2410_TCFG1);
++ __raw_writel(ticks_last >> 3, S3C2410_TCNTB(4));
++ } else if (ticks >> 17) {
++ ticks_last = ticks;
++ ticks_left = 0;
++ __raw_writel(tcfg1 | S3C2410_TCFG1_MUX4_DIV8, S3C2410_TCFG1);
++ __raw_writel(ticks_last >> 2, S3C2410_TCNTB(4));
++ } else if (ticks >> 16) {
++ ticks_last = ticks;
++ ticks_left = 0;
++ __raw_writel(tcfg1 | S3C2410_TCFG1_MUX4_DIV4, S3C2410_TCFG1);
++ __raw_writel(ticks_last >> 1, S3C2410_TCNTB(4));
++ } else {
++ ticks_last = ticks;
++ ticks_left = 0;
++ __raw_writel(tcfg1 | S3C2410_TCFG1_MUX4_DIV2, S3C2410_TCFG1);
++ __raw_writel(ticks_last >> 0, S3C2410_TCNTB(4));
++ }
++
++ tcnto_last = __raw_readl(S3C2410_TCNTO(4));
++ __raw_writel(tcon | S3C2410_TCON_T4MANUALUPD,
++ S3C2410_TCON);
++ __raw_writel(tcon | S3C2410_TCON_T4START,
++ S3C2410_TCON);
++}
++
++/*
++ * If we have already waited all the time we were supposed to wait,
++ * kick the timer, setting the longest allowed timeout value just
++ * for time-keeping.
++ */
++static inline void s3c24xx_timer_program_idle(void)
++{
++ s3c24xx_timer_program(0xffff << 3);
++}
++
++static inline void s3c24xx_timer_update(int restart)
++{
++ int ticks_cur = s3c24xx_timer_read();
++ int jiffies_elapsed = (ticks_last - ticks_cur) >> INPUT_FREQ_SHIFT;
++ int subjiffy = ticks_last - (jiffies_elapsed << INPUT_FREQ_SHIFT);
++
++ if (restart) {
++ if (ticks_left >= (1 << INPUT_FREQ_SHIFT))
++ s3c24xx_timer_program(ticks_left);
++ else
++ s3c24xx_timer_program_idle();
++ ticks_last += subjiffy;
++ } else
++ ticks_last = subjiffy;
++
++ while (jiffies_elapsed --)
++ timer_tick();
++}
++
++/* Called when the timer expires. */
++static irqreturn_t s3c24xx_timer_handler(int irq, void *dev_id)
++{
++ tcnto_last = -1;
++ s3c24xx_timer_update(1);
++
++ return IRQ_HANDLED;
++}
++
++/* Called to update jiffies with time elapsed. */
++static irqreturn_t s3c24xx_timer_handler_dyn_tick(int irq, void *dev_id)
++{
++ s3c24xx_timer_update(0);
++
++ return IRQ_HANDLED;
++}
++
++/*
++ * Programs the next timer interrupt needed. Called when dynamic tick is
++ * enabled, and to reprogram the ticks to skip from pm_idle. The CPU goes
++ * to sleep directly after this.
++ */
++static void s3c24xx_timer_reprogram_dyn_tick(unsigned long next_jiffies)
++{
++ int subjiffy_left = ticks_last - s3c24xx_timer_read();
++
++ s3c24xx_timer_program(max((int) next_jiffies, 1) << INPUT_FREQ_SHIFT);
++ ticks_last += subjiffy_left;
++}
++
++static unsigned long s3c24xx_timer_offset_dyn_tick(void)
++{
++ /* TODO */
++ return 0;
++}
++
++static int s3c24xx_timer_enable_dyn_tick(void)
++{
++ /* Set our constant prescaler. */
++ uint32_t tcfg0 = __raw_readl(S3C2410_TCFG0);
++ int prescaler =
++ max(min(256, (int) pclk / (HZ << (INPUT_FREQ_SHIFT + 1))), 1);
++
++ tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
++ tcfg0 |= (prescaler - 1) << S3C2410_TCFG_PRESCALER1_SHIFT;
++ __raw_writel(tcfg0, S3C2410_TCFG0);
++
++ /* Override handlers. */
++ s3c2410_timer_irq.handler = s3c24xx_timer_handler;
++ s3c24xx_timer.offset = s3c24xx_timer_offset_dyn_tick;
++
++ printk(KERN_INFO "dyn_tick enabled on s3c24xx timer 4, "
++ "%li Hz pclk with prescaler %i\n", pclk, prescaler);
++
++ s3c24xx_timer_program_idle();
++
++ return 0;
++}
++
++static int s3c24xx_timer_disable_dyn_tick(void)
++{
++ s3c2410_timer_irq.handler = s3c2410_timer_interrupt;
++ s3c24xx_timer.offset = s3c2410_gettimeoffset;
++ s3c2410_timer_setup();
++
++ return 0;
++}
++
++static struct dyn_tick_timer s3c24xx_dyn_tick_timer = {
++ .enable = s3c24xx_timer_enable_dyn_tick,
++ .disable = s3c24xx_timer_disable_dyn_tick,
++ .reprogram = s3c24xx_timer_reprogram_dyn_tick,
++ .handler = s3c24xx_timer_handler_dyn_tick,
++};
++#endif /* CONFIG_NO_IDLE_HZ */
++
+ struct sys_timer s3c24xx_timer = {
+ .init = s3c2410_timer_init,
+ .offset = s3c2410_gettimeoffset,
+- .resume = s3c2410_timer_setup
++ .resume = s3c2410_timer_resume,
++#ifdef CONFIG_NO_IDLE_HZ
++ .dyn_tick = &s3c24xx_dyn_tick_timer,
++#endif
+ };
+Index: linux-2.6.24.7/defconfig-gta01
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/defconfig-gta01 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,1770 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24
++# Mon Feb 25 07:03:56 2008
++#
++CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_GENERIC_GPIO=y
++# CONFIG_GENERIC_TIME is not set
++# CONFIG_GENERIC_CLOCKEVENTS is not set
++CONFIG_MMU=y
++CONFIG_NO_IOPORT=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_ZONE_DMA=y
++CONFIG_FIQ=y
++CONFIG_VECTORS_BASE=0xffff0000
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_LOCK_KERNEL=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++# CONFIG_AUDIT is not set
++CONFIG_IKCONFIG=y
++CONFIG_IKCONFIG_PROC=y
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++# CONFIG_FAIR_GROUP_SCHED is not set
++# CONFIG_SYSFS_DEPRECATED is not set
++# CONFIG_RELAY is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++# CONFIG_EMBEDDED is not set
++CONFIG_UID16=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_SLAB=y
++# CONFIG_SLUB is not set
++# CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODULE_FORCE_UNLOAD=y
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_KMOD=y
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=m
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=m
++# CONFIG_DEFAULT_AS is not set
++CONFIG_DEFAULT_DEADLINE=y
++# CONFIG_DEFAULT_CFQ is not set
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="deadline"
++
++#
++# System Type
++#
++# CONFIG_ARCH_AAEC2000 is not set
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++# CONFIG_ARCH_AT91 is not set
++# CONFIG_ARCH_CLPS7500 is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_CO285 is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IMX is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_L7200 is not set
++# CONFIG_ARCH_KS8695 is not set
++# CONFIG_ARCH_NS9XXX is not set
++# CONFIG_ARCH_MXC is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++CONFIG_ARCH_S3C2410=y
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_LH7A40X is not set
++# CONFIG_ARCH_DAVINCI is not set
++# CONFIG_ARCH_OMAP is not set
++CONFIG_PLAT_S3C24XX=y
++CONFIG_CPU_S3C244X=y
++CONFIG_S3C2410_DMA=y
++# CONFIG_S3C2410_DMA_DEBUG is not set
++CONFIG_MACH_SMDK=y
++CONFIG_MACH_NEO1973=y
++CONFIG_PLAT_S3C=y
++CONFIG_CPU_LLSERIAL_S3C2410=y
++CONFIG_CPU_LLSERIAL_S3C2440=y
++
++#
++# Boot options
++#
++# CONFIG_S3C_BOOT_WATCHDOG is not set
++# CONFIG_S3C_BOOT_ERROR_RESET is not set
++
++#
++# Power management
++#
++# CONFIG_S3C2410_PM_DEBUG is not set
++# CONFIG_S3C2410_PM_CHECK is not set
++CONFIG_S3C_LOWLEVEL_UART_PORT=0
++
++#
++# S3C2400 Machines
++#
++CONFIG_CPU_S3C2410=y
++CONFIG_CPU_S3C2410_DMA=y
++CONFIG_S3C2410_PM=y
++CONFIG_S3C2410_GPIO=y
++CONFIG_S3C2410_CLOCK=y
++CONFIG_S3C2410_PWM=y
++
++#
++# S3C2410 Machines
++#
++# CONFIG_ARCH_SMDK2410 is not set
++# CONFIG_ARCH_H1940 is not set
++# CONFIG_MACH_N30 is not set
++# CONFIG_ARCH_BAST is not set
++# CONFIG_MACH_OTOM is not set
++# CONFIG_MACH_AML_M5900 is not set
++# CONFIG_MACH_VR1000 is not set
++CONFIG_MACH_QT2410=y
++CONFIG_MACH_NEO1973_GTA01=y
++
++#
++# S3C2412 Machines
++#
++# CONFIG_MACH_SMDK2413 is not set
++# CONFIG_MACH_SMDK2412 is not set
++# CONFIG_MACH_VSTMS is not set
++CONFIG_CPU_S3C2440=y
++CONFIG_S3C2440_DMA=y
++CONFIG_S3C2440_C_FIQ=y
++
++#
++# S3C2440 Machines
++#
++# CONFIG_MACH_ANUBIS is not set
++# CONFIG_MACH_OSIRIS is not set
++# CONFIG_MACH_RX3715 is not set
++CONFIG_ARCH_S3C2440=y
++# CONFIG_MACH_NEXCODER_2440 is not set
++CONFIG_SMDK2440_CPU2440=y
++CONFIG_MACH_HXD8=y
++CONFIG_MACH_NEO1973_GTA02=y
++# CONFIG_NEO1973_GTA02_2440 is not set
++CONFIG_CPU_S3C2442=y
++
++#
++# S3C2442 Machines
++#
++CONFIG_SMDK2440_CPU2442=y
++
++#
++# S3C2443 Machines
++#
++# CONFIG_MACH_SMDK2443 is not set
++
++#
++# Processor Type
++#
++CONFIG_CPU_32=y
++CONFIG_CPU_ARM920T=y
++CONFIG_CPU_32v4T=y
++CONFIG_CPU_ABRT_EV4T=y
++CONFIG_CPU_CACHE_V4WT=y
++CONFIG_CPU_CACHE_VIVT=y
++CONFIG_CPU_COPY_V4WB=y
++CONFIG_CPU_TLB_V4WBI=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++
++#
++# Processor Features
++#
++CONFIG_ARM_THUMB=y
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
++# CONFIG_OUTER_CACHE is not set
++
++#
++# Bus support
++#
++# CONFIG_PCI_SYSCALL is not set
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Kernel Features
++#
++# CONFIG_TICK_ONESHOT is not set
++CONFIG_PREEMPT=y
++CONFIG_NO_IDLE_HZ=y
++CONFIG_HZ=200
++CONFIG_AEABI=y
++CONFIG_OABI_COMPAT=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4096
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=1
++CONFIG_BOUNCE=y
++CONFIG_VIRT_TO_BUS=y
++CONFIG_ALIGNMENT_TRAP=y
++
++#
++# Boot options
++#
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE="unused -- bootloader passes ATAG list"
++# CONFIG_XIP_KERNEL is not set
++CONFIG_KEXEC=y
++CONFIG_ATAGS_PROC=y
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++CONFIG_FPE_NWFPE=y
++# CONFIG_FPE_NWFPE_XP is not set
++# CONFIG_FPE_FASTFPE is not set
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_AOUT is not set
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Power management options
++#
++CONFIG_PM=y
++CONFIG_PM_LEGACY=y
++CONFIG_PM_DEBUG=y
++# CONFIG_PM_VERBOSE is not set
++CONFIG_PM_SLEEP=y
++CONFIG_SUSPEND_UP_POSSIBLE=y
++CONFIG_SUSPEND=y
++CONFIG_APM_EMULATION=y
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++# CONFIG_XFRM_USER is not set
++# CONFIG_XFRM_SUB_POLICY is not set
++CONFIG_XFRM_MIGRATE=y
++CONFIG_NET_KEY=m
++CONFIG_NET_KEY_MIGRATE=y
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_ADVANCED_ROUTER=y
++CONFIG_ASK_IP_FIB_HASH=y
++# CONFIG_IP_FIB_TRIE is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_MULTIPLE_TABLES=y
++# CONFIG_IP_ROUTE_MULTIPATH is not set
++# CONFIG_IP_ROUTE_VERBOSE is not set
++CONFIG_IP_PNP=y
++# CONFIG_IP_PNP_DHCP is not set
++# CONFIG_IP_PNP_BOOTP is not set
++# CONFIG_IP_PNP_RARP is not set
++CONFIG_NET_IPIP=m
++CONFIG_NET_IPGRE=m
++# CONFIG_NET_IPGRE_BROADCAST is not set
++# CONFIG_IP_MROUTE is not set
++# CONFIG_ARPD is not set
++CONFIG_SYN_COOKIES=y
++CONFIG_INET_AH=m
++CONFIG_INET_ESP=m
++CONFIG_INET_IPCOMP=m
++CONFIG_INET_XFRM_TUNNEL=m
++CONFIG_INET_TUNNEL=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=m
++CONFIG_INET_XFRM_MODE_TUNNEL=m
++CONFIG_INET_XFRM_MODE_BEET=m
++# CONFIG_INET_LRO is not set
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++CONFIG_TCP_MD5SIG=y
++# CONFIG_IP_VS is not set
++CONFIG_IPV6=m
++# CONFIG_IPV6_PRIVACY is not set
++# CONFIG_IPV6_ROUTER_PREF is not set
++# CONFIG_IPV6_OPTIMISTIC_DAD is not set
++CONFIG_INET6_AH=m
++CONFIG_INET6_ESP=m
++CONFIG_INET6_IPCOMP=m
++# CONFIG_IPV6_MIP6 is not set
++CONFIG_INET6_XFRM_TUNNEL=m
++CONFIG_INET6_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_TRANSPORT=m
++CONFIG_INET6_XFRM_MODE_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_BEET=m
++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
++CONFIG_IPV6_SIT=m
++CONFIG_IPV6_TUNNEL=m
++# CONFIG_IPV6_MULTIPLE_TABLES is not set
++# CONFIG_NETWORK_SECMARK is not set
++CONFIG_NETFILTER=y
++# CONFIG_NETFILTER_DEBUG is not set
++
++#
++# Core Netfilter Configuration
++#
++CONFIG_NETFILTER_NETLINK=m
++CONFIG_NETFILTER_NETLINK_QUEUE=m
++CONFIG_NETFILTER_NETLINK_LOG=m
++CONFIG_NF_CONNTRACK_ENABLED=m
++CONFIG_NF_CONNTRACK=m
++CONFIG_NF_CT_ACCT=y
++CONFIG_NF_CONNTRACK_MARK=y
++CONFIG_NF_CONNTRACK_EVENTS=y
++CONFIG_NF_CT_PROTO_GRE=m
++CONFIG_NF_CT_PROTO_SCTP=m
++# CONFIG_NF_CT_PROTO_UDPLITE is not set
++# CONFIG_NF_CONNTRACK_AMANDA is not set
++CONFIG_NF_CONNTRACK_FTP=m
++CONFIG_NF_CONNTRACK_H323=m
++CONFIG_NF_CONNTRACK_IRC=m
++CONFIG_NF_CONNTRACK_NETBIOS_NS=m
++CONFIG_NF_CONNTRACK_PPTP=m
++CONFIG_NF_CONNTRACK_SANE=m
++CONFIG_NF_CONNTRACK_SIP=m
++CONFIG_NF_CONNTRACK_TFTP=m
++CONFIG_NF_CT_NETLINK=m
++CONFIG_NETFILTER_XTABLES=m
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
++CONFIG_NETFILTER_XT_TARGET_DSCP=m
++CONFIG_NETFILTER_XT_TARGET_MARK=m
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
++CONFIG_NETFILTER_XT_TARGET_NFLOG=m
++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
++# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
++CONFIG_NETFILTER_XT_MATCH_DCCP=m
++CONFIG_NETFILTER_XT_MATCH_DSCP=m
++CONFIG_NETFILTER_XT_MATCH_ESP=m
++CONFIG_NETFILTER_XT_MATCH_HELPER=m
++CONFIG_NETFILTER_XT_MATCH_LENGTH=m
++CONFIG_NETFILTER_XT_MATCH_LIMIT=m
++CONFIG_NETFILTER_XT_MATCH_MAC=m
++CONFIG_NETFILTER_XT_MATCH_MARK=m
++CONFIG_NETFILTER_XT_MATCH_POLICY=m
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
++CONFIG_NETFILTER_XT_MATCH_QUOTA=m
++CONFIG_NETFILTER_XT_MATCH_REALM=m
++CONFIG_NETFILTER_XT_MATCH_SCTP=m
++CONFIG_NETFILTER_XT_MATCH_STATE=m
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
++CONFIG_NETFILTER_XT_MATCH_STRING=m
++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_TIME is not set
++# CONFIG_NETFILTER_XT_MATCH_U32 is not set
++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
++
++#
++# IP: Netfilter Configuration
++#
++CONFIG_NF_CONNTRACK_IPV4=m
++CONFIG_NF_CONNTRACK_PROC_COMPAT=y
++# CONFIG_IP_NF_QUEUE is not set
++CONFIG_IP_NF_IPTABLES=m
++CONFIG_IP_NF_MATCH_IPRANGE=m
++CONFIG_IP_NF_MATCH_TOS=m
++# CONFIG_IP_NF_MATCH_RECENT is not set
++CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_AH=m
++CONFIG_IP_NF_MATCH_TTL=m
++CONFIG_IP_NF_MATCH_OWNER=m
++CONFIG_IP_NF_MATCH_ADDRTYPE=m
++CONFIG_IP_NF_FILTER=m
++CONFIG_IP_NF_TARGET_REJECT=m
++CONFIG_IP_NF_TARGET_LOG=m
++CONFIG_IP_NF_TARGET_ULOG=m
++CONFIG_NF_NAT=m
++CONFIG_NF_NAT_NEEDED=y
++CONFIG_IP_NF_TARGET_MASQUERADE=m
++CONFIG_IP_NF_TARGET_REDIRECT=m
++CONFIG_IP_NF_TARGET_NETMAP=m
++CONFIG_IP_NF_TARGET_SAME=m
++CONFIG_NF_NAT_SNMP_BASIC=m
++CONFIG_NF_NAT_PROTO_GRE=m
++CONFIG_NF_NAT_FTP=m
++CONFIG_NF_NAT_IRC=m
++CONFIG_NF_NAT_TFTP=m
++# CONFIG_NF_NAT_AMANDA is not set
++CONFIG_NF_NAT_PPTP=m
++CONFIG_NF_NAT_H323=m
++CONFIG_NF_NAT_SIP=m
++CONFIG_IP_NF_MANGLE=m
++CONFIG_IP_NF_TARGET_TOS=m
++CONFIG_IP_NF_TARGET_ECN=m
++CONFIG_IP_NF_TARGET_TTL=m
++CONFIG_IP_NF_TARGET_CLUSTERIP=m
++# CONFIG_IP_NF_RAW is not set
++# CONFIG_IP_NF_ARPTABLES is not set
++
++#
++# IPv6: Netfilter Configuration (EXPERIMENTAL)
++#
++CONFIG_NF_CONNTRACK_IPV6=m
++# CONFIG_IP6_NF_QUEUE is not set
++CONFIG_IP6_NF_IPTABLES=m
++CONFIG_IP6_NF_MATCH_RT=m
++CONFIG_IP6_NF_MATCH_OPTS=m
++CONFIG_IP6_NF_MATCH_FRAG=m
++CONFIG_IP6_NF_MATCH_HL=m
++CONFIG_IP6_NF_MATCH_OWNER=m
++CONFIG_IP6_NF_MATCH_IPV6HEADER=m
++CONFIG_IP6_NF_MATCH_AH=m
++CONFIG_IP6_NF_MATCH_MH=m
++CONFIG_IP6_NF_MATCH_EUI64=m
++CONFIG_IP6_NF_FILTER=m
++CONFIG_IP6_NF_TARGET_LOG=m
++CONFIG_IP6_NF_TARGET_REJECT=m
++CONFIG_IP6_NF_MANGLE=m
++CONFIG_IP6_NF_TARGET_HL=m
++# CONFIG_IP6_NF_RAW is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++CONFIG_NET_SCHED=y
++
++#
++# Queueing/Scheduling
++#
++CONFIG_NET_SCH_CBQ=m
++CONFIG_NET_SCH_HTB=m
++CONFIG_NET_SCH_HFSC=m
++CONFIG_NET_SCH_PRIO=m
++# CONFIG_NET_SCH_RR is not set
++CONFIG_NET_SCH_RED=m
++CONFIG_NET_SCH_SFQ=m
++CONFIG_NET_SCH_TEQL=m
++CONFIG_NET_SCH_TBF=m
++CONFIG_NET_SCH_GRED=m
++CONFIG_NET_SCH_DSMARK=m
++CONFIG_NET_SCH_NETEM=m
++CONFIG_NET_SCH_INGRESS=m
++
++#
++# Classification
++#
++CONFIG_NET_CLS=y
++CONFIG_NET_CLS_BASIC=m
++CONFIG_NET_CLS_TCINDEX=m
++CONFIG_NET_CLS_ROUTE4=m
++CONFIG_NET_CLS_ROUTE=y
++CONFIG_NET_CLS_FW=m
++CONFIG_NET_CLS_U32=m
++CONFIG_CLS_U32_PERF=y
++CONFIG_CLS_U32_MARK=y
++CONFIG_NET_CLS_RSVP=m
++CONFIG_NET_CLS_RSVP6=m
++# CONFIG_NET_EMATCH is not set
++# CONFIG_NET_CLS_ACT is not set
++# CONFIG_NET_CLS_POLICE is not set
++# CONFIG_NET_CLS_IND is not set
++CONFIG_NET_SCH_FIFO=y
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++CONFIG_BT=m
++CONFIG_BT_L2CAP=m
++CONFIG_BT_SCO=m
++CONFIG_BT_RFCOMM=m
++CONFIG_BT_RFCOMM_TTY=y
++CONFIG_BT_BNEP=m
++CONFIG_BT_BNEP_MC_FILTER=y
++CONFIG_BT_BNEP_PROTO_FILTER=y
++CONFIG_BT_HIDP=m
++
++#
++# Bluetooth device drivers
++#
++CONFIG_BT_HCIUSB=m
++CONFIG_BT_HCIUSB_SCO=y
++# CONFIG_BT_HCIBTSDIO is not set
++# CONFIG_BT_HCIUART is not set
++# CONFIG_BT_HCIBCM203X is not set
++# CONFIG_BT_HCIBPA10X is not set
++# CONFIG_BT_HCIBFUSB is not set
++# CONFIG_BT_HCIVHCI is not set
++# CONFIG_AF_RXRPC is not set
++CONFIG_FIB_RULES=y
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++CONFIG_WIRELESS_EXT=y
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++CONFIG_FW_LOADER=m
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++CONFIG_CONNECTOR=m
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++# CONFIG_MTD_AFS_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++CONFIG_MTD_CFI_INTELEXT=y
++# CONFIG_MTD_CFI_AMDSTD is not set
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++CONFIG_MTD_ABSENT=y
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_ARM_INTEGRATOR is not set
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++CONFIG_MTD_NAND=y
++CONFIG_MTD_NAND_VERIFY_WRITE=y
++# CONFIG_MTD_NAND_ECC_SMC is not set
++# CONFIG_MTD_NAND_MUSEUM_IDS is not set
++CONFIG_MTD_NAND_IDS=y
++CONFIG_MTD_NAND_S3C2410=y
++# CONFIG_MTD_NAND_S3C2410_DEBUG is not set
++CONFIG_MTD_NAND_S3C2410_HWECC=y
++# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++# CONFIG_MTD_NAND_NANDSIM is not set
++# CONFIG_MTD_NAND_PLATFORM is not set
++# CONFIG_MTD_ALAUDA is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++CONFIG_PNP=y
++CONFIG_PNP_DEBUG=y
++
++#
++# Protocols
++#
++# CONFIG_PNPACPI is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=m
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++# CONFIG_BLK_DEV_NBD is not set
++CONFIG_BLK_DEV_UB=m
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=4096
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=m
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++# CONFIG_BLK_DEV_SR_VENDOR is not set
++CONFIG_CHR_DEV_SG=m
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++CONFIG_SCSI_SCAN_ASYNC=y
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++CONFIG_TUN=m
++# CONFIG_VETH is not set
++# CONFIG_NET_SB1000 is not set
++# CONFIG_PHYLIB is not set
++CONFIG_NET_ETHERNET=y
++CONFIG_MII=y
++# CONFIG_AX88796 is not set
++# CONFIG_SMC91X is not set
++# CONFIG_DM9000 is not set
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++CONFIG_NET_PCI=y
++# CONFIG_B44 is not set
++CONFIG_CS89x0=m
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++
++#
++# USB Network Adapters
++#
++CONFIG_USB_CATC=m
++CONFIG_USB_KAWETH=m
++CONFIG_USB_PEGASUS=m
++CONFIG_USB_RTL8150=m
++CONFIG_USB_USBNET=y
++CONFIG_USB_NET_AX8817X=m
++CONFIG_USB_NET_CDCETHER=m
++CONFIG_USB_NET_DM9601=m
++CONFIG_USB_NET_GL620A=m
++CONFIG_USB_NET_NET1080=m
++CONFIG_USB_NET_PLUSB=m
++CONFIG_USB_NET_MCS7830=m
++CONFIG_USB_NET_RNDIS_HOST=m
++CONFIG_USB_NET_CDC_SUBSET=m
++CONFIG_USB_ALI_M5632=y
++CONFIG_USB_AN2720=y
++CONFIG_USB_BELKIN=y
++CONFIG_USB_ARMLINUX=y
++CONFIG_USB_EPSON2888=y
++CONFIG_USB_KC2190=y
++CONFIG_USB_NET_ZAURUS=m
++# CONFIG_WAN is not set
++CONFIG_PPP=m
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_ASYNC=m
++CONFIG_PPP_SYNC_TTY=m
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++CONFIG_PPP_MPPE=m
++# CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_POLLDEV is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640
++# CONFIG_INPUT_JOYDEV is not set
++CONFIG_INPUT_EVDEV=y
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++CONFIG_KEYBOARD_STOWAWAY=m
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_KEYBOARD_NEO1973=y
++CONFIG_KEYBOARD_QT2410=y
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++# CONFIG_MOUSE_GPIO is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++CONFIG_INPUT_TOUCHSCREEN=y
++# CONFIG_TOUCHSCREEN_ADS7846 is not set
++# CONFIG_TOUCHSCREEN_FUJITSU is not set
++CONFIG_TOUCHSCREEN_S3C2410=y
++# CONFIG_TOUCHSCREEN_S3C2410_DEBUG is not set
++# CONFIG_TOUCHSCREEN_GUNZE is not set
++# CONFIG_TOUCHSCREEN_ELO is not set
++# CONFIG_TOUCHSCREEN_MTOUCH is not set
++# CONFIG_TOUCHSCREEN_MK712 is not set
++# CONFIG_TOUCHSCREEN_PENMOUNT is not set
++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
++# CONFIG_TOUCHSCREEN_UCB1400 is not set
++# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
++CONFIG_INPUT_MISC=y
++# CONFIG_INPUT_ATI_REMOTE is not set
++# CONFIG_INPUT_ATI_REMOTE2 is not set
++# CONFIG_INPUT_KEYSPAN_REMOTE is not set
++# CONFIG_INPUT_POWERMATE is not set
++# CONFIG_INPUT_YEALINK is not set
++CONFIG_INPUT_UINPUT=m
++CONFIG_INPUT_LIS302DL=y
++
++#
++# Hardware I/O ports
++#
++CONFIG_SERIO=y
++# CONFIG_SERIO_SERPORT is not set
++# CONFIG_SERIO_RAW is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_VT_CONSOLE=y
++CONFIG_NR_TTY_DEVICES=4
++CONFIG_HW_CONSOLE=y
++CONFIG_VT_HW_CONSOLE_BINDING=y
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_S3C2410=y
++CONFIG_SERIAL_S3C2410_CONSOLE=y
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_NVRAM is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=y
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=y
++
++#
++# I2C Algorithms
++#
++# CONFIG_I2C_ALGOBIT is not set
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++# CONFIG_I2C_GPIO is not set
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++CONFIG_I2C_S3C2410=y
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++# CONFIG_I2C_TINY_USB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++CONFIG_SENSORS_PCF50606=y
++CONFIG_SENSORS_PCF50633=y
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++CONFIG_SENSORS_TSL256X=m
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_BITBANG=y
++CONFIG_SPI_S3C24XX=y
++CONFIG_SPI_S3C24XX_GPIO=y
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++CONFIG_POWER_SUPPLY=y
++# CONFIG_POWER_SUPPLY_DEBUG is not set
++# CONFIG_PDA_POWER is not set
++# CONFIG_APM_POWER is not set
++# CONFIG_BATTERY_DS2760 is not set
++CONFIG_BATTERY_GTA01=y
++CONFIG_BATTERY_BQ27000_HDQ=y
++CONFIG_GTA02_HDQ=y
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_S3C2410_WATCHDOG=m
++
++#
++# USB-based Watchdog Cards
++#
++# CONFIG_USBPCWATCHDOG is not set
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++CONFIG_MFD_GLAMO=y
++CONFIG_MFD_GLAMO_FB=y
++CONFIG_MFD_GLAMO_SPI_GPIO=y
++CONFIG_MFD_GLAMO_SPI_FB=y
++CONFIG_MFD_GLAMO_MCI=y
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++CONFIG_DAB=y
++# CONFIG_USB_DABUSB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_UVESA is not set
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_S3C2410=y
++# CONFIG_FB_S3C2410_DEBUG is not set
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++# CONFIG_LCD_LTV350QV is not set
++CONFIG_BACKLIGHT_CLASS_DEVICE=y
++# CONFIG_BACKLIGHT_CORGI is not set
++CONFIG_BACKLIGHT_GTA01=y
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++CONFIG_DISPLAY_JBT6K74=y
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++CONFIG_FRAMEBUFFER_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
++# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
++CONFIG_FONTS=y
++# CONFIG_FONT_8x8 is not set
++# CONFIG_FONT_8x16 is not set
++CONFIG_FONT_6x11=y
++# CONFIG_FONT_7x14 is not set
++# CONFIG_FONT_PEARL_8x8 is not set
++# CONFIG_FONT_ACORN_8x8 is not set
++# CONFIG_FONT_MINI_4x6 is not set
++# CONFIG_FONT_SUN8x16 is not set
++# CONFIG_FONT_SUN12x22 is not set
++# CONFIG_FONT_10x18 is not set
++# CONFIG_LOGO is not set
++
++#
++# Sound
++#
++CONFIG_SOUND=y
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# ALSA ARM devices
++#
++
++#
++# SPI devices
++#
++
++#
++# USB devices
++#
++# CONFIG_SND_USB_AUDIO is not set
++# CONFIG_SND_USB_CAIAQ is not set
++
++#
++# System on Chip audio support
++#
++CONFIG_SND_SOC=m
++CONFIG_SND_S3C24XX_SOC=m
++CONFIG_SND_S3C24XX_SOC_I2S=m
++CONFIG_SND_S3C24XX_SOC_NEO1973_WM8753=m
++CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753=m
++
++#
++# SoC Audio support for SuperH
++#
++CONFIG_SND_SOC_WM8753=m
++
++#
++# Open Sound System
++#
++# CONFIG_SOUND_PRIME is not set
++CONFIG_HID_SUPPORT=y
++CONFIG_HID=y
++# CONFIG_HID_DEBUG is not set
++# CONFIG_HIDRAW is not set
++
++#
++# USB Input Devices
++#
++CONFIG_USB_HID=m
++# CONFIG_USB_HIDINPUT_POWERBOOK is not set
++# CONFIG_HID_FF is not set
++# CONFIG_USB_HIDDEV is not set
++
++#
++# USB HID Boot Protocol drivers
++#
++# CONFIG_USB_KBD is not set
++# CONFIG_USB_MOUSE is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++CONFIG_USB=y
++# CONFIG_USB_DEBUG is not set
++
++#
++# Miscellaneous USB options
++#
++CONFIG_USB_DEVICEFS=y
++CONFIG_USB_DEVICE_CLASS=y
++# CONFIG_USB_DYNAMIC_MINORS is not set
++CONFIG_USB_SUSPEND=y
++# CONFIG_USB_PERSIST is not set
++# CONFIG_USB_OTG is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_ISP116X_HCD is not set
++CONFIG_USB_OHCI_HCD=m
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
++CONFIG_USB_OHCI_LITTLE_ENDIAN=y
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++
++#
++# USB Device Class drivers
++#
++CONFIG_USB_ACM=m
++CONFIG_USB_PRINTER=m
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# may also be needed; see USB_STORAGE Help for more information
++#
++CONFIG_USB_STORAGE=m
++# CONFIG_USB_STORAGE_DEBUG is not set
++CONFIG_USB_STORAGE_DATAFAB=y
++CONFIG_USB_STORAGE_FREECOM=y
++# CONFIG_USB_STORAGE_ISD200 is not set
++CONFIG_USB_STORAGE_DPCM=y
++CONFIG_USB_STORAGE_USBAT=y
++CONFIG_USB_STORAGE_SDDR09=y
++CONFIG_USB_STORAGE_SDDR55=y
++CONFIG_USB_STORAGE_JUMPSHOT=y
++CONFIG_USB_STORAGE_ALAUDA=y
++CONFIG_USB_STORAGE_KARMA=y
++CONFIG_USB_LIBUSUAL=y
++
++#
++# USB Imaging devices
++#
++# CONFIG_USB_MDC800 is not set
++# CONFIG_USB_MICROTEK is not set
++CONFIG_USB_MON=y
++
++#
++# USB port drivers
++#
++
++#
++# USB Serial Converter support
++#
++CONFIG_USB_SERIAL=m
++CONFIG_USB_SERIAL_GENERIC=y
++CONFIG_USB_SERIAL_AIRCABLE=m
++CONFIG_USB_SERIAL_AIRPRIME=m
++CONFIG_USB_SERIAL_ARK3116=m
++CONFIG_USB_SERIAL_BELKIN=m
++# CONFIG_USB_SERIAL_CH341 is not set
++CONFIG_USB_SERIAL_WHITEHEAT=m
++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
++CONFIG_USB_SERIAL_CP2101=m
++CONFIG_USB_SERIAL_CYPRESS_M8=m
++CONFIG_USB_SERIAL_EMPEG=m
++CONFIG_USB_SERIAL_FTDI_SIO=m
++CONFIG_USB_SERIAL_FUNSOFT=m
++CONFIG_USB_SERIAL_VISOR=m
++CONFIG_USB_SERIAL_IPAQ=m
++CONFIG_USB_SERIAL_IR=m
++CONFIG_USB_SERIAL_EDGEPORT=m
++CONFIG_USB_SERIAL_EDGEPORT_TI=m
++CONFIG_USB_SERIAL_GARMIN=m
++CONFIG_USB_SERIAL_IPW=m
++CONFIG_USB_SERIAL_KEYSPAN_PDA=m
++CONFIG_USB_SERIAL_KEYSPAN=m
++CONFIG_USB_SERIAL_KEYSPAN_MPR=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19=y
++CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
++CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
++CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
++CONFIG_USB_SERIAL_KLSI=m
++CONFIG_USB_SERIAL_KOBIL_SCT=m
++CONFIG_USB_SERIAL_MCT_U232=m
++CONFIG_USB_SERIAL_MOS7720=m
++CONFIG_USB_SERIAL_MOS7840=m
++CONFIG_USB_SERIAL_NAVMAN=m
++CONFIG_USB_SERIAL_PL2303=m
++# CONFIG_USB_SERIAL_OTI6858 is not set
++CONFIG_USB_SERIAL_HP4X=m
++CONFIG_USB_SERIAL_SAFE=m
++CONFIG_USB_SERIAL_SAFE_PADDED=y
++CONFIG_USB_SERIAL_SIERRAWIRELESS=m
++CONFIG_USB_SERIAL_TI=m
++CONFIG_USB_SERIAL_CYBERJACK=m
++CONFIG_USB_SERIAL_XIRCOM=m
++CONFIG_USB_SERIAL_OPTION=m
++CONFIG_USB_SERIAL_OMNINET=m
++# CONFIG_USB_SERIAL_DEBUG is not set
++CONFIG_USB_EZUSB=y
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_AUERSWALD is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++CONFIG_USB_BERRY_CHARGE=m
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_PHIDGET is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_LD is not set
++CONFIG_USB_TRANCEVIBRATOR=m
++CONFIG_USB_IOWARRIOR=m
++# CONFIG_USB_TEST is not set
++
++#
++# USB DSL modem support
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++# CONFIG_USB_GADGET_ATMEL_USBA is not set
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++CONFIG_USB_GADGET_S3C2410=y
++CONFIG_USB_S3C2410=y
++# CONFIG_USB_S3C2410_DEBUG is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++# CONFIG_USB_GADGET_DUALSPEED is not set
++# CONFIG_USB_ZERO is not set
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=m
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++CONFIG_USB_G_SERIAL=m
++CONFIG_USB_MIDI_GADGET=m
++
++#
++# SDIO support
++#
++CONFIG_SDIO=y
++CONFIG_SDIO_S3C24XX=y
++CONFIG_SDIO_S3C24XX_DMA=y
++CONFIG_SDIO_AR6000_WLAN=y
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++CONFIG_MMC_UNSAFE_RESUME=y
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++# CONFIG_MMC_SPI is not set
++CONFIG_MMC_S3C=y
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_S3C24XX=m
++# CONFIG_LEDS_GPIO is not set
++CONFIG_LEDS_NEO1973_VIBRATOR=y
++CONFIG_LEDS_NEO1973_GTA02=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++CONFIG_RTC_DEBUG=y
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_CMOS is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_S3C=m
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++CONFIG_FS_POSIX_ACL=y
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++CONFIG_ROMFS_FS=y
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++CONFIG_DNOTIFY=y
++# CONFIG_AUTOFS_FS is not set
++CONFIG_AUTOFS4_FS=m
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++CONFIG_ISO9660_FS=m
++CONFIG_JOLIET=y
++# CONFIG_ZISOFS is not set
++CONFIG_UDF_FS=m
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=m
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_YAFFS_FS=y
++CONFIG_YAFFS_YAFFS1=y
++CONFIG_YAFFS_9BYTE_TAGS=y
++CONFIG_YAFFS_YAFFS2=y
++CONFIG_YAFFS_AUTO_YAFFS2=y
++# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
++CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=10
++# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
++# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
++CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++CONFIG_JFFS2_SUMMARY=y
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++CONFIG_CRAMFS=y
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3=y
++# CONFIG_NFS_V3_ACL is not set
++CONFIG_NFS_V4=y
++# CONFIG_NFS_DIRECTIO is not set
++CONFIG_NFSD=m
++CONFIG_NFSD_V3=y
++# CONFIG_NFSD_V3_ACL is not set
++CONFIG_NFSD_V4=y
++CONFIG_NFSD_TCP=y
++CONFIG_ROOT_NFS=y
++CONFIG_LOCKD=y
++CONFIG_LOCKD_V4=y
++CONFIG_EXPORTFS=m
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=y
++CONFIG_SUNRPC_GSS=y
++# CONFIG_SUNRPC_BIND34 is not set
++CONFIG_RPCSEC_GSS_KRB5=y
++# CONFIG_RPCSEC_GSS_SPKM3 is not set
++# CONFIG_SMB_FS is not set
++CONFIG_CIFS=m
++# CONFIG_CIFS_STATS is not set
++CONFIG_CIFS_WEAK_PW_HASH=y
++# CONFIG_CIFS_XATTR is not set
++# CONFIG_CIFS_DEBUG2 is not set
++# CONFIG_CIFS_EXPERIMENTAL is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++CONFIG_NLS_CODEPAGE_850=m
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++CONFIG_NLS_CODEPAGE_936=m
++CONFIG_NLS_CODEPAGE_950=m
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=y
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++# CONFIG_MARKERS is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++# CONFIG_SCHED_DEBUG is not set
++# CONFIG_SCHEDSTATS is not set
++CONFIG_TIMER_STATS=y
++# CONFIG_DEBUG_SLAB is not set
++CONFIG_DEBUG_PREEMPT=y
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++CONFIG_DEBUG_INFO=y
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_SAMPLES is not set
++# CONFIG_DEBUG_USER is not set
++CONFIG_DEBUG_ERRORS=y
++# CONFIG_DEBUG_LL is not set
++CONFIG_DEBUG_S3C_UART=0
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++CONFIG_CRYPTO=y
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_HASH=y
++CONFIG_CRYPTO_MANAGER=y
++CONFIG_CRYPTO_HMAC=y
++CONFIG_CRYPTO_XCBC=m
++CONFIG_CRYPTO_NULL=m
++CONFIG_CRYPTO_MD4=m
++CONFIG_CRYPTO_MD5=y
++CONFIG_CRYPTO_SHA1=m
++CONFIG_CRYPTO_SHA256=m
++CONFIG_CRYPTO_SHA512=m
++CONFIG_CRYPTO_WP512=m
++CONFIG_CRYPTO_TGR192=m
++CONFIG_CRYPTO_GF128MUL=m
++CONFIG_CRYPTO_ECB=m
++CONFIG_CRYPTO_CBC=y
++CONFIG_CRYPTO_PCBC=m
++CONFIG_CRYPTO_LRW=m
++# CONFIG_CRYPTO_XTS is not set
++# CONFIG_CRYPTO_CRYPTD is not set
++CONFIG_CRYPTO_DES=y
++CONFIG_CRYPTO_FCRYPT=m
++CONFIG_CRYPTO_BLOWFISH=m
++CONFIG_CRYPTO_TWOFISH=m
++CONFIG_CRYPTO_TWOFISH_COMMON=m
++CONFIG_CRYPTO_SERPENT=m
++CONFIG_CRYPTO_AES=m
++CONFIG_CRYPTO_CAST5=m
++CONFIG_CRYPTO_CAST6=m
++CONFIG_CRYPTO_TEA=m
++CONFIG_CRYPTO_ARC4=m
++CONFIG_CRYPTO_KHAZAD=m
++CONFIG_CRYPTO_ANUBIS=m
++# CONFIG_CRYPTO_SEED is not set
++CONFIG_CRYPTO_DEFLATE=m
++CONFIG_CRYPTO_MICHAEL_MIC=m
++CONFIG_CRYPTO_CRC32C=m
++CONFIG_CRYPTO_CAMELLIA=m
++CONFIG_CRYPTO_TEST=m
++# CONFIG_CRYPTO_AUTHENC is not set
++CONFIG_CRYPTO_HW=y
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=m
++CONFIG_CRC16=m
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++CONFIG_LIBCRC32C=m
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_TEXTSEARCH=y
++CONFIG_TEXTSEARCH_KMP=m
++CONFIG_TEXTSEARCH_BM=m
++CONFIG_TEXTSEARCH_FSM=m
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_DMA=y
+Index: linux-2.6.24.7/defconfig-gta02
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/defconfig-gta02 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,1758 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24
++# Wed Nov 12 09:11:19 2008
++#
++CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_GENERIC_GPIO=y
++# CONFIG_GENERIC_TIME is not set
++# CONFIG_GENERIC_CLOCKEVENTS is not set
++CONFIG_MMU=y
++CONFIG_NO_IOPORT=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_ZONE_DMA=y
++CONFIG_FIQ=y
++CONFIG_VECTORS_BASE=0xffff0000
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_LOCK_KERNEL=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++# CONFIG_AUDIT is not set
++CONFIG_IKCONFIG=y
++CONFIG_IKCONFIG_PROC=y
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++# CONFIG_FAIR_GROUP_SCHED is not set
++# CONFIG_SYSFS_DEPRECATED is not set
++# CONFIG_RELAY is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++# CONFIG_EMBEDDED is not set
++CONFIG_UID16=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_SLAB=y
++# CONFIG_SLUB is not set
++# CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODULE_FORCE_UNLOAD=y
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_KMOD=y
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=m
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=m
++# CONFIG_DEFAULT_AS is not set
++CONFIG_DEFAULT_DEADLINE=y
++# CONFIG_DEFAULT_CFQ is not set
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="deadline"
++
++#
++# System Type
++#
++# CONFIG_ARCH_AAEC2000 is not set
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++# CONFIG_ARCH_AT91 is not set
++# CONFIG_ARCH_CLPS7500 is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_CO285 is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IMX is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_L7200 is not set
++# CONFIG_ARCH_KS8695 is not set
++# CONFIG_ARCH_NS9XXX is not set
++# CONFIG_ARCH_MXC is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++CONFIG_ARCH_S3C2410=y
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_LH7A40X is not set
++# CONFIG_ARCH_DAVINCI is not set
++# CONFIG_ARCH_OMAP is not set
++CONFIG_PLAT_S3C24XX=y
++CONFIG_CPU_S3C244X=y
++CONFIG_S3C2410_DMA=y
++# CONFIG_S3C2410_DMA_DEBUG is not set
++CONFIG_MACH_SMDK=y
++CONFIG_MACH_NEO1973=y
++CONFIG_PLAT_S3C=y
++CONFIG_CPU_LLSERIAL_S3C2410=y
++CONFIG_CPU_LLSERIAL_S3C2440=y
++
++#
++# Boot options
++#
++# CONFIG_S3C_BOOT_WATCHDOG is not set
++# CONFIG_S3C_BOOT_ERROR_RESET is not set
++
++#
++# Power management
++#
++# CONFIG_S3C2410_PM_CHECK is not set
++CONFIG_S3C_LOWLEVEL_UART_PORT=2
++
++#
++# S3C2400 Machines
++#
++CONFIG_CPU_S3C2410=y
++CONFIG_CPU_S3C2410_DMA=y
++CONFIG_S3C2410_PM=y
++CONFIG_S3C2410_GPIO=y
++CONFIG_S3C2410_CLOCK=y
++CONFIG_S3C2410_PWM=y
++
++#
++# S3C2410 Machines
++#
++# CONFIG_ARCH_SMDK2410 is not set
++# CONFIG_ARCH_H1940 is not set
++# CONFIG_MACH_N30 is not set
++# CONFIG_ARCH_BAST is not set
++# CONFIG_MACH_OTOM is not set
++# CONFIG_MACH_AML_M5900 is not set
++# CONFIG_MACH_VR1000 is not set
++CONFIG_MACH_QT2410=y
++CONFIG_MACH_NEO1973_GTA01=y
++
++#
++# S3C2412 Machines
++#
++# CONFIG_MACH_SMDK2413 is not set
++# CONFIG_MACH_SMDK2412 is not set
++# CONFIG_MACH_VSTMS is not set
++CONFIG_CPU_S3C2440=y
++CONFIG_S3C2440_DMA=y
++CONFIG_S3C2440_C_FIQ=y
++
++#
++# S3C2440 Machines
++#
++# CONFIG_MACH_ANUBIS is not set
++# CONFIG_MACH_OSIRIS is not set
++# CONFIG_MACH_RX3715 is not set
++CONFIG_ARCH_S3C2440=y
++# CONFIG_MACH_NEXCODER_2440 is not set
++CONFIG_SMDK2440_CPU2440=y
++CONFIG_MACH_HXD8=y
++CONFIG_MACH_NEO1973_GTA02=y
++# CONFIG_NEO1973_GTA02_2440 is not set
++CONFIG_CPU_S3C2442=y
++
++#
++# S3C2442 Machines
++#
++CONFIG_SMDK2440_CPU2442=y
++
++#
++# S3C2443 Machines
++#
++# CONFIG_MACH_SMDK2443 is not set
++
++#
++# Processor Type
++#
++CONFIG_CPU_32=y
++CONFIG_CPU_ARM920T=y
++CONFIG_CPU_32v4T=y
++CONFIG_CPU_ABRT_EV4T=y
++CONFIG_CPU_CACHE_V4WT=y
++CONFIG_CPU_CACHE_VIVT=y
++CONFIG_CPU_COPY_V4WB=y
++CONFIG_CPU_TLB_V4WBI=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++
++#
++# Processor Features
++#
++CONFIG_ARM_THUMB=y
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
++# CONFIG_OUTER_CACHE is not set
++
++#
++# Bus support
++#
++# CONFIG_PCI_SYSCALL is not set
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Kernel Features
++#
++# CONFIG_TICK_ONESHOT is not set
++CONFIG_PREEMPT=y
++CONFIG_NO_IDLE_HZ=y
++CONFIG_HZ=200
++CONFIG_AEABI=y
++CONFIG_OABI_COMPAT=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4096
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=1
++CONFIG_BOUNCE=y
++CONFIG_VIRT_TO_BUS=y
++CONFIG_ALIGNMENT_TRAP=y
++
++#
++# Boot options
++#
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE="unused -- bootloader passes ATAG list"
++# CONFIG_XIP_KERNEL is not set
++CONFIG_KEXEC=y
++CONFIG_ATAGS_PROC=y
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++CONFIG_FPE_NWFPE=y
++# CONFIG_FPE_NWFPE_XP is not set
++# CONFIG_FPE_FASTFPE is not set
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_AOUT is not set
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Power management options
++#
++CONFIG_PM=y
++CONFIG_PM_LEGACY=y
++CONFIG_PM_DEBUG=y
++# CONFIG_PM_VERBOSE is not set
++CONFIG_PM_SLEEP=y
++CONFIG_SUSPEND_UP_POSSIBLE=y
++CONFIG_SUSPEND=y
++CONFIG_APM_EMULATION=y
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++# CONFIG_XFRM_USER is not set
++# CONFIG_XFRM_SUB_POLICY is not set
++CONFIG_XFRM_MIGRATE=y
++CONFIG_NET_KEY=m
++CONFIG_NET_KEY_MIGRATE=y
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_ADVANCED_ROUTER=y
++CONFIG_ASK_IP_FIB_HASH=y
++# CONFIG_IP_FIB_TRIE is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_MULTIPLE_TABLES=y
++# CONFIG_IP_ROUTE_MULTIPATH is not set
++# CONFIG_IP_ROUTE_VERBOSE is not set
++CONFIG_IP_PNP=y
++# CONFIG_IP_PNP_DHCP is not set
++# CONFIG_IP_PNP_BOOTP is not set
++# CONFIG_IP_PNP_RARP is not set
++CONFIG_NET_IPIP=m
++CONFIG_NET_IPGRE=m
++# CONFIG_NET_IPGRE_BROADCAST is not set
++# CONFIG_IP_MROUTE is not set
++# CONFIG_ARPD is not set
++CONFIG_SYN_COOKIES=y
++CONFIG_INET_AH=m
++CONFIG_INET_ESP=m
++CONFIG_INET_IPCOMP=m
++CONFIG_INET_XFRM_TUNNEL=m
++CONFIG_INET_TUNNEL=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=m
++CONFIG_INET_XFRM_MODE_TUNNEL=m
++CONFIG_INET_XFRM_MODE_BEET=m
++# CONFIG_INET_LRO is not set
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++CONFIG_TCP_MD5SIG=y
++# CONFIG_IP_VS is not set
++CONFIG_IPV6=m
++# CONFIG_IPV6_PRIVACY is not set
++# CONFIG_IPV6_ROUTER_PREF is not set
++# CONFIG_IPV6_OPTIMISTIC_DAD is not set
++CONFIG_INET6_AH=m
++CONFIG_INET6_ESP=m
++CONFIG_INET6_IPCOMP=m
++# CONFIG_IPV6_MIP6 is not set
++CONFIG_INET6_XFRM_TUNNEL=m
++CONFIG_INET6_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_TRANSPORT=m
++CONFIG_INET6_XFRM_MODE_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_BEET=m
++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
++CONFIG_IPV6_SIT=m
++CONFIG_IPV6_TUNNEL=m
++# CONFIG_IPV6_MULTIPLE_TABLES is not set
++# CONFIG_NETWORK_SECMARK is not set
++CONFIG_NETFILTER=y
++# CONFIG_NETFILTER_DEBUG is not set
++
++#
++# Core Netfilter Configuration
++#
++CONFIG_NETFILTER_NETLINK=m
++CONFIG_NETFILTER_NETLINK_QUEUE=m
++CONFIG_NETFILTER_NETLINK_LOG=m
++CONFIG_NF_CONNTRACK_ENABLED=m
++CONFIG_NF_CONNTRACK=m
++CONFIG_NF_CT_ACCT=y
++CONFIG_NF_CONNTRACK_MARK=y
++CONFIG_NF_CONNTRACK_EVENTS=y
++CONFIG_NF_CT_PROTO_GRE=m
++CONFIG_NF_CT_PROTO_SCTP=m
++# CONFIG_NF_CT_PROTO_UDPLITE is not set
++# CONFIG_NF_CONNTRACK_AMANDA is not set
++CONFIG_NF_CONNTRACK_FTP=m
++CONFIG_NF_CONNTRACK_H323=m
++CONFIG_NF_CONNTRACK_IRC=m
++CONFIG_NF_CONNTRACK_NETBIOS_NS=m
++CONFIG_NF_CONNTRACK_PPTP=m
++CONFIG_NF_CONNTRACK_SANE=m
++CONFIG_NF_CONNTRACK_SIP=m
++CONFIG_NF_CONNTRACK_TFTP=m
++CONFIG_NF_CT_NETLINK=m
++CONFIG_NETFILTER_XTABLES=m
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
++CONFIG_NETFILTER_XT_TARGET_DSCP=m
++CONFIG_NETFILTER_XT_TARGET_MARK=m
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
++CONFIG_NETFILTER_XT_TARGET_NFLOG=m
++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
++# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
++CONFIG_NETFILTER_XT_MATCH_DCCP=m
++CONFIG_NETFILTER_XT_MATCH_DSCP=m
++CONFIG_NETFILTER_XT_MATCH_ESP=m
++CONFIG_NETFILTER_XT_MATCH_HELPER=m
++CONFIG_NETFILTER_XT_MATCH_LENGTH=m
++CONFIG_NETFILTER_XT_MATCH_LIMIT=m
++CONFIG_NETFILTER_XT_MATCH_MAC=m
++CONFIG_NETFILTER_XT_MATCH_MARK=m
++CONFIG_NETFILTER_XT_MATCH_POLICY=m
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
++CONFIG_NETFILTER_XT_MATCH_QUOTA=m
++CONFIG_NETFILTER_XT_MATCH_REALM=m
++CONFIG_NETFILTER_XT_MATCH_SCTP=m
++CONFIG_NETFILTER_XT_MATCH_STATE=m
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
++CONFIG_NETFILTER_XT_MATCH_STRING=m
++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_TIME is not set
++# CONFIG_NETFILTER_XT_MATCH_U32 is not set
++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
++
++#
++# IP: Netfilter Configuration
++#
++CONFIG_NF_CONNTRACK_IPV4=m
++CONFIG_NF_CONNTRACK_PROC_COMPAT=y
++# CONFIG_IP_NF_QUEUE is not set
++CONFIG_IP_NF_IPTABLES=m
++CONFIG_IP_NF_MATCH_IPRANGE=m
++CONFIG_IP_NF_MATCH_TOS=m
++# CONFIG_IP_NF_MATCH_RECENT is not set
++CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_AH=m
++CONFIG_IP_NF_MATCH_TTL=m
++CONFIG_IP_NF_MATCH_OWNER=m
++CONFIG_IP_NF_MATCH_ADDRTYPE=m
++CONFIG_IP_NF_FILTER=m
++CONFIG_IP_NF_TARGET_REJECT=m
++CONFIG_IP_NF_TARGET_LOG=m
++CONFIG_IP_NF_TARGET_ULOG=m
++CONFIG_NF_NAT=m
++CONFIG_NF_NAT_NEEDED=y
++CONFIG_IP_NF_TARGET_MASQUERADE=m
++CONFIG_IP_NF_TARGET_REDIRECT=m
++CONFIG_IP_NF_TARGET_NETMAP=m
++CONFIG_IP_NF_TARGET_SAME=m
++CONFIG_NF_NAT_SNMP_BASIC=m
++CONFIG_NF_NAT_PROTO_GRE=m
++CONFIG_NF_NAT_FTP=m
++CONFIG_NF_NAT_IRC=m
++CONFIG_NF_NAT_TFTP=m
++# CONFIG_NF_NAT_AMANDA is not set
++CONFIG_NF_NAT_PPTP=m
++CONFIG_NF_NAT_H323=m
++CONFIG_NF_NAT_SIP=m
++CONFIG_IP_NF_MANGLE=m
++CONFIG_IP_NF_TARGET_TOS=m
++CONFIG_IP_NF_TARGET_ECN=m
++CONFIG_IP_NF_TARGET_TTL=m
++CONFIG_IP_NF_TARGET_CLUSTERIP=m
++# CONFIG_IP_NF_RAW is not set
++# CONFIG_IP_NF_ARPTABLES is not set
++
++#
++# IPv6: Netfilter Configuration (EXPERIMENTAL)
++#
++CONFIG_NF_CONNTRACK_IPV6=m
++# CONFIG_IP6_NF_QUEUE is not set
++CONFIG_IP6_NF_IPTABLES=m
++CONFIG_IP6_NF_MATCH_RT=m
++CONFIG_IP6_NF_MATCH_OPTS=m
++CONFIG_IP6_NF_MATCH_FRAG=m
++CONFIG_IP6_NF_MATCH_HL=m
++CONFIG_IP6_NF_MATCH_OWNER=m
++CONFIG_IP6_NF_MATCH_IPV6HEADER=m
++CONFIG_IP6_NF_MATCH_AH=m
++CONFIG_IP6_NF_MATCH_MH=m
++CONFIG_IP6_NF_MATCH_EUI64=m
++CONFIG_IP6_NF_FILTER=m
++CONFIG_IP6_NF_TARGET_LOG=m
++CONFIG_IP6_NF_TARGET_REJECT=m
++CONFIG_IP6_NF_MANGLE=m
++CONFIG_IP6_NF_TARGET_HL=m
++# CONFIG_IP6_NF_RAW is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++CONFIG_NET_SCHED=y
++
++#
++# Queueing/Scheduling
++#
++CONFIG_NET_SCH_CBQ=m
++CONFIG_NET_SCH_HTB=m
++CONFIG_NET_SCH_HFSC=m
++CONFIG_NET_SCH_PRIO=m
++# CONFIG_NET_SCH_RR is not set
++CONFIG_NET_SCH_RED=m
++CONFIG_NET_SCH_SFQ=m
++CONFIG_NET_SCH_TEQL=m
++CONFIG_NET_SCH_TBF=m
++CONFIG_NET_SCH_GRED=m
++CONFIG_NET_SCH_DSMARK=m
++CONFIG_NET_SCH_NETEM=m
++CONFIG_NET_SCH_INGRESS=m
++
++#
++# Classification
++#
++CONFIG_NET_CLS=y
++CONFIG_NET_CLS_BASIC=m
++CONFIG_NET_CLS_TCINDEX=m
++CONFIG_NET_CLS_ROUTE4=m
++CONFIG_NET_CLS_ROUTE=y
++CONFIG_NET_CLS_FW=m
++CONFIG_NET_CLS_U32=m
++CONFIG_CLS_U32_PERF=y
++CONFIG_CLS_U32_MARK=y
++CONFIG_NET_CLS_RSVP=m
++CONFIG_NET_CLS_RSVP6=m
++# CONFIG_NET_EMATCH is not set
++# CONFIG_NET_CLS_ACT is not set
++# CONFIG_NET_CLS_POLICE is not set
++# CONFIG_NET_CLS_IND is not set
++CONFIG_NET_SCH_FIFO=y
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++CONFIG_BT=m
++CONFIG_BT_L2CAP=m
++CONFIG_BT_SCO=m
++CONFIG_BT_RFCOMM=m
++CONFIG_BT_RFCOMM_TTY=y
++CONFIG_BT_BNEP=m
++CONFIG_BT_BNEP_MC_FILTER=y
++CONFIG_BT_BNEP_PROTO_FILTER=y
++CONFIG_BT_HIDP=m
++
++#
++# Bluetooth device drivers
++#
++CONFIG_BT_HCIUSB=m
++CONFIG_BT_HCIUSB_SCO=y
++# CONFIG_BT_HCIBTSDIO is not set
++# CONFIG_BT_HCIUART is not set
++# CONFIG_BT_HCIBCM203X is not set
++# CONFIG_BT_HCIBPA10X is not set
++# CONFIG_BT_HCIBFUSB is not set
++# CONFIG_BT_HCIVHCI is not set
++# CONFIG_AF_RXRPC is not set
++CONFIG_FIB_RULES=y
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++CONFIG_WIRELESS_EXT=y
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++CONFIG_FW_LOADER=m
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++CONFIG_CONNECTOR=m
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++# CONFIG_MTD_AFS_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++CONFIG_MTD_CFI_INTELEXT=y
++# CONFIG_MTD_CFI_AMDSTD is not set
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++CONFIG_MTD_ABSENT=y
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_ARM_INTEGRATOR is not set
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++CONFIG_MTD_NAND=y
++CONFIG_MTD_NAND_VERIFY_WRITE=y
++# CONFIG_MTD_NAND_ECC_SMC is not set
++# CONFIG_MTD_NAND_MUSEUM_IDS is not set
++CONFIG_MTD_NAND_IDS=y
++CONFIG_MTD_NAND_S3C2410=y
++# CONFIG_MTD_NAND_S3C2410_DEBUG is not set
++CONFIG_MTD_NAND_S3C2410_HWECC=y
++# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++# CONFIG_MTD_NAND_NANDSIM is not set
++# CONFIG_MTD_NAND_PLATFORM is not set
++# CONFIG_MTD_ALAUDA is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++CONFIG_PNP=y
++CONFIG_PNP_DEBUG=y
++
++#
++# Protocols
++#
++# CONFIG_PNPACPI is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=m
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++# CONFIG_BLK_DEV_NBD is not set
++CONFIG_BLK_DEV_UB=m
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=4096
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=m
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++# CONFIG_BLK_DEV_SR_VENDOR is not set
++CONFIG_CHR_DEV_SG=m
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++CONFIG_SCSI_SCAN_ASYNC=y
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++CONFIG_TUN=m
++# CONFIG_VETH is not set
++# CONFIG_NET_SB1000 is not set
++# CONFIG_PHYLIB is not set
++CONFIG_NET_ETHERNET=y
++CONFIG_MII=y
++# CONFIG_AX88796 is not set
++# CONFIG_SMC91X is not set
++# CONFIG_DM9000 is not set
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++CONFIG_NET_PCI=y
++# CONFIG_B44 is not set
++CONFIG_CS89x0=m
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++
++#
++# USB Network Adapters
++#
++CONFIG_USB_CATC=m
++CONFIG_USB_KAWETH=m
++CONFIG_USB_PEGASUS=m
++CONFIG_USB_RTL8150=m
++CONFIG_USB_USBNET=y
++CONFIG_USB_NET_AX8817X=m
++CONFIG_USB_NET_CDCETHER=m
++CONFIG_USB_NET_DM9601=m
++CONFIG_USB_NET_GL620A=m
++CONFIG_USB_NET_NET1080=m
++CONFIG_USB_NET_PLUSB=m
++CONFIG_USB_NET_MCS7830=m
++CONFIG_USB_NET_RNDIS_HOST=m
++CONFIG_USB_NET_CDC_SUBSET=m
++CONFIG_USB_ALI_M5632=y
++CONFIG_USB_AN2720=y
++CONFIG_USB_BELKIN=y
++CONFIG_USB_ARMLINUX=y
++CONFIG_USB_EPSON2888=y
++CONFIG_USB_KC2190=y
++CONFIG_USB_NET_ZAURUS=m
++# CONFIG_WAN is not set
++CONFIG_PPP=m
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_ASYNC=m
++CONFIG_PPP_SYNC_TTY=m
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++CONFIG_PPP_MPPE=m
++# CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_POLLDEV is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640
++# CONFIG_INPUT_JOYDEV is not set
++CONFIG_INPUT_EVDEV=y
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++CONFIG_KEYBOARD_STOWAWAY=m
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_KEYBOARD_NEO1973=y
++CONFIG_KEYBOARD_QT2410=y
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++# CONFIG_MOUSE_GPIO is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++CONFIG_INPUT_TOUCHSCREEN=y
++# CONFIG_TOUCHSCREEN_ADS7846 is not set
++# CONFIG_TOUCHSCREEN_FUJITSU is not set
++CONFIG_TOUCHSCREEN_S3C2410=y
++# CONFIG_TOUCHSCREEN_S3C2410_DEBUG is not set
++# CONFIG_TOUCHSCREEN_GUNZE is not set
++# CONFIG_TOUCHSCREEN_ELO is not set
++# CONFIG_TOUCHSCREEN_MTOUCH is not set
++# CONFIG_TOUCHSCREEN_MK712 is not set
++# CONFIG_TOUCHSCREEN_PENMOUNT is not set
++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
++# CONFIG_TOUCHSCREEN_UCB1400 is not set
++# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
++CONFIG_INPUT_MISC=y
++# CONFIG_INPUT_ATI_REMOTE is not set
++# CONFIG_INPUT_ATI_REMOTE2 is not set
++# CONFIG_INPUT_KEYSPAN_REMOTE is not set
++# CONFIG_INPUT_POWERMATE is not set
++# CONFIG_INPUT_YEALINK is not set
++CONFIG_INPUT_UINPUT=m
++CONFIG_INPUT_LIS302DL=y
++
++#
++# Hardware I/O ports
++#
++CONFIG_SERIO=y
++# CONFIG_SERIO_SERPORT is not set
++# CONFIG_SERIO_RAW is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_VT_CONSOLE=y
++CONFIG_NR_TTY_DEVICES=4
++CONFIG_HW_CONSOLE=y
++CONFIG_VT_HW_CONSOLE_BINDING=y
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_S3C2410=y
++CONFIG_SERIAL_S3C2410_CONSOLE=y
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_NVRAM is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=y
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=y
++
++#
++# I2C Algorithms
++#
++# CONFIG_I2C_ALGOBIT is not set
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++# CONFIG_I2C_GPIO is not set
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++CONFIG_I2C_S3C2410=y
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++# CONFIG_I2C_TINY_USB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++CONFIG_SENSORS_PCF50606=y
++CONFIG_SENSORS_PCF50633=y
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++CONFIG_SENSORS_TSL256X=m
++# CONFIG_PCA9632 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_BITBANG=y
++CONFIG_SPI_S3C24XX=y
++CONFIG_SPI_S3C24XX_GPIO=y
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++CONFIG_POWER_SUPPLY=y
++# CONFIG_POWER_SUPPLY_DEBUG is not set
++# CONFIG_PDA_POWER is not set
++CONFIG_APM_POWER=y
++# CONFIG_BATTERY_DS2760 is not set
++# CONFIG_BATTERY_GTA01 is not set
++CONFIG_BATTERY_BQ27000_HDQ=y
++CONFIG_GTA02_HDQ=y
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_S3C2410_WATCHDOG=m
++
++#
++# USB-based Watchdog Cards
++#
++# CONFIG_USBPCWATCHDOG is not set
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++CONFIG_MFD_GLAMO=y
++CONFIG_MFD_GLAMO_FB=y
++CONFIG_MFD_GLAMO_SPI_GPIO=y
++CONFIG_MFD_GLAMO_SPI_FB=y
++CONFIG_MFD_GLAMO_MCI=y
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++CONFIG_DAB=y
++# CONFIG_USB_DABUSB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_UVESA is not set
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_S3C2410=y
++# CONFIG_FB_S3C2410_DEBUG is not set
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++# CONFIG_LCD_LTV350QV is not set
++CONFIG_BACKLIGHT_CLASS_DEVICE=y
++# CONFIG_BACKLIGHT_CORGI is not set
++CONFIG_BACKLIGHT_GTA01=y
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++CONFIG_DISPLAY_JBT6K74=y
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++CONFIG_FRAMEBUFFER_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
++# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
++CONFIG_FONTS=y
++# CONFIG_FONT_8x8 is not set
++# CONFIG_FONT_8x16 is not set
++CONFIG_FONT_6x11=y
++# CONFIG_FONT_7x14 is not set
++# CONFIG_FONT_PEARL_8x8 is not set
++# CONFIG_FONT_ACORN_8x8 is not set
++# CONFIG_FONT_MINI_4x6 is not set
++# CONFIG_FONT_SUN8x16 is not set
++# CONFIG_FONT_SUN12x22 is not set
++# CONFIG_FONT_10x18 is not set
++# CONFIG_LOGO is not set
++
++#
++# Sound
++#
++CONFIG_SOUND=y
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++CONFIG_SND_RAWMIDI=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# ALSA ARM devices
++#
++
++#
++# SPI devices
++#
++
++#
++# USB devices
++#
++# CONFIG_SND_USB_AUDIO is not set
++# CONFIG_SND_USB_CAIAQ is not set
++
++#
++# System on Chip audio support
++#
++CONFIG_SND_SOC=m
++CONFIG_SND_S3C24XX_SOC=m
++CONFIG_SND_S3C24XX_SOC_I2S=m
++CONFIG_SND_S3C24XX_SOC_NEO1973_WM8753=m
++# CONFIG_SND_S3C24XX_SOC_NEO1973_WM8753_DEBUG is not set
++CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753=m
++
++#
++# SoC Audio support for SuperH
++#
++CONFIG_SND_SOC_WM8753=m
++
++#
++# Open Sound System
++#
++# CONFIG_SOUND_PRIME is not set
++CONFIG_HID_SUPPORT=y
++CONFIG_HID=y
++# CONFIG_HID_DEBUG is not set
++# CONFIG_HIDRAW is not set
++
++#
++# USB Input Devices
++#
++CONFIG_USB_HID=y
++# CONFIG_USB_HIDINPUT_POWERBOOK is not set
++# CONFIG_HID_FF is not set
++CONFIG_USB_HIDDEV=y
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++CONFIG_USB=y
++# CONFIG_USB_DEBUG is not set
++
++#
++# Miscellaneous USB options
++#
++CONFIG_USB_DEVICEFS=y
++CONFIG_USB_DEVICE_CLASS=y
++# CONFIG_USB_DYNAMIC_MINORS is not set
++CONFIG_USB_SUSPEND=y
++# CONFIG_USB_PERSIST is not set
++# CONFIG_USB_OTG is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_ISP116X_HCD is not set
++CONFIG_USB_OHCI_HCD=m
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
++CONFIG_USB_OHCI_LITTLE_ENDIAN=y
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++
++#
++# USB Device Class drivers
++#
++CONFIG_USB_ACM=m
++CONFIG_USB_PRINTER=m
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# may also be needed; see USB_STORAGE Help for more information
++#
++CONFIG_USB_STORAGE=m
++# CONFIG_USB_STORAGE_DEBUG is not set
++CONFIG_USB_STORAGE_DATAFAB=y
++CONFIG_USB_STORAGE_FREECOM=y
++# CONFIG_USB_STORAGE_ISD200 is not set
++CONFIG_USB_STORAGE_DPCM=y
++CONFIG_USB_STORAGE_USBAT=y
++CONFIG_USB_STORAGE_SDDR09=y
++CONFIG_USB_STORAGE_SDDR55=y
++CONFIG_USB_STORAGE_JUMPSHOT=y
++CONFIG_USB_STORAGE_ALAUDA=y
++CONFIG_USB_STORAGE_KARMA=y
++CONFIG_USB_LIBUSUAL=y
++
++#
++# USB Imaging devices
++#
++# CONFIG_USB_MDC800 is not set
++# CONFIG_USB_MICROTEK is not set
++CONFIG_USB_MON=y
++
++#
++# USB port drivers
++#
++
++#
++# USB Serial Converter support
++#
++CONFIG_USB_SERIAL=m
++CONFIG_USB_SERIAL_GENERIC=y
++CONFIG_USB_SERIAL_AIRCABLE=m
++CONFIG_USB_SERIAL_AIRPRIME=m
++CONFIG_USB_SERIAL_ARK3116=m
++CONFIG_USB_SERIAL_BELKIN=m
++# CONFIG_USB_SERIAL_CH341 is not set
++CONFIG_USB_SERIAL_WHITEHEAT=m
++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
++CONFIG_USB_SERIAL_CP2101=m
++CONFIG_USB_SERIAL_CYPRESS_M8=m
++CONFIG_USB_SERIAL_EMPEG=m
++CONFIG_USB_SERIAL_FTDI_SIO=m
++CONFIG_USB_SERIAL_FUNSOFT=m
++CONFIG_USB_SERIAL_VISOR=m
++CONFIG_USB_SERIAL_IPAQ=m
++CONFIG_USB_SERIAL_IR=m
++CONFIG_USB_SERIAL_EDGEPORT=m
++CONFIG_USB_SERIAL_EDGEPORT_TI=m
++CONFIG_USB_SERIAL_GARMIN=m
++CONFIG_USB_SERIAL_IPW=m
++CONFIG_USB_SERIAL_KEYSPAN_PDA=m
++CONFIG_USB_SERIAL_KEYSPAN=m
++CONFIG_USB_SERIAL_KEYSPAN_MPR=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19=y
++CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
++CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
++CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
++CONFIG_USB_SERIAL_KLSI=m
++CONFIG_USB_SERIAL_KOBIL_SCT=m
++CONFIG_USB_SERIAL_MCT_U232=m
++CONFIG_USB_SERIAL_MOS7720=m
++CONFIG_USB_SERIAL_MOS7840=m
++CONFIG_USB_SERIAL_NAVMAN=m
++CONFIG_USB_SERIAL_PL2303=m
++# CONFIG_USB_SERIAL_OTI6858 is not set
++CONFIG_USB_SERIAL_HP4X=m
++CONFIG_USB_SERIAL_SAFE=m
++CONFIG_USB_SERIAL_SAFE_PADDED=y
++CONFIG_USB_SERIAL_SIERRAWIRELESS=m
++CONFIG_USB_SERIAL_TI=m
++CONFIG_USB_SERIAL_CYBERJACK=m
++CONFIG_USB_SERIAL_XIRCOM=m
++CONFIG_USB_SERIAL_OPTION=m
++CONFIG_USB_SERIAL_OMNINET=m
++# CONFIG_USB_SERIAL_DEBUG is not set
++CONFIG_USB_EZUSB=y
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_AUERSWALD is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++CONFIG_USB_BERRY_CHARGE=m
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_PHIDGET is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_LD is not set
++CONFIG_USB_TRANCEVIBRATOR=m
++CONFIG_USB_IOWARRIOR=m
++# CONFIG_USB_TEST is not set
++
++#
++# USB DSL modem support
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++# CONFIG_USB_GADGET_ATMEL_USBA is not set
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++CONFIG_USB_GADGET_S3C2410=y
++CONFIG_USB_S3C2410=y
++# CONFIG_USB_S3C2410_DEBUG is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++# CONFIG_USB_GADGET_DUALSPEED is not set
++# CONFIG_USB_ZERO is not set
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++CONFIG_USB_MIDI_GADGET=m
++
++#
++# SDIO support
++#
++CONFIG_SDIO=y
++CONFIG_SDIO_S3C24XX=y
++CONFIG_SDIO_S3C24XX_DMA=y
++CONFIG_SDIO_AR6000_WLAN=y
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++CONFIG_MMC_UNSAFE_RESUME=y
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++# CONFIG_MMC_SPI is not set
++CONFIG_MMC_S3C=y
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_S3C24XX=m
++# CONFIG_LEDS_GPIO is not set
++CONFIG_LEDS_NEO1973_VIBRATOR=y
++CONFIG_LEDS_NEO1973_GTA02=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++CONFIG_RTC_DEBUG=y
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_CMOS is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_S3C=m
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++CONFIG_FS_POSIX_ACL=y
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++CONFIG_ROMFS_FS=y
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++CONFIG_DNOTIFY=y
++# CONFIG_AUTOFS_FS is not set
++CONFIG_AUTOFS4_FS=m
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++CONFIG_ISO9660_FS=m
++CONFIG_JOLIET=y
++# CONFIG_ZISOFS is not set
++CONFIG_UDF_FS=m
++CONFIG_UDF_NLS=y
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=m
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++CONFIG_JFFS2_SUMMARY=y
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++CONFIG_CRAMFS=y
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3=y
++# CONFIG_NFS_V3_ACL is not set
++CONFIG_NFS_V4=y
++# CONFIG_NFS_DIRECTIO is not set
++CONFIG_NFSD=m
++CONFIG_NFSD_V3=y
++# CONFIG_NFSD_V3_ACL is not set
++CONFIG_NFSD_V4=y
++CONFIG_NFSD_TCP=y
++CONFIG_ROOT_NFS=y
++CONFIG_LOCKD=y
++CONFIG_LOCKD_V4=y
++CONFIG_EXPORTFS=m
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=y
++CONFIG_SUNRPC_GSS=y
++# CONFIG_SUNRPC_BIND34 is not set
++CONFIG_RPCSEC_GSS_KRB5=y
++# CONFIG_RPCSEC_GSS_SPKM3 is not set
++# CONFIG_SMB_FS is not set
++CONFIG_CIFS=m
++# CONFIG_CIFS_STATS is not set
++CONFIG_CIFS_WEAK_PW_HASH=y
++# CONFIG_CIFS_XATTR is not set
++# CONFIG_CIFS_DEBUG2 is not set
++# CONFIG_CIFS_EXPERIMENTAL is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++CONFIG_NLS_CODEPAGE_850=m
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++CONFIG_NLS_CODEPAGE_936=m
++CONFIG_NLS_CODEPAGE_950=m
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=y
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++# CONFIG_MARKERS is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++# CONFIG_SCHED_DEBUG is not set
++# CONFIG_SCHEDSTATS is not set
++CONFIG_TIMER_STATS=y
++# CONFIG_DEBUG_SLAB is not set
++CONFIG_DEBUG_PREEMPT=y
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++CONFIG_DEBUG_INFO=y
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_SAMPLES is not set
++# CONFIG_DEBUG_USER is not set
++CONFIG_DEBUG_ERRORS=y
++# CONFIG_DEBUG_LL is not set
++CONFIG_DEBUG_S3C_UART=2
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++CONFIG_CRYPTO=y
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_HASH=y
++CONFIG_CRYPTO_MANAGER=y
++CONFIG_CRYPTO_HMAC=y
++CONFIG_CRYPTO_XCBC=m
++CONFIG_CRYPTO_NULL=m
++CONFIG_CRYPTO_MD4=m
++CONFIG_CRYPTO_MD5=y
++CONFIG_CRYPTO_SHA1=m
++CONFIG_CRYPTO_SHA256=m
++CONFIG_CRYPTO_SHA512=m
++CONFIG_CRYPTO_WP512=m
++CONFIG_CRYPTO_TGR192=m
++CONFIG_CRYPTO_GF128MUL=m
++CONFIG_CRYPTO_ECB=m
++CONFIG_CRYPTO_CBC=y
++CONFIG_CRYPTO_PCBC=m
++CONFIG_CRYPTO_LRW=m
++# CONFIG_CRYPTO_XTS is not set
++# CONFIG_CRYPTO_CRYPTD is not set
++CONFIG_CRYPTO_DES=y
++CONFIG_CRYPTO_FCRYPT=m
++CONFIG_CRYPTO_BLOWFISH=m
++CONFIG_CRYPTO_TWOFISH=m
++CONFIG_CRYPTO_TWOFISH_COMMON=m
++CONFIG_CRYPTO_SERPENT=m
++CONFIG_CRYPTO_AES=m
++CONFIG_CRYPTO_CAST5=m
++CONFIG_CRYPTO_CAST6=m
++CONFIG_CRYPTO_TEA=m
++CONFIG_CRYPTO_ARC4=m
++CONFIG_CRYPTO_KHAZAD=m
++CONFIG_CRYPTO_ANUBIS=m
++# CONFIG_CRYPTO_SEED is not set
++CONFIG_CRYPTO_DEFLATE=m
++CONFIG_CRYPTO_MICHAEL_MIC=m
++CONFIG_CRYPTO_CRC32C=m
++CONFIG_CRYPTO_CAMELLIA=m
++CONFIG_CRYPTO_TEST=m
++# CONFIG_CRYPTO_AUTHENC is not set
++CONFIG_CRYPTO_HW=y
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=m
++CONFIG_CRC16=m
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++CONFIG_LIBCRC32C=m
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_TEXTSEARCH=y
++CONFIG_TEXTSEARCH_KMP=m
++CONFIG_TEXTSEARCH_BM=m
++CONFIG_TEXTSEARCH_FSM=m
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_DMA=y
+Index: linux-2.6.24.7/dfu-kern
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/dfu-kern 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,9 @@
++#!/bin/bash
++../../dfu-util/src/dfu-util -a 3 -d 0x1d50:0x5119 -D uImage.bin
++if [ $? -eq 1 ] ; then
++../../dfu-util/src/dfu-util -a 3 -d 0x1d50:0x5120 -D uImage.bin
++../../dfu-util/src/dfu-util -a 3 -d 0x1d50:0x5119 -D uImage.bin
++
++fi
++
++
+Index: linux-2.6.24.7/Documentation/arm/Samsung-S3C24XX/NAND.txt
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/Documentation/arm/Samsung-S3C24XX/NAND.txt 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,30 @@
++ S3C24XX NAND Support
++ ====================
++
++Introduction
++------------
++
++Small Page NAND
++---------------
++
++The driver uses a 512 byte (1 page) ECC code for this setup. The
++ECC code is not directly compatible with the default kernel ECC
++code, so the driver enforces its own OOB layout and ECC parameters
++
++Large Page NAND
++---------------
++
++The driver is capable of handling NAND flash with a 2KiB page
++size, with support for hardware ECC generation and correction.
++
++Unlike the 512byte page mode, the driver generates ECC data for
++each 256 byte block in an 2KiB page. This means that more than
++one error in a page can be rectified. It also means that the
++OOB layout remains the default kernel layout for these flashes.
++
++
++Document Author
++---------------
++
++Ben Dooks, Copyright 2007 Simtec Electronics
++
+Index: linux-2.6.24.7/Documentation/arm/Samsung-S3C24XX/Overview.txt
+===================================================================
+--- linux-2.6.24.7.orig/Documentation/arm/Samsung-S3C24XX/Overview.txt 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/Documentation/arm/Samsung-S3C24XX/Overview.txt 2008-12-11 22:46:49.000000000 +0100
+@@ -156,6 +156,8 @@ NAND
+ controller. If there are any problems the latest linux-mtd
+ code can be found from http://www.linux-mtd.infradead.org/
+
++ For more information see Documentation/arm/Samsung-S3C24XX/NAND.txt
++
+
+ Serial
+ ------
+Index: linux-2.6.24.7/drivers/base/core.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/base/core.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/base/core.c 2008-12-11 22:46:49.000000000 +0100
+@@ -42,6 +42,11 @@ int (*platform_notify_remove)(struct dev
+ */
+ const char *dev_driver_string(struct device *dev)
+ {
++ if (!dev) {
++ printk(KERN_ERR"Null dev to dev_driver_string\n");
++ dump_stack();
++ return "*NULL*";
++ }
+ return dev->driver ? dev->driver->name :
+ (dev->bus ? dev->bus->name :
+ (dev->class ? dev->class->name : ""));
+Index: linux-2.6.24.7/drivers/base/power/main.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/base/power/main.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/base/power/main.c 2008-12-11 22:46:49.000000000 +0100
+@@ -40,9 +40,9 @@ int (*platform_enable_wakeup)(struct dev
+
+ void device_pm_add(struct device *dev)
+ {
+- pr_debug("PM: Adding info for %s:%s\n",
++ /* pr_debug("PM: Adding info for %s:%s\n",
+ dev->bus ? dev->bus->name : "No Bus",
+- kobject_name(&dev->kobj));
++ kobject_name(&dev->kobj)); */
+ mutex_lock(&dpm_list_mtx);
+ list_add_tail(&dev->power.entry, &dpm_active);
+ mutex_unlock(&dpm_list_mtx);
+Index: linux-2.6.24.7/drivers/char/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/char/Kconfig 2008-12-11 22:46:09.000000000 +0100
++++ linux-2.6.24.7/drivers/char/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -58,6 +58,18 @@ config VT_CONSOLE
+
+ If unsure, say Y.
+
++config NR_TTY_DEVICES
++ int "Maximum tty device number"
++ depends on VT
++ default 63
++ ---help---
++ This is the highest numbered device created in /dev. You will actually have
++ NR_TTY_DEVICES+1 devices in /dev. The default is 63, which will result in
++ 64 /dev entries. The lowest number you can set is 11, anything below that,
++ and it will default to 11. 63 is also the upper limit so we don't overrun
++ the serial consoles.
++
++
+ config HW_CONSOLE
+ bool
+ depends on VT && !S390 && !UML
+Index: linux-2.6.24.7/drivers/i2c/busses/i2c-s3c2410.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/i2c/busses/i2c-s3c2410.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/i2c/busses/i2c-s3c2410.c 2008-12-11 22:46:49.000000000 +0100
+@@ -71,6 +71,8 @@ struct s3c24xx_i2c {
+ struct resource *irq;
+ struct resource *ioarea;
+ struct i2c_adapter adap;
++
++ int suspended;
+ };
+
+ /* default platform data to use if not supplied in the platform_device
+@@ -156,6 +158,14 @@ static inline void s3c24xx_i2c_disable_i
+ unsigned long tmp;
+
+ tmp = readl(i2c->regs + S3C2410_IICCON);
++
++/* S3c2442 datasheet
++ *
++ * If the IICCON[5]=0, IICCON[4] does not operate correctly.
++ * So, It is recommended that you should set IICCON[5]=1,
++ * although you does not use the IIC interrupt.
++ */
++
+ writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
+ }
+
+@@ -282,7 +292,7 @@ static int i2s_s3c_irq_nextbyte(struct s
+
+ case STATE_STOP:
+ dev_err(i2c->dev, "%s: called in STATE_STOP\n", __FUNCTION__);
+- s3c24xx_i2c_disable_irq(i2c);
++ s3c24xx_i2c_disable_irq(i2c);
+ goto out_ack;
+
+ case STATE_START:
+@@ -502,6 +512,15 @@ static int s3c24xx_i2c_doxfer(struct s3c
+ unsigned long timeout;
+ int ret;
+
++ if (i2c->suspended) {
++ dev_err(i2c->dev,
++ "Hey I am still asleep (suspended: %d), retry later\n",
++ i2c->suspended);
++ dump_stack();
++ ret = -EAGAIN;
++ goto out;
++ }
++
+ ret = s3c24xx_i2c_set_master(i2c);
+ if (ret != 0) {
+ dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
+@@ -886,12 +905,25 @@ static int s3c24xx_i2c_remove(struct pla
+ }
+
+ #ifdef CONFIG_PM
+-static int s3c24xx_i2c_resume(struct platform_device *dev)
++
++static int s3c24xx_i2c_suspend(struct platform_device *dev, pm_message_t state)
+ {
+ struct s3c24xx_i2c *i2c = platform_get_drvdata(dev);
+
+ if (i2c != NULL)
++ i2c->suspended++;
++
++ return 0;
++}
++
++static int s3c24xx_i2c_resume(struct platform_device *dev)
++{
++ struct s3c24xx_i2c *i2c = platform_get_drvdata(dev);
++
++ if (i2c != NULL) {
+ s3c24xx_i2c_init(i2c);
++ i2c->suspended--;
++ }
+
+ return 0;
+ }
+@@ -905,6 +937,7 @@ static int s3c24xx_i2c_resume(struct pla
+ static struct platform_driver s3c2410_i2c_driver = {
+ .probe = s3c24xx_i2c_probe,
+ .remove = s3c24xx_i2c_remove,
++ .suspend = s3c24xx_i2c_suspend,
+ .resume = s3c24xx_i2c_resume,
+ .driver = {
+ .owner = THIS_MODULE,
+@@ -915,6 +948,7 @@ static struct platform_driver s3c2410_i2
+ static struct platform_driver s3c2440_i2c_driver = {
+ .probe = s3c24xx_i2c_probe,
+ .remove = s3c24xx_i2c_remove,
++ .suspend = s3c24xx_i2c_suspend,
+ .resume = s3c24xx_i2c_resume,
+ .driver = {
+ .owner = THIS_MODULE,
+Index: linux-2.6.24.7/drivers/i2c/chips/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/i2c/chips/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/i2c/chips/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -51,6 +51,26 @@ config SENSORS_EEPROM
+ This driver can also be built as a module. If so, the module
+ will be called eeprom.
+
++config SENSORS_PCF50606
++ tristate "Philips/NXP PCF50606"
++ depends on I2C
++ help
++ If you say yes here you get support for Philips/NXP PCF50606
++ PMU (Power Management Unit) chips.
++
++ This driver can also be built as a module. If so, the module
++ will be called pcf50606.
++
++config SENSORS_PCF50633
++ tristate "Philips PCF50633"
++ depends on I2C
++ help
++ If you say yes here you get support for Philips PCF50633
++ PMU (Power Management Unit) chips.
++
++ This driver can also be built as a module. If so, the module
++ will be called pcf50633.
++
+ config SENSORS_PCF8574
+ tristate "Philips PCF8574 and PCF8574A"
+ depends on EXPERIMENTAL
+@@ -163,4 +183,23 @@ config MENELAUS
+ and other features that are often used in portable devices like
+ cell phones and PDAs.
+
++config SENSORS_TSL256X
++ tristate "Texas TSL256X Ambient Light Sensor"
++ depends on I2C
++ help
++ If you say yes here you get support for the Texas TSL256X
++ ambient light sensor chip.
++
++ This driver can also be built as a module. If so, the module
++ will be called tsl256x.
++
++config PCA9632
++ tristate "Philips/NXP PCA9632 low power LED driver"
++ depends on I2C
++ help
++ If you say yes here you get support for the Philips/NXP PCA9632
++ LED driver.
++
++ This driver can also be built as a module. If so, the module
++ will be called pca9632.
+ endmenu
+Index: linux-2.6.24.7/drivers/i2c/chips/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/drivers/i2c/chips/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/i2c/chips/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -9,12 +9,16 @@ obj-$(CONFIG_SENSORS_EEPROM) += eeprom.o
+ obj-$(CONFIG_SENSORS_MAX6875) += max6875.o
+ obj-$(CONFIG_SENSORS_M41T00) += m41t00.o
+ obj-$(CONFIG_SENSORS_PCA9539) += pca9539.o
++obj-$(CONFIG_SENSORS_PCF50606) += pcf50606.o
++obj-$(CONFIG_SENSORS_PCF50633) += pcf50633.o
+ obj-$(CONFIG_SENSORS_PCF8574) += pcf8574.o
+ obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o
+ obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o
+ obj-$(CONFIG_TPS65010) += tps65010.o
+ obj-$(CONFIG_MENELAUS) += menelaus.o
+ obj-$(CONFIG_SENSORS_TSL2550) += tsl2550.o
++obj-$(CONFIG_SENSORS_TSL256X) += tsl256x.o
++obj-$(CONFIG_PCA9632) += pca9632.o
+
+ ifeq ($(CONFIG_I2C_DEBUG_CHIP),y)
+ EXTRA_CFLAGS += -DDEBUG
+Index: linux-2.6.24.7/drivers/i2c/chips/pca9632.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/i2c/chips/pca9632.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,551 @@
++/*
++ * Philips/NXP PCA9632 low power LED driver.
++ * Copyright (C) 2008 Matt Hsu <matt_hsu@openmoko.org>
++ *
++ * low_level implementation are based on pcf50606 driver
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ *
++ * TODO:
++ * - attach ledclass??
++ * - add platform data
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/i2c.h>
++#include <linux/platform_device.h>
++
++#include "pca9632.h"
++
++/* Addresses to scan */
++static unsigned short normal_i2c[] = { 0x62, I2C_CLIENT_END };
++
++/* Insmod parameters */
++I2C_CLIENT_INSMOD_1(pca9632);
++
++enum pca9632_pwr_state {
++ PCA9632_NORMAL,
++ PCA9632_SLEEP,
++};
++
++enum pca9632_led_output {
++ PCA9632_OFF,
++ PCA9632_ON,
++ PCA9632_CTRL_BY_PWM,
++ PCA9632_CTRL_BY_PWM_GRPPWM,
++};
++
++static const char *led_output_name[] = {
++ [PCA9632_OFF] = "off",
++ [PCA9632_ON] = "fully-on",
++ [PCA9632_CTRL_BY_PWM] = "ctrl-by-pwm",
++ [PCA9632_CTRL_BY_PWM_GRPPWM] = "ctrl-by-pwm-grppwm",
++};
++
++struct pca9632_data {
++ struct i2c_client client;
++ struct mutex lock;
++};
++
++static struct i2c_driver pca9632_driver;
++static struct platform_device *pca9632_pdev;
++
++static int pca9632_attach_adapter(struct i2c_adapter *adapter);
++static int pca9632_detach_client(struct i2c_client *client);
++
++static int __reg_write(struct pca9632_data *pca, u_int8_t reg, u_int8_t val)
++{
++ return i2c_smbus_write_byte_data(&pca->client, reg, val);
++}
++
++static int reg_write(struct pca9632_data *pca, u_int8_t reg, u_int8_t val)
++{
++ int ret;
++
++ mutex_lock(&pca->lock);
++ ret = __reg_write(pca, reg, val);
++ mutex_unlock(&pca->lock);
++
++ return ret;
++}
++
++static int32_t __reg_read(struct pca9632_data *pca, u_int8_t reg)
++{
++ int32_t ret;
++
++ ret = i2c_smbus_read_byte_data(&pca->client, reg);
++
++ return ret;
++}
++
++static u_int8_t reg_read(struct pca9632_data *pca, u_int8_t reg)
++{
++ int32_t ret;
++
++ mutex_lock(&pca->lock);
++ ret = __reg_read(pca, reg);
++ mutex_unlock(&pca->lock);
++
++ return ret & 0xff;
++}
++
++static int reg_set_bit_mask(struct pca9632_data *pca,
++ u_int8_t reg, u_int8_t mask, u_int8_t val)
++{
++ int ret;
++ u_int8_t tmp;
++
++ val &= mask;
++
++ mutex_lock(&pca->lock);
++
++ tmp = __reg_read(pca, reg);
++ tmp &= ~mask;
++ tmp |= val;
++ ret = __reg_write(pca, reg, tmp);
++
++ mutex_unlock(&pca->lock);
++
++ return ret;
++}
++
++static inline int calc_dc(uint8_t idc)
++{
++ return (idc * 100) / 256;
++}
++
++/*
++ * Software reset
++ */
++static int software_rst(struct i2c_adapter *adapter)
++{
++ u8 buf[] = { 0xa5, 0x5a };
++
++ struct i2c_msg msg[] = {
++ {
++ .addr = 0x3,
++ .flags = 0,
++ .buf = &buf,
++ .len = sizeof(buf)
++ }
++ };
++
++ return i2c_transfer(adapter, msg, 1);
++}
++
++/*
++ * Group dmblnk control
++ */
++static void config_group_dmblnk(struct pca9632_data *pca, int group_dmblnk_mode)
++{
++ reg_set_bit_mask(pca, PCA9632_REG_MODE2, 0x20,
++ group_dmblnk_mode << PCA9632_DMBLNK_SHIFT);
++}
++
++static int get_group_dmblnk(struct pca9632_data *pca)
++{
++ return reg_read(pca, PCA9632_REG_MODE2) >> PCA9632_DMBLNK_SHIFT;
++}
++
++static ssize_t show_group_dmblnk(struct device *dev, struct device_attribute
++ *attr, char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pca9632_data *pca = i2c_get_clientdata(client);
++
++ if (get_group_dmblnk(pca))
++ return sprintf(buf, "blinking\n");
++ else
++ return sprintf(buf, "dimming\n");
++}
++
++static ssize_t set_group_dmblnk(struct device *dev, struct device_attribute
++ *attr, const char *buf, size_t count)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pca9632_data *pca = i2c_get_clientdata(client);
++ unsigned int mode = simple_strtoul(buf, NULL, 10);
++
++ if (mode)
++ dev_info(&pca->client.dev, "blinking\n");
++ else
++ dev_info(&pca->client.dev, "dimming\n");
++
++ config_group_dmblnk(pca, mode);
++
++ return count;
++}
++
++static DEVICE_ATTR(group_dmblnk, S_IRUGO | S_IWUSR, show_group_dmblnk,
++ set_group_dmblnk);
++
++static int reg_id_by_name(const char *name)
++{
++ int reg_id = -1;
++
++ if (!strncmp(name, "led0", 4))
++ reg_id = PCA9632_REG_PWM0;
++ else if (!strncmp(name, "led1", 4))
++ reg_id = PCA9632_REG_PWM1;
++ else if (!strncmp(name, "led2", 4))
++ reg_id = PCA9632_REG_PWM2;
++ else if (!strncmp(name, "led3", 4))
++ reg_id = PCA9632_REG_PWM3;
++
++ return reg_id;
++}
++
++static int get_led_output(struct pca9632_data *pca, int ldrx)
++{
++ u_int8_t led_state;
++
++ ldrx = ldrx - 2;
++ led_state = reg_read(pca, PCA9632_REG_LEDOUT);
++ led_state = (led_state >> (2 * ldrx)) & 0x03;
++
++ return led_state;
++}
++
++static void config_led_output(struct pca9632_data *pca, int ldrx,
++ enum pca9632_led_output led_output)
++{
++ u_int8_t mask;
++ int tmp;
++
++ ldrx = ldrx - 2;
++ mask = 0x03 << (2 * ldrx);
++ tmp = reg_set_bit_mask(pca, PCA9632_REG_LEDOUT,
++ mask, led_output << (2 * ldrx));
++}
++
++/*
++ * Individual brightness control
++ */
++static ssize_t show_brightness(struct device *dev, struct device_attribute
++ *attr, char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pca9632_data *pca = i2c_get_clientdata(client);
++ int ldrx;
++
++ ldrx = reg_id_by_name(attr->attr.name);
++
++ switch (get_led_output(pca, ldrx)) {
++
++ case PCA9632_OFF:
++ case PCA9632_ON:
++ return sprintf(buf, "%s",
++ led_output_name[get_led_output(pca, ldrx)]);
++
++ case PCA9632_CTRL_BY_PWM:
++ return sprintf(buf, "%d%% \n", calc_dc(reg_read(pca, ldrx)));
++
++ case PCA9632_CTRL_BY_PWM_GRPPWM:
++ /* check group dmblnk */
++ if (get_group_dmblnk(pca))
++ return sprintf(buf, "%d%% \n",
++ calc_dc(reg_read(pca, ldrx)));
++ return sprintf(buf, "%d%% \n",
++ calc_dc((reg_read(pca, ldrx) & 0xfc)));
++ default:
++ break;
++ }
++
++ return sprintf(buf, "invalid argument\n");
++}
++
++static ssize_t set_brightness(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pca9632_data *pca = i2c_get_clientdata(client);
++ unsigned int pwm = simple_strtoul(buf, NULL, 10);
++ int ldrx;
++
++ ldrx = reg_id_by_name(attr->attr.name);
++ reg_set_bit_mask(pca, ldrx, 0xff, pwm);
++
++ return count;
++}
++
++static
++DEVICE_ATTR(led0_pwm, S_IRUGO | S_IWUSR, show_brightness, set_brightness);
++static
++DEVICE_ATTR(led1_pwm, S_IRUGO | S_IWUSR, show_brightness, set_brightness);
++static
++DEVICE_ATTR(led2_pwm, S_IRUGO | S_IWUSR, show_brightness, set_brightness);
++static
++DEVICE_ATTR(led3_pwm, S_IRUGO | S_IWUSR, show_brightness, set_brightness);
++
++/*
++ * Group frequency control
++ */
++static ssize_t show_group_freq(struct device *dev, struct device_attribute
++ *attr, char *buf)
++{
++ uint32_t period;
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pca9632_data *pca = i2c_get_clientdata(client);
++
++ period = ((reg_read(pca, PCA9632_REG_GRPFREQ) + 1) * 1000) / 24;
++
++ return sprintf(buf, "%d ms\n", period);
++}
++
++static ssize_t set_group_freq(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pca9632_data *pca = i2c_get_clientdata(client);
++
++ unsigned int freq = simple_strtoul(buf, NULL, 10);
++ reg_write(pca, PCA9632_REG_GRPFREQ, freq);
++ return count;
++}
++
++static
++DEVICE_ATTR(group_freq, S_IRUGO | S_IWUSR, show_group_freq, set_group_freq);
++
++/*
++ * Group duty cycle tonrol*
++ */
++static ssize_t show_group_dc(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pca9632_data *pca = i2c_get_clientdata(client);
++
++ if (get_group_dmblnk(pca)) {
++
++ if (reg_read(pca, PCA9632_REG_GRPFREQ) <= 0x03)
++ return sprintf(buf, "%d%% \n",
++ calc_dc(reg_read(pca, PCA9632_REG_GRPPWM) & 0xfc));
++
++ return sprintf(buf, "%d%% \n", calc_dc(reg_read(pca,
++ PCA9632_REG_GRPPWM)));
++ }
++
++ return sprintf(buf, "%d%% \n", calc_dc(reg_read(pca,
++ PCA9632_REG_GRPPWM) & 0xf0));
++}
++
++static ssize_t set_group_dc(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pca9632_data *pca = i2c_get_clientdata(client);
++
++ unsigned int dc = simple_strtoul(buf, NULL, 10);
++
++ reg_set_bit_mask(pca, PCA9632_REG_GRPPWM, 0xff, dc);
++
++ return count;
++}
++
++static DEVICE_ATTR(group_dc, S_IRUGO | S_IWUSR, show_group_dc, set_group_dc);
++
++/*
++ * LED driver output
++ */
++static ssize_t show_led_output(struct device *dev, struct device_attribute
++ *attr, char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pca9632_data *pca = i2c_get_clientdata(client);
++ int ldrx;
++
++ ldrx = reg_id_by_name(attr->attr.name);
++
++ return sprintf(buf, "%s \n",
++ led_output_name[get_led_output(pca, ldrx)]);
++
++}
++static ssize_t set_led_output(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pca9632_data *pca = i2c_get_clientdata(client);
++ enum pca9632_led_output led_output;
++ int ldrx;
++
++ led_output = simple_strtoul(buf, NULL, 10);
++ ldrx = reg_id_by_name(attr->attr.name);
++ config_led_output(pca, ldrx, led_output);
++
++ return count;
++}
++
++static
++DEVICE_ATTR(led0_output, S_IRUGO | S_IWUSR, show_led_output, set_led_output);
++static
++DEVICE_ATTR(led1_output, S_IRUGO | S_IWUSR, show_led_output, set_led_output);
++static
++DEVICE_ATTR(led2_output, S_IRUGO | S_IWUSR, show_led_output, set_led_output);
++static
++DEVICE_ATTR(led3_output, S_IRUGO | S_IWUSR, show_led_output, set_led_output);
++
++static struct attribute *pca_sysfs_entries[] = {
++ &dev_attr_group_dmblnk.attr,
++ &dev_attr_led0_pwm.attr,
++ &dev_attr_led1_pwm.attr,
++ &dev_attr_led2_pwm.attr,
++ &dev_attr_led3_pwm.attr,
++ &dev_attr_group_dc.attr,
++ &dev_attr_group_freq.attr,
++ &dev_attr_led0_output.attr,
++ &dev_attr_led1_output.attr,
++ &dev_attr_led2_output.attr,
++ &dev_attr_led3_output.attr,
++ NULL
++};
++
++static struct attribute_group pca_attr_group = {
++ .name = NULL, /* put in device directory */
++ .attrs = pca_sysfs_entries,
++};
++
++#ifdef CONFIG_PM
++static int pca9632_suspend(struct device *dev, pm_message_t state)
++{
++ /* FIXME: Not implemented */
++ return 0;
++}
++
++static int pca9632_resume(struct device *dev)
++{
++ /* FIXME: Not implemented */
++ return 0;
++}
++#else
++#define pca9632_suspend NULL
++#define pca9632_resume NULL
++#endif
++
++static struct i2c_driver pca9632_driver = {
++ .driver = {
++ .name = "pca9632",
++ .suspend = pca9632_suspend,
++ .resume = pca9632_resume,
++ },
++ .id = I2C_DRIVERID_PCA9632,
++ .attach_adapter = pca9632_attach_adapter,
++ .detach_client = pca9632_detach_client,
++};
++
++static int pca9632_detect(struct i2c_adapter *adapter, int address, int kind)
++{
++ struct i2c_client *new_client;
++ struct pca9632_data *pca;
++ int err;
++
++ pca = kzalloc(sizeof(struct pca9632_data), GFP_KERNEL);
++ if (!pca)
++ return -ENOMEM;
++
++ mutex_init(&pca->lock);
++
++ new_client = &pca->client;
++ i2c_set_clientdata(new_client, pca);
++ new_client->addr = address;
++ new_client->adapter = adapter;
++ new_client->driver = &pca9632_driver;
++ new_client->flags = 0;
++
++ strlcpy(new_client->name, "pca9632", I2C_NAME_SIZE);
++
++ /* register with i2c core */
++ err = i2c_attach_client(new_client);
++ if (err)
++ goto exit_kfree;
++
++ err = sysfs_create_group(&new_client->dev.kobj, &pca_attr_group);
++ if (err)
++ goto exit_detach;
++
++ /* software reset */
++ if (!software_rst(adapter))
++ dev_info(&pca->client.dev, "pca9632 sw-rst done\n");
++
++ /* enter normal mode */
++ reg_set_bit_mask(pca, PCA9632_REG_MODE1, 0x10, PCA9632_NORMAL);
++
++ return 0;
++
++exit_detach:
++ i2c_detach_client(new_client);
++exit_kfree:
++ kfree(pca);
++
++ return err;
++}
++
++static int pca9632_attach_adapter(struct i2c_adapter *adapter)
++{
++ return i2c_probe(adapter, &addr_data, pca9632_detect);
++}
++
++static int pca9632_detach_client(struct i2c_client *client)
++{
++ int err;
++
++ sysfs_remove_group(&client->dev.kobj, &pca_attr_group);
++ err = i2c_detach_client(client);
++
++ if (err)
++ return err;
++
++ kfree(i2c_get_clientdata(client));
++
++ return 0;
++}
++
++static int __init pca9632_plat_probe(struct platform_device *pdev)
++{
++ /* FIXME: platform data should be attached here */
++ pca9632_pdev = pdev;
++
++ return 0;
++}
++
++static int pca9632_plat_remove(struct platform_device *pdev)
++{
++ return 0;
++}
++
++static struct platform_driver pca9632_plat_driver = {
++ .probe = pca9632_plat_probe,
++ .remove = pca9632_plat_remove,
++ .driver = {
++ .owner = THIS_MODULE,
++ .name = "pca9632",
++ },
++};
++
++static int __init pca9632_init(void)
++{
++ int rc;
++
++ rc = platform_driver_register(&pca9632_plat_driver);
++ if (!rc)
++ i2c_add_driver(&pca9632_driver);
++
++ return rc;
++}
++
++static void __exit pca9632_exit(void)
++{
++ i2c_del_driver(&pca9632_driver);
++
++ platform_driver_unregister(&pca9632_plat_driver);
++}
++
++MODULE_AUTHOR("Matt Hsu <matt_hsu@openmoko.org>");
++MODULE_DESCRIPTION("NXP PCA9632 driver");
++MODULE_LICENSE("GPL");
++
++module_init(pca9632_init);
++module_exit(pca9632_exit);
+Index: linux-2.6.24.7/drivers/i2c/chips/pca9632.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/i2c/chips/pca9632.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,24 @@
++#ifndef _PCA9632_H
++#define _PCA9632_H
++
++
++enum pca9632_regs{
++
++ PCA9632_REG_MODE1 = 0x00,
++ PCA9632_REG_MODE2 = 0x01,
++ PCA9632_REG_PWM0 = 0x02,
++ PCA9632_REG_PWM1 = 0x03,
++ PCA9632_REG_PWM2 = 0x04,
++ PCA9632_REG_PWM3 = 0x05,
++ PCA9632_REG_GRPPWM = 0x06,
++ PCA9632_REG_GRPFREQ = 0x07,
++ PCA9632_REG_LEDOUT = 0x08,
++ PCA9632_REG_SUBADDR1 = 0x09,
++ PCA9632_REG_SUBADDR2 = 0x0a,
++ PCA9632_REG_SUBADDR3 = 0x0b,
++ PCA9632_REG_ALLCALLADR1 = 0x0c,
++};
++
++#define PCA9632_DMBLNK_SHIFT 5
++
++#endif /* _PCA9632_H */
+Index: linux-2.6.24.7/drivers/i2c/chips/pcf50606.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/i2c/chips/pcf50606.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,2289 @@
++/* Philips/NXP PCF50606 Power Management Unit (PMU) driver
++ *
++ * (C) 2006-2007 by Openmoko, Inc.
++ * Authors: Harald Welte <laforge@openmoko.org>,
++ * Matt Hsu <matt@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ * This driver is a monster ;) It provides the following features
++ * - voltage control for a dozen different voltage domains
++ * - charging control for main and backup battery
++ * - rtc / alarm
++ * - watchdog
++ * - adc driver (hw_sensors like)
++ * - pwm driver
++ * - backlight
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/i2c.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++#include <linux/workqueue.h>
++#include <linux/delay.h>
++#include <linux/rtc.h>
++#include <linux/bcd.h>
++#include <linux/watchdog.h>
++#include <linux/miscdevice.h>
++#include <linux/input.h>
++#include <linux/fb.h>
++#include <linux/backlight.h>
++#include <linux/sched.h>
++#include <linux/platform_device.h>
++#include <linux/pcf50606.h>
++#include <linux/apm-emulation.h>
++#include <linux/power_supply.h>
++
++#include <asm/mach-types.h>
++#include <asm/arch/gta01.h>
++
++#include "pcf50606.h"
++
++/* we use dev_dbg() throughout the code, but sometimes don't want to
++ * write an entire line of debug related information. This DEBUGPC
++ * macro is a continuation for dev_dbg() */
++#ifdef DEBUG
++#define DEBUGPC(x, args ...) printk(x, ## args)
++#else
++#define DEBUGPC(x, args ...)
++#endif
++
++/***********************************************************************
++ * Static data / structures
++ ***********************************************************************/
++
++static unsigned short normal_i2c[] = { 0x08, I2C_CLIENT_END };
++
++I2C_CLIENT_INSMOD_1(pcf50606);
++
++#define PCF50606_B_CHG_FAST 0 /* Charger Fast allowed */
++#define PCF50606_B_CHG_PRESENT 1 /* Charger present */
++#define PCF50606_B_CHG_FOK 2 /* Fast OK for battery */
++#define PCF50606_B_CHG_ERR 3 /* Charger Error */
++#define PCF50606_B_CHG_PROT 4 /* Charger Protection */
++#define PCF50606_B_CHG_READY 5 /* Charging completed */
++
++#define PCF50606_F_CHG_FAST (1<<PCF50606_B_CHG_FAST)
++#define PCF50606_F_CHG_PRESENT (1<<PCF50606_B_CHG_PRESENT)
++#define PCF50606_F_CHG_FOK (1<<PCF50606_B_CHG_FOK)
++#define PCF50606_F_CHG_ERR (1<<PCF50606_B_CHG_ERR)
++#define PCF50606_F_CHG_PROT (1<<PCF50606_B_CHG_PROT)
++#define PCF50606_F_CHG_READY (1<<PCF50606_B_CHG_READY)
++#define PCF50606_F_CHG_MASK 0x000000fc
++
++#define PCF50606_F_PWR_PRESSED 0x00000100
++#define PCF50606_F_RTC_SECOND 0x00000200
++
++enum close_state {
++ CLOSE_STATE_NOT,
++ CLOSE_STATE_ALLOW = 0x2342,
++};
++
++enum pcf50606_suspend_states {
++ PCF50606_SS_RUNNING,
++ PCF50606_SS_STARTING_SUSPEND,
++ PCF50606_SS_COMPLETED_SUSPEND,
++ PCF50606_SS_RESUMING_BUT_NOT_US_YET,
++ PCF50606_SS_STARTING_RESUME,
++ PCF50606_SS_COMPLETED_RESUME,
++};
++
++struct pcf50606_data {
++ struct i2c_client client;
++ struct pcf50606_platform_data *pdata;
++ struct backlight_device *backlight;
++ struct mutex lock;
++ unsigned int flags;
++ unsigned int working;
++ struct mutex working_lock;
++ struct work_struct work;
++ struct rtc_device *rtc;
++ struct input_dev *input_dev;
++ int allow_close;
++ int onkey_seconds;
++ int irq;
++ int coldplug_done;
++ int suppress_onkey_events;
++ enum pcf50606_suspend_states suspend_state;
++#ifdef CONFIG_PM
++ struct {
++ u_int8_t dcdc1, dcdc2;
++ u_int8_t dcdec1;
++ u_int8_t dcudc1;
++ u_int8_t ioregc;
++ u_int8_t d1regc1;
++ u_int8_t d2regc1;
++ u_int8_t d3regc1;
++ u_int8_t lpregc1;
++ u_int8_t adcc1, adcc2;
++ u_int8_t pwmc1;
++ u_int8_t int1m, int2m, int3m;
++ } standby_regs;
++#endif
++};
++
++static struct i2c_driver pcf50606_driver;
++
++/* This global is set by the pcf50606 driver to the correct callback
++ * for the gta01 battery driver. */
++int (*pmu_bat_get_property)(struct power_supply *, enum power_supply_property,
++ union power_supply_propval *);
++EXPORT_SYMBOL(pmu_bat_get_property);
++
++/* This is an ugly construct on how to access the (currently single/global)
++ * pcf50606 handle from other code in the kernel. I didn't really come up with
++ * a more decent method of dynamically resolving this */
++struct pcf50606_data *pcf50606_global;
++EXPORT_SYMBOL_GPL(pcf50606_global);
++
++static struct platform_device *pcf50606_pdev;
++
++/* This is a 10k, B=3370 NTC Thermistor -10..79 centigrade */
++/* Table entries are offset by +0.5C so a properly rounded value is generated */
++static const u_int16_t ntc_table_10k_3370B[] = {
++ /* -10 */
++ 43888, 41819, 39862, 38010, 36257, 34596, 33024, 31534, 30121, 28781,
++ 27510, 26304, 25159, 24071, 23038, 22056, 21122, 20234, 19390, 18586,
++ 17821, 17093, 16399, 15738, 15107, 14506, 13933, 13387, 12865, 12367,
++ 11891, 11437, 11003, 10588, 10192, 9813, 9450, 9103, 8771, 8453,
++ 8149, 7857, 7578, 7310, 7054, 6808, 6572, 6346, 6129, 5920,
++ 5720, 5528, 5344, 5167, 4996, 4833, 4675, 4524, 4379, 4239,
++ 4104, 3975, 3850, 3730, 3614, 3503, 3396, 3292, 3193, 3097,
++ 3004, 2915, 2829, 2745, 2665, 2588, 2513, 2441, 2371, 2304,
++ 2239, 2176, 2116, 2057, 2000, 1945, 1892, 1841, 1791, 1743,
++};
++
++
++/***********************************************************************
++ * Low-Level routines
++ ***********************************************************************/
++
++static inline int __reg_write(struct pcf50606_data *pcf, u_int8_t reg,
++ u_int8_t val)
++{
++ if (pcf->suspend_state == PCF50606_SS_COMPLETED_SUSPEND) {
++ dev_err(&pcf->client.dev, "__reg_write while suspended.\n");
++ dump_stack();
++ }
++ return i2c_smbus_write_byte_data(&pcf->client, reg, val);
++}
++
++static int reg_write(struct pcf50606_data *pcf, u_int8_t reg, u_int8_t val)
++{
++ int ret;
++
++ mutex_lock(&pcf->lock);
++ ret = __reg_write(pcf, reg, val);
++ mutex_unlock(&pcf->lock);
++
++ return ret;
++}
++
++static inline int32_t __reg_read(struct pcf50606_data *pcf, u_int8_t reg)
++{
++ int32_t ret;
++
++ if (pcf->suspend_state == PCF50606_SS_COMPLETED_SUSPEND) {
++ dev_err(&pcf->client.dev, "__reg_read while suspended.\n");
++ dump_stack();
++ }
++ ret = i2c_smbus_read_byte_data(&pcf->client, reg);
++
++ return ret;
++}
++
++static u_int8_t reg_read(struct pcf50606_data *pcf, u_int8_t reg)
++{
++ int32_t ret;
++
++ mutex_lock(&pcf->lock);
++ ret = __reg_read(pcf, reg);
++ mutex_unlock(&pcf->lock);
++
++ return ret & 0xff;
++}
++
++static int reg_set_bit_mask(struct pcf50606_data *pcf,
++ u_int8_t reg, u_int8_t mask, u_int8_t val)
++{
++ int ret;
++ u_int8_t tmp;
++
++ val &= mask;
++
++ mutex_lock(&pcf->lock);
++
++ tmp = __reg_read(pcf, reg);
++ tmp &= ~mask;
++ tmp |= val;
++ ret = __reg_write(pcf, reg, tmp);
++
++ mutex_unlock(&pcf->lock);
++
++ return ret;
++}
++
++static int reg_clear_bits(struct pcf50606_data *pcf, u_int8_t reg, u_int8_t val)
++{
++ int ret;
++ u_int8_t tmp;
++
++ mutex_lock(&pcf->lock);
++
++ tmp = __reg_read(pcf, reg);
++ tmp &= ~val;
++ ret = __reg_write(pcf, reg, tmp);
++
++ mutex_unlock(&pcf->lock);
++
++ return ret;
++}
++
++/* synchronously read one ADC channel (busy-wait for result to be complete) */
++static u_int16_t adc_read(struct pcf50606_data *pcf, int channel,
++ u_int16_t *data2)
++{
++ u_int8_t adcs2, adcs1;
++ u_int16_t ret;
++
++ dev_dbg(&pcf->client.dev, "entering (pcf=%p, channel=%u, data2=%p)\n",
++ pcf, channel, data2);
++
++ channel &= PCF50606_ADCC2_ADCMUX_MASK;
++
++ mutex_lock(&pcf->lock);
++
++ /* start ADC conversion of selected channel */
++ __reg_write(pcf, PCF50606_REG_ADCC2, channel |
++ PCF50606_ADCC2_ADCSTART | PCF50606_ADCC2_RES_10BIT);
++
++ do {
++ adcs2 = __reg_read(pcf, PCF50606_REG_ADCS2);
++ } while (!(adcs2 & PCF50606_ADCS2_ADCRDY));
++
++ adcs1 = __reg_read(pcf, PCF50606_REG_ADCS1);
++ ret = (adcs1 << 2) | (adcs2 & 0x03);
++
++ if (data2) {
++ adcs1 = __reg_read(pcf, PCF50606_REG_ADCS3);
++ *data2 = (adcs1 << 2) | ((adcs2 & 0x0c) >> 2);
++ }
++
++ mutex_unlock(&pcf->lock);
++
++ dev_dbg(&pcf->client.dev, "returning %u %u\n", ret,
++ data2 ? *data2 : 0);
++
++ return ret;
++}
++
++/***********************************************************************
++ * Voltage / ADC
++ ***********************************************************************/
++
++static u_int8_t dcudc_voltage(unsigned int millivolts)
++{
++ if (millivolts < 900)
++ return 0;
++ if (millivolts > 5500)
++ return 0x1f;
++ if (millivolts <= 3300) {
++ millivolts -= 900;
++ return millivolts/300;
++ }
++ if (millivolts < 4000)
++ return 0x0f;
++ else {
++ millivolts -= 4000;
++ return millivolts/100;
++ }
++}
++
++static unsigned int dcudc_2voltage(u_int8_t bits)
++{
++ bits &= 0x1f;
++ if (bits < 0x08)
++ return 900 + bits * 300;
++ else if (bits < 0x10)
++ return 3300;
++ else
++ return 4000 + bits * 100;
++}
++
++static u_int8_t dcdec_voltage(unsigned int millivolts)
++{
++ if (millivolts < 900)
++ return 0;
++ else if (millivolts > 3300)
++ return 0x0f;
++
++ millivolts -= 900;
++ return millivolts/300;
++}
++
++static unsigned int dcdec_2voltage(u_int8_t bits)
++{
++ bits &= 0x0f;
++ return 900 + bits*300;
++}
++
++static u_int8_t dcdc_voltage(unsigned int millivolts)
++{
++ if (millivolts < 900)
++ return 0;
++ else if (millivolts > 3600)
++ return 0x1f;
++
++ if (millivolts < 1500) {
++ millivolts -= 900;
++ return millivolts/25;
++ } else {
++ millivolts -= 1500;
++ return 0x18 + millivolts/300;
++ }
++}
++
++static unsigned int dcdc_2voltage(u_int8_t bits)
++{
++ bits &= 0x1f;
++ if ((bits & 0x18) == 0x18)
++ return 1500 + ((bits & 0x7) * 300);
++ else
++ return 900 + (bits * 25);
++}
++
++static u_int8_t dx_voltage(unsigned int millivolts)
++{
++ if (millivolts < 900)
++ return 0;
++ else if (millivolts > 3300)
++ return 0x18;
++
++ millivolts -= 900;
++ return millivolts/100;
++}
++
++static unsigned int dx_2voltage(u_int8_t bits)
++{
++ bits &= 0x1f;
++ return 900 + (bits * 100);
++}
++
++static const u_int8_t regulator_registers[__NUM_PCF50606_REGULATORS] = {
++ [PCF50606_REGULATOR_DCD] = PCF50606_REG_DCDC1,
++ [PCF50606_REGULATOR_DCDE] = PCF50606_REG_DCDEC1,
++ [PCF50606_REGULATOR_DCUD] = PCF50606_REG_DCUDC1,
++ [PCF50606_REGULATOR_D1REG] = PCF50606_REG_D1REGC1,
++ [PCF50606_REGULATOR_D2REG] = PCF50606_REG_D2REGC1,
++ [PCF50606_REGULATOR_D3REG] = PCF50606_REG_D3REGC1,
++ [PCF50606_REGULATOR_LPREG] = PCF50606_REG_LPREGC1,
++ [PCF50606_REGULATOR_IOREG] = PCF50606_REG_IOREGC,
++};
++
++int pcf50606_onoff_set(struct pcf50606_data *pcf,
++ enum pcf50606_regulator_id reg, int on)
++{
++ u_int8_t addr;
++
++ if (reg >= __NUM_PCF50606_REGULATORS)
++ return -EINVAL;
++
++ /* IOREG cannot be powered off since it powers the PMU I2C */
++ if (reg == PCF50606_REGULATOR_IOREG)
++ return -EIO;
++
++ addr = regulator_registers[reg];
++
++ if (on == 0)
++ reg_set_bit_mask(pcf, addr, 0xe0, 0x00);
++ else
++ reg_set_bit_mask(pcf, addr, 0xe0, 0xe0);
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(pcf50606_onoff_set);
++
++int pcf50606_onoff_get(struct pcf50606_data *pcf,
++ enum pcf50606_regulator_id reg)
++{
++ u_int8_t val, addr;
++
++ if (reg >= __NUM_PCF50606_REGULATORS)
++ return -EINVAL;
++
++ addr = regulator_registers[reg];
++ val = (reg_read(pcf, addr) & 0xe0) >> 5;
++
++ /* PWREN1 = 1, PWREN2 = 1, see table 16 of datasheet */
++ switch (val) {
++ case 0:
++ case 5:
++ return 0;
++ default:
++ return 1;
++ }
++}
++EXPORT_SYMBOL_GPL(pcf50606_onoff_get);
++
++int pcf50606_voltage_set(struct pcf50606_data *pcf,
++ enum pcf50606_regulator_id reg,
++ unsigned int millivolts)
++{
++ u_int8_t volt_bits;
++ u_int8_t regnr;
++ int rc;
++
++ dev_dbg(&pcf->client.dev, "pcf=%p, reg=%d, mvolts=%d\n", pcf, reg,
++ millivolts);
++
++ if (reg >= __NUM_PCF50606_REGULATORS)
++ return -EINVAL;
++
++ if (millivolts > pcf->pdata->rails[reg].voltage.max)
++ return -EINVAL;
++
++ switch (reg) {
++ case PCF50606_REGULATOR_DCD:
++ volt_bits = dcdc_voltage(millivolts);
++ rc = reg_set_bit_mask(pcf, PCF50606_REG_DCDC1, 0x1f,
++ volt_bits);
++ break;
++ case PCF50606_REGULATOR_DCDE:
++ volt_bits = dcdec_voltage(millivolts);
++ rc = reg_set_bit_mask(pcf, PCF50606_REG_DCDEC1, 0x0f,
++ volt_bits);
++ break;
++ case PCF50606_REGULATOR_DCUD:
++ volt_bits = dcudc_voltage(millivolts);
++ rc = reg_set_bit_mask(pcf, PCF50606_REG_DCUDC1, 0x1f,
++ volt_bits);
++ break;
++ case PCF50606_REGULATOR_D1REG:
++ case PCF50606_REGULATOR_D2REG:
++ case PCF50606_REGULATOR_D3REG:
++ regnr = PCF50606_REG_D1REGC1 + (reg - PCF50606_REGULATOR_D1REG);
++ volt_bits = dx_voltage(millivolts);
++ rc = reg_set_bit_mask(pcf, regnr, 0x1f, volt_bits);
++ break;
++ case PCF50606_REGULATOR_LPREG:
++ volt_bits = dx_voltage(millivolts);
++ rc = reg_set_bit_mask(pcf, PCF50606_REG_LPREGC1, 0x1f,
++ volt_bits);
++ break;
++ case PCF50606_REGULATOR_IOREG:
++ if (millivolts < 1800)
++ return -EINVAL;
++ volt_bits = dx_voltage(millivolts);
++ rc = reg_set_bit_mask(pcf, PCF50606_REG_IOREGC, 0x1f,
++ volt_bits);
++ break;
++ default:
++ return -EINVAL;
++ }
++
++ return rc;
++}
++EXPORT_SYMBOL_GPL(pcf50606_voltage_set);
++
++unsigned int pcf50606_voltage_get(struct pcf50606_data *pcf,
++ enum pcf50606_regulator_id reg)
++{
++ u_int8_t volt_bits;
++ u_int8_t regnr;
++ unsigned int rc = 0;
++
++ if (reg >= __NUM_PCF50606_REGULATORS)
++ return -EINVAL;
++
++ switch (reg) {
++ case PCF50606_REGULATOR_DCD:
++ volt_bits = reg_read(pcf, PCF50606_REG_DCDC1) & 0x1f;
++ rc = dcdc_2voltage(volt_bits);
++ break;
++ case PCF50606_REGULATOR_DCDE:
++ volt_bits = reg_read(pcf, PCF50606_REG_DCDEC1) & 0x0f;
++ rc = dcdec_2voltage(volt_bits);
++ break;
++ case PCF50606_REGULATOR_DCUD:
++ volt_bits = reg_read(pcf, PCF50606_REG_DCUDC1) & 0x1f;
++ rc = dcudc_2voltage(volt_bits);
++ break;
++ case PCF50606_REGULATOR_D1REG:
++ case PCF50606_REGULATOR_D2REG:
++ case PCF50606_REGULATOR_D3REG:
++ regnr = PCF50606_REG_D1REGC1 + (reg - PCF50606_REGULATOR_D1REG);
++ volt_bits = reg_read(pcf, regnr) & 0x1f;
++ if (volt_bits > 0x18)
++ volt_bits = 0x18;
++ rc = dx_2voltage(volt_bits);
++ break;
++ case PCF50606_REGULATOR_LPREG:
++ volt_bits = reg_read(pcf, PCF50606_REG_LPREGC1) & 0x1f;
++ if (volt_bits > 0x18)
++ volt_bits = 0x18;
++ rc = dx_2voltage(volt_bits);
++ break;
++ case PCF50606_REGULATOR_IOREG:
++ volt_bits = reg_read(pcf, PCF50606_REG_IOREGC) & 0x1f;
++ if (volt_bits > 0x18)
++ volt_bits = 0x18;
++ rc = dx_2voltage(volt_bits);
++ break;
++ default:
++ return -EINVAL;
++ }
++
++ return rc;
++}
++EXPORT_SYMBOL_GPL(pcf50606_voltage_get);
++
++/* go into 'STANDBY' mode, i.e. power off the main CPU and peripherals */
++void pcf50606_go_standby(void)
++{
++ reg_write(pcf50606_global, PCF50606_REG_OOCC1,
++ PCF50606_OOCC1_GOSTDBY);
++}
++EXPORT_SYMBOL_GPL(pcf50606_go_standby);
++
++void pcf50606_gpo0_set(struct pcf50606_data *pcf, int on)
++{
++ u_int8_t val;
++
++ if (on)
++ val = 0x07;
++ else
++ val = 0x0f;
++
++ reg_set_bit_mask(pcf, PCF50606_REG_GPOC1, 0x0f, val);
++}
++EXPORT_SYMBOL_GPL(pcf50606_gpo0_set);
++
++int pcf50606_gpo0_get(struct pcf50606_data *pcf)
++{
++ u_int8_t reg = reg_read(pcf, PCF50606_REG_GPOC1) & 0x0f;
++
++ if (reg == 0x07 || reg == 0x08)
++ return 1;
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(pcf50606_gpo0_get);
++
++static void pcf50606_work(struct work_struct *work)
++{
++ struct pcf50606_data *pcf =
++ container_of(work, struct pcf50606_data, work);
++ u_int8_t pcfirq[3];
++ int ret;
++
++ mutex_lock(&pcf->working_lock);
++ pcf->working = 1;
++
++ /* sanity */
++ if (!&pcf->client.dev)
++ goto bail;
++
++ /*
++ * if we are presently suspending, we are not in a position to deal
++ * with pcf50606 interrupts at all.
++ *
++ * Because we didn't clear the int pending registers, there will be
++ * no edge / interrupt waiting for us when we wake. But it is OK
++ * because at the end of our resume, we call this workqueue function
++ * gratuitously, clearing the pending register and re-enabling
++ * servicing this interrupt.
++ */
++
++ if ((pcf->suspend_state == PCF50606_SS_STARTING_SUSPEND) ||
++ (pcf->suspend_state == PCF50606_SS_COMPLETED_SUSPEND))
++ goto bail;
++
++ /*
++ * If we are inside suspend -> resume completion time we don't attempt
++ * service until we have fully resumed. Although we could talk to the
++ * device as soon as I2C is up, the regs in the device which we might
++ * choose to modify as part of the service action have not been
++ * reloaded with their pre-suspend states yet. Therefore we will
++ * defer our service if we are called like that until our resume has
++ * completed.
++ *
++ * This shouldn't happen any more because we disable servicing this
++ * interrupt in suspend and don't re-enable it until resume is
++ * completed.
++ */
++
++ if (pcf->suspend_state &&
++ (pcf->suspend_state != PCF50606_SS_COMPLETED_RESUME))
++ goto reschedule;
++
++ /* this is the case early in resume! Sanity check! */
++ if (i2c_get_clientdata(&pcf->client) == NULL)
++ goto reschedule;
++
++ /*
++ * p35 pcf50606 datasheet rev 2.2:
++ * ''The system controller shall read all interrupt registers in
++ * one I2C read action''
++ * because if you don't INT# gets stuck asserted forever after a
++ * while
++ */
++ ret = i2c_smbus_read_i2c_block_data(&pcf->client, PCF50606_REG_INT1,
++ sizeof(pcfirq), pcfirq);
++ if (ret != sizeof(pcfirq)) {
++ DEBUGPC("Oh crap PMU IRQ register read failed %d\n", ret);
++ /*
++ * it shouldn't fail, we no longer attempt to use
++ * I2C while it can be suspended. But we don't have
++ * much option but to retry if if it ever did fail,
++ * because if we don't service the interrupt to clear
++ * it, we will never see another PMU interrupt edge.
++ */
++ goto reschedule;
++ }
++
++ /* hey did we just resume? (because we don't get here unless we are
++ * running normally or the first call after resumption)
++ *
++ * pcf50606 resume is really really over now then.
++ */
++ if (pcf->suspend_state != PCF50606_SS_RUNNING) {
++ pcf->suspend_state = PCF50606_SS_RUNNING;
++
++ /* peek at the IRQ reason, if power button then set a flag
++ * so that we do not signal the event to userspace
++ */
++ if (pcfirq[0] & (PCF50606_INT1_ONKEYF | PCF50606_INT1_ONKEYR)) {
++ pcf->suppress_onkey_events = 1;
++ dev_dbg(&pcf->client.dev,
++ "Wake by ONKEY, suppressing ONKEY events");
++ } else {
++ pcf->suppress_onkey_events = 0;
++ }
++ }
++
++ if (!pcf->coldplug_done) {
++ DEBUGPC("PMU Coldplug init\n");
++
++ /* we used SECOND to kick ourselves started -- turn it off */
++ pcfirq[0] &= ~PCF50606_INT1_SECOND;
++ reg_set_bit_mask(pcf, PCF50606_REG_INT1M, PCF50606_INT1_SECOND,
++ PCF50606_INT1_SECOND);
++
++ /* coldplug the USB if present */
++ if (__reg_read(pcf, PCF50606_REG_OOCS) & PCF50606_OOCS_EXTON) {
++ /* Charger inserted */
++ DEBUGPC("COLD CHGINS ");
++ input_report_key(pcf->input_dev, KEY_BATTERY, 1);
++ apm_queue_event(APM_POWER_STATUS_CHANGE);
++ pcf->flags |= PCF50606_F_CHG_PRESENT;
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50606_FEAT_MBC,
++ PMU_EVT_INSERT);
++ }
++
++ pcf->coldplug_done = 1;
++ }
++
++
++ dev_dbg(&pcf->client.dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x:",
++ pcfirq[0], pcfirq[1], pcfirq[2]);
++
++ if (pcfirq[0] & PCF50606_INT1_ONKEYF) {
++ /* ONKEY falling edge (start of button press) */
++ pcf->flags |= PCF50606_F_PWR_PRESSED;
++ if (!pcf->suppress_onkey_events) {
++ DEBUGPC("ONKEYF ");
++ input_report_key(pcf->input_dev, KEY_POWER, 1);
++ } else {
++ DEBUGPC("ONKEYF(unreported) ");
++ }
++ }
++ if (pcfirq[0] & PCF50606_INT1_ONKEY1S) {
++ /* ONKEY pressed for more than 1 second */
++ pcf->onkey_seconds = 0;
++ DEBUGPC("ONKEY1S ");
++ /* Tell PMU we are taking care of this */
++ reg_set_bit_mask(pcf, PCF50606_REG_OOCC1,
++ PCF50606_OOCC1_TOTRST,
++ PCF50606_OOCC1_TOTRST);
++ /* enable SECOND interrupt (hz tick) */
++ reg_clear_bits(pcf, PCF50606_REG_INT1M, PCF50606_INT1_SECOND);
++ }
++ if (pcfirq[0] & PCF50606_INT1_ONKEYR) {
++ /* ONKEY rising edge (end of button press) */
++ pcf->flags &= ~PCF50606_F_PWR_PRESSED;
++ pcf->onkey_seconds = -1;
++ if (!pcf->suppress_onkey_events) {
++ DEBUGPC("ONKEYR ");
++ input_report_key(pcf->input_dev, KEY_POWER, 0);
++ } else {
++ DEBUGPC("ONKEYR(suppressed) ");
++ /* don't suppress any more power button events */
++ pcf->suppress_onkey_events = 0;
++ }
++ /* disable SECOND interrupt in case RTC didn't
++ * request it */
++ if (!(pcf->flags & PCF50606_F_RTC_SECOND))
++ reg_set_bit_mask(pcf, PCF50606_REG_INT1M,
++ PCF50606_INT1_SECOND,
++ PCF50606_INT1_SECOND);
++ }
++ if (pcfirq[0] & PCF50606_INT1_EXTONR) {
++ DEBUGPC("EXTONR ");
++ input_report_key(pcf->input_dev, KEY_POWER2, 1);
++ }
++ if (pcfirq[0] & PCF50606_INT1_EXTONF) {
++ DEBUGPC("EXTONF ");
++ input_report_key(pcf->input_dev, KEY_POWER2, 0);
++ }
++ if (pcfirq[0] & PCF50606_INT1_SECOND) {
++ DEBUGPC("SECOND ");
++ if (pcf->flags & PCF50606_F_RTC_SECOND)
++ rtc_update_irq(pcf->rtc, 1,
++ RTC_PF | RTC_IRQF);
++
++ if (pcf->onkey_seconds >= 0 &&
++ pcf->flags & PCF50606_F_PWR_PRESSED) {
++ DEBUGPC("ONKEY_SECONDS(%u, OOCC1=0x%02x) ",
++ pcf->onkey_seconds,
++ reg_read(pcf, PCF50606_REG_OOCC1));
++ pcf->onkey_seconds++;
++ if (pcf->onkey_seconds >=
++ pcf->pdata->onkey_seconds_required) {
++ /* Ask init to do 'ctrlaltdel' */
++ /*
++ * currently Linux reacts badly to issuing a
++ * signal to PID #1 before init is started.
++ * What happens is that the next kernel thread
++ * to start, which is the JFFS2 Garbage
++ * collector in our case, gets the signal
++ * instead and proceeds to fail to fork --
++ * which is very bad. Therefore we confirm
++ * PID #1 exists before issuing the signal
++ */
++ if (find_task_by_pid(1)) {
++ kill_proc(1, SIGINT, 1);
++ DEBUGPC("SIGINT(init) ");
++ }
++ /* FIXME: what to do if userspace doesn't
++ * shut down? Do we want to force it? */
++ }
++ }
++ }
++ if (pcfirq[0] & PCF50606_INT1_ALARM) {
++ DEBUGPC("ALARM ");
++ if (pcf->pdata->used_features & PCF50606_FEAT_RTC)
++ rtc_update_irq(pcf->rtc, 1,
++ RTC_AF | RTC_IRQF);
++ }
++
++ if (pcfirq[1] & PCF50606_INT2_CHGINS) {
++ /* Charger inserted */
++ DEBUGPC("CHGINS ");
++ input_report_key(pcf->input_dev, KEY_BATTERY, 1);
++ apm_queue_event(APM_POWER_STATUS_CHANGE);
++ pcf->flags |= PCF50606_F_CHG_PRESENT;
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50606_FEAT_MBC, PMU_EVT_INSERT);
++ /* FIXME: how to signal this to userspace */
++ }
++ if (pcfirq[1] & PCF50606_INT2_CHGRM) {
++ /* Charger removed */
++ DEBUGPC("CHGRM ");
++ input_report_key(pcf->input_dev, KEY_BATTERY, 0);
++ apm_queue_event(APM_POWER_STATUS_CHANGE);
++ pcf->flags &= ~(PCF50606_F_CHG_MASK|PCF50606_F_CHG_PRESENT);
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50606_FEAT_MBC, PMU_EVT_INSERT);
++ /* FIXME: how signal this to userspace */
++ }
++ if (pcfirq[1] & PCF50606_INT2_CHGFOK) {
++ /* Battery ready for fast charging */
++ DEBUGPC("CHGFOK ");
++ pcf->flags |= PCF50606_F_CHG_FOK;
++ /* FIXME: how to signal this to userspace */
++ }
++ if (pcfirq[1] & PCF50606_INT2_CHGERR) {
++ /* Error in charge mode */
++ DEBUGPC("CHGERR ");
++ pcf->flags |= PCF50606_F_CHG_ERR;
++ pcf->flags &= ~(PCF50606_F_CHG_FOK|PCF50606_F_CHG_READY);
++ /* FIXME: how to signal this to userspace */
++ }
++ if (pcfirq[1] & PCF50606_INT2_CHGFRDY) {
++ /* Fast charge completed */
++ DEBUGPC("CHGFRDY ");
++ pcf->flags |= PCF50606_F_CHG_READY;
++ pcf->flags &= ~PCF50606_F_CHG_FOK;
++ /* FIXME: how to signal this to userspace */
++ }
++ if (pcfirq[1] & PCF50606_INT2_CHGPROT) {
++ /* Charging protection interrupt */
++ DEBUGPC("CHGPROT ");
++ pcf->flags &= ~(PCF50606_F_CHG_FOK|PCF50606_F_CHG_READY);
++ /* FIXME: signal this to userspace */
++ }
++ if (pcfirq[1] & PCF50606_INT2_CHGWD10S) {
++ /* Charger watchdog will expire in 10 seconds */
++ DEBUGPC("CHGWD10S ");
++ reg_set_bit_mask(pcf, PCF50606_REG_OOCC1,
++ PCF50606_OOCC1_WDTRST,
++ PCF50606_OOCC1_WDTRST);
++ }
++ if (pcfirq[1] & PCF50606_INT2_CHGWDEXP) {
++ /* Charger watchdog expires */
++ DEBUGPC("CHGWDEXP ");
++ /* FIXME: how to signal this to userspace */
++ }
++
++ if (pcfirq[2] & PCF50606_INT3_ADCRDY) {
++ /* ADC result ready */
++ DEBUGPC("ADCRDY ");
++ }
++ if (pcfirq[2] & PCF50606_INT3_ACDINS) {
++ /* Accessory insertion detected */
++ DEBUGPC("ACDINS ");
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50606_FEAT_ACD, PMU_EVT_INSERT);
++ }
++ if (pcfirq[2] & PCF50606_INT3_ACDREM) {
++ /* Accessory removal detected */
++ DEBUGPC("ACDREM ");
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50606_FEAT_ACD, PMU_EVT_REMOVE);
++ }
++ /* FIXME: TSCPRES */
++ if (pcfirq[2] & PCF50606_INT3_LOWBAT) {
++ if (__reg_read(pcf, PCF50606_REG_OOCS) & PCF50606_OOCS_EXTON) {
++ /*
++ * hey no need to freak out, we have some kind of
++ * valid charger power
++ */
++ DEBUGPC("(NO)BAT ");
++ } else {
++ /* Really low battery voltage, we have 8 seconds left */
++ DEBUGPC("LOWBAT ");
++ /*
++ * currently Linux reacts badly to issuing a signal to
++ * PID #1 before init is started. What happens is that
++ * the next kernel thread to start, which is the JFFS2
++ * Garbage collector in our case, gets the signal
++ * instead and proceeds to fail to fork -- which is
++ * very bad. Therefore we confirm PID #1 exists
++ * before issuing SPIGPWR
++ */
++ if (find_task_by_pid(1)) {
++ apm_queue_event(APM_LOW_BATTERY);
++ DEBUGPC("SIGPWR(init) ");
++ kill_proc(1, SIGPWR, 1);
++ } else
++ /*
++ * well, our situation is like this: we do not
++ * have any external power, we have a low
++ * battery and since PID #1 doesn't exist yet,
++ * we are early in the boot, likely before
++ * rootfs mount. We should just call it a day
++ */
++ apm_queue_event(APM_CRITICAL_SUSPEND);
++ }
++ /* Tell PMU we are taking care of this */
++ reg_set_bit_mask(pcf, PCF50606_REG_OOCC1,
++ PCF50606_OOCC1_TOTRST,
++ PCF50606_OOCC1_TOTRST);
++ }
++ if (pcfirq[2] & PCF50606_INT3_HIGHTMP) {
++ /* High temperature */
++ DEBUGPC("HIGHTMP ");
++ apm_queue_event(APM_CRITICAL_SUSPEND);
++ }
++
++ DEBUGPC("\n");
++
++bail:
++ pcf->working = 0;
++ input_sync(pcf->input_dev);
++ put_device(&pcf->client.dev);
++ mutex_unlock(&pcf->working_lock);
++
++ return;
++
++reschedule:
++
++ if ((pcf->suspend_state != PCF50606_SS_STARTING_SUSPEND) &&
++ (pcf->suspend_state != PCF50606_SS_COMPLETED_SUSPEND)) {
++ msleep(10);
++ dev_info(&pcf->client.dev, "rescheduling interrupt service\n");
++ }
++ if (!schedule_work(&pcf->work))
++ dev_err(&pcf->client.dev, "int service reschedule failed\n");
++
++ /* we don't put the device here, hold it for next time */
++ mutex_unlock(&pcf->working_lock);
++}
++
++static irqreturn_t pcf50606_irq(int irq, void *_pcf)
++{
++ struct pcf50606_data *pcf = _pcf;
++
++ dev_dbg(&pcf->client.dev, "entering(irq=%u, pcf=%p): scheduling work\n",
++ irq, _pcf);
++ get_device(&pcf->client.dev);
++ if (!schedule_work(&pcf->work) && !pcf->working)
++ dev_err(&pcf->client.dev, "pcf irq work already queued.\n");
++
++ return IRQ_HANDLED;
++}
++
++static u_int16_t adc_to_batt_millivolts(u_int16_t adc)
++{
++ u_int16_t mvolts;
++
++ mvolts = (adc * 6000) / 1024;
++
++ return mvolts;
++}
++
++#define BATTVOLT_SCALE_START 2800
++#define BATTVOLT_SCALE_END 4200
++#define BATTVOLT_SCALE_DIVIDER ((BATTVOLT_SCALE_END - BATTVOLT_SCALE_START)/100)
++
++static u_int8_t battvolt_scale(u_int16_t battvolt)
++{
++ /* FIXME: this linear scale is completely bogus */
++ u_int16_t battvolt_relative = battvolt - BATTVOLT_SCALE_START;
++ unsigned int percent = battvolt_relative / BATTVOLT_SCALE_DIVIDER;
++
++ return percent;
++}
++
++u_int16_t pcf50606_battvolt(struct pcf50606_data *pcf)
++{
++ u_int16_t adc;
++ adc = adc_read(pcf, PCF50606_ADCMUX_BATVOLT_RES, NULL);
++
++ return adc_to_batt_millivolts(adc);
++}
++EXPORT_SYMBOL_GPL(pcf50606_battvolt);
++
++static ssize_t show_battvolt(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++
++ return sprintf(buf, "%u\n", pcf50606_battvolt(pcf));
++}
++static DEVICE_ATTR(battvolt, S_IRUGO | S_IWUSR, show_battvolt, NULL);
++
++static int reg_id_by_name(const char *name)
++{
++ int reg_id;
++
++ if (!strcmp(name, "voltage_dcd"))
++ reg_id = PCF50606_REGULATOR_DCD;
++ else if (!strcmp(name, "voltage_dcde"))
++ reg_id = PCF50606_REGULATOR_DCDE;
++ else if (!strcmp(name, "voltage_dcud"))
++ reg_id = PCF50606_REGULATOR_DCUD;
++ else if (!strcmp(name, "voltage_d1reg"))
++ reg_id = PCF50606_REGULATOR_D1REG;
++ else if (!strcmp(name, "voltage_d2reg"))
++ reg_id = PCF50606_REGULATOR_D2REG;
++ else if (!strcmp(name, "voltage_d3reg"))
++ reg_id = PCF50606_REGULATOR_D3REG;
++ else if (!strcmp(name, "voltage_lpreg"))
++ reg_id = PCF50606_REGULATOR_LPREG;
++ else if (!strcmp(name, "voltage_ioreg"))
++ reg_id = PCF50606_REGULATOR_IOREG;
++ else
++ reg_id = -1;
++
++ return reg_id;
++}
++
++static ssize_t show_vreg(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ unsigned int reg_id;
++
++ reg_id = reg_id_by_name(attr->attr.name);
++ if (reg_id < 0)
++ return 0;
++
++ if (pcf50606_onoff_get(pcf, reg_id) > 0)
++ return sprintf(buf, "%u\n", pcf50606_voltage_get(pcf, reg_id));
++ else
++ return strlcpy(buf, "0\n", PAGE_SIZE);
++}
++
++static ssize_t set_vreg(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ unsigned long mvolts = simple_strtoul(buf, NULL, 10);
++ unsigned int reg_id;
++
++ reg_id = reg_id_by_name(attr->attr.name);
++ if (reg_id < 0)
++ return -EIO;
++
++ dev_dbg(dev, "attempting to set %s(%d) to %lu mvolts\n",
++ attr->attr.name, reg_id, mvolts);
++
++ if (mvolts == 0) {
++ pcf50606_onoff_set(pcf, reg_id, 0);
++ } else {
++ if (pcf50606_voltage_set(pcf, reg_id, mvolts) < 0) {
++ dev_warn(dev, "refusing to set %s(%d) to %lu mvolts "
++ "(max=%u)\n", attr->attr.name, reg_id, mvolts,
++ pcf->pdata->rails[reg_id].voltage.max);
++ return -EINVAL;
++ }
++ pcf50606_onoff_set(pcf, reg_id, 1);
++ }
++
++ return count;
++}
++
++static DEVICE_ATTR(voltage_dcd, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_dcde, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_dcud, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_d1reg, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_d2reg, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_d3reg, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_lpreg, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_ioreg, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++
++/***********************************************************************
++ * Charger Control
++ ***********************************************************************/
++
++/* Enable/disable fast charging (500mA in the GTA01) */
++void pcf50606_charge_fast(struct pcf50606_data *pcf, int on)
++{
++ if (!(pcf->pdata->used_features & PCF50606_FEAT_MBC))
++ return;
++
++ if (on) {
++ /* We can allow PCF to automatically charge
++ * using Ifast */
++ pcf->flags |= PCF50606_F_CHG_FAST;
++ reg_set_bit_mask(pcf, PCF50606_REG_MBCC1,
++ PCF50606_MBCC1_AUTOFST,
++ PCF50606_MBCC1_AUTOFST);
++ } else {
++ pcf->flags &= ~PCF50606_F_CHG_FAST;
++ /* disable automatic fast-charge */
++ reg_clear_bits(pcf, PCF50606_REG_MBCC1,
++ PCF50606_MBCC1_AUTOFST);
++ /* switch to idle mode to abort existing charge
++ * process */
++ reg_set_bit_mask(pcf, PCF50606_REG_MBCC1,
++ PCF50606_MBCC1_CHGMOD_MASK,
++ PCF50606_MBCC1_CHGMOD_IDLE);
++ }
++}
++EXPORT_SYMBOL_GPL(pcf50606_charge_fast);
++
++static inline u_int16_t adc_to_rntc(struct pcf50606_data *pcf, u_int16_t adc)
++{
++ u_int32_t r_ntc = (adc * (u_int32_t)pcf->pdata->r_fix_batt)
++ / (1023 - adc);
++
++ return r_ntc;
++}
++
++static inline int16_t rntc_to_temp(u_int16_t rntc)
++{
++ int i;
++
++ for (i = 0; i < ARRAY_SIZE(ntc_table_10k_3370B); i++) {
++ if (rntc > ntc_table_10k_3370B[i])
++ return i - 10; /* First element is -10 */
++ }
++ return -99; /* Below our range */
++}
++
++static ssize_t show_battemp(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ u_int16_t adc;
++
++ adc = adc_read(pcf, PCF50606_ADCMUX_BATTEMP, NULL);
++
++ return sprintf(buf, "%d\n", rntc_to_temp(adc_to_rntc(pcf, adc)));
++}
++static DEVICE_ATTR(battemp, S_IRUGO | S_IWUSR, show_battemp, NULL);
++
++static inline int16_t adc_to_chg_milliamps(struct pcf50606_data *pcf,
++ u_int16_t adc_adcin1,
++ u_int16_t adc_batvolt)
++{
++ int32_t res = (adc_adcin1 - adc_batvolt) * 2400;
++ return (res * 1000) / (pcf->pdata->r_sense_milli * 1024);
++}
++
++static ssize_t show_chgcur(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ u_int16_t adc_batvolt, adc_adcin1;
++ int16_t ma;
++
++ adc_batvolt = adc_read(pcf, PCF50606_ADCMUX_BATVOLT_ADCIN1,
++ &adc_adcin1);
++ ma = adc_to_chg_milliamps(pcf, adc_adcin1, adc_batvolt);
++
++ return sprintf(buf, "%d\n", ma);
++}
++static DEVICE_ATTR(chgcur, S_IRUGO | S_IWUSR, show_chgcur, NULL);
++
++static const char *chgmode_names[] = {
++ [PCF50606_MBCC1_CHGMOD_QUAL] = "qualification",
++ [PCF50606_MBCC1_CHGMOD_PRE] = "pre",
++ [PCF50606_MBCC1_CHGMOD_TRICKLE] = "trickle",
++ [PCF50606_MBCC1_CHGMOD_FAST_CCCV] = "fast_cccv",
++ [PCF50606_MBCC1_CHGMOD_FAST_NOCC] = "fast_nocc",
++ [PCF50606_MBCC1_CHGMOD_FAST_NOCV] = "fast_nocv",
++ [PCF50606_MBCC1_CHGMOD_FAST_SW] = "fast_switch",
++ [PCF50606_MBCC1_CHGMOD_IDLE] = "idle",
++};
++
++static ssize_t show_chgmode(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ u_int8_t mbcc1 = reg_read(pcf, PCF50606_REG_MBCC1);
++ u_int8_t chgmod = (mbcc1 & PCF50606_MBCC1_CHGMOD_MASK);
++
++ return sprintf(buf, "%s\n", chgmode_names[chgmod]);
++}
++
++static ssize_t set_chgmode(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ u_int8_t mbcc1 = reg_read(pcf, PCF50606_REG_MBCC1);
++
++ mbcc1 &= ~PCF50606_MBCC1_CHGMOD_MASK;
++
++ if (!strcmp(buf, "qualification"))
++ mbcc1 |= PCF50606_MBCC1_CHGMOD_QUAL;
++ else if (!strcmp(buf, "pre"))
++ mbcc1 |= PCF50606_MBCC1_CHGMOD_PRE;
++ else if (!strcmp(buf, "trickle"))
++ mbcc1 |= PCF50606_MBCC1_CHGMOD_TRICKLE;
++ else if (!strcmp(buf, "fast_cccv"))
++ mbcc1 |= PCF50606_MBCC1_CHGMOD_FAST_CCCV;
++ /* We don't allow the other fast modes for security reasons */
++ else if (!strcmp(buf, "idle"))
++ mbcc1 |= PCF50606_MBCC1_CHGMOD_IDLE;
++ else
++ return -EINVAL;
++
++ reg_write(pcf, PCF50606_REG_MBCC1, mbcc1);
++
++ return count;
++}
++
++static DEVICE_ATTR(chgmode, S_IRUGO | S_IWUSR, show_chgmode, set_chgmode);
++
++static const char *chgstate_names[] = {
++ [PCF50606_B_CHG_FAST] = "fast_enabled",
++ [PCF50606_B_CHG_PRESENT] = "present",
++ [PCF50606_B_CHG_FOK] = "fast_ok",
++ [PCF50606_B_CHG_ERR] = "error",
++ [PCF50606_B_CHG_PROT] = "protection",
++ [PCF50606_B_CHG_READY] = "ready",
++};
++
++static ssize_t show_chgstate(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ char *b = buf;
++ int i;
++
++ for (i = 0; i < 32; i++)
++ if (pcf->flags & (1 << i) && i < ARRAY_SIZE(chgstate_names))
++ b += sprintf(b, "%s ", chgstate_names[i]);
++
++ if (b > buf)
++ b += sprintf(b, "\n");
++
++ return b - buf;
++}
++static DEVICE_ATTR(chgstate, S_IRUGO | S_IWUSR, show_chgstate, NULL);
++
++/***********************************************************************
++ * APM emulation
++ ***********************************************************************/
++
++static void pcf50606_get_power_status(struct apm_power_info *info)
++{
++ struct pcf50606_data *pcf = pcf50606_global;
++ u_int8_t mbcc1 = reg_read(pcf, PCF50606_REG_MBCC1);
++ u_int8_t chgmod = mbcc1 & PCF50606_MBCC1_CHGMOD_MASK;
++ u_int16_t battvolt = pcf50606_battvolt(pcf);
++
++ if (reg_read(pcf, PCF50606_REG_OOCS) & PCF50606_OOCS_EXTON)
++ info->ac_line_status = APM_AC_ONLINE;
++ else
++ info->ac_line_status = APM_AC_OFFLINE;
++
++ switch (chgmod) {
++ case PCF50606_MBCC1_CHGMOD_QUAL:
++ case PCF50606_MBCC1_CHGMOD_PRE:
++ case PCF50606_MBCC1_CHGMOD_IDLE:
++ info->battery_life = battvolt_scale(battvolt);
++ break;
++ default:
++ info->battery_status = APM_BATTERY_STATUS_CHARGING;
++ info->battery_flag = APM_BATTERY_FLAG_CHARGING;
++ break;
++ }
++}
++
++/***********************************************************************
++ * Battery driver interface
++ ***********************************************************************/
++static int pcf50606_bat_get_property(struct power_supply *psy,
++ enum power_supply_property psp,
++ union power_supply_propval *val)
++{
++ u_int16_t adc, adc_adcin1;
++ u_int8_t mbcc1, chgmod;
++ struct pcf50606_data *pcf = pcf50606_global;
++ int ret = 0;
++
++ switch (psp) {
++
++ case POWER_SUPPLY_PROP_STATUS:
++ if (!(reg_read(pcf, PCF50606_REG_OOCS) & PCF50606_OOCS_EXTON)) {
++ /* No charger, clearly we're discharging then */
++ val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
++ } else {
++
++ /* We have a charger present, get charge mode */
++ mbcc1 = reg_read(pcf, PCF50606_REG_MBCC1);
++ chgmod = (mbcc1 & PCF50606_MBCC1_CHGMOD_MASK);
++ switch (chgmod) {
++
++ /* TODO: How to determine POWER_SUPPLY_STATUS_FULL? */
++
++ case PCF50606_MBCC1_CHGMOD_QUAL:
++ case PCF50606_MBCC1_CHGMOD_PRE:
++ case PCF50606_MBCC1_CHGMOD_IDLE:
++ val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
++ break;
++
++ case PCF50606_MBCC1_CHGMOD_TRICKLE:
++ case PCF50606_MBCC1_CHGMOD_FAST_CCCV:
++ case PCF50606_MBCC1_CHGMOD_FAST_NOCC:
++ case PCF50606_MBCC1_CHGMOD_FAST_NOCV:
++ case PCF50606_MBCC1_CHGMOD_FAST_SW:
++ val->intval = POWER_SUPPLY_STATUS_CHARGING;
++ break;
++
++ default:
++ val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
++ break;
++
++ }
++ }
++
++ case POWER_SUPPLY_PROP_PRESENT:
++ val->intval = 1; /* Must be, or the magic smoke comes out */
++ break;
++
++ case POWER_SUPPLY_PROP_ONLINE:
++ val->intval = !!(reg_read(pcf, PCF50606_REG_OOCS) &
++ PCF50606_OOCS_EXTON);
++ break;
++
++ case POWER_SUPPLY_PROP_VOLTAGE_NOW:
++ adc = adc_read(pcf, PCF50606_ADCMUX_BATVOLT_RES, NULL);
++ /* (adc * 6000000) / 1024 == (adc * 46875) / 8 */
++ val->intval = (adc * 46875) / 8;
++ break;
++
++ case POWER_SUPPLY_PROP_CURRENT_NOW:
++ adc = adc_read(pcf, PCF50606_ADCMUX_BATVOLT_ADCIN1,
++ &adc_adcin1);
++ val->intval = adc_to_chg_milliamps(pcf, adc_adcin1, adc) * 1000;
++ break;
++
++ case POWER_SUPPLY_PROP_TEMP:
++ adc = adc_read(pcf, PCF50606_ADCMUX_BATTEMP, NULL);
++ val->intval = rntc_to_temp(adc_to_rntc(pcf, adc)) * 10;
++ break;
++
++ case POWER_SUPPLY_PROP_CAPACITY:
++ val->intval = battvolt_scale(pcf50606_battvolt(pcf));
++ break;
++
++ default:
++ ret = -EINVAL;
++ break;
++ }
++
++ return ret;
++}
++
++/***********************************************************************
++ * RTC
++ ***********************************************************************/
++
++struct pcf50606_time {
++ u_int8_t sec;
++ u_int8_t min;
++ u_int8_t hour;
++ u_int8_t wkday;
++ u_int8_t day;
++ u_int8_t month;
++ u_int8_t year;
++};
++
++static void pcf2rtc_time(struct rtc_time *rtc, struct pcf50606_time *pcf)
++{
++ rtc->tm_sec = BCD2BIN(pcf->sec);
++ rtc->tm_min = BCD2BIN(pcf->min);
++ rtc->tm_hour = BCD2BIN(pcf->hour);
++ rtc->tm_wday = BCD2BIN(pcf->wkday);
++ rtc->tm_mday = BCD2BIN(pcf->day);
++ rtc->tm_mon = BCD2BIN(pcf->month);
++ rtc->tm_year = BCD2BIN(pcf->year) + 100;
++}
++
++static void rtc2pcf_time(struct pcf50606_time *pcf, struct rtc_time *rtc)
++{
++ pcf->sec = BIN2BCD(rtc->tm_sec);
++ pcf->min = BIN2BCD(rtc->tm_min);
++ pcf->hour = BIN2BCD(rtc->tm_hour);
++ pcf->wkday = BIN2BCD(rtc->tm_wday);
++ pcf->day = BIN2BCD(rtc->tm_mday);
++ pcf->month = BIN2BCD(rtc->tm_mon);
++ pcf->year = BIN2BCD(rtc->tm_year - 100);
++}
++
++static int pcf50606_rtc_ioctl(struct device *dev, unsigned int cmd,
++ unsigned long arg)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++
++ switch (cmd) {
++ case RTC_AIE_OFF:
++ /* disable the alarm interrupt */
++ reg_set_bit_mask(pcf, PCF50606_REG_INT1M,
++ PCF50606_INT1_ALARM, PCF50606_INT1_ALARM);
++ return 0;
++ case RTC_AIE_ON:
++ /* enable the alarm interrupt */
++ reg_clear_bits(pcf, PCF50606_REG_INT1M, PCF50606_INT1_ALARM);
++ return 0;
++ case RTC_PIE_OFF:
++ /* disable periodic interrupt (hz tick) */
++ pcf->flags &= ~PCF50606_F_RTC_SECOND;
++ reg_set_bit_mask(pcf, PCF50606_REG_INT1M,
++ PCF50606_INT1_SECOND, PCF50606_INT1_SECOND);
++ return 0;
++ case RTC_PIE_ON:
++ /* ensable periodic interrupt (hz tick) */
++ pcf->flags |= PCF50606_F_RTC_SECOND;
++ reg_clear_bits(pcf, PCF50606_REG_INT1M, PCF50606_INT1_SECOND);
++ return 0;
++ }
++ return -ENOIOCTLCMD;
++}
++
++static int pcf50606_rtc_read_time(struct device *dev, struct rtc_time *tm)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ struct pcf50606_time pcf_tm;
++
++ mutex_lock(&pcf->lock);
++ pcf_tm.sec = __reg_read(pcf, PCF50606_REG_RTCSC);
++ pcf_tm.min = __reg_read(pcf, PCF50606_REG_RTCMN);
++ pcf_tm.hour = __reg_read(pcf, PCF50606_REG_RTCHR);
++ pcf_tm.wkday = __reg_read(pcf, PCF50606_REG_RTCWD);
++ pcf_tm.day = __reg_read(pcf, PCF50606_REG_RTCDT);
++ pcf_tm.month = __reg_read(pcf, PCF50606_REG_RTCMT);
++ pcf_tm.year = __reg_read(pcf, PCF50606_REG_RTCYR);
++ mutex_unlock(&pcf->lock);
++
++ dev_dbg(dev, "PCF_TIME: %02x.%02x.%02x %02x:%02x:%02x\n",
++ pcf_tm.day, pcf_tm.month, pcf_tm.year,
++ pcf_tm.hour, pcf_tm.min, pcf_tm.sec);
++
++ pcf2rtc_time(tm, &pcf_tm);
++
++ dev_dbg(dev, "RTC_TIME: %u.%u.%u %u:%u:%u\n",
++ tm->tm_mday, tm->tm_mon, tm->tm_year,
++ tm->tm_hour, tm->tm_min, tm->tm_sec);
++
++ return 0;
++}
++
++static int pcf50606_rtc_set_time(struct device *dev, struct rtc_time *tm)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ struct pcf50606_time pcf_tm;
++ u_int8_t int1m;
++
++ dev_dbg(dev, "RTC_TIME: %u.%u.%u %u:%u:%u\n",
++ tm->tm_mday, tm->tm_mon, tm->tm_year,
++ tm->tm_hour, tm->tm_min, tm->tm_sec);
++ rtc2pcf_time(&pcf_tm, tm);
++ dev_dbg(dev, "PCF_TIME: %02x.%02x.%02x %02x:%02x:%02x\n",
++ pcf_tm.day, pcf_tm.month, pcf_tm.year,
++ pcf_tm.hour, pcf_tm.min, pcf_tm.sec);
++
++ mutex_lock(&pcf->lock);
++
++ /* disable SECOND interrupt */
++ int1m = __reg_read(pcf, PCF50606_REG_INT1M);
++ __reg_write(pcf, PCF50606_REG_INT1M, int1m | PCF50606_INT1_SECOND);
++
++ __reg_write(pcf, PCF50606_REG_RTCSC, pcf_tm.sec);
++ __reg_write(pcf, PCF50606_REG_RTCMN, pcf_tm.min);
++ __reg_write(pcf, PCF50606_REG_RTCHR, pcf_tm.hour);
++ __reg_write(pcf, PCF50606_REG_RTCWD, pcf_tm.wkday);
++ __reg_write(pcf, PCF50606_REG_RTCDT, pcf_tm.day);
++ __reg_write(pcf, PCF50606_REG_RTCMT, pcf_tm.month);
++ __reg_write(pcf, PCF50606_REG_RTCYR, pcf_tm.year);
++
++ /* restore INT1M, potentially re-enable SECOND interrupt */
++ __reg_write(pcf, PCF50606_REG_INT1M, int1m);
++
++ mutex_unlock(&pcf->lock);
++
++ return 0;
++}
++
++static int pcf50606_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ struct pcf50606_time pcf_tm;
++
++ mutex_lock(&pcf->lock);
++ alrm->enabled =
++ __reg_read(pcf, PCF50606_REG_INT1M) & PCF50606_INT1_ALARM
++ ? 0 : 1;
++ pcf_tm.sec = __reg_read(pcf, PCF50606_REG_RTCSCA);
++ pcf_tm.min = __reg_read(pcf, PCF50606_REG_RTCMNA);
++ pcf_tm.hour = __reg_read(pcf, PCF50606_REG_RTCHRA);
++ pcf_tm.wkday = __reg_read(pcf, PCF50606_REG_RTCWDA);
++ pcf_tm.day = __reg_read(pcf, PCF50606_REG_RTCDTA);
++ pcf_tm.month = __reg_read(pcf, PCF50606_REG_RTCMTA);
++ pcf_tm.year = __reg_read(pcf, PCF50606_REG_RTCYRA);
++ mutex_unlock(&pcf->lock);
++
++ pcf2rtc_time(&alrm->time, &pcf_tm);
++
++ return 0;
++}
++
++static int pcf50606_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ struct pcf50606_time pcf_tm;
++ u_int8_t irqmask;
++
++ rtc2pcf_time(&pcf_tm, &alrm->time);
++
++ mutex_lock(&pcf->lock);
++
++ /* disable alarm interrupt */
++ irqmask = __reg_read(pcf, PCF50606_REG_INT1M);
++ irqmask |= PCF50606_INT1_ALARM;
++ __reg_write(pcf, PCF50606_REG_INT1M, irqmask);
++
++ __reg_write(pcf, PCF50606_REG_RTCSCA, pcf_tm.sec);
++ __reg_write(pcf, PCF50606_REG_RTCMNA, pcf_tm.min);
++ __reg_write(pcf, PCF50606_REG_RTCHRA, pcf_tm.hour);
++ __reg_write(pcf, PCF50606_REG_RTCWDA, pcf_tm.wkday);
++ __reg_write(pcf, PCF50606_REG_RTCDTA, pcf_tm.day);
++ __reg_write(pcf, PCF50606_REG_RTCMTA, pcf_tm.month);
++ __reg_write(pcf, PCF50606_REG_RTCYRA, pcf_tm.year);
++
++ if (alrm->enabled) {
++ /* (re-)enaable alarm interrupt */
++ irqmask = __reg_read(pcf, PCF50606_REG_INT1M);
++ irqmask &= ~PCF50606_INT1_ALARM;
++ __reg_write(pcf, PCF50606_REG_INT1M, irqmask);
++ }
++
++ mutex_unlock(&pcf->lock);
++
++ /* FIXME */
++ return 0;
++}
++
++static struct rtc_class_ops pcf50606_rtc_ops = {
++ .ioctl = pcf50606_rtc_ioctl,
++ .read_time = pcf50606_rtc_read_time,
++ .set_time = pcf50606_rtc_set_time,
++ .read_alarm = pcf50606_rtc_read_alarm,
++ .set_alarm = pcf50606_rtc_set_alarm,
++};
++
++/***********************************************************************
++ * Watchdog
++ ***********************************************************************/
++
++static void pcf50606_wdt_start(struct pcf50606_data *pcf)
++{
++ reg_set_bit_mask(pcf, PCF50606_REG_OOCC1, PCF50606_OOCC1_WDTRST,
++ PCF50606_OOCC1_WDTRST);
++}
++
++static void pcf50606_wdt_stop(struct pcf50606_data *pcf)
++{
++ reg_clear_bits(pcf, PCF50606_REG_OOCS, PCF50606_OOCS_WDTEXP);
++}
++
++static void pcf50606_wdt_keepalive(struct pcf50606_data *pcf)
++{
++ pcf50606_wdt_start(pcf);
++}
++
++static int pcf50606_wdt_open(struct inode *inode, struct file *file)
++{
++ struct pcf50606_data *pcf = pcf50606_global;
++
++ file->private_data = pcf;
++
++ /* start the timer */
++ pcf50606_wdt_start(pcf);
++
++ return nonseekable_open(inode, file);
++}
++
++static int pcf50606_wdt_release(struct inode *inode, struct file *file)
++{
++ struct pcf50606_data *pcf = file->private_data;
++
++ if (pcf->allow_close == CLOSE_STATE_ALLOW)
++ pcf50606_wdt_stop(pcf);
++ else {
++ printk(KERN_CRIT "Unexpected close, not stopping watchdog!\n");
++ pcf50606_wdt_keepalive(pcf);
++ }
++
++ pcf->allow_close = CLOSE_STATE_NOT;
++
++ return 0;
++}
++
++static ssize_t pcf50606_wdt_write(struct file *file, const char __user *data,
++ size_t len, loff_t *ppos)
++{
++ struct pcf50606_data *pcf = file->private_data;
++ if (len) {
++ size_t i;
++
++ for (i = 0; i != len; i++) {
++ char c;
++ if (get_user(c, data + i))
++ return -EFAULT;
++ if (c == 'V')
++ pcf->allow_close = CLOSE_STATE_ALLOW;
++ }
++ pcf50606_wdt_keepalive(pcf);
++ }
++
++ return len;
++}
++
++static struct watchdog_info pcf50606_wdt_ident = {
++ .options = WDIOF_MAGICCLOSE,
++ .firmware_version = 0,
++ .identity = "PCF50606 Watchdog",
++};
++
++static int pcf50606_wdt_ioctl(struct inode *inode, struct file *file,
++ unsigned int cmd, unsigned long arg)
++{
++ struct pcf50606_data *pcf = file->private_data;
++ void __user *argp = (void __user *)arg;
++ int __user *p = argp;
++
++ switch (cmd) {
++ case WDIOC_GETSUPPORT:
++ return copy_to_user(argp, &pcf50606_wdt_ident,
++ sizeof(pcf50606_wdt_ident)) ? -EFAULT : 0;
++ break;
++ case WDIOC_GETSTATUS:
++ case WDIOC_GETBOOTSTATUS:
++ return put_user(0, p);
++ case WDIOC_KEEPALIVE:
++ pcf50606_wdt_keepalive(pcf);
++ return 0;
++ case WDIOC_GETTIMEOUT:
++ return put_user(8, p);
++ default:
++ return -ENOIOCTLCMD;
++ }
++}
++
++static struct file_operations pcf50606_wdt_fops = {
++ .owner = THIS_MODULE,
++ .llseek = no_llseek,
++ .write = &pcf50606_wdt_write,
++ .ioctl = &pcf50606_wdt_ioctl,
++ .open = &pcf50606_wdt_open,
++ .release = &pcf50606_wdt_release,
++};
++
++static struct miscdevice pcf50606_wdt_miscdev = {
++ .minor = WATCHDOG_MINOR,
++ .name = "watchdog",
++ .fops = &pcf50606_wdt_fops,
++};
++
++/***********************************************************************
++ * PWM
++ ***********************************************************************/
++
++static const char *pwm_dc_table[] = {
++ "0/16", "1/16", "2/16", "3/16",
++ "4/16", "5/16", "6/16", "7/16",
++ "8/16", "9/16", "10/16", "11/16",
++ "12/16", "13/16", "14/16", "15/16",
++};
++
++static ssize_t show_pwm_dc(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ u_int8_t val;
++
++ val = reg_read(pcf, PCF50606_REG_PWMC1) >> PCF50606_PWMC1_DC_SHIFT;
++ val &= 0xf;
++
++ return sprintf(buf, "%s\n", pwm_dc_table[val]);
++}
++
++static ssize_t set_pwm_dc(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ u_int8_t i;
++
++ for (i = 0; i < ARRAY_SIZE(pwm_dc_table); i++) {
++ if (!strncmp(buf, pwm_dc_table[i], strlen(pwm_dc_table[i]))) {
++ dev_dbg(dev, "setting pwm dc %s\n\r", pwm_dc_table[i]);
++ reg_set_bit_mask(pcf, PCF50606_REG_PWMC1, 0x1e,
++ (i << PCF50606_PWMC1_DC_SHIFT));
++ }
++ }
++ return count;
++}
++
++static DEVICE_ATTR(pwm_dc, S_IRUGO | S_IWUSR, show_pwm_dc, set_pwm_dc);
++
++static const char *pwm_clk_table[] = {
++ "512", "256", "128", "64",
++ "56300", "28100", "14100", "7000",
++};
++
++static ssize_t show_pwm_clk(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ u_int8_t val;
++
++ val = reg_read(pcf, PCF50606_REG_PWMC1) >> PCF50606_PWMC1_CLK_SHIFT;
++ val &= 0x7;
++
++ return sprintf(buf, "%s\n", pwm_clk_table[val]);
++}
++
++static ssize_t set_pwm_clk(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ u_int8_t i;
++
++ for (i = 0; i < ARRAY_SIZE(pwm_clk_table); i++) {
++ if (!strncmp(buf, pwm_clk_table[i], strlen(pwm_clk_table[i]))) {
++ dev_dbg(dev, "setting pwm clk %s\n\r",
++ pwm_clk_table[i]);
++ reg_set_bit_mask(pcf, PCF50606_REG_PWMC1, 0xe0,
++ (i << PCF50606_PWMC1_CLK_SHIFT));
++ }
++ }
++ return count;
++}
++
++static DEVICE_ATTR(pwm_clk, S_IRUGO | S_IWUSR, show_pwm_clk, set_pwm_clk);
++
++static int pcf50606bl_get_intensity(struct backlight_device *bd)
++{
++ struct pcf50606_data *pcf = bl_get_data(bd);
++ int intensity = reg_read(pcf, PCF50606_REG_PWMC1);
++ intensity = (intensity >> PCF50606_PWMC1_DC_SHIFT);
++
++ return intensity & 0xf;
++}
++
++static int pcf50606bl_set_intensity(struct backlight_device *bd)
++{
++ struct pcf50606_data *pcf = bl_get_data(bd);
++ int intensity = bd->props.brightness;
++
++ if (bd->props.power != FB_BLANK_UNBLANK)
++ intensity = 0;
++ if (bd->props.fb_blank != FB_BLANK_UNBLANK)
++ intensity = 0;
++
++ return reg_set_bit_mask(pcf, PCF50606_REG_PWMC1, 0x1e,
++ (intensity << PCF50606_PWMC1_DC_SHIFT));
++}
++
++static struct backlight_ops pcf50606bl_ops = {
++ .get_brightness = pcf50606bl_get_intensity,
++ .update_status = pcf50606bl_set_intensity,
++};
++
++/***********************************************************************
++ * Driver initialization
++ ***********************************************************************/
++
++#ifdef CONFIG_MACH_NEO1973_GTA01
++/* We currently place those platform devices here to make sure the device
++ * suspend/resume order is correct */
++static struct platform_device gta01_pm_gps_dev = {
++ .name = "neo1973-pm-gps",
++};
++
++static struct platform_device gta01_pm_bt_dev = {
++ .name = "neo1973-pm-bt",
++};
++#endif
++
++static struct attribute *pcf_sysfs_entries[16] = {
++ &dev_attr_voltage_dcd.attr,
++ &dev_attr_voltage_dcde.attr,
++ &dev_attr_voltage_dcud.attr,
++ &dev_attr_voltage_d1reg.attr,
++ &dev_attr_voltage_d2reg.attr,
++ &dev_attr_voltage_d3reg.attr,
++ &dev_attr_voltage_lpreg.attr,
++ &dev_attr_voltage_ioreg.attr,
++ NULL
++};
++
++static struct attribute_group pcf_attr_group = {
++ .name = NULL, /* put in device directory */
++ .attrs = pcf_sysfs_entries,
++};
++
++static void populate_sysfs_group(struct pcf50606_data *pcf)
++{
++ int i = 0;
++ struct attribute **attr;
++
++ for (attr = pcf_sysfs_entries; *attr; attr++)
++ i++;
++
++ if (pcf->pdata->used_features & PCF50606_FEAT_MBC) {
++ pcf_sysfs_entries[i++] = &dev_attr_chgstate.attr;
++ pcf_sysfs_entries[i++] = &dev_attr_chgmode.attr;
++ }
++
++ if (pcf->pdata->used_features & PCF50606_FEAT_CHGCUR)
++ pcf_sysfs_entries[i++] = &dev_attr_chgcur.attr;
++
++ if (pcf->pdata->used_features & PCF50606_FEAT_BATVOLT)
++ pcf_sysfs_entries[i++] = &dev_attr_battvolt.attr;
++
++ if (pcf->pdata->used_features & PCF50606_FEAT_BATTEMP)
++ pcf_sysfs_entries[i++] = &dev_attr_battemp.attr;
++
++ if (pcf->pdata->used_features & PCF50606_FEAT_PWM) {
++ pcf_sysfs_entries[i++] = &dev_attr_pwm_dc.attr;
++ pcf_sysfs_entries[i++] = &dev_attr_pwm_clk.attr;
++ }
++}
++
++static int pcf50606_detect(struct i2c_adapter *adapter, int address, int kind)
++{
++ struct i2c_client *new_client;
++ struct pcf50606_data *data;
++ int err = 0;
++ int irq;
++
++ if (!pcf50606_pdev) {
++ printk(KERN_ERR "pcf50606: driver needs a platform_device!\n");
++ return -EIO;
++ }
++
++ irq = platform_get_irq(pcf50606_pdev, 0);
++ if (irq < 0) {
++ dev_err(&pcf50606_pdev->dev, "no irq in platform resources!\n");
++ return -EIO;
++ }
++
++ /* At the moment, we only support one PCF50606 in a system */
++ if (pcf50606_global) {
++ dev_err(&pcf50606_pdev->dev,
++ "currently only one chip supported\n");
++ return -EBUSY;
++ }
++
++ data = kzalloc(sizeof(*data), GFP_KERNEL);
++ if (!data)
++ return -ENOMEM;
++
++ mutex_init(&data->lock);
++ mutex_init(&data->working_lock);
++ INIT_WORK(&data->work, pcf50606_work);
++ data->irq = irq;
++ data->working = 0;
++ data->suppress_onkey_events = 0;
++ data->onkey_seconds = -1;
++ data->pdata = pcf50606_pdev->dev.platform_data;
++
++ new_client = &data->client;
++ i2c_set_clientdata(new_client, data);
++ new_client->addr = address;
++ new_client->adapter = adapter;
++ new_client->driver = &pcf50606_driver;
++ new_client->flags = 0;
++ strlcpy(new_client->name, "pcf50606", I2C_NAME_SIZE);
++
++ /* now we try to detect the chip */
++
++ /* register with i2c core */
++ err = i2c_attach_client(new_client);
++ if (err) {
++ dev_err(&new_client->dev,
++ "error during i2c_attach_client()\n");
++ goto exit_free;
++ }
++
++ populate_sysfs_group(data);
++
++ err = sysfs_create_group(&new_client->dev.kobj, &pcf_attr_group);
++ if (err) {
++ dev_err(&new_client->dev, "error creating sysfs group\n");
++ goto exit_detach;
++ }
++
++ /* create virtual charger 'device' */
++
++ /* input device registration */
++ data->input_dev = input_allocate_device();
++ if (!data->input_dev)
++ goto exit_sysfs;
++
++ data->input_dev->name = "FIC Neo1973 PMU events";
++ data->input_dev->phys = "I2C";
++ data->input_dev->id.bustype = BUS_I2C;
++ data->input_dev->cdev.dev = &new_client->dev;
++
++ data->input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_PWR);
++ set_bit(KEY_POWER, data->input_dev->keybit);
++ set_bit(KEY_POWER2, data->input_dev->keybit);
++ set_bit(KEY_BATTERY, data->input_dev->keybit);
++
++ err = input_register_device(data->input_dev);
++ if (err)
++ goto exit_sysfs;
++
++ /* register power off handler with core power management */
++ pm_power_off = &pcf50606_go_standby;
++
++ /* configure interrupt mask */
++ /* we don't mask SECOND here, because we want one to do coldplug with */
++ reg_write(data, PCF50606_REG_INT1M, 0x00);
++ reg_write(data, PCF50606_REG_INT2M, 0x00);
++ reg_write(data, PCF50606_REG_INT3M, PCF50606_INT3_TSCPRES);
++
++ err = request_irq(irq, pcf50606_irq, IRQF_TRIGGER_FALLING,
++ "pcf50606", data);
++ if (err < 0)
++ goto exit_input;
++
++ if (enable_irq_wake(irq) < 0)
++ dev_err(&new_client->dev, "IRQ %u cannot be enabled as wake-up"
++ "source in this hardware revision!", irq);
++
++ pcf50606_global = data;
++
++ if (data->pdata->used_features & PCF50606_FEAT_RTC) {
++ data->rtc = rtc_device_register("pcf50606", &new_client->dev,
++ &pcf50606_rtc_ops, THIS_MODULE);
++ if (IS_ERR(data->rtc)) {
++ err = PTR_ERR(data->rtc);
++ goto exit_irq;
++ }
++ }
++
++ if (data->pdata->used_features & PCF50606_FEAT_WDT) {
++ err = misc_register(&pcf50606_wdt_miscdev);
++ if (err) {
++ dev_err(&new_client->dev, "cannot register miscdev on "
++ "minor=%d (%d)\n", WATCHDOG_MINOR, err);
++ goto exit_rtc;
++ }
++ }
++
++ if (data->pdata->used_features & PCF50606_FEAT_PWM) {
++ /* enable PWM controller */
++ reg_set_bit_mask(data, PCF50606_REG_PWMC1,
++ PCF50606_PWMC1_ACTSET,
++ PCF50606_PWMC1_ACTSET);
++ }
++
++ if (data->pdata->used_features & PCF50606_FEAT_PWM_BL) {
++ data->backlight = backlight_device_register("pcf50606-bl",
++ &new_client->dev,
++ data,
++ &pcf50606bl_ops);
++ if (!data->backlight)
++ goto exit_misc;
++ data->backlight->props.max_brightness = 16;
++ data->backlight->props.power = FB_BLANK_UNBLANK;
++ data->backlight->props.brightness =
++ data->pdata->init_brightness;
++ backlight_update_status(data->backlight);
++ }
++
++ apm_get_power_status = pcf50606_get_power_status;
++ pmu_bat_get_property = pcf50606_bat_get_property;
++
++#ifdef CONFIG_MACH_NEO1973_GTA01
++ if (machine_is_neo1973_gta01()) {
++ gta01_pm_gps_dev.dev.parent = &new_client->dev;
++ switch (system_rev) {
++ case GTA01Bv2_SYSTEM_REV:
++ case GTA01Bv3_SYSTEM_REV:
++ case GTA01Bv4_SYSTEM_REV:
++ gta01_pm_bt_dev.dev.parent = &new_client->dev;
++ platform_device_register(>a01_pm_bt_dev);
++ break;
++ }
++ platform_device_register(>a01_pm_gps_dev);
++ /* a link for gllin compatibility */
++ err = sysfs_create_link(&platform_bus_type.devices.kobj,
++ >a01_pm_gps_dev.dev.kobj, "gta01-pm-gps.0");
++ if (err)
++ printk(KERN_ERR
++ "sysfs_create_link (gta01-pm-gps.0): %d\n", err);
++ }
++#endif
++
++ if (data->pdata->used_features & PCF50606_FEAT_ACD)
++ reg_set_bit_mask(data, PCF50606_REG_ACDC1,
++ PCF50606_ACDC1_ACDAPE, PCF50606_ACDC1_ACDAPE);
++ else
++ reg_clear_bits(data, PCF50606_REG_ACDC1,
++ PCF50606_ACDC1_ACDAPE);
++
++ return 0;
++
++exit_misc:
++ if (data->pdata->used_features & PCF50606_FEAT_WDT)
++ misc_deregister(&pcf50606_wdt_miscdev);
++exit_rtc:
++ if (data->pdata->used_features & PCF50606_FEAT_RTC)
++ rtc_device_unregister(pcf50606_global->rtc);
++exit_irq:
++ free_irq(pcf50606_global->irq, pcf50606_global);
++ pcf50606_global = NULL;
++exit_input:
++ pm_power_off = NULL;
++ input_unregister_device(data->input_dev);
++exit_sysfs:
++ sysfs_remove_group(&new_client->dev.kobj, &pcf_attr_group);
++exit_detach:
++ i2c_detach_client(new_client);
++exit_free:
++ kfree(data);
++ return err;
++}
++
++static int pcf50606_attach_adapter(struct i2c_adapter *adapter)
++{
++ return i2c_probe(adapter, &addr_data, &pcf50606_detect);
++}
++
++static int pcf50606_detach_client(struct i2c_client *client)
++{
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++
++ apm_get_power_status = NULL;
++ pmu_bat_get_property = NULL;
++
++ input_unregister_device(pcf->input_dev);
++
++ if (pcf->pdata->used_features & PCF50606_FEAT_PWM_BL)
++ backlight_device_unregister(pcf->backlight);
++
++ if (pcf->pdata->used_features & PCF50606_FEAT_WDT)
++ misc_deregister(&pcf50606_wdt_miscdev);
++
++ if (pcf->pdata->used_features & PCF50606_FEAT_RTC)
++ rtc_device_unregister(pcf->rtc);
++
++ free_irq(pcf->irq, pcf);
++
++ sysfs_remove_group(&client->dev.kobj, &pcf_attr_group);
++
++ pm_power_off = NULL;
++
++ kfree(pcf);
++
++ return 0;
++}
++
++#ifdef CONFIG_PM
++#define INT1M_RESUMERS (PCF50606_INT1_ALARM | \
++ PCF50606_INT1_ONKEYF | \
++ PCF50606_INT1_EXTONR)
++#define INT2M_RESUMERS (PCF50606_INT2_CHGWD10S | \
++ PCF50606_INT2_CHGPROT | \
++ PCF50606_INT2_CHGERR)
++#define INT3M_RESUMERS (PCF50606_INT3_LOWBAT | \
++ PCF50606_INT3_HIGHTMP | \
++ PCF50606_INT3_ACDINS)
++static int pcf50606_suspend(struct device *dev, pm_message_t state)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++ int i;
++
++ /* we suspend once (!) as late as possible in the suspend sequencing */
++
++ if ((state.event != PM_EVENT_SUSPEND) ||
++ (pcf->suspend_state != PCF50606_SS_RUNNING))
++ return -EBUSY;
++
++ /* The general idea is to power down all unused power supplies,
++ * and then mask all PCF50606 interrup sources but EXTONR, ONKEYF
++ * and ALARM */
++
++ mutex_lock(&pcf->lock);
++
++ pcf->suspend_state = PCF50606_SS_STARTING_SUSPEND;
++
++ /* we are not going to service any further interrupts until we
++ * resume. If the IRQ workqueue is still pending in the background,
++ * it will bail when it sees we set suspend state above.
++ */
++
++ disable_irq(pcf->irq);
++
++ /* Save all registers that don't "survive" standby state */
++ pcf->standby_regs.dcdc1 = __reg_read(pcf, PCF50606_REG_DCDC1);
++ pcf->standby_regs.dcdc2 = __reg_read(pcf, PCF50606_REG_DCDC2);
++ pcf->standby_regs.dcdec1 = __reg_read(pcf, PCF50606_REG_DCDEC1);
++ pcf->standby_regs.dcudc1 = __reg_read(pcf, PCF50606_REG_DCUDC1);
++ pcf->standby_regs.ioregc = __reg_read(pcf, PCF50606_REG_IOREGC);
++ pcf->standby_regs.d1regc1 = __reg_read(pcf, PCF50606_REG_D1REGC1);
++ pcf->standby_regs.d2regc1 = __reg_read(pcf, PCF50606_REG_D2REGC1);
++ pcf->standby_regs.d3regc1 = __reg_read(pcf, PCF50606_REG_D3REGC1);
++ pcf->standby_regs.lpregc1 = __reg_read(pcf, PCF50606_REG_LPREGC1);
++ pcf->standby_regs.adcc1 = __reg_read(pcf, PCF50606_REG_ADCC1);
++ pcf->standby_regs.adcc2 = __reg_read(pcf, PCF50606_REG_ADCC2);
++ pcf->standby_regs.pwmc1 = __reg_read(pcf, PCF50606_REG_PWMC1);
++
++ /* switch off power supplies that are not needed during suspend */
++ for (i = 0; i < __NUM_PCF50606_REGULATORS; i++) {
++ if (!(pcf->pdata->rails[i].flags & PMU_VRAIL_F_SUSPEND_ON)) {
++ u_int8_t tmp;
++
++ /* IOREG powers the I@C interface so we cannot switch
++ * it off */
++ if (i == PCF50606_REGULATOR_IOREG)
++ continue;
++
++ dev_dbg(dev, "disabling pcf50606 regulator %u\n", i);
++ /* we cannot use pcf50606_onoff_set() because we're
++ * already under the mutex */
++ tmp = __reg_read(pcf, regulator_registers[i]);
++ tmp &= 0x1f;
++ __reg_write(pcf, regulator_registers[i], tmp);
++ }
++ }
++
++ pcf->standby_regs.int1m = __reg_read(pcf, PCF50606_REG_INT1M);
++ pcf->standby_regs.int2m = __reg_read(pcf, PCF50606_REG_INT2M);
++ pcf->standby_regs.int3m = __reg_read(pcf, PCF50606_REG_INT3M);
++ __reg_write(pcf, PCF50606_REG_INT1M, ~INT1M_RESUMERS & 0xff);
++ __reg_write(pcf, PCF50606_REG_INT2M, ~INT2M_RESUMERS & 0xff);
++ __reg_write(pcf, PCF50606_REG_INT3M, ~INT3M_RESUMERS & 0xff);
++
++ pcf->suspend_state = PCF50606_SS_COMPLETED_SUSPEND;
++
++ mutex_unlock(&pcf->lock);
++
++ return 0;
++}
++
++static int pcf50606_resume(struct device *dev)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50606_data *pcf = i2c_get_clientdata(client);
++
++ mutex_lock(&pcf->lock);
++
++ pcf->suspend_state = PCF50606_SS_STARTING_RESUME;
++
++ /* Resume all saved registers that don't "survive" standby state */
++ __reg_write(pcf, PCF50606_REG_INT1M, pcf->standby_regs.int1m);
++ __reg_write(pcf, PCF50606_REG_INT2M, pcf->standby_regs.int2m);
++ __reg_write(pcf, PCF50606_REG_INT3M, pcf->standby_regs.int3m);
++
++ __reg_write(pcf, PCF50606_REG_DCDC1, pcf->standby_regs.dcdc1);
++ __reg_write(pcf, PCF50606_REG_DCDC2, pcf->standby_regs.dcdc2);
++ __reg_write(pcf, PCF50606_REG_DCDEC1, pcf->standby_regs.dcdec1);
++ __reg_write(pcf, PCF50606_REG_DCUDC1, pcf->standby_regs.dcudc1);
++ __reg_write(pcf, PCF50606_REG_IOREGC, pcf->standby_regs.ioregc);
++ __reg_write(pcf, PCF50606_REG_D1REGC1, pcf->standby_regs.d1regc1);
++ __reg_write(pcf, PCF50606_REG_D2REGC1, pcf->standby_regs.d2regc1);
++ __reg_write(pcf, PCF50606_REG_D3REGC1, pcf->standby_regs.d3regc1);
++ __reg_write(pcf, PCF50606_REG_LPREGC1, pcf->standby_regs.lpregc1);
++ __reg_write(pcf, PCF50606_REG_ADCC1, pcf->standby_regs.adcc1);
++ __reg_write(pcf, PCF50606_REG_ADCC2, pcf->standby_regs.adcc2);
++ __reg_write(pcf, PCF50606_REG_PWMC1, pcf->standby_regs.pwmc1);
++
++ pcf->suspend_state = PCF50606_SS_COMPLETED_RESUME;
++
++ enable_irq(pcf->irq);
++
++ mutex_unlock(&pcf->lock);
++
++ /* Call PCF work function; this fixes an issue on the gta01 where
++ * the power button "goes away" if it is used to wake the device.
++ */
++ get_device(&pcf->client.dev);
++ pcf50606_work(&pcf->work);
++
++ return 0;
++}
++#else
++#define pcf50606_suspend NULL
++#define pcf50606_resume NULL
++#endif
++
++static struct i2c_driver pcf50606_driver = {
++ .driver = {
++ .name = "pcf50606",
++ .suspend = pcf50606_suspend,
++ .resume = pcf50606_resume,
++ },
++ .id = I2C_DRIVERID_PCF50606,
++ .attach_adapter = pcf50606_attach_adapter,
++ .detach_client = pcf50606_detach_client,
++};
++
++/* platform driver, since i2c devices don't have platform_data */
++static int __init pcf50606_plat_probe(struct platform_device *pdev)
++{
++ struct pcf50606_platform_data *pdata = pdev->dev.platform_data;
++
++ if (!pdata)
++ return -ENODEV;
++
++ pcf50606_pdev = pdev;
++
++ return 0;
++}
++
++static int pcf50606_plat_remove(struct platform_device *pdev)
++{
++ return 0;
++}
++
++/* We have this purely to capture an early indication that we are coming out
++ * of suspend, before our device resume got called; async interrupt service is
++ * interested in this.
++ */
++
++static int pcf50606_plat_resume(struct platform_device *pdev)
++{
++ /* i2c_get_clientdata(to_i2c_client(&pdev->dev)) returns NULL at this
++ * early resume time so we have to use pcf50606_global
++ */
++ pcf50606_global->suspend_state = PCF50606_SS_RESUMING_BUT_NOT_US_YET;
++
++ return 0;
++}
++
++static struct platform_driver pcf50606_plat_driver = {
++ .probe = pcf50606_plat_probe,
++ .remove = pcf50606_plat_remove,
++ .resume_early = pcf50606_plat_resume,
++ .driver = {
++ .owner = THIS_MODULE,
++ .name = "pcf50606",
++ },
++};
++
++static int __init pcf50606_init(void)
++{
++ int rc;
++
++ rc = platform_driver_register(&pcf50606_plat_driver);
++ if (!rc)
++ rc = i2c_add_driver(&pcf50606_driver);
++
++ return rc;
++}
++
++static void pcf50606_exit(void)
++{
++ i2c_del_driver(&pcf50606_driver);
++ platform_driver_unregister(&pcf50606_plat_driver);
++}
++
++MODULE_DESCRIPTION("I2C chip driver for NXP PCF50606 power management unit");
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
++MODULE_LICENSE("GPL");
++
++module_init(pcf50606_init);
++module_exit(pcf50606_exit);
+Index: linux-2.6.24.7/drivers/i2c/chips/pcf50606.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/i2c/chips/pcf50606.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,302 @@
++#ifndef _PCF50606_H
++#define _PCF50606_H
++
++/* Philips PCF50606 Power Managemnt Unit (PMU) driver
++ * (C) 2006-2007 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ *
++ */
++
++enum pfc50606_regs {
++ PCF50606_REG_ID = 0x00,
++ PCF50606_REG_OOCS = 0x01,
++ PCF50606_REG_INT1 = 0x02, /* Interrupt Status */
++ PCF50606_REG_INT2 = 0x03, /* Interrupt Status */
++ PCF50606_REG_INT3 = 0x04, /* Interrupt Status */
++ PCF50606_REG_INT1M = 0x05, /* Interrupt Mask */
++ PCF50606_REG_INT2M = 0x06, /* Interrupt Mask */
++ PCF50606_REG_INT3M = 0x07, /* Interrupt Mask */
++ PCF50606_REG_OOCC1 = 0x08,
++ PCF50606_REG_OOCC2 = 0x09,
++ PCF50606_REG_RTCSC = 0x0a, /* Second */
++ PCF50606_REG_RTCMN = 0x0b, /* Minute */
++ PCF50606_REG_RTCHR = 0x0c, /* Hour */
++ PCF50606_REG_RTCWD = 0x0d, /* Weekday */
++ PCF50606_REG_RTCDT = 0x0e, /* Day */
++ PCF50606_REG_RTCMT = 0x0f, /* Month */
++ PCF50606_REG_RTCYR = 0x10, /* Year */
++ PCF50606_REG_RTCSCA = 0x11, /* Alarm Second */
++ PCF50606_REG_RTCMNA = 0x12, /* Alarm Minute */
++ PCF50606_REG_RTCHRA = 0x13, /* Alarm Hour */
++ PCF50606_REG_RTCWDA = 0x14, /* Alarm Weekday */
++ PCF50606_REG_RTCDTA = 0x15, /* Alarm Day */
++ PCF50606_REG_RTCMTA = 0x16, /* Alarm Month */
++ PCF50606_REG_RTCYRA = 0x17, /* Alarm Year */
++ PCF50606_REG_PSSC = 0x18, /* Power sequencing */
++ PCF50606_REG_PWROKM = 0x19, /* PWROK mask */
++ PCF50606_REG_PWROKS = 0x1a, /* PWROK status */
++ PCF50606_REG_DCDC1 = 0x1b,
++ PCF50606_REG_DCDC2 = 0x1c,
++ PCF50606_REG_DCDC3 = 0x1d,
++ PCF50606_REG_DCDC4 = 0x1e,
++ PCF50606_REG_DCDEC1 = 0x1f,
++ PCF50606_REG_DCDEC2 = 0x20,
++ PCF50606_REG_DCUDC1 = 0x21,
++ PCF50606_REG_DCUDC2 = 0x22,
++ PCF50606_REG_IOREGC = 0x23,
++ PCF50606_REG_D1REGC1 = 0x24,
++ PCF50606_REG_D2REGC1 = 0x25,
++ PCF50606_REG_D3REGC1 = 0x26,
++ PCF50606_REG_LPREGC1 = 0x27,
++ PCF50606_REG_LPREGC2 = 0x28,
++ PCF50606_REG_MBCC1 = 0x29,
++ PCF50606_REG_MBCC2 = 0x2a,
++ PCF50606_REG_MBCC3 = 0x2b,
++ PCF50606_REG_MBCS1 = 0x2c,
++ PCF50606_REG_BBCC = 0x2d,
++ PCF50606_REG_ADCC1 = 0x2e,
++ PCF50606_REG_ADCC2 = 0x2f,
++ PCF50606_REG_ADCS1 = 0x30,
++ PCF50606_REG_ADCS2 = 0x31,
++ PCF50606_REG_ADCS3 = 0x32,
++ PCF50606_REG_ACDC1 = 0x33,
++ PCF50606_REG_BVMC = 0x34,
++ PCF50606_REG_PWMC1 = 0x35,
++ PCF50606_REG_LEDC1 = 0x36,
++ PCF50606_REG_LEDC2 = 0x37,
++ PCF50606_REG_GPOC1 = 0x38,
++ PCF50606_REG_GPOC2 = 0x39,
++ PCF50606_REG_GPOC3 = 0x3a,
++ PCF50606_REG_GPOC4 = 0x3b,
++ PCF50606_REG_GPOC5 = 0x3c,
++ __NUM_PCF50606_REGS
++};
++
++enum pcf50606_reg_oocs {
++ PFC50606_OOCS_ONKEY = 0x01,
++ PCF50606_OOCS_EXTON = 0x02,
++ PCF50606_OOCS_PWROKRST = 0x04,
++ PCF50606_OOCS_BATOK = 0x08,
++ PCF50606_OOCS_BACKOK = 0x10,
++ PCF50606_OOCS_CHGOK = 0x20,
++ PCF50606_OOCS_TEMPOK = 0x40,
++ PCF50606_OOCS_WDTEXP = 0x80,
++};
++
++enum pcf50606_reg_oocc1 {
++ PCF50606_OOCC1_GOSTDBY = 0x01,
++ PCF50606_OOCC1_TOTRST = 0x02,
++ PCF50606_OOCC1_CLK32ON = 0x04,
++ PCF50606_OOCC1_WDTRST = 0x08,
++ PCF50606_OOCC1_RTCWAK = 0x10,
++ PCF50606_OOCC1_CHGWAK = 0x20,
++ PCF50606_OOCC1_EXTONWAK_HIGH = 0x40,
++ PCF50606_OOCC1_EXTONWAK_LOW = 0x80,
++};
++
++enum pcf50606_reg_oocc2 {
++ PCF50606_OOCC2_ONKEYDB_NONE = 0x00,
++ PCF50606_OOCC2_ONKEYDB_14ms = 0x01,
++ PCF50606_OOCC2_ONKEYDB_62ms = 0x02,
++ PCF50606_OOCC2_ONKEYDB_500ms = 0x03,
++ PCF50606_OOCC2_EXTONDB_NONE = 0x00,
++ PCF50606_OOCC2_EXTONDB_14ms = 0x04,
++ PCF50606_OOCC2_EXTONDB_62ms = 0x08,
++ PCF50606_OOCC2_EXTONDB_500ms = 0x0c,
++};
++
++enum pcf50606_reg_int1 {
++ PCF50606_INT1_ONKEYR = 0x01, /* ONKEY rising edge */
++ PCF50606_INT1_ONKEYF = 0x02, /* ONKEY falling edge */
++ PCF50606_INT1_ONKEY1S = 0x04, /* OMKEY at least 1sec low */
++ PCF50606_INT1_EXTONR = 0x08, /* EXTON rising edge */
++ PCF50606_INT1_EXTONF = 0x10, /* EXTON falling edge */
++ PCF50606_INT1_SECOND = 0x40, /* RTC periodic second interrupt */
++ PCF50606_INT1_ALARM = 0x80, /* RTC alarm time is reached */
++};
++
++enum pcf50606_reg_int2 {
++ PCF50606_INT2_CHGINS = 0x01, /* Charger inserted */
++ PCF50606_INT2_CHGRM = 0x02, /* Charger removed */
++ PCF50606_INT2_CHGFOK = 0x04, /* Fast charging OK */
++ PCF50606_INT2_CHGERR = 0x08, /* Error in charging mode */
++ PCF50606_INT2_CHGFRDY = 0x10, /* Fast charge completed */
++ PCF50606_INT2_CHGPROT = 0x20, /* Charging protection interrupt */
++ PCF50606_INT2_CHGWD10S = 0x40, /* Charger watchdig expires in 10s */
++ PCF50606_INT2_CHGWDEXP = 0x80, /* Charger watchdog expires */
++};
++
++enum pcf50606_reg_int3 {
++ PCF50606_INT3_ADCRDY = 0x01, /* ADC conversion finished */
++ PCF50606_INT3_ACDINS = 0x02, /* Accessory inserted */
++ PCF50606_INT3_ACDREM = 0x04, /* Accessory removed */
++ PCF50606_INT3_TSCPRES = 0x08, /* Touch screen pressed */
++ PCF50606_INT3_LOWBAT = 0x40, /* Low battery voltage */
++ PCF50606_INT3_HIGHTMP = 0x80, /* High temperature */
++};
++
++/* used by PSSC, PWROKM, PWROKS, */
++enum pcf50606_regu {
++ PCF50606_REGU_DCD = 0x01, /* DCD in phase 2 */
++ PCF50606_REGU_DCDE = 0x02, /* DCDE in phase 2 */
++ PCF50606_REGU_DCUD = 0x04, /* DCDU in phase 2 */
++ PCF50606_REGU_IO = 0x08, /* IO in phase 2 */
++ PCF50606_REGU_D1 = 0x10, /* D1 in phase 2 */
++ PCF50606_REGU_D2 = 0x20, /* D2 in phase 2 */
++ PCF50606_REGU_D3 = 0x40, /* D3 in phase 2 */
++ PCF50606_REGU_LP = 0x80, /* LP in phase 2 */
++};
++
++enum pcf50606_reg_dcdc4 {
++ PCF50606_DCDC4_MODE_AUTO = 0x00,
++ PCF50606_DCDC4_MODE_PWM = 0x01,
++ PCF50606_DCDC4_MODE_PCF = 0x02,
++ PCF50606_DCDC4_OFF_FLOAT = 0x00,
++ PCF50606_DCDC4_OFF_BYPASS = 0x04,
++ PCF50606_DCDC4_OFF_PULLDOWN = 0x08,
++ PCF50606_DCDC4_CURLIM_500mA = 0x00,
++ PCF50606_DCDC4_CURLIM_750mA = 0x10,
++ PCF50606_DCDC4_CURLIM_1000mA = 0x20,
++ PCF50606_DCDC4_CURLIM_1250mA = 0x30,
++ PCF50606_DCDC4_TOGGLE = 0x40,
++ PCF50606_DCDC4_REGSEL_DCDC2 = 0x80,
++};
++
++enum pcf50606_reg_dcdec2 {
++ PCF50606_DCDEC2_MODE_AUTO = 0x00,
++ PCF50606_DCDEC2_MODE_PWM = 0x01,
++ PCF50606_DCDEC2_MODE_PCF = 0x02,
++ PCF50606_DCDEC2_OFF_FLOAT = 0x00,
++ PCF50606_DCDEC2_OFF_BYPASS = 0x04,
++};
++
++enum pcf50606_reg_dcudc2 {
++ PCF50606_DCUDC2_MODE_AUTO = 0x00,
++ PCF50606_DCUDC2_MODE_PWM = 0x01,
++ PCF50606_DCUDC2_MODE_PCF = 0x02,
++ PCF50606_DCUDC2_OFF_FLOAT = 0x00,
++ PCF50606_DCUDC2_OFF_BYPASS = 0x04,
++};
++
++enum pcf50606_reg_adcc1 {
++ PCF50606_ADCC1_TSCMODACT = 0x01,
++ PCF50606_ADCC1_TSCMODSTB = 0x02,
++ PCF50606_ADCC1_TRATSET = 0x04,
++ PCF50606_ADCC1_NTCSWAPE = 0x08,
++ PCF50606_ADCC1_NTCSWAOFF = 0x10,
++ PCF50606_ADCC1_EXTSYNCBREAK = 0x20,
++ /* reserved */
++ PCF50606_ADCC1_TSCINT = 0x80,
++};
++
++enum pcf50606_reg_adcc2 {
++ PCF50606_ADCC2_ADCSTART = 0x01,
++ /* see enum pcf50606_adcc2_adcmux */
++ PCF50606_ADCC2_SYNC_NONE = 0x00,
++ PCF50606_ADCC2_SYNC_TXON = 0x20,
++ PCF50606_ADCC2_SYNC_PWREN1 = 0x40,
++ PCF50606_ADCC2_SYNC_PWREN2 = 0x60,
++ PCF50606_ADCC2_RES_10BIT = 0x00,
++ PCF50606_ADCC2_RES_8BIT = 0x80,
++};
++
++#define PCF50606_ADCC2_ADCMUX_MASK (0xf << 1)
++
++#define ADCMUX_SHIFT 1
++enum pcf50606_adcc2_adcmux {
++ PCF50606_ADCMUX_BATVOLT_RES = 0x0 << ADCMUX_SHIFT,
++ PCF50606_ADCMUX_BATVOLT_SUBTR = 0x1 << ADCMUX_SHIFT,
++ PCF50606_ADCMUX_ADCIN1_RES = 0x2 << ADCMUX_SHIFT,
++ PCF50606_ADCMUX_ADCIN1_SUBTR = 0x3 << ADCMUX_SHIFT,
++ PCF50606_ADCMUX_BATTEMP = 0x4 << ADCMUX_SHIFT,
++ PCF50606_ADCMUX_ADCIN2 = 0x5 << ADCMUX_SHIFT,
++ PCF50606_ADCMUX_ADCIN3 = 0x6 << ADCMUX_SHIFT,
++ PCF50606_ADCMUX_ADCIN3_RATIO = 0x7 << ADCMUX_SHIFT,
++ PCF50606_ADCMUX_XPOS = 0x8 << ADCMUX_SHIFT,
++ PCF50606_ADCMUX_YPOS = 0x9 << ADCMUX_SHIFT,
++ PCF50606_ADCMUX_P1 = 0xa << ADCMUX_SHIFT,
++ PCF50606_ADCMUX_P2 = 0xb << ADCMUX_SHIFT,
++ PCF50606_ADCMUX_BATVOLT_ADCIN1 = 0xc << ADCMUX_SHIFT,
++ PCF50606_ADCMUX_XY_SEQUENCE = 0xe << ADCMUX_SHIFT,
++ PCF50606_P1_P2_RESISTANCE = 0xf << ADCMUX_SHIFT,
++};
++
++enum pcf50606_adcs2 {
++ PCF50606_ADCS2_ADCRDY = 0x80,
++};
++
++enum pcf50606_reg_mbcc1 {
++ PCF50606_MBCC1_CHGAPE = 0x01,
++ PCF50606_MBCC1_AUTOFST = 0x02,
++#define PCF50606_MBCC1_CHGMOD_MASK 0x1c
++#define PCF50606_MBCC1_CHGMOD_SHIFT 2
++ PCF50606_MBCC1_CHGMOD_QUAL = 0x00,
++ PCF50606_MBCC1_CHGMOD_PRE = 0x04,
++ PCF50606_MBCC1_CHGMOD_TRICKLE = 0x08,
++ PCF50606_MBCC1_CHGMOD_FAST_CCCV = 0x0c,
++ PCF50606_MBCC1_CHGMOD_FAST_NOCC = 0x10,
++ PCF50606_MBCC1_CHGMOD_FAST_NOCV = 0x14,
++ PCF50606_MBCC1_CHGMOD_FAST_SW = 0x18,
++ PCF50606_MBCC1_CHGMOD_IDLE = 0x1c,
++ PCF50606_MBCC1_DETMOD_LOWCHG = 0x20,
++ PCF50606_MBCC1_DETMOD_WDRST = 0x40,
++};
++
++enum pcf50606_reg_acdc1 {
++ PCF50606_ACDC1_ACDDET = 0x01,
++ PCF50606_ACDC1_THRSHLD_1V0 = 0x00,
++ PCF50606_ACDC1_THRSHLD_1V2 = 0x02,
++ PCF50606_ACDC1_THRSHLD_1V4 = 0x04,
++ PCF50606_ACDC1_THRSHLD_1V6 = 0x06,
++ PCF50606_ACDC1_THRSHLD_1V8 = 0x08,
++ PCF50606_ACDC1_THRSHLD_2V0 = 0x0a,
++ PCF50606_ACDC1_THRSHLD_2V2 = 0x0c,
++ PCF50606_ACDC1_THRSHLD_2V4 = 0x0e,
++ PCF50606_ACDC1_DISDB = 0x10,
++ PCF50606_ACDC1_ACDAPE = 0x80,
++};
++
++enum pcf50606_reg_bvmc {
++ PCF50606_BVMC_LOWBAT = 0x01,
++ PCF50606_BVMC_THRSHLD_NULL = 0x00,
++ PCF50606_BVMC_THRSHLD_2V8 = 0x02,
++ PCF50606_BVMC_THRSHLD_2V9 = 0x04,
++ PCF50606_BVMC_THRSHLD_3V = 0x08,
++ PCF50606_BVMC_THRSHLD_3V1 = 0x08,
++ PCF50606_BVMC_THRSHLD_3V2 = 0x0a,
++ PCF50606_BVMC_THRSHLD_3V3 = 0x0c,
++ PCF50606_BVMC_THRSHLD_3V4 = 0x0e,
++ PCF50606_BVMC_DISDB = 0x10,
++};
++
++enum pcf50606_reg_pwmc1 {
++ PCF50606_PWMC1_ACTSET = 0x01,
++ PCF50606_PWMC1_PWMDC_0_16 = 0x00,
++ PCF50606_PWMC1_PWMDC_1_16 = 0x02,
++ PCF50606_PWMC1_PWMDC_2_16 = 0x04,
++ PCF50606_PWMC1_PWMDC_3_16 = 0x06,
++ PCF50606_PWMC1_PWMDC_4_16 = 0x08,
++ PCF50606_PWMC1_PWMDC_5_16 = 0x0a,
++ PCF50606_PWMC1_PWMDC_6_16 = 0x0c,
++ PCF50606_PWMC1_PWMDC_7_16 = 0x0e,
++ PCF50606_PWMC1_PWMDC_8_16 = 0x10,
++ PCF50606_PWMC1_PWMDC_9_16 = 0x12,
++ PCF50606_PWMC1_PWMDC_10_16 = 0x14,
++ PCF50606_PWMC1_PWMDC_11_16 = 0x16,
++ PCF50606_PWMC1_PWMDC_12_16 = 0x18,
++ PCF50606_PWMC1_PWMDC_13_16 = 0x1a,
++ PCF50606_PWMC1_PWMDC_14_16 = 0x1c,
++ PCF50606_PWMC1_PWMDC_15_16 = 0x1e,
++ PCF50606_PWMC1_PRESC_512Hz = 0x20,
++ PCF50606_PWMC1_PRESC_256Hz = 0x40,
++ PCF50606_PWMC1_PRESC_64Hz = 0x60,
++ PCF50606_PWMC1_PRESC_56kHz = 0x80,
++ PCF50606_PWMC1_PRESC_28kHz = 0xa0,
++ PCF50606_PWMC1_PRESC_14kHz = 0xc0,
++ PCF50606_PWMC1_PRESC_7kHz = 0xe0,
++};
++#define PCF50606_PWMC1_CLK_SHIFT 5
++#define PCF50606_PWMC1_DC_SHIFT 1
++
++#endif /* _PCF50606_H */
++
+Index: linux-2.6.24.7/drivers/i2c/chips/pcf50633.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/i2c/chips/pcf50633.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,2713 @@
++/* Philips PCF50633 Power Management Unit (PMU) driver
++ *
++ * (C) 2006-2007 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ * This driver is a monster ;) It provides the following features
++ * - voltage control for a dozen different voltage domains
++ * - charging control for main and backup battery
++ * - rtc / alarm
++ * - adc driver (hw_sensors like)
++ * - backlight
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/i2c.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++#include <linux/workqueue.h>
++#include <linux/delay.h>
++#include <linux/rtc.h>
++#include <linux/bcd.h>
++#include <linux/watchdog.h>
++#include <linux/miscdevice.h>
++#include <linux/input.h>
++#include <linux/fb.h>
++#include <linux/backlight.h>
++#include <linux/sched.h>
++#include <linux/platform_device.h>
++#include <linux/pcf50633.h>
++#include <linux/apm-emulation.h>
++#include <linux/jiffies.h>
++
++#include <asm/mach-types.h>
++
++#include "pcf50633.h"
++#include <linux/resume-dependency.h>
++
++#if 0
++#define DEBUGP(x, args ...) printk("%s: " x, __FUNCTION__, ## args)
++#define DEBUGPC(x, args ...) printk(x, ## args)
++#else
++#define DEBUGP(x, args ...)
++#define DEBUGPC(x, args ...)
++#endif
++
++/***********************************************************************
++ * Static data / structures
++ ***********************************************************************/
++
++static unsigned short normal_i2c[] = { 0x73, I2C_CLIENT_END };
++
++I2C_CLIENT_INSMOD_1(pcf50633);
++
++#define PCF50633_FIDX_CHG_ENABLED 0 /* Charger enabled */
++#define PCF50633_FIDX_CHG_PRESENT 1 /* Charger present */
++#define PCF50633_FIDX_CHG_ERR 3 /* Charger Error */
++#define PCF50633_FIDX_CHG_PROT 4 /* Charger Protection */
++#define PCF50633_FIDX_CHG_READY 5 /* Charging completed */
++#define PCF50633_FIDX_PWR_PRESSED 8
++#define PCF50633_FIDX_RTC_SECOND 9
++#define PCF50633_FIDX_USB_PRESENT 10
++
++#define PCF50633_F_CHG_ENABLED (1 << PCF50633_FIDX_CHG_ENABLED)
++#define PCF50633_F_CHG_PRESENT (1 << PCF50633_FIDX_CHG_PRESENT)
++#define PCF50633_F_CHG_ERR (1 << PCF50633_FIDX_CHG_ERR)
++#define PCF50633_F_CHG_PROT (1 << PCF50633_FIDX_CHG_PROT)
++#define PCF50633_F_CHG_READY (1 << PCF50633_FIDX_CHG_READY)
++
++#define PCF50633_F_CHG_MASK 0x000000fc
++
++#define PCF50633_F_PWR_PRESSED (1 << PCF50633_FIDX_PWR_PRESSED)
++#define PCF50633_F_RTC_SECOND (1 << PCF50633_FIDX_RTC_SECOND)
++#define PCF50633_F_USB_PRESENT (1 << PCF50633_FIDX_USB_PRESENT)
++
++enum close_state {
++ CLOSE_STATE_NOT,
++ CLOSE_STATE_ALLOW = 0x2342,
++};
++
++enum charger_type {
++ CHARGER_TYPE_NONE = 0,
++ CHARGER_TYPE_HOSTUSB,
++ CHARGER_TYPE_1A
++};
++
++#define ADC_NOM_CHG_DETECT_1A 6
++#define ADC_NOM_CHG_DETECT_NONE 43
++
++#define MAX_ADC_FIFO_DEPTH 8
++
++enum pcf50633_suspend_states {
++ PCF50633_SS_RUNNING,
++ PCF50633_SS_STARTING_SUSPEND,
++ PCF50633_SS_COMPLETED_SUSPEND,
++ PCF50633_SS_RESUMING_BUT_NOT_US_YET,
++ PCF50633_SS_STARTING_RESUME,
++ PCF50633_SS_COMPLETED_RESUME,
++};
++
++
++struct pcf50633_data {
++ struct i2c_client client;
++ struct pcf50633_platform_data *pdata;
++ struct backlight_device *backlight;
++ struct mutex lock;
++ unsigned int flags;
++ unsigned int working;
++ struct mutex working_lock;
++ struct work_struct work;
++ struct rtc_device *rtc;
++ struct input_dev *input_dev;
++ int allow_close;
++ int onkey_seconds;
++ int irq;
++ enum pcf50633_suspend_states suspend_state;
++ int usb_removal_count;
++ u8 pcfirq_resume[5];
++ int probe_completed;
++ int suppress_onkey_events;
++
++ /* if he pulls battery while charging, we notice that and correctly
++ * report that the charger is idle. But there is no interrupt that
++ * fires if he puts a battery back in and charging resumes. So when
++ * the battery is pulled, we run this work function looking for
++ * either charger resumption or USB cable pull
++ */
++ struct mutex working_lock_nobat;
++ struct work_struct work_nobat;
++ int working_nobat;
++ int usb_removal_count_nobat;
++ int jiffies_last_bat_ins;
++
++ /* current limit notification handler stuff */
++ struct mutex working_lock_usb_curlimit;
++ struct work_struct work_usb_curlimit;
++ int pending_curlimit;
++ int usb_removal_count_usb_curlimit;
++
++ int last_curlim_set;
++
++ int coldplug_done; /* cleared by probe, set by first work service */
++ int flag_bat_voltage_read; /* ipc to /sys batt voltage read func */
++
++ int charger_adc_result_raw;
++ enum charger_type charger_type;
++
++ /* we have a FIFO of ADC measurement requests that are used only by
++ * the workqueue service code after the ADC completion interrupt
++ */
++ int adc_queue_mux[MAX_ADC_FIFO_DEPTH]; /* which ADC input to use */
++ int adc_queue_avg[MAX_ADC_FIFO_DEPTH]; /* amount of averaging */
++ int adc_queue_head; /* head owned by foreground code */
++ int adc_queue_tail; /* tail owned by service code */
++
++#ifdef CONFIG_PM
++ struct {
++ u_int8_t ooctim2;
++ /* enables are always [1] below
++ * I2C has limit of 32 sequential regs, so done in two lumps
++ * because it covers 33 register extent otherwise
++ */
++ u_int8_t misc[PCF50633_REG_LEDDIM - PCF50633_REG_AUTOOUT + 1];
++ /* skip 1 reserved reg here */
++ u_int8_t ldo[PCF50633_REG_HCLDOENA - PCF50633_REG_LDO1OUT + 1];
++ } standby_regs;
++
++ struct resume_dependency resume_dependency;
++ int is_suspended;
++
++#endif
++};
++
++static struct i2c_driver pcf50633_driver;
++
++struct pcf50633_data *pcf50633_global;
++EXPORT_SYMBOL_GPL(pcf50633_global);
++
++static struct platform_device *pcf50633_pdev;
++
++static void pcf50633_usb_curlim_set(struct pcf50633_data *pcf, int ma);
++static void pcf50633_charge_enable(struct pcf50633_data *pcf, int on);
++
++
++/***********************************************************************
++ * Low-Level routines
++ ***********************************************************************/
++
++static int __reg_write(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val)
++{
++ if (pcf->suspend_state == PCF50633_SS_COMPLETED_SUSPEND) {
++ dev_err(&pcf->client.dev, "__reg_write while suspended\n");
++ dump_stack();
++ }
++ return i2c_smbus_write_byte_data(&pcf->client, reg, val);
++}
++
++static int reg_write(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val)
++{
++ int ret;
++
++ mutex_lock(&pcf->lock);
++ ret = __reg_write(pcf, reg, val);
++ mutex_unlock(&pcf->lock);
++
++ return ret;
++}
++
++static int32_t __reg_read(struct pcf50633_data *pcf, u_int8_t reg)
++{
++ int32_t ret;
++
++ if (pcf->suspend_state == PCF50633_SS_COMPLETED_SUSPEND) {
++ dev_err(&pcf->client.dev, "__reg_read while suspended\n");
++ dump_stack();
++ }
++ ret = i2c_smbus_read_byte_data(&pcf->client, reg);
++
++ return ret;
++}
++
++static u_int8_t reg_read(struct pcf50633_data *pcf, u_int8_t reg)
++{
++ int32_t ret;
++
++ mutex_lock(&pcf->lock);
++ ret = __reg_read(pcf, reg);
++ mutex_unlock(&pcf->lock);
++
++ return ret & 0xff;
++}
++
++static int reg_set_bit_mask(struct pcf50633_data *pcf,
++ u_int8_t reg, u_int8_t mask, u_int8_t val)
++{
++ int ret;
++ u_int8_t tmp;
++
++ val &= mask;
++
++ mutex_lock(&pcf->lock);
++
++ tmp = __reg_read(pcf, reg);
++ tmp &= ~mask;
++ tmp |= val;
++ ret = __reg_write(pcf, reg, tmp);
++
++ mutex_unlock(&pcf->lock);
++
++ return ret;
++}
++
++static int reg_clear_bits(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val)
++{
++ int ret;
++ u_int8_t tmp;
++
++ mutex_lock(&pcf->lock);
++
++ tmp = __reg_read(pcf, reg);
++ tmp &= ~val;
++ ret = __reg_write(pcf, reg, tmp);
++
++ mutex_unlock(&pcf->lock);
++
++ return ret;
++}
++
++/* asynchronously setup reading one ADC channel */
++static void async_adc_read_setup(struct pcf50633_data *pcf,
++ int channel, int avg)
++{
++ channel &= PCF50633_ADCC1_ADCMUX_MASK;
++
++ /* kill ratiometric, but enable ACCSW biasing */
++ __reg_write(pcf, PCF50633_REG_ADCC2, 0x00);
++ __reg_write(pcf, PCF50633_REG_ADCC3, 0x01);
++
++ /* start ADC conversion of selected channel */
++ __reg_write(pcf, PCF50633_REG_ADCC1, channel | avg |
++ PCF50633_ADCC1_ADCSTART | PCF50633_ADCC1_RES_10BIT);
++
++}
++
++static u_int16_t async_adc_complete(struct pcf50633_data *pcf)
++{
++ u_int16_t ret = (__reg_read(pcf, PCF50633_REG_ADCS1) << 2) |
++ (__reg_read(pcf, PCF50633_REG_ADCS3) &
++ PCF50633_ADCS3_ADCDAT1L_MASK);
++
++ DEBUGPC("adc result = %d\n", ret);
++
++ return ret;
++}
++
++
++
++
++/***********************************************************************
++ * Voltage / ADC
++ ***********************************************************************/
++
++static u_int8_t auto_voltage(unsigned int millivolts)
++{
++ if (millivolts < 1800)
++ return 0;
++ if (millivolts > 3800)
++ return 0xff;
++
++ millivolts -= 625;
++ return millivolts/25;
++}
++
++static unsigned int auto_2voltage(u_int8_t bits)
++{
++ if (bits < 0x2f)
++ return 0;
++ return 625 + (bits * 25);
++}
++
++static u_int8_t down_voltage(unsigned int millivolts)
++{
++ if (millivolts < 625)
++ return 0;
++ else if (millivolts > 3000)
++ return 0xff;
++
++ millivolts -= 625;
++ return millivolts/25;
++}
++
++static unsigned int down_2voltage(u_int8_t bits)
++{
++ return 625 + (bits*25);
++}
++
++static u_int8_t ldo_voltage(unsigned int millivolts)
++{
++ if (millivolts < 900)
++ return 0;
++ else if (millivolts > 3600)
++ return 0x1f;
++
++ millivolts -= 900;
++ return millivolts/100;
++}
++
++static unsigned int ldo_2voltage(u_int8_t bits)
++{
++ bits &= 0x1f;
++ return 900 + (bits * 100);
++}
++
++static const u_int8_t regulator_registers[__NUM_PCF50633_REGULATORS] = {
++ [PCF50633_REGULATOR_AUTO] = PCF50633_REG_AUTOOUT,
++ [PCF50633_REGULATOR_DOWN1] = PCF50633_REG_DOWN1OUT,
++ [PCF50633_REGULATOR_DOWN2] = PCF50633_REG_DOWN2OUT,
++ [PCF50633_REGULATOR_MEMLDO] = PCF50633_REG_MEMLDOOUT,
++ [PCF50633_REGULATOR_LDO1] = PCF50633_REG_LDO1OUT,
++ [PCF50633_REGULATOR_LDO2] = PCF50633_REG_LDO2OUT,
++ [PCF50633_REGULATOR_LDO3] = PCF50633_REG_LDO3OUT,
++ [PCF50633_REGULATOR_LDO4] = PCF50633_REG_LDO4OUT,
++ [PCF50633_REGULATOR_LDO5] = PCF50633_REG_LDO5OUT,
++ [PCF50633_REGULATOR_LDO6] = PCF50633_REG_LDO6OUT,
++ [PCF50633_REGULATOR_HCLDO] = PCF50633_REG_HCLDOOUT,
++};
++
++int pcf50633_onoff_set(struct pcf50633_data *pcf,
++ enum pcf50633_regulator_id reg, int on)
++{
++ u_int8_t addr;
++
++ if (reg >= __NUM_PCF50633_REGULATORS)
++ return -EINVAL;
++
++ /* the *ENA register is always one after the *OUT register */
++ addr = regulator_registers[reg] + 1;
++
++ if (on == 0)
++ reg_set_bit_mask(pcf, addr, PCF50633_REGULATOR_ON, 0);
++ else
++ reg_set_bit_mask(pcf, addr, PCF50633_REGULATOR_ON,
++ PCF50633_REGULATOR_ON);
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(pcf50633_onoff_set);
++
++int pcf50633_onoff_get(struct pcf50633_data *pcf,
++ enum pcf50633_regulator_id reg)
++{
++ u_int8_t val, addr;
++
++ if (reg >= __NUM_PCF50633_REGULATORS)
++ return -EINVAL;
++
++ /* the *ENA register is always one after the *OUT register */
++ addr = regulator_registers[reg] + 1;
++ val = reg_read(pcf, addr) & PCF50633_REGULATOR_ON;
++
++ return val;
++}
++EXPORT_SYMBOL_GPL(pcf50633_onoff_get);
++
++int pcf50633_voltage_set(struct pcf50633_data *pcf,
++ enum pcf50633_regulator_id reg,
++ unsigned int millivolts)
++{
++ u_int8_t volt_bits;
++ u_int8_t regnr;
++
++ DEBUGP("pcf=%p, reg=%d, mvolts=%d\n", pcf, reg, millivolts);
++
++ if (reg >= __NUM_PCF50633_REGULATORS)
++ return -EINVAL;
++
++ regnr = regulator_registers[reg];
++
++ if (millivolts > pcf->pdata->rails[reg].voltage.max)
++ return -EINVAL;
++
++ switch (reg) {
++ case PCF50633_REGULATOR_AUTO:
++ volt_bits = auto_voltage(millivolts);
++ break;
++ case PCF50633_REGULATOR_DOWN1:
++ volt_bits = down_voltage(millivolts);
++ break;
++ case PCF50633_REGULATOR_DOWN2:
++ volt_bits = down_voltage(millivolts);
++ break;
++ case PCF50633_REGULATOR_LDO1:
++ case PCF50633_REGULATOR_LDO2:
++ case PCF50633_REGULATOR_LDO3:
++ case PCF50633_REGULATOR_LDO4:
++ case PCF50633_REGULATOR_LDO5:
++ case PCF50633_REGULATOR_LDO6:
++ case PCF50633_REGULATOR_HCLDO:
++ volt_bits = ldo_voltage(millivolts);
++ DEBUGP("ldo_voltage(0x%x)=%u\n", millivolts, volt_bits);
++ break;
++ default:
++ return -EINVAL;
++ }
++
++ return reg_write(pcf, regnr, volt_bits);
++}
++EXPORT_SYMBOL_GPL(pcf50633_voltage_set);
++
++unsigned int pcf50633_voltage_get(struct pcf50633_data *pcf,
++ enum pcf50633_regulator_id reg)
++{
++ u_int8_t volt_bits;
++ u_int8_t regnr;
++ unsigned int rc = 0;
++
++ if (reg >= __NUM_PCF50633_REGULATORS)
++ return -EINVAL;
++
++ regnr = regulator_registers[reg];
++ volt_bits = reg_read(pcf, regnr);
++
++ switch (reg) {
++ case PCF50633_REGULATOR_AUTO:
++ rc = auto_2voltage(volt_bits);
++ break;
++ case PCF50633_REGULATOR_DOWN1:
++ rc = down_2voltage(volt_bits);
++ break;
++ case PCF50633_REGULATOR_DOWN2:
++ rc = down_2voltage(volt_bits);
++ break;
++ case PCF50633_REGULATOR_LDO1:
++ case PCF50633_REGULATOR_LDO2:
++ case PCF50633_REGULATOR_LDO3:
++ case PCF50633_REGULATOR_LDO4:
++ case PCF50633_REGULATOR_LDO5:
++ case PCF50633_REGULATOR_LDO6:
++ case PCF50633_REGULATOR_HCLDO:
++ rc = ldo_2voltage(volt_bits);
++ break;
++ default:
++ return -EINVAL;
++ }
++
++ return rc;
++}
++EXPORT_SYMBOL_GPL(pcf50633_voltage_get);
++
++/* go into 'STANDBY' mode, i.e. power off the main CPU and peripherals */
++void pcf50633_go_standby(void)
++{
++ reg_set_bit_mask(pcf50633_global, PCF50633_REG_OOCSHDWN,
++ PCF50633_OOCSHDWN_GOSTDBY, PCF50633_OOCSHDWN_GOSTDBY);
++}
++EXPORT_SYMBOL_GPL(pcf50633_go_standby);
++
++void pcf50633_gpio_set(struct pcf50633_data *pcf, enum pcf50633_gpio gpio,
++ int on)
++{
++ u_int8_t reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
++
++ if (on)
++ reg_set_bit_mask(pcf, reg, 0x0f, 0x07);
++ else
++ reg_set_bit_mask(pcf, reg, 0x0f, 0x00);
++}
++EXPORT_SYMBOL_GPL(pcf50633_gpio_set);
++
++int pcf50633_gpio_get(struct pcf50633_data *pcf, enum pcf50633_gpio gpio)
++{
++ u_int8_t reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
++ u_int8_t val = reg_read(pcf, reg) & 0x0f;
++
++ if (val == PCF50633_GPOCFG_GPOSEL_1 ||
++ val == (PCF50633_GPOCFG_GPOSEL_0|PCF50633_GPOCFG_GPOSEL_INVERSE))
++ return 1;
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(pcf50633_gpio_get);
++
++static int interpret_charger_type_from_adc(struct pcf50633_data *pcf,
++ int sample)
++{
++ /* 1A capable charger? */
++
++ if (sample < ((ADC_NOM_CHG_DETECT_NONE + ADC_NOM_CHG_DETECT_1A) / 2))
++ return CHARGER_TYPE_1A;
++
++ /* well then, nothing in the USB hole, or USB host / unk adapter */
++
++ if (pcf->flags & PCF50633_F_USB_PRESENT) /* ooh power is in there */
++ return CHARGER_TYPE_HOSTUSB; /* HOSTUSB is the catchall */
++
++ return CHARGER_TYPE_NONE; /* no really -- nothing in there */
++}
++
++
++
++static void configure_pmu_for_charger(struct pcf50633_data *pcf,
++ enum charger_type type)
++{
++ switch (type) {
++ case CHARGER_TYPE_NONE:
++ pcf50633_usb_curlim_set(pcf, 0);
++ break;
++ /*
++ * the PCF50633 has a feature that it will supply only excess current
++ * from the charger that is not used to power the device. So this
++ * 500mA setting is "up to 500mA" according to that.
++ */
++ case CHARGER_TYPE_HOSTUSB:
++ /* USB subsystem should call pcf50633_usb_curlim_set to set
++ * what was negotiated with the host when it is enumerated
++ * successfully. If we get called again after a good
++ * negotiation, we keep what was negotiated. (Removal of
++ * USB plug destroys pcf->last_curlim_set to 0)
++ */
++ if (pcf->last_curlim_set > 100)
++ pcf50633_usb_curlim_set(pcf, pcf->last_curlim_set);
++ else
++ pcf50633_usb_curlim_set(pcf, 100);
++ break;
++ case CHARGER_TYPE_1A:
++ pcf50633_usb_curlim_set(pcf, 1000);
++ /*
++ * stop GPO / EN_HOSTUSB power driving out on the same
++ * USB power pins we have a 1A charger on right now!
++ */
++ dev_dbg(&pcf->client.dev, "Charger -> CHARGER_TYPE_1A\n");
++ __reg_write(pcf, PCF50633_GPO - PCF50633_GPIO1 +
++ PCF50633_REG_GPIO1CFG,
++ __reg_read(pcf, PCF50633_GPO - PCF50633_GPIO1 +
++ PCF50633_REG_GPIO1CFG) & 0xf0);
++ break;
++ }
++
++ /* max out USB fast charge current -- actual current drawn is
++ * additionally limited by USB limit so no worries
++ */
++ __reg_write(pcf, PCF50633_REG_MBCC5, 0xff);
++
++}
++
++static void trigger_next_adc_job_if_any(struct pcf50633_data *pcf)
++{
++ if (pcf->adc_queue_head == pcf->adc_queue_tail)
++ return;
++ async_adc_read_setup(pcf,
++ pcf->adc_queue_mux[pcf->adc_queue_tail],
++ pcf->adc_queue_avg[pcf->adc_queue_tail]);
++}
++
++static void add_request_to_adc_queue(struct pcf50633_data *pcf,
++ int mux, int avg)
++{
++ int old_head = pcf->adc_queue_head;
++ pcf->adc_queue_mux[pcf->adc_queue_head] = mux;
++ pcf->adc_queue_avg[pcf->adc_queue_head] = avg;
++
++ pcf->adc_queue_head = (pcf->adc_queue_head + 1) &
++ (MAX_ADC_FIFO_DEPTH - 1);
++
++ /* it was idle before we just added this? we need to kick it then */
++ if (old_head == pcf->adc_queue_tail)
++ trigger_next_adc_job_if_any(pcf);
++}
++
++/*
++ * we get run to handle servicing the async notification from USB stack that
++ * we got enumerated and allowed to draw a particular amount of current
++ */
++
++static void pcf50633_work_usbcurlim(struct work_struct *work)
++{
++ struct pcf50633_data *pcf =
++ container_of(work, struct pcf50633_data, work_usb_curlimit);
++
++ mutex_lock(&pcf->working_lock_usb_curlimit);
++
++ /* just can't cope with it if we are suspending, don't reschedule */
++ if ((pcf->suspend_state == PCF50633_SS_STARTING_SUSPEND) ||
++ (pcf->suspend_state == PCF50633_SS_COMPLETED_SUSPEND))
++ goto bail;
++
++ dev_dbg(&pcf->client.dev, "pcf50633_work_usbcurlim\n");
++
++ if (!pcf->probe_completed)
++ goto reschedule;
++
++ /* we got a notification from USB stack before we completed resume...
++ * that can only make trouble, reschedule for a retry
++ */
++ if (pcf->suspend_state &&
++ (pcf->suspend_state < PCF50633_SS_COMPLETED_RESUME))
++ goto reschedule;
++
++ /*
++ * did he pull USB before we managed to set the limit?
++ */
++ if (pcf->usb_removal_count_usb_curlimit != pcf->usb_removal_count)
++ goto bail;
++
++ /* OK let's set the requested limit and finish */
++
++ dev_dbg(&pcf->client.dev, "pcf50633_work_usbcurlim setting %dmA\n",
++ pcf->pending_curlimit);
++ pcf50633_usb_curlim_set(pcf, pcf->pending_curlimit);
++
++bail:
++ mutex_unlock(&pcf->working_lock_usb_curlimit);
++ return;
++
++reschedule:
++ dev_dbg(&pcf->client.dev, "pcf50633_work_usbcurlim rescheduling\n");
++ if (!schedule_work(&pcf->work_usb_curlimit))
++ dev_err(&pcf->client.dev, "curlim reschedule work "
++ "already queued\n");
++
++ mutex_unlock(&pcf->working_lock_usb_curlimit);
++ /* don't spew, delaying whatever else is happening */
++ msleep(1);
++}
++
++
++/* this is an export to allow machine to set USB current limit according to
++ * notifications of USB stack about enumeration state. We spawn a work
++ * function to handle the actual setting, because suspend / resume and such
++ * can be in a bad state since this gets called externally asychronous to
++ * anything else going on in pcf50633.
++ */
++
++int pcf50633_notify_usb_current_limit_change(struct pcf50633_data *pcf,
++ unsigned int ma)
++{
++ /* can happen if he calls with pcf50633_global before probe
++ * have to bail with error since we can't even schedule the work
++ */
++ if (!pcf) {
++ printk(KERN_ERR "pcf50633_notify_usb_current_limit called with NULL pcf\n");
++ return -EBUSY;
++ }
++
++ dev_dbg(&pcf->client.dev,
++ "pcf50633_notify_usb_current_limit_change %dmA\n", ma);
++
++ /* prepare to detect USB power removal before we complete */
++ pcf->usb_removal_count_usb_curlimit = pcf->usb_removal_count;
++
++ pcf->pending_curlimit = ma;
++
++ if (!schedule_work(&pcf->work_usb_curlimit))
++ dev_err(&pcf->client.dev, "curlim work item already queued\n");
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(pcf50633_notify_usb_current_limit_change);
++
++
++/* we are run when we see a NOBAT situation, because there is no interrupt
++ * source in pcf50633 that triggers on resuming charging. It watches to see
++ * if charging resumes, it reassesses the charging source if it does. If the
++ * USB power disappears, it is also a sign there must be a battery and it is
++ * NOT being charged, so it exits since the next move must be USB insertion for
++ * change of charger state
++ */
++
++static void pcf50633_work_nobat(struct work_struct *work)
++{
++ struct pcf50633_data *pcf =
++ container_of(work, struct pcf50633_data, work_nobat);
++
++ mutex_lock(&pcf->working_lock_nobat);
++ pcf->working_nobat = 1;
++ mutex_unlock(&pcf->working_lock_nobat);
++
++ while (1) {
++ msleep(1000);
++
++ if (pcf->suspend_state != PCF50633_SS_RUNNING)
++ continue;
++
++ /* there's a battery in there now? */
++ if (reg_read(pcf, PCF50633_REG_MBCS3) & 0x40) {
++
++ pcf->jiffies_last_bat_ins = jiffies;
++
++ /* figure out our charging stance */
++ add_request_to_adc_queue(pcf, PCF50633_ADCC1_MUX_ADCIN1,
++ PCF50633_ADCC1_AVERAGE_16);
++ goto bail;
++ }
++
++ /* he pulled USB cable since we were started? exit then */
++ if (pcf->usb_removal_count_nobat != pcf->usb_removal_count)
++ goto bail;
++ }
++
++bail:
++ mutex_lock(&pcf->working_lock_nobat);
++ pcf->working_nobat = 0;
++ mutex_unlock(&pcf->working_lock_nobat);
++}
++
++
++static void pcf50633_work(struct work_struct *work)
++{
++ struct pcf50633_data *pcf =
++ container_of(work, struct pcf50633_data, work);
++ u_int8_t pcfirq[5];
++ int ret;
++ int tail;
++
++ mutex_lock(&pcf->working_lock);
++ pcf->working = 1;
++
++ /* sanity */
++ if (!&pcf->client.dev)
++ goto bail;
++
++ /*
++ * if we are presently suspending, we are not in a position to deal
++ * with pcf50633 interrupts at all.
++ *
++ * Because we didn't clear the int pending registers, there will be
++ * no edge / interrupt waiting for us when we wake. But it is OK
++ * because at the end of our resume, we call this workqueue function
++ * gratuitously, clearing the pending register and re-enabling
++ * servicing this interrupt.
++ */
++
++ if ((pcf->suspend_state == PCF50633_SS_STARTING_SUSPEND) ||
++ (pcf->suspend_state == PCF50633_SS_COMPLETED_SUSPEND))
++ goto bail;
++
++ /*
++ * If we are inside suspend -> resume completion time we don't attempt
++ * service until we have fully resumed. Although we could talk to the
++ * device as soon as I2C is up, the regs in the device which we might
++ * choose to modify as part of the service action have not been
++ * reloaded with their pre-suspend states yet. Therefore we will
++ * defer our service if we are called like that until our resume has
++ * completed.
++ *
++ * This shouldn't happen any more because we disable servicing this
++ * interrupt in suspend and don't re-enable it until resume is
++ * completed.
++ */
++
++ if (pcf->suspend_state &&
++ (pcf->suspend_state != PCF50633_SS_COMPLETED_RESUME))
++ goto reschedule;
++
++ /* this is the case early in resume! Sanity check! */
++ if (i2c_get_clientdata(&pcf->client) == NULL)
++ goto reschedule;
++
++ /*
++ * datasheet says we have to read the five IRQ
++ * status regs in one transaction
++ */
++ ret = i2c_smbus_read_i2c_block_data(&pcf->client,
++ PCF50633_REG_INT1,
++ sizeof(pcfirq),
++ pcfirq);
++ if (ret != sizeof(pcfirq)) {
++ dev_dbg(&pcf->client.dev,
++ "Oh crap PMU IRQ register read failed -- "
++ "retrying later %d\n", ret);
++ /*
++ * it shouldn't fail, we no longer attempt to use
++ * I2C while it can be suspended. But we don't have
++ * much option but to retry if if it ever did fail,
++ * because if we don't service the interrupt to clear
++ * it, we will never see another PMU interrupt edge.
++ */
++ goto reschedule;
++ }
++
++ /* hey did we just resume? (because we don't get here unless we are
++ * running normally or the first call after resumption)
++ */
++
++ if (pcf->suspend_state != PCF50633_SS_RUNNING) {
++ /*
++ * grab a copy of resume interrupt reasons
++ * from pcf50633 POV
++ */
++ memcpy(pcf->pcfirq_resume, pcfirq, sizeof(pcf->pcfirq_resume));
++
++ /* pcf50633 resume is really really over now then */
++ pcf->suspend_state = PCF50633_SS_RUNNING;
++
++ /* peek at the IRQ reason, if power button then set a flag
++ * so that we do not signal the event to userspace
++ */
++ if (pcfirq[1] & (PCF50633_INT2_ONKEYF | PCF50633_INT2_ONKEYR)) {
++ pcf->suppress_onkey_events = 1;
++ DEBUGP("Wake by ONKEY, suppressing ONKEY event");
++ } else {
++ pcf->suppress_onkey_events = 0;
++ }
++ }
++
++ if (!pcf->coldplug_done) {
++ DEBUGP("PMU Coldplug init\n");
++
++ /* we used SECOND to kick ourselves started -- turn it off */
++ pcfirq[0] &= ~PCF50633_INT1_SECOND;
++ reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
++ PCF50633_INT1_SECOND,
++ PCF50633_INT1_SECOND);
++
++ /* coldplug the USB if present */
++ if ((__reg_read(pcf, PCF50633_REG_MBCS1) &
++ (PCF50633_MBCS1_USBPRES | PCF50633_MBCS1_USBOK)) ==
++ (PCF50633_MBCS1_USBPRES | PCF50633_MBCS1_USBOK)) {
++ DEBUGPC("COLD USBINS\n");
++ input_report_key(pcf->input_dev, KEY_POWER2, 1);
++ apm_queue_event(APM_POWER_STATUS_CHANGE);
++ pcf->flags |= PCF50633_F_USB_PRESENT;
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50633_FEAT_MBC, PMU_EVT_USB_INSERT);
++ }
++
++ /* figure out our initial charging stance */
++ add_request_to_adc_queue(pcf, PCF50633_ADCC1_MUX_ADCIN1,
++ PCF50633_ADCC1_AVERAGE_16);
++
++ pcf->coldplug_done = 1;
++ }
++
++ DEBUGP("INT1=0x%02x INT2=0x%02x INT3=0x%02x INT4=0x%02x INT5=0x%02x\n",
++ pcfirq[0], pcfirq[1], pcfirq[2], pcfirq[3], pcfirq[4]);
++
++ if (pcfirq[0] & PCF50633_INT1_ADPINS) {
++ /* Charger inserted */
++ DEBUGPC("ADPINS ");
++ input_report_key(pcf->input_dev, KEY_BATTERY, 1);
++ apm_queue_event(APM_POWER_STATUS_CHANGE);
++ pcf->flags |= PCF50633_F_CHG_PRESENT;
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50633_FEAT_MBC, PMU_EVT_INSERT);
++ }
++ if (pcfirq[0] & PCF50633_INT1_ADPREM) {
++ /* Charger removed */
++ DEBUGPC("ADPREM ");
++ input_report_key(pcf->input_dev, KEY_BATTERY, 0);
++ apm_queue_event(APM_POWER_STATUS_CHANGE);
++ pcf->flags &= ~PCF50633_F_CHG_PRESENT;
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50633_FEAT_MBC, PMU_EVT_REMOVE);
++ }
++ if (pcfirq[0] & PCF50633_INT1_USBINS) {
++ DEBUGPC("USBINS ");
++ input_report_key(pcf->input_dev, KEY_POWER2, 1);
++ apm_queue_event(APM_POWER_STATUS_CHANGE);
++ pcf->flags |= PCF50633_F_USB_PRESENT;
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50633_FEAT_MBC, PMU_EVT_USB_INSERT);
++ msleep(500); /* debounce, allow to see any ID resistor */
++ /* completion irq will figure out our charging stance */
++ add_request_to_adc_queue(pcf, PCF50633_ADCC1_MUX_ADCIN1,
++ PCF50633_ADCC1_AVERAGE_16);
++ }
++ if (pcfirq[0] & PCF50633_INT1_USBREM &&
++ !(pcfirq[0] & PCF50633_INT1_USBINS)) {
++ /* the occurrence of USBINS and USBREM
++ * should be exclusive in one schedule work
++ */
++ DEBUGPC("USBREM ");
++
++ pcf->usb_removal_count++;
++
++ /* only deal if we had understood it was in */
++ if (pcf->flags & PCF50633_F_USB_PRESENT) {
++ input_report_key(pcf->input_dev, KEY_POWER2, 0);
++ apm_queue_event(APM_POWER_STATUS_CHANGE);
++ pcf->flags &= ~PCF50633_F_USB_PRESENT;
++
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50633_FEAT_MBC, PMU_EVT_USB_REMOVE);
++
++ /* destroy any memory of grant of power from host */
++ pcf->last_curlim_set = 0;
++
++ /* completion irq will figure out our charging stance */
++ add_request_to_adc_queue(pcf, PCF50633_ADCC1_MUX_ADCIN1,
++ PCF50633_ADCC1_AVERAGE_16);
++ }
++ }
++ if (pcfirq[0] & PCF50633_INT1_ALARM) {
++ DEBUGPC("ALARM ");
++ if (pcf->pdata->used_features & PCF50633_FEAT_RTC)
++ rtc_update_irq(pcf->rtc, 1, RTC_AF | RTC_IRQF);
++ }
++ if (pcfirq[0] & PCF50633_INT1_SECOND) {
++ if (pcf->flags & PCF50633_F_RTC_SECOND) {
++ DEBUGPC("SECOND ");
++ rtc_update_irq(pcf->rtc, 1, RTC_PF | RTC_IRQF);
++ }
++
++ if (pcf->onkey_seconds >= 0 &&
++ pcf->flags & PCF50633_F_PWR_PRESSED) {
++ DEBUGP("ONKEY_SECONDS(%u, OOCSTAT=0x%02x) ",
++ pcf->onkey_seconds,
++ reg_read(pcf, PCF50633_REG_OOCSTAT));
++ pcf->onkey_seconds++;
++ if (pcf->onkey_seconds >=
++ pcf->pdata->onkey_seconds_sig_init) {
++ /* Ask init to do 'ctrlaltdel' */
++ /*
++ * currently Linux reacts badly to issuing a
++ * signal to PID #1 before init is started.
++ * What happens is that the next kernel thread
++ * to start, which is the JFFS2 Garbage
++ * collector in our case, gets the signal
++ * instead and proceeds to fail to fork --
++ * which is very bad. Therefore we confirm
++ * PID #1 exists before issuing the signal
++ */
++ if (find_task_by_pid(1)) {
++ DEBUGPC("SIGINT(init) ");
++ kill_proc(1, SIGINT, 1);
++ }
++ /* FIXME: what if userspace doesn't shut down? */
++ }
++ if (pcf->onkey_seconds >=
++ pcf->pdata->onkey_seconds_shutdown) {
++ DEBUGPC("Power Off ");
++ pcf50633_go_standby();
++ }
++ }
++ }
++
++ if (pcfirq[1] & PCF50633_INT2_ONKEYF) {
++ /* ONKEY falling edge (start of button press) */
++ pcf->flags |= PCF50633_F_PWR_PRESSED;
++ if (!pcf->suppress_onkey_events) {
++ DEBUGPC("ONKEYF ");
++ input_report_key(pcf->input_dev, KEY_POWER, 1);
++ } else {
++ DEBUGPC("ONKEYF(unreported) ");
++ }
++ }
++ if (pcfirq[1] & PCF50633_INT2_ONKEYR) {
++ /* ONKEY rising edge (end of button press) */
++ pcf->flags &= ~PCF50633_F_PWR_PRESSED;
++ pcf->onkey_seconds = -1;
++ if (!pcf->suppress_onkey_events) {
++ DEBUGPC("ONKEYR ");
++ input_report_key(pcf->input_dev, KEY_POWER, 0);
++ } else {
++ DEBUGPC("ONKEYR(unreported) ");
++ /* don't suppress any more power button events */
++ pcf->suppress_onkey_events = 0;
++ }
++ /* disable SECOND interrupt in case RTC didn't
++ * request it */
++ if (!(pcf->flags & PCF50633_F_RTC_SECOND))
++ reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
++ PCF50633_INT1_SECOND,
++ PCF50633_INT1_SECOND);
++ }
++ /* FIXME: we don't use EXTON1/2/3. thats why we skip it */
++
++ if (pcfirq[2] & PCF50633_INT3_BATFULL) {
++ DEBUGPC("BATFULL ");
++
++ /* the problem is, we get a false BATFULL if we inserted battery
++ * while USB powered. Defeat BATFULL if we recently inserted
++ * battery
++ */
++
++ if ((jiffies - pcf->jiffies_last_bat_ins) < (HZ * 2)) {
++
++ DEBUGPC("*** Ignoring BATFULL ***\n");
++
++ ret = reg_read(pcf, PCF50633_REG_MBCC7) &
++ PCF56033_MBCC7_USB_MASK;
++
++
++ reg_set_bit_mask(pcf, PCF50633_REG_MBCC7,
++ PCF56033_MBCC7_USB_MASK,
++ PCF50633_MBCC7_USB_SUSPEND);
++
++ reg_set_bit_mask(pcf, PCF50633_REG_MBCC7,
++ PCF56033_MBCC7_USB_MASK,
++ ret);
++ } else {
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50633_FEAT_MBC, PMU_EVT_CHARGER_IDLE);
++ }
++
++ /* FIXME: signal this to userspace */
++ }
++ if (pcfirq[2] & PCF50633_INT3_CHGHALT) {
++ DEBUGPC("CHGHALT ");
++ /*
++ * this is really "battery not pulling current" -- it can
++ * appear with no battery attached
++ */
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50633_FEAT_MBC, PMU_EVT_CHARGER_CHANGE);
++ }
++ if (pcfirq[2] & PCF50633_INT3_THLIMON) {
++ DEBUGPC("THLIMON ");
++ pcf->flags |= PCF50633_F_CHG_PROT;
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50633_FEAT_MBC, PMU_EVT_CHARGER_CHANGE);
++ }
++ if (pcfirq[2] & PCF50633_INT3_THLIMOFF) {
++ DEBUGPC("THLIMOFF ");
++ pcf->flags &= ~PCF50633_F_CHG_PROT;
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50633_FEAT_MBC, PMU_EVT_CHARGER_CHANGE);
++ }
++ if (pcfirq[2] & PCF50633_INT3_USBLIMON) {
++ DEBUGPC("USBLIMON ");
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50633_FEAT_MBC, PMU_EVT_CHARGER_CHANGE);
++ }
++ if (pcfirq[2] & PCF50633_INT3_USBLIMOFF) {
++ DEBUGPC("USBLIMOFF ");
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50633_FEAT_MBC, PMU_EVT_CHARGER_CHANGE);
++ }
++ if (pcfirq[2] & PCF50633_INT3_ADCRDY) {
++ /* ADC result ready */
++ DEBUGPC("ADCRDY ");
++ tail = pcf->adc_queue_tail;
++ pcf->adc_queue_tail = (pcf->adc_queue_tail + 1) &
++ (MAX_ADC_FIFO_DEPTH - 1);
++
++ switch (pcf->adc_queue_mux[tail]) {
++ case PCF50633_ADCC1_MUX_BATSNS_RES: /* battery voltage */
++ pcf->flag_bat_voltage_read = async_adc_complete(pcf);
++ break;
++ case PCF50633_ADCC1_MUX_ADCIN1: /* charger type */
++ pcf->charger_adc_result_raw = async_adc_complete(pcf);
++ pcf->charger_type = interpret_charger_type_from_adc(
++ pcf, pcf->charger_adc_result_raw);
++ configure_pmu_for_charger(pcf, pcf->charger_type);
++ break;
++ default:
++ async_adc_complete(pcf);
++ break;
++ }
++ trigger_next_adc_job_if_any(pcf);
++ }
++ if (pcfirq[2] & PCF50633_INT3_ONKEY1S) {
++ /* ONKEY pressed for more than 1 second */
++ pcf->onkey_seconds = 0;
++ DEBUGPC("ONKEY1S ");
++ /* Tell PMU we are taking care of this */
++ reg_set_bit_mask(pcf, PCF50633_REG_OOCSHDWN,
++ PCF50633_OOCSHDWN_TOTRST,
++ PCF50633_OOCSHDWN_TOTRST);
++ /* enable SECOND interrupt (hz tick) */
++ reg_clear_bits(pcf, PCF50633_REG_INT1M, PCF50633_INT1_SECOND);
++ }
++
++ if (pcfirq[3] & (PCF50633_INT4_LOWBAT|PCF50633_INT4_LOWSYS)) {
++ if ((__reg_read(pcf, PCF50633_REG_MBCS1) &
++ (PCF50633_MBCS1_USBPRES | PCF50633_MBCS1_USBOK)) ==
++ (PCF50633_MBCS1_USBPRES | PCF50633_MBCS1_USBOK)) {
++ /*
++ * hey no need to freak out, we have some kind of
++ * valid charger power to keep us going -- but note that
++ * we are not actually charging anything
++ */
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50633_FEAT_MBC, PMU_EVT_CHARGER_IDLE);
++
++ reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
++ PCF50633_MBCC1_RESUME,
++ PCF50633_MBCC1_RESUME);
++
++ /*
++ * Well, we are not charging anything right this second
++ * ... however in the next ~30s before we get the next
++ * NOBAT, he might insert a battery. So we schedule a
++ * work function checking to see if
++ * we started charging something during that time.
++ * USB removal as well as charging terminates the work
++ * function so we can't get terminally confused
++ */
++ mutex_lock(&pcf->working_lock_nobat);
++ if (!pcf->working_nobat) {
++ pcf->usb_removal_count_nobat =
++ pcf->usb_removal_count;
++
++ if (!schedule_work(&pcf->work_nobat))
++ DEBUGPC("failed to schedule nobat\n");
++ }
++ mutex_unlock(&pcf->working_lock_nobat);
++
++
++ DEBUGPC("(NO)BAT ");
++ } else {
++ /* Really low battery voltage, we have 8 seconds left */
++ DEBUGPC("LOWBAT ");
++ /*
++ * currently Linux reacts badly to issuing a signal to
++ * PID #1 before init is started. What happens is that
++ * the next kernel thread to start, which is the JFFS2
++ * Garbage collector in our case, gets the signal
++ * instead and proceeds to fail to fork -- which is
++ * very bad. Therefore we confirm PID #1 exists
++ * before issuing SPIGPWR
++ */
++ if (find_task_by_pid(1)) {
++ apm_queue_event(APM_LOW_BATTERY);
++ DEBUGPC("SIGPWR(init) ");
++ kill_proc(1, SIGPWR, 1);
++ } else
++ /*
++ * well, our situation is like this: we do not
++ * have any external power, we have a low
++ * battery and since PID #1 doesn't exist yet,
++ * we are early in the boot, likely before
++ * rootfs mount. We should just call it a day
++ */
++ apm_queue_event(APM_CRITICAL_SUSPEND);
++ }
++
++ /* Tell PMU we are taking care of this */
++ reg_set_bit_mask(pcf, PCF50633_REG_OOCSHDWN,
++ PCF50633_OOCSHDWN_TOTRST,
++ PCF50633_OOCSHDWN_TOTRST);
++ }
++ if (pcfirq[3] & PCF50633_INT4_HIGHTMP) {
++ /* High temperature */
++ DEBUGPC("HIGHTMP ");
++ apm_queue_event(APM_CRITICAL_SUSPEND);
++ }
++ if (pcfirq[3] & PCF50633_INT4_AUTOPWRFAIL) {
++ DEBUGPC("PCF50633_INT4_AUTOPWRFAIL ");
++ /* FIXME: deal with this */
++ }
++ if (pcfirq[3] & PCF50633_INT4_DWN1PWRFAIL) {
++ DEBUGPC("PCF50633_INT4_DWN1PWRFAIL ");
++ /* FIXME: deal with this */
++ }
++ if (pcfirq[3] & PCF50633_INT4_DWN2PWRFAIL) {
++ DEBUGPC("PCF50633_INT4_DWN2PWRFAIL ");
++ /* FIXME: deal with this */
++ }
++ if (pcfirq[3] & PCF50633_INT4_LEDPWRFAIL) {
++ DEBUGPC("PCF50633_INT4_LEDPWRFAIL ");
++ /* FIXME: deal with this */
++ }
++ if (pcfirq[3] & PCF50633_INT4_LEDOVP) {
++ DEBUGPC("PCF50633_INT4_LEDOVP ");
++ /* FIXME: deal with this */
++ }
++
++ DEBUGPC("\n");
++
++bail:
++ pcf->working = 0;
++ input_sync(pcf->input_dev);
++ put_device(&pcf->client.dev);
++ mutex_unlock(&pcf->working_lock);
++
++ return;
++
++reschedule:
++ /* don't spew, delaying whatever else is happening */
++ /* EXCEPTION: if we are in the middle of suspending, we don't have
++ * time to hang around since we may be turned off core 1V3 already
++ */
++ if ((pcf->suspend_state != PCF50633_SS_STARTING_SUSPEND) &&
++ (pcf->suspend_state != PCF50633_SS_COMPLETED_SUSPEND)) {
++ msleep(10);
++ dev_dbg(&pcf->client.dev, "rescheduling interrupt service\n");
++ }
++ if (!schedule_work(&pcf->work))
++ dev_err(&pcf->client.dev, "int service reschedule failed\n");
++
++ /* we don't put the device here, hold it for next time */
++ mutex_unlock(&pcf->working_lock);
++}
++
++static irqreturn_t pcf50633_irq(int irq, void *_pcf)
++{
++ struct pcf50633_data *pcf = _pcf;
++
++ DEBUGP("entering(irq=%u, pcf=%p): scheduling work\n", irq, _pcf);
++ dev_dbg(&pcf->client.dev, "pcf50633_irq scheduling work\n");
++
++ get_device(&pcf->client.dev);
++ if (!schedule_work(&pcf->work) && !pcf->working)
++ dev_err(&pcf->client.dev, "pcf irq work already queued\n");
++
++ return IRQ_HANDLED;
++}
++
++static u_int16_t adc_to_batt_millivolts(u_int16_t adc)
++{
++ u_int16_t mvolts;
++
++ mvolts = (adc * 6000) / 1024;
++
++ return mvolts;
++}
++
++#define BATTVOLT_SCALE_START 2800
++#define BATTVOLT_SCALE_END 4200
++#define BATTVOLT_SCALE_DIVIDER ((BATTVOLT_SCALE_END - BATTVOLT_SCALE_START)/100)
++
++static u_int8_t battvolt_scale(u_int16_t battvolt)
++{
++ /* FIXME: this linear scale is completely bogus */
++ u_int16_t battvolt_relative = battvolt - BATTVOLT_SCALE_START;
++ unsigned int percent = battvolt_relative / BATTVOLT_SCALE_DIVIDER;
++
++ return percent;
++}
++
++u_int16_t pcf50633_battvolt(struct pcf50633_data *pcf)
++{
++ int count = 10;
++
++ pcf->flag_bat_voltage_read = -1;
++ add_request_to_adc_queue(pcf, PCF50633_ADCC1_MUX_BATSNS_RES,
++ PCF50633_ADCC1_AVERAGE_16);
++
++ while ((count--) && (pcf->flag_bat_voltage_read < 0))
++ msleep(1);
++
++ if (count < 0) { /* timeout somehow */
++ DEBUGPC("pcf50633_battvolt timeout :-(\n");
++ return -1;
++ }
++
++ return adc_to_batt_millivolts(pcf->flag_bat_voltage_read);
++}
++EXPORT_SYMBOL_GPL(pcf50633_battvolt);
++
++static ssize_t show_battvolt(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++
++ return sprintf(buf, "%u\n", pcf50633_battvolt(pcf));
++}
++static DEVICE_ATTR(battvolt, S_IRUGO | S_IWUSR, show_battvolt, NULL);
++
++static int reg_id_by_name(const char *name)
++{
++ int reg_id;
++
++ if (!strcmp(name, "voltage_auto"))
++ reg_id = PCF50633_REGULATOR_AUTO;
++ else if (!strcmp(name, "voltage_down1"))
++ reg_id = PCF50633_REGULATOR_DOWN1;
++ else if (!strcmp(name, "voltage_down2"))
++ reg_id = PCF50633_REGULATOR_DOWN2;
++ else if (!strcmp(name, "voltage_memldo"))
++ reg_id = PCF50633_REGULATOR_MEMLDO;
++ else if (!strcmp(name, "voltage_ldo1"))
++ reg_id = PCF50633_REGULATOR_LDO1;
++ else if (!strcmp(name, "voltage_ldo2"))
++ reg_id = PCF50633_REGULATOR_LDO2;
++ else if (!strcmp(name, "voltage_ldo3"))
++ reg_id = PCF50633_REGULATOR_LDO3;
++ else if (!strcmp(name, "voltage_ldo4"))
++ reg_id = PCF50633_REGULATOR_LDO4;
++ else if (!strcmp(name, "voltage_ldo5"))
++ reg_id = PCF50633_REGULATOR_LDO5;
++ else if (!strcmp(name, "voltage_ldo6"))
++ reg_id = PCF50633_REGULATOR_LDO6;
++ else if (!strcmp(name, "voltage_hcldo"))
++ reg_id = PCF50633_REGULATOR_HCLDO;
++ else
++ reg_id = -1;
++
++ return reg_id;
++}
++
++static ssize_t show_vreg(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++ unsigned int reg_id;
++
++ reg_id = reg_id_by_name(attr->attr.name);
++ if (reg_id < 0)
++ return 0;
++
++ if (pcf50633_onoff_get(pcf, reg_id) > 0)
++ return sprintf(buf, "%u\n", pcf50633_voltage_get(pcf, reg_id));
++ else
++ return strlcpy(buf, "0\n", PAGE_SIZE);
++}
++
++static ssize_t set_vreg(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++ unsigned long mvolts = simple_strtoul(buf, NULL, 10);
++ unsigned int reg_id;
++
++ reg_id = reg_id_by_name(attr->attr.name);
++ if (reg_id < 0)
++ return -EIO;
++
++ DEBUGP("attempting to set %s(%d) to %lu mvolts\n", attr->attr.name,
++ reg_id, mvolts);
++
++ if (mvolts == 0) {
++ pcf50633_onoff_set(pcf, reg_id, 0);
++ } else {
++ if (pcf50633_voltage_set(pcf, reg_id, mvolts) < 0) {
++ dev_warn(dev, "refusing to set %s(%d) to %lu mvolts "
++ "(max=%u)\n", attr->attr.name, reg_id, mvolts,
++ pcf->pdata->rails[reg_id].voltage.max);
++ return -EINVAL;
++ }
++ pcf50633_onoff_set(pcf, reg_id, 1);
++ }
++
++ return count;
++}
++
++static DEVICE_ATTR(voltage_auto, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_down1, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_down2, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_memldo, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_ldo1, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_ldo2, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_ldo3, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_ldo4, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_ldo5, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_ldo6, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++static DEVICE_ATTR(voltage_hcldo, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
++
++/***********************************************************************
++ * Charger Control
++ ***********************************************************************/
++
++/* Set maximum USB current limit */
++static void pcf50633_usb_curlim_set(struct pcf50633_data *pcf, int ma)
++{
++ u_int8_t bits;
++ int active = 0;
++
++ pcf->last_curlim_set = ma;
++
++ dev_dbg(&pcf->client.dev, "setting usb current limit to %d ma", ma);
++
++ if (ma >= 1000) {
++ bits = PCF50633_MBCC7_USB_1000mA;
++ }
++ else if (ma >= 500)
++ bits = PCF50633_MBCC7_USB_500mA;
++ else if (ma >= 100)
++ bits = PCF50633_MBCC7_USB_100mA;
++ else
++ bits = PCF50633_MBCC7_USB_SUSPEND;
++
++ /* set the nearest charging limit */
++ reg_set_bit_mask(pcf, PCF50633_REG_MBCC7, PCF56033_MBCC7_USB_MASK,
++ bits);
++
++ /* with this charging limit, is charging actually meaningful? */
++ switch (bits) {
++ case PCF50633_MBCC7_USB_500mA:
++ case PCF50633_MBCC7_USB_1000mA:
++ /* yes with this charging limit, we can do real charging */
++ active = 1;
++ break;
++ default:
++ /* no charging is gonna be happening */
++ break;
++ }
++ /*
++ * enable or disable charging according to current limit -- this will
++ * also throw a platform notification callback about it
++ */
++ pcf50633_charge_enable(pcf50633_global, active);
++
++ /* clear batfull */
++ reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
++ PCF50633_MBCC1_AUTORES,
++ 0);
++ reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
++ PCF50633_MBCC1_RESUME,
++ PCF50633_MBCC1_RESUME);
++ reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
++ PCF50633_MBCC1_AUTORES,
++ PCF50633_MBCC1_AUTORES);
++
++}
++
++static ssize_t show_usblim(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++ u_int8_t usblim = reg_read(pcf, PCF50633_REG_MBCC7) &
++ PCF56033_MBCC7_USB_MASK;
++ unsigned int ma;
++
++ if (usblim == PCF50633_MBCC7_USB_1000mA)
++ ma = 1000;
++ else if (usblim == PCF50633_MBCC7_USB_500mA)
++ ma = 500;
++ else if (usblim == PCF50633_MBCC7_USB_100mA)
++ ma = 100;
++ else
++ ma = 0;
++
++ return sprintf(buf, "%u\n", ma);
++}
++static DEVICE_ATTR(usb_curlim, S_IRUGO | S_IWUSR, show_usblim, NULL);
++
++/* Enable/disable charging */
++static void pcf50633_charge_enable(struct pcf50633_data *pcf, int on)
++{
++ u_int8_t bits;
++ u_int8_t usblim;
++
++ if (!(pcf->pdata->used_features & PCF50633_FEAT_MBC))
++ return;
++
++ DEBUGPC("pcf50633_charge_enable %d\n", on);
++
++ if (on) {
++ pcf->flags |= PCF50633_F_CHG_ENABLED;
++ bits = PCF50633_MBCC1_CHGENA;
++ usblim = reg_read(pcf, PCF50633_REG_MBCC7) &
++ PCF56033_MBCC7_USB_MASK;
++ switch (usblim) {
++ case PCF50633_MBCC7_USB_1000mA:
++ case PCF50633_MBCC7_USB_500mA:
++ if (pcf->flags & PCF50633_F_USB_PRESENT)
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50633_FEAT_MBC,
++ PMU_EVT_CHARGER_ACTIVE);
++ break;
++ default:
++ break;
++ }
++ } else {
++ pcf->flags &= ~PCF50633_F_CHG_ENABLED;
++ bits = 0;
++ if (pcf->pdata->cb)
++ pcf->pdata->cb(&pcf->client.dev,
++ PCF50633_FEAT_MBC, PMU_EVT_CHARGER_IDLE);
++ }
++ reg_set_bit_mask(pcf, PCF50633_REG_MBCC1, PCF50633_MBCC1_CHGENA,
++ bits);
++}
++
++#if 0
++#define ONE 1000000
++static u_int16_t adc_to_rntc(struct pcf50633_data *pcf, u_int16_t adc)
++{
++ u_int32_t r_batt = (adc * pcf->pdata->r_fix_batt) / (1023 - adc);
++ u_int16_t r_ntc;
++
++ /* The battery NTC has a parallell 10kOhms resistor */
++ r_ntc = ONE / ((ONE/r_batt) - (ONE/pcf->pdata->r_fix_batt_par));
++
++ return r_ntc;
++}
++#endif
++static ssize_t show_battemp(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ return sprintf(buf, "\n");
++}
++static DEVICE_ATTR(battemp, S_IRUGO | S_IWUSR, show_battemp, NULL);
++#if 0
++static u_int16_t adc_to_chg_milliamps(struct pcf50633_data *pcf,
++ u_int16_t adc_adcin1,
++ u_int16_t adc_batvolt)
++{
++ u_int32_t res = ((adc_adcin1 - adc_batvolt) * 6000);
++ return res / (pcf->pdata->r_sense_milli * 1024 / 1000);
++}
++#endif
++static ssize_t show_chgcur(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ return sprintf(buf, "\n");
++}
++static DEVICE_ATTR(chgcur, S_IRUGO | S_IWUSR, show_chgcur, NULL);
++
++static const char *chgmode_names[] = {
++ [PCF50633_MBCS2_MBC_PLAY] = "play-only",
++ [PCF50633_MBCS2_MBC_USB_PRE] = "pre",
++ [PCF50633_MBCS2_MBC_ADP_PRE] = "pre",
++ [PCF50633_MBCS2_MBC_USB_PRE_WAIT] = "pre-wait",
++ [PCF50633_MBCS2_MBC_ADP_PRE_WAIT] = "pre-wait",
++ [PCF50633_MBCS2_MBC_USB_FAST] = "fast",
++ [PCF50633_MBCS2_MBC_ADP_FAST] = "fast",
++ [PCF50633_MBCS2_MBC_USB_FAST_WAIT] = "fast-wait",
++ [PCF50633_MBCS2_MBC_ADP_FAST_WAIT] = "fast-wait",
++ [PCF50633_MBCS2_MBC_ADP_FAST_WAIT] = "bat-full",
++};
++
++static ssize_t show_chgmode(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++ u_int8_t mbcs2 = reg_read(pcf, PCF50633_REG_MBCS2);
++ u_int8_t chgmod = (mbcs2 & PCF50633_MBCS2_MBC_MASK);
++
++ return sprintf(buf, "%s\n", chgmode_names[chgmod]);
++}
++
++static ssize_t set_chgmode(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++
++ /* As opposed to the PCF50606, we can only enable or disable
++ * charging and not directly jump into a certain mode! */
++
++ if (!strcmp(buf, "0\n"))
++ pcf50633_charge_enable(pcf, 0);
++ else
++ pcf50633_charge_enable(pcf, 1);
++
++ return count;
++}
++
++static DEVICE_ATTR(chgmode, S_IRUGO | S_IWUSR, show_chgmode, set_chgmode);
++
++static const char *chgstate_names[] = {
++ [PCF50633_FIDX_CHG_ENABLED] = "enabled",
++ [PCF50633_FIDX_CHG_PRESENT] = "charger_present",
++ [PCF50633_FIDX_USB_PRESENT] = "usb_present",
++ [PCF50633_FIDX_CHG_ERR] = "error",
++ [PCF50633_FIDX_CHG_PROT] = "protection",
++ [PCF50633_FIDX_CHG_READY] = "ready",
++};
++
++static ssize_t show_chgstate(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++
++ char *b = buf;
++ int i;
++
++ for (i = 0; i < 32; i++)
++ if (pcf->flags & (1 << i) && i < ARRAY_SIZE(chgstate_names))
++ b += sprintf(b, "%s ", chgstate_names[i]);
++
++ if (b > buf)
++ b += sprintf(b, "\n");
++
++ return b - buf;
++}
++static DEVICE_ATTR(chgstate, S_IRUGO | S_IWUSR, show_chgstate, NULL);
++
++/***********************************************************************
++ * APM emulation
++ ***********************************************************************/
++
++extern void (*apm_get_power_status)(struct apm_power_info *);
++
++static void pcf50633_get_power_status(struct apm_power_info *info)
++{
++ struct pcf50633_data *pcf = pcf50633_global;
++ u_int8_t chgmod = reg_read(pcf, PCF50633_REG_MBCS2) &
++ PCF50633_MBCS2_MBC_MASK;
++
++ u_int16_t battvolt = pcf50633_battvolt(pcf);
++
++ if (reg_read(pcf, PCF50633_REG_MBCS1) &
++ (PCF50633_MBCS1_USBPRES|PCF50633_MBCS1_ADAPTPRES))
++ info->ac_line_status = APM_AC_ONLINE;
++ else
++ info->ac_line_status = APM_AC_OFFLINE;
++
++ switch (chgmod) {
++ case PCF50633_MBCS2_MBC_PLAY:
++ case PCF50633_MBCS2_MBC_USB_PRE:
++ case PCF50633_MBCS2_MBC_USB_PRE_WAIT:
++ case PCF50633_MBCS2_MBC_USB_FAST_WAIT:
++ case PCF50633_MBCS2_MBC_ADP_PRE:
++ case PCF50633_MBCS2_MBC_ADP_PRE_WAIT:
++ case PCF50633_MBCS2_MBC_ADP_FAST_WAIT:
++ case PCF50633_MBCS2_MBC_BAT_FULL:
++ case PCF50633_MBCS2_MBC_HALT:
++ info->battery_life = battvolt_scale(battvolt);
++ break;
++ case PCF50633_MBCS2_MBC_USB_FAST:
++ case PCF50633_MBCS2_MBC_ADP_FAST:
++ info->battery_status = APM_BATTERY_STATUS_CHARGING;
++ info->battery_flag = APM_BATTERY_FLAG_CHARGING;
++ default:
++ break;
++ }
++}
++
++/***********************************************************************
++ * RTC
++ ***********************************************************************/
++enum pcf50633_time_indexes {
++ PCF50633_TI_SEC = 0,
++ PCF50633_TI_MIN,
++ PCF50633_TI_HOUR,
++ PCF50633_TI_WKDAY,
++ PCF50633_TI_DAY,
++ PCF50633_TI_MONTH,
++ PCF50633_TI_YEAR,
++ PCF50633_TI_EXTENT /* always last */
++};
++
++
++struct pcf50633_time {
++ u_int8_t time[PCF50633_TI_EXTENT];
++};
++
++static void pcf2rtc_time(struct rtc_time *rtc, struct pcf50633_time *pcf)
++{
++ rtc->tm_sec = BCD2BIN(pcf->time[PCF50633_TI_SEC]);
++ rtc->tm_min = BCD2BIN(pcf->time[PCF50633_TI_MIN]);
++ rtc->tm_hour = BCD2BIN(pcf->time[PCF50633_TI_HOUR]);
++ rtc->tm_wday = BCD2BIN(pcf->time[PCF50633_TI_WKDAY]);
++ rtc->tm_mday = BCD2BIN(pcf->time[PCF50633_TI_DAY]);
++ rtc->tm_mon = BCD2BIN(pcf->time[PCF50633_TI_MONTH]);
++ rtc->tm_year = BCD2BIN(pcf->time[PCF50633_TI_YEAR]) + 100;
++}
++
++static void rtc2pcf_time(struct pcf50633_time *pcf, struct rtc_time *rtc)
++{
++ pcf->time[PCF50633_TI_SEC] = BIN2BCD(rtc->tm_sec);
++ pcf->time[PCF50633_TI_MIN] = BIN2BCD(rtc->tm_min);
++ pcf->time[PCF50633_TI_HOUR] = BIN2BCD(rtc->tm_hour);
++ pcf->time[PCF50633_TI_WKDAY] = BIN2BCD(rtc->tm_wday);
++ pcf->time[PCF50633_TI_DAY] = BIN2BCD(rtc->tm_mday);
++ pcf->time[PCF50633_TI_MONTH] = BIN2BCD(rtc->tm_mon);
++ pcf->time[PCF50633_TI_YEAR] = BIN2BCD(rtc->tm_year - 100);
++}
++
++static int pcf50633_rtc_ioctl(struct device *dev, unsigned int cmd,
++ unsigned long arg)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++
++ switch (cmd) {
++ case RTC_AIE_OFF:
++ /* disable the alarm interrupt */
++ reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
++ PCF50633_INT1_ALARM, PCF50633_INT1_ALARM);
++ return 0;
++ case RTC_AIE_ON:
++ /* enable the alarm interrupt */
++ reg_clear_bits(pcf, PCF50633_REG_INT1M, PCF50633_INT1_ALARM);
++ return 0;
++ case RTC_PIE_OFF:
++ /* disable periodic interrupt (hz tick) */
++ pcf->flags &= ~PCF50633_F_RTC_SECOND;
++ reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
++ PCF50633_INT1_SECOND, PCF50633_INT1_SECOND);
++ return 0;
++ case RTC_PIE_ON:
++ /* ensable periodic interrupt (hz tick) */
++ pcf->flags |= PCF50633_F_RTC_SECOND;
++ reg_clear_bits(pcf, PCF50633_REG_INT1M, PCF50633_INT1_SECOND);
++ return 0;
++ }
++ return -ENOIOCTLCMD;
++}
++
++static int pcf50633_rtc_read_time(struct device *dev, struct rtc_time *tm)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++ struct pcf50633_time pcf_tm;
++ int ret;
++
++ mutex_lock(&pcf->lock);
++
++ ret = i2c_smbus_read_i2c_block_data(&pcf->client,
++ PCF50633_REG_RTCSC,
++ PCF50633_TI_EXTENT,
++ &pcf_tm.time[0]);
++ if (ret != PCF50633_TI_EXTENT)
++ dev_err(dev, "Failed to read time :-(\n");
++
++ mutex_unlock(&pcf->lock);
++
++ dev_dbg(dev, "PCF_TIME: %02x.%02x.%02x %02x:%02x:%02x\n",
++ pcf_tm.time[PCF50633_TI_DAY],
++ pcf_tm.time[PCF50633_TI_MONTH],
++ pcf_tm.time[PCF50633_TI_YEAR],
++ pcf_tm.time[PCF50633_TI_HOUR],
++ pcf_tm.time[PCF50633_TI_MIN],
++ pcf_tm.time[PCF50633_TI_SEC]);
++
++ pcf2rtc_time(tm, &pcf_tm);
++
++ dev_dbg(dev, "RTC_TIME: %u.%u.%u %u:%u:%u\n",
++ tm->tm_mday, tm->tm_mon, tm->tm_year,
++ tm->tm_hour, tm->tm_min, tm->tm_sec);
++
++ return 0;
++}
++
++static int pcf50633_rtc_set_time(struct device *dev, struct rtc_time *tm)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++ struct pcf50633_time pcf_tm;
++ int ret;
++
++ dev_dbg(dev, "RTC_TIME: %u.%u.%u %u:%u:%u\n",
++ tm->tm_mday, tm->tm_mon, tm->tm_year,
++ tm->tm_hour, tm->tm_min, tm->tm_sec);
++ rtc2pcf_time(&pcf_tm, tm);
++ dev_dbg(dev, "PCF_TIME: %02x.%02x.%02x %02x:%02x:%02x\n",
++ pcf_tm.time[PCF50633_TI_DAY],
++ pcf_tm.time[PCF50633_TI_MONTH],
++ pcf_tm.time[PCF50633_TI_YEAR],
++ pcf_tm.time[PCF50633_TI_HOUR],
++ pcf_tm.time[PCF50633_TI_MIN],
++ pcf_tm.time[PCF50633_TI_SEC]);
++
++ mutex_lock(&pcf->lock);
++ /* FIXME: disable second interrupt */
++
++ ret = i2c_smbus_write_i2c_block_data(&pcf->client,
++ PCF50633_REG_RTCSC,
++ PCF50633_TI_EXTENT,
++ &pcf_tm.time[0]);
++ if (ret)
++ dev_err(dev, "Failed to set time %d\n", ret);
++
++ /* FIXME: re-enable second interrupt */
++ mutex_unlock(&pcf->lock);
++
++ return 0;
++}
++
++static int pcf50633_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++ struct pcf50633_time pcf_tm;
++ int ret;
++
++ mutex_lock(&pcf->lock);
++
++ alrm->enabled =
++ __reg_read(pcf, PCF50633_REG_INT1M) & PCF50633_INT1_ALARM ? 0 : 1;
++
++ ret = i2c_smbus_read_i2c_block_data(&pcf->client,
++ PCF50633_REG_RTCSCA,
++ PCF50633_TI_EXTENT,
++ &pcf_tm.time[0]);
++ if (ret != PCF50633_TI_EXTENT)
++ dev_err(dev, "Failed to read Alarm time :-(\n");
++
++ mutex_unlock(&pcf->lock);
++
++ pcf2rtc_time(&alrm->time, &pcf_tm);
++
++ return 0;
++}
++
++static int pcf50633_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++ struct pcf50633_time pcf_tm;
++ u_int8_t irqmask;
++ int ret;
++
++ rtc2pcf_time(&pcf_tm, &alrm->time);
++
++ mutex_lock(&pcf->lock);
++
++ /* disable alarm interrupt */
++ irqmask = __reg_read(pcf, PCF50633_REG_INT1M);
++ irqmask |= PCF50633_INT1_ALARM;
++ __reg_write(pcf, PCF50633_REG_INT1M, irqmask);
++
++ ret = i2c_smbus_write_i2c_block_data(&pcf->client,
++ PCF50633_REG_RTCSCA,
++ PCF50633_TI_EXTENT,
++ &pcf_tm.time[0]);
++ if (ret)
++ dev_err(dev, "Failed to write alarm time :-( %d\n", ret);
++
++ if (alrm->enabled) {
++ /* (re-)enaable alarm interrupt */
++ irqmask = __reg_read(pcf, PCF50633_REG_INT1M);
++ irqmask &= ~PCF50633_INT1_ALARM;
++ __reg_write(pcf, PCF50633_REG_INT1M, irqmask);
++ }
++
++ mutex_unlock(&pcf->lock);
++
++ /* FIXME */
++ return 0;
++}
++
++static struct rtc_class_ops pcf50633_rtc_ops = {
++ .ioctl = pcf50633_rtc_ioctl,
++ .read_time = pcf50633_rtc_read_time,
++ .set_time = pcf50633_rtc_set_time,
++ .read_alarm = pcf50633_rtc_read_alarm,
++ .set_alarm = pcf50633_rtc_set_alarm,
++};
++
++/***********************************************************************
++ * Backlight device
++ ***********************************************************************/
++
++static int pcf50633bl_get_intensity(struct backlight_device *bd)
++{
++ struct pcf50633_data *pcf = bl_get_data(bd);
++ int intensity = reg_read(pcf, PCF50633_REG_LEDOUT);
++
++ if (!(reg_read(pcf, PCF50633_REG_LEDENA) & 1))
++ intensity = 0;
++
++ return intensity & 0x3f;
++}
++
++static int __pcf50633bl_set_intensity(struct pcf50633_data *pcf, int intensity)
++{
++ int old_intensity = reg_read(pcf, PCF50633_REG_LEDOUT);
++ int ret;
++
++ if (!(reg_read(pcf, PCF50633_REG_LEDENA) & 1))
++ old_intensity = 0;
++
++ /*
++ * The PCF50633 cannot handle LEDOUT = 0 (datasheet p60)
++ * if seen, you have to re-enable the LED unit
++ * we treat intensity 0 as disable
++ */
++
++ if (intensity && !old_intensity) {
++ ret = reg_set_bit_mask(pcf, PCF50633_REG_LEDENA, 0x01, 0x00);
++ if (ret)
++ return ret;
++ }
++
++ if (!intensity) /* illegal to set LEDOUT to 0 */
++ ret = reg_set_bit_mask(pcf, PCF50633_REG_LEDENA, 0x01, 0x00);
++ else {
++ ret = reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f,
++ intensity);
++ if (ret)
++ return ret;
++ ret = reg_set_bit_mask(pcf, PCF50633_REG_LEDENA, 0x01, 0x01);
++ }
++
++ return ret;
++}
++
++static int pcf50633bl_set_intensity(struct backlight_device *bd)
++{
++ struct pcf50633_data *pcf = bl_get_data(bd);
++ int intensity = bd->props.brightness;
++
++ if ((bd->props.power != FB_BLANK_UNBLANK) ||
++ (bd->props.fb_blank != FB_BLANK_UNBLANK))
++ intensity = 0;
++
++ return __pcf50633bl_set_intensity(pcf, intensity);
++}
++
++static struct backlight_ops pcf50633bl_ops = {
++ .get_brightness = pcf50633bl_get_intensity,
++ .update_status = pcf50633bl_set_intensity,
++};
++
++/*
++ * Charger type
++ */
++
++static ssize_t show_charger_type(struct device *dev,
++ struct device_attribute *attr, char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++ static const char *names_charger_type[] = {
++ [CHARGER_TYPE_NONE] = "none",
++ [CHARGER_TYPE_HOSTUSB] = "host/500mA usb",
++ [CHARGER_TYPE_1A] = "charger 1A",
++ };
++ static const char *names_charger_modes[] = {
++ [PCF50633_MBCC7_USB_1000mA] = "1A",
++ [PCF50633_MBCC7_USB_500mA] = "500mA",
++ [PCF50633_MBCC7_USB_100mA] = "100mA",
++ [PCF50633_MBCC7_USB_SUSPEND] = "suspend",
++ };
++ int mode = reg_read(pcf, PCF50633_REG_MBCC7) & PCF56033_MBCC7_USB_MASK;
++
++ return sprintf(buf, "%s mode %s\n",
++ names_charger_type[pcf->charger_type],
++ names_charger_modes[mode]);
++}
++
++static DEVICE_ATTR(charger_type, 0444, show_charger_type, NULL);
++
++static ssize_t force_usb_limit_dangerous(struct device *dev,
++ struct device_attribute *attr, const char *buf, size_t count)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++ int ma = simple_strtoul(buf, NULL, 10);
++
++ pcf50633_usb_curlim_set(pcf, ma);
++ return count;
++}
++
++static DEVICE_ATTR(force_usb_limit_dangerous, 0600,
++ NULL, force_usb_limit_dangerous);
++
++/*
++ * Charger adc
++ */
++
++static ssize_t show_charger_adc(struct device *dev,
++ struct device_attribute *attr, char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++
++ return sprintf(buf, "%d\n", pcf->charger_adc_result_raw);
++}
++
++static DEVICE_ATTR(charger_adc, 0444, show_charger_adc, NULL);
++
++/*
++ * Dump regs
++ */
++
++static ssize_t show_dump_regs(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++ u8 dump[16];
++ int n, n1, idx = 0;
++ char *buf1 = buf;
++ static u8 address_no_read[] = { /* must be ascending */
++ PCF50633_REG_INT1,
++ PCF50633_REG_INT2,
++ PCF50633_REG_INT3,
++ PCF50633_REG_INT4,
++ PCF50633_REG_INT5,
++ 0 /* terminator */
++ };
++
++ for (n = 0; n < 256; n += sizeof(dump)) {
++
++ for (n1 = 0; n1 < sizeof(dump); n1++)
++ if (n == address_no_read[idx]) {
++ idx++;
++ dump[n1] = 0x00;
++ } else
++ dump[n1] = reg_read(pcf, n + n1);
++
++ hex_dump_to_buffer(dump, sizeof(dump), 16, 1, buf1, 128, 0);
++ buf1 += strlen(buf1);
++ *buf1++ = '\n';
++ *buf1 = '\0';
++ }
++
++ return buf1 - buf;
++}
++
++static DEVICE_ATTR(dump_regs, 0400, show_dump_regs, NULL);
++
++
++/***********************************************************************
++ * Driver initialization
++ ***********************************************************************/
++
++/*
++ * CARE! This table is modified at runtime!
++ */
++static struct attribute *pcf_sysfs_entries[] = {
++ &dev_attr_voltage_auto.attr,
++ &dev_attr_voltage_down1.attr,
++ &dev_attr_voltage_down2.attr,
++ &dev_attr_voltage_memldo.attr,
++ &dev_attr_voltage_ldo1.attr,
++ &dev_attr_voltage_ldo2.attr,
++ &dev_attr_voltage_ldo3.attr,
++ &dev_attr_voltage_ldo4.attr,
++ &dev_attr_voltage_ldo5.attr,
++ &dev_attr_voltage_ldo6.attr,
++ &dev_attr_voltage_hcldo.attr,
++ &dev_attr_charger_type.attr,
++ &dev_attr_force_usb_limit_dangerous.attr,
++ &dev_attr_charger_adc.attr,
++ &dev_attr_dump_regs.attr,
++ NULL, /* going to add things at this point! */
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++ NULL,
++};
++
++static struct attribute_group pcf_attr_group = {
++ .name = NULL, /* put in device directory */
++ .attrs = pcf_sysfs_entries,
++};
++
++static void populate_sysfs_group(struct pcf50633_data *pcf)
++{
++ int i = 0;
++ struct attribute **attr;
++
++ for (attr = pcf_sysfs_entries; *attr; attr++)
++ i++;
++
++ if (pcf->pdata->used_features & PCF50633_FEAT_MBC) {
++ pcf_sysfs_entries[i++] = &dev_attr_chgstate.attr;
++ pcf_sysfs_entries[i++] = &dev_attr_chgmode.attr;
++ pcf_sysfs_entries[i++] = &dev_attr_usb_curlim.attr;
++ }
++
++ if (pcf->pdata->used_features & PCF50633_FEAT_CHGCUR)
++ pcf_sysfs_entries[i++] = &dev_attr_chgcur.attr;
++
++ if (pcf->pdata->used_features & PCF50633_FEAT_BATVOLT)
++ pcf_sysfs_entries[i++] = &dev_attr_battvolt.attr;
++
++ if (pcf->pdata->used_features & PCF50633_FEAT_BATTEMP)
++ pcf_sysfs_entries[i++] = &dev_attr_battemp.attr;
++
++}
++
++static int pcf50633_detect(struct i2c_adapter *adapter, int address, int kind)
++{
++ struct i2c_client *new_client;
++ struct pcf50633_data *pcf;
++ int err = 0;
++ int irq;
++
++ DEBUGP("entering\n");
++ if (!pcf50633_pdev) {
++ printk(KERN_ERR "pcf50633: driver needs a platform_device!\n");
++ return -EIO;
++ }
++
++ irq = platform_get_irq(pcf50633_pdev, 0);
++ if (irq < 0) {
++ dev_err(&pcf50633_pdev->dev, "no irq in platform resources!\n");
++ return -EIO;
++ }
++
++ /* At the moment, we only support one PCF50633 in a system */
++ if (pcf50633_global) {
++ dev_err(&pcf50633_pdev->dev,
++ "currently only one chip supported\n");
++ return -EBUSY;
++ }
++
++ pcf = kzalloc(sizeof(*pcf), GFP_KERNEL);
++ if (!pcf)
++ return -ENOMEM;
++
++ mutex_init(&pcf->lock);
++ mutex_init(&pcf->working_lock);
++ mutex_init(&pcf->working_lock_nobat);
++ mutex_init(&pcf->working_lock_usb_curlimit);
++ INIT_WORK(&pcf->work, pcf50633_work);
++ INIT_WORK(&pcf->work_nobat, pcf50633_work_nobat);
++ INIT_WORK(&pcf->work_usb_curlimit, pcf50633_work_usbcurlim);
++ pcf->irq = irq;
++ pcf->working = 0;
++ pcf->suppress_onkey_events = 0;
++ pcf->onkey_seconds = -1;
++ pcf->pdata = pcf50633_pdev->dev.platform_data;
++
++ new_client = &pcf->client;
++ i2c_set_clientdata(new_client, pcf);
++ new_client->addr = address;
++ new_client->adapter = adapter;
++ new_client->driver = &pcf50633_driver;
++ new_client->flags = 0;
++ strlcpy(new_client->name, "pcf50633", I2C_NAME_SIZE);
++
++ /* now we try to detect the chip */
++
++ /* register with i2c core */
++ if ((err = i2c_attach_client(new_client))) {
++ dev_err(&new_client->dev,
++ "error during i2c_attach_client()\n");
++ goto exit_free;
++ }
++
++ init_resume_dependency_list(&pcf->resume_dependency);
++
++ populate_sysfs_group(pcf);
++
++ err = sysfs_create_group(&new_client->dev.kobj, &pcf_attr_group);
++ if (err) {
++ dev_err(&new_client->dev, "error creating sysfs group\n");
++ goto exit_detach;
++ }
++
++ /* create virtual charger 'device' */
++
++ /* register power off handler with core power management */
++ pm_power_off = &pcf50633_go_standby;
++
++ pcf->input_dev = input_allocate_device();
++ if (!pcf->input_dev)
++ goto exit_sysfs;
++
++ pcf->input_dev->name = "GTA02 PMU events";
++ pcf->input_dev->phys = "FIXME";
++ pcf->input_dev->id.bustype = BUS_I2C;
++ pcf->input_dev->cdev.dev = &new_client->dev;
++
++ pcf->input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_PWR);
++ set_bit(KEY_POWER, pcf->input_dev->keybit);
++ set_bit(KEY_POWER2, pcf->input_dev->keybit);
++ set_bit(KEY_BATTERY, pcf->input_dev->keybit);
++
++ err = input_register_device(pcf->input_dev);
++ if (err)
++ goto exit_sysfs;
++
++ /* configure interrupt mask */
++ /* we want SECOND to kick for the coldplug initialisation */
++ reg_write(pcf, PCF50633_REG_INT1M, 0x00);
++ reg_write(pcf, PCF50633_REG_INT2M, 0x00);
++ reg_write(pcf, PCF50633_REG_INT3M, 0x00);
++ reg_write(pcf, PCF50633_REG_INT4M, 0x00);
++ reg_write(pcf, PCF50633_REG_INT5M, 0x00);
++
++ err = request_irq(irq, pcf50633_irq, IRQF_TRIGGER_FALLING,
++ "pcf50633", pcf);
++ if (err < 0)
++ goto exit_input;
++
++ if (enable_irq_wake(irq) < 0)
++ dev_err(&new_client->dev, "IRQ %u cannot be enabled as wake-up"
++ "source in this hardware revision!", irq);
++
++ if (pcf->pdata->used_features & PCF50633_FEAT_RTC) {
++ pcf->rtc = rtc_device_register("pcf50633", &new_client->dev,
++ &pcf50633_rtc_ops, THIS_MODULE);
++ if (IS_ERR(pcf->rtc)) {
++ err = PTR_ERR(pcf->rtc);
++ goto exit_irq;
++ }
++ }
++
++ if (pcf->pdata->used_features & PCF50633_FEAT_PWM_BL) {
++ pcf->backlight = backlight_device_register("pcf50633-bl",
++ &new_client->dev,
++ pcf,
++ &pcf50633bl_ops);
++ if (!pcf->backlight)
++ goto exit_rtc;
++ /* FIXME: are we sure we want default == off? */
++ pcf->backlight->props.max_brightness = 0x3f;
++ pcf->backlight->props.power = FB_BLANK_UNBLANK;
++ pcf->backlight->props.fb_blank = FB_BLANK_UNBLANK;
++ pcf->backlight->props.brightness =
++ pcf->backlight->props.max_brightness;
++ backlight_update_status(pcf->backlight);
++ }
++
++ if (pcf->pdata->flag_use_apm_emulation)
++ apm_get_power_status = pcf50633_get_power_status;
++
++ pcf->probe_completed = 1;
++ pcf50633_global = pcf;
++ dev_info(&new_client->dev, "probe completed\n");
++
++ /* if platform was interested, give him a chance to register
++ * platform devices that switch power with us as the parent
++ * at registration time -- ensures suspend / resume ordering
++ */
++ if (pcf->pdata->attach_child_devices)
++ (pcf->pdata->attach_child_devices)(&new_client->dev);
++
++ return 0;
++exit_rtc:
++ if (pcf->pdata->used_features & PCF50633_FEAT_RTC)
++ rtc_device_unregister(pcf50633_global->rtc);
++exit_irq:
++ free_irq(pcf50633_global->irq, pcf50633_global);
++exit_input:
++ input_unregister_device(pcf->input_dev);
++exit_sysfs:
++ pm_power_off = NULL;
++ sysfs_remove_group(&new_client->dev.kobj, &pcf_attr_group);
++exit_detach:
++ i2c_detach_client(new_client);
++exit_free:
++ kfree(pcf);
++ pcf50633_global = NULL;
++ return err;
++}
++
++static int pcf50633_attach_adapter(struct i2c_adapter *adapter)
++{
++ DEBUGP("entering, calling i2c_probe\n");
++ return i2c_probe(adapter, &addr_data, &pcf50633_detect);
++}
++
++static int pcf50633_detach_client(struct i2c_client *client)
++{
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++
++ DEBUGP("entering\n");
++
++ apm_get_power_status = NULL;
++
++ free_irq(pcf->irq, pcf);
++
++ input_unregister_device(pcf->input_dev);
++
++ if (pcf->pdata->used_features & PCF50633_FEAT_PWM_BL)
++ backlight_device_unregister(pcf->backlight);
++
++ if (pcf->pdata->used_features & PCF50633_FEAT_RTC)
++ rtc_device_unregister(pcf->rtc);
++
++ sysfs_remove_group(&client->dev.kobj, &pcf_attr_group);
++
++ pm_power_off = NULL;
++
++ kfree(pcf);
++
++ return 0;
++}
++
++/* you're going to need >300 bytes in buf */
++
++int pcf50633_report_resumers(struct pcf50633_data *pcf, char *buf)
++{
++ static char *int_names[] = {
++ "adpins",
++ "adprem",
++ "usbins",
++ "usbrem",
++ NULL,
++ NULL,
++ "rtcalarm",
++ "second",
++
++ "onkeyr",
++ "onkeyf",
++ "exton1r",
++ "exton1f",
++ "exton2r",
++ "exton2f",
++ "exton3r",
++ "exton3f",
++
++ "batfull",
++ "chghalt",
++ "thlimon",
++ "thlimoff",
++ "usblimon",
++ "usblimoff",
++ "adcrdy",
++ "onkey1s",
++
++ "lowsys",
++ "lowbat",
++ "hightmp",
++ "autopwrfail",
++ "dwn1pwrfail",
++ "dwn2pwrfail",
++ "ledpwrfail",
++ "ledovp",
++
++ "ldo1pwrfail",
++ "ldo2pwrfail",
++ "ldo3pwrfail",
++ "ldo4pwrfail",
++ "ldo5pwrfail",
++ "ldo6pwrfail",
++ "hcidopwrfail",
++ "hcidoovl"
++ };
++ char *end = buf;
++ int n;
++
++ for (n = 0; n < ARRAY_SIZE(int_names); n++)
++ if (int_names[n]) {
++ if (pcf->pcfirq_resume[n >> 3] & (1 >> (n & 7)))
++ end += sprintf(end, " * %s\n", int_names[n]);
++ else
++ end += sprintf(end, " %s\n", int_names[n]);
++ }
++
++ return end - buf;
++}
++
++
++#ifdef CONFIG_PM
++
++/*
++ * we need to export this because pcf50633_data is kept opaque
++ */
++
++void pcf50633_register_resume_dependency(struct pcf50633_data *pcf,
++ struct resume_dependency *dep)
++{
++ register_resume_dependency(&pcf->resume_dependency, dep);
++ if (pcf->is_suspended)
++ activate_all_resume_dependencies(&pcf->resume_dependency);
++}
++EXPORT_SYMBOL_GPL(pcf50633_register_resume_dependency);
++
++
++static int pcf50633_suspend(struct device *dev, pm_message_t state)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++ int i;
++ int ret;
++ u_int8_t tmp;
++ u_int8_t res[5];
++
++ dev_err(dev, "pcf50633_suspend\n");
++
++ /* we suspend once (!) as late as possible in the suspend sequencing */
++
++ if ((state.event != PM_EVENT_SUSPEND) ||
++ (pcf->suspend_state != PCF50633_SS_RUNNING))
++ return -EBUSY;
++
++ /* The general idea is to power down all unused power supplies,
++ * and then mask all PCF50633 interrupt sources but EXTONR, ONKEYF
++ * and ALARM */
++
++ mutex_lock(&pcf->lock);
++
++ pcf->suspend_state = PCF50633_SS_STARTING_SUSPEND;
++
++ /* we are not going to service any further interrupts until we
++ * resume. If the IRQ workqueue is still pending in the background,
++ * it will bail when it sees we set suspend state above
++ */
++
++ disable_irq(pcf->irq);
++
++ /* Save all registers that don't "survive" standby state */
++ pcf->standby_regs.ooctim2 = __reg_read(pcf, PCF50633_REG_OOCTIM2);
++
++ ret = i2c_smbus_read_i2c_block_data(&pcf->client,
++ PCF50633_REG_AUTOOUT,
++ sizeof(pcf->standby_regs.misc),
++ &pcf->standby_regs.misc[0]);
++ if (ret != sizeof(pcf->standby_regs.misc))
++ dev_err(dev, "Failed to save misc levels and enables :-(\n");
++
++ /* regulator voltages and enable states */
++ ret = i2c_smbus_read_i2c_block_data(&pcf->client,
++ PCF50633_REG_LDO1OUT,
++ sizeof(pcf->standby_regs.ldo),
++ &pcf->standby_regs.ldo[0]);
++ if (ret != sizeof(pcf->standby_regs.ldo))
++ dev_err(dev, "Failed to save LDO levels and enables :-(\n");
++
++ /* switch off power supplies that are not needed during suspend */
++ for (i = 0; i < __NUM_PCF50633_REGULATORS; i++) {
++ if ((pcf->pdata->rails[i].flags & PMU_VRAIL_F_SUSPEND_ON))
++ continue;
++
++ /* we can save ourselves the read part of a read-modify-write
++ * here because we captured all these already
++ */
++ if (i < 4)
++ tmp = pcf->standby_regs.misc[i * 4 + 1];
++ else
++ tmp = pcf->standby_regs.ldo[(i - 4) * 2 + 1];
++
++ dev_dbg(dev, "disabling reg %s by setting ENA %d to 0x%02X\n",
++ pcf->pdata->rails[i].name,
++ regulator_registers[i] + 1, tmp & 0xfe);
++
++ /* associated enable is always +1 from OUT reg */
++ __reg_write(pcf, regulator_registers[i] + 1, tmp & 0xfe);
++ }
++
++ /* turn off the backlight */
++ __reg_write(pcf, PCF50633_REG_LEDDIM, 0);
++ __reg_write(pcf, PCF50633_REG_LEDOUT, 2);
++ __reg_write(pcf, PCF50633_REG_LEDENA, 0x00);
++
++ /* set interrupt masks so only those sources we want to wake
++ * us are able to
++ */
++ for (i = 0; i < 5; i++)
++ res[i] = ~pcf->pdata->resumers[i];
++
++ ret = i2c_smbus_write_i2c_block_data(&pcf->client,
++ PCF50633_REG_INT1M,
++ 5, &res[0]);
++ if (ret)
++ dev_err(dev, "Failed to set wake masks :-( %d\n", ret);
++
++ pcf->suspend_state = PCF50633_SS_COMPLETED_SUSPEND;
++
++ mutex_unlock(&pcf->lock);
++
++ pcf->is_suspended = 1;
++ activate_all_resume_dependencies(&pcf->resume_dependency);
++ return 0;
++}
++
++
++int pcf50633_ready(struct pcf50633_data *pcf)
++{
++ if (!pcf)
++ return -EACCES;
++
++ /* this was seen during boot with Qi, mmc_rescan racing us */
++ if (!pcf->probe_completed)
++ return -EACCES;
++
++ if ((pcf->suspend_state != PCF50633_SS_RUNNING) &&
++ (pcf->suspend_state < PCF50633_SS_COMPLETED_RESUME))
++ return -EBUSY;
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(pcf50633_ready);
++
++int pcf50633_wait_for_ready(struct pcf50633_data *pcf, int timeout_ms,
++ char *name)
++{
++ /* so we always go once */
++ timeout_ms += 5;
++
++ while ((timeout_ms >= 5) && (pcf50633_ready(pcf))) {
++ timeout_ms -= 5; /* well, it isn't very accurate, but OK */
++ msleep(5);
++ }
++
++ if (timeout_ms < 5) {
++ printk(KERN_ERR"pcf50633_wait_for_ready: "
++ "%s BAILING on timeout\n", name);
++ return -EBUSY;
++ }
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(pcf50633_wait_for_ready);
++
++/*
++ * if backlight resume is selected to be deferred by platform, then it
++ * can call this to finally reset backlight status (after LCM is resumed
++ * for example
++ */
++
++void pcf50633_backlight_resume(struct pcf50633_data *pcf)
++{
++ dev_dbg(&pcf->client.dev, "pcf50633_backlight_resume\n");
++
++ /* platform defines resume ramp speed */
++ reg_write(pcf, PCF50633_REG_LEDDIM,
++ pcf->pdata->resume_backlight_ramp_speed);
++
++ __pcf50633bl_set_intensity(pcf, pcf->backlight->props.brightness);
++}
++EXPORT_SYMBOL_GPL(pcf50633_backlight_resume);
++
++
++static int pcf50633_resume(struct device *dev)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct pcf50633_data *pcf = i2c_get_clientdata(client);
++ int ret;
++ u8 res[5];
++ u8 misc[PCF50633_REG_LEDDIM - PCF50633_REG_AUTOOUT + 1];
++
++ dev_dbg(dev, "pcf50633_resume suspended on entry = %d\n",
++ (int)pcf->suspend_state);
++ mutex_lock(&pcf->lock);
++
++ pcf->suspend_state = PCF50633_SS_STARTING_RESUME;
++
++ /* these guys get reset while pcf50633 is suspend state, refresh */
++
++ __reg_write(pcf, PCF50633_REG_OOCTIM2, pcf->standby_regs.ooctim2);
++
++ memcpy(misc, pcf->standby_regs.misc, sizeof(pcf->standby_regs.misc));
++
++ if (pcf->pdata->defer_resume_backlight) {
++ misc[PCF50633_REG_LEDOUT - PCF50633_REG_AUTOOUT] = 1;
++ misc[PCF50633_REG_LEDENA - PCF50633_REG_AUTOOUT] = 0x20;
++ misc[PCF50633_REG_LEDCTL - PCF50633_REG_AUTOOUT] = 1;
++ misc[PCF50633_REG_LEDDIM - PCF50633_REG_AUTOOUT] = 1;
++ }
++
++ /* regulator voltages and enable states */
++ ret = i2c_smbus_write_i2c_block_data(&pcf->client,
++ PCF50633_REG_AUTOOUT,
++ sizeof(misc),
++ &misc[0]);
++ if (ret)
++ dev_err(dev, "Failed to restore misc :-( %d\n", ret);
++
++ /* platform can choose to defer backlight bringup */
++ if (!pcf->pdata->defer_resume_backlight)
++ pcf50633_backlight_resume(pcf);
++
++ /* regulator voltages and enable states */
++ ret = i2c_smbus_write_i2c_block_data(&pcf->client,
++ PCF50633_REG_LDO1OUT,
++ sizeof(pcf->standby_regs.ldo),
++ &pcf->standby_regs.ldo[0]);
++ if (ret)
++ dev_err(dev, "Failed to restore LDOs :-( %d\n", ret);
++
++ memset(res, 0, sizeof(res));
++ /* not interested in second on resume */
++ res[0] = PCF50633_INT1_SECOND;
++ ret = i2c_smbus_write_i2c_block_data(&pcf->client,
++ PCF50633_REG_INT1M,
++ 5, &res[0]);
++ if (ret)
++ dev_err(dev, "Failed to set int masks :-( %d\n", ret);
++
++ pcf->suspend_state = PCF50633_SS_COMPLETED_RESUME;
++
++ enable_irq(pcf->irq);
++
++ mutex_unlock(&pcf->lock);
++
++ /* gratuitous call to PCF work function, in the case that the PCF
++ * interrupt edge was missed during resume, this forces the pending
++ * register clear and lifts the interrupt back high again. In the
++ * case nothing is waiting for service, no harm done.
++ */
++
++ get_device(&pcf->client.dev);
++ pcf50633_work(&pcf->work);
++
++ pcf->is_suspended = 0;
++ callback_all_resume_dependencies(&pcf->resume_dependency);
++
++ return 0;
++}
++#else
++#define pcf50633_suspend NULL
++#define pcf50633_resume NULL
++#endif
++
++static struct i2c_driver pcf50633_driver = {
++ .driver = {
++ .name = "pcf50633",
++ .suspend= pcf50633_suspend,
++ .resume = pcf50633_resume,
++ },
++ .id = I2C_DRIVERID_PCF50633,
++ .attach_adapter = pcf50633_attach_adapter,
++ .detach_client = pcf50633_detach_client,
++};
++
++/* we have this purely to capture an early indication that we are coming out
++ * of suspend, before our device resume got called; async interrupt service is
++ * interested in this
++ */
++
++static int pcf50633_plat_resume(struct platform_device *pdev)
++{
++ /* i2c_get_clientdata(to_i2c_client(&pdev->dev)) returns NULL at this
++ * early resume time so we have to use pcf50633_global
++ */
++ pcf50633_global->suspend_state = PCF50633_SS_RESUMING_BUT_NOT_US_YET;
++
++ return 0;
++}
++
++/* platform driver, since i2c devices don't have platform_data */
++static int __init pcf50633_plat_probe(struct platform_device *pdev)
++{
++ struct pcf50633_platform_data *pdata = pdev->dev.platform_data;
++
++ if (!pdata)
++ return -ENODEV;
++
++ pcf50633_pdev = pdev;
++
++ return 0;
++}
++
++static int pcf50633_plat_remove(struct platform_device *pdev)
++{
++ return 0;
++}
++
++static struct platform_driver pcf50633_plat_driver = {
++ .probe = pcf50633_plat_probe,
++ .remove = pcf50633_plat_remove,
++ .resume_early = pcf50633_plat_resume,
++ .driver = {
++ .owner = THIS_MODULE,
++ .name = "pcf50633",
++ },
++};
++
++static int __init pcf50633_init(void)
++{
++ int rc;
++
++ if (!(rc = platform_driver_register(&pcf50633_plat_driver)))
++ rc = i2c_add_driver(&pcf50633_driver);
++
++ return rc;
++}
++
++static void pcf50633_exit(void)
++{
++ i2c_del_driver(&pcf50633_driver);
++ platform_driver_unregister(&pcf50633_plat_driver);
++}
++
++MODULE_DESCRIPTION("I2C chip driver for NXP PCF50633 power management unit");
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
++MODULE_LICENSE("GPL");
++
++module_init(pcf50633_init);
++module_exit(pcf50633_exit);
+Index: linux-2.6.24.7/drivers/i2c/chips/pcf50633.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/i2c/chips/pcf50633.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,349 @@
++#ifndef _PCF50633_H
++#define _PCF50633_H
++
++/* Philips PCF50633 Power Managemnt Unit (PMU) driver
++ * (C) 2006-2007 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ *
++ */
++
++enum pfc50633_regs {
++ PCF50633_REG_VERSION = 0x00,
++ PCF50633_REG_VARIANT = 0x01,
++ PCF50633_REG_INT1 = 0x02, /* Interrupt Status */
++ PCF50633_REG_INT2 = 0x03, /* Interrupt Status */
++ PCF50633_REG_INT3 = 0x04, /* Interrupt Status */
++ PCF50633_REG_INT4 = 0x05, /* Interrupt Status */
++ PCF50633_REG_INT5 = 0x06, /* Interrupt Status */
++ PCF50633_REG_INT1M = 0x07, /* Interrupt Mask */
++ PCF50633_REG_INT2M = 0x08, /* Interrupt Mask */
++ PCF50633_REG_INT3M = 0x09, /* Interrupt Mask */
++ PCF50633_REG_INT4M = 0x0a, /* Interrupt Mask */
++ PCF50633_REG_INT5M = 0x0b, /* Interrupt Mask */
++ PCF50633_REG_OOCSHDWN = 0x0c,
++ PCF50633_REG_OOCWAKE = 0x0d,
++ PCF50633_REG_OOCTIM1 = 0x0e,
++ PCF50633_REG_OOCTIM2 = 0x0f,
++ PCF50633_REG_OOCMODE = 0x10,
++ PCF50633_REG_OOCCTL = 0x11,
++ PCF50633_REG_OOCSTAT = 0x12,
++ PCF50633_REG_GPIOCTL = 0x13,
++ PCF50633_REG_GPIO1CFG = 0x14,
++ PCF50633_REG_GPIO2CFG = 0x15,
++ PCF50633_REG_GPIO3CFG = 0x16,
++ PCF50633_REG_GPOCFG = 0x17,
++ PCF50633_REG_BVMCTL = 0x18,
++ PCF50633_REG_SVMCTL = 0x19,
++ PCF50633_REG_AUTOOUT = 0x1a,
++ PCF50633_REG_AUTOENA = 0x1b,
++ PCF50633_REG_AUTOCTL = 0x1c,
++ PCF50633_REG_AUTOMXC = 0x1d,
++ PCF50633_REG_DOWN1OUT = 0x1e,
++ PCF50633_REG_DOWN1ENA = 0x1f,
++ PCF50633_REG_DOWN1CTL = 0x20,
++ PCF50633_REG_DOWN1MXC = 0x21,
++ PCF50633_REG_DOWN2OUT = 0x22,
++ PCF50633_REG_DOWN2ENA = 0x23,
++ PCF50633_REG_DOWN2CTL = 0x24,
++ PCF50633_REG_DOWN2MXC = 0x25,
++ PCF50633_REG_MEMLDOOUT = 0x26,
++ PCF50633_REG_MEMLDOENA = 0x27,
++ PCF50633_REG_LEDOUT = 0x28,
++ PCF50633_REG_LEDENA = 0x29,
++ PCF50633_REG_LEDCTL = 0x2a,
++ PCF50633_REG_LEDDIM = 0x2b,
++ /* reserved */
++ PCF50633_REG_LDO1OUT = 0x2d,
++ PCF50633_REG_LDO1ENA = 0x2e,
++ PCF50633_REG_LDO2OUT = 0x2f,
++ PCF50633_REG_LDO2ENA = 0x30,
++ PCF50633_REG_LDO3OUT = 0x31,
++ PCF50633_REG_LDO3ENA = 0x32,
++ PCF50633_REG_LDO4OUT = 0x33,
++ PCF50633_REG_LDO4ENA = 0x34,
++ PCF50633_REG_LDO5OUT = 0x35,
++ PCF50633_REG_LDO5ENA = 0x36,
++ PCF50633_REG_LDO6OUT = 0x37,
++ PCF50633_REG_LDO6ENA = 0x38,
++ PCF50633_REG_HCLDOOUT = 0x39,
++ PCF50633_REG_HCLDOENA = 0x3a,
++ PCF50633_REG_STBYCTL1 = 0x3b,
++ PCF50633_REG_STBYCTL2 = 0x3c,
++ PCF50633_REG_DEBPF1 = 0x3d,
++ PCF50633_REG_DEBPF2 = 0x3e,
++ PCF50633_REG_DEBPF3 = 0x3f,
++ PCF50633_REG_HCLDOOVL = 0x40,
++ PCF50633_REG_DCDCSTAT = 0x41,
++ PCF50633_REG_LDOSTAT = 0x42,
++ PCF50633_REG_MBCC1 = 0x43,
++ PCF50633_REG_MBCC2 = 0x44,
++ PCF50633_REG_MBCC3 = 0x45,
++ PCF50633_REG_MBCC4 = 0x46,
++ PCF50633_REG_MBCC5 = 0x47,
++ PCF50633_REG_MBCC6 = 0x48,
++ PCF50633_REG_MBCC7 = 0x49,
++ PCF50633_REG_MBCC8 = 0x4a,
++ PCF50633_REG_MBCS1 = 0x4b,
++ PCF50633_REG_MBCS2 = 0x4c,
++ PCF50633_REG_MBCS3 = 0x4d,
++ PCF50633_REG_BBCCTL = 0x4e,
++ PCF50633_REG_ALMGAIN = 0x4f,
++ PCF50633_REG_ALMDATA = 0x50,
++ /* reserved */
++ PCF50633_REG_ADCC3 = 0x52,
++ PCF50633_REG_ADCC2 = 0x53,
++ PCF50633_REG_ADCC1 = 0x54,
++ PCF50633_REG_ADCS1 = 0x55,
++ PCF50633_REG_ADCS2 = 0x56,
++ PCF50633_REG_ADCS3 = 0x57,
++ /* reserved */
++ PCF50633_REG_RTCSC = 0x59, /* Second */
++ PCF50633_REG_RTCMN = 0x5a, /* Minute */
++ PCF50633_REG_RTCHR = 0x5b, /* Hour */
++ PCF50633_REG_RTCWD = 0x5c, /* Weekday */
++ PCF50633_REG_RTCDT = 0x5d, /* Day */
++ PCF50633_REG_RTCMT = 0x5e, /* Month */
++ PCF50633_REG_RTCYR = 0x5f, /* Year */
++ PCF50633_REG_RTCSCA = 0x60, /* Alarm Second */
++ PCF50633_REG_RTCMNA = 0x61, /* Alarm Minute */
++ PCF50633_REG_RTCHRA = 0x62, /* Alarm Hour */
++ PCF50633_REG_RTCWDA = 0x63, /* Alarm Weekday */
++ PCF50633_REG_RTCDTA = 0x64, /* Alarm Day */
++ PCF50633_REG_RTCMTA = 0x65, /* Alarm Month */
++ PCF50633_REG_RTCYRA = 0x66, /* Alarm Year */
++
++ PCF50633_REG_MEMBYTE0 = 0x67,
++ PCF50633_REG_MEMBYTE1 = 0x68,
++ PCF50633_REG_MEMBYTE2 = 0x69,
++ PCF50633_REG_MEMBYTE3 = 0x6a,
++ PCF50633_REG_MEMBYTE4 = 0x6b,
++ PCF50633_REG_MEMBYTE5 = 0x6c,
++ PCF50633_REG_MEMBYTE6 = 0x6d,
++ PCF50633_REG_MEMBYTE7 = 0x6e,
++ /* reserved */
++ PCF50633_REG_DCDCPFM = 0x84,
++ __NUM_PCF50633_REGS
++};
++
++
++enum pcf50633_reg_oocshdwn {
++ PCF50633_OOCSHDWN_GOSTDBY = 0x01,
++ PCF50633_OOCSHDWN_TOTRST = 0x04,
++ PCF50633_OOCSHDWN_COLDBOOT = 0x08,
++};
++
++enum pcf50633_reg_oocwake {
++ PCF50633_OOCWAKE_ONKEY = 0x01,
++ PCF50633_OOCWAKE_EXTON1 = 0x02,
++ PCF50633_OOCWAKE_EXTON2 = 0x04,
++ PCF50633_OOCWAKE_EXTON3 = 0x08,
++ PCF50633_OOCWAKE_RTC = 0x10,
++ /* reserved */
++ PCF50633_OOCWAKE_USB = 0x40,
++ PCF50633_OOCWAKE_ADP = 0x80,
++};
++
++enum pcf50633_reg_mbcc1 {
++ PCF50633_MBCC1_CHGENA = 0x01, /* Charger enable */
++ PCF50633_MBCC1_AUTOSTOP = 0x02,
++ PCF50633_MBCC1_AUTORES = 0x04, /* automatic resume */
++ PCF50633_MBCC1_RESUME = 0x08, /* explicit resume cmd */
++ PCF50633_MBCC1_RESTART = 0x10, /* restart charging */
++ PCF50633_MBCC1_PREWDTIME_60M = 0x20, /* max. precharging time */
++ PCF50633_MBCC1_WDTIME_1H = 0x00,
++ PCF50633_MBCC1_WDTIME_2H = 0x40,
++ PCF50633_MBCC1_WDTIME_4H = 0x80,
++ PCF50633_MBCC1_WDTIME_6H = 0xc0,
++};
++#define PCF50633_MBCC1_WDTIME_MASK 0xc0
++
++enum pcf50633_reg_mbcc2 {
++ PCF50633_MBCC2_VBATCOND_2V7 = 0x00,
++ PCF50633_MBCC2_VBATCOND_2V85 = 0x01,
++ PCF50633_MBCC2_VBATCOND_3V0 = 0x02,
++ PCF50633_MBCC2_VBATCOND_3V15 = 0x03,
++ PCF50633_MBCC2_VMAX_4V = 0x00,
++ PCF50633_MBCC2_VMAX_4V20 = 0x28,
++ PCF50633_MBCC2_VRESDEBTIME_64S = 0x80, /* debounce time (32/64sec) */
++};
++#define PCF50633_MBCC2_VBATCOND_MASK 0x03
++#define PCF50633_MBCC2_VMAX_MASK 0x3c
++
++enum pcf50633_reg_adcc1 {
++ PCF50633_ADCC1_ADCSTART = 0x01,
++ PCF50633_ADCC1_RES_10BIT = 0x02,
++ PCF50633_ADCC1_AVERAGE_NO = 0x00,
++ PCF50633_ADCC1_AVERAGE_4 = 0x04,
++ PCF50633_ADCC1_AVERAGE_8 = 0x08,
++ PCF50633_ADCC1_AVERAGE_16 = 0x0c,
++
++ PCF50633_ADCC1_MUX_BATSNS_RES = 0x00,
++ PCF50633_ADCC1_MUX_BATSNS_SUBTR = 0x10,
++ PCF50633_ADCC1_MUX_ADCIN2_RES = 0x20,
++ PCF50633_ADCC1_MUX_ADCIN2_SUBTR = 0x30,
++ PCF50633_ADCC1_MUX_BATTEMP = 0x60,
++ PCF50633_ADCC1_MUX_ADCIN1 = 0x70,
++};
++#define PCF50633_ADCC1_AVERAGE_MASK 0x0c
++#define PCF50633_ADCC1_ADCMUX_MASK 0xf0
++
++enum pcf50633_reg_adcc2 {
++ PCF50633_ADCC2_RATIO_NONE = 0x00,
++ PCF50633_ADCC2_RATIO_BATTEMP = 0x01,
++ PCF50633_ADCC2_RATIO_ADCIN1 = 0x02,
++ PCF50633_ADCC2_RATIO_BOTH = 0x03,
++ PCF50633_ADCC2_RATIOSETTL_100US = 0x04,
++};
++#define PCF50633_ADCC2_RATIO_MASK 0x03
++
++enum pcf50633_reg_adcc3 {
++ PCF50633_ADCC3_ACCSW_EN = 0x01,
++ PCF50633_ADCC3_NTCSW_EN = 0x04,
++ PCF50633_ADCC3_RES_DIV_TWO = 0x10,
++ PCF50633_ADCC3_RES_DIV_THREE = 0x00,
++};
++
++enum pcf50633_reg_adcs3 {
++ PCF50633_ADCS3_REF_NTCSW = 0x00,
++ PCF50633_ADCS3_REF_ACCSW = 0x10,
++ PCF50633_ADCS3_REF_2V0 = 0x20,
++ PCF50633_ADCS3_REF_VISA = 0x30,
++ PCF50633_ADCS3_REF_2V0_2 = 0x70,
++ PCF50633_ADCS3_ADCRDY = 0x80,
++};
++#define PCF50633_ADCS3_ADCDAT1L_MASK 0x03
++#define PCF50633_ADCS3_ADCDAT2L_MASK 0x0c
++#define PCF50633_ADCS3_ADCDAT2L_SHIFT 2
++#define PCF50633_ASCS3_REF_MASK 0x70
++
++enum pcf50633_regulator_enable {
++ PCF50633_REGULATOR_ON = 0x01,
++ PCF50633_REGULATOR_ON_GPIO1 = 0x02,
++ PCF50633_REGULATOR_ON_GPIO2 = 0x04,
++ PCF50633_REGULATOR_ON_GPIO3 = 0x08,
++};
++#define PCF50633_REGULATOR_ON_MASK 0x0f
++
++enum pcf50633_regulator_phase {
++ PCF50633_REGULATOR_ACTPH1 = 0x00,
++ PCF50633_REGULATOR_ACTPH2 = 0x10,
++ PCF50633_REGULATOR_ACTPH3 = 0x20,
++ PCF50633_REGULATOR_ACTPH4 = 0x30,
++};
++#define PCF50633_REGULATOR_ACTPH_MASK 0x30
++
++enum pcf50633_reg_gpocfg {
++ PCF50633_GPOCFG_GPOSEL_0 = 0x00,
++ PCF50633_GPOCFG_GPOSEL_LED_NFET = 0x01,
++ PCF50633_GPOCFG_GPOSEL_SYSxOK = 0x02,
++ PCF50633_GPOCFG_GPOSEL_CLK32K = 0x03,
++ PCF50633_GPOCFG_GPOSEL_ADAPUSB = 0x04,
++ PCF50633_GPOCFG_GPOSEL_USBxOK = 0x05,
++ PCF50633_GPOCFG_GPOSEL_ACTPH4 = 0x06,
++ PCF50633_GPOCFG_GPOSEL_1 = 0x07,
++ PCF50633_GPOCFG_GPOSEL_INVERSE = 0x08,
++};
++#define PCF50633_GPOCFG_GPOSEL_MASK 0x07
++
++#if 0
++enum pcf50633_reg_mbcc1 {
++ PCF50633_MBCC1_CHGENA = 0x01,
++ PCF50633_MBCC1_AUTOSTOP = 0x02,
++ PCF50633_MBCC1_AUTORES = 0x04,
++ PCF50633_MBCC1_RESUME = 0x08,
++ PCF50633_MBCC1_RESTART = 0x10,
++ PCF50633_MBCC1_PREWDTIME_30MIN = 0x00,
++ PCF50633_MBCC1_PREWDTIME_60MIN = 0x20,
++ PCF50633_MBCC1_WDTIME_2HRS = 0x40,
++ PCF50633_MBCC1_WDTIME_4HRS = 0x80,
++ PCF50633_MBCC1_WDTIME_6HRS = 0xc0,
++};
++
++enum pcf50633_reg_mbcc2 {
++ PCF50633_MBCC2_VBATCOND_2V7 = 0x00,
++ PCF50633_MBCC2_VBATCOND_2V85 = 0x01,
++ PCF50633_MBCC2_VBATCOND_3V0 = 0x02,
++ PCF50633_MBCC2_VBATCOND_3V15 = 0x03,
++ PCF50633_MBCC2_VRESDEBTIME_64S = 0x80,
++};
++#define PCF50633_MBCC2_VMAX_MASK 0x3c
++#endif
++
++enum pcf50633_reg_mbcc7 {
++ PCF50633_MBCC7_USB_100mA = 0x00,
++ PCF50633_MBCC7_USB_500mA = 0x01,
++ PCF50633_MBCC7_USB_1000mA = 0x02,
++ PCF50633_MBCC7_USB_SUSPEND = 0x03,
++ PCF50633_MBCC7_BATTEMP_EN = 0x04,
++ PCF50633_MBCC7_BATSYSIMAX_1A6 = 0x00,
++ PCF50633_MBCC7_BATSYSIMAX_1A8 = 0x40,
++ PCF50633_MBCC7_BATSYSIMAX_2A0 = 0x80,
++ PCF50633_MBCC7_BATSYSIMAX_2A2 = 0xc0,
++};
++#define PCF56033_MBCC7_USB_MASK 0x03
++
++enum pcf50633_reg_mbcc8 {
++ PCF50633_MBCC8_USBENASUS = 0x10,
++};
++
++enum pcf50633_reg_mbcs1 {
++ PCF50633_MBCS1_USBPRES = 0x01,
++ PCF50633_MBCS1_USBOK = 0x02,
++ PCF50633_MBCS1_ADAPTPRES = 0x04,
++ PCF50633_MBCS1_ADAPTOK = 0x08,
++ PCF50633_MBCS1_TBAT_OK = 0x00,
++ PCF50633_MBCS1_TBAT_ABOVE = 0x10,
++ PCF50633_MBCS1_TBAT_BELOW = 0x20,
++ PCF50633_MBCS1_TBAT_UNDEF = 0x30,
++ PCF50633_MBCS1_PREWDTEXP = 0x40,
++ PCF50633_MBCS1_WDTEXP = 0x80,
++};
++
++enum pcf50633_reg_mbcs2_mbcmod {
++ PCF50633_MBCS2_MBC_PLAY = 0x00,
++ PCF50633_MBCS2_MBC_USB_PRE = 0x01,
++ PCF50633_MBCS2_MBC_USB_PRE_WAIT = 0x02,
++ PCF50633_MBCS2_MBC_USB_FAST = 0x03,
++ PCF50633_MBCS2_MBC_USB_FAST_WAIT= 0x04,
++ PCF50633_MBCS2_MBC_USB_SUSPEND = 0x05,
++ PCF50633_MBCS2_MBC_ADP_PRE = 0x06,
++ PCF50633_MBCS2_MBC_ADP_PRE_WAIT = 0x07,
++ PCF50633_MBCS2_MBC_ADP_FAST = 0x08,
++ PCF50633_MBCS2_MBC_ADP_FAST_WAIT= 0x09,
++ PCF50633_MBCS2_MBC_BAT_FULL = 0x0a,
++ PCF50633_MBCS2_MBC_HALT = 0x0b,
++};
++#define PCF50633_MBCS2_MBC_MASK 0x0f
++enum pcf50633_reg_mbcs2_chgstat {
++ PCF50633_MBCS2_CHGS_NONE = 0x00,
++ PCF50633_MBCS2_CHGS_ADAPTER = 0x10,
++ PCF50633_MBCS2_CHGS_USB = 0x20,
++ PCF50633_MBCS2_CHGS_BOTH = 0x30,
++};
++#define PCF50633_MBCS2_RESSTAT_AUTO 0x40
++
++enum pcf50633_reg_mbcs3 {
++ PCF50633_MBCS3_USBLIM_PLAY = 0x01,
++ PCF50633_MBCS3_USBLIM_CGH = 0x02,
++ PCF50633_MBCS3_TLIM_PLAY = 0x04,
++ PCF50633_MBCS3_TLIM_CHG = 0x08,
++ PCF50633_MBCS3_ILIM = 0x10, /* 1: Ibat > Icutoff */
++ PCF50633_MBCS3_VLIM = 0x20, /* 1: Vbat == Vmax */
++ PCF50633_MBCS3_VBATSTAT = 0x40, /* 1: Vbat > Vbatcond */
++ PCF50633_MBCS3_VRES = 0x80, /* 1: Vbat > Vth(RES) */
++};
++
++/* this is to be provided by the board implementation */
++extern const u_int8_t pcf50633_initial_regs[__NUM_PCF50633_REGS];
++
++void pcf50633_reg_write(u_int8_t reg, u_int8_t val);
++
++u_int8_t pcf50633_reg_read(u_int8_t reg);
++
++void pcf50633_reg_set_bit_mask(u_int8_t reg, u_int8_t mask, u_int8_t val);
++void pcf50633_reg_clear_bits(u_int8_t reg, u_int8_t bits);
++
++void pcf50633_charge_autofast(int on);
++
++#endif /* _PCF50606_H */
++
+Index: linux-2.6.24.7/drivers/i2c/chips/tsl256x.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/i2c/chips/tsl256x.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,310 @@
++/*
++ * tsl256x.c -- TSL256x Light Sensor driver
++ *
++ * Copyright 2007 by Fiwin.
++ * Author: Alec Tsai <alec_tsai@fiwin.com.tw>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * This I2C client driver refers to pcf50606.c.
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/i2c.h>
++#include <linux/types.h>
++#include <linux/input.h>
++
++#include "tsl256x.h"
++
++static unsigned short normal_i2c[] = { 0x39, I2C_CLIENT_END };
++/* Magic definition of all other variables and things */
++I2C_CLIENT_INSMOD;
++
++struct tsl256x_data {
++ struct i2c_client client;
++ struct mutex lock;
++ struct input_dev *input_dev;
++};
++
++static struct i2c_driver tsl256x_driver;
++
++/******************************************************************************
++ * Low-Level routines
++ *****************************************************************************/
++static inline int __reg_write(struct tsl256x_data *tsl, u_int8_t reg,
++ u_int8_t val)
++{
++ return i2c_smbus_write_byte_data(&tsl->client, reg, val);
++}
++
++static int reg_write(struct tsl256x_data *tsl, u_int8_t reg, u_int8_t val)
++{
++ int ret;
++
++ mutex_lock(&tsl->lock);
++ ret = __reg_write(tsl, reg, val);
++ mutex_unlock(&tsl->lock);
++
++ return ret;
++}
++
++static inline int32_t __reg_read(struct tsl256x_data *tsl, u_int8_t reg)
++{
++ int32_t ret;
++
++ ret = i2c_smbus_read_byte_data(&tsl->client, reg);
++
++ return ret;
++}
++
++static u_int8_t reg_read(struct tsl256x_data *tsl, u_int8_t reg)
++{
++ int32_t ret;
++
++ mutex_lock(&tsl->lock);
++ ret = __reg_read(tsl, reg);
++ mutex_unlock(&tsl->lock);
++
++ return ret & 0xff;
++}
++
++u_int32_t calculate_lux(u_int32_t iGain, u_int32_t iType, u_int32_t ch0,
++ u_int32_t ch1)
++{
++ u_int32_t channel0 = ch0 * 636 / 10;
++ u_int32_t channel1 = ch1 * 636 / 10;
++ u_int32_t lux_value = 0;
++ u_int32_t ratio = (channel1 * (2^RATIO_SCALE)) / channel0;
++ u_int32_t b = 0, m = 0;
++
++ if (0 == ch0)
++ return 0;
++ else {
++ if (ratio > (13 * (2^RATIO_SCALE) / 10))
++ return 0;
++ }
++
++ switch (iType) {
++ case 0: // T package
++ if ((ratio >= 0) && (ratio <= K1T)) {
++ b = B1T;
++ m = M1T;
++ } else if (ratio <= K2T) {
++ b = B2T;
++ m = M2T;
++ } else if (ratio <= K3T) {
++ b = B3T;
++ m = M3T;
++ } else if (ratio <= K4T) {
++ b = B4T;
++ m = M4T;
++ } else if (ratio <= K5T) {
++ b = B5T;
++ m = M5T;
++ } else if (ratio <= K6T) {
++ b = B6T;
++ m = M6T;
++ } else if (ratio <= K7T) {
++ b = B7T;
++ m = M7T;
++ } else if (ratio > K8T) {
++ b = B8T;
++ m = M8T;
++ }
++ break;
++ case 1:// CS package
++ if ((ratio >= 0) && (ratio <= K1C)) {
++ b = B1C;
++ m = M1C;
++ } else if (ratio <= K2C) {
++ b = B2C;
++ m = M2C;
++ } else if (ratio <= K3C) {
++ b = B3C;
++ m = M3C;
++ } else if (ratio <= K4C) {
++ b = B4C;
++ m = M4C;
++ } else if (ratio <= K5C) {
++ b = B5C;
++ m = M5C;
++ } else if (ratio <= K6C) {
++ b = B6C;
++ m = M6C;
++ } else if (ratio <= K7C) {
++ b = B7C;
++ m = M7C;
++ } else if (ratio > K8C) {
++ b = B8C;
++ m = M8C;
++ }
++ break;
++ default:
++ return 0;
++ break;
++ }
++
++ lux_value = ((channel0 * b) - (channel1 * m)) / 16384;
++ return(lux_value);
++}
++
++static ssize_t tsl256x_show_light_lux(struct device *dev,
++ struct device_attribute *attr, char *buf)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct tsl256x_data *tsl = i2c_get_clientdata(client);
++ u_int8_t low_byte_of_ch0 = 0, high_byte_of_ch0 = 0;
++ u_int8_t low_byte_of_ch1 = 0, high_byte_of_ch1 = 0;
++ u_int32_t adc_value_ch0, adc_value_ch1, adc_value;
++
++ low_byte_of_ch0 = reg_read(tsl, TSL256X_REG_DATA0LOW);
++ high_byte_of_ch0 = reg_read(tsl, TSL256X_REG_DATA0HIGH);
++ low_byte_of_ch1 = reg_read(tsl, TSL256X_REG_DATA1LOW);
++ high_byte_of_ch1 = reg_read(tsl, TSL256X_REG_DATA1HIGH);
++
++ adc_value_ch0 = (high_byte_of_ch0 * 256 + low_byte_of_ch0) * 16;
++ adc_value_ch1 = (high_byte_of_ch1 * 256 + low_byte_of_ch1) * 16;
++
++ adc_value = calculate_lux(0, 0, adc_value_ch0, adc_value_ch1);
++ return sprintf(buf, "%d\n", adc_value);
++}
++
++static DEVICE_ATTR(light_lux, S_IRUGO, tsl256x_show_light_lux, NULL);
++
++static int tsl256x_detect(struct i2c_adapter *adapter, int address, int kind)
++{
++ struct i2c_client *new_client = NULL;
++ struct tsl256x_data *tsl256x = NULL;
++ u_int8_t id = 0;
++ int res = 0;
++
++ if (!(tsl256x = kzalloc(sizeof(*tsl256x), GFP_KERNEL)))
++ return -ENOMEM;
++
++ mutex_init(&tsl256x->lock);
++ new_client = &tsl256x->client;
++ i2c_set_clientdata(new_client, tsl256x);
++ new_client->addr = address;
++ new_client->adapter = adapter;
++ new_client->driver = &tsl256x_driver;
++ new_client->flags = 0;
++ strlcpy(new_client->name, "tsl256x", I2C_NAME_SIZE);
++
++ /* now we try to detect the chip */
++ /* register with i2c core */
++ res = i2c_attach_client(new_client);
++ if (res) {
++ printk(KERN_DEBUG "[%s]Error: during i2c_attach_client()\n",
++ new_client->name);
++ goto exit_free;
++ } else {
++ printk(KERN_INFO "TSL256X is attached to I2C bus.\n");
++ }
++
++ /* Configure TSL256X. */
++ {
++ /* Power up TSL256X. */
++ reg_write(tsl256x, TSL256X_REG_CONTROL, 0x03);
++
++ /* Check TSL256X ID. */
++ id = reg_read(tsl256x, TSL256X_REG_ID);
++ if (TSL2561_ID == (id & 0xF0)) {
++ /* Configuring the Timing Register.
++ High Gain (16x), integration time of 101ms. */
++ reg_write(tsl256x, TSL256X_REG_TIMING, 0x11);
++ } else {
++ goto exit_free;
++ }
++ }
++
++ res = device_create_file(&new_client->dev, &dev_attr_light_lux);
++ if (res)
++ goto exit_detach;
++
++ return 0;
++
++exit_free:
++ kfree(tsl256x);
++ return res;
++exit_detach:
++ i2c_detach_client(new_client);
++ return res;
++}
++
++static int tsl256x_attach_adapter(struct i2c_adapter *adapter)
++{
++ return i2c_probe(adapter, &addr_data, &tsl256x_detect);
++}
++
++static int tsl256x_detach_client(struct i2c_client *client)
++{
++ struct tsl256x_data *tsl256x = i2c_get_clientdata(client);
++
++ printk(KERN_INFO "Detach TSL256X from I2C bus.\n");
++
++ /* Power down TSL256X. */
++ reg_write(tsl256x, TSL256X_REG_CONTROL, 0x00);
++
++ device_remove_file(&client->dev, &dev_attr_light_lux);
++ kfree(tsl256x);
++
++ return 0;
++}
++
++#ifdef CONFIG_PM
++static int tsl256x_suspend(struct device *dev, pm_message_t state)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct tsl256x_data *tsl256x = i2c_get_clientdata(client);
++
++ /* Power down TSL256X. */
++ reg_write(tsl256x, TSL256X_REG_CONTROL, 0x00);
++
++ return 0;
++}
++
++static int tsl256x_resume(struct device *dev)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ struct tsl256x_data *tsl256x = i2c_get_clientdata(client);
++
++ /* Power up TSL256X. */
++ reg_write(tsl256x, TSL256X_REG_CONTROL, 0x03);
++
++ return 0;
++}
++#endif
++
++static struct i2c_driver tsl256x_driver = {
++ .driver = {
++ .name = "tsl256x",
++ .owner = THIS_MODULE,
++#ifdef CONFIG_PM
++ .suspend = tsl256x_suspend,
++ .resume = tsl256x_resume,
++#endif
++ },
++ .id = I2C_DRIVERID_TSL256X,
++ .attach_adapter = tsl256x_attach_adapter,
++ .detach_client = tsl256x_detach_client,
++};
++
++static int __init tsl256x_init(void)
++{
++ return i2c_add_driver(&tsl256x_driver);
++}
++
++static void __exit tsl256x_exit(void)
++{
++ i2c_del_driver(&tsl256x_driver);
++}
++
++MODULE_AUTHOR("Alec Tsai <alec_tsai@fiwin.com.tw>");
++MODULE_LICENSE("GPL");
++
++module_init(tsl256x_init);
++module_exit(tsl256x_exit);
++
+Index: linux-2.6.24.7/drivers/i2c/chips/tsl256x.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/i2c/chips/tsl256x.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,154 @@
++/*
++ * tsl256x.h -- TSL256x Light Sensor driver
++ *
++ * Copyright 2007 by Fiwin.
++ * Author: Alec Tsai <alec_tsai@fiwin.com.tw>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * The contents of header file is copied from TSL256x Datasheet.
++ */
++
++#ifndef _TSL256X_H
++#define _TSL256X_H
++
++#define TSL2560_ID 0x00
++#define TSL2561_ID 0x10
++
++#define LUX_SCALE 14 /* scale by 2^14 */
++#define RATIO_SCALE 9 /*scale ratio by 2^9 */
++
++/******************************************************************************
++ * Integration time scaling factors
++ *****************************************************************************/
++#define CH_SCALE 10 /* scale channel values by 2^10 */
++#define CHSCALE_TINT0 0x7517 /* 322/11 * 2^CH_SCALE */
++#define CHSCALE_TINT1 0x0fe7 /* 322/81 * 2^CH_SCALE */
++
++/******************************************************************************
++ * T Package coefficients
++ *****************************************************************************/
++/*
++ * For Ch1/Ch0=0.00 to 0.50
++ * Lux/Ch0=0.0304.0.062*((Ch1/Ch0)^1.4)
++ * piecewise approximation
++ * For Ch1/Ch0=0.00 to 0.125:
++ * Lux/Ch0=0.0304.0.0272*(Ch1/Ch0)
++ *
++ * For Ch1/Ch0=0.125 to 0.250:
++ * Lux/Ch0=0.0325.0.0440*(Ch1/Ch0)
++ *
++ * For Ch1/Ch0=0.250 to 0.375:
++ * Lux/Ch0=0.0351.0.0544*(Ch1/Ch0)
++ *
++ * For Ch1/Ch0=0.375 to 0.50:
++ * Lux/Ch0=0.0381.0.0624*(Ch1/Ch0)
++ *
++ * For Ch1/Ch0=0.50 to 0.61:
++ * Lux/Ch0=0.0224.0.031*(Ch1/Ch0)
++ *
++ * For Ch1/Ch0=0.61 to 0.80:
++ * Lux/Ch0=0.0128.0.0153*(Ch1/Ch0)
++ *
++ * For Ch1/Ch0=0.80 to 1.30:
++ * Lux/Ch0=0.00146.0.00112*(Ch1/Ch0)
++ *
++ * For Ch1/Ch0>1.3:
++ * Lux/Ch0=0
++ */
++#define K1T 0x0040 /* 0.125 * 2^RATIO_SCALE */
++#define B1T 0x01f2 /* 0.0304 * 2^LUX_SCALE */
++#define M1T 0x01be /* 0.0272 * 2^LUX_SCALE */
++#define K2T 0x0080 /* 0.250 * 2^RATIO_SCALE */
++#define B2T 0x0214 /* 0.0325 * 2^LUX_SCALE */
++#define M2T 0x02d1 /* 0.0440 * 2^LUX_SCALE */
++#define K3T 0x00c0 /* 0.375 * 2^RATIO_SCALE */
++#define B3T 0x023f /* 0.0351 * 2^LUX_SCALE */
++#define M3T 0x037b /* 0.0544 * 2^LUX_SCALE */
++#define K4T 0x0100 /* 0.50 * 2^RATIO_SCALE */
++#define B4T 0x0270 /* 0.0381 * 2^LUX_SCALE */
++#define M4T 0x03fe /* 0.0624 * 2^LUX_SCALE */
++#define K5T 0x0138 /* 0.61 * 2^RATIO_SCALE */
++#define B5T 0x016f /* 0.0224 * 2^LUX_SCALE */
++#define M5T 0x01fc /* 0.0310 * 2^LUX_SCALE */
++#define K6T 0x019a /* 0.80 * 2^RATIO_SCALE */
++#define B6T 0x00d2 /* 0.0128 * 2^LUX_SCALE */
++#define M6T 0x00fb /* 0.0153 * 2^LUX_SCALE */
++#define K7T 0x029a /* 1.3 * 2^RATIO_SCALE */
++#define B7T 0x0018 /* 0.00146 * 2^LUX_SCALE */
++#define M7T 0x0012 /* 0.00112 * 2^LUX_SCALE */
++#define K8T 0x029a /* 1.3 * 2^RATIO_SCALE */
++#define B8T 0x0000 /* 0.000 * 2^LUX_SCALE */
++#define M8T 0x0000 /* 0.000 * 2^LUX_SCALE */
++
++/******************************************************************************
++ * CS package coefficients
++ *****************************************************************************/
++/*
++ * For 0 <= Ch1/Ch0 <= 0.52
++ * Lux/Ch0 = 0.0315.0.0593*((Ch1/Ch0)^1.4)
++ * piecewise approximation
++ * For 0 <= Ch1/Ch0 <= 0.13
++ * Lux/Ch0 = 0.0315.0.0262*(Ch1/Ch0)
++ * For 0.13 <= Ch1/Ch0 <= 0.26
++ * Lux/Ch0 = 0.0337.0.0430*(Ch1/Ch0)
++ * For 0.26 <= Ch1/Ch0 <= 0.39
++ * Lux/Ch0 = 0.0363.0.0529*(Ch1/Ch0)
++ * For 0.39 <= Ch1/Ch0 <= 0.52
++ * Lux/Ch0 = 0.0392.0.0605*(Ch1/Ch0)
++ * For 0.52 < Ch1/Ch0 <= 0.65
++ * Lux/Ch0 = 0.0229.0.0291*(Ch1/Ch0)
++ * For 0.65 < Ch1/Ch0 <= 0.80
++ * Lux/Ch0 = 0.00157.0.00180*(Ch1/Ch0)
++ * For 0.80 < Ch1/Ch0 <= 1.30
++ * Lux/Ch0 = 0.00338.0.00260*(Ch1/Ch0)
++ * For Ch1/Ch0 > 1.30
++ * Lux = 0
++ */
++#define K1C 0x0043 /* 0.130 * 2^RATIO_SCALE */
++#define B1C 0x0204 /* 0.0315 * 2^LUX_SCALE */
++#define M1C 0x01ad /* 0.0262 * 2^LUX_SCALE */
++#define K2C 0x0085 /* 0.260 * 2^RATIO_SCALE */
++#define B2C 0x0228 /* 0.0337 * 2^LUX_SCALE */
++#define M2C 0x02c1 /* 0.0430 * 2^LUX_SCALE */
++#define K3C 0x00c8 /* 0.390 * 2^RATIO_SCALE */
++#define B3C 0x0253 /* 0.0363 * 2^LUX_SCALE */
++#define M3C 0x0363 /* 0.0529 * 2^LUX_SCALE */
++#define K4C 0x010a /* 0.520 * 2^RATIO_SCALE */
++#define B4C 0x0282 /* 0.0392 * 2^LUX_SCALE */
++#define M4C 0x03df /* 0.0605 * 2^LUX_SCALE */
++#define K5C 0x014d /* 0.65 * 2^RATIO_SCALE */
++#define B5C 0x0177 /* 0.0229 * 2^LUX_SCALE */
++#define M5C 0x01dd /* 0.0291 * 2^LUX_SCALE */
++#define K6C 0x019a /* 0.80 * 2^RATIO_SCALE */
++#define B6C 0x0101 /* 0.0157 * 2^LUX_SCALE */
++#define M6C 0x0127 /* 0.0180 * 2^LUX_SCALE */
++#define K7C 0x029a /* 1.3 * 2^RATIO_SCALE */
++#define B7C 0x0037 /* 0.00338 * 2^LUX_SCALE */
++#define M7C 0x002b /* 0.00260 * 2^LUX_SCALE */
++#define K8C 0x029a /* 1.3 * 2^RATIO_SCALE */
++#define B8C 0x0000 /* 0.000 * 2^LUX_SCALE */
++#define M8C 0x0000 /* 0.000 * 2^LUX_SCALE */
++
++/* TSL256x registers definition . */
++enum tsl256x_regs {
++ TSL256X_REG_CONTROL = 0x80, /* Control of basic functions */
++ TSL256X_REG_TIMING = 0x81, /* Integration time/gain control */
++ TSL256X_REG_THRESHLOWLOW = 0x82, /* Low byte of low interrupt threshold */
++ TSL256X_REG_THRESHLOWHIGH = 0x83, /* High byte of low interrupt threshold */
++ TSL256X_REG_THRESHHIGHLOW = 0x84, /* Low byte of high interrupt threshold */
++ TSL256X_REG_THRESHHIGHHIGH = 0x85, /* High byte of high interrupt threshold */
++ TSL256X_REG_INTERRUPT = 0x86, /* Interrupt control */
++ TSL256X_REG_CRC = 0x88, /* Factory test - not a user register */
++ TSL256X_REG_ID = 0x8A, /* Part number/ Rev ID */
++ TSL256X_REG_DATA0LOW = 0x8C, /* Low byte of ADC channel 0 */
++ TSL256X_REG_DATA0HIGH = 0x8D, /* High byte of ADC channel 0 */
++ TSL256X_REG_DATA1LOW = 0x8E, /* Low byte of ADC channel 1 */
++ TSL256X_REG_DATA1HIGH = 0x8F, /* High byte of ADC channel 1 */
++ __NUM_TSL256X_REGS
++};
++
++#endif /* _TSL256X_H */
++
+Index: linux-2.6.24.7/drivers/i2c/i2c-core.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/i2c/i2c-core.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/i2c/i2c-core.c 2008-12-11 22:46:49.000000000 +0100
+@@ -1,4 +1,3 @@
+-/* i2c-core.c - a device driver for the iic-bus interface */
+ /* ------------------------------------------------------------------------- */
+ /* Copyright (C) 1995-99 Simon G. Vogl
+
+@@ -136,10 +135,16 @@ static int i2c_device_suspend(struct dev
+
+ if (!dev->driver)
+ return 0;
++#if 0
+ driver = to_i2c_driver(dev->driver);
+ if (!driver->suspend)
+ return 0;
+ return driver->suspend(to_i2c_client(dev), mesg);
++#else
++ if (!dev->driver->suspend)
++ return 0;
++ return dev->driver->suspend(dev, mesg);
++#endif
+ }
+
+ static int i2c_device_resume(struct device * dev)
+@@ -148,10 +153,16 @@ static int i2c_device_resume(struct devi
+
+ if (!dev->driver)
+ return 0;
++#if 0
+ driver = to_i2c_driver(dev->driver);
+ if (!driver->resume)
+ return 0;
+ return driver->resume(to_i2c_client(dev));
++#else
++ if (!dev->driver->resume)
++ return 0;
++ return dev->driver->resume(dev);
++#endif
+ }
+
+ static void i2c_client_release(struct device *dev)
+@@ -941,11 +952,11 @@ static int i2c_probe_address(struct i2c_
+ int err;
+
+ /* Make sure the address is valid */
+- if (addr < 0x03 || addr > 0x77) {
++ /*if (addr < 0x03 || addr > 0x77) {
+ dev_warn(&adapter->dev, "Invalid probe address 0x%02x\n",
+ addr);
+ return -EINVAL;
+- }
++ }*/
+
+ /* Skip if already in use */
+ if (i2c_check_addr(adapter, addr))
+Index: linux-2.6.24.7/drivers/input/evdev.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/input/evdev.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/input/evdev.c 2008-12-11 22:46:49.000000000 +0100
+@@ -28,7 +28,7 @@ struct evdev {
+ char name[16];
+ struct input_handle handle;
+ wait_queue_head_t wait;
+- struct evdev_client *grab;
++ int *grab;
+ struct list_head client_list;
+ spinlock_t client_lock; /* protects client_list */
+ struct mutex mutex;
+@@ -39,6 +39,7 @@ struct evdev_client {
+ struct input_event buffer[EVDEV_BUFFER_SIZE];
+ int head;
+ int tail;
++ int grab;
+ spinlock_t buffer_lock; /* protects access to buffer, head and tail */
+ struct fasync_struct *fasync;
+ struct evdev *evdev;
+@@ -79,12 +80,8 @@ static void evdev_event(struct input_han
+
+ rcu_read_lock();
+
+- client = rcu_dereference(evdev->grab);
+- if (client)
++ list_for_each_entry_rcu(client, &evdev->client_list, node)
+ evdev_pass_event(client, &event);
+- else
+- list_for_each_entry_rcu(client, &evdev->client_list, node)
+- evdev_pass_event(client, &event);
+
+ rcu_read_unlock();
+
+@@ -135,14 +132,15 @@ static int evdev_grab(struct evdev *evde
+ {
+ int error;
+
+- if (evdev->grab)
++ if (client->grab)
+ return -EBUSY;
+
+- error = input_grab_device(&evdev->handle);
+- if (error)
+- return error;
+-
+- rcu_assign_pointer(evdev->grab, client);
++ if (!evdev->grab++) {
++ error = input_grab_device(&evdev->handle);
++ if (error)
++ return error;
++ }
++ client->grab = 1;
+ synchronize_rcu();
+
+ return 0;
+@@ -150,12 +148,12 @@ static int evdev_grab(struct evdev *evde
+
+ static int evdev_ungrab(struct evdev *evdev, struct evdev_client *client)
+ {
+- if (evdev->grab != client)
++ if (!client->grab)
+ return -EINVAL;
+
+- rcu_assign_pointer(evdev->grab, NULL);
+- synchronize_rcu();
+- input_release_device(&evdev->handle);
++ if (!--evdev->grab && evdev->exist)
++ input_release_device(&evdev->handle);
++ client->grab = 0;
+
+ return 0;
+ }
+@@ -230,7 +228,7 @@ static int evdev_release(struct inode *i
+ struct evdev *evdev = client->evdev;
+
+ mutex_lock(&evdev->mutex);
+- if (evdev->grab == client)
++ if (client->grab)
+ evdev_ungrab(evdev, client);
+ mutex_unlock(&evdev->mutex);
+
+Index: linux-2.6.24.7/drivers/input/keyboard/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/input/keyboard/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/input/keyboard/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -293,4 +293,32 @@ config KEYBOARD_BFIN
+ To compile this driver as a module, choose M here: the
+ module will be called bf54x-keys.
+
++config KEYBOARD_NEO1973
++ tristate "FIC Neo1973 buttons"
++ depends on MACH_NEO1973
++ default y
++ help
++ Say Y here to enable the buttons on the FIC Neo1973
++ GSM phone.
++
++ To compile this driver as a module, choose M here: the
++ module will be called neo1973kbd.
++
++config KEYBOARD_M800
++ tristate "E-TEN glofiish M800 buttons"
++ depends on MACH_M800
++ default y
++ help
++ Say Y here to enable the buttons on the E-TEN glofiish
++ M800 GSM phone.
++
++ To compile this driver as a module, choose M here: the
++ module will be called m800kbd.
++
++config KEYBOARD_QT2410
++ tristate "QT2410 buttons"
++ depends on MACH_QT2410
++ default y
++
++
+ endif
+Index: linux-2.6.24.7/drivers/input/keyboard/m800kbd.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/input/keyboard/m800kbd.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,330 @@
++/*
++ * Keyboard driver for E-TEN M800 GSM phone
++ *
++ * (C) 2008 by Harald Welte <laforge@gnumonks.org>
++ * All rights reserved.
++ *
++ * inspired by corkgbd.c by Richard Purdie
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <linux/delay.h>
++#include <linux/platform_device.h>
++#include <linux/init.h>
++#include <linux/input.h>
++#include <linux/interrupt.h>
++#include <linux/jiffies.h>
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/workqueue.h>
++
++#include <asm/gpio.h>
++#include <asm/mach-types.h>
++
++struct m800kbd {
++ struct input_dev *input;
++ unsigned int suspended;
++ struct work_struct work;
++ int work_in_progress;
++ int hp_irq_count_in_work;
++ int hp_irq_count;
++ int jack_irq;
++};
++
++static irqreturn_t m800kbd_power_irq(int irq, void *dev_id)
++{
++ struct m800kbd *m800kbd_data = dev_id;
++ int key_pressed = !gpio_get_value(irq_to_gpio(irq));
++
++ input_report_key(m800kbd_data->input, KEY_POWER, key_pressed);
++ input_sync(m800kbd_data->input);
++
++ return IRQ_HANDLED;
++}
++
++static irqreturn_t m800kbd_cam_irq(int irq, void *dev_id)
++{
++ struct m800kbd *m800kbd_data = dev_id;
++
++ int key_pressed = !gpio_get_value(irq_to_gpio(irq));
++ input_report_key(m800kbd_data->input, KEY_CAMERA, key_pressed);
++ input_sync(m800kbd_data->input);
++
++ return IRQ_HANDLED;
++}
++
++static irqreturn_t m800kbd_rec_irq(int irq, void *dev_id)
++{
++ struct m800kbd *m800kbd_data = dev_id;
++
++ int key_pressed = !gpio_get_value(irq_to_gpio(irq));
++ input_report_key(m800kbd_data->input, KEY_RECORD, key_pressed);
++ input_sync(m800kbd_data->input);
++
++ return IRQ_HANDLED;
++}
++
++static irqreturn_t m800kbd_slide_irq(int irq, void *dev_id)
++{
++ struct m800kbd *m800kbd_data = dev_id;
++
++ int key_pressed = gpio_get_value(irq_to_gpio(irq));
++ input_report_key(m800kbd_data->input, SW_LID, key_pressed);
++ input_sync(m800kbd_data->input);
++
++ return IRQ_HANDLED;
++}
++
++#if 0
++static void m800kbd_debounce_jack(struct work_struct *work)
++{
++ struct m800kbd *kbd = container_of(work, struct m800kbd, work);
++ unsigned long flags;
++ int loop = 0;
++
++ do {
++ /*
++ * we wait out any multiple interrupt
++ * stuttering in 100ms lumps
++ */
++ do {
++ kbd->hp_irq_count_in_work = kbd->hp_irq_count;
++ msleep(100);
++ } while (kbd->hp_irq_count != kbd->hp_irq_count_in_work);
++ /*
++ * no new interrupts on jack for 100ms...
++ * ok we will report it
++ */
++ input_report_switch(kbd->input, SW_HEADPHONE_INSERT,
++ gpio_get_value(irq_to_gpio(kbd->jack_irq)));
++ input_sync(kbd->input);
++ /*
++ * we go around the outer loop again if we detect that more
++ * interrupts came while we are servicing here. But we have
++ * to sequence it carefully with interrupts off
++ */
++ local_save_flags(flags);
++ /* no interrupts during this work means we can exit the work */
++ loop = !!(kbd->hp_irq_count != kbd->hp_irq_count_in_work);
++ if (!loop)
++ kbd->work_in_progress = 0;
++ local_irq_restore(flags);
++ /*
++ * interrupt that comes here will either queue a new work action
++ * since work_in_progress is cleared now, or be dealt with
++ * when we loop.
++ */
++ } while (loop);
++}
++
++
++static irqreturn_t m800kbd_headphone_irq(int irq, void *dev_id)
++{
++ struct m800kbd *m800kbd_data = dev_id;
++
++ /*
++ * this interrupt is prone to bouncing and userspace doesn't like
++ * to have to deal with that kind of thing. So we do not accept
++ * that a jack interrupt is equal to a jack event. Instead we fire
++ * some work on the first interrupt, and it hangs about in 100ms units
++ * until no more interrupts come. Then it accepts the state it finds
++ * for jack insert and reports it once
++ */
++
++ m800kbd_data->hp_irq_count++;
++ /*
++ * the first interrupt we see for a while, we fire the work item
++ * and record the interrupt count when we did that. If more interrupts
++ * come in the meanwhile, we can tell by the difference in that
++ * stored count and hp_irq_count which increments every interrupt
++ */
++ if (!m800kbd_data->work_in_progress) {
++ m800kbd_data->jack_irq = irq;
++ m800kbd_data->hp_irq_count_in_work =
++ m800kbd_data->hp_irq_count;
++ if (!schedule_work(&m800kbd_data->work))
++ printk(KERN_ERR
++ "Unable to schedule headphone debounce\n");
++ else
++ m800kbd_data->work_in_progress = 1;
++ }
++
++ return IRQ_HANDLED;
++}
++#endif
++
++#ifdef CONFIG_PM
++static int m800kbd_suspend(struct platform_device *dev, pm_message_t state)
++{
++ struct m800kbd *m800kbd = platform_get_drvdata(dev);
++
++ m800kbd->suspended = 1;
++
++ return 0;
++}
++
++static int m800kbd_resume(struct platform_device *dev)
++{
++ struct m800kbd *m800kbd = platform_get_drvdata(dev);
++
++ m800kbd->suspended = 0;
++
++ return 0;
++}
++#else
++#define m800kbd_suspend NULL
++#define m800kbd_resume NULL
++#endif
++
++static int m800kbd_probe(struct platform_device *pdev)
++{
++ struct m800kbd *m800kbd;
++ struct input_dev *input_dev;
++ int rc, irq_power, irq_cam, irq_rec, irq_slide;
++
++ m800kbd = kzalloc(sizeof(struct m800kbd), GFP_KERNEL);
++ input_dev = input_allocate_device();
++ if (!m800kbd || !input_dev) {
++ kfree(m800kbd);
++ input_free_device(input_dev);
++ return -ENOMEM;
++ }
++
++ if (pdev->resource[0].flags != 0)
++ return -EINVAL;
++
++ irq_power = gpio_to_irq(pdev->resource[0].start);
++ if (irq_power < 0)
++ return -EINVAL;
++
++ irq_cam = gpio_to_irq(pdev->resource[1].start);
++ if (irq_cam < 0)
++ return -EINVAL;
++
++ irq_rec = gpio_to_irq(pdev->resource[2].start);
++ if (irq_rec < 0)
++ return -EINVAL;
++
++ irq_slide = gpio_to_irq(pdev->resource[3].start);
++ if (irq_slide < 0)
++ return -EINVAL;
++
++ platform_set_drvdata(pdev, m800kbd);
++
++ m800kbd->input = input_dev;
++
++ //INIT_WORK(&m800kbd->work, m800kbd_debounce_jack);
++
++ input_dev->name = "M800 Buttons";
++ input_dev->phys = "m800kbd/input0";
++ input_dev->id.bustype = BUS_HOST;
++ input_dev->id.vendor = 0x0001;
++ input_dev->id.product = 0x0001;
++ input_dev->id.version = 0x0100;
++ input_dev->cdev.dev = &pdev->dev;
++ input_dev->private = m800kbd;
++
++ input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_SW);
++ set_bit(SW_HEADPHONE_INSERT, input_dev->swbit);
++ set_bit(SW_LID, input_dev->swbit);
++ set_bit(KEY_POWER, input_dev->keybit);
++ set_bit(KEY_CAMERA, input_dev->keybit);
++ set_bit(KEY_RECORD, input_dev->keybit);
++
++ rc = input_register_device(m800kbd->input);
++ if (rc)
++ goto out_register;
++
++ if (request_irq(irq_power, m800kbd_power_irq, IRQF_DISABLED |
++ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
++ "M800 Power button", m800kbd)) {
++ dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_power);
++ goto out_aux;
++ }
++
++ enable_irq_wake(irq_power);
++
++ if (request_irq(irq_cam, m800kbd_cam_irq, IRQF_DISABLED |
++ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
++ "M800 Camera button", m800kbd)) {
++ dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_cam);
++ goto out_hold;
++ }
++
++ if (request_irq(irq_rec, m800kbd_rec_irq, IRQF_DISABLED |
++ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
++ "M800 Record button", m800kbd)) {
++ dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_rec);
++ goto out_hold;
++ }
++
++ if (request_irq(irq_slide, m800kbd_slide_irq, IRQF_DISABLED |
++ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
++ "M800 Slide", m800kbd)) {
++ dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_slide);
++ goto out_jack;
++ }
++ enable_irq_wake(irq_slide);
++
++ return 0;
++
++out_jack:
++ free_irq(irq_cam, m800kbd);
++out_hold:
++ free_irq(irq_power, m800kbd);
++out_aux:
++ input_unregister_device(m800kbd->input);
++out_register:
++ input_free_device(m800kbd->input);
++ platform_set_drvdata(pdev, NULL);
++ kfree(m800kbd);
++
++ return -ENODEV;
++}
++
++static int m800kbd_remove(struct platform_device *pdev)
++{
++ struct m800kbd *m800kbd = platform_get_drvdata(pdev);
++
++ free_irq(gpio_to_irq(pdev->resource[2].start), m800kbd);
++ free_irq(gpio_to_irq(pdev->resource[1].start), m800kbd);
++ free_irq(gpio_to_irq(pdev->resource[0].start), m800kbd);
++
++ input_unregister_device(m800kbd->input);
++ input_free_device(m800kbd->input);
++ platform_set_drvdata(pdev, NULL);
++ kfree(m800kbd);
++
++ return 0;
++}
++
++static struct platform_driver m800kbd_driver = {
++ .probe = m800kbd_probe,
++ .remove = m800kbd_remove,
++ .suspend = m800kbd_suspend,
++ .resume = m800kbd_resume,
++ .driver = {
++ .name = "m800-button",
++ },
++};
++
++static int __devinit m800kbd_init(void)
++{
++ return platform_driver_register(&m800kbd_driver);
++}
++
++static void __exit m800kbd_exit(void)
++{
++ platform_driver_unregister(&m800kbd_driver);
++}
++
++module_init(m800kbd_init);
++module_exit(m800kbd_exit);
++
++MODULE_AUTHOR("Harald Welte <laforge@gnumonks.org>");
++MODULE_DESCRIPTION("E-TEN glofiish M800 GPIO buttons input driver");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.24.7/drivers/input/keyboard/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/drivers/input/keyboard/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/input/keyboard/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -14,6 +14,9 @@ obj-$(CONFIG_KEYBOARD_LOCOMO) += locomo
+ obj-$(CONFIG_KEYBOARD_NEWTON) += newtonkbd.o
+ obj-$(CONFIG_KEYBOARD_STOWAWAY) += stowaway.o
+ obj-$(CONFIG_KEYBOARD_CORGI) += corgikbd.o
++obj-$(CONFIG_KEYBOARD_NEO1973) += neo1973kbd.o
++obj-$(CONFIG_KEYBOARD_M800) += m800kbd.o
++obj-$(CONFIG_KEYBOARD_QT2410) += qt2410kbd.o
+ obj-$(CONFIG_KEYBOARD_SPITZ) += spitzkbd.o
+ obj-$(CONFIG_KEYBOARD_HIL) += hil_kbd.o
+ obj-$(CONFIG_KEYBOARD_HIL_OLD) += hilkbd.o
+Index: linux-2.6.24.7/drivers/input/keyboard/neo1973kbd.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/input/keyboard/neo1973kbd.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,303 @@
++/*
++ * Keyboard driver for FIC Neo1973 GSM phone
++ *
++ * (C) 2006-2007 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * inspired by corkgbd.c by Richard Purdie
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <linux/delay.h>
++#include <linux/platform_device.h>
++#include <linux/init.h>
++#include <linux/input.h>
++#include <linux/interrupt.h>
++#include <linux/jiffies.h>
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/workqueue.h>
++
++#include <asm/gpio.h>
++#include <asm/mach-types.h>
++
++struct neo1973kbd {
++ struct input_dev *input;
++ unsigned int suspended;
++ struct work_struct work;
++ int work_in_progress;
++ int hp_irq_count_in_work;
++ int hp_irq_count;
++ int jack_irq;
++};
++
++static irqreturn_t neo1973kbd_aux_irq(int irq, void *dev_id)
++{
++ struct neo1973kbd *neo1973kbd_data = dev_id;
++ int key_pressed = !gpio_get_value(irq_to_gpio(irq));
++
++ /* GTA02 has inverted sense level compared to GTA01 */
++ if (machine_is_neo1973_gta02())
++ key_pressed = !key_pressed;
++ input_report_key(neo1973kbd_data->input, KEY_PHONE, key_pressed);
++ input_sync(neo1973kbd_data->input);
++
++ return IRQ_HANDLED;
++}
++
++static irqreturn_t neo1973kbd_hold_irq(int irq, void *dev_id)
++{
++ struct neo1973kbd *neo1973kbd_data = dev_id;
++
++ int key_pressed = gpio_get_value(irq_to_gpio(irq));
++ input_report_key(neo1973kbd_data->input, KEY_PAUSE, key_pressed);
++ input_sync(neo1973kbd_data->input);
++
++ return IRQ_HANDLED;
++}
++
++
++static void neo1973kbd_debounce_jack(struct work_struct *work)
++{
++ struct neo1973kbd *kbd = container_of(work, struct neo1973kbd, work);
++ unsigned long flags;
++ int loop = 0;
++
++ do {
++ /*
++ * we wait out any multiple interrupt
++ * stuttering in 100ms lumps
++ */
++ do {
++ kbd->hp_irq_count_in_work = kbd->hp_irq_count;
++ msleep(100);
++ } while (kbd->hp_irq_count != kbd->hp_irq_count_in_work);
++ /*
++ * no new interrupts on jack for 100ms...
++ * ok we will report it
++ */
++ input_report_switch(kbd->input, SW_HEADPHONE_INSERT,
++ gpio_get_value(irq_to_gpio(kbd->jack_irq)));
++ input_sync(kbd->input);
++ /*
++ * we go around the outer loop again if we detect that more
++ * interrupts came while we are servicing here. But we have
++ * to sequence it carefully with interrupts off
++ */
++ local_save_flags(flags);
++ /* no interrupts during this work means we can exit the work */
++ loop = !!(kbd->hp_irq_count != kbd->hp_irq_count_in_work);
++ if (!loop)
++ kbd->work_in_progress = 0;
++ local_irq_restore(flags);
++ /*
++ * interrupt that comes here will either queue a new work action
++ * since work_in_progress is cleared now, or be dealt with
++ * when we loop.
++ */
++ } while (loop);
++}
++
++
++static irqreturn_t neo1973kbd_headphone_irq(int irq, void *dev_id)
++{
++ struct neo1973kbd *neo1973kbd_data = dev_id;
++
++ /*
++ * this interrupt is prone to bouncing and userspace doesn't like
++ * to have to deal with that kind of thing. So we do not accept
++ * that a jack interrupt is equal to a jack event. Instead we fire
++ * some work on the first interrupt, and it hangs about in 100ms units
++ * until no more interrupts come. Then it accepts the state it finds
++ * for jack insert and reports it once
++ */
++
++ neo1973kbd_data->hp_irq_count++;
++ /*
++ * the first interrupt we see for a while, we fire the work item
++ * and record the interrupt count when we did that. If more interrupts
++ * come in the meanwhile, we can tell by the difference in that
++ * stored count and hp_irq_count which increments every interrupt
++ */
++ if (!neo1973kbd_data->work_in_progress) {
++ neo1973kbd_data->jack_irq = irq;
++ neo1973kbd_data->hp_irq_count_in_work =
++ neo1973kbd_data->hp_irq_count;
++ if (!schedule_work(&neo1973kbd_data->work))
++ printk(KERN_ERR
++ "Unable to schedule headphone debounce\n");
++ else
++ neo1973kbd_data->work_in_progress = 1;
++ }
++
++ return IRQ_HANDLED;
++}
++
++#ifdef CONFIG_PM
++static int neo1973kbd_suspend(struct platform_device *dev, pm_message_t state)
++{
++ struct neo1973kbd *neo1973kbd = platform_get_drvdata(dev);
++
++ neo1973kbd->suspended = 1;
++
++ return 0;
++}
++
++static int neo1973kbd_resume(struct platform_device *dev)
++{
++ struct neo1973kbd *neo1973kbd = platform_get_drvdata(dev);
++
++ neo1973kbd->suspended = 0;
++
++ return 0;
++}
++#else
++#define neo1973kbd_suspend NULL
++#define neo1973kbd_resume NULL
++#endif
++
++static int neo1973kbd_probe(struct platform_device *pdev)
++{
++ struct neo1973kbd *neo1973kbd;
++ struct input_dev *input_dev;
++ int rc, irq_aux, irq_hold, irq_jack;
++
++ neo1973kbd = kzalloc(sizeof(struct neo1973kbd), GFP_KERNEL);
++ input_dev = input_allocate_device();
++ if (!neo1973kbd || !input_dev) {
++ kfree(neo1973kbd);
++ input_free_device(input_dev);
++ return -ENOMEM;
++ }
++
++ if (pdev->resource[0].flags != 0)
++ return -EINVAL;
++
++ irq_aux = gpio_to_irq(pdev->resource[0].start);
++ if (irq_aux < 0)
++ return -EINVAL;
++
++ irq_hold = gpio_to_irq(pdev->resource[1].start);
++ if (irq_hold < 0)
++ return -EINVAL;
++
++ irq_jack = gpio_to_irq(pdev->resource[2].start);
++ if (irq_jack < 0)
++ return -EINVAL;
++
++ platform_set_drvdata(pdev, neo1973kbd);
++
++ neo1973kbd->input = input_dev;
++
++ INIT_WORK(&neo1973kbd->work, neo1973kbd_debounce_jack);
++
++ input_dev->name = "Neo1973 Buttons";
++ input_dev->phys = "neo1973kbd/input0";
++ input_dev->id.bustype = BUS_HOST;
++ input_dev->id.vendor = 0x0001;
++ input_dev->id.product = 0x0001;
++ input_dev->id.version = 0x0100;
++ input_dev->cdev.dev = &pdev->dev;
++ input_dev->private = neo1973kbd;
++
++ input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_SW);
++ set_bit(SW_HEADPHONE_INSERT, input_dev->swbit);
++ set_bit(KEY_PHONE, input_dev->keybit);
++ set_bit(KEY_PAUSE, input_dev->keybit);
++
++ rc = input_register_device(neo1973kbd->input);
++ if (rc)
++ goto out_register;
++
++ if (request_irq(irq_aux, neo1973kbd_aux_irq, IRQF_DISABLED |
++ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
++ "Neo1973 AUX button", neo1973kbd)) {
++ dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_aux);
++ goto out_aux;
++ }
++
++ /*
++ * GTA01 revisions before Bv4 can't be resumed by the PMU, so we use
++ * resume by AUX.
++ */
++ if (machine_is_neo1973_gta01())
++ enable_irq_wake(irq_aux);
++
++ if (request_irq(irq_hold, neo1973kbd_hold_irq, IRQF_DISABLED |
++ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
++ "Neo1973 HOLD button", neo1973kbd)) {
++ dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_hold);
++ goto out_hold;
++ }
++
++ if (request_irq(irq_jack, neo1973kbd_headphone_irq, IRQF_DISABLED |
++ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
++ "Neo1973 Headphone Jack", neo1973kbd)) {
++ dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_jack);
++ goto out_jack;
++ }
++ enable_irq_wake(irq_jack);
++
++ return 0;
++
++out_jack:
++ free_irq(irq_hold, neo1973kbd);
++out_hold:
++ free_irq(irq_aux, neo1973kbd);
++out_aux:
++ input_unregister_device(neo1973kbd->input);
++out_register:
++ input_free_device(neo1973kbd->input);
++ platform_set_drvdata(pdev, NULL);
++ kfree(neo1973kbd);
++
++ return -ENODEV;
++}
++
++static int neo1973kbd_remove(struct platform_device *pdev)
++{
++ struct neo1973kbd *neo1973kbd = platform_get_drvdata(pdev);
++
++ free_irq(gpio_to_irq(pdev->resource[2].start), neo1973kbd);
++ free_irq(gpio_to_irq(pdev->resource[1].start), neo1973kbd);
++ free_irq(gpio_to_irq(pdev->resource[0].start), neo1973kbd);
++
++ input_unregister_device(neo1973kbd->input);
++ input_free_device(neo1973kbd->input);
++ platform_set_drvdata(pdev, NULL);
++ kfree(neo1973kbd);
++
++ return 0;
++}
++
++static struct platform_driver neo1973kbd_driver = {
++ .probe = neo1973kbd_probe,
++ .remove = neo1973kbd_remove,
++ .suspend = neo1973kbd_suspend,
++ .resume = neo1973kbd_resume,
++ .driver = {
++ .name = "neo1973-button",
++ },
++};
++
++static int __devinit neo1973kbd_init(void)
++{
++ return platform_driver_register(&neo1973kbd_driver);
++}
++
++static void __exit neo1973kbd_exit(void)
++{
++ platform_driver_unregister(&neo1973kbd_driver);
++}
++
++module_init(neo1973kbd_init);
++module_exit(neo1973kbd_exit);
++
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
++MODULE_DESCRIPTION("FIC Neo1973 buttons input driver");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.24.7/drivers/input/keyboard/qt2410kbd.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/input/keyboard/qt2410kbd.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,233 @@
++/*
++ * Keyboard driver for Armzone QT2410
++ *
++ * (C) 2006 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <linux/delay.h>
++#include <linux/platform_device.h>
++#include <linux/init.h>
++#include <linux/input.h>
++#include <linux/interrupt.h>
++#include <linux/jiffies.h>
++#include <linux/module.h>
++#include <linux/slab.h>
++
++#include <asm/hardware.h>
++#include <asm/arch/gta01.h>
++
++struct gta01kbd {
++ struct input_dev *input;
++ unsigned int suspended;
++ unsigned long suspend_jiffies;
++};
++
++static irqreturn_t gta01kbd_interrupt(int irq, void *dev_id)
++{
++ struct gta01kbd *gta01kbd_data = dev_id;
++
++ /* FIXME: use GPIO from platform_dev resources */
++ if (s3c2410_gpio_getpin(S3C2410_GPF0))
++ input_report_key(gta01kbd_data->input, KEY_PHONE, 1);
++ else
++ input_report_key(gta01kbd_data->input, KEY_PHONE, 0);
++
++ input_sync(gta01kbd_data->input);
++
++ return IRQ_HANDLED;
++}
++
++
++#ifdef CONFIG_PM
++static int gta01kbd_suspend(struct platform_device *dev, pm_message_t state)
++{
++ struct gta01kbd *gta01kbd = platform_get_drvdata(dev);
++
++ gta01kbd->suspended = 1;
++
++ return 0;
++}
++
++static int gta01kbd_resume(struct platform_device *dev)
++{
++ struct gta01kbd *gta01kbd = platform_get_drvdata(dev);
++
++ gta01kbd->suspended = 0;
++
++ return 0;
++}
++#else
++#define gta01kbd_suspend NULL
++#define gta01kbd_resume NULL
++#endif
++
++static int gta01kbd_probe(struct platform_device *pdev)
++{
++ struct gta01kbd *gta01kbd;
++ struct input_dev *input_dev;
++ int irq_911;
++ int rc = 0;
++
++ gta01kbd = kzalloc(sizeof(struct gta01kbd), GFP_KERNEL);
++ if (!gta01kbd) {
++ rc = -ENOMEM;
++ goto bail;
++ }
++ input_dev = input_allocate_device();
++ if (!gta01kbd || !input_dev) {
++ rc = -ENOMEM;
++ goto bail_free;
++ }
++
++ if (pdev->resource[0].flags != 0) {\
++ rc = -EINVAL;
++ goto bail_free_dev;
++ }
++
++ irq_911 = s3c2410_gpio_getirq(pdev->resource[0].start);
++ if (irq_911 < 0) {
++ rc = -EINVAL;
++ goto bail_free_dev;
++ }
++
++ platform_set_drvdata(pdev, gta01kbd);
++
++ gta01kbd->input = input_dev;
++
++#if 0
++ spin_lock_init(>a01kbd->lock);
++ /* Init Keyboard rescan timer */
++ init_timer(&corgikbd->timer);
++ corgikbd->timer.function = corgikbd_timer_callback;
++ corgikbd->timer.data = (unsigned long) corgikbd;
++
++ /* Init Hinge Timer */
++ init_timer(&corgikbd->htimer);
++ corgikbd->htimer.function = corgikbd_hinge_timer;
++ corgikbd->htimer.data = (unsigned long) corgikbd;
++
++ corgikbd->suspend_jiffies=jiffies;
++
++ memcpy(corgikbd->keycode, corgikbd_keycode, sizeof(corgikbd->keycode));
++#endif
++
++ input_dev->name = "QT2410 Buttons";
++ input_dev->phys = "qt2410kbd/input0";
++ input_dev->id.bustype = BUS_HOST;
++ input_dev->id.vendor = 0x0001;
++ input_dev->id.product = 0x0001;
++ input_dev->id.version = 0x0100;
++ input_dev->cdev.dev = &pdev->dev;
++ input_dev->private = gta01kbd;
++
++ input_dev->evbit[0] = BIT(EV_KEY);
++#if 0
++ input_dev->keycode = gta01kbd->keycode;
++ input_dev->keycodesize = sizeof(unsigned char);
++ input_dev->keycodemax = ARRAY_SIZE(corgikbd_keycode);
++
++ for (i = 0; i < ARRAY_SIZE(corgikbd_keycode); i++)
++ set_bit(corgikbd->keycode[i], input_dev->keybit);
++ clear_bit(0, input_dev->keybit);
++ set_bit(SW_LID, input_dev->swbit);
++ set_bit(SW_TABLET_MODE, input_dev->swbit);
++ set_bit(SW_HEADPHONE_INSERT, input_dev->swbit);
++#endif
++
++ rc = input_register_device(gta01kbd->input);
++ if (rc)
++ goto bail_free_dev;
++
++ s3c2410_gpio_cfgpin(S3C2410_GPF0, S3C2410_GPF0_EINT0);
++ if (request_irq(irq_911, gta01kbd_interrupt,
++ IRQF_DISABLED | IRQF_TRIGGER_RISING |
++ IRQF_TRIGGER_FALLING, "qt2410kbd_eint0", gta01kbd))
++ printk(KERN_WARNING "gta01kbd: Can't get IRQ\n");
++ enable_irq_wake(irq_911);
++
++ /* FIXME: headphone insert */
++
++#if 0
++ mod_timer(&corgikbd->htimer, jiffies + msecs_to_jiffies(HINGE_SCAN_INTERVAL));
++
++ /* Setup sense interrupts - RisingEdge Detect, sense lines as inputs */
++ for (i = 0; i < CORGI_KEY_SENSE_NUM; i++) {
++ pxa_gpio_mode(CORGI_GPIO_KEY_SENSE(i) | GPIO_IN);
++ if (request_irq(CORGI_IRQ_GPIO_KEY_SENSE(i), corgikbd_interrupt,
++ SA_INTERRUPT | SA_TRIGGER_RISING,
++ "corgikbd", corgikbd))
++ printk(KERN_WARNING "corgikbd: Can't get IRQ: %d!\n", i);
++ }
++
++ /* Set Strobe lines as outputs - set high */
++ for (i = 0; i < CORGI_KEY_STROBE_NUM; i++)
++ pxa_gpio_mode(CORGI_GPIO_KEY_STROBE(i) | GPIO_OUT | GPIO_DFLT_HIGH);
++
++ /* Setup the headphone jack as an input */
++ pxa_gpio_mode(CORGI_GPIO_AK_INT | GPIO_IN);
++#endif
++
++ return 0;
++
++bail_free_dev:
++ input_free_device(input_dev);
++bail_free:
++ kfree(gta01kbd);
++bail:
++ return rc;
++}
++
++static int gta01kbd_remove(struct platform_device *pdev)
++{
++ struct gta01kbd *gta01kbd = platform_get_drvdata(pdev);
++
++ free_irq(s3c2410_gpio_getirq(pdev->resource[0].start), gta01kbd);
++#if 0
++ int i;
++
++ for (i = 0; i < CORGI_KEY_SENSE_NUM; i++)
++ free_irq(CORGI_IRQ_GPIO_KEY_SENSE(i), corgikbd);
++
++ del_timer_sync(&corgikbd->htimer);
++ del_timer_sync(&corgikbd->timer);
++#endif
++ input_unregister_device(gta01kbd->input);
++
++ kfree(gta01kbd);
++
++ return 0;
++}
++
++static struct platform_driver gta01kbd_driver = {
++ .probe = gta01kbd_probe,
++ .remove = gta01kbd_remove,
++ .suspend = gta01kbd_suspend,
++ .resume = gta01kbd_resume,
++ .driver = {
++ .name = "qt2410-button",
++ },
++};
++
++static int __devinit gta01kbd_init(void)
++{
++ return platform_driver_register(>a01kbd_driver);
++}
++
++static void __exit gta01kbd_exit(void)
++{
++ platform_driver_unregister(>a01kbd_driver);
++}
++
++module_init(gta01kbd_init);
++module_exit(gta01kbd_exit);
++
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
++MODULE_DESCRIPTION("Armzone QT2410 Buttons Driver");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.24.7/drivers/input/misc/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/input/misc/Kconfig 2008-12-11 22:46:09.000000000 +0100
++++ linux-2.6.24.7/drivers/input/misc/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -199,4 +199,13 @@ config INPUT_GPIO_BUTTONS
+ To compile this driver as a module, choose M here: the
+ module will be called gpio-buttons.
+
++config INPUT_LIS302DL
++ tristate "STmicro LIS302DL 3-axis accelerometer"
++ depends on SPI_MASTER
++ help
++ SPI driver for the STmicro LIS302DL 3-axis accelerometer.
++
++ The userspece interface is a 3-axis (X/Y/Z) relative movement
++ Linux input device, reporting REL_[XYZ] events.
++
+ endif
+Index: linux-2.6.24.7/drivers/input/misc/lis302dl.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/input/misc/lis302dl.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,863 @@
++/* Linux kernel driver for the ST LIS302D 3-axis accelerometer
++ *
++ * Copyright (C) 2007-2008 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * converted to private bitbang by:
++ * Andy Green <andy@openmoko.com>
++ * ability to set acceleration threshold added by:
++ * Simon Kagstrom <simon.kagstrom@gmail.com>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ * TODO
++ * * statistics for overflow events
++ * * configuration interface (sysfs) for
++ * * enable/disable x/y/z axis data ready
++ * * enable/disable resume from freee fall / click
++ * * free fall / click parameters
++ * * high pass filter parameters
++ */
++#include <linux/kernel.h>
++#include <linux/types.h>
++#include <linux/module.h>
++#include <linux/device.h>
++#include <linux/platform_device.h>
++#include <linux/delay.h>
++#include <linux/irq.h>
++#include <linux/interrupt.h>
++#include <linux/sysfs.h>
++
++#include <linux/lis302dl.h>
++
++/* Utility functions */
++
++static u8 __reg_read(struct lis302dl_info *lis, u8 reg)
++{
++ return (lis->pdata->lis302dl_bitbang_reg_read)(lis, reg);
++}
++
++static void __reg_write(struct lis302dl_info *lis, u8 reg, u8 val)
++{
++ (lis->pdata->lis302dl_bitbang_reg_write)(lis, reg, val);
++}
++
++static void __reg_set_bit_mask(struct lis302dl_info *lis, u8 reg, u8 mask,
++ u8 val)
++{
++ u_int8_t tmp;
++
++ val &= mask;
++
++ tmp = __reg_read(lis, reg);
++ tmp &= ~mask;
++ tmp |= val;
++ __reg_write(lis, reg, tmp);
++}
++
++static int __ms_to_duration(struct lis302dl_info *lis, int ms)
++{
++ /* If we have 400 ms sampling rate, the stepping is 2.5 ms,
++ * on 100 ms the stepping is 10ms */
++ if (lis->flags & LIS302DL_F_DR)
++ return min((ms * 10) / 25, 637);
++
++ return min(ms / 10, 2550);
++}
++
++static int __duration_to_ms(struct lis302dl_info *lis, int duration)
++{
++ if (lis->flags & LIS302DL_F_DR)
++ return (duration * 25) / 10;
++
++ return duration * 10;
++}
++
++static u8 __mg_to_threshold(struct lis302dl_info *lis, int mg)
++{
++ /* If FS is set each bit is 71mg, otherwise 18mg. The THS register
++ * has 7 bits for the threshold value */
++ if (lis->flags & LIS302DL_F_FS)
++ return min(mg / 71, 127);
++
++ return min(mg / 18, 127);
++}
++
++static int __threshold_to_mg(struct lis302dl_info *lis, u8 threshold)
++{
++ if (lis->flags & LIS302DL_F_FS)
++ return threshold * 71;
++
++ return threshold * 18;
++}
++
++/* interrupt handling related */
++
++enum lis302dl_intmode {
++ LIS302DL_INTMODE_GND = 0x00,
++ LIS302DL_INTMODE_FF_WU_1 = 0x01,
++ LIS302DL_INTMODE_FF_WU_2 = 0x02,
++ LIS302DL_INTMODE_FF_WU_12 = 0x03,
++ LIS302DL_INTMODE_DATA_READY = 0x04,
++ LIS302DL_INTMODE_CLICK = 0x07,
++};
++
++
++static void __lis302dl_int_mode(struct device *dev, int int_pin,
++ enum lis302dl_intmode mode)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(dev);
++
++ switch (int_pin) {
++ case 1:
++ __reg_set_bit_mask(lis, LIS302DL_REG_CTRL3, 0x07, mode);
++ break;
++ case 2:
++ __reg_set_bit_mask(lis, LIS302DL_REG_CTRL3, 0x38, mode << 3);
++ break;
++ default:
++ BUG();
++ }
++}
++
++static void __enable_wakeup(struct lis302dl_info *lis)
++{
++ /* First zero to get to a known state */
++ __reg_write(lis, LIS302DL_REG_FF_WU_CFG_1,
++ lis->wakeup.cfg);
++ __reg_write(lis, LIS302DL_REG_FF_WU_THS_1,
++ lis->wakeup.threshold);
++ __reg_write(lis, LIS302DL_REG_FF_WU_DURATION_1,
++ lis->wakeup.duration);
++
++ /* Route the interrupt for wakeup */
++ __lis302dl_int_mode(lis->dev, 1,
++ LIS302DL_INTMODE_FF_WU_1);
++
++ __reg_write(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_PD);
++}
++
++static void __enable_data_collection(struct lis302dl_info *lis)
++{
++ u_int8_t ctrl1 = LIS302DL_CTRL1_PD | LIS302DL_CTRL1_Xen |
++ LIS302DL_CTRL1_Yen | LIS302DL_CTRL1_Zen;
++
++ /* make sure we're powered up and generate data ready */
++ __reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, ctrl1, ctrl1);
++
++ /* If the threshold is zero, let the device generated an interrupt
++ * on each datum */
++ if (lis->threshold == 0) {
++ __reg_write(lis, LIS302DL_REG_CTRL2, 0);
++ __lis302dl_int_mode(lis->dev, 1, LIS302DL_INTMODE_DATA_READY);
++ __lis302dl_int_mode(lis->dev, 2, LIS302DL_INTMODE_DATA_READY);
++ } else {
++ __reg_write(lis, LIS302DL_REG_CTRL2,
++ LIS302DL_CTRL2_HPFF1);
++ __reg_write(lis, LIS302DL_REG_FF_WU_THS_1, lis->threshold);
++ __reg_write(lis, LIS302DL_REG_FF_WU_DURATION_1, lis->duration);
++
++ /* Clear the HP filter "starting point" */
++ __reg_read(lis, LIS302DL_REG_HP_FILTER_RESET);
++ __reg_write(lis, LIS302DL_REG_FF_WU_CFG_1,
++ LIS302DL_FFWUCFG_XHIE | LIS302DL_FFWUCFG_YHIE |
++ LIS302DL_FFWUCFG_ZHIE);
++ __lis302dl_int_mode(lis->dev, 1, LIS302DL_INTMODE_FF_WU_12);
++ __lis302dl_int_mode(lis->dev, 2, LIS302DL_INTMODE_FF_WU_12);
++ }
++}
++
++#if 0
++static void _report_btn_single(struct input_dev *inp, int btn)
++{
++ input_report_key(inp, btn, 1);
++ input_sync(inp);
++ input_report_key(inp, btn, 0);
++}
++
++static void _report_btn_double(struct input_dev *inp, int btn)
++{
++ input_report_key(inp, btn, 1);
++ input_sync(inp);
++ input_report_key(inp, btn, 0);
++ input_sync(inp);
++ input_report_key(inp, btn, 1);
++ input_sync(inp);
++ input_report_key(inp, btn, 0);
++}
++#endif
++
++
++static void lis302dl_bitbang_read_sample(struct lis302dl_info *lis)
++{
++ u8 data = 0xc0 | LIS302DL_REG_OUT_X; /* read, autoincrement */
++ u8 read[5];
++ unsigned long flags;
++ int mg_per_sample;
++
++ local_irq_save(flags);
++ mg_per_sample = __threshold_to_mg(lis, 1);
++
++ (lis->pdata->lis302dl_bitbang)(lis, &data, 1, &read[0], 5);
++
++ local_irq_restore(flags);
++
++ input_report_rel(lis->input_dev, REL_X, mg_per_sample * (s8)read[0]);
++ input_report_rel(lis->input_dev, REL_Y, mg_per_sample * (s8)read[2]);
++ input_report_rel(lis->input_dev, REL_Z, mg_per_sample * (s8)read[4]);
++
++ input_sync(lis->input_dev);
++
++ /* Reset the HP filter */
++ __reg_read(lis, LIS302DL_REG_HP_FILTER_RESET);
++}
++
++static irqreturn_t lis302dl_interrupt(int irq, void *_lis)
++{
++ struct lis302dl_info *lis = _lis;
++
++ lis302dl_bitbang_read_sample(lis);
++ return IRQ_HANDLED;
++}
++
++/* sysfs */
++
++static ssize_t show_rate(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(dev);
++ u8 ctrl1;
++ unsigned long flags;
++
++ local_irq_save(flags);
++ ctrl1 = __reg_read(lis, LIS302DL_REG_CTRL1);
++ local_irq_restore(flags);
++
++ return sprintf(buf, "%d\n", ctrl1 & LIS302DL_CTRL1_DR ? 400 : 100);
++}
++
++static ssize_t set_rate(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(dev);
++ unsigned long flags;
++ int duration_ms = __duration_to_ms(lis, lis->duration);
++
++ local_irq_save(flags);
++
++ if (!strcmp(buf, "400\n")) {
++ __reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_DR,
++ LIS302DL_CTRL1_DR);
++ lis->flags |= LIS302DL_F_DR;
++ } else {
++ __reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_DR,
++ 0);
++ lis->flags &= ~LIS302DL_F_DR;
++ }
++ lis->duration = __ms_to_duration(lis, duration_ms);
++ local_irq_restore(flags);
++
++ return count;
++}
++
++static DEVICE_ATTR(sample_rate, S_IRUGO | S_IWUSR, show_rate, set_rate);
++
++static ssize_t show_scale(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(dev);
++ u_int8_t ctrl1;
++ unsigned long flags;
++
++ local_irq_save(flags);
++ ctrl1 = __reg_read(lis, LIS302DL_REG_CTRL1);
++ local_irq_restore(flags);
++
++ return sprintf(buf, "%s\n", ctrl1 & LIS302DL_CTRL1_FS ? "9.2" : "2.3");
++}
++
++static ssize_t set_scale(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(dev);
++ unsigned long flags;
++ int threshold_mg = __threshold_to_mg(lis, lis->threshold);
++
++ local_irq_save(flags);
++
++ if (!strcmp(buf, "9.2\n")) {
++ __reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_FS,
++ LIS302DL_CTRL1_FS);
++ lis->flags |= LIS302DL_F_FS;
++ } else {
++ __reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_FS,
++ 0);
++ lis->flags &= ~LIS302DL_F_FS;
++ }
++
++ /* Adjust the threshold */
++ lis->threshold = __mg_to_threshold(lis, threshold_mg);
++ if (lis->flags & LIS302DL_F_INPUT_OPEN)
++ __enable_data_collection(lis);
++
++ local_irq_restore(flags);
++
++ return count;
++}
++
++static DEVICE_ATTR(full_scale, S_IRUGO | S_IWUSR, show_scale, set_scale);
++
++static ssize_t show_threshold(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(dev);
++
++ return sprintf(buf, "%d\n", __threshold_to_mg(lis, lis->threshold));
++}
++
++static ssize_t set_threshold(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(dev);
++ u32 val;
++
++ if (sscanf(buf, "%d\n", &val) != 1)
++ return -EINVAL;
++ /* 8g is the maximum if FS is 1 */
++ if (val < 0 || val > 8000)
++ return -ERANGE;
++
++ /* Set the threshold and write it out if the device is used */
++ lis->threshold = __mg_to_threshold(lis, val);
++
++ if (lis->flags & LIS302DL_F_INPUT_OPEN) {
++ unsigned long flags;
++
++ local_irq_save(flags);
++ __enable_data_collection(lis);
++ local_irq_restore(flags);
++ }
++
++ return count;
++}
++
++static DEVICE_ATTR(threshold, S_IRUGO | S_IWUSR, show_threshold, set_threshold);
++
++static ssize_t show_duration(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(dev);
++
++ return sprintf(buf, "%d\n", __duration_to_ms(lis, lis->duration));
++}
++
++static ssize_t set_duration(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(dev);
++ u32 val;
++
++ if (sscanf(buf, "%d\n", &val) != 1)
++ return -EINVAL;
++ if (val < 0 || val > 2550)
++ return -ERANGE;
++
++ lis->duration = __ms_to_duration(lis, val);
++ if (lis->flags & LIS302DL_F_INPUT_OPEN)
++ __reg_write(lis, LIS302DL_REG_FF_WU_DURATION_1, lis->duration);
++
++ return count;
++}
++
++static DEVICE_ATTR(duration, S_IRUGO | S_IWUSR, show_duration, set_duration);
++
++static ssize_t lis302dl_dump(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(dev);
++ int n = 0;
++ u8 reg[0x40];
++ char *end = buf;
++ unsigned long flags;
++
++ local_irq_save(flags);
++
++ for (n = 0; n < sizeof(reg); n++)
++ reg[n] = __reg_read(lis, n);
++
++ local_irq_restore(flags);
++
++ for (n = 0; n < sizeof(reg); n += 16) {
++ hex_dump_to_buffer(reg + n, 16, 16, 1, end, 128, 0);
++ end += strlen(end);
++ *end++ = '\n';
++ *end++ = '\0';
++ }
++
++ return end - buf;
++}
++static DEVICE_ATTR(dump, S_IRUGO, lis302dl_dump, NULL);
++
++/* Configure freefall/wakeup interrupts */
++static ssize_t set_wakeup(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(dev);
++ u_int8_t x_lo, y_lo, z_lo;
++ u_int8_t x_hi, y_hi, z_hi;
++ int duration, threshold, and_events;
++ int x, y, z;
++
++ /* Zero turns the feature off */
++ if (strcmp(buf, "0\n") == 0) {
++ lis->wakeup.active = 0;
++
++ if (lis->flags & LIS302DL_F_IRQ_WAKE) {
++ disable_irq_wake(lis->pdata->interrupt);
++ lis->flags &= ~LIS302DL_F_IRQ_WAKE;
++ }
++
++ return count;
++ }
++
++ if (sscanf(buf, "%d %d %d %d %d %d", &x, &y, &z, &threshold, &duration,
++ &and_events) != 6)
++ return -EINVAL;
++
++ if (duration < 0 || duration > 2550 ||
++ threshold < 0 || threshold > 8000)
++ return -ERANGE;
++
++ /* Interrupt flags */
++ x_lo = x < 0 ? LIS302DL_FFWUCFG_XLIE : 0;
++ y_lo = y < 0 ? LIS302DL_FFWUCFG_YLIE : 0;
++ z_lo = z < 0 ? LIS302DL_FFWUCFG_ZLIE : 0;
++ x_hi = x > 0 ? LIS302DL_FFWUCFG_XHIE : 0;
++ y_hi = y > 0 ? LIS302DL_FFWUCFG_YHIE : 0;
++ z_hi = z > 0 ? LIS302DL_FFWUCFG_ZHIE : 0;
++
++ lis->wakeup.duration = __ms_to_duration(lis, duration);
++ lis->wakeup.threshold = __mg_to_threshold(lis, threshold);
++ lis->wakeup.cfg = (and_events ? LIS302DL_FFWUCFG_AOI : 0) |
++ x_lo | x_hi | y_lo | y_hi | z_lo | z_hi;
++
++ if (!(lis->flags & LIS302DL_F_IRQ_WAKE)) {
++ enable_irq_wake(lis->pdata->interrupt);
++ lis->flags |= LIS302DL_F_IRQ_WAKE;
++ }
++ lis->wakeup.active = 1;
++
++ return count;
++}
++
++static ssize_t show_wakeup(struct device *dev,
++ struct device_attribute *attr, char *buf)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(dev);
++ u8 config;
++
++ /* All events off? */
++ if (!lis->wakeup.active)
++ return sprintf(buf, "off\n");
++
++ config = lis->wakeup.cfg;
++
++ return sprintf(buf,
++ "%s events, duration %d, threshold %d, "
++ "enabled: %s %s %s %s %s %s\n",
++ (config & LIS302DL_FFWUCFG_AOI) == 0 ? "or" : "and",
++ __duration_to_ms(lis, lis->wakeup.duration),
++ __threshold_to_mg(lis, lis->wakeup.threshold),
++ (config & LIS302DL_FFWUCFG_XLIE) == 0 ? "---" : "xlo",
++ (config & LIS302DL_FFWUCFG_XHIE) == 0 ? "---" : "xhi",
++ (config & LIS302DL_FFWUCFG_YLIE) == 0 ? "---" : "ylo",
++ (config & LIS302DL_FFWUCFG_YHIE) == 0 ? "---" : "yhi",
++ (config & LIS302DL_FFWUCFG_ZLIE) == 0 ? "---" : "zlo",
++ (config & LIS302DL_FFWUCFG_ZHIE) == 0 ? "---" : "zhi");
++}
++
++static DEVICE_ATTR(wakeup, S_IRUGO | S_IWUSR, show_wakeup, set_wakeup);
++
++static struct attribute *lis302dl_sysfs_entries[] = {
++ &dev_attr_sample_rate.attr,
++ &dev_attr_full_scale.attr,
++ &dev_attr_threshold.attr,
++ &dev_attr_duration.attr,
++ &dev_attr_dump.attr,
++ &dev_attr_wakeup.attr,
++ NULL
++};
++
++static struct attribute_group lis302dl_attr_group = {
++ .name = NULL,
++ .attrs = lis302dl_sysfs_entries,
++};
++
++/* input device handling and driver core interaction */
++static int lis302dl_input_open(struct input_dev *inp)
++{
++ struct lis302dl_info *lis = inp->private;
++ unsigned long flags;
++
++ local_irq_save(flags);
++
++ __enable_data_collection(lis);
++ lis->flags |= LIS302DL_F_INPUT_OPEN;
++
++ /* kick it off -- since we are edge triggered, if we missed the edge
++ * permanent low interrupt is death for us */
++ lis302dl_bitbang_read_sample(lis);
++
++ local_irq_restore(flags);
++
++ return 0;
++}
++
++static void lis302dl_input_close(struct input_dev *inp)
++{
++ struct lis302dl_info *lis = inp->private;
++ u_int8_t ctrl1 = LIS302DL_CTRL1_Xen | LIS302DL_CTRL1_Yen |
++ LIS302DL_CTRL1_Zen;
++ unsigned long flags;
++
++ local_irq_save(flags);
++
++ /* since the input core already serializes access and makes sure we
++ * only see close() for the close of the last user, we can safely
++ * disable the data ready events */
++ __reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, ctrl1, 0x00);
++ lis->flags &= ~LIS302DL_F_INPUT_OPEN;
++
++ /* however, don't power down the whole device if still needed */
++ if (!(lis->flags & LIS302DL_F_WUP_FF ||
++ lis->flags & LIS302DL_F_WUP_CLICK)) {
++ __reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_PD,
++ 0x00);
++ }
++ local_irq_restore(flags);
++}
++
++/* get the device to reload its coefficients from EEPROM and wait for it
++ * to complete
++ */
++
++static int __lis302dl_reset_device(struct lis302dl_info *lis)
++{
++ int timeout = 10;
++
++ __reg_write(lis, LIS302DL_REG_CTRL2,
++ LIS302DL_CTRL2_BOOT | LIS302DL_CTRL2_FDS);
++
++ while ((__reg_read(lis, LIS302DL_REG_CTRL2)
++ & LIS302DL_CTRL2_BOOT) && (timeout--))
++ mdelay(1);
++
++ return !!(timeout < 0);
++}
++
++static int __devinit lis302dl_probe(struct platform_device *pdev)
++{
++ int rc;
++ struct lis302dl_info *lis;
++ u_int8_t wai;
++ unsigned long flags;
++ struct lis302dl_platform_data *pdata = pdev->dev.platform_data;
++
++ lis = kzalloc(sizeof(*lis), GFP_KERNEL);
++ if (!lis)
++ return -ENOMEM;
++
++ local_irq_save(flags);
++
++ lis->dev = &pdev->dev;
++
++ dev_set_drvdata(lis->dev, lis);
++
++ lis->pdata = pdata;
++
++ /* Configure our IO */
++ (lis->pdata->lis302dl_suspend_io)(lis, 1);
++
++ wai = __reg_read(lis, LIS302DL_REG_WHO_AM_I);
++ if (wai != LIS302DL_WHO_AM_I_MAGIC) {
++ dev_err(lis->dev, "unknown who_am_i signature 0x%02x\n", wai);
++ dev_set_drvdata(lis->dev, NULL);
++ rc = -ENODEV;
++ goto bail_free_lis;
++ }
++
++ rc = sysfs_create_group(&lis->dev->kobj, &lis302dl_attr_group);
++ if (rc) {
++ dev_err(lis->dev, "error creating sysfs group\n");
++ goto bail_free_lis;
++ }
++
++ /* initialize input layer details */
++ lis->input_dev = input_allocate_device();
++ if (!lis->input_dev) {
++ dev_err(lis->dev, "Unable to allocate input device\n");
++ goto bail_sysfs;
++ }
++
++ set_bit(EV_REL, lis->input_dev->evbit);
++ set_bit(REL_X, lis->input_dev->relbit);
++ set_bit(REL_Y, lis->input_dev->relbit);
++ set_bit(REL_Z, lis->input_dev->relbit);
++/* set_bit(EV_KEY, lis->input_dev->evbit);
++ set_bit(BTN_X, lis->input_dev->keybit);
++ set_bit(BTN_Y, lis->input_dev->keybit);
++ set_bit(BTN_Z, lis->input_dev->keybit);
++*/
++ lis->threshold = 1;
++ lis->duration = 0;
++ memset(&lis->wakeup, 0, sizeof(lis->wakeup));
++
++ lis->input_dev->private = lis;
++ lis->input_dev->name = pdata->name;
++ /* SPI Bus not defined as a valid bus for input subsystem*/
++ lis->input_dev->id.bustype = BUS_I2C; /* lie about it */
++ lis->input_dev->open = lis302dl_input_open;
++ lis->input_dev->close = lis302dl_input_close;
++
++ rc = input_register_device(lis->input_dev);
++ if (rc) {
++ dev_err(lis->dev, "error %d registering input device\n", rc);
++ goto bail_inp_dev;
++ }
++
++ if (__lis302dl_reset_device(lis))
++ dev_err(lis->dev, "device BOOT reload failed\n");
++
++ /* force us powered */
++ __reg_write(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_PD |
++ LIS302DL_CTRL1_Xen |
++ LIS302DL_CTRL1_Yen |
++ LIS302DL_CTRL1_Zen);
++ mdelay(1);
++
++ __reg_write(lis, LIS302DL_REG_CTRL2, 0);
++ __reg_write(lis, LIS302DL_REG_CTRL3,
++ LIS302DL_CTRL3_PP_OD | LIS302DL_CTRL3_IHL);
++ __reg_write(lis, LIS302DL_REG_FF_WU_THS_1, 0x0);
++ __reg_write(lis, LIS302DL_REG_FF_WU_DURATION_1, 0x00);
++ __reg_write(lis, LIS302DL_REG_FF_WU_CFG_1, 0x0);
++
++ /* start off in powered down mode; we power up when someone opens us */
++ __reg_write(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_Xen |
++ LIS302DL_CTRL1_Yen | LIS302DL_CTRL1_Zen);
++
++ if (pdata->open_drain)
++ /* switch interrupt to open collector, active-low */
++ __reg_write(lis, LIS302DL_REG_CTRL3,
++ LIS302DL_CTRL3_PP_OD | LIS302DL_CTRL3_IHL);
++ else
++ /* push-pull, active-low */
++ __reg_write(lis, LIS302DL_REG_CTRL3, LIS302DL_CTRL3_IHL);
++
++ __lis302dl_int_mode(lis->dev, 1, LIS302DL_INTMODE_GND);
++ __lis302dl_int_mode(lis->dev, 2, LIS302DL_INTMODE_GND);
++
++ __reg_read(lis, LIS302DL_REG_STATUS);
++ __reg_read(lis, LIS302DL_REG_FF_WU_SRC_1);
++ __reg_read(lis, LIS302DL_REG_FF_WU_SRC_2);
++ __reg_read(lis, LIS302DL_REG_CLICK_SRC);
++
++ dev_info(lis->dev, "Found %s\n", pdata->name);
++
++ lis->pdata = pdata;
++
++ rc = request_irq(pdata->interrupt, lis302dl_interrupt,
++ IRQF_TRIGGER_FALLING, "lis302dl", lis);
++ if (rc < 0) {
++ dev_err(lis->dev, "error requesting IRQ %d\n",
++ lis->pdata->interrupt);
++ goto bail_inp_reg;
++ }
++ local_irq_restore(flags);
++ return 0;
++
++bail_inp_reg:
++ input_unregister_device(lis->input_dev);
++bail_inp_dev:
++ input_free_device(lis->input_dev);
++bail_sysfs:
++ sysfs_remove_group(&lis->dev->kobj, &lis302dl_attr_group);
++bail_free_lis:
++ kfree(lis);
++ local_irq_restore(flags);
++ return rc;
++}
++
++static int __devexit lis302dl_remove(struct platform_device *pdev)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(&pdev->dev);
++ unsigned long flags;
++
++ /* Reset and power down the device */
++ local_irq_save(flags);
++ __reg_write(lis, LIS302DL_REG_CTRL3, 0x00);
++ __reg_write(lis, LIS302DL_REG_CTRL2, 0x00);
++ __reg_write(lis, LIS302DL_REG_CTRL1, 0x00);
++ local_irq_restore(flags);
++
++ /* Cleanup resources */
++ free_irq(lis->pdata->interrupt, lis);
++ sysfs_remove_group(&pdev->dev.kobj, &lis302dl_attr_group);
++ input_unregister_device(lis->input_dev);
++ if (lis->input_dev)
++ input_free_device(lis->input_dev);
++ dev_set_drvdata(lis->dev, NULL);
++ kfree(lis);
++
++ return 0;
++}
++
++#ifdef CONFIG_PM
++
++static u8 regs_to_save[] = {
++ LIS302DL_REG_CTRL1,
++ LIS302DL_REG_CTRL2,
++ LIS302DL_REG_CTRL3,
++ LIS302DL_REG_FF_WU_CFG_1,
++ LIS302DL_REG_FF_WU_THS_1,
++ LIS302DL_REG_FF_WU_DURATION_1,
++ LIS302DL_REG_FF_WU_CFG_2,
++ LIS302DL_REG_FF_WU_THS_2,
++ LIS302DL_REG_FF_WU_DURATION_2,
++ LIS302DL_REG_CLICK_CFG,
++ LIS302DL_REG_CLICK_THSY_X,
++ LIS302DL_REG_CLICK_THSZ,
++ LIS302DL_REG_CLICK_TIME_LIMIT,
++ LIS302DL_REG_CLICK_LATENCY,
++ LIS302DL_REG_CLICK_WINDOW,
++
++};
++
++static int lis302dl_suspend(struct platform_device *pdev, pm_message_t state)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(&pdev->dev);
++ unsigned long flags;
++ u_int8_t tmp;
++ int n;
++
++ /* determine if we want to wake up from the accel. */
++ if (lis->flags & LIS302DL_F_WUP_CLICK)
++ return 0;
++
++ disable_irq(lis->pdata->interrupt);
++ local_irq_save(flags);
++
++ /*
++ * When we share SPI over multiple sensors, there is a race here
++ * that one or more sensors will lose. In that case, the shared
++ * SPI bus GPIO will be in sleep mode and partially pulled down. So
++ * we explicitly put our IO into "wake" mode here before the final
++ * traffic to the sensor.
++ */
++ (lis->pdata->lis302dl_suspend_io)(lis, 1);
++
++ /* save registers */
++ for (n = 0; n < ARRAY_SIZE(regs_to_save); n++)
++ lis->regs[regs_to_save[n]] =
++ __reg_read(lis, regs_to_save[n]);
++
++ /* power down or enable wakeup */
++ if (!lis->wakeup.active) {
++ tmp = __reg_read(lis, LIS302DL_REG_CTRL1);
++ tmp &= ~LIS302DL_CTRL1_PD;
++ __reg_write(lis, LIS302DL_REG_CTRL1, tmp);
++ } else
++ __enable_wakeup(lis);
++
++ /* place our IO to the device in sleep-compatible states */
++ (lis->pdata->lis302dl_suspend_io)(lis, 0);
++
++ local_irq_restore(flags);
++
++ return 0;
++}
++
++static int lis302dl_resume(struct platform_device *pdev)
++{
++ struct lis302dl_info *lis = dev_get_drvdata(&pdev->dev);
++ unsigned long flags;
++ int n;
++
++ if (lis->flags & LIS302DL_F_WUP_CLICK)
++ return 0;
++
++ local_irq_save(flags);
++
++ /* get our IO to the device back in operational states */
++ (lis->pdata->lis302dl_suspend_io)(lis, 1);
++
++ /* resume from powerdown first! */
++ __reg_write(lis, LIS302DL_REG_CTRL1,
++ LIS302DL_CTRL1_PD |
++ LIS302DL_CTRL1_Xen |
++ LIS302DL_CTRL1_Yen |
++ LIS302DL_CTRL1_Zen);
++ mdelay(1);
++
++ if (__lis302dl_reset_device(lis))
++ dev_err(&pdev->dev, "device BOOT reload failed\n");
++
++ lis->regs[LIS302DL_REG_CTRL1] |= LIS302DL_CTRL1_PD |
++ LIS302DL_CTRL1_Xen |
++ LIS302DL_CTRL1_Yen |
++ LIS302DL_CTRL1_Zen;
++
++ /* restore registers after resume */
++ for (n = 0; n < ARRAY_SIZE(regs_to_save); n++)
++ __reg_write(lis, regs_to_save[n], lis->regs[regs_to_save[n]]);
++
++ local_irq_restore(flags);
++ enable_irq(lis->pdata->interrupt);
++
++ return 0;
++}
++#else
++#define lis302dl_suspend NULL
++#define lis302dl_resume NULL
++#endif
++
++static struct platform_driver lis302dl_driver = {
++ .driver = {
++ .name = "lis302dl",
++ .owner = THIS_MODULE,
++ },
++
++ .probe = lis302dl_probe,
++ .remove = __devexit_p(lis302dl_remove),
++ .suspend = lis302dl_suspend,
++ .resume = lis302dl_resume,
++};
++
++static int __devinit lis302dl_init(void)
++{
++ return platform_driver_register(&lis302dl_driver);
++}
++
++static void __exit lis302dl_exit(void)
++{
++ platform_driver_unregister(&lis302dl_driver);
++}
++
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
++MODULE_LICENSE("GPL");
++
++module_init(lis302dl_init);
++module_exit(lis302dl_exit);
+Index: linux-2.6.24.7/drivers/input/misc/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/drivers/input/misc/Makefile 2008-12-11 22:46:09.000000000 +0100
++++ linux-2.6.24.7/drivers/input/misc/Makefile 2008-12-11 22:47:43.000000000 +0100
+@@ -19,3 +19,4 @@ obj-$(CONFIG_INPUT_YEALINK) += yealink.
+ obj-$(CONFIG_HP_SDC_RTC) += hp_sdc_rtc.o
+ obj-$(CONFIG_INPUT_UINPUT) += uinput.o
+ obj-$(CONFIG_INPUT_GPIO_BUTTONS) += gpio_buttons.o
++obj-$(CONFIG_INPUT_LIS302DL) += lis302dl.o
+Index: linux-2.6.24.7/drivers/input/mousedev.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/input/mousedev.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/input/mousedev.c 2008-12-11 22:46:49.000000000 +0100
+@@ -1009,6 +1009,7 @@ static const struct input_device_id mous
+ .evbit = { BIT_MASK(EV_KEY) | BIT_MASK(EV_REL) },
+ .relbit = { BIT_MASK(REL_WHEEL) },
+ }, /* A separate scrollwheel */
++#if 0
+ {
+ .flags = INPUT_DEVICE_ID_MATCH_EVBIT |
+ INPUT_DEVICE_ID_MATCH_KEYBIT |
+@@ -1018,6 +1019,7 @@ static const struct input_device_id mous
+ .absbit = { BIT_MASK(ABS_X) | BIT_MASK(ABS_Y) },
+ }, /* A tablet like device, at least touch detection,
+ two absolute axes */
++#endif
+ {
+ .flags = INPUT_DEVICE_ID_MATCH_EVBIT |
+ INPUT_DEVICE_ID_MATCH_KEYBIT |
+Index: linux-2.6.24.7/drivers/input/touchscreen/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/input/touchscreen/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/input/touchscreen/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -67,6 +67,24 @@ config TOUCHSCREEN_FUJITSU
+ To compile this driver as a module, choose M here: the
+ module will be called fujitsu-ts.
+
++config TOUCHSCREEN_S3C2410
++ tristate "Samsung S3C2410 touchscreen input driver"
++ depends on ARCH_S3C2410 && INPUT && INPUT_TOUCHSCREEN
++ select SERIO
++ help
++ Say Y here if you have the s3c2410 touchscreen.
++
++ If unsure, say N.
++
++ To compile this driver as a module, choose M here: the
++ module will be called s3c2410_ts.
++
++config TOUCHSCREEN_S3C2410_DEBUG
++ boolean "Samsung S3C2410 touchscreen debug messages"
++ depends on TOUCHSCREEN_S3C2410
++ help
++ Select this if you want debug messages
++
+ config TOUCHSCREEN_GUNZE
+ tristate "Gunze AHL-51S touchscreen"
+ select SERIO
+Index: linux-2.6.24.7/drivers/input/touchscreen/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/drivers/input/touchscreen/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/input/touchscreen/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -19,3 +19,4 @@ obj-$(CONFIG_TOUCHSCREEN_PENMOUNT) += pe
+ obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT) += touchright.o
+ obj-$(CONFIG_TOUCHSCREEN_TOUCHWIN) += touchwin.o
+ obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o
++obj-$(CONFIG_TOUCHSCREEN_S3C2410) += s3c2410_ts.o
+Index: linux-2.6.24.7/drivers/input/touchscreen/s3c2410_ts.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/input/touchscreen/s3c2410_ts.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,589 @@
++/*
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
++ *
++ * Copyright (c) 2004 Arnaud Patard <arnaud.patard@rtp-net.org>
++ * iPAQ H1940 touchscreen support
++ *
++ * ChangeLog
++ *
++ * 2004-09-05: Herbert Pötzl <herbert@13thfloor.at>
++ * - added clock (de-)allocation code
++ *
++ * 2005-03-06: Arnaud Patard <arnaud.patard@rtp-net.org>
++ * - h1940_ -> s3c2410 (this driver is now also used on the n30
++ * machines :P)
++ * - Debug messages are now enabled with the config option
++ * TOUCHSCREEN_S3C2410_DEBUG
++ * - Changed the way the value are read
++ * - Input subsystem should now work
++ * - Use ioremap and readl/writel
++ *
++ * 2005-03-23: Arnaud Patard <arnaud.patard@rtp-net.org>
++ * - Make use of some undocumented features of the touchscreen
++ * controller
++ *
++ * 2007-05-23: Harald Welte <laforge@openmoko.org>
++ * - Add proper support for S32440
++ *
++ * 2008-06-18: Andy Green <andy@openmoko.com>
++ * - Outlier removal
++ */
++
++#include <linux/errno.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/input.h>
++#include <linux/init.h>
++#include <linux/serio.h>
++#include <linux/delay.h>
++#include <linux/platform_device.h>
++#include <linux/clk.h>
++#include <asm/io.h>
++#include <asm/irq.h>
++
++#include <asm/arch/regs-gpio.h>
++#include <asm/arch/ts.h>
++
++#include <asm/plat-s3c/regs-adc.h>
++
++/* For ts.dev.id.version */
++#define S3C2410TSVERSION 0x0101
++
++#define TSC_SLEEP (S3C2410_ADCTSC_PULL_UP_DISABLE | S3C2410_ADCTSC_XY_PST(0))
++
++#define WAIT4INT(x) (((x)<<8) | \
++ S3C2410_ADCTSC_YM_SEN | \
++ S3C2410_ADCTSC_YP_SEN | \
++ S3C2410_ADCTSC_XP_SEN | \
++ S3C2410_ADCTSC_XY_PST(3))
++
++#define AUTOPST (S3C2410_ADCTSC_YM_SEN | \
++ S3C2410_ADCTSC_YP_SEN | \
++ S3C2410_ADCTSC_XP_SEN | \
++ S3C2410_ADCTSC_AUTO_PST | \
++ S3C2410_ADCTSC_XY_PST(0))
++
++#define DEBUG_LVL KERN_DEBUG
++
++#define TOUCH_STANDBY_FLAG 0
++#define TOUCH_PRESSED_FLAG 1
++#define TOUCH_RELEASE_FLAG 2
++
++#define TOUCH_RELEASE_TIMEOUT (HZ >> 4)
++
++MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");
++MODULE_DESCRIPTION("s3c2410 touchscreen driver");
++MODULE_LICENSE("GPL");
++
++/*
++ * Definitions & global arrays.
++ */
++
++
++static char *s3c2410ts_name = "s3c2410 TouchScreen";
++
++/*
++ * Per-touchscreen data.
++ */
++
++struct s3c2410ts_sample {
++ int x;
++ int y;
++};
++
++struct s3c2410ts {
++ struct input_dev *dev;
++ long xp;
++ long yp;
++ int count;
++ int shift;
++ int extent; /* 1 << shift */
++
++ /* the raw sample fifo is a lightweight way to track a running average
++ * of all taken samples. "running average" here means that it gives
++ * correct average for each sample, not only at the end of block of
++ * samples
++ */
++ int excursion_filter_len;
++ struct s3c2410ts_sample *raw_sample_fifo;
++ int head_raw_fifo;
++ int tail_raw_fifo;
++ struct s3c2410ts_sample raw_running_avg;
++ int reject_threshold_vs_avg;
++ int flag_previous_exceeded_threshold;
++ int flag_first_touch_sent;
++};
++
++static struct s3c2410ts ts;
++static void __iomem *base_addr;
++
++static void clear_raw_fifo(void)
++{
++ ts.head_raw_fifo = 0;
++ ts.tail_raw_fifo = 0;
++ ts.raw_running_avg.x = 0;
++ ts.raw_running_avg.y = 0;
++ ts.flag_previous_exceeded_threshold = 0;
++ ts.flag_first_touch_sent = TOUCH_STANDBY_FLAG;
++}
++
++
++static inline void s3c2410_ts_connect(void)
++{
++ s3c2410_gpio_cfgpin(S3C2410_GPG12, S3C2410_GPG12_XMON);
++ s3c2410_gpio_cfgpin(S3C2410_GPG13, S3C2410_GPG13_nXPON);
++ s3c2410_gpio_cfgpin(S3C2410_GPG14, S3C2410_GPG14_YMON);
++ s3c2410_gpio_cfgpin(S3C2410_GPG15, S3C2410_GPG15_nYPON);
++}
++
++static void touch_timer_fire(unsigned long data);
++static struct timer_list touch_timer =
++ TIMER_INITIALIZER(touch_timer_fire, 0, 0);
++
++static void touch_timer_fire(unsigned long data)
++{
++ unsigned long data0;
++ unsigned long data1;
++ int updown;
++
++ data0 = readl(base_addr + S3C2410_ADCDAT0);
++ data1 = readl(base_addr + S3C2410_ADCDAT1);
++
++ updown = (!(data0 & S3C2410_ADCDAT0_UPDOWN)) &&
++ (!(data1 & S3C2410_ADCDAT0_UPDOWN));
++
++ if ( updown && ts.flag_first_touch_sent == TOUCH_RELEASE_FLAG ) {
++ ts.flag_first_touch_sent = TOUCH_PRESSED_FLAG;
++ }
++
++ if (updown) {
++ if (ts.count != 0) {
++ ts.xp >>= ts.shift;
++ ts.yp >>= ts.shift;
++
++#ifdef CONFIG_TOUCHSCREEN_S3C2410_DEBUG
++ {
++ struct timeval tv;
++
++ do_gettimeofday(&tv);
++ printk(DEBUG_LVL "T:%06d, X:%03ld, Y:%03ld\n",
++ (int)tv.tv_usec, ts.xp, ts.yp);
++ }
++#endif
++
++ input_report_abs(ts.dev, ABS_X, ts.xp);
++ input_report_abs(ts.dev, ABS_Y, ts.yp);
++
++ input_report_key(ts.dev, BTN_TOUCH, 1);
++ input_report_abs(ts.dev, ABS_PRESSURE, 1);
++ input_sync(ts.dev);
++ ts.flag_first_touch_sent = TOUCH_PRESSED_FLAG;
++ }
++
++ ts.xp = 0;
++ ts.yp = 0;
++ ts.count = 0;
++
++ writel(S3C2410_ADCTSC_PULL_UP_DISABLE | AUTOPST,
++ base_addr+S3C2410_ADCTSC);
++ writel(readl(base_addr+S3C2410_ADCCON) |
++ S3C2410_ADCCON_ENABLE_START, base_addr+S3C2410_ADCCON);
++ } else {
++ ts.count = 0;
++
++ if ( ts.flag_first_touch_sent == TOUCH_RELEASE_FLAG ) {
++ input_report_key(ts.dev, BTN_TOUCH, 0);
++ input_report_abs(ts.dev, ABS_PRESSURE, 0);
++ input_sync(ts.dev);
++ ts.flag_first_touch_sent = TOUCH_STANDBY_FLAG;
++ } if ( ts.flag_first_touch_sent == TOUCH_PRESSED_FLAG ) {
++ ts.flag_first_touch_sent = TOUCH_RELEASE_FLAG;
++ mod_timer(&touch_timer, jiffies + TOUCH_RELEASE_TIMEOUT);
++ }
++
++ writel(WAIT4INT(0), base_addr+S3C2410_ADCTSC);
++ }
++}
++
++static irqreturn_t stylus_updown(int irq, void *dev_id)
++{
++ unsigned long data0;
++ unsigned long data1;
++ int updown;
++
++ data0 = readl(base_addr+S3C2410_ADCDAT0);
++ data1 = readl(base_addr+S3C2410_ADCDAT1);
++
++ updown = (!(data0 & S3C2410_ADCDAT0_UPDOWN)) &&
++ (!(data1 & S3C2410_ADCDAT0_UPDOWN));
++
++ /* TODO we should never get an interrupt with updown set while
++ * the timer is running, but maybe we ought to verify that the
++ * timer isn't running anyways. */
++
++ if (updown)
++ touch_timer_fire(0);
++
++ return IRQ_HANDLED;
++}
++
++
++static irqreturn_t stylus_action(int irq, void *dev_id)
++{
++ unsigned long x;
++ unsigned long y;
++ int length = (ts.head_raw_fifo - ts.tail_raw_fifo) & (ts.extent - 1);
++ int scaled_avg_x;
++ int scaled_avg_y;
++
++ x = readl(base_addr + S3C2410_ADCDAT0) & S3C2410_ADCDAT0_XPDATA_MASK;
++ y = readl(base_addr + S3C2410_ADCDAT1) & S3C2410_ADCDAT1_YPDATA_MASK;
++
++ if (!length)
++ goto store_sample;
++
++ scaled_avg_x = ts.raw_running_avg.x / length;
++ scaled_avg_y = ts.raw_running_avg.y / length;
++
++ /* we appear to accept every sample into both the running average FIFO
++ * and the summing average. BUT, if the last sample crossed a
++ * machine-set threshold, each time we do a beauty contest
++ * on the new sample comparing if it is closer to the running
++ * average and the previous sample. If it is closer to the previous
++ * suspicious sample, we assume the change is real and accept both
++ * if the new sample has returned to being closer to the average than
++ * the previous sample, we take the previous sample as an excursion
++ * and overwrite it in both the running average and summing average.
++ */
++
++ if (ts.flag_previous_exceeded_threshold)
++ /* new one closer to "nonconformist" previous, or average?
++ * Pythagoras? Who? Don't need it because large excursion
++ * will be accounted for correctly this way
++ */
++ if ((abs(x - scaled_avg_x) + abs(y - scaled_avg_y)) <
++ (abs(x - ts.raw_sample_fifo[(ts.head_raw_fifo - 1) &
++ (ts.extent - 1)].x) +
++ abs(y - ts.raw_sample_fifo[(ts.head_raw_fifo - 1) &
++ (ts.extent - 1)].y))) {
++ /* it's closer to average, reject previous as a one-
++ * shot excursion, by overwriting it
++ */
++ ts.xp += x - ts.raw_sample_fifo[(ts.head_raw_fifo - 1) &
++ (ts.extent - 1)].x;
++ ts.yp += y - ts.raw_sample_fifo[(ts.head_raw_fifo - 1) &
++ (ts.extent - 1)].y;
++ ts.raw_sample_fifo[(ts.head_raw_fifo - 1) &
++ (ts.extent - 1)].x = x;
++ ts.raw_sample_fifo[(ts.head_raw_fifo - 1) &
++ (ts.extent - 1)].y = y;
++ /* no new sample: replaced previous, so we are done */
++ goto completed;
++ }
++ /* else it was closer to nonconformist previous: it's likely
++ * a genuine consistent move then.
++ * Keep previous and add new guy.
++ */
++
++ if ((x >= scaled_avg_x - ts.reject_threshold_vs_avg) &&
++ (x <= scaled_avg_x + ts.reject_threshold_vs_avg) &&
++ (y >= scaled_avg_y - ts.reject_threshold_vs_avg) &&
++ (y <= scaled_avg_y + ts.reject_threshold_vs_avg))
++ ts.flag_previous_exceeded_threshold = 0;
++ else
++ ts.flag_previous_exceeded_threshold = 1;
++
++store_sample:
++ ts.xp += x;
++ ts.yp += y;
++ ts.count++;
++
++ /* remove oldest sample from avg when we have full pipeline */
++ if (((ts.head_raw_fifo + 1) & (ts.extent - 1)) == ts.tail_raw_fifo) {
++ ts.raw_running_avg.x -= ts.raw_sample_fifo[ts.tail_raw_fifo].x;
++ ts.raw_running_avg.y -= ts.raw_sample_fifo[ts.tail_raw_fifo].y;
++ ts.tail_raw_fifo = (ts.tail_raw_fifo + 1) & (ts.extent - 1);
++ }
++ /* always add current sample to fifo and average */
++ ts.raw_sample_fifo[ts.head_raw_fifo].x = x;
++ ts.raw_sample_fifo[ts.head_raw_fifo].y = y;
++ ts.raw_running_avg.x += x;
++ ts.raw_running_avg.y += y;
++ ts.head_raw_fifo = (ts.head_raw_fifo + 1) & (ts.extent - 1);
++
++completed:
++ if (ts.count >= (1 << ts.shift)) {
++ mod_timer(&touch_timer, jiffies + 1);
++ writel(WAIT4INT(1), base_addr+S3C2410_ADCTSC);
++ goto bail;
++ }
++
++ writel(S3C2410_ADCTSC_PULL_UP_DISABLE | AUTOPST,
++ base_addr+S3C2410_ADCTSC);
++ writel(readl(base_addr+S3C2410_ADCCON) |
++ S3C2410_ADCCON_ENABLE_START, base_addr+S3C2410_ADCCON);
++
++bail:
++ return IRQ_HANDLED;
++}
++
++static struct clk *adc_clock;
++
++/*
++ * The functions for inserting/removing us as a module.
++ */
++
++static int __init s3c2410ts_probe(struct platform_device *pdev)
++{
++ int rc;
++ struct s3c2410_ts_mach_info *info;
++ struct input_dev *input_dev;
++
++ info = (struct s3c2410_ts_mach_info *)pdev->dev.platform_data;
++
++ if (!info)
++ {
++ dev_err(&pdev->dev, "Hm... too bad: no platform data for ts\n");
++ return -EINVAL;
++ }
++
++#ifdef CONFIG_TOUCHSCREEN_S3C2410_DEBUG
++ printk(DEBUG_LVL "Entering s3c2410ts_init\n");
++#endif
++
++ adc_clock = clk_get(NULL, "adc");
++ if (!adc_clock) {
++ dev_err(&pdev->dev, "failed to get adc clock source\n");
++ return -ENOENT;
++ }
++ clk_enable(adc_clock);
++
++#ifdef CONFIG_TOUCHSCREEN_S3C2410_DEBUG
++ printk(DEBUG_LVL "got and enabled clock\n");
++#endif
++
++ base_addr = ioremap(S3C2410_PA_ADC,0x20);
++ if (base_addr == NULL) {
++ dev_err(&pdev->dev, "Failed to remap register block\n");
++ return -ENOMEM;
++ }
++
++
++ /* If we acutally are a S3C2410: Configure GPIOs */
++ if (!strcmp(pdev->name, "s3c2410-ts"))
++ s3c2410_ts_connect();
++
++ if ((info->presc & 0xff) > 0)
++ writel(S3C2410_ADCCON_PRSCEN |
++ S3C2410_ADCCON_PRSCVL(info->presc&0xFF),
++ base_addr + S3C2410_ADCCON);
++ else
++ writel(0, base_addr+S3C2410_ADCCON);
++
++
++ /* Initialise registers */
++ if ((info->delay & 0xffff) > 0)
++ writel(info->delay & 0xffff, base_addr + S3C2410_ADCDLY);
++
++ writel(WAIT4INT(0), base_addr + S3C2410_ADCTSC);
++
++ /* Initialise input stuff */
++ memset(&ts, 0, sizeof(struct s3c2410ts));
++ input_dev = input_allocate_device();
++
++ if (!input_dev) {
++ dev_err(&pdev->dev, "Unable to allocate the input device\n");
++ return -ENOMEM;
++ }
++
++ ts.dev = input_dev;
++ ts.dev->evbit[0] = BIT_MASK(EV_SYN) | BIT_MASK(EV_KEY) |
++ BIT_MASK(EV_ABS);
++ ts.dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
++ input_set_abs_params(ts.dev, ABS_X, 0, 0x3FF, 0, 0);
++ input_set_abs_params(ts.dev, ABS_Y, 0, 0x3FF, 0, 0);
++ input_set_abs_params(ts.dev, ABS_PRESSURE, 0, 1, 0, 0);
++
++ ts.dev->private = &ts;
++ ts.dev->name = s3c2410ts_name;
++ ts.dev->id.bustype = BUS_RS232;
++ ts.dev->id.vendor = 0xDEAD;
++ ts.dev->id.product = 0xBEEF;
++ ts.dev->id.version = S3C2410TSVERSION;
++
++ ts.shift = info->oversampling_shift;
++ ts.extent = 1 << info->oversampling_shift;
++ ts.reject_threshold_vs_avg = info->reject_threshold_vs_avg;
++ ts.excursion_filter_len = 1 << info->excursion_filter_len_bits;
++
++ ts.raw_sample_fifo = kmalloc(sizeof(struct s3c2410ts_sample) *
++ ts.excursion_filter_len, GFP_KERNEL);
++ clear_raw_fifo();
++
++ /* Get irqs */
++ if (request_irq(IRQ_ADC, stylus_action, IRQF_SAMPLE_RANDOM,
++ "s3c2410_action", ts.dev)) {
++ dev_err(&pdev->dev, "Could not allocate ts IRQ_ADC !\n");
++ iounmap(base_addr);
++ return -EIO;
++ }
++ if (request_irq(IRQ_TC, stylus_updown, IRQF_SAMPLE_RANDOM,
++ "s3c2410_action", ts.dev)) {
++ dev_err(&pdev->dev, "Could not allocate ts IRQ_TC !\n");
++ free_irq(IRQ_ADC, ts.dev);
++ iounmap(base_addr);
++ return -EIO;
++ }
++
++ dev_info(&pdev->dev, "successfully loaded\n");
++
++ /* All went ok, so register to the input system */
++ rc = input_register_device(ts.dev);
++ if (rc) {
++ free_irq(IRQ_TC, ts.dev);
++ free_irq(IRQ_ADC, ts.dev);
++ clk_disable(adc_clock);
++ iounmap(base_addr);
++ return -EIO;
++ }
++
++ return 0;
++}
++
++static int s3c2410ts_remove(struct platform_device *pdev)
++{
++ disable_irq(IRQ_ADC);
++ disable_irq(IRQ_TC);
++ free_irq(IRQ_TC,ts.dev);
++ free_irq(IRQ_ADC,ts.dev);
++
++ if (adc_clock) {
++ clk_disable(adc_clock);
++ clk_put(adc_clock);
++ adc_clock = NULL;
++ }
++
++ kfree(ts.raw_sample_fifo);
++
++ input_unregister_device(ts.dev);
++ iounmap(base_addr);
++
++ return 0;
++}
++
++#ifdef CONFIG_PM
++static int s3c2410ts_suspend(struct platform_device *pdev, pm_message_t state)
++{
++ writel(TSC_SLEEP, base_addr+S3C2410_ADCTSC);
++ writel(readl(base_addr+S3C2410_ADCCON) | S3C2410_ADCCON_STDBM,
++ base_addr+S3C2410_ADCCON);
++
++ disable_irq(IRQ_ADC);
++ disable_irq(IRQ_TC);
++
++ clk_disable(adc_clock);
++
++ return 0;
++}
++
++static int s3c2410ts_resume(struct platform_device *pdev)
++{
++ struct s3c2410_ts_mach_info *info =
++ ( struct s3c2410_ts_mach_info *)pdev->dev.platform_data;
++
++ clk_enable(adc_clock);
++ mdelay(1);
++
++ clear_raw_fifo();
++
++ enable_irq(IRQ_ADC);
++ enable_irq(IRQ_TC);
++
++ if ((info->presc&0xff) > 0)
++ writel(S3C2410_ADCCON_PRSCEN |
++ S3C2410_ADCCON_PRSCVL(info->presc&0xFF),
++ base_addr+S3C2410_ADCCON);
++ else
++ writel(0,base_addr+S3C2410_ADCCON);
++
++ /* Initialise registers */
++ if ((info->delay & 0xffff) > 0)
++ writel(info->delay & 0xffff, base_addr+S3C2410_ADCDLY);
++
++ writel(WAIT4INT(0), base_addr+S3C2410_ADCTSC);
++
++ return 0;
++}
++
++#else
++#define s3c2410ts_suspend NULL
++#define s3c2410ts_resume NULL
++#endif
++
++static struct platform_driver s3c2410ts_driver = {
++ .driver = {
++ .name = "s3c2410-ts",
++ .owner = THIS_MODULE,
++ },
++ .probe = s3c2410ts_probe,
++ .remove = s3c2410ts_remove,
++ .suspend = s3c2410ts_suspend,
++ .resume = s3c2410ts_resume,
++
++};
++
++static struct platform_driver s3c2440ts_driver = {
++ .driver = {
++ .name = "s3c2440-ts",
++ .owner = THIS_MODULE,
++ },
++ .probe = s3c2410ts_probe,
++ .remove = s3c2410ts_remove,
++ .suspend = s3c2410ts_suspend,
++ .resume = s3c2410ts_resume,
++
++};
++
++static int __init s3c2410ts_init(void)
++{
++ int rc;
++
++ rc = platform_driver_register(&s3c2410ts_driver);
++ if (rc < 0)
++ return rc;
++
++ rc = platform_driver_register(&s3c2440ts_driver);
++ if (rc < 0)
++ platform_driver_unregister(&s3c2410ts_driver);
++
++ return rc;
++}
++
++static void __exit s3c2410ts_exit(void)
++{
++ platform_driver_unregister(&s3c2440ts_driver);
++ platform_driver_unregister(&s3c2410ts_driver);
++}
++
++module_init(s3c2410ts_init);
++module_exit(s3c2410ts_exit);
++
++/*
++ Local variables:
++ compile-command: "make ARCH=arm CROSS_COMPILE=/usr/local/arm/3.3.2/bin/arm-linux- -k -C ../../.."
++ c-basic-offset: 8
++ End:
++*/
+Index: linux-2.6.24.7/drivers/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -74,6 +74,8 @@ source "drivers/hid/Kconfig"
+
+ source "drivers/usb/Kconfig"
+
++source "drivers/sdio/Kconfig"
++
+ source "drivers/mmc/Kconfig"
+
+ source "drivers/leds/Kconfig"
+Index: linux-2.6.24.7/drivers/leds/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/leds/Kconfig 2008-12-11 22:46:09.000000000 +0100
++++ linux-2.6.24.7/drivers/leds/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -57,7 +57,7 @@ config LEDS_TOSA
+
+ config LEDS_S3C24XX
+ tristate "LED Support for Samsung S3C24XX GPIO LEDs"
+- depends on LEDS_CLASS && ARCH_S3C2410
++ depends on LEDS_CLASS && ARCH_S3C2410 && S3C2410_PWM
+ help
+ This option enables support for LEDs connected to GPIO lines
+ on Samsung S3C24XX series CPUs, such as the S3C2410 and S3C2440.
+@@ -120,6 +120,19 @@ config LEDS_CM_X270
+ help
+ This option enables support for the CM-X270 LEDs.
+
++config LEDS_NEO1973_VIBRATOR
++ tristate "Vibrator Support for the FIC Neo1973 GSM phone"
++ depends on LEDS_CLASS && MACH_NEO1973
++ select S3C2440_C_FIQ
++ help
++ This option enables support for the vibrator on the FIC Neo1973.
++
++config LEDS_NEO1973_GTA02
++ tristate "LED Support for the FIC Neo1973 (GTA02)"
++ depends on LEDS_CLASS && MACH_NEO1973_GTA02
++ help
++ This option enables support for the LEDs on the FIC Neo1973.
++
+ comment "LED Triggers"
+
+ config LEDS_TRIGGERS
+Index: linux-2.6.24.7/drivers/leds/leds-neo1973-gta02.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/leds/leds-neo1973-gta02.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,231 @@
++/*
++ * LED driver for the FIC Neo1973 GTA02 GSM phone
++ *
++ * (C) 2006-2007 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/leds.h>
++#include <asm/hardware.h>
++#include <asm/mach-types.h>
++#include <asm/arch/pwm.h>
++#include <asm/arch/gta02.h>
++#include <asm/plat-s3c/regs-timer.h>
++#include <asm/plat-s3c24xx/neo1973.h>
++
++#define MAX_LEDS 3
++#define COUNTER 256
++
++struct gta02_led_priv
++{
++ spinlock_t lock;
++ struct led_classdev cdev;
++ struct s3c2410_pwm pwm;
++ unsigned int gpio;
++ unsigned int has_pwm;
++};
++
++struct gta02_led_bundle
++{
++ int num_leds;
++ struct gta02_led_priv led[MAX_LEDS];
++};
++
++static inline struct gta02_led_priv *to_priv(struct led_classdev *led_cdev)
++{
++ return container_of(led_cdev, struct gta02_led_priv, cdev);
++}
++
++static inline struct gta02_led_bundle *to_bundle(struct led_classdev *led_cdev)
++{
++ return dev_get_drvdata(led_cdev->dev->parent);
++}
++
++static void gta02led_set(struct led_classdev *led_cdev,
++ enum led_brightness value)
++{
++ unsigned long flags;
++ struct gta02_led_priv *lp = to_priv(led_cdev);
++
++ /*
++ * value == 255 -> 99% duty cycle (full power)
++ * value == 128 -> 50% duty cycle (medium power)
++ * value == 0 -> 0% duty cycle (zero power)
++ */
++ spin_lock_irqsave(&lp->lock, flags);
++
++ if (lp->has_pwm) {
++ s3c2410_pwm_duty_cycle(value, &lp->pwm);
++ } else {
++ neo1973_gpb_setpin(lp->gpio, value ? 1 : 0);
++ }
++
++ spin_unlock_irqrestore(&lp->lock, flags);
++}
++
++#ifdef CONFIG_PM
++static int gta02led_suspend(struct platform_device *pdev, pm_message_t state)
++{
++ struct gta02_led_bundle *bundle = platform_get_drvdata(pdev);
++ int i;
++
++ for (i = 0; i < bundle->num_leds; i++)
++ led_classdev_suspend(&bundle->led[i].cdev);
++
++ return 0;
++}
++
++static int gta02led_resume(struct platform_device *pdev)
++{
++ struct gta02_led_bundle *bundle = platform_get_drvdata(pdev);
++ int i;
++
++ for (i = 0; i < bundle->num_leds; i++)
++ led_classdev_resume(&bundle->led[i].cdev);
++
++ return 0;
++}
++#endif
++
++static int __init gta02led_probe(struct platform_device *pdev)
++{
++ int i, rc;
++ struct gta02_led_bundle *bundle;
++
++ if (!machine_is_neo1973_gta02())
++ return -EIO;
++
++ bundle = kzalloc(sizeof(struct gta02_led_bundle), GFP_KERNEL);
++ if (!bundle)
++ return -ENOMEM;
++ platform_set_drvdata(pdev, bundle);
++
++ for (i = 0; i < pdev->num_resources; i++) {
++ struct gta02_led_priv *lp;
++ struct resource *r;
++
++ if (i >= MAX_LEDS)
++ break;
++
++ r = platform_get_resource(pdev, 0, i);
++ if (!r || !r->start || !r->name)
++ continue;
++
++ lp = &bundle->led[i];
++
++ lp->gpio = r->start;
++ lp->cdev.name = r->name;
++ lp->cdev.brightness_set = gta02led_set;
++
++ switch (lp->gpio) {
++ case S3C2410_GPB0:
++ lp->has_pwm = 1;
++ lp->pwm.timerid = PWM0;
++ s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPB0_TOUT0);
++ break;
++ case S3C2410_GPB1:
++ lp->has_pwm = 1;
++ lp->pwm.timerid = PWM1;
++ s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPB1_TOUT1);
++ break;
++ case S3C2410_GPB2:
++ lp->has_pwm = 1;
++ lp->pwm.timerid = PWM2;
++ s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPB2_TOUT2);
++ break;
++ case S3C2410_GPB3:
++ lp->has_pwm = 1;
++ lp->pwm.timerid = PWM3;
++ s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPB3_TOUT3);
++ break;
++ default:
++ break;
++ }
++
++ lp->pwm.prescaler = 0;
++ lp->pwm.divider = S3C2410_TCFG1_MUX3_DIV8;
++ lp->pwm.counter = COUNTER;
++ lp->pwm.comparer = COUNTER;
++ s3c2410_pwm_enable(&lp->pwm);
++ s3c2410_pwm_start(&lp->pwm);
++
++ switch (lp->gpio) {
++ case S3C2410_GPB0:
++ case S3C2410_GPB1:
++ case S3C2410_GPB2:
++ case S3C2410_GPB3:
++ lp->has_pwm = 0;
++ s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPIO_OUTPUT);
++ neo1973_gpb_add_shadow_gpio(lp->gpio);
++ break;
++ default:
++ break;
++ }
++
++ spin_lock_init(&lp->lock);
++ rc = led_classdev_register(&pdev->dev, &lp->cdev);
++ }
++
++ bundle->num_leds = i;
++
++ return 0;
++}
++
++static int gta02led_remove(struct platform_device *pdev)
++{
++ struct gta02_led_bundle *bundle = platform_get_drvdata(pdev);
++ int i;
++
++ for (i = 0; i < bundle->num_leds; i++) {
++ struct gta02_led_priv *lp = &bundle->led[i];
++ if (lp->has_pwm)
++ s3c2410_pwm_disable(&lp->pwm);
++ else
++ gta02led_set(&lp->cdev, 0);
++
++ led_classdev_unregister(&lp->cdev);
++ }
++
++ platform_set_drvdata(pdev, NULL);
++ kfree(bundle);
++
++ return 0;
++}
++
++static struct platform_driver gta02led_driver = {
++ .probe = gta02led_probe,
++ .remove = gta02led_remove,
++#ifdef CONFIG_PM
++ .suspend = gta02led_suspend,
++ .resume = gta02led_resume,
++#endif
++ .driver = {
++ .name = "gta02-led",
++ },
++};
++
++static int __init gta02led_init(void)
++{
++ return platform_driver_register(>a02led_driver);
++}
++
++static void __exit gta02led_exit(void)
++{
++ platform_driver_unregister(>a02led_driver);
++}
++
++module_init(gta02led_init);
++module_exit(gta02led_exit);
++
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
++MODULE_DESCRIPTION("FIC Neo1973 GTA02 LED driver");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.24.7/drivers/leds/leds-neo1973-vibrator.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/leds/leds-neo1973-vibrator.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,202 @@
++/*
++ * LED driver for the vibrator of the FIC Neo1973 GSM Phone
++ *
++ * (C) 2006-2007 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Javi Roman <javiroman@kernel-labs.org>:
++ * Implement PWM support for GTA01Bv4 and later
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/leds.h>
++#include <asm/hardware.h>
++#include <asm/mach-types.h>
++#include <asm/arch/pwm.h>
++#include <asm/arch/gta01.h>
++#include <asm/plat-s3c/regs-timer.h>
++
++#include <asm/arch-s3c2410/fiq_ipc_gta02.h>
++#include <asm/plat-s3c24xx/neo1973.h>
++
++#define COUNTER 64
++
++struct neo1973_vib_priv {
++ struct led_classdev cdev;
++ unsigned int gpio;
++ struct mutex mutex;
++ unsigned int has_pwm;
++ struct s3c2410_pwm pwm;
++};
++
++static void neo1973_vib_vib_set(struct led_classdev *led_cdev,
++ enum led_brightness value)
++{
++ struct neo1973_vib_priv *vp =
++ container_of(led_cdev, struct neo1973_vib_priv, cdev);
++
++ if (machine_is_neo1973_gta02()) { /* use FIQ to control GPIO */
++ fiq_ipc.vib_pwm = value; /* set it for FIQ */
++ fiq_kick(); /* start up FIQs if not already going */
++ return;
++ }
++ /*
++ * value == 255 -> 99% duty cycle (full power)
++ * value == 128 -> 50% duty cycle (medium power)
++ * value == 0 -> 0% duty cycle (zero power)
++ */
++ mutex_lock(&vp->mutex);
++ if (vp->has_pwm)
++ s3c2410_pwm_duty_cycle(value / 4, &vp->pwm);
++ else {
++ if (value)
++ neo1973_gpb_setpin(vp->gpio, 1);
++ else
++ neo1973_gpb_setpin(vp->gpio, 0);
++ }
++
++ mutex_unlock(&vp->mutex);
++}
++
++static struct neo1973_vib_priv neo1973_vib_led = {
++ .cdev = {
++ .name = "neo1973:vibrator",
++ .brightness_set = neo1973_vib_vib_set,
++ },
++};
++
++static int neo1973_vib_init_hw(struct neo1973_vib_priv *vp)
++{
++ int rc;
++
++ rc = s3c2410_pwm_init(&vp->pwm);
++ if (rc)
++ return rc;
++
++ vp->pwm.timerid = PWM3;
++ /* use same prescaler as arch/arm/plat-s3c24xx/time.c */
++ vp->pwm.prescaler = (6 - 1) / 2;
++ vp->pwm.divider = S3C2410_TCFG1_MUX3_DIV2;
++ vp->pwm.counter = COUNTER;
++ vp->pwm.comparer = COUNTER;
++
++ rc = s3c2410_pwm_enable(&vp->pwm);
++ if (rc)
++ return rc;
++
++ s3c2410_pwm_start(&vp->pwm);
++
++ return 0;
++}
++
++#ifdef CONFIG_PM
++static int neo1973_vib_suspend(struct platform_device *dev, pm_message_t state)
++{
++ led_classdev_suspend(&neo1973_vib_led.cdev);
++ return 0;
++}
++
++static int neo1973_vib_resume(struct platform_device *dev)
++{
++ struct neo1973_vib_priv *vp = platform_get_drvdata(dev);
++
++ if (vp->has_pwm)
++ neo1973_vib_init_hw(vp);
++
++ led_classdev_resume(&neo1973_vib_led.cdev);
++
++ return 0;
++}
++#endif /* CONFIG_PM */
++
++static int __init neo1973_vib_probe(struct platform_device *pdev)
++{
++ struct resource *r;
++ int rc;
++
++ if (!machine_is_neo1973_gta01() && !machine_is_neo1973_gta02())
++ return -EIO;
++
++ r = platform_get_resource(pdev, 0, 0);
++ if (!r || !r->start)
++ return -EIO;
++
++ neo1973_vib_led.gpio = r->start;
++ platform_set_drvdata(pdev, &neo1973_vib_led);
++
++ if (machine_is_neo1973_gta02()) { /* use FIQ to control GPIO */
++ neo1973_gpb_setpin(neo1973_vib_led.gpio, 0); /* off */
++ s3c2410_gpio_cfgpin(neo1973_vib_led.gpio, S3C2410_GPIO_OUTPUT);
++ /* safe, kmalloc'd copy needed for FIQ ISR */
++ fiq_ipc.vib_gpio_pin = neo1973_vib_led.gpio;
++ fiq_ipc.vib_pwm = 0; /* off */
++ goto configured;
++ }
++
++ /* TOUT3 */
++ if (neo1973_vib_led.gpio == S3C2410_GPB3) {
++ rc = neo1973_vib_init_hw(&neo1973_vib_led);
++ if (rc)
++ return rc;
++
++ s3c2410_pwm_duty_cycle(0, &neo1973_vib_led.pwm);
++ s3c2410_gpio_cfgpin(neo1973_vib_led.gpio, S3C2410_GPB3_TOUT3);
++ neo1973_vib_led.has_pwm = 1;
++ }
++configured:
++ mutex_init(&neo1973_vib_led.mutex);
++
++ return led_classdev_register(&pdev->dev, &neo1973_vib_led.cdev);
++}
++
++static int neo1973_vib_remove(struct platform_device *pdev)
++{
++ if (machine_is_neo1973_gta02()) /* use FIQ to control GPIO */
++ fiq_ipc.vib_pwm = 0; /* off */
++ /* would only need kick if already off so no kick needed */
++
++ if (neo1973_vib_led.has_pwm)
++ s3c2410_pwm_disable(&neo1973_vib_led.pwm);
++
++ led_classdev_unregister(&neo1973_vib_led.cdev);
++
++ mutex_destroy(&neo1973_vib_led.mutex);
++
++ return 0;
++}
++
++static struct platform_driver neo1973_vib_driver = {
++ .probe = neo1973_vib_probe,
++ .remove = neo1973_vib_remove,
++#ifdef CONFIG_PM
++ .suspend = neo1973_vib_suspend,
++ .resume = neo1973_vib_resume,
++#endif
++ .driver = {
++ .name = "neo1973-vibrator",
++ },
++};
++
++static int __init neo1973_vib_init(void)
++{
++ return platform_driver_register(&neo1973_vib_driver);
++}
++
++static void __exit neo1973_vib_exit(void)
++{
++ platform_driver_unregister(&neo1973_vib_driver);
++}
++
++module_init(neo1973_vib_init);
++module_exit(neo1973_vib_exit);
++
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
++MODULE_DESCRIPTION("FIC Neo1973 vibrator driver");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.24.7/drivers/leds/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/drivers/leds/Makefile 2008-12-11 22:46:09.000000000 +0100
++++ linux-2.6.24.7/drivers/leds/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -20,6 +20,8 @@ obj-$(CONFIG_LEDS_COBALT_QUBE) += leds-
+ obj-$(CONFIG_LEDS_COBALT_RAQ) += leds-cobalt-raq.o
+ obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o
+ obj-$(CONFIG_LEDS_CM_X270) += leds-cm-x270.o
++obj-$(CONFIG_LEDS_NEO1973_VIBRATOR) += leds-neo1973-vibrator.o
++obj-$(CONFIG_LEDS_NEO1973_GTA02) += leds-neo1973-gta02.o
+
+ # LED Triggers
+ obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o
+Index: linux-2.6.24.7/drivers/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/drivers/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -77,6 +77,7 @@ obj-$(CONFIG_LGUEST_GUEST) += lguest/
+ obj-$(CONFIG_CPU_FREQ) += cpufreq/
+ obj-$(CONFIG_CPU_IDLE) += cpuidle/
+ obj-$(CONFIG_MMC) += mmc/
++obj-$(CONFIG_SDIO) += sdio/
+ obj-$(CONFIG_NEW_LEDS) += leds/
+ obj-$(CONFIG_INFINIBAND) += infiniband/
+ obj-$(CONFIG_SGI_SN) += sn/
+Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-core.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/mfd/glamo/glamo-core.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,1340 @@
++/* Smedia Glamo 336x/337x driver
++ *
++ * (C) 2007 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/errno.h>
++#include <linux/string.h>
++#include <linux/mm.h>
++#include <linux/tty.h>
++#include <linux/slab.h>
++#include <linux/delay.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/irq.h>
++#include <linux/interrupt.h>
++#include <linux/workqueue.h>
++#include <linux/wait.h>
++#include <linux/platform_device.h>
++#include <linux/kernel_stat.h>
++#include <linux/spinlock.h>
++#include <linux/glamofb.h>
++#include <linux/mmc/mmc.h>
++#include <linux/mmc/host.h>
++
++#include <asm/io.h>
++#include <asm/uaccess.h>
++#include <asm/div64.h>
++
++#ifdef CONFIG_PM
++#include <linux/pm.h>
++#endif
++
++#include "glamo-regs.h"
++#include "glamo-core.h"
++
++#define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1)
++
++#define GLAMO_MEM_REFRESH_COUNT 0x100
++
++static struct glamo_core *glamo_handle;
++
++static inline void __reg_write(struct glamo_core *glamo,
++ u_int16_t reg, u_int16_t val)
++{
++ writew(val, glamo->base + reg);
++}
++
++static inline u_int16_t __reg_read(struct glamo_core *glamo,
++ u_int16_t reg)
++{
++ return readw(glamo->base + reg);
++}
++
++static void __reg_set_bit_mask(struct glamo_core *glamo,
++ u_int16_t reg, u_int16_t mask,
++ u_int16_t val)
++{
++ u_int16_t tmp;
++
++ val &= mask;
++
++ tmp = __reg_read(glamo, reg);
++ tmp &= ~mask;
++ tmp |= val;
++ __reg_write(glamo, reg, tmp);
++}
++
++static void reg_set_bit_mask(struct glamo_core *glamo,
++ u_int16_t reg, u_int16_t mask,
++ u_int16_t val)
++{
++ spin_lock(&glamo->lock);
++ __reg_set_bit_mask(glamo, reg, mask, val);
++ spin_unlock(&glamo->lock);
++}
++
++static inline void __reg_set_bit(struct glamo_core *glamo,
++ u_int16_t reg, u_int16_t bit)
++{
++ __reg_set_bit_mask(glamo, reg, bit, 0xffff);
++}
++
++static inline void __reg_clear_bit(struct glamo_core *glamo,
++ u_int16_t reg, u_int16_t bit)
++{
++ __reg_set_bit_mask(glamo, reg, bit, 0);
++}
++
++static inline void glamo_vmem_write(struct glamo_core *glamo, u_int32_t addr,
++ u_int16_t *src, int len)
++{
++ if (addr & 0x0001 || (unsigned long)src & 0x0001 || len & 0x0001) {
++ dev_err(&glamo->pdev->dev, "unaligned write(0x%08x, 0x%p, "
++ "0x%x)!!\n", addr, src, len);
++ }
++
++}
++
++static inline void glamo_vmem_read(struct glamo_core *glamo, u_int16_t *buf,
++ u_int32_t addr, int len)
++{
++ if (addr & 0x0001 || (unsigned long) buf & 0x0001 || len & 0x0001) {
++ dev_err(&glamo->pdev->dev, "unaligned read(0x%p, 0x08%x, "
++ "0x%x)!!\n", buf, addr, len);
++ }
++
++
++}
++
++/***********************************************************************
++ * resources of sibling devices
++ ***********************************************************************/
++
++#if 0
++static struct resource glamo_core_resources[] = {
++ {
++ .start = GLAMO_REGOFS_GENERIC,
++ .end = GLAMO_REGOFS_GENERIC + 0x400,
++ .flags = IORESOURCE_MEM,
++ }, {
++ .start = 0,
++ .end = 0,
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static struct platform_device glamo_core_dev = {
++ .name = "glamo-core",
++ .resource = &glamo_core_resources,
++ .num_resources = ARRAY_SIZE(glamo_core_resources),
++};
++#endif
++
++static struct resource glamo_jpeg_resources[] = {
++ {
++ .start = GLAMO_REGOFS_JPEG,
++ .end = GLAMO_REGOFS_MPEG - 1,
++ .flags = IORESOURCE_MEM,
++ }, {
++ .start = IRQ_GLAMO_JPEG,
++ .end = IRQ_GLAMO_JPEG,
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static struct platform_device glamo_jpeg_dev = {
++ .name = "glamo-jpeg",
++ .resource = glamo_jpeg_resources,
++ .num_resources = ARRAY_SIZE(glamo_jpeg_resources),
++};
++
++static struct resource glamo_mpeg_resources[] = {
++ {
++ .start = GLAMO_REGOFS_MPEG,
++ .end = GLAMO_REGOFS_LCD - 1,
++ .flags = IORESOURCE_MEM,
++ }, {
++ .start = IRQ_GLAMO_MPEG,
++ .end = IRQ_GLAMO_MPEG,
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static struct platform_device glamo_mpeg_dev = {
++ .name = "glamo-mpeg",
++ .resource = glamo_mpeg_resources,
++ .num_resources = ARRAY_SIZE(glamo_mpeg_resources),
++};
++
++static struct resource glamo_2d_resources[] = {
++ {
++ .start = GLAMO_REGOFS_2D,
++ .end = GLAMO_REGOFS_3D - 1,
++ .flags = IORESOURCE_MEM,
++ }, {
++ .start = IRQ_GLAMO_2D,
++ .end = IRQ_GLAMO_2D,
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static struct platform_device glamo_2d_dev = {
++ .name = "glamo-2d",
++ .resource = glamo_2d_resources,
++ .num_resources = ARRAY_SIZE(glamo_2d_resources),
++};
++
++static struct resource glamo_3d_resources[] = {
++ {
++ .start = GLAMO_REGOFS_3D,
++ .end = GLAMO_REGOFS_END - 1,
++ .flags = IORESOURCE_MEM,
++ },
++};
++
++static struct platform_device glamo_3d_dev = {
++ .name = "glamo-3d",
++ .resource = glamo_3d_resources,
++ .num_resources = ARRAY_SIZE(glamo_3d_resources),
++};
++
++static struct platform_device glamo_spigpio_dev = {
++ .name = "glamo-spi-gpio",
++};
++
++static struct resource glamo_fb_resources[] = {
++ /* FIXME: those need to be incremented by parent base */
++ {
++ .name = "glamo-fb-regs",
++ .start = GLAMO_REGOFS_LCD,
++ .end = GLAMO_REGOFS_MMC - 1,
++ .flags = IORESOURCE_MEM,
++ }, {
++ .name = "glamo-fb-mem",
++ .start = GLAMO_OFFSET_FB,
++ .end = GLAMO_OFFSET_FB + GLAMO_FB_SIZE - 1,
++ .flags = IORESOURCE_MEM,
++ },
++};
++
++static struct platform_device glamo_fb_dev = {
++ .name = "glamo-fb",
++ .resource = glamo_fb_resources,
++ .num_resources = ARRAY_SIZE(glamo_fb_resources),
++};
++
++static struct resource glamo_mmc_resources[] = {
++ {
++ /* FIXME: those need to be incremented by parent base */
++ .start = GLAMO_REGOFS_MMC,
++ .end = GLAMO_REGOFS_MPROC0 - 1,
++ .flags = IORESOURCE_MEM
++ }, {
++ .start = IRQ_GLAMO_MMC,
++ .end = IRQ_GLAMO_MMC,
++ .flags = IORESOURCE_IRQ,
++ }, { /* our data buffer for MMC transfers */
++ .start = GLAMO_OFFSET_FB + GLAMO_FB_SIZE,
++ .end = GLAMO_OFFSET_FB + GLAMO_FB_SIZE +
++ GLAMO_MMC_BUFFER_SIZE - 1,
++ .flags = IORESOURCE_MEM
++ },
++};
++
++static struct platform_device glamo_mmc_dev = {
++ .name = "glamo-mci",
++ .resource = glamo_mmc_resources,
++ .num_resources = ARRAY_SIZE(glamo_mmc_resources),
++};
++
++struct glamo_mci_pdata glamo_mci_def_pdata = {
++ .gpio_detect = 0,
++ .glamo_set_mci_power = NULL, /* filled in from MFD platform data */
++ .ocr_avail = MMC_VDD_20_21 |
++ MMC_VDD_21_22 |
++ MMC_VDD_22_23 |
++ MMC_VDD_23_24 |
++ MMC_VDD_24_25 |
++ MMC_VDD_25_26 |
++ MMC_VDD_26_27 |
++ MMC_VDD_27_28 |
++ MMC_VDD_28_29 |
++ MMC_VDD_29_30 |
++ MMC_VDD_30_31 |
++ MMC_VDD_32_33,
++ .glamo_irq_is_wired = NULL, /* filled in from MFD platform data */
++ .mci_suspending = NULL, /* filled in from MFD platform data */
++ .mci_all_dependencies_resumed = NULL, /* filled in from MFD plat data */
++};
++EXPORT_SYMBOL_GPL(glamo_mci_def_pdata);
++
++
++
++static void mangle_mem_resources(struct resource *res, int num_res,
++ struct resource *parent)
++{
++ int i;
++
++ for (i = 0; i < num_res; i++) {
++ if (res[i].flags != IORESOURCE_MEM)
++ continue;
++ res[i].start += parent->start;
++ res[i].end += parent->start;
++ res[i].parent = parent;
++ }
++}
++
++/***********************************************************************
++ * IRQ demultiplexer
++ ***********************************************************************/
++#define irq2glamo(x) (x - IRQ_GLAMO(0))
++
++static void glamo_ack_irq(unsigned int irq)
++{
++ /* clear interrupt source */
++ __reg_write(glamo_handle, GLAMO_REG_IRQ_CLEAR,
++ 1 << irq2glamo(irq));
++}
++
++static void glamo_mask_irq(unsigned int irq)
++{
++ u_int16_t tmp;
++
++ /* clear bit in enable register */
++ tmp = __reg_read(glamo_handle, GLAMO_REG_IRQ_ENABLE);
++ tmp &= ~(1 << irq2glamo(irq));
++ __reg_write(glamo_handle, GLAMO_REG_IRQ_ENABLE, tmp);
++}
++
++static void glamo_unmask_irq(unsigned int irq)
++{
++ u_int16_t tmp;
++
++ /* set bit in enable register */
++ tmp = __reg_read(glamo_handle, GLAMO_REG_IRQ_ENABLE);
++ tmp |= (1 << irq2glamo(irq));
++ __reg_write(glamo_handle, GLAMO_REG_IRQ_ENABLE, tmp);
++}
++
++static struct irq_chip glamo_irq_chip = {
++ .ack = glamo_ack_irq,
++ .mask = glamo_mask_irq,
++ .unmask = glamo_unmask_irq,
++};
++
++static void glamo_irq_demux_handler(unsigned int irq, struct irq_desc *desc)
++{
++ const unsigned int cpu = smp_processor_id();
++
++ spin_lock(&desc->lock);
++
++ desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
++
++ if (unlikely(desc->status & IRQ_INPROGRESS)) {
++ desc->status |= (IRQ_PENDING | IRQ_MASKED);
++ desc->chip->mask(irq);
++ desc->chip->ack(irq);
++ goto out_unlock;
++ }
++
++ kstat_cpu(cpu).irqs[irq]++;
++ desc->chip->ack(irq);
++ desc->status |= IRQ_INPROGRESS;
++
++ do {
++ u_int16_t irqstatus;
++ int i;
++
++ if (unlikely((desc->status &
++ (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
++ (IRQ_PENDING | IRQ_MASKED))) {
++ /* dealing with pending IRQ, unmasking */
++ desc->chip->unmask(irq);
++ desc->status &= ~IRQ_MASKED;
++ }
++
++ desc->status &= ~IRQ_PENDING;
++
++ /* read IRQ status register */
++ irqstatus = __reg_read(glamo_handle, GLAMO_REG_IRQ_STATUS);
++ for (i = 0; i < 9; i++)
++ if (irqstatus & (1 << i))
++ desc_handle_irq(IRQ_GLAMO(i),
++ irq_desc+IRQ_GLAMO(i));
++
++ } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
++
++ desc->status &= ~IRQ_INPROGRESS;
++
++out_unlock:
++ spin_unlock(&desc->lock);
++}
++
++/***********************************************************************
++ * 'engine' support
++ ***********************************************************************/
++
++int __glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine)
++{
++ switch (engine) {
++ case GLAMO_ENGINE_LCD:
++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_LCD,
++ GLAMO_CLOCK_LCD_EN_M5CLK |
++ GLAMO_CLOCK_LCD_EN_DHCLK |
++ GLAMO_CLOCK_LCD_EN_DMCLK |
++ GLAMO_CLOCK_LCD_EN_DCLK |
++ GLAMO_CLOCK_LCD_DG_M5CLK |
++ GLAMO_CLOCK_LCD_DG_DMCLK, 0xffff);
++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
++ GLAMO_CLOCK_GEN51_EN_DIV_DHCLK |
++ GLAMO_CLOCK_GEN51_EN_DIV_DMCLK |
++ GLAMO_CLOCK_GEN51_EN_DIV_DCLK, 0xffff);
++ __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
++ GLAMO_HOSTBUS2_MMIO_EN_LCD,
++ 0xffff);
++ break;
++ case GLAMO_ENGINE_MMC:
++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_MMC,
++ GLAMO_CLOCK_MMC_EN_M9CLK |
++ GLAMO_CLOCK_MMC_EN_TCLK |
++ GLAMO_CLOCK_MMC_DG_M9CLK |
++ GLAMO_CLOCK_MMC_DG_TCLK, 0xffff);
++ __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
++ GLAMO_HOSTBUS2_MMIO_EN_MMC,
++ GLAMO_HOSTBUS2_MMIO_EN_MMC);
++ break;
++ case GLAMO_ENGINE_2D:
++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_2D,
++ GLAMO_CLOCK_2D_EN_M7CLK |
++ GLAMO_CLOCK_2D_EN_GCLK |
++ GLAMO_CLOCK_2D_DG_M7CLK |
++ GLAMO_CLOCK_2D_DG_GCLK, 0xffff);
++ __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
++ GLAMO_HOSTBUS2_MMIO_EN_2D,
++ GLAMO_HOSTBUS2_MMIO_EN_2D);
++ break;
++ case GLAMO_ENGINE_CMDQ:
++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_2D,
++ GLAMO_CLOCK_2D_EN_M6CLK, 0xffff);
++ __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
++ GLAMO_HOSTBUS2_MMIO_EN_CQ,
++ GLAMO_HOSTBUS2_MMIO_EN_CQ);
++ break;
++ /* FIXME: Implementation */
++ default:
++ break;
++ }
++
++ glamo->engine_enabled_bitfield |= 1 << engine;
++
++ return 0;
++}
++
++int glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine)
++{
++ int ret;
++
++ spin_lock(&glamo->lock);
++
++ ret = __glamo_engine_enable(glamo, engine);
++
++ spin_unlock(&glamo->lock);
++
++ return ret;
++}
++EXPORT_SYMBOL_GPL(glamo_engine_enable);
++
++int __glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine)
++{
++ switch (engine) {
++ case GLAMO_ENGINE_LCD:
++ /* remove pixel clock to LCM */
++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_LCD,
++ GLAMO_CLOCK_LCD_EN_DCLK, 0);
++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_LCD,
++ GLAMO_CLOCK_LCD_EN_DHCLK |
++ GLAMO_CLOCK_LCD_EN_DMCLK, 0);
++ /* kill memory clock */
++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_LCD,
++ GLAMO_CLOCK_LCD_EN_M5CLK, 0);
++ /* stop dividing the clocks */
++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
++ GLAMO_CLOCK_GEN51_EN_DIV_DHCLK |
++ GLAMO_CLOCK_GEN51_EN_DIV_DMCLK |
++ GLAMO_CLOCK_GEN51_EN_DIV_DCLK, 0);
++ __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
++ GLAMO_HOSTBUS2_MMIO_EN_LCD, 0);
++ break;
++
++ case GLAMO_ENGINE_MMC:
++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_MMC, 0,
++ GLAMO_CLOCK_MMC_EN_M9CLK |
++ GLAMO_CLOCK_MMC_EN_TCLK |
++ GLAMO_CLOCK_MMC_DG_M9CLK |
++ GLAMO_CLOCK_MMC_DG_TCLK);
++ /* disable the TCLK divider clk input */
++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1, 0,
++ GLAMO_CLOCK_GEN51_EN_DIV_TCLK);
++ __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2), 0,
++ GLAMO_HOSTBUS2_MMIO_EN_MMC);
++ /* good idea to hold the thing in reset when we power it off? */
++/* writew(readw(glamo->base + GLAMO_REG_CLOCK_MMC) |
++ GLAMO_CLOCK_MMC_RESET, glamo->base + GLAMO_REG_CLOCK_MMC);
++*/
++ break;
++ default:
++ break;
++ }
++
++ glamo->engine_enabled_bitfield &= ~(1 << engine);
++
++ return 0;
++}
++int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine)
++{
++ int ret;
++
++ spin_lock(&glamo->lock);
++
++ ret = __glamo_engine_disable(glamo, engine);
++
++ spin_unlock(&glamo->lock);
++
++ return ret;
++}
++EXPORT_SYMBOL_GPL(glamo_engine_disable);
++
++static const u_int16_t engine_clock_regs[__NUM_GLAMO_ENGINES] = {
++ [GLAMO_ENGINE_LCD] = GLAMO_REG_CLOCK_LCD,
++ [GLAMO_ENGINE_MMC] = GLAMO_REG_CLOCK_MMC,
++ [GLAMO_ENGINE_ISP] = GLAMO_REG_CLOCK_ISP,
++ [GLAMO_ENGINE_JPEG] = GLAMO_REG_CLOCK_JPEG,
++ [GLAMO_ENGINE_3D] = GLAMO_REG_CLOCK_3D,
++ [GLAMO_ENGINE_2D] = GLAMO_REG_CLOCK_2D,
++ [GLAMO_ENGINE_MPEG_ENC] = GLAMO_REG_CLOCK_MPEG,
++ [GLAMO_ENGINE_MPEG_DEC] = GLAMO_REG_CLOCK_MPEG,
++};
++
++void glamo_engine_clkreg_set(struct glamo_core *glamo,
++ enum glamo_engine engine,
++ u_int16_t mask, u_int16_t val)
++{
++ reg_set_bit_mask(glamo, engine_clock_regs[engine], mask, val);
++}
++EXPORT_SYMBOL_GPL(glamo_engine_clkreg_set);
++
++u_int16_t glamo_engine_clkreg_get(struct glamo_core *glamo,
++ enum glamo_engine engine)
++{
++ u_int16_t val;
++
++ spin_lock(&glamo->lock);
++ val = __reg_read(glamo, engine_clock_regs[engine]);
++ spin_unlock(&glamo->lock);
++
++ return val;
++}
++EXPORT_SYMBOL_GPL(glamo_engine_clkreg_get);
++
++struct glamo_script reset_regs[] = {
++ [GLAMO_ENGINE_LCD] = {
++ GLAMO_REG_CLOCK_LCD, GLAMO_CLOCK_LCD_RESET
++ },
++#if 0
++ [GLAMO_ENGINE_HOST] = {
++ GLAMO_REG_CLOCK_HOST, GLAMO_CLOCK_HOST_RESET
++ },
++ [GLAMO_ENGINE_MEM] = {
++ GLAMO_REG_CLOCK_MEM, GLAMO_CLOCK_MEM_RESET
++ },
++#endif
++ [GLAMO_ENGINE_MMC] = {
++ GLAMO_REG_CLOCK_MMC, GLAMO_CLOCK_MMC_RESET
++ },
++ [GLAMO_ENGINE_2D] = {
++ GLAMO_REG_CLOCK_2D, GLAMO_CLOCK_2D_RESET
++ },
++ [GLAMO_ENGINE_JPEG] = {
++ GLAMO_REG_CLOCK_JPEG, GLAMO_CLOCK_JPEG_RESET
++ },
++};
++
++void glamo_engine_reset(struct glamo_core *glamo, enum glamo_engine engine)
++{
++ struct glamo_script *rst;
++
++ if (engine >= ARRAY_SIZE(reset_regs)) {
++ dev_warn(&glamo->pdev->dev, "unknown engine %u ", engine);
++ return;
++ }
++
++ rst = &reset_regs[engine];
++
++ spin_lock(&glamo->lock);
++ __reg_set_bit(glamo, rst->reg, rst->val);
++ spin_unlock(&glamo->lock);
++
++ msleep(1);
++
++ spin_lock(&glamo->lock);
++ __reg_clear_bit(glamo, rst->reg, rst->val);
++ spin_unlock(&glamo->lock);
++
++ msleep(1);
++}
++EXPORT_SYMBOL_GPL(glamo_engine_reset);
++
++void glamo_lcm_reset(int level)
++{
++ if (!glamo_handle)
++ return;
++
++ glamo_gpio_setpin(glamo_handle, GLAMO_GPIO4, level);
++ glamo_gpio_cfgpin(glamo_handle, GLAMO_GPIO4_OUTPUT);
++
++}
++EXPORT_SYMBOL_GPL(glamo_lcm_reset);
++
++enum glamo_pll {
++ GLAMO_PLL1,
++ GLAMO_PLL2,
++};
++
++static int glamo_pll_rate(struct glamo_core *glamo,
++ enum glamo_pll pll)
++{
++ u_int16_t reg;
++ unsigned int div = 512;
++ /* FIXME: move osci into platform_data */
++ unsigned int osci = 32768;
++
++ if (osci == 32768)
++ div = 1;
++
++ switch (pll) {
++ case GLAMO_PLL1:
++ reg = __reg_read(glamo, GLAMO_REG_PLL_GEN1);
++ break;
++ case GLAMO_PLL2:
++ reg = __reg_read(glamo, GLAMO_REG_PLL_GEN3);
++ break;
++ default:
++ return -EINVAL;
++ }
++ return (osci/div)*reg;
++}
++
++int glamo_engine_reclock(struct glamo_core *glamo,
++ enum glamo_engine engine,
++ int ps)
++{
++ int pll, khz;
++ u_int16_t reg, mask, val = 0;
++
++ if (!ps)
++ return 0;
++
++ switch (engine) {
++ case GLAMO_ENGINE_LCD:
++ pll = GLAMO_PLL1;
++ reg = GLAMO_REG_CLOCK_GEN7;
++ mask = 0xff;
++ break;
++ default:
++ dev_warn(&glamo->pdev->dev,
++ "reclock of engine 0x%x not supported\n", engine);
++ return -EINVAL;
++ break;
++ }
++
++ pll = glamo_pll_rate(glamo, pll);
++ khz = 1000000000UL / ps;
++
++ if (khz)
++ val = (pll / khz) / 1000;
++
++ dev_dbg(&glamo->pdev->dev,
++ "PLL %d, kHZ %d, div %d\n", pll, khz, val);
++
++ if (val) {
++ val--;
++ reg_set_bit_mask(glamo, reg, mask, val);
++ mdelay(5); /* wait some time to stabilize */
++
++ return 0;
++ } else {
++ return -EINVAL;
++ }
++}
++EXPORT_SYMBOL_GPL(glamo_engine_reclock);
++
++/***********************************************************************
++ * script support
++ ***********************************************************************/
++
++int glamo_run_script(struct glamo_core *glamo, struct glamo_script *script,
++ int len, int may_sleep)
++{
++ int i;
++
++ for (i = 0; i < len; i++) {
++ struct glamo_script *line = &script[i];
++
++ switch (line->reg) {
++ case 0xffff:
++ return 0;
++ case 0xfffe:
++ if (may_sleep)
++ msleep(line->val);
++ else
++ mdelay(line->val * 4);
++ break;
++ case 0xfffd:
++ /* spin until PLLs lock */
++ while ((__reg_read(glamo, GLAMO_REG_PLL_GEN5) & 3) != 3)
++ ;
++ break;
++ default:
++ __reg_write(glamo, script[i].reg, script[i].val);
++ break;
++ }
++ }
++
++ return 0;
++}
++EXPORT_SYMBOL(glamo_run_script);
++
++static struct glamo_script glamo_init_script[] = {
++ { GLAMO_REG_CLOCK_HOST, 0x1000 },
++ { 0xfffe, 2 },
++ { GLAMO_REG_CLOCK_MEMORY, 0x1000 },
++ { GLAMO_REG_CLOCK_MEMORY, 0x2000 },
++ { GLAMO_REG_CLOCK_LCD, 0x1000 },
++ { GLAMO_REG_CLOCK_MMC, 0x1000 },
++ { GLAMO_REG_CLOCK_ISP, 0x1000 },
++ { GLAMO_REG_CLOCK_ISP, 0x3000 },
++ { GLAMO_REG_CLOCK_JPEG, 0x1000 },
++ { GLAMO_REG_CLOCK_3D, 0x1000 },
++ { GLAMO_REG_CLOCK_3D, 0x3000 },
++ { GLAMO_REG_CLOCK_2D, 0x1000 },
++ { GLAMO_REG_CLOCK_2D, 0x3000 },
++ { GLAMO_REG_CLOCK_RISC1, 0x1000 },
++ { GLAMO_REG_CLOCK_MPEG, 0x3000 },
++ { GLAMO_REG_CLOCK_MPEG, 0x3000 },
++ { GLAMO_REG_CLOCK_MPROC, 0x1000 /*0x100f*/ },
++ { 0xfffe, 2 },
++ { GLAMO_REG_CLOCK_HOST, 0x0000 },
++ { GLAMO_REG_CLOCK_MEMORY, 0x0000 },
++ { GLAMO_REG_CLOCK_LCD, 0x0000 },
++ { GLAMO_REG_CLOCK_MMC, 0x0000 },
++#if 0
++/* unused engines must be left in reset to stop MMC block read "blackouts" */
++ { GLAMO_REG_CLOCK_ISP, 0x0000 },
++ { GLAMO_REG_CLOCK_ISP, 0x0000 },
++ { GLAMO_REG_CLOCK_JPEG, 0x0000 },
++ { GLAMO_REG_CLOCK_3D, 0x0000 },
++ { GLAMO_REG_CLOCK_3D, 0x0000 },
++ { GLAMO_REG_CLOCK_2D, 0x0000 },
++ { GLAMO_REG_CLOCK_2D, 0x0000 },
++ { GLAMO_REG_CLOCK_RISC1, 0x0000 },
++ { GLAMO_REG_CLOCK_MPEG, 0x0000 },
++ { GLAMO_REG_CLOCK_MPEG, 0x0000 },
++#endif
++ { GLAMO_REG_PLL_GEN1, 0x05db }, /* 48MHz */
++ { GLAMO_REG_PLL_GEN3, 0x0aba }, /* 90MHz */
++ { 0xfffd, 0 },
++ /*
++ * b9 of this register MUST be zero to get any interrupts on INT#
++ * the other set bits enable all the engine interrupt sources
++ */
++ { GLAMO_REG_IRQ_ENABLE, 0x01ff },
++ { GLAMO_REG_CLOCK_GEN6, 0x2000 },
++ { GLAMO_REG_CLOCK_GEN7, 0x0101 },
++ { GLAMO_REG_CLOCK_GEN8, 0x0100 },
++ { GLAMO_REG_CLOCK_HOST, 0x000d },
++ { 0x200, 0x0ef0 },
++ { 0x202, 0x07ff },
++ { 0x212, 0x0000 },
++ { 0x214, 0x4000 },
++ { 0x216, 0xf00e },
++
++ /* S-Media recommended "set tiling mode to 512 mode for memory access
++ * more efficiency when 640x480" */
++ { GLAMO_REG_MEM_TYPE, 0x0c74 }, /* 8MB, 16 word pg wr+rd */
++ { GLAMO_REG_MEM_GEN, 0xafaf }, /* 63 grants min + max */
++ /*
++ * the register below originally 0x0108 makes unreliable Glamo MMC
++ * write operations. Cranked to 0x05ad to add a wait state, the
++ * unreliability is not seen after 4GB of write / read testing
++ */
++ { GLAMO_REG_MEM_TIMING1, 0x0108 },
++ { GLAMO_REG_MEM_TIMING2, 0x0010 }, /* Taa = 3 MCLK */
++ { GLAMO_REG_MEM_TIMING3, 0x0000 },
++ { GLAMO_REG_MEM_TIMING4, 0x0000 }, /* CE1# delay fall/rise */
++ { GLAMO_REG_MEM_TIMING5, 0x0000 }, /* UB# LB# */
++ { GLAMO_REG_MEM_TIMING6, 0x0000 }, /* OE# */
++ { GLAMO_REG_MEM_TIMING7, 0x0000 }, /* WE# */
++ { GLAMO_REG_MEM_TIMING8, 0x1002 }, /* MCLK delay, was 0x1000 */
++ { GLAMO_REG_MEM_TIMING9, 0x6006 },
++ { GLAMO_REG_MEM_TIMING10, 0x00ff },
++ { GLAMO_REG_MEM_TIMING11, 0x0001 },
++ { GLAMO_REG_MEM_POWER1, 0x0020 },
++ { GLAMO_REG_MEM_POWER2, 0x0000 },
++ { GLAMO_REG_MEM_DRAM1, 0x0000 },
++ { 0xfffe, 1 },
++ { GLAMO_REG_MEM_DRAM1, 0xc100 },
++ { 0xfffe, 1 },
++ { GLAMO_REG_MEM_DRAM1, 0xe100 },
++ { GLAMO_REG_MEM_DRAM2, 0x01d6 },
++ { GLAMO_REG_CLOCK_MEMORY, 0x000b },
++};
++
++
++enum glamo_power {
++ GLAMO_POWER_ON,
++ GLAMO_POWER_SUSPEND,
++};
++
++static void glamo_power(struct glamo_core *glamo,
++ enum glamo_power new_state)
++{
++ int n;
++
++ spin_lock(&glamo->lock);
++
++ dev_dbg(&glamo->pdev->dev, "***** glamo_power -> %d\n", new_state);
++
++ switch (new_state) {
++ case GLAMO_POWER_ON:
++ /* power up PLL1 and PLL2 */
++ __reg_set_bit_mask(glamo, GLAMO_REG_DFT_GEN6, 0x0001, 0xffff);
++ __reg_set_bit_mask(glamo, GLAMO_REG_PLL_GEN3, 0x2000, 0x0000);
++
++ /* spin until PLL1 and PLL2 lock */
++ while ((__reg_read(glamo, GLAMO_REG_PLL_GEN5) & 3) != 3)
++ ;
++
++ /* Get memory out of deep powerdown */
++
++ __reg_write(glamo, GLAMO_REG_MEM_DRAM2,
++ (7 << 6) | /* tRC */
++ (1 << 4) | /* tRP */
++ (1 << 2) | /* tRCD */
++ 2); /* CAS latency */
++
++ /* Stop self-refresh */
++
++ __reg_write(glamo, GLAMO_REG_MEM_DRAM1,
++ GLAMO_MEM_DRAM1_EN_DRAM_REFRESH |
++ GLAMO_MEM_DRAM1_EN_GATE_CKE |
++ GLAMO_MEM_REFRESH_COUNT);
++ __reg_write(glamo, GLAMO_REG_MEM_DRAM1,
++ GLAMO_MEM_DRAM1_EN_MODEREG_SET |
++ GLAMO_MEM_DRAM1_EN_DRAM_REFRESH |
++ GLAMO_MEM_DRAM1_EN_GATE_CKE |
++ GLAMO_MEM_REFRESH_COUNT);
++
++ /* re-enable clocks to memory */
++
++ __reg_write(glamo, GLAMO_REG_CLOCK_MEMORY,
++ GLAMO_CLOCK_MEM_EN_MOCACLK |
++ GLAMO_CLOCK_MEM_EN_M1CLK |
++ GLAMO_CLOCK_MEM_DG_M1CLK);
++
++ /* restore each engine that was up before suspend */
++ for (n = 0; n < __NUM_GLAMO_ENGINES; n++)
++ if (glamo->engine_enabled_bitfield_suspend & (1 << n))
++ __glamo_engine_enable(glamo, n);
++ break;
++
++ case GLAMO_POWER_SUSPEND:
++ /* stash a copy of which engines were running */
++ glamo->engine_enabled_bitfield_suspend =
++ glamo->engine_enabled_bitfield;
++
++ /* take down each engine before we kill mem and pll */
++ for (n = 0; n < __NUM_GLAMO_ENGINES; n++)
++ if (glamo->engine_enabled_bitfield & (1 << n))
++ __glamo_engine_disable(glamo, n);
++
++ /* enable self-refresh */
++
++ __reg_write(glamo, GLAMO_REG_MEM_DRAM1,
++ GLAMO_MEM_DRAM1_EN_DRAM_REFRESH |
++ GLAMO_MEM_DRAM1_EN_GATE_CKE |
++ GLAMO_MEM_DRAM1_SELF_REFRESH |
++ GLAMO_MEM_REFRESH_COUNT);
++ __reg_write(glamo, GLAMO_REG_MEM_DRAM1,
++ GLAMO_MEM_DRAM1_EN_MODEREG_SET |
++ GLAMO_MEM_DRAM1_EN_DRAM_REFRESH |
++ GLAMO_MEM_DRAM1_EN_GATE_CKE |
++ GLAMO_MEM_DRAM1_SELF_REFRESH |
++ GLAMO_MEM_REFRESH_COUNT);
++
++ /* force RAM into deep powerdown */
++
++ __reg_write(glamo, GLAMO_REG_MEM_DRAM2,
++ GLAMO_MEM_DRAM2_DEEP_PWRDOWN |
++ (7 << 6) | /* tRC */
++ (1 << 4) | /* tRP */
++ (1 << 2) | /* tRCD */
++ 2); /* CAS latency */
++
++ /* kill clocks to memory */
++
++ __reg_write(glamo, GLAMO_REG_CLOCK_MEMORY, 0);
++
++ /* power down PLL2 and then PLL1 */
++ __reg_set_bit_mask(glamo, GLAMO_REG_PLL_GEN3, 0x2000, 0xffff);
++ __reg_set_bit_mask(glamo, GLAMO_REG_DFT_GEN5, 0x0001, 0xffff);
++ break;
++ }
++
++ spin_unlock(&glamo->lock);
++}
++
++#if 0
++#define MEMDETECT_RETRY 6
++static unsigned int detect_memsize(struct glamo_core *glamo)
++{
++ int i;
++
++ /*static const u_int16_t pattern[] = {
++ 0x1111, 0x8a8a, 0x2222, 0x7a7a,
++ 0x3333, 0x6a6a, 0x4444, 0x5a5a,
++ 0x5555, 0x4a4a, 0x6666, 0x3a3a,
++ 0x7777, 0x2a2a, 0x8888, 0x1a1a
++ }; */
++
++ for (i = 0; i < MEMDETECT_RETRY; i++) {
++ switch (glamo->type) {
++ case 3600:
++ __reg_write(glamo, GLAMO_REG_MEM_TYPE, 0x0072);
++ __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0xc100);
++ break;
++ case 3650:
++ switch (glamo->revision) {
++ case GLAMO_CORE_REV_A0:
++ if (i & 1)
++ __reg_write(glamo, GLAMO_REG_MEM_TYPE,
++ 0x097a);
++ else
++ __reg_write(glamo, GLAMO_REG_MEM_TYPE,
++ 0x0173);
++
++ __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0x0000);
++ msleep(1);
++ __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0xc100);
++ break;
++ default:
++ if (i & 1)
++ __reg_write(glamo, GLAMO_REG_MEM_TYPE,
++ 0x0972);
++ else
++ __reg_write(glamo, GLAMO_REG_MEM_TYPE,
++ 0x0872);
++
++ __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0x0000);
++ msleep(1);
++ __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0xe100);
++ break;
++ }
++ break;
++ case 3700:
++ /* FIXME */
++ default:
++ break;
++ }
++
++#if 0
++ /* FIXME: finish implementation */
++ for (j = 0; j < 8; j++) {
++ __
++#endif
++ }
++
++ return 0;
++}
++#endif
++
++/* Find out if we can support this version of the Glamo chip */
++static int glamo_supported(struct glamo_core *glamo)
++{
++ u_int16_t dev_id, rev_id; /*, memsize; */
++
++ dev_id = __reg_read(glamo, GLAMO_REG_DEVICE_ID);
++ rev_id = __reg_read(glamo, GLAMO_REG_REVISION_ID);
++
++ switch (dev_id) {
++ case 0x3650:
++ switch (rev_id) {
++ case GLAMO_CORE_REV_A2:
++ break;
++ case GLAMO_CORE_REV_A0:
++ case GLAMO_CORE_REV_A1:
++ case GLAMO_CORE_REV_A3:
++ dev_warn(&glamo->pdev->dev, "untested core revision "
++ "%04x, your mileage may vary\n", rev_id);
++ break;
++ default:
++ dev_warn(&glamo->pdev->dev, "unknown glamo revision "
++ "%04x, your mileage may vary\n", rev_id);
++ /* maybe should abort ? */
++ }
++ break;
++ case 0x3600:
++ case 0x3700:
++ default:
++ dev_err(&glamo->pdev->dev, "unsupported Glamo device %04x\n",
++ dev_id);
++ return 0;
++ }
++
++ dev_info(&glamo->pdev->dev, "Detected Glamo core %04x Revision %04x "
++ "(%uHz CPU / %uHz Memory)\n", dev_id, rev_id,
++ glamo_pll_rate(glamo, GLAMO_PLL1),
++ glamo_pll_rate(glamo, GLAMO_PLL2));
++
++ return 1;
++}
++
++static ssize_t regs_write(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ unsigned long reg = simple_strtoul(buf, NULL, 10);
++ struct glamo_core *glamo = dev_get_drvdata(dev);
++
++ while (*buf && (*buf != ' '))
++ buf++;
++ if (*buf != ' ')
++ return -EINVAL;
++ while (*buf && (*buf == ' '))
++ buf++;
++ if (!*buf)
++ return -EINVAL;
++
++ printk(KERN_INFO"reg 0x%02lX <-- 0x%04lX\n",
++ reg, simple_strtoul(buf, NULL, 10));
++
++ __reg_write(glamo, reg, simple_strtoul(buf, NULL, 10));
++
++ return count;
++}
++
++static ssize_t regs_read(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct glamo_core *glamo = dev_get_drvdata(dev);
++ int n, n1 = 0, r;
++ char * end = buf;
++ struct reg_range {
++ int start;
++ int count;
++ char * name;
++ };
++ struct reg_range reg_range[] = {
++ { 0x0000, 0x76, "General" },
++ { 0x0200, 0x100, "Host Bus" },
++ { 0x0300, 0x38, "Memory" },
++/* { 0x0400, 0x100, "Sensor" },
++ { 0x0500, 0x300, "ISP" },
++ { 0x0800, 0x400, "JPEG" },
++ { 0x0c00, 0x500, "MPEG" },
++ { 0x1100, 0x400, "LCD" },
++ { 0x1500, 0x080, "MPU 0" },
++ { 0x1580, 0x080, "MPU 1" },
++ { 0x1600, 0x080, "Command Queue" },
++ { 0x1680, 0x080, "RISC CPU" },
++ { 0x1700, 0x400, "2D Unit" },
++ { 0x1b00, 0x900, "3D Unit" },
++*/
++ };
++
++ spin_lock(&glamo->lock);
++
++ for (r = 0; r < ARRAY_SIZE(reg_range); r++) {
++ n1 = 0;
++ end += sprintf(end, "\n%s\n", reg_range[r].name);
++ for (n = reg_range[r].start;
++ n < reg_range[r].start + reg_range[r].count; n += 2) {
++ if (((n1++) & 7) == 0)
++ end += sprintf(end, "\n%04X: ", n);
++ end += sprintf(end, "%04x ", __reg_read(glamo, n));
++ }
++ end += sprintf(end, "\n");
++ }
++ spin_unlock(&glamo->lock);
++
++ return end - buf;
++}
++
++static DEVICE_ATTR(regs, 0644, regs_read, regs_write);
++static struct attribute *glamo_sysfs_entries[] = {
++ &dev_attr_regs.attr,
++ NULL
++};
++static struct attribute_group glamo_attr_group = {
++ .name = NULL,
++ .attrs = glamo_sysfs_entries,
++};
++
++
++
++static int __init glamo_probe(struct platform_device *pdev)
++{
++ int rc = 0, irq;
++ struct glamo_core *glamo;
++
++ if (glamo_handle) {
++ dev_err(&pdev->dev,
++ "This driver supports only one instance\n");
++ return -EBUSY;
++ }
++
++ glamo = kmalloc(GFP_KERNEL, sizeof(*glamo));
++ if (!glamo)
++ return -ENOMEM;
++
++ spin_lock_init(&glamo->lock);
++ glamo_handle = glamo;
++ glamo->pdev = pdev;
++ glamo->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ glamo->irq = platform_get_irq(pdev, 0);
++ glamo->pdata = pdev->dev.platform_data;
++ if (!glamo->mem || !glamo->pdata) {
++ dev_err(&pdev->dev, "platform device with no MEM/PDATA ?\n");
++ rc = -ENOENT;
++ goto out_free;
++ }
++
++ init_resume_dependency_list(&glamo->resume_dependency);
++
++ /* register a number of sibling devices whoise IOMEM resources
++ * are siblings of pdev's IOMEM resource */
++#if 0
++ glamo_core_dev.dev.parent = &pdev.dev;
++ mangle_mem_resources(glamo_core_dev.resources,
++ glamo_core_dev.num_resources, glamo->mem);
++ glamo_core_dev.resources[1].start = glamo->irq;
++ glamo_core_dev.resources[1].end = glamo->irq;
++ platform_device_register(&glamo_core_dev);
++#endif
++ /* only remap the generic, hostbus and memory controller registers */
++ glamo->base = ioremap(glamo->mem->start, GLAMO_REGOFS_VIDCAP);
++ if (!glamo->base) {
++ dev_err(&pdev->dev, "failed to ioremap() memory region\n");
++ goto out_free;
++ }
++
++ /* bring MCI specific stuff over from our MFD platform data */
++ glamo_mci_def_pdata.glamo_set_mci_power =
++ glamo->pdata->glamo_set_mci_power;
++ glamo_mci_def_pdata.glamo_mci_use_slow =
++ glamo->pdata->glamo_mci_use_slow;
++ glamo_mci_def_pdata.glamo_irq_is_wired =
++ glamo->pdata->glamo_irq_is_wired;
++ glamo_mci_def_pdata.mci_suspending =
++ glamo->pdata->mci_suspending;
++ glamo_mci_def_pdata.mci_all_dependencies_resumed =
++ glamo->pdata->mci_all_dependencies_resumed;
++
++ glamo_2d_dev.dev.parent = &pdev->dev;
++ mangle_mem_resources(glamo_2d_dev.resource,
++ glamo_2d_dev.num_resources, glamo->mem);
++ platform_device_register(&glamo_2d_dev);
++
++ glamo_3d_dev.dev.parent = &pdev->dev;
++ mangle_mem_resources(glamo_3d_dev.resource,
++ glamo_3d_dev.num_resources, glamo->mem);
++ platform_device_register(&glamo_3d_dev);
++
++ glamo_jpeg_dev.dev.parent = &pdev->dev;
++ mangle_mem_resources(glamo_jpeg_dev.resource,
++ glamo_jpeg_dev.num_resources, glamo->mem);
++ platform_device_register(&glamo_jpeg_dev);
++
++ glamo_mpeg_dev.dev.parent = &pdev->dev;
++ mangle_mem_resources(glamo_mpeg_dev.resource,
++ glamo_mpeg_dev.num_resources, glamo->mem);
++ platform_device_register(&glamo_mpeg_dev);
++
++ glamo->pdata->glamo = glamo;
++ glamo_fb_dev.dev.parent = &pdev->dev;
++ glamo_fb_dev.dev.platform_data = glamo->pdata;
++ mangle_mem_resources(glamo_fb_dev.resource,
++ glamo_fb_dev.num_resources, glamo->mem);
++ platform_device_register(&glamo_fb_dev);
++
++ glamo->pdata->spigpio_info->glamo = glamo;
++ glamo_spigpio_dev.dev.parent = &pdev->dev;
++ glamo_spigpio_dev.dev.platform_data = glamo->pdata->spigpio_info;
++ platform_device_register(&glamo_spigpio_dev);
++
++ glamo_mmc_dev.dev.parent = &pdev->dev;
++ /* we need it later to give to the engine enable and disable */
++ glamo_mci_def_pdata.pglamo = glamo;
++ mangle_mem_resources(glamo_mmc_dev.resource,
++ glamo_mmc_dev.num_resources, glamo->mem);
++ platform_device_register(&glamo_mmc_dev);
++
++ /* only request the generic, hostbus and memory controller MMIO */
++ glamo->mem = request_mem_region(glamo->mem->start,
++ GLAMO_REGOFS_VIDCAP, "glamo-core");
++ if (!glamo->mem) {
++ dev_err(&pdev->dev, "failed to request memory region\n");
++ goto out_free;
++ }
++
++ if (!glamo_supported(glamo)) {
++ dev_err(&pdev->dev, "This Glamo is not supported\n");
++ goto out_free;
++ }
++
++ rc = sysfs_create_group(&pdev->dev.kobj, &glamo_attr_group);
++ if (rc < 0) {
++ dev_err(&pdev->dev, "cannot create sysfs group\n");
++ goto out_free;
++ }
++
++ platform_set_drvdata(pdev, glamo);
++
++ dev_dbg(&glamo->pdev->dev, "running init script\n");
++ glamo_run_script(glamo, glamo_init_script,
++ ARRAY_SIZE(glamo_init_script), 1);
++
++ dev_info(&glamo->pdev->dev, "Glamo core now %uHz CPU / %uHz Memory)\n",
++ glamo_pll_rate(glamo, GLAMO_PLL1),
++ glamo_pll_rate(glamo, GLAMO_PLL2));
++
++ glamo_lcm_reset(1);
++
++ for (irq = IRQ_GLAMO(0); irq <= IRQ_GLAMO(8); irq++) {
++ set_irq_chip(irq, &glamo_irq_chip);
++ set_irq_handler(irq, handle_level_irq);
++ set_irq_flags(irq, IRQF_VALID);
++ }
++
++ if (glamo->pdata->glamo_irq_is_wired &&
++ !glamo->pdata->glamo_irq_is_wired()) {
++ set_irq_chained_handler(glamo->irq, glamo_irq_demux_handler);
++ set_irq_type(glamo->irq, IRQT_FALLING);
++ glamo->irq_works = 1;
++ } else
++ glamo->irq_works = 0;
++
++ return 0;
++
++out_free:
++ glamo_handle = NULL;
++ kfree(glamo);
++ return rc;
++}
++
++static int glamo_remove(struct platform_device *pdev)
++{
++ struct glamo_core *glamo = platform_get_drvdata(pdev);
++ int irq;
++
++ disable_irq(glamo->irq);
++ set_irq_chained_handler(glamo->irq, NULL);
++
++ for (irq = IRQ_GLAMO(0); irq <= IRQ_GLAMO(8); irq++) {
++ set_irq_flags(irq, 0);
++ set_irq_chip(irq, NULL);
++ }
++
++ platform_set_drvdata(pdev, NULL);
++ platform_device_unregister(&glamo_fb_dev);
++ platform_device_unregister(&glamo_mmc_dev);
++ iounmap(glamo->base);
++ release_mem_region(glamo->mem->start, GLAMO_REGOFS_VIDCAP);
++ glamo_handle = NULL;
++ kfree(glamo);
++
++ return 0;
++}
++
++#ifdef CONFIG_PM
++
++/* have to export this because struct glamo_core is opaque */
++
++void glamo_register_resume_dependency(struct resume_dependency *
++ resume_dependency)
++{
++ register_resume_dependency(&glamo_handle->resume_dependency,
++ resume_dependency);
++ if (glamo_handle->is_suspended)
++ activate_all_resume_dependencies(
++ &glamo_handle->resume_dependency);
++}
++EXPORT_SYMBOL_GPL(glamo_register_resume_dependency);
++
++
++static int glamo_suspend(struct platform_device *pdev, pm_message_t state)
++{
++ glamo_power(glamo_handle, GLAMO_POWER_SUSPEND);
++ glamo_handle->is_suspended = 1;
++ activate_all_resume_dependencies(&glamo_handle->resume_dependency);
++ return 0;
++}
++
++static int glamo_resume(struct platform_device *pdev)
++{
++ glamo_power(glamo_handle, GLAMO_POWER_ON);
++ glamo_handle->is_suspended = 0;
++ callback_all_resume_dependencies(&glamo_handle->resume_dependency);
++
++ return 0;
++}
++#else
++#define glamo_suspend NULL
++#define glamo_resume NULL
++#endif
++
++static struct platform_driver glamo_driver = {
++ .probe = glamo_probe,
++ .remove = glamo_remove,
++ .suspend_late = glamo_suspend,
++ .resume_early = glamo_resume,
++ .driver = {
++ .name = "glamo3362",
++ .owner = THIS_MODULE,
++ },
++};
++
++static int __devinit glamo_init(void)
++{
++ return platform_driver_register(&glamo_driver);
++}
++
++static void __exit glamo_cleanup(void)
++{
++ platform_driver_unregister(&glamo_driver);
++}
++
++module_init(glamo_init);
++module_exit(glamo_cleanup);
++
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
++MODULE_DESCRIPTION("Smedia Glamo 336x/337x core/resource driver");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-core.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/mfd/glamo/glamo-core.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,107 @@
++#ifndef __GLAMO_CORE_H
++#define __GLAMO_CORE_H
++
++#include <asm/system.h>
++#include <linux/resume-dependency.h>
++
++/* for the time being, we put the on-screen framebuffer into the lowest
++ * VRAM space. This should make the code easily compatible with the various
++ * 2MB/4MB/8MB variants of the Smedia chips */
++#define GLAMO_OFFSET_VRAM 0x800000
++#define GLAMO_OFFSET_FB (GLAMO_OFFSET_VRAM)
++
++/* we only allocate the minimum possible size for the framebuffer to make
++ * sure we have sufficient memory for other functions of the chip */
++//#define GLAMO_FB_SIZE (640*480*4) /* == 0x12c000 */
++#define GLAMO_INTERNAL_RAM_SIZE 0x800000
++#define GLAMO_MMC_BUFFER_SIZE (64 * 1024)
++#define GLAMO_FB_SIZE (GLAMO_INTERNAL_RAM_SIZE - GLAMO_MMC_BUFFER_SIZE)
++
++
++struct glamo_core {
++ int irq;
++ int irq_works; /* 0 means PCB does not support Glamo IRQ */
++ struct resource *mem;
++ struct resource *mem_core;
++ void __iomem *base;
++ struct platform_device *pdev;
++ struct glamofb_platform_data *pdata;
++ u_int16_t type;
++ u_int16_t revision;
++ spinlock_t lock;
++ struct resume_dependency resume_dependency;
++ u32 engine_enabled_bitfield;
++ u32 engine_enabled_bitfield_suspend;
++ int is_suspended;
++};
++
++struct glamo_script {
++ u_int16_t reg;
++ u_int16_t val;
++};
++
++int glamo_run_script(struct glamo_core *glamo,
++ struct glamo_script *script, int len, int may_sleep);
++
++enum glamo_engine {
++ GLAMO_ENGINE_CAPTURE,
++ GLAMO_ENGINE_ISP,
++ GLAMO_ENGINE_JPEG,
++ GLAMO_ENGINE_MPEG_ENC,
++ GLAMO_ENGINE_MPEG_DEC,
++ GLAMO_ENGINE_LCD,
++ GLAMO_ENGINE_CMDQ,
++ GLAMO_ENGINE_2D,
++ GLAMO_ENGINE_3D,
++ GLAMO_ENGINE_MMC,
++ GLAMO_ENGINE_MICROP0,
++ GLAMO_ENGINE_RISC,
++ GLAMO_ENGINE_MICROP1_MPEG_ENC,
++ GLAMO_ENGINE_MICROP1_MPEG_DEC,
++#if 0
++ GLAMO_ENGINE_H264_DEC,
++ GLAMO_ENGINE_RISC1,
++ GLAMO_ENGINE_SPI,
++#endif
++ __NUM_GLAMO_ENGINES
++};
++
++struct glamo_mci_pdata {
++ struct glamo_core * pglamo;
++ unsigned int gpio_detect;
++ unsigned int gpio_wprotect;
++ unsigned long ocr_avail;
++ void (*glamo_set_mci_power)(unsigned char power_mode,
++ unsigned short vdd);
++ /* glamo-mci asking if it should use the slow clock to card */
++ int (*glamo_mci_use_slow)(void);
++ int (*glamo_irq_is_wired)(void);
++ void (*mci_suspending)(struct platform_device *dev);
++ int (*mci_all_dependencies_resumed)(struct platform_device
++ *dev);
++
++};
++
++
++static inline void glamo_reg_access_delay(void)
++{
++ int n;
++
++ for (n = 0; n != 2; n++)
++ nop();
++}
++
++
++int glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine);
++int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine);
++void glamo_engine_reset(struct glamo_core *glamo, enum glamo_engine engine);
++int glamo_engine_reclock(struct glamo_core *glamo,
++ enum glamo_engine engine, int ps);
++
++void glamo_engine_clkreg_set(struct glamo_core *glamo,
++ enum glamo_engine engine,
++ u_int16_t mask, u_int16_t val);
++
++u_int16_t glamo_engine_clkreg_get(struct glamo_core *glamo,
++ enum glamo_engine engine);
++#endif /* __GLAMO_CORE_H */
+Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-fb.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/mfd/glamo/glamo-fb.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,911 @@
++/* Smedia Glamo 336x/337x driver
++ *
++ * (C) 2007-2008 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/errno.h>
++#include <linux/string.h>
++#include <linux/mm.h>
++#include <linux/slab.h>
++#include <linux/delay.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/vmalloc.h>
++#include <linux/dma-mapping.h>
++#include <linux/interrupt.h>
++#include <linux/workqueue.h>
++#include <linux/wait.h>
++#include <linux/platform_device.h>
++#include <linux/clk.h>
++#include <linux/spinlock.h>
++
++#include <asm/io.h>
++#include <asm/uaccess.h>
++#include <asm/div64.h>
++
++#ifdef CONFIG_PM
++#include <linux/pm.h>
++#endif
++
++#include <linux/glamofb.h>
++
++#include "glamo-regs.h"
++#include "glamo-core.h"
++
++#ifndef DEBUG
++#define GLAMO_LOG(...)
++#else
++#define GLAMO_LOG(...) \
++do { \
++ printk(KERN_DEBUG "in %s:%s:%d", __FILE__, __func__, __LINE__); \
++ printk(KERN_DEBUG __VA_ARGS__); \
++} while (0);
++#endif
++
++
++#define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1)
++
++struct glamofb_handle {
++ struct fb_info *fb;
++ struct device *dev;
++ struct resource *reg;
++ struct resource *fb_res;
++ char __iomem *base;
++ struct glamofb_platform_data *mach_info;
++ char __iomem *cursor_addr;
++ int cursor_on;
++ u_int32_t pseudo_pal[16];
++ spinlock_t lock_cmd;
++};
++
++/* 'sibling' spi device for lcm init */
++static struct platform_device glamo_spi_dev = {
++ .name = "glamo-lcm-spi",
++};
++
++
++static int reg_read(struct glamofb_handle *glamo,
++ u_int16_t reg)
++{
++ glamo_reg_access_delay();
++ return readw(glamo->base + reg);
++}
++
++static void reg_write(struct glamofb_handle *glamo,
++ u_int16_t reg, u_int16_t val)
++{
++ glamo_reg_access_delay();
++ writew(val, glamo->base + reg);
++}
++
++static struct glamo_script glamo_regs[] = {
++ { GLAMO_REG_LCD_MODE1, 0x0020 },
++ /* no display rotation, no hardware cursor, no dither, no gamma,
++ * no retrace flip, vsync low-active, hsync low active,
++ * no TVCLK, no partial display, hw dest color from fb,
++ * no partial display mode, LCD1, software flip, */
++ { GLAMO_REG_LCD_MODE2, 0x1020 },
++ /* no video flip, no ptr, no ptr, dhclk off,
++ * normal mode, no cpuif,
++ * res, serial msb first, single fb, no fr ctrl,
++ * cpu if bits all zero, no crc
++ * 0000 0000 0010 0000 */
++ { GLAMO_REG_LCD_MODE3, 0x0b40 },
++ /* src data rgb565, res, 18bit rgb666
++ * 000 01 011 0100 0000 */
++ { GLAMO_REG_LCD_POLARITY, 0x440c },
++ /* DE high active, no cpu/lcd if, cs0 force low, a0 low active,
++ * np cpu if, 9bit serial data, sclk rising edge latch data
++ * 01 00 0 100 0 000 01 0 0 */
++ { GLAMO_REG_LCD_A_BASE1, 0x0000 }, /* display A base address 15:0 */
++ { GLAMO_REG_LCD_A_BASE2, 0x0000 }, /* display A base address 22:16 */
++ { GLAMO_REG_LCD_CURSOR_BASE1, 0x0000 }, /* cursor base address 15:0 */
++ { GLAMO_REG_LCD_CURSOR_BASE2, 0x000f }, /* cursor base address 22:16 */
++};
++
++static int glamofb_run_script(struct glamofb_handle *glamo,
++ struct glamo_script *script, int len)
++{
++ int i;
++
++ for (i = 0; i < len; i++) {
++ struct glamo_script *line = &script[i];
++
++ if (line->reg == 0xffff)
++ return 0;
++ else if (line->reg == 0xfffe)
++ msleep(line->val);
++ else
++ reg_write(glamo, script[i].reg, script[i].val);
++ }
++
++ return 0;
++}
++
++static int glamofb_check_var(struct fb_var_screeninfo *var,
++ struct fb_info *info)
++{
++ struct glamofb_handle *glamo = info->par;
++
++ if (var->yres > glamo->mach_info->yres.max)
++ var->yres = glamo->mach_info->yres.max;
++ else if (var->yres < glamo->mach_info->yres.min)
++ var->yres = glamo->mach_info->yres.min;
++
++ if (var->xres > glamo->mach_info->xres.max)
++ var->xres = glamo->mach_info->xres.max;
++ else if (var->xres < glamo->mach_info->xres.min)
++ var->xres = glamo->mach_info->xres.min;
++
++ if (var->bits_per_pixel > glamo->mach_info->bpp.max)
++ var->bits_per_pixel = glamo->mach_info->bpp.max;
++ else if (var->bits_per_pixel < glamo->mach_info->bpp.min)
++ var->bits_per_pixel = glamo->mach_info->bpp.min;
++
++ /* FIXME: set rgb positions */
++ switch (var->bits_per_pixel) {
++ case 16:
++ switch (reg_read(glamo, GLAMO_REG_LCD_MODE3) & 0xc000) {
++ case GLAMO_LCD_SRC_RGB565:
++ var->red.offset = 11;
++ var->green.offset = 5;
++ var->blue.offset = 0;
++ var->red.length = 5;
++ var->green.length = 6;
++ var->blue.length = 5;
++ var->transp.length = 0;
++ break;
++ case GLAMO_LCD_SRC_ARGB1555:
++ var->transp.offset = 15;
++ var->red.offset = 10;
++ var->green.offset = 5;
++ var->blue.offset = 0;
++ var->transp.length = 1;
++ var->red.length = 5;
++ var->green.length = 5;
++ var->blue.length = 5;
++ break;
++ case GLAMO_LCD_SRC_ARGB4444:
++ var->transp.offset = 12;
++ var->red.offset = 8;
++ var->green.offset = 4;
++ var->blue.offset = 0;
++ var->transp.length = 4;
++ var->red.length = 4;
++ var->green.length = 4;
++ var->blue.length = 4;
++ break;
++ }
++ break;
++ case 24:
++ case 32:
++ default:
++ /* The Smedia Glamo doesn't support anything but 16bit color */
++ printk(KERN_ERR
++ "Smedia driver does not [yet?] support 24/32bpp\n");
++ return -EINVAL;
++ }
++
++ return 0;
++}
++
++static void reg_set_bit_mask(struct glamofb_handle *glamo,
++ u_int16_t reg, u_int16_t mask,
++ u_int16_t val)
++{
++ u_int16_t tmp;
++
++ val &= mask;
++
++ tmp = reg_read(glamo, reg);
++ tmp &= ~mask;
++ tmp |= val;
++ reg_write(glamo, reg, tmp);
++}
++
++#define GLAMO_LCD_WIDTH_MASK 0x03FF
++#define GLAMO_LCD_HEIGHT_MASK 0x03FF
++#define GLAMO_LCD_PITCH_MASK 0x07FE
++#define GLAMO_LCD_HV_TOTAL_MASK 0x03FF
++#define GLAMO_LCD_HV_RETR_START_MASK 0x03FF
++#define GLAMO_LCD_HV_RETR_END_MASK 0x03FF
++#define GLAMO_LCD_HV_RETR_DISP_START_MASK 0x03FF
++#define GLAMO_LCD_HV_RETR_DISP_END_MASK 0x03FF
++
++enum orientation {
++ ORIENTATION_PORTRAIT,
++ ORIENTATION_LANDSCAPE
++};
++
++
++/* the caller has to enxure lock_cmd is held and we are in cmd mode */
++static void __rotate_lcd(struct glamofb_handle *glamo, __u32 rotation)
++{
++ int glamo_rot;
++
++ switch (rotation) {
++ case FB_ROTATE_UR:
++ glamo_rot = GLAMO_LCD_ROT_MODE_0;
++ break;
++ case FB_ROTATE_CW:
++ glamo_rot = GLAMO_LCD_ROT_MODE_90;
++ break;
++ case FB_ROTATE_UD:
++ glamo_rot = GLAMO_LCD_ROT_MODE_180;
++ break;
++ case FB_ROTATE_CCW:
++ glamo_rot = GLAMO_LCD_ROT_MODE_270;
++ break;
++ default:
++ glamo_rot = GLAMO_LCD_ROT_MODE_0;
++ break;
++ }
++
++ reg_set_bit_mask(glamo,
++ GLAMO_REG_LCD_WIDTH,
++ GLAMO_LCD_ROT_MODE_MASK,
++ glamo_rot);
++ reg_set_bit_mask(glamo,
++ GLAMO_REG_LCD_MODE1,
++ GLAMO_LCD_MODE1_ROTATE_EN,
++ (glamo_rot != GLAMO_LCD_ROT_MODE_0)?
++ GLAMO_LCD_MODE1_ROTATE_EN : 0);
++}
++
++static enum orientation get_orientation(struct fb_var_screeninfo *var)
++{
++ if (var->xres <= var->yres)
++ return ORIENTATION_PORTRAIT;
++
++ return ORIENTATION_LANDSCAPE;
++}
++
++static int will_orientation_change(struct fb_var_screeninfo *var)
++{
++ enum orientation orient = get_orientation(var);
++
++ switch (orient) {
++ case ORIENTATION_LANDSCAPE:
++ if (var->rotate == FB_ROTATE_UR ||
++ var->rotate == FB_ROTATE_UD)
++ return 1;
++ break;
++ case ORIENTATION_PORTRAIT:
++ if (var->rotate == FB_ROTATE_CW ||
++ var->rotate == FB_ROTATE_CCW)
++ return 1;
++ break;
++ }
++ return 0;
++}
++
++static void glamofb_update_lcd_controller(struct glamofb_handle *glamo,
++ struct fb_var_screeninfo *var)
++{
++ int sync, bp, disp, fp, total, xres, yres, pitch, orientation_changing;
++ unsigned long flags;
++
++ if (!glamo || !var)
++ return;
++
++ spin_lock_irqsave(&glamo->lock_cmd, flags);
++
++ if (glamofb_cmd_mode(glamo, 1))
++ goto out_unlock;
++
++ if (var->pixclock)
++ glamo_engine_reclock(glamo->mach_info->glamo,
++ GLAMO_ENGINE_LCD,
++ var->pixclock);
++
++ xres = var->xres;
++ yres = var->yres;
++
++ /* figure out if orientation is going to change */
++ orientation_changing = will_orientation_change(var);
++
++ /* adjust the pitch according to new orientation to come */
++ if (orientation_changing) {
++ pitch = var->yres * var->bits_per_pixel / 8;
++ } else {
++ pitch = var->xres * var->bits_per_pixel / 8;
++ }
++
++ /* set the awaiten LCD geometry */
++ reg_set_bit_mask(glamo,
++ GLAMO_REG_LCD_WIDTH,
++ GLAMO_LCD_WIDTH_MASK,
++ xres);
++ reg_set_bit_mask(glamo,
++ GLAMO_REG_LCD_HEIGHT,
++ GLAMO_LCD_HEIGHT_MASK,
++ yres);
++ reg_set_bit_mask(glamo,
++ GLAMO_REG_LCD_PITCH,
++ GLAMO_LCD_PITCH_MASK,
++ pitch);
++
++ /* honour the rotation request */
++ __rotate_lcd(glamo, var->rotate);
++
++ /* update the reported geometry of the framebuffer. */
++ if (orientation_changing) {
++ var->xres_virtual = var->xres = yres;
++ var->yres_virtual = var->yres = xres;
++ } else {
++ var->xres_virtual = var->xres = xres;
++ var->yres_virtual = var->yres = yres;
++ }
++
++ /* update scannout timings */
++ sync = 0;
++ bp = sync + var->hsync_len;
++ disp = bp + var->left_margin;
++ fp = disp + xres;
++ total = fp + var->right_margin;
++
++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_TOTAL,
++ GLAMO_LCD_HV_TOTAL_MASK, total);
++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_RETR_START,
++ GLAMO_LCD_HV_RETR_START_MASK, sync);
++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_RETR_END,
++ GLAMO_LCD_HV_RETR_END_MASK, bp);
++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_DISP_START,
++ GLAMO_LCD_HV_RETR_DISP_START_MASK, disp);
++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_DISP_END,
++ GLAMO_LCD_HV_RETR_DISP_END_MASK, fp);
++
++ sync = 0;
++ bp = sync + var->vsync_len;
++ disp = bp + var->upper_margin;
++ fp = disp + yres;
++ total = fp + var->lower_margin;
++
++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_TOTAL,
++ GLAMO_LCD_HV_TOTAL_MASK, total);
++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_RETR_START,
++ GLAMO_LCD_HV_RETR_START_MASK, sync);
++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_RETR_END,
++ GLAMO_LCD_HV_RETR_END_MASK, bp);
++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_DISP_START,
++ GLAMO_LCD_HV_RETR_DISP_START_MASK, disp);
++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_DISP_END,
++ GLAMO_LCD_HV_RETR_DISP_END_MASK, fp);
++
++ glamofb_cmd_mode(glamo, 0);
++
++out_unlock:
++ spin_unlock_irqrestore(&glamo->lock_cmd, flags);
++}
++
++static int glamofb_set_par(struct fb_info *info)
++{
++ struct glamofb_handle *glamo = info->par;
++ struct fb_var_screeninfo *var = &info->var;
++
++ switch (var->bits_per_pixel) {
++ case 16:
++ info->fix.visual = FB_VISUAL_TRUECOLOR;
++ break;
++ default:
++ printk("Smedia driver doesn't support != 16bpp\n");
++ return -EINVAL;
++ }
++
++ info->fix.line_length = (var->xres * var->bits_per_pixel) / 8;
++
++ glamofb_update_lcd_controller(glamo, var);
++
++ return 0;
++}
++
++static int glamofb_blank(int blank_mode, struct fb_info *info)
++{
++ struct glamofb_handle *gfb = info->par;
++ struct glamo_core *gcore = gfb->mach_info->glamo;
++
++ dev_dbg(gfb->dev, "glamofb_blank(%u)\n", blank_mode);
++
++ switch (blank_mode) {
++ case FB_BLANK_VSYNC_SUSPEND:
++ case FB_BLANK_HSYNC_SUSPEND:
++ /* FIXME: add pdata hook/flag to indicate whether
++ * we should already switch off pixel clock here */
++ break;
++ case FB_BLANK_POWERDOWN:
++ /* disable the pixel clock */
++ glamo_engine_clkreg_set(gcore, GLAMO_ENGINE_LCD,
++ GLAMO_CLOCK_LCD_EN_DCLK, 0);
++ break;
++ case FB_BLANK_UNBLANK:
++ case FB_BLANK_NORMAL:
++ /* enable the pixel clock */
++ glamo_engine_clkreg_set(gcore, GLAMO_ENGINE_LCD,
++ GLAMO_CLOCK_LCD_EN_DCLK,
++ GLAMO_CLOCK_LCD_EN_DCLK);
++ break;
++ }
++
++ /* FIXME: once we have proper clock management in glamo-core,
++ * we can determine if other units need MCLK1 or the PLL, and
++ * disable it if not used. */
++ return 0;
++}
++
++static inline unsigned int chan_to_field(unsigned int chan,
++ struct fb_bitfield *bf)
++{
++ chan &= 0xffff;
++ chan >>= 16 - bf->length;
++ return chan << bf->offset;
++}
++
++static int glamofb_setcolreg(unsigned regno,
++ unsigned red, unsigned green, unsigned blue,
++ unsigned transp, struct fb_info *info)
++{
++ struct glamofb_handle *glamo = info->par;
++ unsigned int val;
++
++ switch (glamo->fb->fix.visual) {
++ case FB_VISUAL_TRUECOLOR:
++ case FB_VISUAL_DIRECTCOLOR:
++ /* true-colour, use pseuo-palette */
++
++ if (regno < 16) {
++ u32 *pal = glamo->fb->pseudo_palette;
++
++ val = chan_to_field(red, &glamo->fb->var.red);
++ val |= chan_to_field(green, &glamo->fb->var.green);
++ val |= chan_to_field(blue, &glamo->fb->var.blue);
++
++ pal[regno] = val;
++ };
++ break;
++ default:
++ return 1; /* unknown type */
++ }
++
++ return 0;
++}
++
++#ifdef CONFIG_MFD_GLAMO_HWACCEL
++static inline void glamofb_vsync_wait(struct glamofb_handle *glamo,
++ int line, int size, int range)
++{
++ int count[2];
++
++ do {
++ count[0] = reg_read(glamo, GLAMO_REG_LCD_STATUS2) & 0x3ff;
++ count[1] = reg_read(glamo, GLAMO_REG_LCD_STATUS2) & 0x3ff;
++ } while (count[0] != count[1] ||
++ (line < count[0] + range &&
++ size > count[0] - range) ||
++ count[0] < range * 2);
++}
++
++/*
++ * Enable/disable the hardware cursor mode altogether
++ * (for blinking and such, use glamofb_cursor()).
++ */
++static void glamofb_cursor_onoff(struct glamofb_handle *glamo, int on)
++{
++ int y, size;
++
++ if (glamo->cursor_on) {
++ y = reg_read(glamo, GLAMO_REG_LCD_CURSOR_Y_POS);
++ size = reg_read(glamo, GLAMO_REG_LCD_CURSOR_Y_SIZE);
++
++ glamofb_vsync_wait(glamo, y, size, 30);
++ }
++
++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_MODE1,
++ GLAMO_LCD_MODE1_CURSOR_EN,
++ on ? GLAMO_LCD_MODE1_CURSOR_EN : 0);
++ glamo->cursor_on = on;
++
++ /* Hide the cursor by default */
++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_X_SIZE, 0);
++}
++
++static int glamofb_cursor(struct fb_info *info, struct fb_cursor *cursor)
++{
++ struct glamofb_handle *glamo = info->par;
++ unsigned long flags;
++
++ spin_lock_irqsave(&glamo->lock_cmd, flags);
++
++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_X_SIZE,
++ cursor->enable ? cursor->image.width : 0);
++
++ if (cursor->set & FB_CUR_SETPOS) {
++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_X_POS,
++ cursor->image.dx);
++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_Y_POS,
++ cursor->image.dy);
++ }
++
++ if (cursor->set & FB_CUR_SETCMAP) {
++ uint16_t fg = glamo->pseudo_pal[cursor->image.fg_color];
++ uint16_t bg = glamo->pseudo_pal[cursor->image.bg_color];
++
++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_FG_COLOR, fg);
++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_BG_COLOR, bg);
++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_DST_COLOR, fg);
++ }
++
++ if (cursor->set & FB_CUR_SETHOT)
++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_PRESET,
++ (cursor->hot.x << 8) | cursor->hot.y);
++
++ if ((cursor->set & FB_CUR_SETSIZE) ||
++ (cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE))) {
++ int x, y, pitch, op;
++ const uint8_t *pcol = cursor->image.data;
++ const uint8_t *pmsk = cursor->mask;
++ uint8_t __iomem *dst = glamo->cursor_addr;
++ uint8_t dcol = 0;
++ uint8_t dmsk = 0;
++ uint8_t byte = 0;
++
++ if (cursor->image.depth > 1) {
++ spin_unlock_irqrestore(&glamo->lock_cmd, flags);
++ return -EINVAL;
++ }
++
++ pitch = ((cursor->image.width + 7) >> 2) & ~1;
++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_PITCH,
++ pitch);
++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_Y_SIZE,
++ cursor->image.height);
++
++ for (y = 0; y < cursor->image.height; y++) {
++ byte = 0;
++ for (x = 0; x < cursor->image.width; x++) {
++ if ((x % 8) == 0) {
++ dcol = *pcol++;
++ dmsk = *pmsk++;
++ } else {
++ dcol >>= 1;
++ dmsk >>= 1;
++ }
++
++ if (cursor->rop == ROP_COPY)
++ op = (dmsk & 1) ?
++ (dcol & 1) ? 1 : 3 : 0;
++ else
++ op = ((dmsk & 1) << 1) |
++ ((dcol & 1) << 0);
++ byte |= op << ((x & 3) << 1);
++
++ if (x % 4 == 3) {
++ writeb(byte, dst + x / 4);
++ byte = 0;
++ }
++ }
++ if (x % 4) {
++ writeb(byte, dst + x / 4);
++ byte = 0;
++ }
++
++ dst += pitch;
++ }
++ }
++
++ spin_unlock_irqrestore(&glamo->lock_cmd, flags);
++
++ return 0;
++}
++#endif
++
++static inline int glamofb_cmdq_empty(struct glamofb_handle *gfb)
++{
++ /* DGCMdQempty -- 1 == command queue is empty */
++ return reg_read(gfb, GLAMO_REG_LCD_STATUS1) & (1 << 15);
++}
++
++/* call holding gfb->lock_cmd when locking, until you unlock */
++int glamofb_cmd_mode(struct glamofb_handle *gfb, int on)
++{
++ int timeout = 200000;
++
++ dev_dbg(gfb->dev, "glamofb_cmd_mode(gfb=%p, on=%d)\n", gfb, on);
++ if (on) {
++ dev_dbg(gfb->dev, "%s: waiting for cmdq empty: ",
++ __FUNCTION__);
++ while ((!glamofb_cmdq_empty(gfb)) && (timeout--))
++ yield();
++ if (timeout < 0) {
++ printk(KERN_ERR"*************"
++ "glamofb cmd_queue never got empty"
++ "*************\n");
++ return -EIO;
++ }
++ dev_dbg(gfb->dev, "empty!\n");
++
++ /* display the entire frame then switch to command */
++ reg_write(gfb, GLAMO_REG_LCD_COMMAND1,
++ GLAMO_LCD_CMD_TYPE_DISP |
++ GLAMO_LCD_CMD_DATA_FIRE_VSYNC);
++
++ /* wait until LCD is idle */
++ dev_dbg(gfb->dev, "waiting for LCD idle: ");
++ timeout = 200000;
++ while ((!reg_read(gfb, GLAMO_REG_LCD_STATUS2) & (1 << 12)) &&
++ (timeout--))
++ yield();
++ if (timeout < 0) {
++ printk(KERN_ERR"*************"
++ "glamofb lcd never idle"
++ "*************\n");
++ return -EIO;
++ }
++ dev_dbg(gfb->dev, "idle!\n");
++
++ mdelay(100);
++ } else {
++ /* RGB interface needs vsync/hsync */
++ if (reg_read(gfb, GLAMO_REG_LCD_MODE3) & GLAMO_LCD_MODE3_RGB)
++ reg_write(gfb, GLAMO_REG_LCD_COMMAND1,
++ GLAMO_LCD_CMD_TYPE_DISP |
++ GLAMO_LCD_CMD_DATA_DISP_SYNC);
++
++ reg_write(gfb, GLAMO_REG_LCD_COMMAND1,
++ GLAMO_LCD_CMD_TYPE_DISP |
++ GLAMO_LCD_CMD_DATA_DISP_FIRE);
++ }
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(glamofb_cmd_mode);
++
++int glamofb_cmd_write(struct glamofb_handle *gfb, u_int16_t val)
++{
++ int timeout = 200000;
++
++ dev_dbg(gfb->dev, "%s: waiting for cmdq empty\n", __FUNCTION__);
++ while ((!glamofb_cmdq_empty(gfb)) && (timeout--))
++ yield();
++ if (timeout < 0) {
++ printk(KERN_ERR"*************"
++ "glamofb cmd_queue never got empty"
++ "*************\n");
++ return 1;
++ }
++ dev_dbg(gfb->dev, "idle, writing 0x%04x\n", val);
++
++ reg_write(gfb, GLAMO_REG_LCD_COMMAND1, val);
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(glamofb_cmd_write);
++
++static struct fb_ops glamofb_ops = {
++ .owner = THIS_MODULE,
++ .fb_check_var = glamofb_check_var,
++ .fb_set_par = glamofb_set_par,
++ .fb_blank = glamofb_blank,
++ .fb_setcolreg = glamofb_setcolreg,
++#ifdef CONFIG_MFD_GLAMO_HWACCEL
++ .fb_cursor = glamofb_cursor,
++#endif
++ .fb_fillrect = cfb_fillrect,
++ .fb_copyarea = cfb_copyarea,
++ .fb_imageblit = cfb_imageblit,
++};
++
++static int glamofb_init_regs(struct glamofb_handle *glamo)
++{
++ struct fb_info *info = glamo->fb;
++
++ glamofb_check_var(&info->var, info);
++ glamofb_run_script(glamo, glamo_regs, ARRAY_SIZE(glamo_regs));
++ glamofb_set_par(info);
++
++ return 0;
++}
++
++static int __init glamofb_probe(struct platform_device *pdev)
++{
++ int rc = -EIO;
++ struct fb_info *fbinfo;
++ struct glamofb_handle *glamofb;
++ struct glamofb_platform_data *mach_info = pdev->dev.platform_data;
++
++ printk(KERN_INFO "SMEDIA Glamo frame buffer driver (C) 2007 "
++ "Openmoko, Inc.\n");
++
++ fbinfo = framebuffer_alloc(sizeof(struct glamofb_handle), &pdev->dev);
++ if (!fbinfo)
++ return -ENOMEM;
++
++ glamofb = fbinfo->par;
++ glamofb->fb = fbinfo;
++ glamofb->dev = &pdev->dev;
++
++ strcpy(fbinfo->fix.id, "SMedia Glamo");
++
++ glamofb->reg = platform_get_resource_byname(pdev, IORESOURCE_MEM,
++ "glamo-fb-regs");
++ if (!glamofb->reg) {
++ dev_err(&pdev->dev, "platform device with no registers?\n");
++ rc = -ENOENT;
++ goto out_free;
++ }
++
++ glamofb->fb_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
++ "glamo-fb-mem");
++ if (!glamofb->fb_res) {
++ dev_err(&pdev->dev, "platform device with no memory ?\n");
++ rc = -ENOENT;
++ goto out_free;
++ }
++
++ glamofb->reg = request_mem_region(glamofb->reg->start,
++ RESSIZE(glamofb->reg), pdev->name);
++ if (!glamofb->reg) {
++ dev_err(&pdev->dev, "failed to request mmio region\n");
++ goto out_free;
++ }
++
++ glamofb->fb_res = request_mem_region(glamofb->fb_res->start,
++ mach_info->fb_mem_size,
++ pdev->name);
++ if (!glamofb->fb_res) {
++ dev_err(&pdev->dev, "failed to request vram region\n");
++ goto out_release_reg;
++ }
++
++ /* we want to remap only the registers required for this core
++ * driver. */
++ glamofb->base = ioremap(glamofb->reg->start, RESSIZE(glamofb->reg));
++ if (!glamofb->base) {
++ dev_err(&pdev->dev, "failed to ioremap() mmio memory\n");
++ goto out_release_fb;
++ }
++ fbinfo->fix.smem_start = (unsigned long) glamofb->fb_res->start;
++ fbinfo->fix.smem_len = mach_info->fb_mem_size;
++
++ fbinfo->screen_base = ioremap(glamofb->fb_res->start,
++ RESSIZE(glamofb->fb_res));
++ if (!fbinfo->screen_base) {
++ dev_err(&pdev->dev, "failed to ioremap() vram memory\n");
++ goto out_release_fb;
++ }
++ glamofb->cursor_addr = fbinfo->screen_base + 0xf0000;
++
++ platform_set_drvdata(pdev, fbinfo);
++
++ glamofb->mach_info = pdev->dev.platform_data;
++
++ fbinfo->fix.visual = FB_VISUAL_TRUECOLOR;
++ fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
++ fbinfo->fix.type_aux = 0;
++ fbinfo->fix.xpanstep = 0;
++ fbinfo->fix.ypanstep = 0;
++ fbinfo->fix.ywrapstep = 0;
++ fbinfo->fix.accel = FB_ACCEL_GLAMO;
++
++ fbinfo->var.nonstd = 0;
++ fbinfo->var.activate = FB_ACTIVATE_NOW;
++ fbinfo->var.height = mach_info->height;
++ fbinfo->var.width = mach_info->width;
++ fbinfo->var.accel_flags = 0; /* FIXME */
++ fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
++
++ fbinfo->fbops = &glamofb_ops;
++ fbinfo->flags = FBINFO_FLAG_DEFAULT;
++ fbinfo->pseudo_palette = &glamofb->pseudo_pal;
++
++ fbinfo->var.xres = mach_info->xres.defval;
++ fbinfo->var.xres_virtual = mach_info->xres.defval;
++ fbinfo->var.yres = mach_info->yres.defval;
++ fbinfo->var.yres_virtual = mach_info->yres.defval;
++ fbinfo->var.bits_per_pixel = mach_info->bpp.defval;
++
++ fbinfo->var.pixclock = mach_info->pixclock;
++ fbinfo->var.left_margin = mach_info->left_margin;
++ fbinfo->var.right_margin = mach_info->right_margin;
++ fbinfo->var.upper_margin = mach_info->upper_margin;
++ fbinfo->var.lower_margin = mach_info->lower_margin;
++ fbinfo->var.hsync_len = mach_info->hsync_len;
++ fbinfo->var.vsync_len = mach_info->vsync_len;
++
++ memset(fbinfo->screen_base, 0, fbinfo->fix.smem_len);
++
++ glamo_engine_enable(mach_info->glamo, GLAMO_ENGINE_LCD);
++ glamo_engine_reset(mach_info->glamo, GLAMO_ENGINE_LCD);
++
++ spin_lock_init(&glamofb->lock_cmd);
++ glamofb_init_regs(glamofb);
++#ifdef CONFIG_MFD_GLAMO_HWACCEL
++ glamofb_cursor_onoff(glamofb, 1);
++#endif
++
++ rc = register_framebuffer(fbinfo);
++ if (rc < 0) {
++ dev_err(&pdev->dev, "failed to register framebuffer\n");
++ goto out_unmap_fb;
++ }
++
++ if (mach_info->spi_info) {
++ /* register the sibling spi device */
++ mach_info->spi_info->glamofb_handle = glamofb;
++ glamo_spi_dev.dev.parent = &pdev->dev;
++ glamo_spi_dev.dev.platform_data = mach_info->spi_info;
++ platform_device_register(&glamo_spi_dev);
++ }
++
++ printk(KERN_INFO "fb%d: %s frame buffer device\n",
++ fbinfo->node, fbinfo->fix.id);
++
++ return 0;
++
++out_unmap_fb:
++ iounmap(fbinfo->screen_base);
++ iounmap(glamofb->base);
++out_release_fb:
++ release_mem_region(glamofb->fb_res->start, RESSIZE(glamofb->fb_res));
++out_release_reg:
++ release_mem_region(glamofb->reg->start, RESSIZE(glamofb->reg));
++out_free:
++ framebuffer_release(fbinfo);
++ return rc;
++}
++
++static int glamofb_remove(struct platform_device *pdev)
++{
++ struct glamofb_handle *glamofb = platform_get_drvdata(pdev);
++
++ platform_set_drvdata(pdev, NULL);
++ iounmap(glamofb->base);
++ release_mem_region(glamofb->reg->start, RESSIZE(glamofb->reg));
++ kfree(glamofb);
++
++ return 0;
++}
++
++static struct platform_driver glamofb_driver = {
++ .probe = glamofb_probe,
++ .remove = glamofb_remove,
++ .driver = {
++ .name = "glamo-fb",
++ .owner = THIS_MODULE,
++ },
++};
++
++static int __devinit glamofb_init(void)
++{
++ return platform_driver_register(&glamofb_driver);
++}
++
++static void __exit glamofb_cleanup(void)
++{
++ platform_driver_unregister(&glamofb_driver);
++}
++
++module_init(glamofb_init);
++module_exit(glamofb_cleanup);
++
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
++MODULE_DESCRIPTION("Smedia Glamo 336x/337x framebuffer driver");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-gpio.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/mfd/glamo/glamo-gpio.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,62 @@
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/spinlock.h>
++#include <linux/io.h>
++
++#include <linux/glamo-gpio.h>
++
++#include "glamo-core.h"
++#include "glamo-regs.h"
++
++void glamo_gpio_setpin(struct glamo_core *glamo, unsigned int pin,
++ unsigned int value)
++{
++ unsigned int reg = REG_OF_GPIO(pin);
++ u_int16_t tmp;
++
++ spin_lock(&glamo->lock);
++ tmp = readw(glamo->base + reg);
++ if (value)
++ tmp |= OUTPUT_BIT(pin);
++ else
++ tmp &= ~OUTPUT_BIT(pin);
++ writew(tmp, glamo->base + reg);
++ spin_unlock(&glamo->lock);
++}
++EXPORT_SYMBOL(glamo_gpio_setpin);
++
++int glamo_gpio_getpin(struct glamo_core *glamo, unsigned int pin)
++{
++ return readw(REG_OF_GPIO(pin)) & INPUT_BIT(pin) ? 1 : 0;
++}
++EXPORT_SYMBOL(glamo_gpio_getpin);
++
++void glamo_gpio_cfgpin(struct glamo_core *glamo, unsigned int pinfunc)
++{
++ unsigned int reg = REG_OF_GPIO(pinfunc);
++ u_int16_t tmp;
++
++ spin_lock(&glamo->lock);
++ tmp = readw(glamo->base + reg);
++
++ if ((pinfunc & 0x00f0) == GLAMO_GPIO_F_FUNC) {
++ /* pin is a function pin: clear gpio bit */
++ tmp &= ~FUNC_BIT(pinfunc);
++ } else {
++ /* pin is gpio: set gpio bit */
++ tmp |= FUNC_BIT(pinfunc);
++
++ if (pinfunc & GLAMO_GPIO_F_IN) {
++ /* gpio input: set bit to disable output mode */
++ tmp |= GPIO_OUT_BIT(pinfunc);
++ } else if (pinfunc & GLAMO_GPIO_F_OUT) {
++ /* gpio output: clear bit to enable output mode */
++ tmp &= ~GPIO_OUT_BIT(pinfunc);
++ }
++ }
++ writew(tmp, glamo->base + reg);
++ spin_unlock(&glamo->lock);
++}
++EXPORT_SYMBOL(glamo_gpio_cfgpin);
++
+Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-lcm-spi.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/mfd/glamo/glamo-lcm-spi.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,240 @@
++/*
++ * Copyright (C) 2007 Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ *
++ * Smedia Glamo GPIO based SPI driver
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * This driver currently only implements a minimum subset of the hardware
++ * features, esp. those features that are required to drive the jbt6k74
++ * LCM controller asic in the TD028TTEC1 LCM.
++ *
++*/
++
++#define DEBUG
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/spinlock.h>
++#include <linux/workqueue.h>
++#include <linux/platform_device.h>
++
++#include <linux/spi/spi.h>
++#include <linux/spi/spi_bitbang.h>
++#include <linux/spi/glamo.h>
++
++#include <linux/glamofb.h>
++
++#include <asm/hardware.h>
++
++#include "glamo-core.h"
++#include "glamo-regs.h"
++
++struct glamo_spi {
++ struct spi_bitbang bitbang;
++ struct spi_master *master;
++ struct glamo_spi_info *info;
++ struct device *dev;
++};
++
++static inline struct glamo_spi *to_gs(struct spi_device *spi)
++{
++ return spi->controller_data;
++}
++
++static int glamo_spi_setupxfer(struct spi_device *spi, struct spi_transfer *t)
++{
++ unsigned int bpw;
++
++ bpw = t ? t->bits_per_word : spi->bits_per_word;
++
++ if (bpw != 9 && bpw != 8) {
++ dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw);
++ return -EINVAL;
++ }
++
++ return 0;
++}
++
++static void glamo_spi_chipsel(struct spi_device *spi, int value)
++{
++#if 0
++ struct glamo_spi *gs = to_gs(spi);
++
++ dev_dbg(&spi->dev, "chipsel %d: spi=%p, gs=%p, info=%p, handle=%p\n",
++ value, spi, gs, gs->info, gs->info->glamofb_handle);
++
++ glamofb_cmd_mode(gs->info->glamofb_handle, value);
++#endif
++}
++
++static int glamo_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
++{
++ struct glamo_spi *gs = to_gs(spi);
++ const u_int16_t *ui16 = (const u_int16_t *) t->tx_buf;
++ u_int16_t nine_bits;
++ int i;
++
++ dev_dbg(&spi->dev, "txrx: tx %p, rx %p, bpw %d, len %d\n",
++ t->tx_buf, t->rx_buf, t->bits_per_word, t->len);
++
++ if (spi->bits_per_word == 9)
++ nine_bits = (1 << 9);
++ else
++ nine_bits = 0;
++
++ if (t->len > 3 * sizeof(u_int16_t)) {
++ dev_err(&spi->dev, "this driver doesn't support "
++ "%u sized xfers\n", t->len);
++ return -EINVAL;
++ }
++
++ for (i = 0; i < t->len/sizeof(u_int16_t); i++) {
++ /* actually transfer the data */
++#if 1
++ glamofb_cmd_write(gs->info->glamofb_handle,
++ GLAMO_LCD_CMD_TYPE_SERIAL | nine_bits |
++ (1 << 10) | (1 << 11) | (ui16[i] & 0x1ff));
++#endif
++ /* FIXME: fire ?!? */
++ if (i == 0 && (ui16[i] & 0x1ff) == 0x29) {
++ dev_dbg(&spi->dev, "leaving command mode\n");
++ glamofb_cmd_mode(gs->info->glamofb_handle, 0);
++ }
++ }
++
++ return t->len;
++}
++
++static int glamo_spi_setup(struct spi_device *spi)
++{
++ int ret;
++
++ if (!spi->bits_per_word)
++ spi->bits_per_word = 9;
++
++ /* FIXME: hardware can do this */
++ if (spi->mode & SPI_LSB_FIRST)
++ return -EINVAL;
++
++ ret = glamo_spi_setupxfer(spi, NULL);
++ if (ret < 0) {
++ dev_err(&spi->dev, "setupxfer returned %d\n", ret);
++ return ret;
++ }
++
++ dev_dbg(&spi->dev, "%s: mode %d, %u bpw\n",
++ __FUNCTION__, spi->mode, spi->bits_per_word);
++
++ return 0;
++}
++
++static int glamo_spi_probe(struct platform_device *pdev)
++{
++ struct spi_master *master;
++ struct glamo_spi *sp;
++ int ret;
++ int i;
++
++ master = spi_alloc_master(&pdev->dev, sizeof(struct glamo_spi));
++ if (master == NULL) {
++ dev_err(&pdev->dev, "failed to allocate spi master\n");
++ ret = -ENOMEM;
++ goto err;
++ }
++
++ sp = spi_master_get_devdata(master);
++ memset(sp, 0, sizeof(struct glamo_spi));
++
++ sp->master = spi_master_get(master);
++ sp->info = pdev->dev.platform_data;
++ if (!sp->info) {
++ dev_err(&pdev->dev, "can't operate without platform data\n");
++ ret = -EIO;
++ goto err_no_pdev;
++ }
++ dev_dbg(&pdev->dev, "sp->info(pdata) = %p\n", sp->info);
++
++ sp->dev = &pdev->dev;
++
++ platform_set_drvdata(pdev, sp);
++
++ sp->bitbang.master = sp->master;
++ sp->bitbang.setup_transfer = glamo_spi_setupxfer;
++ sp->bitbang.chipselect = glamo_spi_chipsel;
++ sp->bitbang.txrx_bufs = glamo_spi_txrx;
++ sp->bitbang.master->setup = glamo_spi_setup;
++
++ ret = spi_bitbang_start(&sp->bitbang);
++ if (ret)
++ goto err_no_bitbang;
++
++ /* register the chips to go with the board */
++
++ glamofb_cmd_mode(sp->info->glamofb_handle, 1);
++
++ for (i = 0; i < sp->info->board_size; i++) {
++ dev_info(&pdev->dev, "registering %p: %s\n",
++ &sp->info->board_info[i],
++ sp->info->board_info[i].modalias);
++
++ sp->info->board_info[i].controller_data = sp;
++ spi_new_device(master, sp->info->board_info + i);
++ }
++
++ return 0;
++
++err_no_bitbang:
++ platform_set_drvdata(pdev, NULL);
++err_no_pdev:
++ spi_master_put(sp->bitbang.master);
++err:
++ return ret;
++
++}
++
++static int glamo_spi_remove(struct platform_device *pdev)
++{
++ struct glamo_spi *sp = platform_get_drvdata(pdev);
++
++ spi_bitbang_stop(&sp->bitbang);
++ spi_master_put(sp->bitbang.master);
++
++ return 0;
++}
++
++#define glamo_spi_suspend NULL
++#define glamo_spi_resume NULL
++
++static struct platform_driver glamo_spi_drv = {
++ .probe = glamo_spi_probe,
++ .remove = glamo_spi_remove,
++ .suspend = glamo_spi_suspend,
++ .resume = glamo_spi_resume,
++ .driver = {
++ .name = "glamo-lcm-spi",
++ .owner = THIS_MODULE,
++ },
++};
++
++static int __init glamo_spi_init(void)
++{
++ return platform_driver_register(&glamo_spi_drv);
++}
++
++static void __exit glamo_spi_exit(void)
++{
++ platform_driver_unregister(&glamo_spi_drv);
++}
++
++module_init(glamo_spi_init);
++module_exit(glamo_spi_exit);
++
++MODULE_DESCRIPTION("Smedia Glamo 336x/337x LCM serial command SPI Driver");
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>")
++MODULE_LICENSE("GPL");
+Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-mci.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/mfd/glamo/glamo-mci.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,1062 @@
++/*
++ * linux/drivers/mmc/host/glamo-mmc.c - Glamo MMC driver
++ *
++ * Copyright (C) 2007 Openmoko, Inc, Andy Green <andy@openmoko.com>
++ * Based on S3C MMC driver that was:
++ * Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/module.h>
++#include <linux/dma-mapping.h>
++#include <linux/clk.h>
++#include <linux/mmc/mmc.h>
++#include <linux/mmc/host.h>
++#include <linux/platform_device.h>
++#include <linux/irq.h>
++#include <linux/pcf50633.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/spinlock.h>
++
++#include <asm/dma.h>
++#include <asm/dma-mapping.h>
++#include <asm/io.h>
++
++#include "glamo-mci.h"
++#include "glamo-core.h"
++#include "glamo-regs.h"
++
++/* from glamo-core.c */
++extern struct glamo_mci_pdata glamo_mci_def_pdata;
++
++static spinlock_t clock_lock;
++
++#define DRIVER_NAME "glamo-mci"
++#define RESSIZE(ressource) (((ressource)->end - (ressource)->start) + 1)
++
++static void glamo_mci_send_request(struct mmc_host *mmc);
++
++/*
++ * Max SD clock rate
++ *
++ * held at /(3 + 1) due to concerns of 100R recommended series resistor
++ * allows 16MHz @ 4-bit --> 8MBytes/sec raw
++ *
++ * you can override this on kernel commandline using
++ *
++ * glamo_mci.sd_max_clk=10000000
++ *
++ * for example
++ */
++
++static int sd_max_clk = 50000000 / 3;
++module_param(sd_max_clk, int, 0644);
++
++/*
++ * Slow SD clock rate
++ *
++ * you can override this on kernel commandline using
++ *
++ * glamo_mci.sd_slow_ratio=8
++ *
++ * for example
++ *
++ * platform callback is used to decide effective clock rate, if not
++ * defined then max is used, if defined and returns nonzero, rate is
++ * divided by this factor
++ */
++
++static int sd_slow_ratio = 8;
++module_param(sd_slow_ratio, int, 0644);
++
++/*
++ * Post-power SD clock rate
++ *
++ * you can override this on kernel commandline using
++ *
++ * glamo_mci.sd_post_power_clock=1000000
++ *
++ * for example
++ *
++ * After changing power to card, clock is held at this rate until first bulk
++ * transfer completes
++ */
++
++static int sd_post_power_clock = 1000000;
++module_param(sd_post_power_clock, int, 0644);
++
++
++/*
++ * SD Signal drive strength
++ *
++ * you can override this on kernel commandline using
++ *
++ * glamo_mci.sd_drive=0
++ *
++ * for example
++ */
++
++static int sd_drive;
++module_param(sd_drive, int, 0644);
++
++/*
++ * SD allow SD clock to run while idle
++ *
++ * you can override this on kernel commandline using
++ *
++ * glamo_mci.sd_idleclk=0
++ *
++ * for example
++ */
++
++static int sd_idleclk = 0; /* disallow idle clock by default */
++module_param(sd_idleclk, int, 0644);
++
++/* used to stash real idleclk state in suspend: we force it to run in there */
++static int suspend_sd_idleclk;
++
++
++unsigned char CRC7(u8 * pu8, int cnt)
++{
++ u8 crc = 0;
++
++ while (cnt--) {
++ int n;
++ u8 d = *pu8++;
++ for (n = 0; n < 8; n++) {
++ crc <<= 1;
++ if ((d & 0x80) ^ (crc & 0x80))
++ crc ^= 0x09;
++ d <<= 1;
++ }
++ }
++ return (crc << 1) | 1;
++}
++
++/* these _dly versions account for the dead time rules for reg access */
++static u16 readw_dly(u16 __iomem * pu16)
++{
++ glamo_reg_access_delay();
++ return readw(pu16);
++}
++
++static void writew_dly(u16 val, u16 __iomem * pu16)
++{
++ glamo_reg_access_delay();
++ writew(val, pu16);
++}
++
++static int get_data_buffer(struct glamo_mci_host *host,
++ volatile u32 *words, volatile u16 **pointer)
++{
++ struct scatterlist *sg;
++
++ *words = 0;
++ *pointer = NULL;
++
++ if (host->pio_active == XFER_NONE)
++ return -EINVAL;
++
++ if ((!host->mrq) || (!host->mrq->data))
++ return -EINVAL;
++
++ if (host->pio_sgptr >= host->mrq->data->sg_len) {
++ dev_dbg(&host->pdev->dev, "no more buffers (%i/%i)\n",
++ host->pio_sgptr, host->mrq->data->sg_len);
++ return -EBUSY;
++ }
++ sg = &host->mrq->data->sg[host->pio_sgptr];
++
++ *words = sg->length >> 1; /* we are working with a 16-bit data bus */
++ *pointer = page_address(sg_page(sg)) + sg->offset;
++
++ BUG_ON(((long)(*pointer)) & 1);
++
++ host->pio_sgptr++;
++
++ /* dev_info(&host->pdev->dev, "new buffer (%i/%i)\n",
++ host->pio_sgptr, host->mrq->data->sg_len); */
++ return 0;
++}
++
++static void do_pio_read(struct glamo_mci_host *host)
++{
++ int res;
++ u16 __iomem *from_ptr = host->base_data + (RESSIZE(host->mem_data) /
++ sizeof(u16) / 2);
++#ifdef DEBUG
++ u16 * block;
++#endif
++
++ while (1) {
++ res = get_data_buffer(host, &host->pio_words, &host->pio_ptr);
++ if (res) {
++ host->pio_active = XFER_NONE;
++ host->complete_what = COMPLETION_FINALIZE;
++
++ dev_dbg(&host->pdev->dev, "pio_read(): "
++ "complete (no more data).\n");
++ return;
++ }
++
++ dev_dbg(&host->pdev->dev, "pio_read(): host->pio_words: %d\n",
++ host->pio_words);
++
++ host->pio_count += host->pio_words << 1;
++
++#ifdef DEBUG
++ block = (u16 *)host->pio_ptr;
++ res = host->pio_words << 1;
++#endif
++ while (host->pio_words--)
++ *host->pio_ptr++ = *from_ptr++;
++#ifdef DEBUG
++ print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 1,
++ (void *)block, res, 1);
++#endif
++ }
++}
++
++static int do_pio_write(struct glamo_mci_host *host)
++{
++ int res = 0;
++ volatile u16 __iomem *to_ptr = host->base_data;
++ int err = 0;
++
++ dev_dbg(&host->pdev->dev, "pio_write():\n");
++ while (!res) {
++ res = get_data_buffer(host, &host->pio_words, &host->pio_ptr);
++ if (res)
++ continue;
++
++ dev_dbg(&host->pdev->dev, "pio_write():new source: [%i]@[%p]\n",
++ host->pio_words, host->pio_ptr);
++
++ host->pio_count += host->pio_words << 1;
++ while (host->pio_words--)
++ writew(*host->pio_ptr++, to_ptr++);
++ }
++
++ dev_dbg(&host->pdev->dev, "pio_write(): complete\n");
++ host->pio_active = XFER_NONE;
++ return err;
++}
++
++static void __glamo_mci_fix_card_div(struct glamo_mci_host *host, int div)
++{
++ unsigned long flags;
++
++ spin_lock_irqsave(&clock_lock, flags);
++
++ if (div < 0) {
++ /* stop clock - remove clock from divider input */
++ writew(readw(glamo_mci_def_pdata.pglamo->base +
++ GLAMO_REG_CLOCK_GEN5_1) & (~GLAMO_CLOCK_GEN51_EN_DIV_TCLK),
++ glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_GEN5_1);
++
++ goto done;
++ }
++
++ if (host->force_slow_during_powerup)
++ div = host->clk_rate / sd_post_power_clock;
++ else
++ if (host->pdata->glamo_mci_use_slow)
++ if ((host->pdata->glamo_mci_use_slow)())
++ div = div * sd_slow_ratio;
++
++ if (div > 255)
++ div = 255;
++
++ /*
++ * set the nearest prescaler factor
++ *
++ * register shared with SCLK divisor -- no chance of race because
++ * we don't use sensor interface
++ */
++ writew_dly((readw(glamo_mci_def_pdata.pglamo->base +
++ GLAMO_REG_CLOCK_GEN8) & 0xff00) | div,
++ glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_GEN8);
++ /* enable clock to divider input */
++ writew_dly(readw(glamo_mci_def_pdata.pglamo->base +
++ GLAMO_REG_CLOCK_GEN5_1) | GLAMO_CLOCK_GEN51_EN_DIV_TCLK,
++ glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_GEN5_1);
++
++done:
++ spin_unlock_irqrestore(&clock_lock, flags);
++}
++
++static int __glamo_mci_set_card_clock(struct glamo_mci_host *host, int freq,
++ int *division)
++{
++ int div = 0;
++ int real_rate = 0;
++
++ if (freq) {
++ /* Set clock */
++ for (div = 0; div < 256; div++) {
++ real_rate = host->clk_rate / (div + 1);
++ if (real_rate <= freq)
++ break;
++ }
++ if (div > 255)
++ div = 255;
++
++ if (division)
++ *division = div;
++
++ __glamo_mci_fix_card_div(host, div);
++
++ } else {
++ /* stop clock */
++ if (division)
++ *division = 0xff;
++
++ if (!sd_idleclk && !host->force_slow_during_powerup)
++ /* clock off */
++ __glamo_mci_fix_card_div(host, -1);
++ }
++
++ return real_rate;
++}
++
++static void glamo_mci_irq(unsigned int irq, struct irq_desc *desc)
++{
++ struct glamo_mci_host *host = (struct glamo_mci_host *)
++ desc->handler_data;
++ u16 status;
++ struct mmc_command *cmd;
++ unsigned long iflags;
++
++ if (!host)
++ return;
++ if (!host->mrq)
++ return;
++ cmd = host->mrq->cmd;
++ if (!cmd)
++ return;
++
++ spin_lock_irqsave(&host->complete_lock, iflags);
++
++ status = readw_dly(host->base + GLAMO_REG_MMC_RB_STAT1);
++
++ /* ack this interrupt source */
++ writew(GLAMO_IRQ_MMC,
++ glamo_mci_def_pdata.pglamo->base + GLAMO_REG_IRQ_CLEAR);
++
++ if (status & (GLAMO_STAT1_MMC_RTOUT |
++ GLAMO_STAT1_MMC_DTOUT))
++ cmd->error = -ETIMEDOUT;
++ if (status & (GLAMO_STAT1_MMC_BWERR |
++ GLAMO_STAT1_MMC_BRERR))
++ cmd->error = -EILSEQ;
++ if (cmd->error) {
++ dev_info(&host->pdev->dev, "Error after cmd: 0x%x\n", status);
++ goto done;
++ }
++
++ /* disable the initial slow start after first bulk transfer */
++ if (host->force_slow_during_powerup)
++ host->force_slow_during_powerup--;
++
++ if (host->pio_active == XFER_READ)
++ do_pio_read(host);
++
++ host->mrq->data->bytes_xfered = host->pio_count;
++ dev_dbg(&host->pdev->dev, "status = 0x%04x count=%d\n",
++ status, host->pio_count);
++
++ /* issue STOP if we have been given one to use */
++ if (host->mrq->stop) {
++ host->cmd_is_stop = 1;
++ glamo_mci_send_request(host->mmc);
++ host->cmd_is_stop = 0;
++ }
++
++ if (!sd_idleclk && !host->force_slow_during_powerup)
++ /* clock off */
++ __glamo_mci_fix_card_div(host, -1);
++
++done:
++ host->complete_what = COMPLETION_NONE;
++ host->mrq = NULL;
++ mmc_request_done(host->mmc, cmd->mrq);
++ spin_unlock_irqrestore(&host->complete_lock, iflags);
++}
++
++static int glamo_mci_send_command(struct glamo_mci_host *host,
++ struct mmc_command *cmd)
++{
++ u8 u8a[6];
++ u16 fire = 0;
++
++ /* if we can't do it, reject as busy */
++ if (!readw_dly(host->base + GLAMO_REG_MMC_RB_STAT1) &
++ GLAMO_STAT1_MMC_IDLE) {
++ host->mrq = NULL;
++ cmd->error = -EBUSY;
++ mmc_request_done(host->mmc, host->mrq);
++ return -EBUSY;
++ }
++
++ /* create an array in wire order for CRC computation */
++ u8a[0] = 0x40 | (cmd->opcode & 0x3f);
++ u8a[1] = (u8)(cmd->arg >> 24);
++ u8a[2] = (u8)(cmd->arg >> 16);
++ u8a[3] = (u8)(cmd->arg >> 8);
++ u8a[4] = (u8)cmd->arg;
++ u8a[5] = CRC7(&u8a[0], 5); /* CRC7 on first 5 bytes of packet */
++
++ /* issue the wire-order array including CRC in register order */
++ writew_dly((u8a[4] << 8) | u8a[5], host->base + GLAMO_REG_MMC_CMD_REG1);
++ writew_dly((u8a[2] << 8) | u8a[3], host->base + GLAMO_REG_MMC_CMD_REG2);
++ writew_dly((u8a[0] << 8) | u8a[1], host->base + GLAMO_REG_MMC_CMD_REG3);
++
++ /* command index toggle */
++ fire |= (host->ccnt & 1) << 12;
++
++ /* set type of command */
++ switch (mmc_cmd_type(cmd)) {
++ case MMC_CMD_BC:
++ fire |= GLAMO_FIRE_MMC_CMDT_BNR;
++ break;
++ case MMC_CMD_BCR:
++ fire |= GLAMO_FIRE_MMC_CMDT_BR;
++ break;
++ case MMC_CMD_AC:
++ fire |= GLAMO_FIRE_MMC_CMDT_AND;
++ break;
++ case MMC_CMD_ADTC:
++ fire |= GLAMO_FIRE_MMC_CMDT_AD;
++ break;
++ }
++ /*
++ * if it expects a response, set the type expected
++ *
++ * R1, Length : 48bit, Normal response
++ * R1b, Length : 48bit, same R1, but added card busy status
++ * R2, Length : 136bit (really 128 bits with CRC snipped)
++ * R3, Length : 48bit (OCR register value)
++ * R4, Length : 48bit, SDIO_OP_CONDITION, Reverse SDIO Card
++ * R5, Length : 48bit, IO_RW_DIRECTION, Reverse SDIO Card
++ * R6, Length : 48bit (RCA register)
++ * R7, Length : 48bit (interface condition, VHS(voltage supplied),
++ * check pattern, CRC7)
++ */
++ switch (mmc_resp_type(cmd)) {
++ case MMC_RSP_R6: /* same index as R7 and R1 */
++ fire |= GLAMO_FIRE_MMC_RSPT_R1;
++ break;
++ case MMC_RSP_R1B:
++ fire |= GLAMO_FIRE_MMC_RSPT_R1b;
++ break;
++ case MMC_RSP_R2:
++ fire |= GLAMO_FIRE_MMC_RSPT_R2;
++ break;
++ case MMC_RSP_R3:
++ fire |= GLAMO_FIRE_MMC_RSPT_R3;
++ break;
++ /* R4 and R5 supported by chip not defined in linux/mmc/core.h (sdio) */
++ }
++ /*
++ * From the command index, set up the command class in the host ctrllr
++ *
++ * missing guys present on chip but couldn't figure out how to use yet:
++ * 0x0 "stream read"
++ * 0x9 "cancel running command"
++ */
++ switch (cmd->opcode) {
++ case MMC_READ_SINGLE_BLOCK:
++ fire |= GLAMO_FIRE_MMC_CC_SBR; /* single block read */
++ break;
++ case MMC_SWITCH: /* 64 byte payload */
++ case 0x33: /* observed issued by MCI */
++ case MMC_READ_MULTIPLE_BLOCK:
++ /* we will get an interrupt off this */
++ if (!cmd->mrq->stop)
++ /* multiblock no stop */
++ fire |= GLAMO_FIRE_MMC_CC_MBRNS;
++ else
++ /* multiblock with stop */
++ fire |= GLAMO_FIRE_MMC_CC_MBRS;
++ break;
++ case MMC_WRITE_BLOCK:
++ fire |= GLAMO_FIRE_MMC_CC_SBW; /* single block write */
++ break;
++ case MMC_WRITE_MULTIPLE_BLOCK:
++ if (cmd->mrq->stop)
++ /* multiblock with stop */
++ fire |= GLAMO_FIRE_MMC_CC_MBWS;
++ else
++ /* multiblock NO stop-- 'RESERVED'? */
++ fire |= GLAMO_FIRE_MMC_CC_MBWNS;
++ break;
++ case MMC_STOP_TRANSMISSION:
++ fire |= GLAMO_FIRE_MMC_CC_STOP; /* STOP */
++ break;
++ default:
++ fire |= GLAMO_FIRE_MMC_CC_BASIC; /* "basic command" */
++ break;
++ }
++
++ /* always largest timeout */
++ writew(0xfff, host->base + GLAMO_REG_MMC_TIMEOUT);
++
++ /* Generate interrupt on txfer */
++ writew_dly((readw_dly(host->base + GLAMO_REG_MMC_BASIC) & 0x3e) |
++ 0x0800 | GLAMO_BASIC_MMC_NO_CLK_RD_WAIT |
++ GLAMO_BASIC_MMC_EN_COMPL_INT | (sd_drive << 6),
++ host->base + GLAMO_REG_MMC_BASIC);
++
++ /* send the command out on the wire */
++ /* dev_info(&host->pdev->dev, "Using FIRE %04X\n", fire); */
++ writew_dly(fire, host->base + GLAMO_REG_MMC_CMD_FIRE);
++ cmd->error = 0;
++ return 0;
++}
++
++static int glamo_mci_prepare_pio(struct glamo_mci_host *host,
++ struct mmc_data *data)
++{
++ /*
++ * the S-Media-internal RAM offset for our MMC buffer
++ * Read is halfway up the buffer and write is at the start
++ */
++ if (data->flags & MMC_DATA_READ) {
++ writew_dly((u16)(GLAMO_FB_SIZE + (RESSIZE(host->mem_data) / 2)),
++ host->base + GLAMO_REG_MMC_WDATADS1);
++ writew_dly((u16)((GLAMO_FB_SIZE +
++ (RESSIZE(host->mem_data) / 2)) >> 16),
++ host->base + GLAMO_REG_MMC_WDATADS2);
++ } else {
++ writew_dly((u16)GLAMO_FB_SIZE, host->base +
++ GLAMO_REG_MMC_RDATADS1);
++ writew_dly((u16)(GLAMO_FB_SIZE >> 16), host->base +
++ GLAMO_REG_MMC_RDATADS2);
++ }
++
++ /* set up the block info */
++ writew_dly(data->blksz, host->base + GLAMO_REG_MMC_DATBLKLEN);
++ writew_dly(data->blocks, host->base + GLAMO_REG_MMC_DATBLKCNT);
++ dev_dbg(&host->pdev->dev, "(blksz=%d, count=%d)\n",
++ data->blksz, data->blocks);
++ host->pio_sgptr = 0;
++ host->pio_words = 0;
++ host->pio_count = 0;
++ host->pio_active = 0;
++ /* if write, prep the write into the shared RAM before the command */
++ if (data->flags & MMC_DATA_WRITE) {
++ host->pio_active = XFER_WRITE;
++ return do_pio_write(host);
++ }
++ host->pio_active = XFER_READ;
++ return 0;
++}
++
++static void glamo_mci_send_request(struct mmc_host *mmc)
++{
++ struct glamo_mci_host *host = mmc_priv(mmc);
++ struct mmc_request *mrq = host->mrq;
++ struct mmc_command *cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd;
++ u16 * pu16 = (u16 *)&cmd->resp[0];
++ u16 * reg_resp = (u16 *)(host->base + GLAMO_REG_MMC_CMD_RSP1);
++ u16 status;
++ int n;
++ int timeout = 100000000;
++
++ if (host->suspending) {
++ dev_err(&host->pdev->dev, "faking cmd %d "
++ "during suspend\n", cmd->opcode);
++ mmc_request_done(mmc, mrq);
++ return;
++ }
++
++ host->ccnt++;
++ /*
++ * somehow 2.6.24 MCI manages to issue MMC_WRITE_BLOCK *without* the
++ * MMC_DATA_WRITE flag, WTF? Work around the madness.
++ */
++ if (cmd->opcode == MMC_WRITE_BLOCK)
++ if (mrq->data)
++ mrq->data->flags |= MMC_DATA_WRITE;
++
++ /* this guy has data to read/write? */
++ if ((!host->cmd_is_stop) && cmd->data) {
++ int res;
++ host->dcnt++;
++ res = glamo_mci_prepare_pio(host, cmd->data);
++ if (res) {
++ cmd->error = -EIO;
++ cmd->data->error = -EIO;
++ mmc_request_done(mmc, mrq);
++ return;
++ }
++ }
++
++ dev_dbg(&host->pdev->dev,"cmd 0x%x, "
++ "arg 0x%x data=%p mrq->stop=%p flags 0x%x\n",
++ cmd->opcode, cmd->arg, cmd->data, cmd->mrq->stop,
++ cmd->flags);
++
++ /* resume requested clock rate
++ * scale it down by sd_slow_ratio if platform requests it
++ */
++ __glamo_mci_fix_card_div(host, host->clk_div);
++
++ if (glamo_mci_send_command(host, cmd))
++ goto bail;
++ /*
++ * we must spin until response is ready or timed out
++ * -- we don't get interrupts unless there is a bulk rx
++ */
++ do
++ status = readw_dly(host->base + GLAMO_REG_MMC_RB_STAT1);
++ while ((((status >> 15) & 1) != (host->ccnt & 1)) ||
++ (!(status & (GLAMO_STAT1_MMC_RB_RRDY |
++ GLAMO_STAT1_MMC_RTOUT |
++ GLAMO_STAT1_MMC_DTOUT |
++ GLAMO_STAT1_MMC_BWERR |
++ GLAMO_STAT1_MMC_BRERR))));
++
++ if (status & (GLAMO_STAT1_MMC_RTOUT |
++ GLAMO_STAT1_MMC_DTOUT))
++ cmd->error = -ETIMEDOUT;
++ if (status & (GLAMO_STAT1_MMC_BWERR |
++ GLAMO_STAT1_MMC_BRERR))
++ cmd->error = -EILSEQ;
++
++ if (host->cmd_is_stop)
++ goto bail;
++
++ if (cmd->error) {
++ dev_info(&host->pdev->dev, "Error after cmd: 0x%x\n", status);
++ goto done;
++ }
++ /*
++ * mangle the response registers in two different exciting
++ * undocumented ways discovered by trial and error
++ */
++ if (mmc_resp_type(cmd) == MMC_RSP_R2)
++ /* grab the response */
++ for (n = 0; n < 8; n++) /* super mangle power 1 */
++ pu16[n ^ 6] = readw_dly(®_resp[n]);
++ else
++ for (n = 0; n < 3; n++) /* super mangle power 2 */
++ pu16[n] = (readw_dly(®_resp[n]) >> 8) |
++ (readw_dly(®_resp[n + 1]) << 8);
++ /*
++ * if we don't have bulk data to take care of, we're done
++ */
++ if (!cmd->data)
++ goto done;
++ if (!(cmd->data->flags & (MMC_DATA_READ | MMC_DATA_WRITE)))
++ goto done;
++
++ /*
++ * Otherwise can can use the interrupt as async completion --
++ * if there is read data coming, or we wait for write data to complete,
++ * exit without mmc_request_done() as the payload interrupt
++ * will service it
++ */
++ dev_dbg(&host->pdev->dev, "Waiting for payload data\n");
++ /*
++ * if the glamo INT# line isn't wired (*cough* it can happen)
++ * I'm afraid we have to spin on the IRQ status bit and "be
++ * our own INT# line"
++ */
++ if (!glamo_mci_def_pdata.pglamo->irq_works) {
++ /*
++ * we have faith we will get an "interrupt"...
++ * but something insane like suspend problems can mean
++ * we spin here forever, so we timeout after a LONG time
++ */
++ while ((!(readw_dly(glamo_mci_def_pdata.pglamo->base +
++ GLAMO_REG_IRQ_STATUS) & GLAMO_IRQ_MMC)) &&
++ (timeout--))
++ ;
++
++ if (timeout < 0) {
++ if (cmd->data->error)
++ cmd->data->error = -ETIMEDOUT;
++ dev_err(&host->pdev->dev, "Payload timeout\n");
++ goto bail;
++ }
++
++ /* yay we are an interrupt controller! -- call the ISR
++ * it will stop clock to card
++ */
++ glamo_mci_irq(IRQ_GLAMO(GLAMO_IRQIDX_MMC),
++ irq_desc + IRQ_GLAMO(GLAMO_IRQIDX_MMC));
++ }
++ return;
++
++done:
++ host->complete_what = COMPLETION_NONE;
++ host->mrq = NULL;
++ mmc_request_done(host->mmc, cmd->mrq);
++bail:
++ if (!sd_idleclk && !host->force_slow_during_powerup)
++ /* stop the clock to card */
++ __glamo_mci_fix_card_div(host, -1);
++}
++
++static void glamo_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++ struct glamo_mci_host *host = mmc_priv(mmc);
++
++ host->cmd_is_stop = 0;
++ host->mrq = mrq;
++ glamo_mci_send_request(mmc);
++}
++
++static void glamo_mci_reset(struct glamo_mci_host *host)
++{
++ dev_dbg(&host->pdev->dev, "******* glamo_mci_reset\n");
++ /* reset MMC controller */
++ writew_dly(GLAMO_CLOCK_MMC_RESET | GLAMO_CLOCK_MMC_DG_TCLK |
++ GLAMO_CLOCK_MMC_EN_TCLK | GLAMO_CLOCK_MMC_DG_M9CLK |
++ GLAMO_CLOCK_MMC_EN_M9CLK,
++ glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_MMC);
++ msleep(1);
++ /* and disable reset */
++ writew_dly(GLAMO_CLOCK_MMC_DG_TCLK |
++ GLAMO_CLOCK_MMC_EN_TCLK | GLAMO_CLOCK_MMC_DG_M9CLK |
++ GLAMO_CLOCK_MMC_EN_M9CLK,
++ glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_MMC);
++}
++
++
++static void glamo_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
++{
++ struct glamo_mci_host *host = mmc_priv(mmc);
++ int n = 0;
++ int div;
++ int powering = 0;
++
++ /* Set power */
++ switch(ios->power_mode) {
++ case MMC_POWER_ON:
++ case MMC_POWER_UP:
++ /*
++ * we should use very slow clock until first bulk
++ * transfer completes OK
++ */
++ host->force_slow_during_powerup = 1;
++
++ if (host->vdd_current != ios->vdd) {
++ host->pdata->glamo_set_mci_power(ios->power_mode,
++ ios->vdd);
++ host->vdd_current = ios->vdd;
++ }
++ if (host->power_mode_current == MMC_POWER_OFF) {
++ glamo_engine_enable(glamo_mci_def_pdata.pglamo,
++ GLAMO_ENGINE_MMC);
++ powering = 1;
++ }
++ break;
++
++ case MMC_POWER_OFF:
++ default:
++ if (host->power_mode_current == MMC_POWER_OFF)
++ break;
++ /* never want clocking with dead card */
++ __glamo_mci_fix_card_div(host, -1);
++
++ glamo_engine_disable(glamo_mci_def_pdata.pglamo,
++ GLAMO_ENGINE_MMC);
++ host->pdata->glamo_set_mci_power(MMC_POWER_OFF, 0);
++ host->vdd_current = -1;
++ break;
++ }
++ host->power_mode_current = ios->power_mode;
++
++ host->real_rate = __glamo_mci_set_card_clock(host, ios->clock, &div);
++ host->clk_div = div;
++
++ /* after power-up, we are meant to give it >= 74 clocks so it can
++ * initialize itself. Doubt any modern cards need it but anyway...
++ */
++ if (powering)
++ msleep(1);
++
++ if (!sd_idleclk && !host->force_slow_during_powerup)
++ /* stop the clock to card, because we are idle until transfer */
++ __glamo_mci_fix_card_div(host, -1);
++
++ if ((ios->power_mode == MMC_POWER_ON) ||
++ (ios->power_mode == MMC_POWER_UP)) {
++ dev_info(&host->pdev->dev,
++ "powered (vdd = %d) clk: %lukHz div=%d (req: %ukHz). "
++ "Bus width=%d\n",(int)ios->vdd,
++ host->real_rate / 1000, (int)host->clk_div,
++ ios->clock / 1000, (int)ios->bus_width);
++ } else
++ dev_info(&host->pdev->dev, "glamo_mci_set_ios: power down.\n");
++
++ /* set bus width */
++ host->bus_width = ios->bus_width;
++ if (host->bus_width == MMC_BUS_WIDTH_4)
++ n = GLAMO_BASIC_MMC_EN_4BIT_DATA;
++ writew_dly((readw_dly(host->base + GLAMO_REG_MMC_BASIC) &
++ (~(GLAMO_BASIC_MMC_EN_4BIT_DATA |
++ GLAMO_BASIC_MMC_EN_DR_STR0 |
++ GLAMO_BASIC_MMC_EN_DR_STR1))) | n |
++ sd_drive << 6, host->base + GLAMO_REG_MMC_BASIC);
++}
++
++
++/*
++ * no physical write protect supported by us
++ */
++static int glamo_mci_get_ro(struct mmc_host *mmc)
++{
++ return 0;
++}
++
++static struct mmc_host_ops glamo_mci_ops = {
++ .request = glamo_mci_request,
++ .set_ios = glamo_mci_set_ios,
++ .get_ro = glamo_mci_get_ro,
++};
++
++static int glamo_mci_probe(struct platform_device *pdev)
++{
++ struct mmc_host *mmc;
++ struct glamo_mci_host *host;
++ int ret;
++
++ dev_info(&pdev->dev, "glamo_mci driver (C)2007 Openmoko, Inc\n");
++
++ mmc = mmc_alloc_host(sizeof(struct glamo_mci_host), &pdev->dev);
++ if (!mmc) {
++ ret = -ENOMEM;
++ goto probe_out;
++ }
++
++ host = mmc_priv(mmc);
++ host->mmc = mmc;
++ host->pdev = pdev;
++ host->pdata = &glamo_mci_def_pdata;
++ host->power_mode_current = MMC_POWER_OFF;
++
++ host->complete_what = COMPLETION_NONE;
++ host->pio_active = XFER_NONE;
++
++ spin_lock_init(&host->complete_lock);
++
++ host->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ if (!host->mem) {
++ dev_err(&pdev->dev,
++ "failed to get io memory region resouce.\n");
++
++ ret = -ENOENT;
++ goto probe_free_host;
++ }
++
++ host->mem = request_mem_region(host->mem->start,
++ RESSIZE(host->mem), pdev->name);
++
++ if (!host->mem) {
++ dev_err(&pdev->dev, "failed to request io memory region.\n");
++ ret = -ENOENT;
++ goto probe_free_host;
++ }
++
++ host->base = ioremap(host->mem->start, RESSIZE(host->mem));
++ if (!host->base) {
++ dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
++ ret = -EINVAL;
++ goto probe_free_mem_region;
++ }
++
++ /* set the handler for our bit of the shared chip irq register */
++ set_irq_handler(IRQ_GLAMO(GLAMO_IRQIDX_MMC), glamo_mci_irq);
++ /* stash host as our handler's private data */
++ set_irq_data(IRQ_GLAMO(GLAMO_IRQIDX_MMC), host);
++
++ /* Get ahold of our data buffer we use for data in and out on MMC */
++ host->mem_data = platform_get_resource(pdev, IORESOURCE_MEM, 1);
++ if (!host->mem_data) {
++ dev_err(&pdev->dev,
++ "failed to get io memory region resource.\n");
++ ret = -ENOENT;
++ goto probe_iounmap;
++ }
++
++ host->mem_data = request_mem_region(host->mem_data->start,
++ RESSIZE(host->mem_data), pdev->name);
++
++ if (!host->mem_data) {
++ dev_err(&pdev->dev, "failed to request io memory region.\n");
++ ret = -ENOENT;
++ goto probe_iounmap;
++ }
++ host->base_data = ioremap(host->mem_data->start,
++ RESSIZE(host->mem_data));
++ host->data_max_size = RESSIZE(host->mem_data);
++
++ if (host->base_data == 0) {
++ dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
++ ret = -EINVAL;
++ goto probe_free_mem_region_data;
++ }
++
++ host->vdd_current = 0;
++ host->clk_rate = 50000000; /* really it's 49152000 */
++ host->clk_div = 16;
++
++ /* explain our host controller capabilities */
++ mmc->ops = &glamo_mci_ops;
++ mmc->ocr_avail = host->pdata->ocr_avail;
++ mmc->caps = MMC_CAP_4_BIT_DATA |
++ MMC_CAP_MULTIWRITE |
++ MMC_CAP_MMC_HIGHSPEED |
++ MMC_CAP_SD_HIGHSPEED;
++ mmc->f_min = host->clk_rate / 256;
++ mmc->f_max = sd_max_clk;
++
++ mmc->max_blk_count = (1 << 16) - 1; /* GLAMO_REG_MMC_RB_BLKCNT */
++ mmc->max_blk_size = (1 << 12) - 1; /* GLAMO_REG_MMC_RB_BLKLEN */
++ mmc->max_req_size = RESSIZE(host->mem_data) / 2;
++ mmc->max_seg_size = mmc->max_req_size;
++ mmc->max_phys_segs = 1; /* hw doesn't talk about segs??? */
++ mmc->max_hw_segs = 1;
++
++ dev_info(&host->pdev->dev, "probe: mapped mci_base:%p irq:%u.\n",
++ host->base, host->irq);
++
++ if ((ret = mmc_add_host(mmc))) {
++ dev_err(&pdev->dev, "failed to add mmc host.\n");
++ goto probe_free_mem_region_data;
++ }
++
++ platform_set_drvdata(pdev, mmc);
++
++ dev_info(&pdev->dev,"initialisation done.\n");
++ return 0;
++
++ probe_free_mem_region_data:
++ release_mem_region(host->mem_data->start, RESSIZE(host->mem_data));
++
++ probe_iounmap:
++ iounmap(host->base);
++
++ probe_free_mem_region:
++ release_mem_region(host->mem->start, RESSIZE(host->mem));
++
++ probe_free_host:
++ mmc_free_host(mmc);
++ probe_out:
++ return ret;
++}
++
++static int glamo_mci_remove(struct platform_device *pdev)
++{
++ struct mmc_host *mmc = platform_get_drvdata(pdev);
++ struct glamo_mci_host *host = mmc_priv(mmc);
++
++ mmc_remove_host(mmc);
++ /* stop using our handler, revert it to default */
++ set_irq_handler(IRQ_GLAMO(GLAMO_IRQIDX_MMC), handle_level_irq);
++ iounmap(host->base);
++ iounmap(host->base_data);
++ release_mem_region(host->mem->start, RESSIZE(host->mem));
++ release_mem_region(host->mem_data->start, RESSIZE(host->mem_data));
++ mmc_free_host(mmc);
++
++ glamo_engine_disable(glamo_mci_def_pdata.pglamo, GLAMO_ENGINE_MMC);
++ return 0;
++}
++
++
++#ifdef CONFIG_PM
++
++static int glamo_mci_suspend(struct platform_device *dev, pm_message_t state)
++{
++ struct mmc_host *mmc = platform_get_drvdata(dev);
++ struct glamo_mci_host *host = mmc_priv(mmc);
++ int ret;
++
++ /*
++ * possible workaround for SD corruption during suspend - resume
++ * make sure the clock was running during suspend and consequently
++ * resume
++ */
++ __glamo_mci_fix_card_div(host, host->clk_div);
++
++ /* we are going to do more commands to override this in
++ * mmc_suspend_host(), so we need to change sd_idleclk for the
++ * duration as well
++ */
++ suspend_sd_idleclk = sd_idleclk;
++ sd_idleclk = 1;
++
++ host->suspending++;
++ if (host->pdata->mci_all_dependencies_resumed)
++ (host->pdata->mci_suspending)(dev);
++
++ ret = mmc_suspend_host(mmc, state);
++
++ /* so that when we resume, we use any modified max rate */
++ mmc->f_max = sd_max_clk;
++
++ return ret;
++}
++
++int glamo_mci_resume(struct platform_device *dev)
++{
++ struct mmc_host *mmc = platform_get_drvdata(dev);
++ struct glamo_mci_host *host = mmc_priv(mmc);
++ int ret;
++
++ if (host->pdata->mci_all_dependencies_resumed)
++ if (!(host->pdata->mci_all_dependencies_resumed)(dev))
++ return 0;
++
++ host->suspending--;
++
++ ret = mmc_resume_host(mmc);
++
++ /* put sd_idleclk back to pre-suspend state */
++ sd_idleclk = suspend_sd_idleclk;
++
++ return ret;
++}
++EXPORT_SYMBOL_GPL(glamo_mci_resume);
++
++#else /* CONFIG_PM */
++#define glamo_mci_suspend NULL
++#define glamo_mci_resume NULL
++#endif /* CONFIG_PM */
++
++
++static struct platform_driver glamo_mci_driver =
++{
++ .driver.name = "glamo-mci",
++ .probe = glamo_mci_probe,
++ .remove = glamo_mci_remove,
++ .suspend = glamo_mci_suspend,
++ .resume = glamo_mci_resume,
++};
++
++static int __init glamo_mci_init(void)
++{
++ spin_lock_init(&clock_lock);
++ platform_driver_register(&glamo_mci_driver);
++ return 0;
++}
++
++static void __exit glamo_mci_exit(void)
++{
++ platform_driver_unregister(&glamo_mci_driver);
++}
++
++module_init(glamo_mci_init);
++module_exit(glamo_mci_exit);
++
++MODULE_DESCRIPTION("Glamo MMC/SD Card Interface driver");
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
+Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-mci.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/mfd/glamo/glamo-mci.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,80 @@
++/*
++ * linux/drivers/mmc/host/glamo-mmc.h - GLAMO MCI driver
++ *
++ * Copyright (C) 2007-2008 Openmoko, Inc, Andy Green <andy@openmoko.com>
++ * based on S3C MMC driver -->
++ * Copyright (C) 2004-2006 Thomas Kleffel, All Rights Reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++
++enum glamo_mci_waitfor {
++ COMPLETION_NONE,
++ COMPLETION_FINALIZE,
++ COMPLETION_CMDSENT,
++ COMPLETION_RSPFIN,
++ COMPLETION_XFERFINISH,
++ COMPLETION_XFERFINISH_RSPFIN,
++};
++
++struct glamo_mci_host {
++ struct platform_device *pdev;
++ struct glamo_mci_pdata *pdata;
++ struct mmc_host *mmc;
++ struct resource *mem;
++ struct resource *mem_data;
++ struct clk *clk;
++ void __iomem *base;
++ u16 __iomem *base_data;
++ int irq;
++ int irq_cd;
++ int dma;
++ int data_max_size;
++
++ int suspending;
++
++ int power_mode_current;
++ unsigned int vdd_current;
++
++ unsigned long clk_rate;
++ unsigned long clk_div;
++ unsigned long real_rate;
++ u8 prescaler;
++
++ int force_slow_during_powerup;
++
++ unsigned sdiimsk;
++ int dodma;
++
++ volatile int dmatogo;
++
++ struct mmc_request *mrq;
++ int cmd_is_stop;
++
++ spinlock_t complete_lock;
++ volatile enum glamo_mci_waitfor
++ complete_what;
++
++ volatile int dma_complete;
++
++ volatile u32 pio_sgptr;
++ volatile u32 pio_words;
++ volatile u32 pio_count;
++ volatile u16 *pio_ptr;
++#define XFER_NONE 0
++#define XFER_READ 1
++#define XFER_WRITE 2
++ volatile u32 pio_active;
++
++ int bus_width;
++
++ char dbgmsg_cmd[301];
++ char dbgmsg_dat[301];
++ volatile char *status;
++
++ unsigned int ccnt, dcnt;
++ struct tasklet_struct pio_tasklet;
++};
+Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-regs.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/mfd/glamo/glamo-regs.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,632 @@
++#ifndef _GLAMO_REGS_H
++#define _GLAMO_REGS_H
++
++/* Smedia Glamo 336x/337x driver
++ *
++ * (C) 2007 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++enum glamo_regster_offsets {
++ GLAMO_REGOFS_GENERIC = 0x0000,
++ GLAMO_REGOFS_HOSTBUS = 0x0200,
++ GLAMO_REGOFS_MEMORY = 0x0300,
++ GLAMO_REGOFS_VIDCAP = 0x0400,
++ GLAMO_REGOFS_ISP = 0x0500,
++ GLAMO_REGOFS_JPEG = 0x0800,
++ GLAMO_REGOFS_MPEG = 0x0c00,
++ GLAMO_REGOFS_LCD = 0x1100,
++ GLAMO_REGOFS_MMC = 0x1400,
++ GLAMO_REGOFS_MPROC0 = 0x1500,
++ GLAMO_REGOFS_MPROC1 = 0x1580,
++ GLAMO_REGOFS_CMDQUEUE = 0x1600,
++ GLAMO_REGOFS_RISC = 0x1680,
++ GLAMO_REGOFS_2D = 0x1700,
++ GLAMO_REGOFS_3D = 0x1b00,
++ GLAMO_REGOFS_END = 0x2400,
++};
++
++
++enum glamo_register_generic {
++ GLAMO_REG_GCONF1 = 0x0000,
++ GLAMO_REG_GCONF2 = 0x0002,
++#define GLAMO_REG_DEVICE_ID GLAMO_REG_GCONF2
++ GLAMO_REG_GCONF3 = 0x0004,
++#define GLAMO_REG_REVISION_ID GLAMO_REG_GCONF3
++ GLAMO_REG_IRQ_GEN1 = 0x0006,
++#define GLAMO_REG_IRQ_ENABLE GLAMO_REG_IRQ_GEN1
++ GLAMO_REG_IRQ_GEN2 = 0x0008,
++#define GLAMO_REG_IRQ_SET GLAMO_REG_IRQ_GEN2
++ GLAMO_REG_IRQ_GEN3 = 0x000a,
++#define GLAMO_REG_IRQ_CLEAR GLAMO_REG_IRQ_GEN3
++ GLAMO_REG_IRQ_GEN4 = 0x000c,
++#define GLAMO_REG_IRQ_STATUS GLAMO_REG_IRQ_GEN4
++ GLAMO_REG_CLOCK_HOST = 0x0010,
++ GLAMO_REG_CLOCK_MEMORY = 0x0012,
++ GLAMO_REG_CLOCK_LCD = 0x0014,
++ GLAMO_REG_CLOCK_MMC = 0x0016,
++ GLAMO_REG_CLOCK_ISP = 0x0018,
++ GLAMO_REG_CLOCK_JPEG = 0x001a,
++ GLAMO_REG_CLOCK_3D = 0x001c,
++ GLAMO_REG_CLOCK_2D = 0x001e,
++ GLAMO_REG_CLOCK_RISC1 = 0x0020, /* 3365 only? */
++ GLAMO_REG_CLOCK_RISC2 = 0x0022, /* 3365 only? */
++ GLAMO_REG_CLOCK_MPEG = 0x0024,
++ GLAMO_REG_CLOCK_MPROC = 0x0026,
++
++ GLAMO_REG_CLOCK_GEN5_1 = 0x0030,
++ GLAMO_REG_CLOCK_GEN5_2 = 0x0032,
++ GLAMO_REG_CLOCK_GEN6 = 0x0034,
++ GLAMO_REG_CLOCK_GEN7 = 0x0036,
++ GLAMO_REG_CLOCK_GEN8 = 0x0038,
++ GLAMO_REG_CLOCK_GEN9 = 0x003a,
++ GLAMO_REG_CLOCK_GEN10 = 0x003c,
++ GLAMO_REG_CLOCK_GEN11 = 0x003e,
++ GLAMO_REG_PLL_GEN1 = 0x0040,
++ GLAMO_REG_PLL_GEN2 = 0x0042,
++ GLAMO_REG_PLL_GEN3 = 0x0044,
++ GLAMO_REG_PLL_GEN4 = 0x0046,
++ GLAMO_REG_PLL_GEN5 = 0x0048,
++ GLAMO_REG_GPIO_GEN1 = 0x0050,
++ GLAMO_REG_GPIO_GEN2 = 0x0052,
++ GLAMO_REG_GPIO_GEN3 = 0x0054,
++ GLAMO_REG_GPIO_GEN4 = 0x0056,
++ GLAMO_REG_GPIO_GEN5 = 0x0058,
++ GLAMO_REG_GPIO_GEN6 = 0x005a,
++ GLAMO_REG_GPIO_GEN7 = 0x005c,
++ GLAMO_REG_GPIO_GEN8 = 0x005e,
++ GLAMO_REG_GPIO_GEN9 = 0x0060,
++ GLAMO_REG_GPIO_GEN10 = 0x0062,
++ GLAMO_REG_DFT_GEN1 = 0x0070,
++ GLAMO_REG_DFT_GEN2 = 0x0072,
++ GLAMO_REG_DFT_GEN3 = 0x0074,
++ GLAMO_REG_DFT_GEN4 = 0x0076,
++
++ GLAMO_REG_DFT_GEN5 = 0x01e0,
++ GLAMO_REG_DFT_GEN6 = 0x01f0,
++};
++
++#define GLAMO_REG_HOSTBUS(x) (GLAMO_REGOFS_HOSTBUS-2+(x*2))
++
++#define REG_MEM(x) (GLAMO_REGOFS_MEMORY+(x))
++#define GLAMO_REG_MEM_TIMING(x) (GLAMO_REG_MEM_TIMING1-2+(x*2))
++
++enum glamo_register_mem {
++ GLAMO_REG_MEM_TYPE = REG_MEM(0x00),
++ GLAMO_REG_MEM_GEN = REG_MEM(0x02),
++ GLAMO_REG_MEM_TIMING1 = REG_MEM(0x04),
++ GLAMO_REG_MEM_TIMING2 = REG_MEM(0x06),
++ GLAMO_REG_MEM_TIMING3 = REG_MEM(0x08),
++ GLAMO_REG_MEM_TIMING4 = REG_MEM(0x0a),
++ GLAMO_REG_MEM_TIMING5 = REG_MEM(0x0c),
++ GLAMO_REG_MEM_TIMING6 = REG_MEM(0x0e),
++ GLAMO_REG_MEM_TIMING7 = REG_MEM(0x10),
++ GLAMO_REG_MEM_TIMING8 = REG_MEM(0x12),
++ GLAMO_REG_MEM_TIMING9 = REG_MEM(0x14),
++ GLAMO_REG_MEM_TIMING10 = REG_MEM(0x16),
++ GLAMO_REG_MEM_TIMING11 = REG_MEM(0x18),
++ GLAMO_REG_MEM_POWER1 = REG_MEM(0x1a),
++ GLAMO_REG_MEM_POWER2 = REG_MEM(0x1c),
++ GLAMO_REG_MEM_LCD_BUF1 = REG_MEM(0x1e),
++ GLAMO_REG_MEM_LCD_BUF2 = REG_MEM(0x20),
++ GLAMO_REG_MEM_LCD_BUF3 = REG_MEM(0x22),
++ GLAMO_REG_MEM_LCD_BUF4 = REG_MEM(0x24),
++ GLAMO_REG_MEM_BIST1 = REG_MEM(0x26),
++ GLAMO_REG_MEM_BIST2 = REG_MEM(0x28),
++ GLAMO_REG_MEM_BIST3 = REG_MEM(0x2a),
++ GLAMO_REG_MEM_BIST4 = REG_MEM(0x2c),
++ GLAMO_REG_MEM_BIST5 = REG_MEM(0x2e),
++ GLAMO_REG_MEM_MAH1 = REG_MEM(0x30),
++ GLAMO_REG_MEM_MAH2 = REG_MEM(0x32),
++ GLAMO_REG_MEM_DRAM1 = REG_MEM(0x34),
++ GLAMO_REG_MEM_DRAM2 = REG_MEM(0x36),
++ GLAMO_REG_MEM_CRC = REG_MEM(0x38),
++};
++
++#define GLAMO_MEM_TYPE_MASK 0x03
++
++enum glamo_reg_mem_dram1 {
++ /* b0 - b10 == refresh period, 1 -> 2048 clocks */
++ GLAMO_MEM_DRAM1_EN_GATE_CLK = (1 << 11),
++ GLAMO_MEM_DRAM1_SELF_REFRESH = (1 << 12),
++ GLAMO_MEM_DRAM1_EN_GATE_CKE = (1 << 13),
++ GLAMO_MEM_DRAM1_EN_DRAM_REFRESH = (1 << 14),
++ GLAMO_MEM_DRAM1_EN_MODEREG_SET = (1 << 15),
++};
++
++enum glamo_reg_mem_dram2 {
++ GLAMO_MEM_DRAM2_DEEP_PWRDOWN = (1 << 12),
++};
++
++enum glamo_irq_index {
++ GLAMO_IRQIDX_HOSTBUS = 0,
++ GLAMO_IRQIDX_JPEG = 1,
++ GLAMO_IRQIDX_MPEG = 2,
++ GLAMO_IRQIDX_MPROC1 = 3,
++ GLAMO_IRQIDX_MPROC0 = 4,
++ GLAMO_IRQIDX_CMDQUEUE = 5,
++ GLAMO_IRQIDX_2D = 6,
++ GLAMO_IRQIDX_MMC = 7,
++ GLAMO_IRQIDX_RISC = 8,
++};
++
++enum glamo_irq {
++ GLAMO_IRQ_HOSTBUS = (1 << GLAMO_IRQIDX_HOSTBUS),
++ GLAMO_IRQ_JPEG = (1 << GLAMO_IRQIDX_JPEG),
++ GLAMO_IRQ_MPEG = (1 << GLAMO_IRQIDX_MPEG),
++ GLAMO_IRQ_MPROC1 = (1 << GLAMO_IRQIDX_MPROC1),
++ GLAMO_IRQ_MPROC0 = (1 << GLAMO_IRQIDX_MPROC0),
++ GLAMO_IRQ_CMDQUEUE = (1 << GLAMO_IRQIDX_CMDQUEUE),
++ GLAMO_IRQ_2D = (1 << GLAMO_IRQIDX_2D),
++ GLAMO_IRQ_MMC = (1 << GLAMO_IRQIDX_MMC),
++ GLAMO_IRQ_RISC = (1 << GLAMO_IRQIDX_RISC),
++};
++
++enum glamo_reg_clock_host {
++ GLAMO_CLOCK_HOST_DG_BCLK = 0x0001,
++ GLAMO_CLOCK_HOST_DG_M0CLK = 0x0004,
++ GLAMO_CLOCK_HOST_RESET = 0x1000,
++};
++
++enum glamo_reg_clock_mem {
++ GLAMO_CLOCK_MEM_DG_M1CLK = 0x0001,
++ GLAMO_CLOCK_MEM_EN_M1CLK = 0x0002,
++ GLAMO_CLOCK_MEM_DG_MOCACLK = 0x0004,
++ GLAMO_CLOCK_MEM_EN_MOCACLK = 0x0008,
++ GLAMO_CLOCK_MEM_RESET = 0x1000,
++ GLAMO_CLOCK_MOCA_RESET = 0x2000,
++};
++
++enum glamo_reg_clock_lcd {
++ GLAMO_CLOCK_LCD_DG_DCLK = 0x0001,
++ GLAMO_CLOCK_LCD_EN_DCLK = 0x0002,
++ GLAMO_CLOCK_LCD_DG_DMCLK = 0x0004,
++ GLAMO_CLOCK_LCD_EN_DMCLK = 0x0008,
++ //
++ GLAMO_CLOCK_LCD_EN_DHCLK = 0x0020,
++ GLAMO_CLOCK_LCD_DG_M5CLK = 0x0040,
++ GLAMO_CLOCK_LCD_EN_M5CLK = 0x0080,
++ GLAMO_CLOCK_LCD_RESET = 0x1000,
++};
++
++enum glamo_reg_clock_mmc {
++ GLAMO_CLOCK_MMC_DG_TCLK = 0x0001,
++ GLAMO_CLOCK_MMC_EN_TCLK = 0x0002,
++ GLAMO_CLOCK_MMC_DG_M9CLK = 0x0004,
++ GLAMO_CLOCK_MMC_EN_M9CLK = 0x0008,
++ GLAMO_CLOCK_MMC_RESET = 0x1000,
++};
++
++enum glamo_reg_basic_mmc {
++ /* set to disable CRC error rejection */
++ GLAMO_BASIC_MMC_DISABLE_CRC = 0x0001,
++ /* enable completion interrupt */
++ GLAMO_BASIC_MMC_EN_COMPL_INT = 0x0002,
++ /* stop MMC clock while enforced idle waiting for data from card */
++ GLAMO_BASIC_MMC_NO_CLK_RD_WAIT = 0x0004,
++ /* 0 = 1-bit bus to card, 1 = use 4-bit bus (has to be negotiated) */
++ GLAMO_BASIC_MMC_EN_4BIT_DATA = 0x0008,
++ /* enable 75K pullups on D3..D0 */
++ GLAMO_BASIC_MMC_EN_DATA_PUPS = 0x0010,
++ /* enable 75K pullup on CMD */
++ GLAMO_BASIC_MMC_EN_CMD_PUP = 0x0020,
++ /* IO drive strength 00=weak -> 11=strongest */
++ GLAMO_BASIC_MMC_EN_DR_STR0 = 0x0040,
++ GLAMO_BASIC_MMC_EN_DR_STR1 = 0x0080,
++ /* TCLK delay stage A, 0000 = 500ps --> 1111 = 8ns */
++ GLAMO_BASIC_MMC_EN_TCLK_DLYA0 = 0x0100,
++ GLAMO_BASIC_MMC_EN_TCLK_DLYA1 = 0x0200,
++ GLAMO_BASIC_MMC_EN_TCLK_DLYA2 = 0x0400,
++ GLAMO_BASIC_MMC_EN_TCLK_DLYA3 = 0x0800,
++ /* TCLK delay stage B (cumulative), 0000 = 500ps --> 1111 = 8ns */
++ GLAMO_BASIC_MMC_EN_TCLK_DLYB0 = 0x1000,
++ GLAMO_BASIC_MMC_EN_TCLK_DLYB1 = 0x2000,
++ GLAMO_BASIC_MMC_EN_TCLK_DLYB2 = 0x4000,
++ GLAMO_BASIC_MMC_EN_TCLK_DLYB3 = 0x8000,
++};
++
++enum glamo_reg_stat1_mmc {
++ /* command "counter" (really: toggle) */
++ GLAMO_STAT1_MMC_CMD_CTR = 0x8000,
++ /* engine is idle */
++ GLAMO_STAT1_MMC_IDLE = 0x4000,
++ /* readback response is ready */
++ GLAMO_STAT1_MMC_RB_RRDY = 0x0200,
++ /* readback data is ready */
++ GLAMO_STAT1_MMC_RB_DRDY = 0x0100,
++ /* no response timeout */
++ GLAMO_STAT1_MMC_RTOUT = 0x0020,
++ /* no data timeout */
++ GLAMO_STAT1_MMC_DTOUT = 0x0010,
++ /* CRC error on block write */
++ GLAMO_STAT1_MMC_BWERR = 0x0004,
++ /* CRC error on block read */
++ GLAMO_STAT1_MMC_BRERR = 0x0002
++};
++
++enum glamo_reg_fire_mmc {
++ /* command "counter" (really: toggle)
++ * the STAT1 register reflects this so you can ensure you don't look
++ * at status for previous command
++ */
++ GLAMO_FIRE_MMC_CMD_CTR = 0x8000,
++ /* sets kind of response expected */
++ GLAMO_FIRE_MMC_RES_MASK = 0x0700,
++ /* sets command type */
++ GLAMO_FIRE_MMC_TYP_MASK = 0x00C0,
++ /* sets command class */
++ GLAMO_FIRE_MMC_CLS_MASK = 0x000F,
++};
++
++enum glamo_fire_mmc_response_types {
++ GLAMO_FIRE_MMC_RSPT_R1 = 0x0000,
++ GLAMO_FIRE_MMC_RSPT_R1b = 0x0100,
++ GLAMO_FIRE_MMC_RSPT_R2 = 0x0200,
++ GLAMO_FIRE_MMC_RSPT_R3 = 0x0300,
++ GLAMO_FIRE_MMC_RSPT_R4 = 0x0400,
++ GLAMO_FIRE_MMC_RSPT_R5 = 0x0500,
++};
++
++enum glamo_fire_mmc_command_types {
++ /* broadcast, no response */
++ GLAMO_FIRE_MMC_CMDT_BNR = 0x0000,
++ /* broadcast, with response */
++ GLAMO_FIRE_MMC_CMDT_BR = 0x0040,
++ /* addressed, no data */
++ GLAMO_FIRE_MMC_CMDT_AND = 0x0080,
++ /* addressed, with data */
++ GLAMO_FIRE_MMC_CMDT_AD = 0x00C0,
++};
++
++enum glamo_fire_mmc_command_class {
++ /* "Stream Read" */
++ GLAMO_FIRE_MMC_CC_STRR = 0x0000,
++ /* Single Block Read */
++ GLAMO_FIRE_MMC_CC_SBR = 0x0001,
++ /* Multiple Block Read With Stop */
++ GLAMO_FIRE_MMC_CC_MBRS = 0x0002,
++ /* Multiple Block Read No Stop */
++ GLAMO_FIRE_MMC_CC_MBRNS = 0x0003,
++ /* RESERVED for "Stream Write" */
++ GLAMO_FIRE_MMC_CC_STRW = 0x0004,
++ /* "Stream Write" */
++ GLAMO_FIRE_MMC_CC_SBW = 0x0005,
++ /* RESERVED for Multiple Block Write With Stop */
++ GLAMO_FIRE_MMC_CC_MBWS = 0x0006,
++ /* Multiple Block Write No Stop */
++ GLAMO_FIRE_MMC_CC_MBWNS = 0x0007,
++ /* STOP command */
++ GLAMO_FIRE_MMC_CC_STOP = 0x0008,
++ /* Cancel on Running Command */
++ GLAMO_FIRE_MMC_CC_CANCL = 0x0009,
++ /* "Basic Command" */
++ GLAMO_FIRE_MMC_CC_BASIC = 0x000a,
++};
++
++/* these are offsets from the start of the MMC register region */
++enum glamo_register_mmc {
++ /* MMC command, b15..8 = cmd arg b7..0; b7..1 = CRC; b0 = end bit */
++ GLAMO_REG_MMC_CMD_REG1 = 0x00,
++ /* MMC command, b15..0 = cmd arg b23 .. 8 */
++ GLAMO_REG_MMC_CMD_REG2 = 0x02,
++ /* MMC command, b15=start, b14=transmission,
++ * b13..8=cmd idx, b7..0=cmd arg b31..24
++ */
++ GLAMO_REG_MMC_CMD_REG3 = 0x04,
++ GLAMO_REG_MMC_CMD_FIRE = 0x06,
++ GLAMO_REG_MMC_CMD_RSP1 = 0x10,
++ GLAMO_REG_MMC_CMD_RSP2 = 0x12,
++ GLAMO_REG_MMC_CMD_RSP3 = 0x14,
++ GLAMO_REG_MMC_CMD_RSP4 = 0x16,
++ GLAMO_REG_MMC_CMD_RSP5 = 0x18,
++ GLAMO_REG_MMC_CMD_RSP6 = 0x1a,
++ GLAMO_REG_MMC_CMD_RSP7 = 0x1c,
++ GLAMO_REG_MMC_CMD_RSP8 = 0x1e,
++ GLAMO_REG_MMC_RB_STAT1 = 0x20,
++ GLAMO_REG_MMC_RB_BLKCNT = 0x22,
++ GLAMO_REG_MMC_RB_BLKLEN = 0x24,
++ GLAMO_REG_MMC_BASIC = 0x30,
++ GLAMO_REG_MMC_RDATADS1 = 0x34,
++ GLAMO_REG_MMC_RDATADS2 = 0x36,
++ GLAMO_REG_MMC_WDATADS1 = 0x38,
++ GLAMO_REG_MMC_WDATADS2 = 0x3a,
++ GLAMO_REG_MMC_DATBLKCNT = 0x3c,
++ GLAMO_REG_MMC_DATBLKLEN = 0x3e,
++ GLAMO_REG_MMC_TIMEOUT = 0x40,
++
++};
++
++enum glamo_reg_clock_isp {
++ GLAMO_CLOCK_ISP_DG_I1CLK = 0x0001,
++ GLAMO_CLOCK_ISP_EN_I1CLK = 0x0002,
++ GLAMO_CLOCK_ISP_DG_CCLK = 0x0004,
++ GLAMO_CLOCK_ISP_EN_CCLK = 0x0008,
++ //
++ GLAMO_CLOCK_ISP_EN_SCLK = 0x0020,
++ GLAMO_CLOCK_ISP_DG_M2CLK = 0x0040,
++ GLAMO_CLOCK_ISP_EN_M2CLK = 0x0080,
++ GLAMO_CLOCK_ISP_DG_M15CLK = 0x0100,
++ GLAMO_CLOCK_ISP_EN_M15CLK = 0x0200,
++ GLAMO_CLOCK_ISP1_RESET = 0x1000,
++ GLAMO_CLOCK_ISP2_RESET = 0x2000,
++};
++
++enum glamo_reg_clock_jpeg {
++ GLAMO_CLOCK_JPEG_DG_JCLK = 0x0001,
++ GLAMO_CLOCK_JPEG_EN_JCLK = 0x0002,
++ GLAMO_CLOCK_JPEG_DG_M3CLK = 0x0004,
++ GLAMO_CLOCK_JPEG_EN_M3CLK = 0x0008,
++ GLAMO_CLOCK_JPEG_RESET = 0x1000,
++};
++
++enum glamo_reg_clock_2d {
++ GLAMO_CLOCK_2D_DG_GCLK = 0x0001,
++ GLAMO_CLOCK_2D_EN_GCLK = 0x0002,
++ GLAMO_CLOCK_2D_DG_M7CLK = 0x0004,
++ GLAMO_CLOCK_2D_EN_M7CLK = 0x0008,
++ GLAMO_CLOCK_2D_DG_M6CLK = 0x0010,
++ GLAMO_CLOCK_2D_EN_M6CLK = 0x0020,
++ GLAMO_CLOCK_2D_RESET = 0x1000,
++ GLAMO_CLOCK_2D_CQ_RESET = 0x2000,
++};
++
++enum glamo_reg_clock_3d {
++ GLAMO_CLOCK_3D_DG_ECLK = 0x0001,
++ GLAMO_CLOCK_3D_EN_ECLK = 0x0002,
++ GLAMO_CLOCK_3D_DG_RCLK = 0x0004,
++ GLAMO_CLOCK_3D_EN_RCLK = 0x0008,
++ GLAMO_CLOCK_3D_DG_M8CLK = 0x0010,
++ GLAMO_CLOCK_3D_EN_M8CLK = 0x0020,
++ GLAMO_CLOCK_3D_BACK_RESET = 0x1000,
++ GLAMO_CLOCK_3D_FRONT_RESET = 0x2000,
++};
++
++enum glamo_reg_clock_mpeg {
++ GLAMO_CLOCK_MPEG_DG_X0CLK = 0x0001,
++ GLAMO_CLOCK_MPEG_EN_X0CLK = 0x0002,
++ GLAMO_CLOCK_MPEG_DG_X1CLK = 0x0004,
++ GLAMO_CLOCK_MPEG_EN_X1CLK = 0x0008,
++ GLAMO_CLOCK_MPEG_DG_X2CLK = 0x0010,
++ GLAMO_CLOCK_MPEG_EN_X2CLK = 0x0020,
++ GLAMO_CLOCK_MPEG_DG_X3CLK = 0x0040,
++ GLAMO_CLOCK_MPEG_EN_X3CLK = 0x0080,
++ GLAMO_CLOCK_MPEG_DG_X4CLK = 0x0100,
++ GLAMO_CLOCK_MPEG_EN_X4CLK = 0x0200,
++ GLAMO_CLOCK_MPEG_DG_X6CLK = 0x0400,
++ GLAMO_CLOCK_MPEG_EN_X6CLK = 0x0800,
++ GLAMO_CLOCK_MPEG_ENC_RESET = 0x1000,
++ GLAMO_CLOCK_MPEG_DEC_RESET = 0x2000,
++};
++
++enum glamo_reg_clock51 {
++ GLAMO_CLOCK_GEN51_EN_DIV_MCLK = 0x0001,
++ GLAMO_CLOCK_GEN51_EN_DIV_SCLK = 0x0002,
++ GLAMO_CLOCK_GEN51_EN_DIV_JCLK = 0x0004,
++ GLAMO_CLOCK_GEN51_EN_DIV_DCLK = 0x0008,
++ GLAMO_CLOCK_GEN51_EN_DIV_DMCLK = 0x0010,
++ GLAMO_CLOCK_GEN51_EN_DIV_DHCLK = 0x0020,
++ GLAMO_CLOCK_GEN51_EN_DIV_GCLK = 0x0040,
++ GLAMO_CLOCK_GEN51_EN_DIV_TCLK = 0x0080,
++ /* FIXME: higher bits */
++};
++
++enum glamo_reg_hostbus2 {
++ GLAMO_HOSTBUS2_MMIO_EN_ISP = 0x0001,
++ GLAMO_HOSTBUS2_MMIO_EN_JPEG = 0x0002,
++ GLAMO_HOSTBUS2_MMIO_EN_MPEG = 0x0004,
++ GLAMO_HOSTBUS2_MMIO_EN_LCD = 0x0008,
++ GLAMO_HOSTBUS2_MMIO_EN_MMC = 0x0010,
++ GLAMO_HOSTBUS2_MMIO_EN_MICROP0 = 0x0020,
++ GLAMO_HOSTBUS2_MMIO_EN_MICROP1 = 0x0040,
++ GLAMO_HOSTBUS2_MMIO_EN_CQ = 0x0080,
++ GLAMO_HOSTBUS2_MMIO_EN_RISC = 0x0100,
++ GLAMO_HOSTBUS2_MMIO_EN_2D = 0x0200,
++ GLAMO_HOSTBUS2_MMIO_EN_3D = 0x0400,
++};
++
++/* LCD Controller */
++
++#define REG_LCD(x) (x)
++enum glamo_reg_lcd {
++ GLAMO_REG_LCD_MODE1 = REG_LCD(0x00),
++ GLAMO_REG_LCD_MODE2 = REG_LCD(0x02),
++ GLAMO_REG_LCD_MODE3 = REG_LCD(0x04),
++ GLAMO_REG_LCD_WIDTH = REG_LCD(0x06),
++ GLAMO_REG_LCD_HEIGHT = REG_LCD(0x08),
++ GLAMO_REG_LCD_POLARITY = REG_LCD(0x0a),
++ GLAMO_REG_LCD_A_BASE1 = REG_LCD(0x0c),
++ GLAMO_REG_LCD_A_BASE2 = REG_LCD(0x0e),
++ GLAMO_REG_LCD_B_BASE1 = REG_LCD(0x10),
++ GLAMO_REG_LCD_B_BASE2 = REG_LCD(0x12),
++ GLAMO_REG_LCD_C_BASE1 = REG_LCD(0x14),
++ GLAMO_REG_LCD_C_BASE2 = REG_LCD(0x16),
++ GLAMO_REG_LCD_PITCH = REG_LCD(0x18),
++ /* RES */
++ GLAMO_REG_LCD_HORIZ_TOTAL = REG_LCD(0x1c),
++ /* RES */
++ GLAMO_REG_LCD_HORIZ_RETR_START = REG_LCD(0x20),
++ /* RES */
++ GLAMO_REG_LCD_HORIZ_RETR_END = REG_LCD(0x24),
++ /* RES */
++ GLAMO_REG_LCD_HORIZ_DISP_START = REG_LCD(0x28),
++ /* RES */
++ GLAMO_REG_LCD_HORIZ_DISP_END = REG_LCD(0x2c),
++ /* RES */
++ GLAMO_REG_LCD_VERT_TOTAL = REG_LCD(0x30),
++ /* RES */
++ GLAMO_REG_LCD_VERT_RETR_START = REG_LCD(0x34),
++ /* RES */
++ GLAMO_REG_LCD_VERT_RETR_END = REG_LCD(0x38),
++ /* RES */
++ GLAMO_REG_LCD_VERT_DISP_START = REG_LCD(0x3c),
++ /* RES */
++ GLAMO_REG_LCD_VERT_DISP_END = REG_LCD(0x40),
++ /* RES */
++ GLAMO_REG_LCD_POL = REG_LCD(0x44),
++ GLAMO_REG_LCD_DATA_START = REG_LCD(0x46),
++ GLAMO_REG_LCD_FRATE_CONTRO = REG_LCD(0x48),
++ GLAMO_REG_LCD_DATA_CMD_HDR = REG_LCD(0x4a),
++ GLAMO_REG_LCD_SP_START = REG_LCD(0x4c),
++ GLAMO_REG_LCD_SP_END = REG_LCD(0x4e),
++ GLAMO_REG_LCD_CURSOR_BASE1 = REG_LCD(0x50),
++ GLAMO_REG_LCD_CURSOR_BASE2 = REG_LCD(0x52),
++ GLAMO_REG_LCD_CURSOR_PITCH = REG_LCD(0x54),
++ GLAMO_REG_LCD_CURSOR_X_SIZE = REG_LCD(0x56),
++ GLAMO_REG_LCD_CURSOR_Y_SIZE = REG_LCD(0x58),
++ GLAMO_REG_LCD_CURSOR_X_POS = REG_LCD(0x5a),
++ GLAMO_REG_LCD_CURSOR_Y_POS = REG_LCD(0x5c),
++ GLAMO_REG_LCD_CURSOR_PRESET = REG_LCD(0x5e),
++ GLAMO_REG_LCD_CURSOR_FG_COLOR = REG_LCD(0x60),
++ /* RES */
++ GLAMO_REG_LCD_CURSOR_BG_COLOR = REG_LCD(0x64),
++ /* RES */
++ GLAMO_REG_LCD_CURSOR_DST_COLOR = REG_LCD(0x68),
++ /* RES */
++ GLAMO_REG_LCD_STATUS1 = REG_LCD(0x80),
++ GLAMO_REG_LCD_STATUS2 = REG_LCD(0x82),
++ GLAMO_REG_LCD_STATUS3 = REG_LCD(0x84),
++ GLAMO_REG_LCD_STATUS4 = REG_LCD(0x86),
++ /* RES */
++ GLAMO_REG_LCD_COMMAND1 = REG_LCD(0xa0),
++ GLAMO_REG_LCD_COMMAND2 = REG_LCD(0xa2),
++ /* RES */
++ GLAMO_REG_LCD_WFORM_DELAY1 = REG_LCD(0xb0),
++ GLAMO_REG_LCD_WFORM_DELAY2 = REG_LCD(0xb2),
++ /* RES */
++ GLAMO_REG_LCD_GAMMA_CORR = REG_LCD(0x100),
++ /* RES */
++ GLAMO_REG_LCD_GAMMA_R_ENTRY01 = REG_LCD(0x110),
++ GLAMO_REG_LCD_GAMMA_R_ENTRY23 = REG_LCD(0x112),
++ GLAMO_REG_LCD_GAMMA_R_ENTRY45 = REG_LCD(0x114),
++ GLAMO_REG_LCD_GAMMA_R_ENTRY67 = REG_LCD(0x116),
++ GLAMO_REG_LCD_GAMMA_R_ENTRY8 = REG_LCD(0x118),
++ /* RES */
++ GLAMO_REG_LCD_GAMMA_G_ENTRY01 = REG_LCD(0x130),
++ GLAMO_REG_LCD_GAMMA_G_ENTRY23 = REG_LCD(0x132),
++ GLAMO_REG_LCD_GAMMA_G_ENTRY45 = REG_LCD(0x134),
++ GLAMO_REG_LCD_GAMMA_G_ENTRY67 = REG_LCD(0x136),
++ GLAMO_REG_LCD_GAMMA_G_ENTRY8 = REG_LCD(0x138),
++ /* RES */
++ GLAMO_REG_LCD_GAMMA_B_ENTRY01 = REG_LCD(0x150),
++ GLAMO_REG_LCD_GAMMA_B_ENTRY23 = REG_LCD(0x152),
++ GLAMO_REG_LCD_GAMMA_B_ENTRY45 = REG_LCD(0x154),
++ GLAMO_REG_LCD_GAMMA_B_ENTRY67 = REG_LCD(0x156),
++ GLAMO_REG_LCD_GAMMA_B_ENTRY8 = REG_LCD(0x158),
++ /* RES */
++ GLAMO_REG_LCD_SRAM_DRIVING1 = REG_LCD(0x160),
++ GLAMO_REG_LCD_SRAM_DRIVING2 = REG_LCD(0x162),
++ GLAMO_REG_LCD_SRAM_DRIVING3 = REG_LCD(0x164),
++};
++
++enum glamo_reg_lcd_mode1 {
++ GLAMO_LCD_MODE1_PWRSAVE = 0x0001,
++ GLAMO_LCD_MODE1_PARTIAL_PRT = 0x0002,
++ GLAMO_LCD_MODE1_HWFLIP = 0x0004,
++ GLAMO_LCD_MODE1_LCD2 = 0x0008,
++ /* RES */
++ GLAMO_LCD_MODE1_PARTIAL_MODE = 0x0020,
++ GLAMO_LCD_MODE1_CURSOR_DSTCOLOR = 0x0040,
++ GLAMO_LCD_MODE1_PARTIAL_ENABLE = 0x0080,
++ GLAMO_LCD_MODE1_TVCLK_IN_ENABLE = 0x0100,
++ GLAMO_LCD_MODE1_HSYNC_HIGH_ACT = 0x0200,
++ GLAMO_LCD_MODE1_VSYNC_HIGH_ACT = 0x0400,
++ GLAMO_LCD_MODE1_HSYNC_FLIP = 0x0800,
++ GLAMO_LCD_MODE1_GAMMA_COR_EN = 0x1000,
++ GLAMO_LCD_MODE1_DITHER_EN = 0x2000,
++ GLAMO_LCD_MODE1_CURSOR_EN = 0x4000,
++ GLAMO_LCD_MODE1_ROTATE_EN = 0x8000,
++};
++
++enum glamo_reg_lcd_mode2 {
++ GLAMO_LCD_MODE2_CRC_CHECK_EN = 0x0001,
++ GLAMO_LCD_MODE2_DCMD_PER_LINE = 0x0002,
++ GLAMO_LCD_MODE2_NOUSE_BDEF = 0x0004,
++ GLAMO_LCD_MODE2_OUT_POS_MODE = 0x0008,
++ GLAMO_LCD_MODE2_FRATE_CTRL_EN = 0x0010,
++ GLAMO_LCD_MODE2_SINGLE_BUFFER = 0x0020,
++ GLAMO_LCD_MODE2_SER_LSB_TO_MSB = 0x0040,
++ /* FIXME */
++};
++
++enum glamo_reg_lcd_mode3 {
++ /* LCD color source data format */
++ GLAMO_LCD_SRC_RGB565 = 0x0000,
++ GLAMO_LCD_SRC_ARGB1555 = 0x4000,
++ GLAMO_LCD_SRC_ARGB4444 = 0x8000,
++ /* interface type */
++ GLAMO_LCD_MODE3_LCD = 0x1000,
++ GLAMO_LCD_MODE3_RGB = 0x0800,
++ GLAMO_LCD_MODE3_CPU = 0x0000,
++ /* mode */
++ GLAMO_LCD_MODE3_RGB332 = 0x0000,
++ GLAMO_LCD_MODE3_RGB444 = 0x0100,
++ GLAMO_LCD_MODE3_RGB565 = 0x0200,
++ GLAMO_LCD_MODE3_RGB666 = 0x0300,
++ /* depth */
++ GLAMO_LCD_MODE3_6BITS = 0x0000,
++ GLAMO_LCD_MODE3_8BITS = 0x0010,
++ GLAMO_LCD_MODE3_9BITS = 0x0020,
++ GLAMO_LCD_MODE3_16BITS = 0x0030,
++ GLAMO_LCD_MODE3_18BITS = 0x0040,
++};
++
++enum glamo_lcd_rot_mode {
++ GLAMO_LCD_ROT_MODE_0 = 0x0000,
++ GLAMO_LCD_ROT_MODE_180 = 0x2000,
++ GLAMO_LCD_ROT_MODE_MIRROR = 0x4000,
++ GLAMO_LCD_ROT_MODE_FLIP = 0x6000,
++ GLAMO_LCD_ROT_MODE_90 = 0x8000,
++ GLAMO_LCD_ROT_MODE_270 = 0xa000,
++};
++#define GLAMO_LCD_ROT_MODE_MASK 0xe000
++
++enum glamo_lcd_cmd_type {
++ GLAMO_LCD_CMD_TYPE_DISP = 0x0000,
++ GLAMO_LCD_CMD_TYPE_PARALLEL = 0x4000,
++ GLAMO_LCD_CMD_TYPE_SERIAL = 0x8000,
++ GLAMO_LCD_CMD_TYPE_SERIAL_DIRECT= 0xc000,
++};
++#define GLAMO_LCD_CMD_TYPE_MASK 0xc000
++
++enum glamo_lcd_cmds {
++ GLAMO_LCD_CMD_DATA_DISP_FIRE = 0x00,
++ GLAMO_LCD_CMD_DATA_DISP_SYNC = 0x01, /* RGB only */
++ /* switch to command mode, no display */
++ GLAMO_LCD_CMD_DATA_FIRE_NO_DISP = 0x02,
++ /* display until VSYNC, switch to command */
++ GLAMO_LCD_CMD_DATA_FIRE_VSYNC = 0x11,
++ /* display until HSYNC, switch to command */
++ GLAMO_LCD_CMD_DATA_FIRE_HSYNC = 0x12,
++ /* display until VSYNC, 1 black frame, VSYNC, switch to command */
++ GLAMO_LCD_CMD_DATA_FIRE_VSYNC_B = 0x13,
++ /* don't care about display and switch to command */
++ GLAMO_LCD_CMD_DATA_FIRE_FREE = 0x14, /* RGB only */
++ /* don't care about display, keep data display but disable data,
++ * and switch to command */
++ GLAMO_LCD_CMD_DATA_FIRE_FREE_D = 0x15, /* RGB only */
++};
++
++enum glamo_core_revisions {
++ GLAMO_CORE_REV_A0 = 0x0000,
++ GLAMO_CORE_REV_A1 = 0x0001,
++ GLAMO_CORE_REV_A2 = 0x0002,
++ GLAMO_CORE_REV_A3 = 0x0003,
++};
++
++#endif /* _GLAMO_REGS_H */
+Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-spi-gpio.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/mfd/glamo/glamo-spi-gpio.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,288 @@
++/*
++ * Copyright (C) 2007 Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ *
++ * Smedia Glamo GPIO based SPI driver
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * This driver currently only implements a minimum subset of the hardware
++ * features, esp. those features that are required to drive the jbt6k74
++ * LCM controller asic in the TD028TTEC1 LCM.
++ *
++*/
++
++#define DEBUG
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/spinlock.h>
++#include <linux/workqueue.h>
++#include <linux/platform_device.h>
++
++#include <linux/spi/spi.h>
++#include <linux/spi/spi_bitbang.h>
++#include <linux/spi/glamo.h>
++
++#include <linux/glamofb.h>
++
++#include <asm/hardware.h>
++
++#include "glamo-core.h"
++#include "glamo-regs.h"
++
++struct glamo_spigpio {
++ struct spi_bitbang bitbang;
++ struct spi_master *master;
++ struct glamo_spigpio_info *info;
++ struct glamo_core *glamo;
++};
++
++static inline struct glamo_spigpio *to_sg(struct spi_device *spi)
++{
++ return spi->controller_data;
++}
++
++static inline void setsck(struct spi_device *dev, int on)
++{
++ struct glamo_spigpio *sg = to_sg(dev);
++ glamo_gpio_setpin(sg->glamo, sg->info->pin_clk, on ? 1 : 0);
++}
++
++static inline void setmosi(struct spi_device *dev, int on)
++{
++ struct glamo_spigpio *sg = to_sg(dev);
++ glamo_gpio_setpin(sg->glamo, sg->info->pin_mosi, on ? 1 : 0);
++}
++
++static inline u32 getmiso(struct spi_device *dev)
++{
++ struct glamo_spigpio *sg = to_sg(dev);
++ if (sg->info->pin_miso)
++ return glamo_gpio_getpin(sg->glamo, sg->info->pin_miso) ? 1 : 0;
++ else
++ return 0;
++}
++
++#define spidelay(x) ndelay(x)
++
++#define EXPAND_BITBANG_TXRX
++#include <linux/spi/spi_bitbang.h>
++
++static u32 glamo_spigpio_txrx_mode0(struct spi_device *spi,
++ unsigned nsecs, u32 word, u8 bits)
++{
++ return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
++}
++
++static u32 glamo_spigpio_txrx_mode1(struct spi_device *spi,
++ unsigned nsecs, u32 word, u8 bits)
++{
++ return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
++}
++
++static u32 glamo_spigpio_txrx_mode2(struct spi_device *spi,
++ unsigned nsecs, u32 word, u8 bits)
++{
++ return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
++}
++
++static u32 glamo_spigpio_txrx_mode3(struct spi_device *spi,
++ unsigned nsecs, u32 word, u8 bits)
++{
++ return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
++}
++
++
++#if 0
++static int glamo_spigpio_setupxfer(struct spi_device *spi,
++ struct spi_transfer *t)
++{
++ struct glamo_spi *gs = to_sg(spi);
++ unsigned int bpw;
++
++ bpw = t ? t->bits_per_word : spi->bits_per_word;
++
++ if (bpw != 9 && bpw != 8) {
++ dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw);
++ return -EINVAL;
++ }
++
++ return 0;
++}
++#endif
++
++static void glamo_spigpio_chipsel(struct spi_device *spi, int value)
++{
++ struct glamo_spigpio *gs = to_sg(spi);
++#if 0
++ dev_dbg(&spi->dev, "chipsel %d: spi=%p, gs=%p, info=%p, handle=%p\n",
++ value, spi, gs, gs->info, gs->info->glamo);
++#endif
++ glamo_gpio_setpin(gs->glamo, gs->info->pin_cs, value ? 0 : 1);
++}
++
++
++static int glamo_spigpio_probe(struct platform_device *pdev)
++{
++ struct spi_master *master;
++ struct glamo_spigpio *sp;
++ int ret;
++ int i;
++
++ master = spi_alloc_master(&pdev->dev, sizeof(struct glamo_spigpio));
++ if (master == NULL) {
++ dev_err(&pdev->dev, "failed to allocate spi master\n");
++ ret = -ENOMEM;
++ goto err;
++ }
++
++ sp = spi_master_get_devdata(master);
++ platform_set_drvdata(pdev, sp);
++ sp->info = pdev->dev.platform_data;
++ if (!sp->info) {
++ dev_err(&pdev->dev, "can't operate without platform data\n");
++ ret = -EIO;
++ goto err_no_pdev;
++ }
++
++ master->num_chipselect = 1;
++ master->bus_num = 2; /* FIXME: use dynamic number */
++
++ sp->master = spi_master_get(master);
++ sp->glamo = sp->info->glamo;
++
++ sp->bitbang.master = sp->master;
++ sp->bitbang.chipselect = glamo_spigpio_chipsel;
++ sp->bitbang.txrx_word[SPI_MODE_0] = glamo_spigpio_txrx_mode0;
++ sp->bitbang.txrx_word[SPI_MODE_1] = glamo_spigpio_txrx_mode1;
++ sp->bitbang.txrx_word[SPI_MODE_2] = glamo_spigpio_txrx_mode2;
++ sp->bitbang.txrx_word[SPI_MODE_3] = glamo_spigpio_txrx_mode3;
++
++ /* set state of spi pins */
++ glamo_gpio_setpin(sp->glamo, sp->info->pin_clk, 0);
++ glamo_gpio_setpin(sp->glamo, sp->info->pin_mosi, 0);
++ glamo_gpio_setpin(sp->glamo, sp->info->pin_cs, 1);
++
++ glamo_gpio_cfgpin(sp->glamo, sp->info->pin_clk);
++ glamo_gpio_cfgpin(sp->glamo, sp->info->pin_mosi);
++ glamo_gpio_cfgpin(sp->glamo, sp->info->pin_cs);
++ if (sp->info->pin_miso)
++ glamo_gpio_cfgpin(sp->glamo, sp->info->pin_miso);
++
++ /* bring the LCM panel out of reset if it isn't already */
++
++ glamo_gpio_setpin(sp->glamo, GLAMO_GPIO4, 1);
++ glamo_gpio_cfgpin(sp->glamo, GLAMO_GPIO4_OUTPUT);
++ msleep(90);
++
++#if 0
++ sp->dev = &pdev->dev;
++
++ sp->bitbang.setup_transfer = glamo_spi_setupxfer;
++ sp->bitbang.txrx_bufs = glamo_spi_txrx;
++ sp->bitbang.master->setup = glamo_spi_setup;
++#endif
++
++ ret = spi_bitbang_start(&sp->bitbang);
++ if (ret)
++ goto err_no_bitbang;
++
++ /* register the chips to go with the board */
++
++ for (i = 0; i < sp->info->board_size; i++) {
++ dev_info(&pdev->dev, "registering %p: %s\n",
++ &sp->info->board_info[i],
++ sp->info->board_info[i].modalias);
++
++ sp->info->board_info[i].controller_data = sp;
++ spi_new_device(master, sp->info->board_info + i);
++ }
++
++ return 0;
++
++err_no_bitbang:
++ platform_set_drvdata(pdev, NULL);
++err_no_pdev:
++ spi_master_put(sp->bitbang.master);
++err:
++ return ret;
++
++}
++
++static int glamo_spigpio_remove(struct platform_device *pdev)
++{
++ struct glamo_spigpio *sp = platform_get_drvdata(pdev);
++
++ spi_bitbang_stop(&sp->bitbang);
++ spi_master_put(sp->bitbang.master);
++
++ return 0;
++}
++
++/*#define glamo_spigpio_suspend NULL
++#define glamo_spigpio_resume NULL
++*/
++
++
++#ifdef CONFIG_PM
++static int glamo_spigpio_suspend(struct platform_device *pdev, pm_message_t state)
++{
++ return 0;
++}
++
++static int glamo_spigpio_resume(struct platform_device *pdev)
++{
++ struct glamo_spigpio *sp = platform_get_drvdata(pdev);
++
++ if (!sp)
++ return 0;
++
++ /* set state of spi pins */
++ glamo_gpio_setpin(sp->glamo, sp->info->pin_clk, 0);
++ glamo_gpio_setpin(sp->glamo, sp->info->pin_mosi, 0);
++ glamo_gpio_setpin(sp->glamo, sp->info->pin_cs, 1);
++
++ glamo_gpio_cfgpin(sp->glamo, sp->info->pin_clk);
++ glamo_gpio_cfgpin(sp->glamo, sp->info->pin_mosi);
++ glamo_gpio_cfgpin(sp->glamo, sp->info->pin_cs);
++ if (sp->info->pin_miso)
++ glamo_gpio_cfgpin(sp->glamo, sp->info->pin_miso);
++
++ return 0;
++}
++#endif
++
++static struct platform_driver glamo_spi_drv = {
++ .probe = glamo_spigpio_probe,
++ .remove = glamo_spigpio_remove,
++#ifdef CONFIG_PM
++ .suspend_late = glamo_spigpio_suspend,
++ .resume_early = glamo_spigpio_resume,
++#endif
++ .driver = {
++ .name = "glamo-spi-gpio",
++ .owner = THIS_MODULE,
++ },
++};
++
++static int __init glamo_spi_init(void)
++{
++ return platform_driver_register(&glamo_spi_drv);
++}
++
++static void __exit glamo_spi_exit(void)
++{
++ platform_driver_unregister(&glamo_spi_drv);
++}
++
++module_init(glamo_spi_init);
++module_exit(glamo_spi_exit);
++
++MODULE_DESCRIPTION("Smedia Glamo 336x/337x LCM serial command SPI Driver");
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>")
++MODULE_LICENSE("GPL");
+Index: linux-2.6.24.7/drivers/mfd/glamo/Kconfig
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/mfd/glamo/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,44 @@
++config MFD_GLAMO
++ bool "Smedia Glamo 336x/337x support"
++ help
++ This enables the core driver for the Smedia Glamo 336x/337x
++ multi-function device. It includes irq_chip demultiplex as
++ well as clock / power management and GPIO support.
++
++config MFD_GLAMO_FB
++ tristate "Smedia Glamo 336x/337x framebuffer support"
++ depends on FB && MFD_GLAMO
++ help
++ Frame buffer driver for the LCD controller in the Smedia Glamo
++ 336x/337x.
++
++ This driver is also available as a module ( = code which can be
++ inserted and removed from the running kernel whenever you want). The
++ module will be called glamofb. If you want to compile it as a module,
++ say M here and read <file:Documentation/modules.txt>.
++
++ If unsure, say N.
++
++config MFD_GLAMO_SPI_GPIO
++ tristate "Glamo GPIO SPI bitbang support"
++ depends on MFD_GLAMO
++ help
++ Enable a bitbanging SPI adapter driver for the Smedia Glamo.
++
++config MFD_GLAMO_SPI_FB
++ tristate "Glamo LCM control channel SPI support"
++ depends on MFD_GLAMO_FB
++ help
++ Enable a bitbanging SPI adapter driver for the Smedia Glamo LCM
++ control channel. This SPI interface is frequently used to
++ interconnect the LCM control interface.
++
++config MFD_GLAMO_MCI
++ tristate "Glamo S3C SD/MMC Card Interface support"
++ depends on MFD_GLAMO && MMC
++ help
++ This selects a driver for the MCI interface found in
++ the S-Media GLAMO chip, as used in Openmoko
++ neo1973 GTA-02.
++
++ If unsure, say N.
+\ No newline at end of file
+Index: linux-2.6.24.7/drivers/mfd/glamo/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/mfd/glamo/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,12 @@
++#
++# Makefile for the Smedia Glamo framebuffer driver
++#
++
++obj-$(CONFIG_MFD_GLAMO) += glamo-core.o glamo-gpio.o
++obj-$(CONFIG_MFD_GLAMO_SPI) += glamo-spi.o
++obj-$(CONFIG_MFD_GLAMO_SPI_GPIO) += glamo-spi-gpio.o
++
++obj-$(CONFIG_MFD_GLAMO_FB) += glamo-fb.o
++obj-$(CONFIG_MFD_GLAMO_SPI_FB) += glamo-lcm-spi.o
++obj-$(CONFIG_MFD_GLAMO_MCI) += glamo-mci.o
++
+Index: linux-2.6.24.7/drivers/mfd/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/mfd/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/mfd/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -15,6 +15,8 @@ config MFD_SM501
+ interface. The device may be connected by PCI or local bus with
+ varying functions enabled.
+
++source "drivers/mfd/glamo/Kconfig"
++
+ endmenu
+
+ menu "Multimedia Capabilities Port drivers"
+Index: linux-2.6.24.7/drivers/mfd/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/drivers/mfd/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/mfd/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -3,6 +3,7 @@
+ #
+
+ obj-$(CONFIG_MFD_SM501) += sm501.o
++obj-$(CONFIG_MFD_GLAMO) += glamo/
+
+ obj-$(CONFIG_MCP) += mcp-core.o
+ obj-$(CONFIG_MCP_SA11X0) += mcp-sa11x0.o
+Index: linux-2.6.24.7/drivers/mmc/host/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/mmc/host/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/mmc/host/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -130,3 +130,14 @@ config MMC_SPI
+
+ If unsure, or if your system has no SPI master driver, say N.
+
++config MMC_S3C
++ tristate "Samsung S3C24xx SD/MMC Card Interface support"
++ depends on ARCH_S3C2410 && MMC
++ help
++ This selects a driver for the MCI interface found in
++ Samsung's S3C2410, S3C2412, S3C2440, S3C2442 CPUs.
++ If you have a board based on one of those and a MMC/SD
++ slot, say Y or M here.
++
++ If unsure, say N.
++
+Index: linux-2.6.24.7/drivers/mmc/host/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/drivers/mmc/host/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/mmc/host/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -17,4 +17,4 @@ obj-$(CONFIG_MMC_OMAP) += omap.o
+ obj-$(CONFIG_MMC_AT91) += at91_mci.o
+ obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
+ obj-$(CONFIG_MMC_SPI) += mmc_spi.o
+-
++obj-$(CONFIG_MMC_S3C) += s3cmci.o
+Index: linux-2.6.24.7/drivers/mmc/host/s3cmci.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/mmc/host/s3cmci.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,1563 @@
++/*
++ * linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver
++ *
++ * Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de>
++ * Copyright (C) 2007 Harald Welte <laforge@gnumonks.org>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/module.h>
++#include <linux/dma-mapping.h>
++#include <linux/clk.h>
++#include <linux/mmc/host.h>
++#include <linux/platform_device.h>
++#include <linux/irq.h>
++#include <linux/delay.h>
++#include <linux/spinlock.h>
++
++#include <asm/dma.h>
++#include <asm/dma-mapping.h>
++
++#include <asm/io.h>
++#include <asm/arch/regs-sdi.h>
++#include <asm/arch/regs-gpio.h>
++#include <asm/arch/mci.h>
++#include <asm/arch/dma.h>
++
++#include "s3cmci.h"
++
++#define DRIVER_NAME "s3c-mci"
++
++static spinlock_t clock_lock;
++
++/*
++ * Max SD clock rate (in Hz)
++ *
++ * you can override this on the kernel command line using
++ *
++ * s3cmci.sd_max_clk=10000000
++ *
++ * for example.
++ */
++
++static int sd_max_clk = 25000000;
++module_param(sd_max_clk, int, 0644);
++
++/*
++ * SD allow SD clock to run while idle
++ *
++ * you can override this on kernel commandline using
++ *
++ * s3cmci.sd_idleclk=0
++ *
++ * for example.
++ */
++
++static int sd_idleclk; /* disallow idle clock by default */
++module_param(sd_idleclk, int, 0644);
++
++/*
++ * Slow SD clock rate
++ *
++ * you can override this on kernel commandline using
++ *
++ * s3cmci.sd_slow_ratio=8
++ *
++ * for example.
++ *
++ * A platform callback is used to decide effective clock rate. If not
++ * defined, then the max is used, if defined and the callback returns
++ * nonzero, the rate is divided by this factor.
++ */
++
++static int sd_slow_ratio = 8;
++module_param(sd_slow_ratio, int, 0644);
++
++/* used to stash real idleclk state in suspend: we force it to run in there */
++static int suspend_sd_idleclk;
++
++enum dbg_channels {
++ dbg_err = (1 << 0),
++ dbg_debug = (1 << 1),
++ dbg_info = (1 << 2),
++ dbg_irq = (1 << 3),
++ dbg_sg = (1 << 4),
++ dbg_dma = (1 << 5),
++ dbg_pio = (1 << 6),
++ dbg_fail = (1 << 7),
++ dbg_conf = (1 << 8),
++};
++
++static const int dbgmap_err = dbg_err | dbg_fail;
++static const int dbgmap_info = dbg_info | dbg_conf;
++static const int dbgmap_debug = dbg_debug;
++
++#define dbg(host, channels, args...) \
++ do { \
++ if (dbgmap_err & channels) \
++ dev_err(&host->pdev->dev, args); \
++ else if (dbgmap_info & channels) \
++ dev_info(&host->pdev->dev, args);\
++ else if (dbgmap_debug & channels) \
++ dev_dbg(&host->pdev->dev, args); \
++ } while (0)
++
++#define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1)
++
++static struct s3c2410_dma_client s3cmci_dma_client = {
++ .name = "s3c-mci",
++};
++
++static void finalize_request(struct s3cmci_host *host);
++static void s3cmci_send_request(struct mmc_host *mmc);
++static void s3cmci_reset(struct s3cmci_host *host);
++
++#ifdef CONFIG_MMC_DEBUG
++static inline void dbg_dumpregs(struct s3cmci_host *host, char *prefix)
++{
++ u32 con, pre, cmdarg, cmdcon, cmdsta, r0, r1, r2, r3, timer, bsize;
++ u32 datcon, datcnt, datsta, fsta, imask;
++
++ con = readl(host->base + S3C2410_SDICON);
++ pre = readl(host->base + S3C2410_SDIPRE);
++ cmdarg = readl(host->base + S3C2410_SDICMDARG);
++ cmdcon = readl(host->base + S3C2410_SDICMDCON);
++ cmdsta = readl(host->base + S3C2410_SDICMDSTAT);
++ r0 = readl(host->base + S3C2410_SDIRSP0);
++ r1 = readl(host->base + S3C2410_SDIRSP1);
++ r2 = readl(host->base + S3C2410_SDIRSP2);
++ r3 = readl(host->base + S3C2410_SDIRSP3);
++ timer = readl(host->base + S3C2410_SDITIMER);
++ bsize = readl(host->base + S3C2410_SDIBSIZE);
++ datcon = readl(host->base + S3C2410_SDIDCON);
++ datcnt = readl(host->base + S3C2410_SDIDCNT);
++ datsta = readl(host->base + S3C2410_SDIDSTA);
++ fsta = readl(host->base + S3C2410_SDIFSTA);
++ imask = readl(host->base + host->sdiimsk);
++
++ dbg(host, dbg_debug, "%s CON:[%08x] PRE:[%08x] TMR:[%08x]\n",
++ prefix, con, pre, timer);
++
++ dbg(host, dbg_debug, "%s CCON:[%08x] CARG:[%08x] CSTA:[%08x]\n",
++ prefix, cmdcon, cmdarg, cmdsta);
++
++ dbg(host, dbg_debug, "%s DCON:[%08x] FSTA:[%08x]"
++ " DSTA:[%08x] DCNT:[%08x]\n",
++ prefix, datcon, fsta, datsta, datcnt);
++
++ dbg(host, dbg_debug, "%s R0:[%08x] R1:[%08x]"
++ " R2:[%08x] R3:[%08x]\n",
++ prefix, r0, r1, r2, r3);
++}
++
++static void prepare_dbgmsg(struct s3cmci_host *host, struct mmc_command *cmd,
++ int stop)
++{
++ snprintf(host->dbgmsg_cmd, 300,
++ "#%u%s op:CMD%d arg:0x%08x flags:0x08%x retries:%u",
++ host->ccnt, (stop?" (STOP)":""), cmd->opcode,
++ cmd->arg, cmd->flags, cmd->retries);
++
++ if (cmd->data) {
++ snprintf(host->dbgmsg_dat, 300,
++ "#%u bsize:%u blocks:%u bytes:%u",
++ host->dcnt, cmd->data->blksz,
++ cmd->data->blocks,
++ cmd->data->blocks * cmd->data->blksz);
++ } else {
++ host->dbgmsg_dat[0] = '\0';
++ }
++}
++
++static void dbg_dumpcmd(struct s3cmci_host *host, struct mmc_command *cmd,
++ int fail)
++{
++ unsigned int dbglvl = fail?dbg_fail:dbg_debug;
++
++ if (!cmd)
++ return;
++
++ if (cmd->error == 0)
++ dbg(host, dbglvl, "CMD[OK] %s R0:0x%08x\n",
++ host->dbgmsg_cmd, cmd->resp[0]);
++ else
++ dbg(host, dbglvl, "CMD[FAIL(%d)] %s Status:%s\n",
++ cmd->error, host->dbgmsg_cmd, host->status);
++
++ if (!cmd->data)
++ return;
++
++ if (cmd->data->error == 0)
++ dbg(host, dbglvl, "DAT[OK] %s\n", host->dbgmsg_dat);
++ else
++ dbg(host, dbglvl, "DAT[FAIL(%d)] %s DCNT:0x%08x\n",
++ cmd->data->error, host->dbgmsg_dat,
++ readl(host->base + S3C2410_SDIDCNT));
++}
++#endif /* CONFIG_MMC_DEBUG */
++
++static inline u32 enable_imask(struct s3cmci_host *host, u32 imask)
++{
++ u32 newmask;
++
++ newmask = readl(host->base + host->sdiimsk);
++ newmask |= imask;
++
++ writel(newmask, host->base + host->sdiimsk);
++
++ return newmask;
++}
++
++static inline u32 disable_imask(struct s3cmci_host *host, u32 imask)
++{
++ u32 newmask;
++
++ newmask = readl(host->base + host->sdiimsk);
++ newmask &= ~imask;
++
++ writel(newmask, host->base + host->sdiimsk);
++
++ return newmask;
++}
++
++static inline void clear_imask(struct s3cmci_host *host)
++{
++ writel(0, host->base + host->sdiimsk);
++}
++
++static inline int get_data_buffer(struct s3cmci_host *host,
++ u32 *bytes, u8 **pointer)
++{
++ struct scatterlist *sg;
++
++ if (host->pio_active == XFER_NONE)
++ return -EINVAL;
++
++ if ((!host->mrq) || (!host->mrq->data))
++ return -EINVAL;
++
++ if (host->pio_sgptr >= host->mrq->data->sg_len) {
++ dbg(host, dbg_debug, "no more buffers (%i/%i)\n",
++ host->pio_sgptr, host->mrq->data->sg_len);
++ return -EBUSY;
++ }
++ sg = &host->mrq->data->sg[host->pio_sgptr];
++
++ *bytes = sg->length;
++ *pointer = page_address(sg_page(sg)) + sg->offset;
++
++ host->pio_sgptr++;
++
++ dbg(host, dbg_sg, "new buffer (%i/%i)\n",
++ host->pio_sgptr, host->mrq->data->sg_len);
++
++ return 0;
++}
++
++#define FIFO_FILL(host) (readl(host->base + S3C2410_SDIFSTA) & \
++ S3C2410_SDIFSTA_COUNTMASK)
++#define FIFO_FREE(host) (63 - (readl(host->base + S3C2410_SDIFSTA) \
++ & S3C2410_SDIFSTA_COUNTMASK))
++
++static inline void do_pio_read(struct s3cmci_host *host)
++{
++ int res;
++ int fifo;
++ void __iomem *from_ptr;
++
++ /* write real prescaler to host, it might be set slow to fix */
++ writel(host->sdipre, host->base + S3C2410_SDIPRE);
++
++ from_ptr = host->base + host->sdidata;
++
++ while ((fifo = FIFO_FILL(host))) {
++ if (!host->pio_bytes) {
++ res = get_data_buffer(host, &host->pio_bytes,
++ &host->pio_ptr);
++ if (res) {
++ host->pio_active = XFER_NONE;
++ host->complete_what = COMPLETION_FINALIZE;
++
++ dbg(host, dbg_pio, "pio_read(): "
++ "complete (no more data).\n");
++ return;
++ }
++
++ dbg(host, dbg_pio, "pio_read(): new target: "
++ "[%i]@[%p]\n", host->pio_bytes, host->pio_ptr);
++ }
++
++ dbg(host, dbg_pio, "pio_read(): fifo:[%02i] "
++ "buffer:[%03i] dcnt:[%08X]\n", fifo, host->pio_bytes,
++ readl(host->base + S3C2410_SDIDCNT));
++
++ if (fifo > host->pio_bytes)
++ fifo = host->pio_bytes;
++
++ host->pio_bytes -= fifo;
++ host->pio_count += fifo;
++
++ /* we might have an unaligned start of data */
++ while (((unsigned long)host->pio_ptr & 0x03) && fifo) {
++ *(host->pio_ptr++) = readb(host->base + host->sdidata_b);
++ fifo--;
++ }
++
++ /* and a major chunk of data in the middle */
++ for (; fifo >= 4; fifo -=4) {
++ *(u32 *) host->pio_ptr = readl(from_ptr);
++ host->pio_ptr+= 4;
++ }
++
++ /* as well as some non-modulo-four trailer */
++ while (fifo) {
++ *(host->pio_ptr++) = readb(host->base + host->sdidata_b);
++ fifo--;
++ }
++ }
++
++ if (!host->pio_bytes) {
++ res = get_data_buffer(host, &host->pio_bytes, &host->pio_ptr);
++ if (res) {
++ dbg(host, dbg_pio, "pio_read(): "
++ "complete (no more buffers).\n");
++ host->pio_active = XFER_NONE;
++ host->complete_what = COMPLETION_FINALIZE;
++
++ return;
++ }
++ }
++
++ enable_imask(host, S3C2410_SDIIMSK_RXFIFOHALF
++ | S3C2410_SDIIMSK_RXFIFOLAST);
++}
++
++static inline void do_pio_write(struct s3cmci_host *host)
++{
++ int res;
++ int fifo;
++
++ void __iomem *to_ptr;
++
++ to_ptr = host->base + host->sdidata;
++
++ while ((fifo = FIFO_FREE(host))) {
++ if (!host->pio_bytes) {
++ res = get_data_buffer(host, &host->pio_bytes,
++ &host->pio_ptr);
++ if (res) {
++ dbg(host, dbg_pio, "pio_write(): "
++ "complete (no more data).\n");
++ host->pio_active = XFER_NONE;
++
++ return;
++ }
++
++ dbg(host, dbg_pio, "pio_write(): "
++ "new source: [%i]@[%p]\n",
++ host->pio_bytes, host->pio_ptr);
++
++ }
++
++ if (fifo > host->pio_bytes)
++ fifo = host->pio_bytes;
++
++ host->pio_bytes -= fifo;
++ host->pio_count += fifo;
++
++ /* we might have an unaligned start of data */
++ while (((unsigned long)host->pio_ptr & 0x03) && fifo) {
++ writeb(*(host->pio_ptr++), host->base + host->sdidata_b);
++ fifo--;
++ }
++
++ /* and a major chunk of data in the middle */
++ for (; fifo >= 4; fifo -=4) {
++ writel(*(u32 *) host->pio_ptr, to_ptr);
++ host->pio_ptr += 4;
++ }
++
++ /* as well as some non-modulo-four trailer */
++ while (fifo) {
++ writeb(*(host->pio_ptr++), host->base + host->sdidata_b);
++ fifo--;
++ }
++ }
++
++ enable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
++}
++
++static void pio_tasklet(unsigned long data)
++{
++ struct s3cmci_host *host = (struct s3cmci_host *) data;
++
++ disable_irq(host->irq);
++
++ if (host->pio_active == XFER_WRITE)
++ do_pio_write(host);
++
++ if (host->pio_active == XFER_READ)
++ do_pio_read(host);
++
++ if (host->complete_what == COMPLETION_FINALIZE) {
++ clear_imask(host);
++ if (host->pio_active != XFER_NONE) {
++ dbg(host, dbg_err, "unfinished %s "
++ "- pio_count:[%u] pio_bytes:[%u]\n",
++ (host->pio_active == XFER_READ)?"read":"write",
++ host->pio_count, host->pio_bytes);
++
++ host->mrq->data->error = -EIO;
++ }
++
++ finalize_request(host);
++ } else
++ enable_irq(host->irq);
++}
++
++static void __s3cmci_enable_clock(struct s3cmci_host *host)
++{
++ u32 mci_con;
++ unsigned long flags;
++
++ /* enable the clock if clock rate is > 0 */
++ if (host->real_rate) {
++ spin_lock_irqsave(&clock_lock, flags);
++
++ mci_con = readl(host->base + S3C2410_SDICON);
++ mci_con |= S3C2410_SDICON_CLOCKTYPE;
++ writel(mci_con, host->base + S3C2410_SDICON);
++
++ spin_unlock_irqrestore(&clock_lock, flags);
++ }
++}
++
++static void __s3cmci_disable_clock(struct s3cmci_host *host)
++{
++ u32 mci_con;
++ unsigned long flags;
++
++ if (!sd_idleclk) {
++ spin_lock_irqsave(&clock_lock, flags);
++
++ mci_con = readl(host->base + S3C2410_SDICON);
++ mci_con &= ~S3C2410_SDICON_CLOCKTYPE;
++ writel(mci_con, host->base + S3C2410_SDICON);
++
++ spin_unlock_irqrestore(&clock_lock, flags);
++ }
++}
++
++
++/*
++ * ISR for SDI Interface IRQ
++ * Communication between driver and ISR works as follows:
++ * host->mrq points to current request
++ * host->complete_what tells ISR when the request is considered done
++ * COMPLETION_CMDSENT when the command was sent
++ * COMPLETION_RSPFIN when a response was received
++ * COMPLETION_XFERFINISH when the data transfer is finished
++ * COMPLETION_XFERFINISH_RSPFIN both of the above.
++ * host->complete_request is the completion-object the driver waits for
++ *
++ * 1) Driver sets up host->mrq and host->complete_what
++ * 2) Driver prepares the transfer
++ * 3) Driver enables interrupts
++ * 4) Driver starts transfer
++ * 5) Driver waits for host->complete_rquest
++ * 6) ISR checks for request status (errors and success)
++ * 6) ISR sets host->mrq->cmd->error and host->mrq->data->error
++ * 7) ISR completes host->complete_request
++ * 8) ISR disables interrupts
++ * 9) Driver wakes up and takes care of the request
++ *
++ * Note: "->error"-fields are expected to be set to 0 before the request
++ * was issued by mmc.c - therefore they are only set, when an error
++ * contition comes up
++ */
++
++static irqreturn_t s3cmci_irq(int irq, void *dev_id)
++{
++ struct s3cmci_host *host;
++ struct mmc_command *cmd;
++ u32 mci_csta, mci_dsta, mci_fsta, mci_dcnt, mci_imsk;
++ u32 mci_cclear, mci_dclear;
++ unsigned long iflags;
++ int cardint = 0;
++
++ host = (struct s3cmci_host *)dev_id;
++
++ spin_lock_irqsave(&host->complete_lock, iflags);
++
++ mci_csta = readl(host->base + S3C2410_SDICMDSTAT);
++ mci_dsta = readl(host->base + S3C2410_SDIDSTA);
++ mci_dcnt = readl(host->base + S3C2410_SDIDCNT);
++ mci_fsta = readl(host->base + S3C2410_SDIFSTA);
++ mci_imsk = readl(host->base + host->sdiimsk);
++ mci_cclear = 0;
++ mci_dclear = 0;
++
++ if ((host->complete_what == COMPLETION_NONE) ||
++ (host->complete_what == COMPLETION_FINALIZE)) {
++ host->status = "nothing to complete";
++ clear_imask(host);
++ goto irq_out;
++ }
++
++ if (!host->mrq) {
++ host->status = "no active mrq";
++ clear_imask(host);
++ goto irq_out;
++ }
++
++ cmd = host->cmd_is_stop?host->mrq->stop:host->mrq->cmd;
++
++ if (!cmd) {
++ host->status = "no active cmd";
++ clear_imask(host);
++ goto irq_out;
++ }
++
++ if (!host->dodma) {
++ if ((host->pio_active == XFER_WRITE) &&
++ (mci_fsta & S3C2410_SDIFSTA_TFDET)) {
++
++ disable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
++ tasklet_schedule(&host->pio_tasklet);
++ host->status = "pio tx";
++ }
++
++ if ((host->pio_active == XFER_READ) &&
++ (mci_fsta & S3C2410_SDIFSTA_RFDET)) {
++
++ disable_imask(host, S3C2410_SDIIMSK_RXFIFOHALF |
++ S3C2410_SDIIMSK_RXFIFOLAST);
++
++ tasklet_schedule(&host->pio_tasklet);
++ host->status = "pio rx";
++ }
++ }
++
++ if (mci_csta & S3C2410_SDICMDSTAT_CMDTIMEOUT) {
++ cmd->error = -ETIMEDOUT;
++ host->status = "error: command timeout";
++ goto fail_transfer;
++ }
++
++ if (mci_csta & S3C2410_SDICMDSTAT_CMDSENT) {
++ if (host->complete_what == COMPLETION_CMDSENT) {
++ host->status = "ok: command sent";
++ goto close_transfer;
++ }
++
++ mci_cclear |= S3C2410_SDICMDSTAT_CMDSENT;
++ }
++
++ if (mci_csta & S3C2410_SDICMDSTAT_CRCFAIL) {
++ if (cmd->flags & MMC_RSP_CRC) {
++ if (host->mrq->cmd->flags & MMC_RSP_136) {
++ dbg(host, dbg_irq, "fixup for chip bug: "
++ "ignore CRC fail with long rsp\n");
++ } else {
++ cmd->error = -EILSEQ;
++ host->status = "error: bad command crc";
++ goto fail_transfer;
++ }
++ }
++
++ mci_cclear |= S3C2410_SDICMDSTAT_CRCFAIL;
++ }
++
++ if (mci_csta & S3C2410_SDICMDSTAT_RSPFIN) {
++ if (host->complete_what == COMPLETION_RSPFIN) {
++ host->status = "ok: command response received";
++ goto close_transfer;
++ }
++
++ if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN)
++ host->complete_what = COMPLETION_XFERFINISH;
++
++ mci_cclear |= S3C2410_SDICMDSTAT_RSPFIN;
++ }
++
++ /* errors handled after this point are only relevant
++ when a data transfer is in progress */
++
++ if (!cmd->data)
++ goto clear_status_bits;
++
++ /* Check for FIFO failure */
++ if (host->is2440) {
++ if (mci_fsta & S3C2440_SDIFSTA_FIFOFAIL) {
++ host->mrq->data->error = -EIO;
++ host->status = "error: 2440 fifo failure";
++ goto fail_transfer;
++ }
++ } else {
++ if (mci_dsta & S3C2410_SDIDSTA_FIFOFAIL) {
++ cmd->data->error = -EIO;
++ host->status = "error: fifo failure";
++ goto fail_transfer;
++ }
++ }
++
++ if (mci_dsta & S3C2410_SDIDSTA_RXCRCFAIL) {
++ cmd->data->error = -EILSEQ;
++ host->status = "error: bad data crc (outgoing)";
++ goto fail_transfer;
++ }
++
++ if (mci_dsta & S3C2410_SDIDSTA_CRCFAIL) {
++ cmd->data->error = -EIO;
++ host->status = "error: bad data crc (incoming)";
++ goto fail_transfer;
++ }
++
++ if (mci_dsta & S3C2410_SDIDSTA_DATATIMEOUT) {
++ cmd->data->error = -ETIMEDOUT;
++ host->status = "error: data timeout";
++ goto fail_transfer;
++ }
++
++ if (mci_dsta & S3C2410_SDIDSTA_XFERFINISH) {
++ if (host->complete_what == COMPLETION_XFERFINISH) {
++ host->status = "ok: data transfer completed";
++ goto close_transfer;
++ }
++
++ if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN)
++ host->complete_what = COMPLETION_RSPFIN;
++
++ mci_dclear |= S3C2410_SDIDSTA_XFERFINISH;
++ }
++
++ if (mci_dsta & S3C2410_SDIDSTA_SDIOIRQDETECT) {
++ cardint = 1;
++ mci_dclear |= S3C2410_SDIDSTA_SDIOIRQDETECT;
++ }
++
++clear_status_bits:
++ writel(mci_cclear, host->base + S3C2410_SDICMDSTAT);
++ writel(mci_dclear, host->base + S3C2410_SDIDSTA);
++
++ goto irq_out;
++
++fail_transfer:
++ host->pio_active = XFER_NONE;
++
++close_transfer:
++ host->complete_what = COMPLETION_FINALIZE;
++
++ clear_imask(host);
++ tasklet_schedule(&host->pio_tasklet);
++
++ goto irq_out;
++
++irq_out:
++ dbg(host, dbg_irq, "csta:0x%08x dsta:0x%08x "
++ "fsta:0x%08x dcnt:0x%08x status:%s.\n",
++ mci_csta, mci_dsta, mci_fsta,
++ mci_dcnt, host->status);
++
++ spin_unlock_irqrestore(&host->complete_lock, iflags);
++
++ /* We have to delay this as it calls back into the driver */
++ if (cardint)
++ mmc_signal_sdio_irq(host->mmc);
++
++ return IRQ_HANDLED;
++
++}
++
++/*
++ * ISR for the CardDetect Pin
++*/
++
++static irqreturn_t s3cmci_irq_cd(int irq, void *dev_id)
++{
++ struct s3cmci_host *host = (struct s3cmci_host *)dev_id;
++
++ dbg(host, dbg_irq, "card detect\n");
++
++ mmc_detect_change(host->mmc, 500);
++
++ return IRQ_HANDLED;
++}
++
++void s3cmci_dma_done_callback(struct s3c2410_dma_chan *dma_ch, void *buf_id,
++ int size, enum s3c2410_dma_buffresult result)
++{
++ unsigned long iflags;
++ u32 mci_csta, mci_dsta, mci_fsta, mci_dcnt;
++ struct s3cmci_host *host = (struct s3cmci_host *)buf_id;
++
++ mci_csta = readl(host->base + S3C2410_SDICMDSTAT);
++ mci_dsta = readl(host->base + S3C2410_SDIDSTA);
++ mci_fsta = readl(host->base + S3C2410_SDIFSTA);
++ mci_dcnt = readl(host->base + S3C2410_SDIDCNT);
++
++ if ((!host->mrq) || (!host->mrq) || (!host->mrq->data))
++ return;
++
++ if (!host->dmatogo)
++ return;
++
++ spin_lock_irqsave(&host->complete_lock, iflags);
++
++ if (result != S3C2410_RES_OK) {
++ dbg(host, dbg_fail, "DMA FAILED: csta=0x%08x dsta=0x%08x "
++ "fsta=0x%08x dcnt:0x%08x result:0x%08x toGo:%u\n",
++ mci_csta, mci_dsta, mci_fsta,
++ mci_dcnt, result, host->dmatogo);
++
++ goto fail_request;
++ }
++
++ host->dmatogo--;
++ if (host->dmatogo) {
++ dbg(host, dbg_dma, "DMA DONE Size:%i DSTA:[%08x] "
++ "DCNT:[%08x] toGo:%u\n",
++ size, mci_dsta, mci_dcnt, host->dmatogo);
++
++ goto out;
++ }
++
++ dbg(host, dbg_dma, "DMA FINISHED Size:%i DSTA:%08x DCNT:%08x\n",
++ size, mci_dsta, mci_dcnt);
++
++ host->complete_what = COMPLETION_FINALIZE;
++
++out:
++ tasklet_schedule(&host->pio_tasklet);
++ spin_unlock_irqrestore(&host->complete_lock, iflags);
++ return;
++
++
++fail_request:
++ host->mrq->data->error = -EIO;
++ host->complete_what = COMPLETION_FINALIZE;
++ writel(0, host->base + host->sdiimsk);
++ goto out;
++
++}
++
++static void finalize_request(struct s3cmci_host *host)
++{
++ struct mmc_request *mrq = host->mrq;
++ struct mmc_command *cmd = host->cmd_is_stop?mrq->stop:mrq->cmd;
++ int debug_as_failure = 0;
++
++ if (host->complete_what != COMPLETION_FINALIZE)
++ return;
++
++ if (!mrq)
++ return;
++
++ if (cmd->data && (cmd->error == 0) &&
++ (cmd->data->error == 0)) {
++
++ if (host->dodma && (!host->dma_complete)) {
++ dbg(host, dbg_dma, "DMA Missing!\n");
++ return;
++ }
++ }
++
++ /* Read response */
++ cmd->resp[0] = readl(host->base + S3C2410_SDIRSP0);
++ cmd->resp[1] = readl(host->base + S3C2410_SDIRSP1);
++ cmd->resp[2] = readl(host->base + S3C2410_SDIRSP2);
++ cmd->resp[3] = readl(host->base + S3C2410_SDIRSP3);
++
++ /* reset clock speed, as it could still be set low for */
++ writel(host->sdipre, host->base + S3C2410_SDIPRE);
++
++ if (cmd->error)
++ debug_as_failure = 1;
++
++ if (cmd->data && cmd->data->error)
++ debug_as_failure = 1;
++
++#ifdef CONFIG_MMC_DEBUG
++ dbg_dumpcmd(host, cmd, debug_as_failure);
++#endif
++ /* Cleanup controller */
++ writel(0, host->base + S3C2410_SDICMDARG);
++ writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON);
++ writel(0, host->base + S3C2410_SDICMDCON);
++ writel(0, host->base + host->sdiimsk);
++
++ if (cmd->data && cmd->error)
++ cmd->data->error = cmd->error;
++
++ if (cmd->data && cmd->data->stop && (!host->cmd_is_stop)) {
++ host->cmd_is_stop = 1;
++ s3cmci_send_request(host->mmc);
++ return;
++ }
++
++ /* If we have no data transfer we are finished here */
++ if (!mrq->data)
++ goto request_done;
++
++ /* Calulate the amout of bytes transfer, but only if there was
++ * no error */
++ if (mrq->data->error == 0)
++ mrq->data->bytes_xfered =
++ (mrq->data->blocks * mrq->data->blksz);
++ else
++ mrq->data->bytes_xfered = 0;
++
++ /* If we had an error while transfering data we flush the
++ * DMA channel and the fifo to clear out any garbage */
++ if (mrq->data->error) {
++ if (host->dodma)
++ s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH);
++
++ if (host->is2440) {
++ /* Clear failure register and reset fifo */
++ writel(S3C2440_SDIFSTA_FIFORESET |
++ S3C2440_SDIFSTA_FIFOFAIL,
++ host->base + S3C2410_SDIFSTA);
++ } else {
++ u32 mci_con;
++
++ /* reset fifo */
++ mci_con = readl(host->base + S3C2410_SDICON);
++ mci_con |= S3C2410_SDICON_FIFORESET;
++
++ writel(mci_con, host->base + S3C2410_SDICON);
++ }
++ }
++
++request_done:
++ __s3cmci_disable_clock(host);
++ host->complete_what = COMPLETION_NONE;
++ host->mrq = NULL;
++ mmc_request_done(host->mmc, mrq);
++}
++
++
++void s3cmci_dma_setup(struct s3cmci_host *host, enum s3c2410_dmasrc source)
++{
++ static int setup_ok;
++ static enum s3c2410_dmasrc last_source = -1;
++
++ if (last_source == source)
++ return;
++
++ last_source = source;
++
++ s3c2410_dma_devconfig(host->dma, source, 3,
++ host->mem->start + host->sdidata);
++
++ if (!setup_ok) {
++ s3c2410_dma_config(host->dma, 4,
++ (S3C2410_DCON_HWTRIG | S3C2410_DCON_CH0_SDI));
++ s3c2410_dma_set_buffdone_fn(host->dma,
++ s3cmci_dma_done_callback);
++ s3c2410_dma_setflags(host->dma, S3C2410_DMAF_AUTOSTART);
++ setup_ok = 1;
++ }
++}
++
++static void s3cmci_send_command(struct s3cmci_host *host,
++ struct mmc_command *cmd)
++{
++ u32 ccon, imsk;
++
++ imsk = S3C2410_SDIIMSK_CRCSTATUS | S3C2410_SDIIMSK_CMDTIMEOUT |
++ S3C2410_SDIIMSK_RESPONSEND | S3C2410_SDIIMSK_CMDSENT |
++ S3C2410_SDIIMSK_RESPONSECRC;
++
++ enable_imask(host, imsk);
++
++ if (cmd->data)
++ host->complete_what = COMPLETION_XFERFINISH_RSPFIN;
++ else if (cmd->flags & MMC_RSP_PRESENT)
++ host->complete_what = COMPLETION_RSPFIN;
++ else
++ host->complete_what = COMPLETION_CMDSENT;
++
++ writel(cmd->arg, host->base + S3C2410_SDICMDARG);
++
++ ccon = cmd->opcode & S3C2410_SDICMDCON_INDEX;
++ ccon |= S3C2410_SDICMDCON_SENDERHOST | S3C2410_SDICMDCON_CMDSTART;
++
++ if (cmd->flags & MMC_RSP_PRESENT)
++ ccon |= S3C2410_SDICMDCON_WAITRSP;
++
++ if (cmd->flags & MMC_RSP_136)
++ ccon |= S3C2410_SDICMDCON_LONGRSP;
++
++ writel(ccon, host->base + S3C2410_SDICMDCON);
++}
++
++static int s3cmci_setup_data(struct s3cmci_host *host, struct mmc_data *data)
++{
++ u32 dcon, imsk, stoptries = 3;
++
++ /* write DCON register */
++
++ if (!data) {
++ writel(0, host->base + S3C2410_SDIDCON);
++ return 0;
++ }
++
++ while (readl(host->base + S3C2410_SDIDSTA) &
++ (S3C2410_SDIDSTA_TXDATAON | S3C2410_SDIDSTA_RXDATAON)) {
++
++ dbg(host, dbg_err,
++ "mci_setup_data() transfer stillin progress.\n");
++
++ writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON);
++ s3cmci_reset(host);
++
++ if (0 == (stoptries--)) {
++#ifdef CONFIG_MMC_DEBUG
++ dbg_dumpregs(host, "DRF");
++#endif
++
++ return -EINVAL;
++ }
++ }
++
++ dcon = data->blocks & S3C2410_SDIDCON_BLKNUM_MASK;
++
++ if (host->dodma)
++ dcon |= S3C2410_SDIDCON_DMAEN;
++
++ if (host->bus_width == MMC_BUS_WIDTH_4)
++ dcon |= S3C2410_SDIDCON_WIDEBUS;
++
++ if (!(data->flags & MMC_DATA_STREAM))
++ dcon |= S3C2410_SDIDCON_BLOCKMODE;
++
++ if (data->flags & MMC_DATA_WRITE) {
++ dcon |= S3C2410_SDIDCON_TXAFTERRESP;
++ dcon |= S3C2410_SDIDCON_XFER_TXSTART;
++ }
++
++ if (data->flags & MMC_DATA_READ) {
++ dcon |= S3C2410_SDIDCON_RXAFTERCMD;
++ dcon |= S3C2410_SDIDCON_XFER_RXSTART;
++ }
++
++ if (host->is2440) {
++ dcon |= S3C2440_SDIDCON_DS_WORD;
++ dcon |= S3C2440_SDIDCON_DATSTART;
++ }
++
++ writel(dcon, host->base + S3C2410_SDIDCON);
++
++ /* write BSIZE register */
++
++ writel(data->blksz, host->base + S3C2410_SDIBSIZE);
++
++ /* add to IMASK register */
++ imsk = S3C2410_SDIIMSK_FIFOFAIL | S3C2410_SDIIMSK_DATACRC |
++ S3C2410_SDIIMSK_DATATIMEOUT | S3C2410_SDIIMSK_DATAFINISH;
++
++ enable_imask(host, imsk);
++
++ /* write TIMER register */
++
++ if (host->is2440) {
++ writel(0x007FFFFF, host->base + S3C2410_SDITIMER);
++ } else {
++ writel(0x0000FFFF, host->base + S3C2410_SDITIMER);
++
++ /* FIX: set slow clock to prevent timeouts on read */
++ if (data->flags & MMC_DATA_READ)
++ writel(0xFF, host->base + S3C2410_SDIPRE);
++ }
++
++ return 0;
++}
++
++static int s3cmci_prepare_pio(struct s3cmci_host *host, struct mmc_data *data)
++{
++ int rw = (data->flags & MMC_DATA_WRITE)?1:0;
++
++ if (rw != ((data->flags & MMC_DATA_READ)?0:1))
++ return -EINVAL;
++
++ host->pio_sgptr = 0;
++ host->pio_bytes = 0;
++ host->pio_count = 0;
++ host->pio_active = rw?XFER_WRITE:XFER_READ;
++
++ if (rw) {
++ do_pio_write(host);
++ enable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
++ } else {
++ enable_imask(host, S3C2410_SDIIMSK_RXFIFOHALF
++ | S3C2410_SDIIMSK_RXFIFOLAST);
++ }
++
++ return 0;
++}
++
++static int s3cmci_prepare_dma(struct s3cmci_host *host, struct mmc_data *data)
++{
++ int dma_len, i;
++
++ int rw = (data->flags & MMC_DATA_WRITE)?1:0;
++
++ if (rw != ((data->flags & MMC_DATA_READ)?0:1))
++ return -EINVAL;
++
++ s3cmci_dma_setup(host, rw?S3C2410_DMASRC_MEM:S3C2410_DMASRC_HW);
++ s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH);
++
++ dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
++ (rw)?DMA_TO_DEVICE:DMA_FROM_DEVICE);
++
++
++ if (dma_len == 0)
++ return -ENOMEM;
++
++ host->dma_complete = 0;
++ host->dmatogo = dma_len;
++
++ for (i = 0; i < dma_len; i++) {
++ int res;
++
++ dbg(host, dbg_dma, "enqueue %i:%u@%u\n", i,
++ sg_dma_address(&data->sg[i]),
++ sg_dma_len(&data->sg[i]));
++
++ res = s3c2410_dma_enqueue(host->dma, (void *) host,
++ sg_dma_address(&data->sg[i]),
++ sg_dma_len(&data->sg[i]));
++
++ if (res) {
++ s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH);
++ return -EBUSY;
++ }
++ }
++
++ s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_START);
++
++ return 0;
++}
++
++static void s3cmci_send_request(struct mmc_host *mmc)
++{
++ struct s3cmci_host *host = mmc_priv(mmc);
++ struct mmc_request *mrq = host->mrq;
++ struct mmc_command *cmd = host->cmd_is_stop?mrq->stop:mrq->cmd;
++ int pre;
++
++ host->ccnt++;
++#ifdef CONFIG_MMC_DEBUG
++ prepare_dbgmsg(host, cmd, host->cmd_is_stop);
++#endif
++ /* clear command, data and fifo status registers;
++ * Fifo clear only necessary on 2440, but doesn't hurt on 2410 */
++ writel(0xFFFFFFFF, host->base + S3C2410_SDICMDSTAT);
++ writel(0xFFFFFFFF, host->base + S3C2410_SDIDSTA);
++ writel(0xFFFFFFFF, host->base + S3C2410_SDIFSTA);
++
++ if (cmd->data) {
++ int res;
++ res = s3cmci_setup_data(host, cmd->data);
++
++ host->dcnt++;
++
++ if (res) {
++ cmd->error = -EIO;
++ cmd->data->error = -EIO;
++
++ mmc_request_done(mmc, mrq);
++ return;
++ }
++
++
++ if (host->dodma)
++ res = s3cmci_prepare_dma(host, cmd->data);
++ else
++ res = s3cmci_prepare_pio(host, cmd->data);
++
++ if (res) {
++ cmd->error = -EIO;
++ cmd->data->error = -EIO;
++
++ mmc_request_done(mmc, mrq);
++ return;
++ }
++
++ }
++
++ /* establish the correct prescaler depending on the sd_slow_ratio */
++
++ if ((sd_slow_ratio > 1) &&
++ host->pdata->use_slow && (host->pdata->use_slow)()) {
++ /* compute the slower speed */
++ pre = host->prescaler * sd_slow_ratio;
++ if (pre > 255)
++ pre = 255;
++ } else {
++ /* use the normal speed */
++ pre = host->prescaler;
++ }
++
++ if (host->sdipre != pre) {
++ dbg(host, dbg_conf, "prescaler changed: %d -> %d\n",
++ (int)host->sdipre, pre);
++ host->sdipre = pre;
++ writel(host->sdipre, host->base + S3C2410_SDIPRE);
++ }
++
++ __s3cmci_enable_clock(host);
++ s3cmci_send_command(host, cmd);
++ enable_irq(host->irq);
++}
++
++static void s3cmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++ struct s3cmci_host *host = mmc_priv(mmc);
++
++ host->cmd_is_stop = 0;
++ host->mrq = mrq;
++
++ s3cmci_send_request(mmc);
++}
++
++static void s3cmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
++{
++ struct s3cmci_host *host = mmc_priv(mmc);
++ u32 mci_psc, mci_con;
++
++ /* Set power */
++ mci_con = readl(host->base + S3C2410_SDICON);
++ switch (ios->power_mode) {
++ case MMC_POWER_ON:
++ case MMC_POWER_UP:
++ s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPE5_SDCLK);
++ s3c2410_gpio_cfgpin(S3C2410_GPE6, S3C2410_GPE6_SDCMD);
++ s3c2410_gpio_cfgpin(S3C2410_GPE7, S3C2410_GPE7_SDDAT0);
++ s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_SDDAT1);
++ s3c2410_gpio_cfgpin(S3C2410_GPE9, S3C2410_GPE9_SDDAT2);
++ s3c2410_gpio_cfgpin(S3C2410_GPE10, S3C2410_GPE10_SDDAT3);
++
++ if (host->pdata->set_power)
++ host->pdata->set_power(ios->power_mode, ios->vdd);
++
++ if (!host->is2440)
++ mci_con |= S3C2410_SDICON_FIFORESET;
++
++ break;
++
++ case MMC_POWER_OFF:
++ default:
++ s3c2410_gpio_setpin(S3C2410_GPE5, 0);
++ s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPE5_OUTP);
++
++ if (host->pdata->set_power)
++ host->pdata->set_power(ios->power_mode, ios->vdd);
++
++ if (host->is2440)
++ mci_con |= S3C2440_SDICON_SDRESET;
++
++ break;
++ }
++
++ /* Set clock */
++ for (mci_psc = 0; mci_psc < 255; mci_psc++) {
++ host->real_rate = host->clk_rate / (host->clk_div*(mci_psc+1));
++
++ if (host->real_rate <= ios->clock)
++ break;
++ }
++
++ if (mci_psc > 255)
++ mci_psc = 255;
++ host->prescaler = mci_psc;
++ host->sdipre = mci_psc;
++
++ writel(host->prescaler, host->base + S3C2410_SDIPRE);
++
++ /* If requested clock is 0, real_rate will be 0, too */
++ if (ios->clock == 0)
++ host->real_rate = 0;
++
++ /* Set CLOCK_ENABLE */
++ if (ios->clock)
++ mci_con |= S3C2410_SDICON_CLOCKTYPE;
++ else
++ mci_con &= ~S3C2410_SDICON_CLOCKTYPE;
++
++ writel(mci_con, host->base + S3C2410_SDICON);
++
++ if ((ios->power_mode == MMC_POWER_ON)
++ || (ios->power_mode == MMC_POWER_UP)) {
++
++ dbg(host, dbg_conf,
++ "powered (vdd: %d), clk: %lukHz div=%lu (req: %ukHz),"
++ " bus width: %d\n", ios->vdd, host->real_rate / 1000,
++ host->clk_div * (host->prescaler + 1),
++ ios->clock / 1000, ios->bus_width);
++
++ /* After power-up, we need to give the card 74 clocks to
++ * initialize, so sleep just a moment before we disable
++ * the clock again.
++ */
++ if (ios->clock)
++ msleep(1);
++
++ } else {
++ dbg(host, dbg_conf, "powered down.\n");
++ }
++
++ host->bus_width = ios->bus_width;
++
++ /* No need to run the clock until we have data to move */
++ if (!sd_idleclk) {
++ __s3cmci_disable_clock(host);
++ dbg(host, dbg_conf, "SD clock disabled when idle.\n");
++ }
++}
++
++static void s3cmci_reset(struct s3cmci_host *host)
++{
++ u32 con = readl(host->base + S3C2410_SDICON);
++
++ con |= S3C2440_SDICON_SDRESET;
++
++ writel(con, host->base + S3C2410_SDICON);
++}
++
++static int s3cmci_get_ro(struct mmc_host *mmc)
++{
++ struct s3cmci_host *host = mmc_priv(mmc);
++
++ if (host->pdata->gpio_wprotect == 0)
++ return 0;
++
++ return s3c2410_gpio_getpin(host->pdata->gpio_wprotect);
++}
++
++static void s3cmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
++{
++ struct s3cmci_host *host = mmc_priv(mmc);
++
++ if (enable)
++ enable_imask(host, S3C2410_SDIIMSK_SDIOIRQ);
++ else
++ disable_imask(host, S3C2410_SDIIMSK_SDIOIRQ);
++}
++
++static struct mmc_host_ops s3cmci_ops = {
++ .request = s3cmci_request,
++ .set_ios = s3cmci_set_ios,
++ .get_ro = s3cmci_get_ro,
++ .enable_sdio_irq = s3cmci_enable_sdio_irq,
++};
++
++static struct s3c24xx_mci_pdata s3cmci_def_pdata = {
++ .do_dma = 0,
++ .gpio_detect = 0,
++ .set_power = NULL,
++ .ocr_avail = MMC_VDD_32_33,
++};
++
++static int s3cmci_probe(struct platform_device *pdev, int is2440)
++{
++ struct mmc_host *mmc;
++ struct s3cmci_host *host;
++
++ int ret;
++
++ mmc = mmc_alloc_host(sizeof(struct s3cmci_host), &pdev->dev);
++ if (!mmc) {
++ ret = -ENOMEM;
++ goto probe_out;
++ }
++
++ host = mmc_priv(mmc);
++ host->mmc = mmc;
++ host->pdev = pdev;
++
++ host->pdata = pdev->dev.platform_data;
++ if (!host->pdata) {
++ pdev->dev.platform_data = &s3cmci_def_pdata;
++ host->pdata = &s3cmci_def_pdata;
++ }
++
++ spin_lock_init(&host->complete_lock);
++ tasklet_init(&host->pio_tasklet, pio_tasklet, (unsigned long) host);
++ if (is2440) {
++ host->is2440 = 1;
++ host->sdiimsk = S3C2440_SDIIMSK;
++ host->sdidata = S3C2440_SDIDATA;
++ host->sdidata_b = S3C2440_SDIDATA_BYTE;
++ host->clk_div = 1;
++ } else {
++ host->is2440 = 0;
++ host->sdiimsk = S3C2410_SDIIMSK;
++ host->sdidata = S3C2410_SDIDATA;
++ host->sdidata_b = S3C2410_SDIDATA_BYTE;
++ host->clk_div = 2;
++ }
++ host->dodma = host->pdata->do_dma;
++ host->complete_what = COMPLETION_NONE;
++ host->pio_active = XFER_NONE;
++
++ host->dma = DMACH_SDI;
++ host->irq_cd = s3c2410_gpio_getirq(host->pdata->gpio_detect);
++ s3c2410_gpio_cfgpin(host->pdata->gpio_detect, S3C2410_GPIO_IRQ);
++
++ host->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ if (!host->mem) {
++ dev_err(&pdev->dev,
++ "failed to get io memory region resouce.\n");
++
++ ret = -ENOENT;
++ goto probe_free_host;
++ }
++
++ host->mem = request_mem_region(host->mem->start,
++ RESSIZE(host->mem), pdev->name);
++
++ if (!host->mem) {
++ dev_err(&pdev->dev, "failed to request io memory region.\n");
++ ret = -ENOENT;
++ goto probe_free_host;
++ }
++
++ host->base = ioremap(host->mem->start, RESSIZE(host->mem));
++ if (host->base == 0) {
++ dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
++ ret = -EINVAL;
++ goto probe_free_mem_region;
++ }
++
++ host->irq = platform_get_irq(pdev, 0);
++ if (host->irq == 0) {
++ dev_err(&pdev->dev, "failed to get interrupt resouce.\n");
++ ret = -EINVAL;
++ goto probe_iounmap;
++ }
++
++ if (request_irq(host->irq, s3cmci_irq, 0, DRIVER_NAME, host)) {
++ dev_err(&pdev->dev, "failed to request mci interrupt.\n");
++ ret = -ENOENT;
++ goto probe_iounmap;
++ }
++
++ disable_irq(host->irq);
++
++ s3c2410_gpio_cfgpin(host->pdata->gpio_detect, S3C2410_GPIO_IRQ);
++ set_irq_type(host->irq_cd, IRQT_BOTHEDGE);
++
++ if (request_irq(host->irq_cd, s3cmci_irq_cd, 0, DRIVER_NAME, host)) {
++ dev_err(&pdev->dev,
++ "failed to request card detect interrupt.\n");
++
++ ret = -ENOENT;
++ goto probe_free_irq;
++ }
++
++ if (host->pdata->gpio_wprotect)
++ s3c2410_gpio_cfgpin(host->pdata->gpio_wprotect,
++ S3C2410_GPIO_INPUT);
++
++ if (s3c2410_dma_request(host->dma, &s3cmci_dma_client, NULL)) {
++ dev_err(&pdev->dev, "unable to get DMA channel.\n");
++ ret = -EBUSY;
++ goto probe_free_irq_cd;
++ }
++
++ host->clk = clk_get(&pdev->dev, "sdi");
++ if (IS_ERR(host->clk)) {
++ dev_err(&pdev->dev, "failed to find clock source.\n");
++ ret = PTR_ERR(host->clk);
++ host->clk = NULL;
++ goto probe_free_host;
++ }
++
++ ret = clk_enable(host->clk);
++ if (ret) {
++ dev_err(&pdev->dev, "failed to enable clock source.\n");
++ goto clk_free;
++ }
++
++ host->clk_rate = clk_get_rate(host->clk);
++
++ mmc->ops = &s3cmci_ops;
++ mmc->ocr_avail = host->pdata->ocr_avail;
++ mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
++ mmc->f_min = host->clk_rate / (host->clk_div * 256);
++ mmc->f_max = sd_max_clk;
++
++ mmc->max_blk_count = 4095;
++ mmc->max_blk_size = 4095;
++ mmc->max_req_size = 4095 * 512;
++ mmc->max_seg_size = mmc->max_req_size;
++
++ mmc->max_phys_segs = 128;
++ mmc->max_hw_segs = 128;
++
++ dbg(host, dbg_debug, "probe: mode:%s mapped mci_base:%p irq:%u "
++ "irq_cd:%u dma:%u.\n", (host->is2440?"2440":""),
++ host->base, host->irq, host->irq_cd, host->dma);
++
++ ret = mmc_add_host(mmc);
++ if (ret) {
++ dev_err(&pdev->dev, "failed to add mmc host.\n");
++ goto free_dmabuf;
++ }
++
++ platform_set_drvdata(pdev, mmc);
++
++ dev_info(&pdev->dev, "initialisation done.\n");
++ return 0;
++
++ free_dmabuf:
++ clk_disable(host->clk);
++
++ clk_free:
++ clk_put(host->clk);
++
++ probe_free_irq_cd:
++ free_irq(host->irq_cd, host);
++
++ probe_free_irq:
++ free_irq(host->irq, host);
++
++ probe_iounmap:
++ iounmap(host->base);
++
++ probe_free_mem_region:
++ release_mem_region(host->mem->start, RESSIZE(host->mem));
++
++ probe_free_host:
++ mmc_free_host(mmc);
++ probe_out:
++ return ret;
++}
++
++static int s3cmci_remove(struct platform_device *pdev)
++{
++ struct mmc_host *mmc = platform_get_drvdata(pdev);
++ struct s3cmci_host *host = mmc_priv(mmc);
++
++ mmc_remove_host(mmc);
++ clk_disable(host->clk);
++ clk_put(host->clk);
++ s3c2410_dma_free(host->dma, &s3cmci_dma_client);
++ free_irq(host->irq_cd, host);
++ free_irq(host->irq, host);
++ iounmap(host->base);
++ release_mem_region(host->mem->start, RESSIZE(host->mem));
++ mmc_free_host(mmc);
++
++ return 0;
++}
++
++static int s3cmci_probe_2410(struct platform_device *dev)
++{
++ return s3cmci_probe(dev, 0);
++}
++
++static int s3cmci_probe_2412(struct platform_device *dev)
++{
++ return s3cmci_probe(dev, 1);
++}
++
++static int s3cmci_probe_2440(struct platform_device *dev)
++{
++ return s3cmci_probe(dev, 1);
++}
++
++#ifdef CONFIG_PM
++
++static int s3cmci_suspend(struct platform_device *dev, pm_message_t state)
++{
++ struct mmc_host *mmc = platform_get_drvdata(dev);
++ struct s3cmci_host *host = mmc_priv(mmc);
++ int ret;
++
++ /* Ensure clock is running so it will be running on resume */
++ __s3cmci_enable_clock(host);
++
++ /* We will do more commands, make sure the clock stays running,
++ * and save our state so that we can restore it on resume.
++ */
++ suspend_sd_idleclk = sd_idleclk;
++ sd_idleclk = 1;
++
++ ret = mmc_suspend_host(mmc, state);
++
++ /* so that when we resume, we use any modified max rate */
++ mmc->f_max = sd_max_clk;
++
++ return ret;
++}
++
++static int s3cmci_resume(struct platform_device *dev)
++{
++ struct mmc_host *mmc = platform_get_drvdata(dev);
++
++ /* Put the sd_idleclk state back to what it was */
++ sd_idleclk = suspend_sd_idleclk;
++
++ return mmc_resume_host(mmc);
++}
++
++#else /* CONFIG_PM */
++#define s3cmci_suspend NULL
++#define s3cmci_resume NULL
++#endif /* CONFIG_PM */
++
++
++static struct platform_driver s3cmci_driver_2410 = {
++ .driver.name = "s3c2410-sdi",
++ .probe = s3cmci_probe_2410,
++ .remove = s3cmci_remove,
++ .suspend = s3cmci_suspend,
++ .resume = s3cmci_resume,
++};
++
++static struct platform_driver s3cmci_driver_2412 = {
++ .driver.name = "s3c2412-sdi",
++ .probe = s3cmci_probe_2412,
++ .remove = s3cmci_remove,
++ .suspend = s3cmci_suspend,
++ .resume = s3cmci_resume,
++};
++
++static struct platform_driver s3cmci_driver_2440 = {
++ .driver.name = "s3c2440-sdi",
++ .probe = s3cmci_probe_2440,
++ .remove = s3cmci_remove,
++ .suspend = s3cmci_suspend,
++ .resume = s3cmci_resume,
++};
++
++
++static int __init s3cmci_init(void)
++{
++ spin_lock_init(&clock_lock);
++ platform_driver_register(&s3cmci_driver_2410);
++ platform_driver_register(&s3cmci_driver_2412);
++ platform_driver_register(&s3cmci_driver_2440);
++ return 0;
++}
++
++static void __exit s3cmci_exit(void)
++{
++ platform_driver_unregister(&s3cmci_driver_2410);
++ platform_driver_unregister(&s3cmci_driver_2412);
++ platform_driver_unregister(&s3cmci_driver_2440);
++}
++
++module_init(s3cmci_init);
++module_exit(s3cmci_exit);
++
++MODULE_DESCRIPTION("Samsung S3C MMC/SD Card Interface driver");
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Thomas Kleffel <tk@maintech.de>");
+Index: linux-2.6.24.7/drivers/mmc/host/s3cmci.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/mmc/host/s3cmci.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,70 @@
++/*
++ * linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver
++ *
++ * Copyright (C) 2004-2006 Thomas Kleffel, All Rights Reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++enum s3cmci_waitfor {
++ COMPLETION_NONE,
++ COMPLETION_FINALIZE,
++ COMPLETION_CMDSENT,
++ COMPLETION_RSPFIN,
++ COMPLETION_XFERFINISH,
++ COMPLETION_XFERFINISH_RSPFIN,
++};
++
++struct s3cmci_host {
++ struct platform_device *pdev;
++ struct s3c24xx_mci_pdata *pdata;
++ struct mmc_host *mmc;
++ struct resource *mem;
++ struct clk *clk;
++ void __iomem *base;
++ int irq;
++ int irq_cd;
++ int dma;
++
++ unsigned long clk_rate;
++ unsigned long clk_div;
++ unsigned long real_rate;
++ u8 prescaler;
++ u8 sdipre;
++
++ int is2440;
++ unsigned sdiimsk;
++ unsigned sdidata;
++ unsigned sdidata_b;
++ int dodma;
++
++ int dmatogo;
++
++ struct mmc_request *mrq;
++ int cmd_is_stop;
++
++ spinlock_t complete_lock;
++ enum s3cmci_waitfor complete_what;
++
++ int dma_complete;
++
++ u32 pio_sgptr;
++ u32 pio_bytes;
++ u32 pio_count;
++ u8 *pio_ptr;
++#define XFER_NONE 0
++#define XFER_READ 1
++#define XFER_WRITE 2
++ u32 pio_active;
++
++ int bus_width;
++
++ char dbgmsg_cmd[301];
++ char dbgmsg_dat[301];
++ char *status;
++
++ unsigned int ccnt, dcnt;
++ struct tasklet_struct pio_tasklet;
++};
+Index: linux-2.6.24.7/drivers/mtd/nand/nand_bbt.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/mtd/nand/nand_bbt.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/mtd/nand/nand_bbt.c 2008-12-11 22:46:49.000000000 +0100
+@@ -430,8 +430,10 @@ static int create_bbt(struct mtd_info *m
+
+ if (ret) {
+ this->bbt[i >> 3] |= 0x03 << (i & 0x6);
++#if 0
+ printk(KERN_WARNING "Bad eraseblock %d at 0x%08x\n",
+ i >> 1, (unsigned int)from);
++#endif
+ mtd->ecc_stats.badblocks++;
+ }
+
+Index: linux-2.6.24.7/drivers/mtd/nand/s3c2410.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/mtd/nand/s3c2410.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/mtd/nand/s3c2410.c 2008-12-11 22:46:49.000000000 +0100
+@@ -158,6 +158,10 @@ static int s3c_nand_calc_rate(int wanted
+ {
+ int result;
+
++ /* Tacls can be 0ns in some cases */
++ if (wanted == 0)
++ return 0;
++
+ result = (wanted * clk) / NS_IN_KHZ;
+ result++;
+
+@@ -168,9 +172,6 @@ static int s3c_nand_calc_rate(int wanted
+ return -1;
+ }
+
+- if (result < 1)
+- result = 1;
+-
+ return result;
+ }
+
+@@ -202,7 +203,7 @@ static int s3c2410_nand_inithw(struct s3
+ twrph1 = 8;
+ }
+
+- if (tacls < 0 || twrph0 < 0 || twrph1 < 0) {
++ if (tacls < 0 || twrph0 < 1 || twrph1 < 1) {
+ dev_err(info->device, "cannot get suitable timings\n");
+ return -EINVAL;
+ }
+@@ -213,14 +214,14 @@ static int s3c2410_nand_inithw(struct s3
+ switch (info->cpu_type) {
+ case TYPE_S3C2410:
+ cfg = S3C2410_NFCONF_EN;
+- cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
++ cfg |= S3C2410_NFCONF_TACLS(tacls);
+ cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
+ cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
+ break;
+
+ case TYPE_S3C2440:
+ case TYPE_S3C2412:
+- cfg = S3C2440_NFCONF_TACLS(tacls - 1);
++ cfg = S3C2440_NFCONF_TACLS(tacls);
+ cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1);
+ cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1);
+
+@@ -364,23 +365,21 @@ static int s3c2410_nand_correct_data(str
+ ((diff2 ^ (diff2 >> 1)) & 0x55) == 0x55) {
+ /* calculate the bit position of the error */
+
+- bit = (diff2 >> 2) & 1;
+- bit |= (diff2 >> 3) & 2;
+- bit |= (diff2 >> 4) & 4;
++ bit = ((diff2 >> 3) & 1) |
++ ((diff2 >> 4) & 2) |
++ ((diff2 >> 5) & 4);
+
+ /* calculate the byte position of the error */
+
+- byte = (diff1 << 1) & 0x80;
+- byte |= (diff1 << 2) & 0x40;
+- byte |= (diff1 << 3) & 0x20;
+- byte |= (diff1 << 4) & 0x10;
+-
+- byte |= (diff0 >> 3) & 0x08;
+- byte |= (diff0 >> 2) & 0x04;
+- byte |= (diff0 >> 1) & 0x02;
+- byte |= (diff0 >> 0) & 0x01;
+-
+- byte |= (diff2 << 8) & 0x100;
++ byte = ((diff2 << 7) & 0x100) |
++ ((diff1 << 0) & 0x80) |
++ ((diff1 << 1) & 0x40) |
++ ((diff1 << 2) & 0x20) |
++ ((diff1 << 3) & 0x10) |
++ ((diff0 >> 4) & 0x08) |
++ ((diff0 >> 3) & 0x04) |
++ ((diff0 >> 2) & 0x02) |
++ ((diff0 >> 1) & 0x01);
+
+ dev_dbg(info->device, "correcting error bit %d, byte %d\n",
+ bit, byte);
+@@ -399,7 +398,7 @@ static int s3c2410_nand_correct_data(str
+ if ((diff0 & ~(1<<fls(diff0))) == 0)
+ return 1;
+
+- return 0;
++ return -EBADMSG;
+ }
+
+ /* ECC functions
+@@ -473,7 +472,7 @@ static int s3c2440_nand_calculate_ecc(st
+ ecc_code[1] = ecc >> 8;
+ ecc_code[2] = ecc >> 16;
+
+- pr_debug("%s: returning ecc %06lx\n", __func__, ecc);
++ pr_debug("%s: returning ecc %06lx\n", __func__, ecc & 0xffffff);
+
+ return 0;
+ }
+@@ -559,17 +558,31 @@ static int s3c2410_nand_remove(struct pl
+ }
+
+ #ifdef CONFIG_MTD_PARTITIONS
++const char *part_probes[] = { "cmdlinepart", NULL };
+ static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
+ struct s3c2410_nand_mtd *mtd,
+ struct s3c2410_nand_set *set)
+ {
++ struct mtd_partition *part_info;
++ int nr_part = 0;
++
+ if (set == NULL)
+ return add_mtd_device(&mtd->mtd);
+
+- if (set->nr_partitions > 0 && set->partitions != NULL) {
+- return add_mtd_partitions(&mtd->mtd, set->partitions, set->nr_partitions);
++ if (set->nr_partitions == 0) {
++ mtd->mtd.name = set->name;
++ nr_part = parse_mtd_partitions(&mtd->mtd, part_probes,
++ &part_info, 0);
++ } else {
++ if (set->nr_partitions > 0 && set->partitions != NULL) {
++ nr_part = set->nr_partitions;
++ part_info = set->partitions;
++ }
+ }
+
++ if (nr_part > 0 && part_info)
++ return add_mtd_partitions(&mtd->mtd, part_info, nr_part);
++
+ return add_mtd_device(&mtd->mtd);
+ }
+ #else
+@@ -598,9 +611,13 @@ static void s3c2410_nand_init_chip(struc
+ chip->select_chip = s3c2410_nand_select_chip;
+ chip->chip_delay = 50;
+ chip->priv = nmtd;
+- chip->options = 0;
+ chip->controller = &info->controller;
+
++ if (set->flags & S3C2410_NAND_BBT)
++ chip->options = NAND_USE_FLASH_BBT;
++ else
++ chip->options = 0;
++
+ switch (info->cpu_type) {
+ case TYPE_S3C2410:
+ chip->IO_ADDR_W = regs + S3C2410_NFDATA;
+@@ -640,13 +657,10 @@ static void s3c2410_nand_init_chip(struc
+ nmtd->mtd.owner = THIS_MODULE;
+ nmtd->set = set;
+
+- if (hardware_ecc) {
++ if (!info->platform->software_ecc && hardware_ecc) {
+ chip->ecc.calculate = s3c2410_nand_calculate_ecc;
+ chip->ecc.correct = s3c2410_nand_correct_data;
+ chip->ecc.mode = NAND_ECC_HW;
+- chip->ecc.size = 512;
+- chip->ecc.bytes = 3;
+- chip->ecc.layout = &nand_hw_eccoob;
+
+ switch (info->cpu_type) {
+ case TYPE_S3C2410:
+@@ -670,6 +684,34 @@ static void s3c2410_nand_init_chip(struc
+ }
+ }
+
++/* s3c2410_nand_update_chip
++ *
++ * post-probe chip update, to change any items, such as the
++ * layout for large page nand
++ */
++
++static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
++ struct s3c2410_nand_mtd *nmtd)
++{
++ struct nand_chip *chip = &nmtd->chip;
++
++ printk("%s: chip %p: %d\n", __func__, chip, chip->page_shift);
++
++ if (hardware_ecc) {
++ /* change the behaviour depending on wether we are using
++ * the large or small page nand device */
++
++ if (chip->page_shift > 10) {
++ chip->ecc.size = 256;
++ chip->ecc.bytes = 3;
++ } else {
++ chip->ecc.size = 512;
++ chip->ecc.bytes = 3;
++ chip->ecc.layout = &nand_hw_eccoob;
++ }
++ }
++}
++
+ /* s3c2410_nand_probe
+ *
+ * called by device layer when it finds a device matching
+@@ -776,9 +818,12 @@ static int s3c24xx_nand_probe(struct pla
+
+ s3c2410_nand_init_chip(info, nmtd, sets);
+
+- nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1);
++ nmtd->scan_res = nand_scan_ident(&nmtd->mtd,
++ (sets) ? sets->nr_chips : 1);
+
+ if (nmtd->scan_res == 0) {
++ s3c2410_nand_update_chip(info, nmtd);
++ nand_scan_tail(&nmtd->mtd);
+ s3c2410_nand_add_partition(info, nmtd, sets);
+ }
+
+Index: linux-2.6.24.7/drivers/net/cs89x0.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/net/cs89x0.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/net/cs89x0.c 2008-12-11 22:46:49.000000000 +0100
+@@ -194,6 +194,10 @@ static unsigned int cs8900_irq_map[] = {
+ #define CIRRUS_DEFAULT_IRQ VH_INTC_INT_NUM_CASCADED_INTERRUPT_1 /* Event inputs bank 1 - ID 35/bit 3 */
+ static unsigned int netcard_portlist[] __initdata = {CIRRUS_DEFAULT_BASE, 0};
+ static unsigned int cs8900_irq_map[] = {CIRRUS_DEFAULT_IRQ, 0, 0, 0};
++#elif defined(CONFIG_MACH_QT2410)
++#include <asm/arch/irqs.h>
++static unsigned int netcard_portlist [] __initdata = { 0xe0000300, 0 };
++static unsigned int cs8900_irq_map[] = { IRQ_EINT9, 0, 0, 0 };
+ #else
+ static unsigned int netcard_portlist[] __initdata =
+ { 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0};
+@@ -829,6 +833,14 @@ cs89x0_probe1(struct net_device *dev, in
+
+ printk(" IRQ %d", dev->irq);
+
++ dev->dev_addr[0] = 0x00;
++ dev->dev_addr[1] = 0x00;
++ dev->dev_addr[2] = 0xc0;
++ dev->dev_addr[3] = 0xff;
++ dev->dev_addr[4] = 0xee;
++ dev->dev_addr[5] = 0x08;
++ set_mac_address(dev, dev->dev_addr);
++
+ #if ALLOW_DMA
+ if (lp->use_dma) {
+ get_dma_channel(dev);
+@@ -1304,7 +1316,7 @@ net_open(struct net_device *dev)
+ else
+ #endif
+ {
+-#if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01) && !defined(CONFIG_ARCH_PNX010X)
++#if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01) && !defined(CONFIG_ARCH_PNX010X) && !defined(CONFIG_MACH_QT2410)
+ if (((1 << dev->irq) & lp->irq_map) == 0) {
+ printk(KERN_ERR "%s: IRQ %d is not in our map of allowable IRQs, which is %x\n",
+ dev->name, dev->irq, lp->irq_map);
+Index: linux-2.6.24.7/drivers/net/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/net/Kconfig 2008-12-11 22:46:09.000000000 +0100
++++ linux-2.6.24.7/drivers/net/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -1332,7 +1332,7 @@ source "drivers/net/ibm_newemac/Kconfig"
+
+ config NET_PCI
+ bool "EISA, VLB, PCI and on board controllers"
+- depends on ISA || EISA || PCI
++ depends on ISA || EISA || PCI || MACH_QT2410
+ help
+ This is another class of network cards which attach directly to the
+ bus. If you have one of those, say Y and read the Ethernet-HOWTO,
+@@ -1508,7 +1508,7 @@ config FORCEDETH_NAPI
+
+ config CS89x0
+ tristate "CS89x0 support"
+- depends on NET_PCI && (ISA || MACH_IXDP2351 || ARCH_IXDP2X01 || ARCH_PNX010X)
++ depends on NET_PCI && (ISA || MACH_IXDP2351 || ARCH_IXDP2X01 || ARCH_PNX010X || MACH_QT2410)
+ ---help---
+ Support for CS89x0 chipset based Ethernet cards. If you have a
+ network (Ethernet) card of this type, say Y and read the
+Index: linux-2.6.24.7/drivers/pnp/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/pnp/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/pnp/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -5,7 +5,7 @@
+ menuconfig PNP
+ bool "Plug and Play support"
+ depends on HAS_IOMEM
+- depends on ISA || ACPI
++ depends on ISA || ACPI || SDIO
+ ---help---
+ Plug and Play (PnP) is a standard for peripherals which allows those
+ peripherals to be configured by software, e.g. assign IRQ's or other
+Index: linux-2.6.24.7/drivers/pnp/resource.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/pnp/resource.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/pnp/resource.c 2008-12-11 22:46:49.000000000 +0100
+@@ -431,6 +431,7 @@ int pnp_check_dma(struct pnp_dev *dev, i
+ }
+ }
+
++#if 0
+ /* check if the resource is already in use, skip if the
+ * device is active because it itself may be in use */
+ if (!dev->active) {
+@@ -438,6 +439,7 @@ int pnp_check_dma(struct pnp_dev *dev, i
+ return 0;
+ free_dma(*dma);
+ }
++#endif
+
+ /* check for conflicts with other pnp devices */
+ pnp_for_each_dev(tdev) {
+Index: linux-2.6.24.7/drivers/power/bq27000_battery.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/power/bq27000_battery.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,424 @@
++/*
++ * Driver for batteries with bq27000 chips inside via HDQ
++ *
++ * Copyright 2008 Openmoko, Inc
++ * Andy Green <andy@openmoko.com>
++ *
++ * based on ds2760 driver, original copyright notice for that --->
++ *
++ * Copyright © 2007 Anton Vorontsov
++ * 2004-2007 Matt Reimer
++ * 2004 Szabolcs Gyurko
++ *
++ * Use consistent with the GNU GPL is permitted,
++ * provided that this copyright notice is
++ * preserved in its entirety in all copies and derived works.
++ *
++ * Author: Anton Vorontsov <cbou@mail.ru>
++ * February 2007
++ *
++ * Matt Reimer <mreimer@vpop.net>
++ * April 2004, 2005, 2007
++ *
++ * Szabolcs Gyurko <szabolcs.gyurko@tlt.hu>
++ * September 2004
++ */
++
++#include <linux/module.h>
++#include <linux/param.h>
++#include <linux/jiffies.h>
++#include <linux/delay.h>
++#include <linux/pm.h>
++#include <linux/platform_device.h>
++#include <linux/power_supply.h>
++#include <linux/bq27000_battery.h>
++
++enum bq27000_regs {
++ /* RAM regs */
++ /* read-write after this */
++ BQ27000_CTRL = 0, /* Device Control Register */
++ BQ27000_MODE, /* Device Mode Register */
++ BQ27000_AR_L, /* At-Rate H L */
++ BQ27000_AR_H,
++ /* read-only after this */
++ BQ27000_ARTTE_L, /* At-Rate Time To Empty H L */
++ BQ27000_ARTTE_H,
++ BQ27000_TEMP_L, /* Reported Temperature H L */
++ BQ27000_TEMP_H,
++ BQ27000_VOLT_L, /* Reported Voltage H L */
++ BQ27000_VOLT_H,
++ BQ27000_FLAGS, /* Status Flags */
++ BQ27000_RSOC, /* Relative State of Charge */
++ BQ27000_NAC_L, /* Nominal Available Capacity H L */
++ BQ27000_NAC_H,
++ BQ27000_CACD_L, /* Discharge Compensated H L */
++ BQ27000_CACD_H,
++ BQ27000_CACT_L, /* Temperature Compensated H L */
++ BQ27000_CACT_H,
++ BQ27000_LMD_L, /* Last measured discharge H L */
++ BQ27000_LMD_H,
++ BQ27000_AI_L, /* Average Current H L */
++ BQ27000_AI_H,
++ BQ27000_TTE_L, /* Time to Empty H L */
++ BQ27000_TTE_H,
++ BQ27000_TTF_L, /* Time to Full H L */
++ BQ27000_TTF_H,
++ BQ27000_SI_L, /* Standby Current H L */
++ BQ27000_SI_H,
++ BQ27000_STTE_L, /* Standby Time To Empty H L */
++ BQ27000_STTE_H,
++ BQ27000_MLI_L, /* Max Load Current H L */
++ BQ27000_MLI_H,
++ BQ27000_MLTTE_L, /* Max Load Time To Empty H L */
++ BQ27000_MLTTE_H,
++ BQ27000_SAE_L, /* Available Energy H L */
++ BQ27000_SAE_H,
++ BQ27000_AP_L, /* Available Power H L */
++ BQ27000_AP_H,
++ BQ27000_TTECP_L, /* Time to Empty at Constant Power H L */
++ BQ27000_TTECP_H,
++ BQ27000_CYCL_L, /* Cycle count since learning cycle H L */
++ BQ27000_CYCL_H,
++ BQ27000_CYCT_L, /* Cycle Count Total H L */
++ BQ27000_CYCT_H,
++ BQ27000_CSOC, /* Compensated State Of Charge */
++ /* EEPROM regs */
++ /* read-write after this */
++ BQ27000_EE_EE_EN = 0x6e, /* EEPROM Program Enable */
++ BQ27000_EE_ILMD = 0x76, /* Initial Last Measured Discharge High Byte */
++ BQ27000_EE_SEDVF, /* Scaled EDVF Threshold */
++ BQ27000_EE_SEDV1, /* Scaled EDV1 Threshold */
++ BQ27000_EE_ISLC, /* Initial Standby Load Current */
++ BQ27000_EE_DMFSD, /* Digital Magnitude Filter and Self Discharge */
++ BQ27000_EE_TAPER, /* Aging Estimate Enable, Charge Termination Taper */
++ BQ27000_EE_PKCFG, /* Pack Configuration Values */
++ BQ27000_EE_IMLC, /* Initial Max Load Current or ID #3 */
++ BQ27000_EE_DCOMP, /* Discharge rate compensation constants or ID #2 */
++ BQ27000_EE_TCOMP, /* Temperature Compensation constants or ID #1 */
++};
++
++enum bq27000_status_flags {
++ BQ27000_STATUS_CHGS = 0x80, /* 1 = being charged */
++ BQ27000_STATUS_NOACT = 0x40, /* 1 = no activity */
++ BQ27000_STATUS_IMIN = 0x20, /* 1 = Lion taper current mode */
++ BQ27000_STATUS_CI = 0x10, /* 1 = capacity likely innacurate */
++ BQ27000_STATUS_CALIP = 0x08, /* 1 = calibration in progress */
++ BQ27000_STATUS_VDQ = 0x04, /* 1 = capacity should be accurate */
++ BQ27000_STATUS_EDV1 = 0x02, /* 1 = end of discharge.. <6% left */
++ BQ27000_STATUS_EDVF = 0x01, /* 1 = no, it's really empty now */
++};
++
++#define NANOVOLTS_UNIT 3750
++
++struct bq27000_device_info {
++ struct device *dev;
++ struct power_supply bat;
++ struct bq27000_platform_data *pdata;
++};
++
++/*
++ * reading 16 bit values over HDQ has a special hazard where the
++ * hdq device firmware can update the 16-bit register during the time we
++ * read the two halves. TI document SLUS556D recommends the algorithm here
++ * to avoid trouble
++ */
++
++static int hdq_read16(struct bq27000_device_info *di, int address)
++{
++ int acc;
++ int high;
++ int retries = 3;
++
++ while (retries--) {
++
++ high = (di->pdata->hdq_read)(address + 1); /* high part */
++
++ if (high < 0)
++ return high;
++ acc = (di->pdata->hdq_read)(address);
++ if (acc < 0)
++ return acc;
++
++ /* confirm high didn't change between reading it and low */
++ if (high == (di->pdata->hdq_read)(address + 1))
++ return (high << 8) | acc;
++ }
++
++ return -ETIME;
++}
++
++#define to_bq27000_device_info(x) container_of((x), \
++ struct bq27000_device_info, \
++ bat);
++
++static void bq27000_battery_external_power_changed(struct power_supply *psy)
++{
++ struct bq27000_device_info *di = to_bq27000_device_info(psy);
++
++ dev_dbg(di->dev, "%s\n", __FUNCTION__);
++}
++
++static int bq27000_battery_get_property(struct power_supply *psy,
++ enum power_supply_property psp,
++ union power_supply_propval *val)
++{
++ int v, n;
++ struct bq27000_device_info *di = to_bq27000_device_info(psy);
++
++ if (!(di->pdata->hdq_initialized)())
++ return -EINVAL;
++
++ switch (psp) {
++ case POWER_SUPPLY_PROP_STATUS:
++ val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
++
++ if (!di->pdata->get_charger_online_status)
++ goto use_bat;
++ if ((di->pdata->get_charger_online_status)()) {
++ /*
++ * charger is definitively present
++ * we report our state in terms of what it says it
++ * is doing
++ */
++ if (!di->pdata->get_charger_active_status)
++ goto use_bat;
++
++ if ((di->pdata->get_charger_active_status)()) {
++ val->intval = POWER_SUPPLY_STATUS_CHARGING;
++ break;
++ }
++ val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
++ break;
++ }
++
++ /*
++ * platform provided definite indication of charger presence,
++ * and it is telling us it isn't there... but we are on so we
++ * must be running from battery --->
++ */
++
++ val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
++ break;
++
++use_bat:
++ /*
++ * either the charger is not connected, or the
++ * platform doesn't give info about charger, use battery state
++ * but... battery state can be out of date by 4 seconds or
++ * so... use the platform callbacks if possible.
++ */
++ v = hdq_read16(di, BQ27000_AI_L);
++ if (v < 0)
++ return v;
++
++ /* no real activity on the battery */
++ if (v < 2) {
++ if (!hdq_read16(di, BQ27000_TTF_L))
++ val->intval = POWER_SUPPLY_STATUS_FULL;
++ else
++ val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
++ break;
++ }
++ /* power is actually going in or out... */
++ v = (di->pdata->hdq_read)(BQ27000_FLAGS);
++ if (v < 0)
++ return v;
++ if (v & BQ27000_STATUS_CHGS)
++ val->intval = POWER_SUPPLY_STATUS_CHARGING;
++ else
++ val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
++ break;
++ case POWER_SUPPLY_PROP_VOLTAGE_NOW:
++ v = hdq_read16(di, BQ27000_VOLT_L);
++ if (v < 0)
++ return v;
++ /* mV -> uV */
++ val->intval = v * 1000;
++ break;
++ case POWER_SUPPLY_PROP_CURRENT_NOW:
++ v = (di->pdata->hdq_read)(BQ27000_FLAGS);
++ if (v < 0)
++ return v;
++ if (v & BQ27000_STATUS_CHGS)
++ n = -NANOVOLTS_UNIT;
++ else
++ n = NANOVOLTS_UNIT;
++ v = hdq_read16(di, BQ27000_AI_L);
++ if (v < 0)
++ return v;
++ val->intval = (v * n) / di->pdata->rsense_mohms;
++ break;
++ case POWER_SUPPLY_PROP_CHARGE_FULL:
++ v = hdq_read16(di, BQ27000_LMD_L);
++ if (v < 0)
++ return v;
++ val->intval = (v * 3570) / di->pdata->rsense_mohms;
++ break;
++ case POWER_SUPPLY_PROP_TEMP:
++ v = hdq_read16(di, BQ27000_TEMP_L);
++ if (v < 0)
++ return v;
++ /* K (in 0.25K units) is 273.15 up from C (in 0.1C)*/
++ /* 10926 = 27315 * 4 / 10 */
++ val->intval = (((long)v * 10l) - 10926) / 4;
++ break;
++ case POWER_SUPPLY_PROP_TECHNOLOGY:
++ val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
++ break;
++ case POWER_SUPPLY_PROP_CAPACITY:
++ val->intval = (di->pdata->hdq_read)(BQ27000_RSOC);
++ if (val->intval < 0)
++ return val->intval;
++ break;
++ case POWER_SUPPLY_PROP_PRESENT:
++ v = (di->pdata->hdq_read)(BQ27000_RSOC);
++ val->intval = !(v < 0);
++ break;
++ case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
++ v = hdq_read16(di, BQ27000_TTE_L);
++ if (v < 0)
++ return v;
++ val->intval = 60 * v;
++ break;
++ case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
++ v = hdq_read16(di, BQ27000_TTF_L);
++ if (v < 0)
++ return v;
++ val->intval = 60 * v;
++ break;
++ case POWER_SUPPLY_PROP_ONLINE:
++ if (di->pdata->get_charger_online_status)
++ val->intval = (di->pdata->get_charger_online_status)();
++ else
++ return -EINVAL;
++ break;
++ default:
++ return -EINVAL;
++ }
++
++ return 0;
++}
++
++static enum power_supply_property bq27000_battery_props[] = {
++ POWER_SUPPLY_PROP_STATUS,
++ POWER_SUPPLY_PROP_VOLTAGE_NOW,
++ POWER_SUPPLY_PROP_CURRENT_NOW,
++ POWER_SUPPLY_PROP_CHARGE_FULL,
++ POWER_SUPPLY_PROP_TEMP,
++ POWER_SUPPLY_PROP_TECHNOLOGY,
++ POWER_SUPPLY_PROP_PRESENT,
++ POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
++ POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
++ POWER_SUPPLY_PROP_CAPACITY,
++ POWER_SUPPLY_PROP_ONLINE
++};
++
++static int bq27000_battery_probe(struct platform_device *pdev)
++{
++ int retval = 0;
++ struct bq27000_device_info *di;
++ struct bq27000_platform_data *pdata;
++
++ dev_info(&pdev->dev, "BQ27000 Battery Driver (C) 2008 Openmoko, Inc\n");
++
++ di = kzalloc(sizeof(*di), GFP_KERNEL);
++ if (!di) {
++ retval = -ENOMEM;
++ goto di_alloc_failed;
++ }
++
++ platform_set_drvdata(pdev, di);
++
++ pdata = pdev->dev.platform_data;
++ di->dev = &pdev->dev;
++ /* di->w1_dev = pdev->dev.parent; */
++ di->bat.name = pdata->name;
++ di->bat.type = POWER_SUPPLY_TYPE_BATTERY;
++ di->bat.properties = bq27000_battery_props;
++ di->bat.num_properties = ARRAY_SIZE(bq27000_battery_props);
++ di->bat.get_property = bq27000_battery_get_property;
++ di->bat.external_power_changed =
++ bq27000_battery_external_power_changed;
++ di->bat.use_for_apm = 1;
++ di->pdata = pdata;
++
++ retval = power_supply_register(&pdev->dev, &di->bat);
++ if (retval) {
++ dev_err(di->dev, "failed to register battery\n");
++ goto batt_failed;
++ }
++
++ return 0;
++
++batt_failed:
++ kfree(di);
++di_alloc_failed:
++ return retval;
++}
++
++static int bq27000_battery_remove(struct platform_device *pdev)
++{
++ struct bq27000_device_info *di = platform_get_drvdata(pdev);
++
++ power_supply_unregister(&di->bat);
++
++ return 0;
++}
++
++void bq27000_charging_state_change(struct platform_device *pdev)
++{
++ struct bq27000_device_info *di = platform_get_drvdata(pdev);
++
++ if (!di)
++ return;
++
++ power_supply_changed(&di->bat);
++}
++EXPORT_SYMBOL_GPL(bq27000_charging_state_change);
++
++#ifdef CONFIG_PM
++
++static int bq27000_battery_suspend(struct platform_device *pdev,
++ pm_message_t state)
++{
++ return 0;
++}
++
++static int bq27000_battery_resume(struct platform_device *pdev)
++{
++ return 0;
++}
++
++#else
++
++#define bq27000_battery_suspend NULL
++#define bq27000_battery_resume NULL
++
++#endif /* CONFIG_PM */
++
++static struct platform_driver bq27000_battery_driver = {
++ .driver = {
++ .name = "bq27000-battery",
++ },
++ .probe = bq27000_battery_probe,
++ .remove = bq27000_battery_remove,
++ .suspend = bq27000_battery_suspend,
++ .resume = bq27000_battery_resume,
++};
++
++static int __init bq27000_battery_init(void)
++{
++ return platform_driver_register(&bq27000_battery_driver);
++}
++
++static void __exit bq27000_battery_exit(void)
++{
++ platform_driver_unregister(&bq27000_battery_driver);
++}
++
++module_init(bq27000_battery_init);
++module_exit(bq27000_battery_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
++MODULE_DESCRIPTION("bq27000 battery driver");
+Index: linux-2.6.24.7/drivers/power/gta01_battery.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/power/gta01_battery.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,97 @@
++/*
++ * Battery driver for the Openmoko GTA01 device, using the pcf50606 chip.
++ *
++ * This is nothing more than a write-thru interface to the real logic,
++ * which is part of the pcf50606.c multifunction chip driver.
++ * Copyright © 2008 Mike Westerhof <mwester@dls.net>
++ *
++ *
++ * Portions liberally borrowed from olpc_battery.c, copyright below:
++ * Copyright © 2006 David Woodhouse <dwmw2@infradead.org>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/module.h>
++#include <linux/err.h>
++#include <linux/platform_device.h>
++#include <linux/power_supply.h>
++#include <linux/jiffies.h>
++#include <linux/sched.h>
++
++/*********************************************************************
++ * This global is set by the pcf50606 driver to the correct callback
++ *********************************************************************/
++
++extern int (*pmu_bat_get_property)(struct power_supply *,
++ enum power_supply_property,
++ union power_supply_propval *);
++
++
++/*********************************************************************
++ * Battery properties
++ *********************************************************************/
++static int gta01_bat_get_property(struct power_supply *psy,
++ enum power_supply_property psp,
++ union power_supply_propval *val)
++{
++ if (pmu_bat_get_property)
++ return (pmu_bat_get_property)(psy, psp, val);
++ else
++ return -ENODEV;
++}
++
++static enum power_supply_property gta01_bat_props[] = {
++ POWER_SUPPLY_PROP_STATUS,
++ POWER_SUPPLY_PROP_PRESENT,
++ POWER_SUPPLY_PROP_ONLINE,
++ POWER_SUPPLY_PROP_VOLTAGE_NOW,
++ POWER_SUPPLY_PROP_CURRENT_NOW,
++ POWER_SUPPLY_PROP_TEMP,
++ POWER_SUPPLY_PROP_CAPACITY,
++};
++
++/*********************************************************************
++ * Initialisation
++ *********************************************************************/
++
++static struct platform_device *bat_pdev;
++
++static struct power_supply gta01_bat = {
++ .properties = gta01_bat_props,
++ .num_properties = ARRAY_SIZE(gta01_bat_props),
++ .get_property = gta01_bat_get_property,
++ .use_for_apm = 0, /* pcf50606 driver has its own apm driver */
++};
++
++static int __init gta01_bat_init(void)
++{
++ int ret;
++
++ bat_pdev = platform_device_register_simple("bat", 0, NULL, 0);
++ if (IS_ERR(bat_pdev))
++ return PTR_ERR(bat_pdev);
++
++ gta01_bat.name = bat_pdev->name;
++
++ ret = power_supply_register(&bat_pdev->dev, >a01_bat);
++ if (ret)
++ platform_device_unregister(bat_pdev);
++
++ return ret;
++}
++
++static void __exit gta01_bat_exit(void)
++{
++ power_supply_unregister(>a01_bat);
++ platform_device_unregister(bat_pdev);
++}
++
++module_init(gta01_bat_init);
++module_exit(gta01_bat_exit);
++
++MODULE_AUTHOR("Mike Westerhof <mwester@dls.net>");
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Battery driver for GTA01");
+Index: linux-2.6.24.7/drivers/power/gta02_hdq.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/power/gta02_hdq.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,250 @@
++/*
++ * HDQ driver for the FIC Neo1973 GTA02 GSM phone
++ *
++ * (C) 2006-2007 by Openmoko, Inc.
++ * Author: Andy Green <andy@openmoko.com>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/platform_device.h>
++#include <asm/hardware.h>
++#include <asm/mach-types.h>
++#include <asm/arch/gta02.h>
++#include <asm/arch/fiq_ipc_gta02.h>
++
++
++
++#define HDQ_READ 0
++#define HDQ_WRITE 0x80
++
++
++int gta02hdq_initialized(void)
++{
++ return fiq_ipc.hdq_probed;
++}
++EXPORT_SYMBOL_GPL(gta02hdq_initialized);
++
++int gta02hdq_read(int address)
++{
++ int count_sleeps = 5;
++ int ret = -ETIME;
++
++ mutex_lock(&fiq_ipc.hdq_lock);
++
++ fiq_ipc.hdq_ads = address | HDQ_READ;
++ fiq_ipc.hdq_request_ctr++;
++ fiq_kick();
++ /*
++ * FIQ takes care of it while we block our calling process
++ * But we're not spinning -- other processes run normally while
++ * we wait for the result
++ */
++ while (count_sleeps--) {
++ msleep(10); /* valid transaction always completes in < 10ms */
++
++ if (fiq_ipc.hdq_request_ctr != fiq_ipc.hdq_transaction_ctr)
++ continue;
++
++ if (fiq_ipc.hdq_error)
++ goto done; /* didn't see a response in good time */
++
++ ret = fiq_ipc.hdq_rx_data;
++ goto done;
++ }
++ ret = -EINVAL;
++
++done:
++ mutex_unlock(&fiq_ipc.hdq_lock);
++ return ret;
++}
++EXPORT_SYMBOL_GPL(gta02hdq_read);
++
++int gta02hdq_write(int address, u8 data)
++{
++ int count_sleeps = 5;
++ int ret = -ETIME;
++
++ mutex_lock(&fiq_ipc.hdq_lock);
++
++ fiq_ipc.hdq_ads = address | HDQ_WRITE;
++ fiq_ipc.hdq_tx_data = data;
++ fiq_ipc.hdq_request_ctr++;
++ fiq_kick();
++ /*
++ * FIQ takes care of it while we block our calling process
++ * But we're not spinning -- other processes run normally while
++ * we wait for the result
++ */
++ while (count_sleeps--) {
++ msleep(10); /* valid transaction always completes in < 10ms */
++
++ if (fiq_ipc.hdq_request_ctr != fiq_ipc.hdq_transaction_ctr)
++ continue; /* something bad with FIQ */
++
++ if (fiq_ipc.hdq_error)
++ goto done; /* didn't see a response in good time */
++ }
++ ret = -EINVAL;
++
++done:
++ mutex_unlock(&fiq_ipc.hdq_lock);
++ return ret;
++}
++EXPORT_SYMBOL_GPL(gta02hdq_write);
++
++/* sysfs */
++
++static ssize_t hdq_sysfs_dump(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ int n;
++ int v;
++ u8 u8a[128]; /* whole address space for HDQ */
++ char *end = buf;
++
++ /* the dump does not take care about 16 bit regs, because at this
++ * bus level we don't know about the chip details
++ */
++ for (n = 0; n < sizeof(u8a); n++) {
++ v = gta02hdq_read(n);
++ if (v < 0)
++ goto bail;
++ u8a[n] = v;
++ }
++
++ for (n = 0; n < sizeof(u8a); n += 16) {
++ hex_dump_to_buffer(u8a + n, sizeof(u8a), 16, 1, end, 4096, 0);
++ end += strlen(end);
++ *end++ = '\n';
++ *end = '\0';
++ }
++ return (end - buf);
++
++bail:
++ return sprintf(buf, "ERROR %d\n", v);
++}
++
++/* you write by <address> <data>, eg, "34 128" */
++
++#define atoi(str) simple_strtoul(((str != NULL) ? str : ""), NULL, 0)
++
++static ssize_t hdq_sysfs_write(struct device *dev,
++ struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ const char *end = buf + count;
++ int address = atoi(buf);
++
++ while ((buf != end) && (*buf != ' '))
++ buf++;
++ if (buf >= end)
++ return 0;
++ while ((buf < end) && (*buf == ' '))
++ buf++;
++ if (buf >= end)
++ return 0;
++
++ gta02hdq_write(address, atoi(buf));
++
++ return count;
++}
++
++static DEVICE_ATTR(dump, 0400, hdq_sysfs_dump, NULL);
++static DEVICE_ATTR(write, 0600, NULL, hdq_sysfs_write);
++
++static struct attribute *gta02hdq_sysfs_entries[] = {
++ &dev_attr_dump.attr,
++ &dev_attr_write.attr,
++ NULL
++};
++
++static struct attribute_group gta02hdq_attr_group = {
++ .name = "hdq",
++ .attrs = gta02hdq_sysfs_entries,
++};
++
++
++#ifdef CONFIG_PM
++static int gta02hdq_suspend(struct platform_device *pdev, pm_message_t state)
++{
++ /* after 18s of this, the battery monitor will also go to sleep */
++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 0);
++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT);
++ return 0;
++}
++
++static int gta02hdq_resume(struct platform_device *pdev)
++{
++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1);
++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT);
++ return 0;
++}
++#endif
++
++static int __init gta02hdq_probe(struct platform_device *pdev)
++{
++ struct resource *r = platform_get_resource(pdev, 0, 0);
++
++ if (!machine_is_neo1973_gta02())
++ return -EIO;
++
++ if (!r)
++ return -EINVAL;
++
++ platform_set_drvdata(pdev, NULL);
++
++ mutex_init(&fiq_ipc.hdq_lock);
++
++ /* set our HDQ comms pin from the platform data */
++ fiq_ipc.hdq_gpio_pin = r->start;
++
++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1);
++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT);
++
++ fiq_ipc.hdq_probed = 1; /* we are ready to do stuff now */
++
++ return sysfs_create_group(&pdev->dev.kobj, >a02hdq_attr_group);
++}
++
++static int gta02hdq_remove(struct platform_device *pdev)
++{
++ sysfs_remove_group(&pdev->dev.kobj, >a02hdq_attr_group);
++ return 0;
++}
++
++static struct platform_driver gta02hdq_driver = {
++ .probe = gta02hdq_probe,
++ .remove = gta02hdq_remove,
++#ifdef CONFIG_PM
++ .suspend = gta02hdq_suspend,
++ .resume = gta02hdq_resume,
++#endif
++ .driver = {
++ .name = "gta02-hdq",
++ },
++};
++
++static int __init gta02hdq_init(void)
++{
++ return platform_driver_register(>a02hdq_driver);
++}
++
++static void __exit gta02hdq_exit(void)
++{
++ platform_driver_unregister(>a02hdq_driver);
++}
++
++module_init(gta02hdq_init);
++module_exit(gta02hdq_exit);
++
++MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
++MODULE_DESCRIPTION("GTA02 HDQ driver");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.24.7/drivers/power/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/power/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/power/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -49,4 +49,24 @@ config BATTERY_OLPC
+ help
+ Say Y to enable support for the battery on the OLPC laptop.
+
++config BATTERY_BQ27000_HDQ
++ tristate "BQ27000 HDQ battery monitor driver"
++ help
++ Say Y to enable support for the battery on the Neo Freerunner
++
++config GTA02_HDQ
++ tristate "Neo Freerunner HDQ"
++ depends on MACH_NEO1973_GTA02 && FIQ && S3C2440_C_FIQ
++ help
++ Say Y to enable support for communicating with an HDQ battery
++ on the Neo Freerunner. You probably want to select
++ at least BATTERY_BQ27000_HDQ as well
++
++config BATTERY_GTA01
++ tristate "Neo GTA01 battery"
++ depends on MACH_NEO1973_GTA01
++ help
++ Say Y to enable support for the battery on the Neo GTA01
++
+ endif # POWER_SUPPLY
++
+Index: linux-2.6.24.7/drivers/power/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/drivers/power/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/power/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -20,3 +20,7 @@ obj-$(CONFIG_APM_POWER) += apm_power.o
+ obj-$(CONFIG_BATTERY_DS2760) += ds2760_battery.o
+ obj-$(CONFIG_BATTERY_PMU) += pmu_battery.o
+ obj-$(CONFIG_BATTERY_OLPC) += olpc_battery.o
++obj-$(CONFIG_BATTERY_BQ27000_HDQ) += bq27000_battery.o
++obj-$(CONFIG_BATTERY_GTA01) += gta01_battery.o
++
++obj-$(CONFIG_GTA02_HDQ) += gta02_hdq.o
+Index: linux-2.6.24.7/drivers/sdio/function/Kconfig
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,11 @@
++#menu "SDIO function drivers"
++
++config SDIO_AR6000_WLAN
++ tristate "ar6000 wireless networking over sdio"
++ depends on SDIO
++ select WIRELESS_EXT
++ default m
++ help
++ good luck.
++
++#endmenu
+\ No newline at end of file
+Index: linux-2.6.24.7/drivers/sdio/function/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1 @@
++obj-$(CONFIG_SDIO_AR6000_WLAN) += wlan/
+\ No newline at end of file
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,3078 @@
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++/*
++ * This driver is a pseudo ethernet driver to access the Atheros AR6000
++ * WLAN Device
++ */
++static const char athId[] __attribute__ ((unused)) = "$Id: //depot/sw/releases/olca2.0-GPL/host/os/linux/ar6000_drv.c#2 $";
++
++#include "ar6000_drv.h"
++#include "htc.h"
++
++MODULE_LICENSE("GPL and additional rights");
++
++#ifndef REORG_APTC_HEURISTICS
++#undef ADAPTIVE_POWER_THROUGHPUT_CONTROL
++#endif /* REORG_APTC_HEURISTICS */
++
++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
++#define APTC_TRAFFIC_SAMPLING_INTERVAL 100 /* msec */
++#define APTC_UPPER_THROUGHPUT_THRESHOLD 3000 /* Kbps */
++#define APTC_LOWER_THROUGHPUT_THRESHOLD 2000 /* Kbps */
++
++typedef struct aptc_traffic_record {
++ A_BOOL timerScheduled;
++ struct timeval samplingTS;
++ unsigned long bytesReceived;
++ unsigned long bytesTransmitted;
++} APTC_TRAFFIC_RECORD;
++
++A_TIMER aptcTimer;
++APTC_TRAFFIC_RECORD aptcTR;
++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
++
++int bmienable = 0;
++unsigned int bypasswmi = 0;
++unsigned int debuglevel = 0;
++int tspecCompliance = 1;
++unsigned int busspeedlow = 0;
++unsigned int onebitmode = 0;
++unsigned int skipflash = 0;
++unsigned int wmitimeout = 2;
++unsigned int wlanNodeCaching = 1;
++unsigned int enableuartprint = 0;
++unsigned int logWmiRawMsgs = 0;
++unsigned int enabletimerwar = 0;
++unsigned int mbox_yield_limit = 99;
++int reduce_credit_dribble = 1 + HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_ONE_HALF;
++int allow_trace_signal = 0;
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++unsigned int testmode =0;
++#endif
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++module_param(bmienable, int, 0644);
++module_param(bypasswmi, int, 0644);
++module_param(debuglevel, int, 0644);
++module_param(tspecCompliance, int, 0644);
++module_param(onebitmode, int, 0644);
++module_param(busspeedlow, int, 0644);
++module_param(skipflash, int, 0644);
++module_param(wmitimeout, int, 0644);
++module_param(wlanNodeCaching, int, 0644);
++module_param(logWmiRawMsgs, int, 0644);
++module_param(enableuartprint, int, 0644);
++module_param(enabletimerwar, int, 0644);
++module_param(mbox_yield_limit, int, 0644);
++module_param(reduce_credit_dribble, int, 0644);
++module_param(allow_trace_signal, int, 0644);
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++module_param(testmode, int, 0644);
++#endif
++#else
++
++#define __user
++/* for linux 2.4 and lower */
++MODULE_PARM(bmienable,"i");
++MODULE_PARM(bypasswmi,"i");
++MODULE_PARM(debuglevel, "i");
++MODULE_PARM(onebitmode,"i");
++MODULE_PARM(busspeedlow, "i");
++MODULE_PARM(skipflash, "i");
++MODULE_PARM(wmitimeout, "i");
++MODULE_PARM(wlanNodeCaching, "i");
++MODULE_PARM(enableuartprint,"i");
++MODULE_PARM(logWmiRawMsgs, "i");
++MODULE_PARM(enabletimerwar,"i");
++MODULE_PARM(mbox_yield_limit,"i");
++MODULE_PARM(reduce_credit_dribble,"i");
++MODULE_PARM(allow_trace_signal,"i");
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++MODULE_PARM(testmode, "i");
++#endif
++#endif
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
++/* in 2.6.10 and later this is now a pointer to a uint */
++unsigned int _mboxnum = HTC_MAILBOX_NUM_MAX;
++#define mboxnum &_mboxnum
++#else
++unsigned int mboxnum = HTC_MAILBOX_NUM_MAX;
++#endif
++
++#ifdef DEBUG
++A_UINT32 g_dbg_flags = DBG_DEFAULTS;
++unsigned int debugflags = 0;
++int debugdriver = 1;
++unsigned int debughtc = 128;
++unsigned int debugbmi = 1;
++unsigned int debughif = 2;
++unsigned int resetok = 1;
++unsigned int txcreditsavailable[HTC_MAILBOX_NUM_MAX] = {0};
++unsigned int txcreditsconsumed[HTC_MAILBOX_NUM_MAX] = {0};
++unsigned int txcreditintrenable[HTC_MAILBOX_NUM_MAX] = {0};
++unsigned int txcreditintrenableaggregate[HTC_MAILBOX_NUM_MAX] = {0};
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++module_param(debugflags, int, 0644);
++module_param(debugdriver, int, 0644);
++module_param(debughtc, int, 0644);
++module_param(debugbmi, int, 0644);
++module_param(debughif, int, 0644);
++module_param(resetok, int, 0644);
++module_param_array(txcreditsavailable, int, mboxnum, 0644);
++module_param_array(txcreditsconsumed, int, mboxnum, 0644);
++module_param_array(txcreditintrenable, int, mboxnum, 0644);
++module_param_array(txcreditintrenableaggregate, int, mboxnum, 0644);
++#else
++/* linux 2.4 and lower */
++MODULE_PARM(debugflags,"i");
++MODULE_PARM(debugdriver, "i");
++MODULE_PARM(debughtc, "i");
++MODULE_PARM(debugbmi, "i");
++MODULE_PARM(debughif, "i");
++MODULE_PARM(resetok, "i");
++MODULE_PARM(txcreditsavailable, "0-3i");
++MODULE_PARM(txcreditsconsumed, "0-3i");
++MODULE_PARM(txcreditintrenable, "0-3i");
++MODULE_PARM(txcreditintrenableaggregate, "0-3i");
++#endif
++
++#else
++unsigned int resetok = 1;
++
++#endif /* DEBUG */
++
++unsigned int tx_attempt[HTC_MAILBOX_NUM_MAX] = {0};
++unsigned int tx_post[HTC_MAILBOX_NUM_MAX] = {0};
++unsigned int tx_complete[HTC_MAILBOX_NUM_MAX] = {0};
++unsigned int hifBusRequestNumMax = 40;
++unsigned int war23838_disabled = 0;
++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
++unsigned int enableAPTCHeuristics = 1;
++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++module_param_array(tx_attempt, int, mboxnum, 0644);
++module_param_array(tx_post, int, mboxnum, 0644);
++module_param_array(tx_complete, int, mboxnum, 0644);
++module_param(hifBusRequestNumMax, int, 0644);
++module_param(war23838_disabled, int, 0644);
++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
++module_param(enableAPTCHeuristics, int, 0644);
++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
++#else
++MODULE_PARM(tx_attempt, "0-3i");
++MODULE_PARM(tx_post, "0-3i");
++MODULE_PARM(tx_complete, "0-3i");
++MODULE_PARM(hifBusRequestNumMax, "i");
++MODULE_PARM(war23838_disabled, "i");
++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
++MODULE_PARM(enableAPTCHeuristics, "i");
++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
++#endif
++
++#ifdef BLOCK_TX_PATH_FLAG
++int blocktx = 0;
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++module_param(blocktx, int, 0644);
++#else
++MODULE_PARM(blocktx, "i");
++#endif
++#endif /* BLOCK_TX_PATH_FLAG */
++
++// TODO move to arsoft_c
++USER_RSSI_THOLD rssi_map[12];
++
++int reconnect_flag = 0;
++
++DECLARE_WAIT_QUEUE_HEAD(ar6000_scan_queue);
++
++/* Function declarations */
++static int ar6000_init_module(void);
++static void ar6000_cleanup_module(void);
++
++int ar6000_init(struct net_device *dev);
++static int ar6000_open(struct net_device *dev);
++static int ar6000_close(struct net_device *dev);
++static void ar6000_init_control_info(AR_SOFTC_T *ar);
++static int ar6000_data_tx(struct sk_buff *skb, struct net_device *dev);
++
++static void ar6000_destroy(struct net_device *dev, unsigned int unregister);
++static void ar6000_detect_error(unsigned long ptr);
++static struct net_device_stats *ar6000_get_stats(struct net_device *dev);
++static struct iw_statistics *ar6000_get_iwstats(struct net_device * dev);
++
++/*
++ * HTC service connection handlers
++ */
++static void ar6000_avail_ev(HTC_HANDLE HTCHandle);
++
++static void ar6000_unavail_ev(void *Instance);
++
++static void ar6000_target_failure(void *Instance, A_STATUS Status);
++
++static void ar6000_rx(void *Context, HTC_PACKET *pPacket);
++
++static void ar6000_rx_refill(void *Context,HTC_ENDPOINT_ID Endpoint);
++
++static void ar6000_tx_complete(void *Context, HTC_PACKET *pPacket);
++
++static void ar6000_tx_queue_full(void *Context, HTC_ENDPOINT_ID Endpoint);
++
++/*
++ * Static variables
++ */
++
++static struct net_device *ar6000_devices[MAX_AR6000];
++extern struct iw_handler_def ath_iw_handler_def;
++DECLARE_WAIT_QUEUE_HEAD(arEvent);
++static void ar6000_cookie_init(AR_SOFTC_T *ar);
++static void ar6000_cookie_cleanup(AR_SOFTC_T *ar);
++static void ar6000_free_cookie(AR_SOFTC_T *ar, struct ar_cookie * cookie);
++static struct ar_cookie *ar6000_alloc_cookie(AR_SOFTC_T *ar);
++static void ar6000_TxDataCleanup(AR_SOFTC_T *ar);
++
++#ifdef USER_KEYS
++static A_STATUS ar6000_reinstall_keys(AR_SOFTC_T *ar,A_UINT8 key_op_ctrl);
++#endif
++
++
++static struct ar_cookie s_ar_cookie_mem[MAX_COOKIE_NUM];
++
++#define HOST_INTEREST_ITEM_ADDRESS(ar, item) \
++((ar->arTargetType == TARGET_TYPE_AR6001) ? \
++ AR6001_HOST_INTEREST_ITEM_ADDRESS(item) : \
++ AR6002_HOST_INTEREST_ITEM_ADDRESS(item))
++
++
++/* Debug log support */
++
++/*
++ * Flag to govern whether the debug logs should be parsed in the kernel
++ * or reported to the application.
++ */
++#ifdef DEBUG
++#define REPORT_DEBUG_LOGS_TO_APP
++#endif
++
++A_STATUS
++ar6000_set_host_app_area(AR_SOFTC_T *ar)
++{
++ A_UINT32 address, data;
++ struct host_app_area_s host_app_area;
++
++ /* Fetch the address of the host_app_area_s instance in the host interest area */
++ address = HOST_INTEREST_ITEM_ADDRESS(ar, hi_app_host_interest);
++ if (ar6000_ReadRegDiag(ar->arHifDevice, &address, &data) != A_OK) {
++ return A_ERROR;
++ }
++ address = data;
++ host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION;
++ if (ar6000_WriteDataDiag(ar->arHifDevice, address,
++ (A_UCHAR *)&host_app_area,
++ sizeof(struct host_app_area_s)) != A_OK)
++ {
++ return A_ERROR;
++ }
++
++ return A_OK;
++}
++
++A_UINT32
++dbglog_get_debug_hdr_ptr(AR_SOFTC_T *ar)
++{
++ A_UINT32 param;
++ A_UINT32 address;
++ A_STATUS status;
++
++ address = HOST_INTEREST_ITEM_ADDRESS(ar, hi_dbglog_hdr);
++ if ((status = ar6000_ReadDataDiag(ar->arHifDevice, address,
++ (A_UCHAR *)¶m, 4)) != A_OK)
++ {
++ param = 0;
++ }
++
++ return param;
++}
++
++/*
++ * The dbglog module has been initialized. Its ok to access the relevant
++ * data stuctures over the diagnostic window.
++ */
++void
++ar6000_dbglog_init_done(AR_SOFTC_T *ar)
++{
++ ar->dbglog_init_done = TRUE;
++}
++
++A_UINT32
++dbglog_get_debug_fragment(A_INT8 *datap, A_UINT32 len, A_UINT32 limit)
++{
++ A_INT32 *buffer;
++ A_UINT32 count;
++ A_UINT32 numargs;
++ A_UINT32 length;
++ A_UINT32 fraglen;
++
++ count = fraglen = 0;
++ buffer = (A_INT32 *)datap;
++ length = (limit >> 2);
++
++ if (len <= limit) {
++ fraglen = len;
++ } else {
++ while (count < length) {
++ numargs = DBGLOG_GET_NUMARGS(buffer[count]);
++ fraglen = (count << 2);
++ count += numargs + 1;
++ }
++ }
++
++ return fraglen;
++}
++
++void
++dbglog_parse_debug_logs(A_INT8 *datap, A_UINT32 len)
++{
++ A_INT32 *buffer;
++ A_UINT32 count;
++ A_UINT32 timestamp;
++ A_UINT32 debugid;
++ A_UINT32 moduleid;
++ A_UINT32 numargs;
++ A_UINT32 length;
++
++ count = 0;
++ buffer = (A_INT32 *)datap;
++ length = (len >> 2);
++ while (count < length) {
++ debugid = DBGLOG_GET_DBGID(buffer[count]);
++ moduleid = DBGLOG_GET_MODULEID(buffer[count]);
++ numargs = DBGLOG_GET_NUMARGS(buffer[count]);
++ timestamp = DBGLOG_GET_TIMESTAMP(buffer[count]);
++ switch (numargs) {
++ case 0:
++ AR_DEBUG_PRINTF("%d %d (%d)\n", moduleid, debugid, timestamp);
++ break;
++
++ case 1:
++ AR_DEBUG_PRINTF("%d %d (%d): 0x%x\n", moduleid, debugid,
++ timestamp, buffer[count+1]);
++ break;
++
++ case 2:
++ AR_DEBUG_PRINTF("%d %d (%d): 0x%x, 0x%x\n", moduleid, debugid,
++ timestamp, buffer[count+1], buffer[count+2]);
++ break;
++
++ default:
++ AR_DEBUG_PRINTF("Invalid args: %d\n", numargs);
++ }
++ count += numargs + 1;
++ }
++}
++
++int
++ar6000_dbglog_get_debug_logs(AR_SOFTC_T *ar)
++{
++ struct dbglog_hdr_s debug_hdr;
++ struct dbglog_buf_s debug_buf;
++ A_UINT32 address;
++ A_UINT32 length;
++ A_UINT32 dropped;
++ A_UINT32 firstbuf;
++ A_UINT32 debug_hdr_ptr;
++
++ if (!ar->dbglog_init_done) return A_ERROR;
++
++
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++
++ if (ar->dbgLogFetchInProgress) {
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ return A_EBUSY;
++ }
++
++ /* block out others */
++ ar->dbgLogFetchInProgress = TRUE;
++
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++
++ debug_hdr_ptr = dbglog_get_debug_hdr_ptr(ar);
++ printk("debug_hdr_ptr: 0x%x\n", debug_hdr_ptr);
++
++ /* Get the contents of the ring buffer */
++ if (debug_hdr_ptr) {
++ address = debug_hdr_ptr;
++ length = sizeof(struct dbglog_hdr_s);
++ ar6000_ReadDataDiag(ar->arHifDevice, address,
++ (A_UCHAR *)&debug_hdr, length);
++ address = (A_UINT32)debug_hdr.dbuf;
++ firstbuf = address;
++ dropped = debug_hdr.dropped;
++ length = sizeof(struct dbglog_buf_s);
++ ar6000_ReadDataDiag(ar->arHifDevice, address,
++ (A_UCHAR *)&debug_buf, length);
++
++ do {
++ address = (A_UINT32)debug_buf.buffer;
++ length = debug_buf.length;
++ if ((length) && (debug_buf.length <= debug_buf.bufsize)) {
++ /* Rewind the index if it is about to overrun the buffer */
++ if (ar->log_cnt > (DBGLOG_HOST_LOG_BUFFER_SIZE - length)) {
++ ar->log_cnt = 0;
++ }
++ if(A_OK != ar6000_ReadDataDiag(ar->arHifDevice, address,
++ (A_UCHAR *)&ar->log_buffer[ar->log_cnt], length))
++ {
++ break;
++ }
++ ar6000_dbglog_event(ar, dropped, &ar->log_buffer[ar->log_cnt], length);
++ ar->log_cnt += length;
++ } else {
++ AR_DEBUG_PRINTF("Length: %d (Total size: %d)\n",
++ debug_buf.length, debug_buf.bufsize);
++ }
++
++ address = (A_UINT32)debug_buf.next;
++ length = sizeof(struct dbglog_buf_s);
++ if(A_OK != ar6000_ReadDataDiag(ar->arHifDevice, address,
++ (A_UCHAR *)&debug_buf, length))
++ {
++ break;
++ }
++
++ } while (address != firstbuf);
++ }
++
++ ar->dbgLogFetchInProgress = FALSE;
++
++ return A_OK;
++}
++
++void
++ar6000_dbglog_event(AR_SOFTC_T *ar, A_UINT32 dropped,
++ A_INT8 *buffer, A_UINT32 length)
++{
++#ifdef REPORT_DEBUG_LOGS_TO_APP
++ #define MAX_WIRELESS_EVENT_SIZE 252
++ /*
++ * Break it up into chunks of MAX_WIRELESS_EVENT_SIZE bytes of messages.
++ * There seems to be a limitation on the length of message that could be
++ * transmitted to the user app via this mechanism.
++ */
++ A_UINT32 send, sent;
++
++ sent = 0;
++ send = dbglog_get_debug_fragment(&buffer[sent], length - sent,
++ MAX_WIRELESS_EVENT_SIZE);
++ while (send) {
++ ar6000_send_event_to_app(ar, WMIX_DBGLOG_EVENTID, &buffer[sent], send);
++ sent += send;
++ send = dbglog_get_debug_fragment(&buffer[sent], length - sent,
++ MAX_WIRELESS_EVENT_SIZE);
++ }
++#else
++ AR_DEBUG_PRINTF("Dropped logs: 0x%x\nDebug info length: %d\n",
++ dropped, length);
++
++ /* Interpret the debug logs */
++ dbglog_parse_debug_logs(buffer, length);
++#endif /* REPORT_DEBUG_LOGS_TO_APP */
++}
++
++
++
++static int __init
++ar6000_init_module(void)
++{
++ static int probed = 0;
++ A_STATUS status;
++ HTC_INIT_INFO initInfo;
++
++ A_MEMZERO(&initInfo,sizeof(initInfo));
++ initInfo.AddInstance = ar6000_avail_ev;
++ initInfo.DeleteInstance = ar6000_unavail_ev;
++ initInfo.TargetFailure = ar6000_target_failure;
++
++
++#ifdef DEBUG
++ /* Set the debug flags if specified at load time */
++ if(debugflags != 0)
++ {
++ g_dbg_flags = debugflags;
++ }
++#endif
++
++ if (probed) {
++ return -ENODEV;
++ }
++ probed++;
++
++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
++ memset(&aptcTR, 0, sizeof(APTC_TRAFFIC_RECORD));
++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
++
++#ifdef CONFIG_HOST_GPIO_SUPPORT
++ ar6000_gpio_init();
++#endif /* CONFIG_HOST_GPIO_SUPPORT */
++
++ status = HTCInit(&initInfo);
++ if(status != A_OK)
++ return -ENODEV;
++
++ return 0;
++}
++
++static void __exit
++ar6000_cleanup_module(void)
++{
++ int i = 0;
++ struct net_device *ar6000_netdev;
++
++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
++ /* Delete the Adaptive Power Control timer */
++ if (timer_pending(&aptcTimer)) {
++ del_timer_sync(&aptcTimer);
++ }
++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
++
++ for (i=0; i < MAX_AR6000; i++) {
++ if (ar6000_devices[i] != NULL) {
++ ar6000_netdev = ar6000_devices[i];
++ ar6000_devices[i] = NULL;
++ ar6000_destroy(ar6000_netdev, 1);
++ }
++ }
++
++ /* shutting down HTC will cause the HIF layer to detach from the
++ * underlying bus driver which will cause the subsequent deletion of
++ * all HIF and HTC instances */
++ HTCShutDown();
++
++ AR_DEBUG_PRINTF("ar6000_cleanup: success\n");
++}
++
++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
++void
++aptcTimerHandler(unsigned long arg)
++{
++ A_UINT32 numbytes;
++ A_UINT32 throughput;
++ AR_SOFTC_T *ar;
++ A_STATUS status;
++
++ ar = (AR_SOFTC_T *)arg;
++ A_ASSERT(ar != NULL);
++ A_ASSERT(!timer_pending(&aptcTimer));
++
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++
++ /* Get the number of bytes transferred */
++ numbytes = aptcTR.bytesTransmitted + aptcTR.bytesReceived;
++ aptcTR.bytesTransmitted = aptcTR.bytesReceived = 0;
++
++ /* Calculate and decide based on throughput thresholds */
++ throughput = ((numbytes * 8)/APTC_TRAFFIC_SAMPLING_INTERVAL); /* Kbps */
++ if (throughput < APTC_LOWER_THROUGHPUT_THRESHOLD) {
++ /* Enable Sleep and delete the timer */
++ A_ASSERT(ar->arWmiReady == TRUE);
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ status = wmi_powermode_cmd(ar->arWmi, REC_POWER);
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++ A_ASSERT(status == A_OK);
++ aptcTR.timerScheduled = FALSE;
++ } else {
++ A_TIMEOUT_MS(&aptcTimer, APTC_TRAFFIC_SAMPLING_INTERVAL, 0);
++ }
++
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++}
++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
++
++
++
++/* set HTC block size, assume BMI is already initialized */
++A_STATUS ar6000_SetHTCBlockSize(AR_SOFTC_T *ar)
++{
++ A_STATUS status;
++ A_UINT32 blocksizes[HTC_MAILBOX_NUM_MAX];
++
++ do {
++ /* get the block sizes */
++ status = HIFConfigureDevice(ar->arHifDevice, HIF_DEVICE_GET_MBOX_BLOCK_SIZE,
++ blocksizes, sizeof(blocksizes));
++
++ if (A_FAILED(status)) {
++ AR_DEBUG_PRINTF("Failed to get block size info from HIF layer...\n");
++ break;
++ }
++ /* note: we actually get the block size for mailbox 1, for SDIO the block
++ * size on mailbox 0 is artificially set to 1 */
++ /* must be a power of 2 */
++ A_ASSERT((blocksizes[1] & (blocksizes[1] - 1)) == 0);
++
++ /* set the host interest area for the block size */
++ status = BMIWriteMemory(ar->arHifDevice,
++ HOST_INTEREST_ITEM_ADDRESS(ar, hi_mbox_io_block_sz),
++ (A_UCHAR *)&blocksizes[1],
++ 4);
++
++ if (A_FAILED(status)) {
++ AR_DEBUG_PRINTF("BMIWriteMemory for IO block size failed \n");
++ break;
++ }
++
++ AR_DEBUG_PRINTF("Block Size Set: %d (target address:0x%X)\n",
++ blocksizes[1], HOST_INTEREST_ITEM_ADDRESS(ar, hi_mbox_io_block_sz));
++
++ /* set the host interest area for the mbox ISR yield limit */
++ status = BMIWriteMemory(ar->arHifDevice,
++ HOST_INTEREST_ITEM_ADDRESS(ar, hi_mbox_isr_yield_limit),
++ (A_UCHAR *)&mbox_yield_limit,
++ 4);
++
++ if (A_FAILED(status)) {
++ AR_DEBUG_PRINTF("BMIWriteMemory for yield limit failed \n");
++ break;
++ }
++
++ } while (FALSE);
++
++ return status;
++}
++
++/*
++ * HTC Event handlers
++ */
++static void
++ar6000_avail_ev(HTC_HANDLE HTCHandle)
++{
++ int i;
++ struct net_device *dev;
++ AR_SOFTC_T *ar;
++ int device_index = 0;
++
++ AR_DEBUG_PRINTF("ar6000_available\n");
++
++ for (i=0; i < MAX_AR6000; i++) {
++ if (ar6000_devices[i] == NULL) {
++ break;
++ }
++ }
++
++ if (i == MAX_AR6000) {
++ AR_DEBUG_PRINTF("ar6000_available: max devices reached\n");
++ return;
++ }
++
++ /* Save this. It gives a bit better readability especially since */
++ /* we use another local "i" variable below. */
++ device_index = i;
++
++ A_ASSERT(HTCHandle != NULL);
++
++ dev = alloc_etherdev(sizeof(AR_SOFTC_T));
++ if (dev == NULL) {
++ AR_DEBUG_PRINTF("ar6000_available: can't alloc etherdev\n");
++ return;
++ }
++
++ ether_setup(dev);
++
++ if (dev->priv == NULL) {
++ printk(KERN_CRIT "ar6000_available: Could not allocate memory\n");
++ return;
++ }
++
++ A_MEMZERO(dev->priv, sizeof(AR_SOFTC_T));
++
++ ar = (AR_SOFTC_T *)dev->priv;
++ ar->arNetDev = dev;
++ ar->arHtcTarget = HTCHandle;
++ ar->arHifDevice = HTCGetHifDevice(HTCHandle);
++ ar->arWlanState = WLAN_ENABLED;
++ ar->arRadioSwitch = WLAN_ENABLED;
++ ar->arDeviceIndex = device_index;
++
++ A_INIT_TIMER(&ar->arHBChallengeResp.timer, ar6000_detect_error, dev);
++ ar->arHBChallengeResp.seqNum = 0;
++ ar->arHBChallengeResp.outstanding = FALSE;
++ ar->arHBChallengeResp.missCnt = 0;
++ ar->arHBChallengeResp.frequency = AR6000_HB_CHALLENGE_RESP_FREQ_DEFAULT;
++ ar->arHBChallengeResp.missThres = AR6000_HB_CHALLENGE_RESP_MISS_THRES_DEFAULT;
++
++ ar6000_init_control_info(ar);
++ init_waitqueue_head(&arEvent);
++ sema_init(&ar->arSem, 1);
++
++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
++ A_INIT_TIMER(&aptcTimer, aptcTimerHandler, ar);
++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
++
++ /*
++ * If requested, perform some magic which requires no cooperation from
++ * the Target. It causes the Target to ignore flash and execute to the
++ * OS from ROM.
++ *
++ * This is intended to support recovery from a corrupted flash on Targets
++ * that support flash.
++ */
++ if (skipflash)
++ {
++ ar6000_reset_device_skipflash(ar->arHifDevice);
++ }
++
++ BMIInit();
++ {
++ struct bmi_target_info targ_info;
++
++ if (BMIGetTargetInfo(ar->arHifDevice, &targ_info) != A_OK) {
++ return;
++ }
++
++ ar->arVersion.target_ver = targ_info.target_ver;
++ ar->arTargetType = targ_info.target_type;
++ }
++
++ if (enableuartprint) {
++ A_UINT32 param;
++ param = 1;
++ if (BMIWriteMemory(ar->arHifDevice,
++ HOST_INTEREST_ITEM_ADDRESS(ar, hi_serial_enable),
++ (A_UCHAR *)¶m,
++ 4)!= A_OK)
++ {
++ AR_DEBUG_PRINTF("BMIWriteMemory for enableuartprint failed \n");
++ return ;
++ }
++ AR_DEBUG_PRINTF("Serial console prints enabled\n");
++ }
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++ if(testmode) {
++ ar->arTargetMode = AR6000_TCMD_MODE;
++ }else {
++ ar->arTargetMode = AR6000_WLAN_MODE;
++ }
++#endif
++ if (enabletimerwar) {
++ A_UINT32 param;
++
++ if (BMIReadMemory(ar->arHifDevice,
++ HOST_INTEREST_ITEM_ADDRESS(ar, hi_option_flag),
++ (A_UCHAR *)¶m,
++ 4)!= A_OK)
++ {
++ AR_DEBUG_PRINTF("BMIReadMemory for enabletimerwar failed \n");
++ return;
++ }
++
++ param |= HI_OPTION_TIMER_WAR;
++
++ if (BMIWriteMemory(ar->arHifDevice,
++ HOST_INTEREST_ITEM_ADDRESS(ar, hi_option_flag),
++ (A_UCHAR *)¶m,
++ 4) != A_OK)
++ {
++ AR_DEBUG_PRINTF("BMIWriteMemory for enabletimerwar failed \n");
++ return;
++ }
++ AR_DEBUG_PRINTF("Timer WAR enabled\n");
++ }
++
++
++ /* since BMIInit is called in the driver layer, we have to set the block
++ * size here for the target */
++
++ if (A_FAILED(ar6000_SetHTCBlockSize(ar))) {
++ return;
++ }
++
++ spin_lock_init(&ar->arLock);
++
++ /* Don't install the init function if BMI is requested */
++ if(!bmienable)
++ {
++ dev->init = ar6000_init;
++ } else {
++ AR_DEBUG_PRINTF(" BMI enabled \n");
++ }
++
++ dev->open = &ar6000_open;
++ dev->stop = &ar6000_close;
++ dev->hard_start_xmit = &ar6000_data_tx;
++ dev->get_stats = &ar6000_get_stats;
++
++ /* dev->tx_timeout = ar6000_tx_timeout; */
++ dev->do_ioctl = &ar6000_ioctl;
++ dev->watchdog_timeo = AR6000_TX_TIMEOUT;
++ ar6000_ioctl_iwsetup(&ath_iw_handler_def);
++ dev->wireless_handlers = &ath_iw_handler_def;
++ ath_iw_handler_def.get_wireless_stats = ar6000_get_iwstats; /*Displayed via proc fs */
++
++ /*
++ * We need the OS to provide us with more headroom in order to
++ * perform dix to 802.3, WMI header encap, and the HTC header
++ */
++ dev->hard_header_len = ETH_HLEN + sizeof(ATH_LLC_SNAP_HDR) +
++ sizeof(WMI_DATA_HDR) + HTC_HEADER_LEN;
++
++ /* This runs the init function */
++ SET_NETDEV_DEV(dev, HIFGetOSDevice(ar->arHifDevice));
++ if (register_netdev(dev)) {
++ AR_DEBUG_PRINTF("ar6000_avail: register_netdev failed\n");
++ ar6000_destroy(dev, 0);
++ return;
++ }
++
++ HTCSetInstance(ar->arHtcTarget, ar);
++
++ /* We only register the device in the global list if we succeed. */
++ /* If the device is in the global list, it will be destroyed */
++ /* when the module is unloaded. */
++ ar6000_devices[device_index] = dev;
++
++ AR_DEBUG_PRINTF("ar6000_avail: name=%s htcTarget=0x%x, dev=0x%x (%d), ar=0x%x\n",
++ dev->name, (A_UINT32)HTCHandle, (A_UINT32)dev, device_index,
++ (A_UINT32)ar);
++}
++
++static void ar6000_target_failure(void *Instance, A_STATUS Status)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Instance;
++ WMI_TARGET_ERROR_REPORT_EVENT errEvent;
++ static A_BOOL sip = FALSE;
++
++ if (Status != A_OK) {
++ if (timer_pending(&ar->arHBChallengeResp.timer)) {
++ A_UNTIMEOUT(&ar->arHBChallengeResp.timer);
++ }
++
++ /* try dumping target assertion information (if any) */
++ ar6000_dump_target_assert_info(ar->arHifDevice,ar->arTargetType);
++
++ /*
++ * Fetch the logs from the target via the diagnostic
++ * window.
++ */
++ ar6000_dbglog_get_debug_logs(ar);
++
++ /* Report the error only once */
++ if (!sip) {
++ sip = TRUE;
++ errEvent.errorVal = WMI_TARGET_COM_ERR |
++ WMI_TARGET_FATAL_ERR;
++#ifdef SEND_EVENT_TO_APP
++ ar6000_send_event_to_app(ar, WMI_ERROR_REPORT_EVENTID,
++ (A_UINT8 *)&errEvent,
++ sizeof(WMI_TARGET_ERROR_REPORT_EVENT));
++#endif
++ }
++ }
++}
++
++static void
++ar6000_unavail_ev(void *Instance)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Instance;
++ /* NULL out it's entry in the global list */
++ ar6000_devices[ar->arDeviceIndex] = NULL;
++ ar6000_destroy(ar->arNetDev, 1);
++}
++
++/*
++ * We need to differentiate between the surprise and planned removal of the
++ * device because of the following consideration:
++ * - In case of surprise removal, the hcd already frees up the pending
++ * for the device and hence there is no need to unregister the function
++ * driver inorder to get these requests. For planned removal, the function
++ * driver has to explictly unregister itself to have the hcd return all the
++ * pending requests before the data structures for the devices are freed up.
++ * Note that as per the current implementation, the function driver will
++ * end up releasing all the devices since there is no API to selectively
++ * release a particular device.
++ * - Certain commands issued to the target can be skipped for surprise
++ * removal since they will anyway not go through.
++ */
++static void
++ar6000_destroy(struct net_device *dev, unsigned int unregister)
++{
++ AR_SOFTC_T *ar;
++
++ AR_DEBUG_PRINTF("+ar6000_destroy \n");
++
++ if((dev == NULL) || ((ar = netdev_priv(dev)) == NULL))
++ {
++ AR_DEBUG_PRINTF("%s(): Failed to get device structure.\n", __func__);
++ return;
++ }
++
++ /* Stop the transmit queues */
++ netif_stop_queue(dev);
++
++ /* Disable the target and the interrupts associated with it */
++ if (ar->arWmiReady == TRUE)
++ {
++ if (!bypasswmi)
++ {
++ if (ar->arConnected == TRUE || ar->arConnectPending == TRUE)
++ {
++ AR_DEBUG_PRINTF("%s(): Disconnect\n", __func__);
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++ ar6000_init_profile_info(ar);
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ wmi_disconnect_cmd(ar->arWmi);
++ }
++
++ ar6000_dbglog_get_debug_logs(ar);
++ ar->arWmiReady = FALSE;
++ ar->arConnected = FALSE;
++ ar->arConnectPending = FALSE;
++ wmi_shutdown(ar->arWmi);
++ ar->arWmiEnabled = FALSE;
++ ar->arWmi = NULL;
++ ar->arWlanState = WLAN_ENABLED;
++#ifdef USER_KEYS
++ ar->user_savedkeys_stat = USER_SAVEDKEYS_STAT_INIT;
++ ar->user_key_ctrl = 0;
++#endif
++ }
++
++ AR_DEBUG_PRINTF("%s(): WMI stopped\n", __func__);
++ }
++ else
++ {
++ AR_DEBUG_PRINTF("%s(): WMI not ready 0x%08x 0x%08x\n",
++ __func__, (unsigned int) ar, (unsigned int) ar->arWmi);
++
++ /* Shut down WMI if we have started it */
++ if(ar->arWmiEnabled == TRUE)
++ {
++ AR_DEBUG_PRINTF("%s(): Shut down WMI\n", __func__);
++ wmi_shutdown(ar->arWmi);
++ ar->arWmiEnabled = FALSE;
++ ar->arWmi = NULL;
++ }
++ }
++
++ /* stop HTC */
++ HTCStop(ar->arHtcTarget);
++
++ /* set the instance to NULL so we do not get called back on remove incase we
++ * we're explicity destroyed by module unload */
++ HTCSetInstance(ar->arHtcTarget, NULL);
++
++ if (resetok) {
++ /* try to reset the device if we can
++ * The driver may have been configure NOT to reset the target during
++ * a debug session */
++ AR_DEBUG_PRINTF(" Attempting to reset target on instance destroy.... \n");
++ ar6000_reset_device(ar->arHifDevice, ar->arTargetType);
++ } else {
++ AR_DEBUG_PRINTF(" Host does not want target reset. \n");
++ }
++
++ /* Done with cookies */
++ ar6000_cookie_cleanup(ar);
++
++ /* Cleanup BMI */
++ BMIInit();
++
++ /* Clear the tx counters */
++ memset(tx_attempt, 0, sizeof(tx_attempt));
++ memset(tx_post, 0, sizeof(tx_post));
++ memset(tx_complete, 0, sizeof(tx_complete));
++
++
++ /* Free up the device data structure */
++ if (unregister)
++ unregister_netdev(dev);
++#ifndef free_netdev
++ kfree(dev);
++#else
++ free_netdev(dev);
++#endif
++
++ AR_DEBUG_PRINTF("-ar6000_destroy \n");
++}
++
++static void ar6000_detect_error(unsigned long ptr)
++{
++ struct net_device *dev = (struct net_device *)ptr;
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_TARGET_ERROR_REPORT_EVENT errEvent;
++
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++
++ if (ar->arHBChallengeResp.outstanding) {
++ ar->arHBChallengeResp.missCnt++;
++ } else {
++ ar->arHBChallengeResp.missCnt = 0;
++ }
++
++ if (ar->arHBChallengeResp.missCnt > ar->arHBChallengeResp.missThres) {
++ /* Send Error Detect event to the application layer and do not reschedule the error detection module timer */
++ ar->arHBChallengeResp.missCnt = 0;
++ ar->arHBChallengeResp.seqNum = 0;
++ errEvent.errorVal = WMI_TARGET_COM_ERR | WMI_TARGET_FATAL_ERR;
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++#ifdef SEND_EVENT_TO_APP
++ ar6000_send_event_to_app(ar, WMI_ERROR_REPORT_EVENTID,
++ (A_UINT8 *)&errEvent,
++ sizeof(WMI_TARGET_ERROR_REPORT_EVENT));
++#endif
++ return;
++ }
++
++ /* Generate the sequence number for the next challenge */
++ ar->arHBChallengeResp.seqNum++;
++ ar->arHBChallengeResp.outstanding = TRUE;
++
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++
++ /* Send the challenge on the control channel */
++ if (wmi_get_challenge_resp_cmd(ar->arWmi, ar->arHBChallengeResp.seqNum, DRV_HB_CHALLENGE) != A_OK) {
++ AR_DEBUG_PRINTF("Unable to send heart beat challenge\n");
++ }
++
++
++ /* Reschedule the timer for the next challenge */
++ A_TIMEOUT_MS(&ar->arHBChallengeResp.timer, ar->arHBChallengeResp.frequency * 1000, 0);
++}
++
++void ar6000_init_profile_info(AR_SOFTC_T *ar)
++{
++ ar->arSsidLen = 0;
++ A_MEMZERO(ar->arSsid, sizeof(ar->arSsid));
++ ar->arNetworkType = INFRA_NETWORK;
++ ar->arDot11AuthMode = OPEN_AUTH;
++ ar->arAuthMode = NONE_AUTH;
++ ar->arPairwiseCrypto = NONE_CRYPT;
++ ar->arPairwiseCryptoLen = 0;
++ ar->arGroupCrypto = NONE_CRYPT;
++ ar->arGroupCryptoLen = 0;
++ A_MEMZERO(ar->arWepKeyList, sizeof(ar->arWepKeyList));
++ A_MEMZERO(ar->arReqBssid, sizeof(ar->arReqBssid));
++ A_MEMZERO(ar->arBssid, sizeof(ar->arBssid));
++ ar->arBssChannel = 0;
++}
++
++static void
++ar6000_init_control_info(AR_SOFTC_T *ar)
++{
++ ar->arWmiEnabled = FALSE;
++ ar6000_init_profile_info(ar);
++ ar->arDefTxKeyIndex = 0;
++ A_MEMZERO(ar->arWepKeyList, sizeof(ar->arWepKeyList));
++ ar->arChannelHint = 0;
++ ar->arListenInterval = MAX_LISTEN_INTERVAL;
++ ar->arVersion.host_ver = AR6K_SW_VERSION;
++ ar->arRssi = 0;
++ ar->arTxPwr = 0;
++ ar->arTxPwrSet = FALSE;
++ ar->arSkipScan = 0;
++ ar->arBeaconInterval = 0;
++ ar->arBitRate = 0;
++ ar->arMaxRetries = 0;
++ ar->arWmmEnabled = TRUE;
++}
++
++static int
++ar6000_open(struct net_device *dev)
++{
++ /* Wake up the queues */
++ netif_wake_queue(dev);
++
++ return 0;
++}
++
++static int
++ar6000_close(struct net_device *dev)
++{
++ netif_stop_queue(dev);
++
++ return 0;
++}
++
++/* connect to a service */
++static A_STATUS ar6000_connectservice(AR_SOFTC_T *ar,
++ HTC_SERVICE_CONNECT_REQ *pConnect,
++ WMI_PRI_STREAM_ID WmiStreamID,
++ char *pDesc)
++{
++ A_STATUS status;
++ HTC_SERVICE_CONNECT_RESP response;
++
++ do {
++
++ A_MEMZERO(&response,sizeof(response));
++
++ status = HTCConnectService(ar->arHtcTarget,
++ pConnect,
++ &response);
++
++ if (A_FAILED(status)) {
++ AR_DEBUG_PRINTF(" Failed to connect to %s service status:%d \n", pDesc, status);
++ break;
++ }
++
++ if (WmiStreamID == WMI_NOT_MAPPED) {
++ /* done */
++ break;
++ }
++
++ /* set endpoint mapping for the WMI stream in the driver layer */
++ arSetWMIStream2EndpointIDMap(ar,WmiStreamID,response.Endpoint);
++
++ } while (FALSE);
++
++ return status;
++}
++
++static void ar6000_TxDataCleanup(AR_SOFTC_T *ar)
++{
++ /* flush all the data (non-control) streams
++ * we only flush packets that are tagged as data, we leave any control packets that
++ * were in the TX queues alone */
++ HTCFlushEndpoint(ar->arHtcTarget,
++ arWMIStream2EndpointID(ar,WMI_BEST_EFFORT_PRI),
++ AR6K_DATA_PKT_TAG);
++ HTCFlushEndpoint(ar->arHtcTarget,
++ arWMIStream2EndpointID(ar,WMI_LOW_PRI),
++ AR6K_DATA_PKT_TAG);
++ HTCFlushEndpoint(ar->arHtcTarget,
++ arWMIStream2EndpointID(ar,WMI_HIGH_PRI),
++ AR6K_DATA_PKT_TAG);
++ HTCFlushEndpoint(ar->arHtcTarget,
++ arWMIStream2EndpointID(ar,WMI_HIGHEST_PRI),
++ AR6K_DATA_PKT_TAG);
++}
++
++/* This function does one time initialization for the lifetime of the device */
++int ar6000_init(struct net_device *dev)
++{
++ AR_SOFTC_T *ar;
++ A_STATUS status;
++ A_INT32 timeleft;
++
++ if((ar = netdev_priv(dev)) == NULL)
++ {
++ return(-EIO);
++ }
++
++ /* Do we need to finish the BMI phase */
++ if(BMIDone(ar->arHifDevice) != A_OK)
++ {
++ return -EIO;
++ }
++
++ if (!bypasswmi)
++ {
++#if 0 /* TBDXXX */
++ if (ar->arVersion.host_ver != ar->arVersion.target_ver) {
++ A_PRINTF("WARNING: Host version 0x%x does not match Target "
++ " version 0x%x!\n",
++ ar->arVersion.host_ver, ar->arVersion.target_ver);
++ }
++#endif
++
++ /* Indicate that WMI is enabled (although not ready yet) */
++ ar->arWmiEnabled = TRUE;
++ if ((ar->arWmi = wmi_init((void *) ar)) == NULL)
++ {
++ AR_DEBUG_PRINTF("%s() Failed to initialize WMI.\n", __func__);
++ return(-EIO);
++ }
++
++ AR_DEBUG_PRINTF("%s() Got WMI @ 0x%08x.\n", __func__,
++ (unsigned int) ar->arWmi);
++ }
++
++ do {
++ HTC_SERVICE_CONNECT_REQ connect;
++
++ /* the reason we have to wait for the target here is that the driver layer
++ * has to init BMI in order to set the host block size,
++ */
++ status = HTCWaitTarget(ar->arHtcTarget);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ A_MEMZERO(&connect,sizeof(connect));
++ /* meta data is unused for now */
++ connect.pMetaData = NULL;
++ connect.MetaDataLength = 0;
++ /* these fields are the same for all service endpoints */
++ connect.EpCallbacks.pContext = ar;
++ connect.EpCallbacks.EpTxComplete = ar6000_tx_complete;
++ connect.EpCallbacks.EpRecv = ar6000_rx;
++ connect.EpCallbacks.EpRecvRefill = ar6000_rx_refill;
++ connect.EpCallbacks.EpSendFull = ar6000_tx_queue_full;
++ /* set the max queue depth so that our ar6000_tx_queue_full handler gets called.
++ * Linux has the peculiarity of not providing flow control between the
++ * NIC and the network stack. There is no API to indicate that a TX packet
++ * was sent which could provide some back pressure to the network stack.
++ * Under linux you would have to wait till the network stack consumed all sk_buffs
++ * before any back-flow kicked in. Which isn't very friendly.
++ * So we have to manage this ourselves */
++ connect.MaxSendQueueDepth = 32;
++
++ /* connect to control service */
++ connect.ServiceID = WMI_CONTROL_SVC;
++ status = ar6000_connectservice(ar,
++ &connect,
++ WMI_CONTROL_PRI,
++ "WMI CONTROL");
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ /* for the remaining data services set the connection flag to reduce dribbling,
++ * if configured to do so */
++ if (reduce_credit_dribble) {
++ connect.ConnectionFlags |= HTC_CONNECT_FLAGS_REDUCE_CREDIT_DRIBBLE;
++ /* the credit dribble trigger threshold is (reduce_credit_dribble - 1) for a value
++ * of 0-3 */
++ connect.ConnectionFlags &= ~HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_MASK;
++ connect.ConnectionFlags |=
++ ((A_UINT16)reduce_credit_dribble - 1) & HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_MASK;
++ }
++ /* connect to best-effort service */
++ connect.ServiceID = WMI_DATA_BE_SVC;
++
++ status = ar6000_connectservice(ar,
++ &connect,
++ WMI_BEST_EFFORT_PRI,
++ "WMI DATA BE");
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ /* connect to back-ground
++ * map this to WMI LOW_PRI */
++ connect.ServiceID = WMI_DATA_BK_SVC;
++ status = ar6000_connectservice(ar,
++ &connect,
++ WMI_LOW_PRI,
++ "WMI DATA BK");
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ /* connect to Video service, map this to
++ * to HI PRI */
++ connect.ServiceID = WMI_DATA_VI_SVC;
++ status = ar6000_connectservice(ar,
++ &connect,
++ WMI_HIGH_PRI,
++ "WMI DATA VI");
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ /* connect to VO service, this is currently not
++ * mapped to a WMI priority stream due to historical reasons.
++ * WMI originally defined 3 priorities over 3 mailboxes
++ * We can change this when WMI is reworked so that priorities are not
++ * dependent on mailboxes */
++ connect.ServiceID = WMI_DATA_VO_SVC;
++ status = ar6000_connectservice(ar,
++ &connect,
++ WMI_HIGHEST_PRI,
++ "WMI DATA VO");
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ A_ASSERT(arWMIStream2EndpointID(ar,WMI_CONTROL_PRI) != 0);
++ A_ASSERT(arWMIStream2EndpointID(ar,WMI_BEST_EFFORT_PRI) != 0);
++ A_ASSERT(arWMIStream2EndpointID(ar,WMI_LOW_PRI) != 0);
++ A_ASSERT(arWMIStream2EndpointID(ar,WMI_HIGH_PRI) != 0);
++ A_ASSERT(arWMIStream2EndpointID(ar,WMI_HIGHEST_PRI) != 0);
++ } while (FALSE);
++
++ if (A_FAILED(status)) {
++ return (-EIO);
++ }
++
++ /*
++ * give our connected endpoints some buffers
++ */
++ ar6000_rx_refill(ar, arWMIStream2EndpointID(ar,WMI_CONTROL_PRI));
++
++ ar6000_rx_refill(ar, arWMIStream2EndpointID(ar,WMI_BEST_EFFORT_PRI));
++
++ /*
++ * We will post the receive buffers only for SPE testing and so we are
++ * making it conditional on the 'bypasswmi' flag.
++ */
++ if (bypasswmi) {
++ ar6000_rx_refill(ar,arWMIStream2EndpointID(ar,WMI_LOW_PRI));
++ ar6000_rx_refill(ar,arWMIStream2EndpointID(ar,WMI_HIGH_PRI));
++ }
++
++ /* setup credit distribution */
++ ar6000_setup_credit_dist(ar->arHtcTarget, &ar->arCreditStateInfo);
++
++ /* Since cookies are used for HTC transports, they should be */
++ /* initialized prior to enabling HTC. */
++ ar6000_cookie_init(ar);
++
++ /* start HTC */
++ status = HTCStart(ar->arHtcTarget);
++
++ if (status != A_OK) {
++ if (ar->arWmiEnabled == TRUE) {
++ wmi_shutdown(ar->arWmi);
++ ar->arWmiEnabled = FALSE;
++ ar->arWmi = NULL;
++ }
++ ar6000_cookie_cleanup(ar);
++ return -EIO;
++ }
++
++ if (!bypasswmi) {
++ /* Wait for Wmi event to be ready */
++ timeleft = wait_event_interruptible_timeout(arEvent,
++ (ar->arWmiReady == TRUE), wmitimeout * HZ);
++
++ if(!timeleft || signal_pending(current))
++ {
++ AR_DEBUG_PRINTF("WMI is not ready or wait was interrupted\n");
++#if defined(DWSIM) /* TBDXXX */
++ AR_DEBUG_PRINTF(".....but proceed anyway.\n");
++#else
++ return -EIO;
++#endif
++ }
++
++ AR_DEBUG_PRINTF("%s() WMI is ready\n", __func__);
++
++ /* Communicate the wmi protocol verision to the target */
++ if ((ar6000_set_host_app_area(ar)) != A_OK) {
++ AR_DEBUG_PRINTF("Unable to set the host app area\n");
++ }
++ }
++
++ ar->arNumDataEndPts = 1;
++
++ return(0);
++}
++
++
++void
++ar6000_bitrate_rx(void *devt, A_INT32 rateKbps)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
++
++ ar->arBitRate = rateKbps;
++ wake_up(&arEvent);
++}
++
++void
++ar6000_ratemask_rx(void *devt, A_UINT16 ratemask)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
++
++ ar->arRateMask = ratemask;
++ wake_up(&arEvent);
++}
++
++void
++ar6000_txPwr_rx(void *devt, A_UINT8 txPwr)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
++
++ ar->arTxPwr = txPwr;
++ wake_up(&arEvent);
++}
++
++
++void
++ar6000_channelList_rx(void *devt, A_INT8 numChan, A_UINT16 *chanList)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
++
++ A_MEMCPY(ar->arChannelList, chanList, numChan * sizeof (A_UINT16));
++ ar->arNumChannels = numChan;
++
++ wake_up(&arEvent);
++}
++
++A_UINT8
++ar6000_ibss_map_epid(struct sk_buff *skb, struct net_device *dev, A_UINT32 * mapNo)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ A_UINT8 *datap;
++ ATH_MAC_HDR *macHdr;
++ A_UINT32 i, eptMap;
++
++ (*mapNo) = 0;
++ datap = A_NETBUF_DATA(skb);
++ macHdr = (ATH_MAC_HDR *)(datap + sizeof(WMI_DATA_HDR));
++ if (IEEE80211_IS_MULTICAST(macHdr->dstMac)) {
++ return ENDPOINT_2;
++ }
++
++ eptMap = -1;
++ for (i = 0; i < ar->arNodeNum; i ++) {
++ if (IEEE80211_ADDR_EQ(macHdr->dstMac, ar->arNodeMap[i].macAddress)) {
++ (*mapNo) = i + 1;
++ ar->arNodeMap[i].txPending ++;
++ return ar->arNodeMap[i].epId;
++ }
++
++ if ((eptMap == -1) && !ar->arNodeMap[i].txPending) {
++ eptMap = i;
++ }
++ }
++
++ if (eptMap == -1) {
++ eptMap = ar->arNodeNum;
++ ar->arNodeNum ++;
++ A_ASSERT(ar->arNodeNum <= MAX_NODE_NUM);
++ }
++
++ A_MEMCPY(ar->arNodeMap[eptMap].macAddress, macHdr->dstMac, IEEE80211_ADDR_LEN);
++
++ for (i = ENDPOINT_2; i <= ENDPOINT_5; i ++) {
++ if (!ar->arTxPending[i]) {
++ ar->arNodeMap[eptMap].epId = i;
++ break;
++ }
++ // No free endpoint is available, start redistribution on the inuse endpoints.
++ if (i == ENDPOINT_5) {
++ ar->arNodeMap[eptMap].epId = ar->arNexEpId;
++ ar->arNexEpId ++;
++ if (ar->arNexEpId > ENDPOINT_5) {
++ ar->arNexEpId = ENDPOINT_2;
++ }
++ }
++ }
++
++ (*mapNo) = eptMap + 1;
++ ar->arNodeMap[eptMap].txPending ++;
++
++ return ar->arNodeMap[eptMap].epId;
++}
++
++#ifdef DEBUG
++static void ar6000_dump_skb(struct sk_buff *skb)
++{
++ u_char *ch;
++ for (ch = A_NETBUF_DATA(skb);
++ (A_UINT32)ch < ((A_UINT32)A_NETBUF_DATA(skb) +
++ A_NETBUF_LEN(skb)); ch++)
++ {
++ AR_DEBUG_PRINTF("%2.2x ", *ch);
++ }
++ AR_DEBUG_PRINTF("\n");
++}
++#endif
++
++static int
++ar6000_data_tx(struct sk_buff *skb, struct net_device *dev)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_PRI_STREAM_ID streamID = WMI_NOT_MAPPED;
++ A_UINT32 mapNo = 0;
++ int len;
++ struct ar_cookie *cookie;
++ A_BOOL checkAdHocPsMapping = FALSE;
++
++#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13)
++ skb->list = NULL;
++#endif
++
++ AR_DEBUG2_PRINTF("ar6000_data_tx start - skb=0x%x, data=0x%x, len=0x%x\n",
++ (A_UINT32)skb, (A_UINT32)A_NETBUF_DATA(skb),
++ A_NETBUF_LEN(skb));
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++ /* TCMD doesnt support any data, free the buf and return */
++ if(ar->arTargetMode == AR6000_TCMD_MODE) {
++ A_NETBUF_FREE(skb);
++ return 0;
++ }
++#endif
++ do {
++
++ if (ar->arWmiReady == FALSE && bypasswmi == 0) {
++ break;
++ }
++
++#ifdef BLOCK_TX_PATH_FLAG
++ if (blocktx) {
++ break;
++ }
++#endif /* BLOCK_TX_PATH_FLAG */
++
++ if (ar->arWmiEnabled) {
++ if (A_NETBUF_HEADROOM(skb) < dev->hard_header_len) {
++ struct sk_buff *newbuf;
++ /*
++ * We really should have gotten enough headroom but sometimes
++ * we still get packets with not enough headroom. Copy the packet.
++ */
++ len = A_NETBUF_LEN(skb);
++ newbuf = A_NETBUF_ALLOC(len);
++ if (newbuf == NULL) {
++ break;
++ }
++ A_NETBUF_PUT(newbuf, len);
++ A_MEMCPY(A_NETBUF_DATA(newbuf), A_NETBUF_DATA(skb), len);
++ A_NETBUF_FREE(skb);
++ skb = newbuf;
++ /* fall through and assemble header */
++ }
++
++ if (wmi_dix_2_dot3(ar->arWmi, skb) != A_OK) {
++ AR_DEBUG_PRINTF("ar6000_data_tx - wmi_dix_2_dot3 failed\n");
++ break;
++ }
++
++ if (wmi_data_hdr_add(ar->arWmi, skb, DATA_MSGTYPE) != A_OK) {
++ AR_DEBUG_PRINTF("ar6000_data_tx - wmi_data_hdr_add failed\n");
++ break;
++ }
++
++ if ((ar->arNetworkType == ADHOC_NETWORK) &&
++ ar->arIbssPsEnable && ar->arConnected) {
++ /* flag to check adhoc mapping once we take the lock below: */
++ checkAdHocPsMapping = TRUE;
++
++ } else {
++ /* get the stream mapping */
++ if (ar->arWmmEnabled) {
++ streamID = wmi_get_stream_id(ar->arWmi,
++ wmi_implicit_create_pstream(ar->arWmi, skb, UPLINK_TRAFFIC, UNDEFINED_PRI));
++ } else {
++ streamID = WMI_BEST_EFFORT_PRI;
++ }
++ }
++
++ } else {
++ struct iphdr *ipHdr;
++ /*
++ * the endpoint is directly based on the TOS field in the IP
++ * header **** only for testing ******
++ */
++ ipHdr = A_NETBUF_DATA(skb) + sizeof(ATH_MAC_HDR);
++ /* here we map the TOS field to an endpoint number, this is for
++ * the endpointping test application */
++ streamID = IP_TOS_TO_WMI_PRI(ipHdr->tos);
++ }
++
++ } while (FALSE);
++
++ /* did we succeed ? */
++ if ((streamID == WMI_NOT_MAPPED) && !checkAdHocPsMapping) {
++ /* cleanup and exit */
++ A_NETBUF_FREE(skb);
++ AR6000_STAT_INC(ar, tx_dropped);
++ AR6000_STAT_INC(ar, tx_aborted_errors);
++ return 0;
++ }
++
++ cookie = NULL;
++
++ /* take the lock to protect driver data */
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++
++ do {
++
++ if (checkAdHocPsMapping) {
++ streamID = ar6000_ibss_map_epid(skb, dev, &mapNo);
++ }
++
++ A_ASSERT(streamID != WMI_NOT_MAPPED);
++
++ /* validate that the endpoint is connected */
++ if (arWMIStream2EndpointID(ar,streamID) == 0) {
++ AR_DEBUG_PRINTF("Stream %d is NOT mapped!\n",streamID);
++ break;
++ }
++ /* allocate resource for this packet */
++ cookie = ar6000_alloc_cookie(ar);
++
++ if (cookie != NULL) {
++ /* update counts while the lock is held */
++ ar->arTxPending[streamID]++;
++ ar->arTotalTxDataPending++;
++ }
++
++ } while (FALSE);
++
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++
++ if (cookie != NULL) {
++ cookie->arc_bp[0] = (A_UINT32)skb;
++ cookie->arc_bp[1] = mapNo;
++ SET_HTC_PACKET_INFO_TX(&cookie->HtcPkt,
++ cookie,
++ A_NETBUF_DATA(skb),
++ A_NETBUF_LEN(skb),
++ arWMIStream2EndpointID(ar,streamID),
++ AR6K_DATA_PKT_TAG);
++
++#ifdef DEBUG
++ if (debugdriver >= 3) {
++ ar6000_dump_skb(skb);
++ }
++#endif
++ /* HTC interface is asynchronous, if this fails, cleanup will happen in
++ * the ar6000_tx_complete callback */
++ HTCSendPkt(ar->arHtcTarget, &cookie->HtcPkt);
++ } else {
++ /* no packet to send, cleanup */
++ A_NETBUF_FREE(skb);
++ AR6000_STAT_INC(ar, tx_dropped);
++ AR6000_STAT_INC(ar, tx_aborted_errors);
++ }
++
++ return 0;
++}
++
++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
++static void
++tvsub(register struct timeval *out, register struct timeval *in)
++{
++ if((out->tv_usec -= in->tv_usec) < 0) {
++ out->tv_sec--;
++ out->tv_usec += 1000000;
++ }
++ out->tv_sec -= in->tv_sec;
++}
++
++void
++applyAPTCHeuristics(AR_SOFTC_T *ar)
++{
++ A_UINT32 duration;
++ A_UINT32 numbytes;
++ A_UINT32 throughput;
++ struct timeval ts;
++ A_STATUS status;
++
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++
++ if ((enableAPTCHeuristics) && (!aptcTR.timerScheduled)) {
++ do_gettimeofday(&ts);
++ tvsub(&ts, &aptcTR.samplingTS);
++ duration = ts.tv_sec * 1000 + ts.tv_usec / 1000; /* ms */
++ numbytes = aptcTR.bytesTransmitted + aptcTR.bytesReceived;
++
++ if (duration > APTC_TRAFFIC_SAMPLING_INTERVAL) {
++ /* Initialize the time stamp and byte count */
++ aptcTR.bytesTransmitted = aptcTR.bytesReceived = 0;
++ do_gettimeofday(&aptcTR.samplingTS);
++
++ /* Calculate and decide based on throughput thresholds */
++ throughput = ((numbytes * 8) / duration);
++ if (throughput > APTC_UPPER_THROUGHPUT_THRESHOLD) {
++ /* Disable Sleep and schedule a timer */
++ A_ASSERT(ar->arWmiReady == TRUE);
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ status = wmi_powermode_cmd(ar->arWmi, MAX_PERF_POWER);
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++ A_TIMEOUT_MS(&aptcTimer, APTC_TRAFFIC_SAMPLING_INTERVAL, 0);
++ aptcTR.timerScheduled = TRUE;
++ }
++ }
++ }
++
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++}
++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
++
++static void ar6000_tx_queue_full(void *Context, HTC_ENDPOINT_ID Endpoint)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Context;
++
++
++ if (Endpoint == arWMIStream2EndpointID(ar,WMI_CONTROL_PRI)) {
++ if (!bypasswmi) {
++ /* under normal WMI if this is getting full, then something is running rampant
++ * the host should not be exhausting the WMI queue with too many commands
++ * the only exception to this is during testing using endpointping */
++
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++ /* set flag to handle subsequent messages */
++ ar->arWMIControlEpFull = TRUE;
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ AR_DEBUG_PRINTF("WMI Control Endpoint is FULL!!! \n");
++ }
++ } else {
++
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++ ar->arNetQueueStopped = TRUE;
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ /* one of the data endpoints queues is getting full..need to stop network stack
++ * the queue will resume in ar6000_tx_complete() */
++ netif_stop_queue(ar->arNetDev);
++ }
++
++
++}
++
++
++static void
++ar6000_tx_complete(void *Context, HTC_PACKET *pPacket)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Context;
++ void *cookie = (void *)pPacket->pPktContext;
++ struct sk_buff *skb = NULL;
++ A_UINT32 mapNo = 0;
++ A_STATUS status;
++ struct ar_cookie * ar_cookie;
++ WMI_PRI_STREAM_ID streamID;
++ A_BOOL wakeEvent = FALSE;
++
++ status = pPacket->Status;
++ ar_cookie = (struct ar_cookie *)cookie;
++ skb = (struct sk_buff *)ar_cookie->arc_bp[0];
++ streamID = arEndpoint2WMIStreamID(ar,pPacket->Endpoint);
++ mapNo = ar_cookie->arc_bp[1];
++
++ A_ASSERT(skb);
++ A_ASSERT(pPacket->pBuffer == A_NETBUF_DATA(skb));
++
++ if (A_SUCCESS(status)) {
++ A_ASSERT(pPacket->ActualLength == A_NETBUF_LEN(skb));
++ }
++
++ AR_DEBUG2_PRINTF("ar6000_tx_complete skb=0x%x data=0x%x len=0x%x sid=%d ",
++ (A_UINT32)skb, (A_UINT32)pPacket->pBuffer,
++ pPacket->ActualLength,
++ streamID);
++
++ /* lock the driver as we update internal state */
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++
++ ar->arTxPending[streamID]--;
++
++ if ((streamID != WMI_CONTROL_PRI) || bypasswmi) {
++ ar->arTotalTxDataPending--;
++ }
++
++ if (streamID == WMI_CONTROL_PRI)
++ {
++ if (ar->arWMIControlEpFull) {
++ /* since this packet completed, the WMI EP is no longer full */
++ ar->arWMIControlEpFull = FALSE;
++ }
++
++ if (ar->arTxPending[streamID] == 0) {
++ wakeEvent = TRUE;
++ }
++ }
++
++ if (A_FAILED(status)) {
++ AR_DEBUG_PRINTF("%s() -TX ERROR, status: 0x%x\n", __func__,
++ status);
++ AR6000_STAT_INC(ar, tx_errors);
++ } else {
++ AR_DEBUG2_PRINTF("OK\n");
++ AR6000_STAT_INC(ar, tx_packets);
++ ar->arNetStats.tx_bytes += A_NETBUF_LEN(skb);
++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
++ aptcTR.bytesTransmitted += a_netbuf_to_len(skb);
++ applyAPTCHeuristics(ar);
++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
++ }
++
++ // TODO this needs to be looked at
++ if ((ar->arNetworkType == ADHOC_NETWORK) && ar->arIbssPsEnable
++ && (streamID != WMI_CONTROL_PRI) && mapNo)
++ {
++ mapNo --;
++ ar->arNodeMap[mapNo].txPending --;
++
++ if (!ar->arNodeMap[mapNo].txPending && (mapNo == (ar->arNodeNum - 1))) {
++ A_UINT32 i;
++ for (i = ar->arNodeNum; i > 0; i --) {
++ if (!ar->arNodeMap[i - 1].txPending) {
++ A_MEMZERO(&ar->arNodeMap[i - 1], sizeof(struct ar_node_mapping));
++ ar->arNodeNum --;
++ } else {
++ break;
++ }
++ }
++ }
++ }
++
++ /* Freeing a cookie should not be contingent on either of */
++ /* these flags, just if we have a cookie or not. */
++ /* Can we even get here without a cookie? Fix later. */
++ if (ar->arWmiReady == TRUE || (bypasswmi))
++ {
++ ar6000_free_cookie(ar, cookie);
++ }
++
++ if (ar->arNetQueueStopped) {
++ ar->arNetQueueStopped = FALSE;
++ }
++
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++
++ /* lock is released, we can freely call other kernel APIs */
++
++ /* this indirectly frees the HTC_PACKET */
++ A_NETBUF_FREE(skb);
++
++ if ((ar->arConnected == TRUE) || (bypasswmi)) {
++ if (status != A_ECANCELED) {
++ /* don't wake the queue if we are flushing, other wise it will just
++ * keep queueing packets, which will keep failing */
++ netif_wake_queue(ar->arNetDev);
++ }
++ }
++
++ if (wakeEvent) {
++ wake_up(&arEvent);
++ }
++
++}
++
++/*
++ * Receive event handler. This is called by HTC when a packet is received
++ */
++int pktcount;
++static void
++ar6000_rx(void *Context, HTC_PACKET *pPacket)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Context;
++ struct sk_buff *skb = (struct sk_buff *)pPacket->pPktContext;
++ int minHdrLen;
++ A_STATUS status = pPacket->Status;
++ WMI_PRI_STREAM_ID streamID = arEndpoint2WMIStreamID(ar,pPacket->Endpoint);
++ HTC_ENDPOINT_ID ept = pPacket->Endpoint;
++
++ A_ASSERT((status != A_OK) || (pPacket->pBuffer == (A_NETBUF_DATA(skb) + HTC_HEADER_LEN)));
++
++ AR_DEBUG2_PRINTF("ar6000_rx ar=0x%x sid=%d, skb=0x%x, data=0x%x, len=0x%x ",
++ (A_UINT32)ar, streamID, (A_UINT32)skb, (A_UINT32)pPacket->pBuffer,
++ pPacket->ActualLength);
++ if (status != A_OK) {
++ AR_DEBUG2_PRINTF("ERR\n");
++ } else {
++ AR_DEBUG2_PRINTF("OK\n");
++ }
++
++ /* take lock to protect buffer counts
++ * and adaptive power throughput state */
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++
++ ar->arRxBuffers[streamID]--;
++
++ if (A_SUCCESS(status)) {
++ AR6000_STAT_INC(ar, rx_packets);
++ ar->arNetStats.rx_bytes += pPacket->ActualLength;
++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
++ aptcTR.bytesReceived += a_netbuf_to_len(skb);
++ applyAPTCHeuristics(ar);
++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
++
++ A_NETBUF_PUT(skb, pPacket->ActualLength + HTC_HEADER_LEN);
++ A_NETBUF_PULL(skb, HTC_HEADER_LEN);
++
++#ifdef DEBUG
++ if (debugdriver >= 2) {
++ ar6000_dump_skb(skb);
++ }
++#endif /* DEBUG */
++ }
++
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++
++ if (status != A_OK) {
++ AR6000_STAT_INC(ar, rx_errors);
++ A_NETBUF_FREE(skb);
++ } else if (ar->arWmiEnabled == TRUE) {
++ if (streamID == WMI_CONTROL_PRI) {
++ /*
++ * this is a wmi control msg
++ */
++ wmi_control_rx(ar->arWmi, skb);
++ } else {
++ WMI_DATA_HDR *dhdr = (WMI_DATA_HDR *)A_NETBUF_DATA(skb);
++ if (WMI_DATA_HDR_IS_MSG_TYPE(dhdr, CNTL_MSGTYPE)) {
++ /*
++ * this is a wmi control msg
++ */
++ /* strip off WMI hdr */
++ wmi_data_hdr_remove(ar->arWmi, skb);
++ wmi_control_rx(ar->arWmi, skb);
++ } else {
++ /*
++ * this is a wmi data packet
++ */
++ minHdrLen = sizeof (WMI_DATA_HDR) + sizeof(ATH_MAC_HDR) +
++ sizeof(ATH_LLC_SNAP_HDR);
++
++ if ((pPacket->ActualLength < minHdrLen) ||
++ (pPacket->ActualLength > AR6000_BUFFER_SIZE))
++ {
++ /*
++ * packet is too short or too long
++ */
++ AR_DEBUG_PRINTF("TOO SHORT or TOO LONG\n");
++ AR6000_STAT_INC(ar, rx_errors);
++ AR6000_STAT_INC(ar, rx_length_errors);
++ A_NETBUF_FREE(skb);
++ } else {
++ if (ar->arWmmEnabled) {
++ wmi_implicit_create_pstream(ar->arWmi, skb,
++ DNLINK_TRAFFIC, UNDEFINED_PRI);
++ }
++#if 0
++ /* Access RSSI values here */
++ AR_DEBUG_PRINTF("RSSI %d\n",
++ ((WMI_DATA_HDR *) A_NETBUF_DATA(skb))->rssi);
++#endif
++ wmi_data_hdr_remove(ar->arWmi, skb);
++ wmi_dot3_2_dix(ar->arWmi, skb);
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ /*
++ * extra push and memcpy, for eth_type_trans() of 2.4 kernel
++ * will pull out hard_header_len bytes of the skb.
++ */
++ A_NETBUF_PUSH(skb, sizeof(WMI_DATA_HDR) + sizeof(ATH_LLC_SNAP_HDR) + HTC_HEADER_LEN);
++ A_MEMCPY(A_NETBUF_DATA(skb), A_NETBUF_DATA(skb) + sizeof(WMI_DATA_HDR) +
++ sizeof(ATH_LLC_SNAP_HDR) + HTC_HEADER_LEN, sizeof(ATH_MAC_HDR));
++#endif
++ if ((ar->arNetDev->flags & IFF_UP) == IFF_UP)
++ {
++ skb->dev = ar->arNetDev;
++ skb->protocol = eth_type_trans(skb, ar->arNetDev);
++ netif_rx(skb);
++ }
++ else
++ {
++ A_NETBUF_FREE(skb);
++ }
++ }
++ }
++ }
++ } else {
++ if ((ar->arNetDev->flags & IFF_UP) == IFF_UP)
++ {
++ skb->dev = ar->arNetDev;
++ skb->protocol = eth_type_trans(skb, ar->arNetDev);
++ netif_rx(skb);
++ }
++ else
++ {
++ A_NETBUF_FREE(skb);
++ }
++ }
++
++ if (status != A_ECANCELED) {
++ /*
++ * HTC provides A_ECANCELED status when it doesn't want to be refilled
++ * (probably due to a shutdown)
++ */
++ ar6000_rx_refill(Context, ept);
++ }
++
++
++}
++
++static void
++ar6000_rx_refill(void *Context, HTC_ENDPOINT_ID Endpoint)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Context;
++ void *osBuf;
++ int RxBuffers;
++ int buffersToRefill;
++ HTC_PACKET *pPacket;
++ WMI_PRI_STREAM_ID streamId = arEndpoint2WMIStreamID(ar,Endpoint);
++
++ buffersToRefill = (int)AR6000_MAX_RX_BUFFERS -
++ (int)ar->arRxBuffers[streamId];
++
++ if (buffersToRefill <= 0) {
++ /* fast return, nothing to fill */
++ return;
++ }
++
++ AR_DEBUG2_PRINTF("ar6000_rx_refill: providing htc with %d buffers at eid=%d\n",
++ buffersToRefill, Endpoint);
++
++ for (RxBuffers = 0; RxBuffers < buffersToRefill; RxBuffers++) {
++ osBuf = A_NETBUF_ALLOC(AR6000_BUFFER_SIZE);
++ if (NULL == osBuf) {
++ break;
++ }
++ /* the HTC packet wrapper is at the head of the reserved area
++ * in the skb */
++ pPacket = (HTC_PACKET *)(A_NETBUF_HEAD(osBuf));
++ /* set re-fill info */
++ SET_HTC_PACKET_INFO_RX_REFILL(pPacket,osBuf,A_NETBUF_DATA(osBuf),AR6000_BUFFER_SIZE,Endpoint);
++ /* add this packet */
++ HTCAddReceivePkt(ar->arHtcTarget, pPacket);
++ }
++
++ /* update count */
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++ ar->arRxBuffers[streamId] += RxBuffers;
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++}
++
++static struct net_device_stats *
++ar6000_get_stats(struct net_device *dev)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ return &ar->arNetStats;
++}
++
++static struct iw_statistics *
++ar6000_get_iwstats(struct net_device * dev)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ TARGET_STATS *pStats = &ar->arTargetStats;
++ struct iw_statistics * pIwStats = &ar->arIwStats;
++
++ if ((ar->arWmiReady == FALSE)
++ /*
++ * The in_atomic function is used to determine if the scheduling is
++ * allowed in the current context or not. This was introduced in 2.6
++ * From what I have read on the differences between 2.4 and 2.6, the
++ * 2.4 kernel did not support preemption and so this check might not
++ * be required for 2.4 kernels.
++ */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ || (in_atomic())
++#endif
++ )
++ {
++ pIwStats->status = 0;
++ pIwStats->qual.qual = 0;
++ pIwStats->qual.level =0;
++ pIwStats->qual.noise = 0;
++ pIwStats->discard.code =0;
++ pIwStats->discard.retries=0;
++ pIwStats->miss.beacon =0;
++ return pIwStats;
++ }
++ if (down_interruptible(&ar->arSem)) {
++ pIwStats->status = 0;
++ return pIwStats;
++ }
++
++
++ ar->statsUpdatePending = TRUE;
++
++ if(wmi_get_stats_cmd(ar->arWmi) != A_OK) {
++ up(&ar->arSem);
++ pIwStats->status = 0;
++ return pIwStats;
++ }
++
++ wait_event_interruptible_timeout(arEvent, ar->statsUpdatePending == FALSE, wmitimeout * HZ);
++
++ if (signal_pending(current)) {
++ AR_DEBUG_PRINTF("ar6000 : WMI get stats timeout \n");
++ up(&ar->arSem);
++ pIwStats->status = 0;
++ return pIwStats;
++ }
++ pIwStats->status = 1 ;
++ pIwStats->qual.qual = pStats->cs_aveBeacon_rssi;
++ pIwStats->qual.level =pStats->cs_aveBeacon_rssi + 161; /* noise is -95 dBm */
++ pIwStats->qual.noise = pStats->noise_floor_calibation;
++ pIwStats->discard.code = pStats->rx_decrypt_err;
++ pIwStats->discard.retries = pStats->tx_retry_cnt;
++ pIwStats->miss.beacon = pStats->cs_bmiss_cnt;
++ up(&ar->arSem);
++ return pIwStats;
++}
++
++void
++ar6000_ready_event(void *devt, A_UINT8 *datap, A_UINT8 phyCap)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
++ struct net_device *dev = ar->arNetDev;
++
++ ar->arWmiReady = TRUE;
++ wake_up(&arEvent);
++ A_MEMCPY(dev->dev_addr, datap, AR6000_ETH_ADDR_LEN);
++ AR_DEBUG_PRINTF("mac address = %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
++ dev->dev_addr[0], dev->dev_addr[1],
++ dev->dev_addr[2], dev->dev_addr[3],
++ dev->dev_addr[4], dev->dev_addr[5]);
++
++ ar->arPhyCapability = phyCap;
++}
++
++A_UINT8
++ar6000_iptos_to_userPriority(A_UINT8 *pkt)
++{
++ struct iphdr *ipHdr = (struct iphdr *)pkt;
++ A_UINT8 userPriority;
++
++ /*
++ * IP Tos format :
++ * (Refer Pg 57 WMM-test-plan-v1.2)
++ * IP-TOS - 8bits
++ * : DSCP(6-bits) ECN(2-bits)
++ * : DSCP - P2 P1 P0 X X X
++ * where (P2 P1 P0) form 802.1D
++ */
++ userPriority = ipHdr->tos >> 5;
++ return (userPriority & 0x7);
++}
++
++void
++ar6000_connect_event(AR_SOFTC_T *ar, A_UINT16 channel, A_UINT8 *bssid,
++ A_UINT16 listenInterval, A_UINT16 beaconInterval,
++ NETWORK_TYPE networkType, A_UINT8 beaconIeLen,
++ A_UINT8 assocReqLen, A_UINT8 assocRespLen,
++ A_UINT8 *assocInfo)
++{
++ union iwreq_data wrqu;
++ int i, beacon_ie_pos, assoc_resp_ie_pos, assoc_req_ie_pos;
++ static const char *tag1 = "ASSOCINFO(ReqIEs=";
++ static const char *tag2 = "ASSOCRESPIE=";
++ static const char *beaconIetag = "BEACONIE=";
++ char buf[WMI_CONTROL_MSG_MAX_LEN * 2 + sizeof(tag1)];
++ char *pos;
++ A_UINT8 key_op_ctrl;
++
++ A_MEMCPY(ar->arBssid, bssid, sizeof(ar->arBssid));
++ ar->arBssChannel = channel;
++
++ A_PRINTF("AR6000 connected event on freq %d ", channel);
++ A_PRINTF("with bssid %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x "
++ " listenInterval=%d, beaconInterval = %d, beaconIeLen = %d assocReqLen=%d"
++ " assocRespLen =%d\n",
++ bssid[0], bssid[1], bssid[2],
++ bssid[3], bssid[4], bssid[5],
++ listenInterval, beaconInterval,
++ beaconIeLen, assocReqLen, assocRespLen);
++ if (networkType & ADHOC_NETWORK) {
++ if (networkType & ADHOC_CREATOR) {
++ A_PRINTF("Network: Adhoc (Creator)\n");
++ } else {
++ A_PRINTF("Network: Adhoc (Joiner)\n");
++ }
++ } else {
++ A_PRINTF("Network: Infrastructure\n");
++ }
++
++ if (beaconIeLen && (sizeof(buf) > (9 + beaconIeLen * 2))) {
++ AR_DEBUG_PRINTF("\nBeaconIEs= ");
++
++ beacon_ie_pos = 0;
++ A_MEMZERO(buf, sizeof(buf));
++ sprintf(buf, "%s", beaconIetag);
++ pos = buf + 9;
++ for (i = beacon_ie_pos; i < beacon_ie_pos + beaconIeLen; i++) {
++ AR_DEBUG_PRINTF("%2.2x ", assocInfo[i]);
++ sprintf(pos, "%2.2x", assocInfo[i]);
++ pos += 2;
++ }
++ AR_DEBUG_PRINTF("\n");
++
++ A_MEMZERO(&wrqu, sizeof(wrqu));
++ wrqu.data.length = strlen(buf);
++ wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf);
++ }
++
++ if (assocRespLen && (sizeof(buf) > (12 + (assocRespLen * 2))))
++ {
++ assoc_resp_ie_pos = beaconIeLen + assocReqLen +
++ sizeof(A_UINT16) + /* capinfo*/
++ sizeof(A_UINT16) + /* status Code */
++ sizeof(A_UINT16) ; /* associd */
++ A_MEMZERO(buf, sizeof(buf));
++ sprintf(buf, "%s", tag2);
++ pos = buf + 12;
++ AR_DEBUG_PRINTF("\nAssocRespIEs= ");
++ /*
++ * The Association Response Frame w.o. the WLAN header is delivered to
++ * the host, so skip over to the IEs
++ */
++ for (i = assoc_resp_ie_pos; i < assoc_resp_ie_pos + assocRespLen - 6; i++)
++ {
++ AR_DEBUG_PRINTF("%2.2x ", assocInfo[i]);
++ sprintf(pos, "%2.2x", assocInfo[i]);
++ pos += 2;
++ }
++ AR_DEBUG_PRINTF("\n");
++
++ A_MEMZERO(&wrqu, sizeof(wrqu));
++ wrqu.data.length = strlen(buf);
++ wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf);
++ }
++
++ if (assocReqLen && (sizeof(buf) > (17 + (assocReqLen * 2)))) {
++ /*
++ * assoc Request includes capability and listen interval. Skip these.
++ */
++ assoc_req_ie_pos = beaconIeLen +
++ sizeof(A_UINT16) + /* capinfo*/
++ sizeof(A_UINT16); /* listen interval */
++
++ A_MEMZERO(buf, sizeof(buf));
++ sprintf(buf, "%s", tag1);
++ pos = buf + 17;
++ AR_DEBUG_PRINTF("AssocReqIEs= ");
++ for (i = assoc_req_ie_pos; i < assoc_req_ie_pos + assocReqLen - 4; i++) {
++ AR_DEBUG_PRINTF("%2.2x ", assocInfo[i]);
++ sprintf(pos, "%2.2x", assocInfo[i]);
++ pos += 2;;
++ }
++ AR_DEBUG_PRINTF("\n");
++
++ A_MEMZERO(&wrqu, sizeof(wrqu));
++ wrqu.data.length = strlen(buf);
++ wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf);
++ }
++
++#ifdef USER_KEYS
++ if (ar->user_savedkeys_stat == USER_SAVEDKEYS_STAT_RUN &&
++ ar->user_saved_keys.keyOk == TRUE)
++ {
++
++ key_op_ctrl = KEY_OP_VALID_MASK & ~KEY_OP_INIT_TSC;
++ if (ar->user_key_ctrl & AR6000_USER_SETKEYS_RSC_UNCHANGED) {
++ key_op_ctrl &= ~KEY_OP_INIT_RSC;
++ } else {
++ key_op_ctrl |= KEY_OP_INIT_RSC;
++ }
++ ar6000_reinstall_keys(ar, key_op_ctrl);
++ }
++#endif /* USER_KEYS */
++
++ /* flush data queues */
++ ar6000_TxDataCleanup(ar);
++
++ netif_wake_queue(ar->arNetDev);
++
++ if ((OPEN_AUTH == ar->arDot11AuthMode) &&
++ (NONE_AUTH == ar->arAuthMode) &&
++ (WEP_CRYPT == ar->arPairwiseCrypto))
++ {
++ if (!ar->arConnected) {
++ ar6000_install_static_wep_keys(ar);
++ }
++ }
++
++ ar->arConnected = TRUE;
++ ar->arConnectPending = FALSE;
++
++ reconnect_flag = 0;
++
++ A_MEMZERO(&wrqu, sizeof(wrqu));
++ A_MEMCPY(wrqu.addr.sa_data, bssid, IEEE80211_ADDR_LEN);
++ wrqu.addr.sa_family = ARPHRD_ETHER;
++ wireless_send_event(ar->arNetDev, SIOCGIWAP, &wrqu, NULL);
++ if ((ar->arNetworkType == ADHOC_NETWORK) && ar->arIbssPsEnable) {
++ A_MEMZERO(ar->arNodeMap, sizeof(ar->arNodeMap));
++ ar->arNodeNum = 0;
++ ar->arNexEpId = ENDPOINT_2;
++ }
++
++}
++
++void ar6000_set_numdataendpts(AR_SOFTC_T *ar, A_UINT32 num)
++{
++ A_ASSERT(num <= (HTC_MAILBOX_NUM_MAX - 1));
++ ar->arNumDataEndPts = num;
++}
++
++void
++ar6000_disconnect_event(AR_SOFTC_T *ar, A_UINT8 reason, A_UINT8 *bssid,
++ A_UINT8 assocRespLen, A_UINT8 *assocInfo, A_UINT16 protocolReasonStatus)
++{
++ A_UINT8 i;
++
++ A_PRINTF("AR6000 disconnected");
++ if (bssid[0] || bssid[1] || bssid[2] || bssid[3] || bssid[4] || bssid[5]) {
++ A_PRINTF(" from %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x ",
++ bssid[0], bssid[1], bssid[2], bssid[3], bssid[4], bssid[5]);
++ }
++ A_PRINTF("\n");
++
++ AR_DEBUG_PRINTF("\nDisconnect Reason is %d", reason);
++ AR_DEBUG_PRINTF("\nProtocol Reason/Status Code is %d", protocolReasonStatus);
++ AR_DEBUG_PRINTF("\nAssocResp Frame = %s",
++ assocRespLen ? " " : "NULL");
++ for (i = 0; i < assocRespLen; i++) {
++ if (!(i % 0x10)) {
++ AR_DEBUG_PRINTF("\n");
++ }
++ AR_DEBUG_PRINTF("%2.2x ", assocInfo[i]);
++ }
++ AR_DEBUG_PRINTF("\n");
++ /*
++ * If the event is due to disconnect cmd from the host, only they the target
++ * would stop trying to connect. Under any other condition, target would
++ * keep trying to connect.
++ *
++ */
++ if( reason == DISCONNECT_CMD)
++ {
++ ar->arConnectPending = FALSE;
++ } else {
++ ar->arConnectPending = TRUE;
++ if (((reason == ASSOC_FAILED) && (protocolReasonStatus == 0x11)) ||
++ ((reason == ASSOC_FAILED) && (protocolReasonStatus == 0x0) && (reconnect_flag == 1))) {
++ ar->arConnected = TRUE;
++ return;
++ }
++ }
++ ar->arConnected = FALSE;
++
++ if( (reason != CSERV_DISCONNECT) || (reconnect_flag != 1) ) {
++ reconnect_flag = 0;
++ }
++
++#ifdef USER_KEYS
++ if (reason != CSERV_DISCONNECT)
++ {
++ ar->user_savedkeys_stat = USER_SAVEDKEYS_STAT_INIT;
++ ar->user_key_ctrl = 0;
++ }
++#endif /* USER_KEYS */
++
++ netif_stop_queue(ar->arNetDev);
++ A_MEMZERO(ar->arBssid, sizeof(ar->arBssid));
++ ar->arBssChannel = 0;
++ ar->arBeaconInterval = 0;
++
++ ar6000_TxDataCleanup(ar);
++}
++
++void
++ar6000_regDomain_event(AR_SOFTC_T *ar, A_UINT32 regCode)
++{
++ A_PRINTF("AR6000 Reg Code = 0x%x\n", regCode);
++ ar->arRegCode = regCode;
++}
++
++void
++ar6000_neighborReport_event(AR_SOFTC_T *ar, int numAps, WMI_NEIGHBOR_INFO *info)
++{
++ static const char *tag = "PRE-AUTH";
++ char buf[128];
++ union iwreq_data wrqu;
++ int i;
++
++ AR_DEBUG_PRINTF("AR6000 Neighbor Report Event\n");
++ for (i=0; i < numAps; info++, i++) {
++ AR_DEBUG_PRINTF("bssid %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x ",
++ info->bssid[0], info->bssid[1], info->bssid[2],
++ info->bssid[3], info->bssid[4], info->bssid[5]);
++ if (info->bssFlags & WMI_PREAUTH_CAPABLE_BSS) {
++ AR_DEBUG_PRINTF("preauth-cap");
++ }
++ if (info->bssFlags & WMI_PMKID_VALID_BSS) {
++ AR_DEBUG_PRINTF(" pmkid-valid\n");
++ continue; /* we skip bss if the pmkid is already valid */
++ }
++ AR_DEBUG_PRINTF("\n");
++ snprintf(buf, sizeof(buf), "%s%2.2x%2.2x%2.2x%2.2x%2.2x%2.2x%2.2x%2.2x",
++ tag,
++ info->bssid[0], info->bssid[1], info->bssid[2],
++ info->bssid[3], info->bssid[4], info->bssid[5],
++ i, info->bssFlags);
++ A_MEMZERO(&wrqu, sizeof(wrqu));
++ wrqu.data.length = strlen(buf);
++ wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf);
++ }
++}
++
++void
++ar6000_tkip_micerr_event(AR_SOFTC_T *ar, A_UINT8 keyid, A_BOOL ismcast)
++{
++ static const char *tag = "MLME-MICHAELMICFAILURE.indication";
++ char buf[128];
++ union iwreq_data wrqu;
++
++ A_PRINTF("AR6000 TKIP MIC error received for keyid %d %scast\n",
++ keyid, ismcast ? "multi": "uni");
++ snprintf(buf, sizeof(buf), "%s(keyid=%d %scat)", tag, keyid,
++ ismcast ? "multi" : "uni");
++ memset(&wrqu, 0, sizeof(wrqu));
++ wrqu.data.length = strlen(buf);
++ wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf);
++}
++
++void
++ar6000_scanComplete_event(AR_SOFTC_T *ar, A_STATUS status)
++{
++ AR_DEBUG_PRINTF("AR6000 scan complete: %d\n", status);
++
++ ar->scan_complete = 1;
++ wake_up_interruptible(&ar6000_scan_queue);
++}
++
++void
++ar6000_targetStats_event(AR_SOFTC_T *ar, WMI_TARGET_STATS *pTarget)
++{
++ TARGET_STATS *pStats = &ar->arTargetStats;
++ A_UINT8 ac;
++
++ /*A_PRINTF("AR6000 updating target stats\n");*/
++ pStats->tx_packets += pTarget->txrxStats.tx_stats.tx_packets;
++ pStats->tx_bytes += pTarget->txrxStats.tx_stats.tx_bytes;
++ pStats->tx_unicast_pkts += pTarget->txrxStats.tx_stats.tx_unicast_pkts;
++ pStats->tx_unicast_bytes += pTarget->txrxStats.tx_stats.tx_unicast_bytes;
++ pStats->tx_multicast_pkts += pTarget->txrxStats.tx_stats.tx_multicast_pkts;
++ pStats->tx_multicast_bytes += pTarget->txrxStats.tx_stats.tx_multicast_bytes;
++ pStats->tx_broadcast_pkts += pTarget->txrxStats.tx_stats.tx_broadcast_pkts;
++ pStats->tx_broadcast_bytes += pTarget->txrxStats.tx_stats.tx_broadcast_bytes;
++ pStats->tx_rts_success_cnt += pTarget->txrxStats.tx_stats.tx_rts_success_cnt;
++ for(ac = 0; ac < WMM_NUM_AC; ac++)
++ pStats->tx_packet_per_ac[ac] += pTarget->txrxStats.tx_stats.tx_packet_per_ac[ac];
++ pStats->tx_errors += pTarget->txrxStats.tx_stats.tx_errors;
++ pStats->tx_failed_cnt += pTarget->txrxStats.tx_stats.tx_failed_cnt;
++ pStats->tx_retry_cnt += pTarget->txrxStats.tx_stats.tx_retry_cnt;
++ pStats->tx_rts_fail_cnt += pTarget->txrxStats.tx_stats.tx_rts_fail_cnt;
++ pStats->tx_unicast_rate = wmi_get_rate(pTarget->txrxStats.tx_stats.tx_unicast_rate);
++
++ pStats->rx_packets += pTarget->txrxStats.rx_stats.rx_packets;
++ pStats->rx_bytes += pTarget->txrxStats.rx_stats.rx_bytes;
++ pStats->rx_unicast_pkts += pTarget->txrxStats.rx_stats.rx_unicast_pkts;
++ pStats->rx_unicast_bytes += pTarget->txrxStats.rx_stats.rx_unicast_bytes;
++ pStats->rx_multicast_pkts += pTarget->txrxStats.rx_stats.rx_multicast_pkts;
++ pStats->rx_multicast_bytes += pTarget->txrxStats.rx_stats.rx_multicast_bytes;
++ pStats->rx_broadcast_pkts += pTarget->txrxStats.rx_stats.rx_broadcast_pkts;
++ pStats->rx_broadcast_bytes += pTarget->txrxStats.rx_stats.rx_broadcast_bytes;
++ pStats->rx_fragment_pkt += pTarget->txrxStats.rx_stats.rx_fragment_pkt;
++ pStats->rx_errors += pTarget->txrxStats.rx_stats.rx_errors;
++ pStats->rx_crcerr += pTarget->txrxStats.rx_stats.rx_crcerr;
++ pStats->rx_key_cache_miss += pTarget->txrxStats.rx_stats.rx_key_cache_miss;
++ pStats->rx_decrypt_err += pTarget->txrxStats.rx_stats.rx_decrypt_err;
++ pStats->rx_duplicate_frames += pTarget->txrxStats.rx_stats.rx_duplicate_frames;
++ pStats->rx_unicast_rate = wmi_get_rate(pTarget->txrxStats.rx_stats.rx_unicast_rate);
++
++
++ pStats->tkip_local_mic_failure
++ += pTarget->txrxStats.tkipCcmpStats.tkip_local_mic_failure;
++ pStats->tkip_counter_measures_invoked
++ += pTarget->txrxStats.tkipCcmpStats.tkip_counter_measures_invoked;
++ pStats->tkip_replays += pTarget->txrxStats.tkipCcmpStats.tkip_replays;
++ pStats->tkip_format_errors += pTarget->txrxStats.tkipCcmpStats.tkip_format_errors;
++ pStats->ccmp_format_errors += pTarget->txrxStats.tkipCcmpStats.ccmp_format_errors;
++ pStats->ccmp_replays += pTarget->txrxStats.tkipCcmpStats.ccmp_replays;
++
++
++ pStats->power_save_failure_cnt += pTarget->pmStats.power_save_failure_cnt;
++ pStats->noise_floor_calibation = pTarget->noise_floor_calibation;
++
++ pStats->cs_bmiss_cnt += pTarget->cservStats.cs_bmiss_cnt;
++ pStats->cs_lowRssi_cnt += pTarget->cservStats.cs_lowRssi_cnt;
++ pStats->cs_connect_cnt += pTarget->cservStats.cs_connect_cnt;
++ pStats->cs_disconnect_cnt += pTarget->cservStats.cs_disconnect_cnt;
++ pStats->cs_aveBeacon_snr = pTarget->cservStats.cs_aveBeacon_snr;
++ pStats->cs_aveBeacon_rssi = pTarget->cservStats.cs_aveBeacon_rssi;
++ pStats->cs_lastRoam_msec = pTarget->cservStats.cs_lastRoam_msec;
++ pStats->cs_snr = pTarget->cservStats.cs_snr;
++ pStats->cs_rssi = pTarget->cservStats.cs_rssi;
++
++ pStats->lq_val = pTarget->lqVal;
++
++ pStats->wow_num_pkts_dropped += pTarget->wowStats.wow_num_pkts_dropped;
++ pStats->wow_num_host_pkt_wakeups += pTarget->wowStats.wow_num_host_pkt_wakeups;
++ pStats->wow_num_host_event_wakeups += pTarget->wowStats.wow_num_host_event_wakeups;
++ pStats->wow_num_events_discarded += pTarget->wowStats.wow_num_events_discarded;
++
++ ar->statsUpdatePending = FALSE;
++ wake_up(&arEvent);
++}
++
++void
++ar6000_rssiThreshold_event(AR_SOFTC_T *ar, WMI_RSSI_THRESHOLD_VAL newThreshold, A_INT16 rssi)
++{
++ USER_RSSI_THOLD userRssiThold;
++
++ userRssiThold.tag = rssi_map[newThreshold].tag;
++ userRssiThold.rssi = rssi;
++ AR_DEBUG2_PRINTF("rssi Threshold range = %d tag = %d rssi = %d\n", newThreshold, userRssiThold.tag, rssi);
++#ifdef SEND_EVENT_TO_APP
++ ar6000_send_event_to_app(ar, WMI_RSSI_THRESHOLD_EVENTID,(A_UINT8 *)&userRssiThold, sizeof(USER_RSSI_THOLD));
++#endif
++}
++
++
++void
++ar6000_hbChallengeResp_event(AR_SOFTC_T *ar, A_UINT32 cookie, A_UINT32 source)
++{
++ if (source == APP_HB_CHALLENGE) {
++ /* Report it to the app in case it wants a positive acknowledgement */
++#ifdef SEND_EVENT_TO_APP
++ ar6000_send_event_to_app(ar, WMIX_HB_CHALLENGE_RESP_EVENTID,
++ (A_UINT8 *)&cookie, sizeof(cookie));
++#endif
++ } else {
++ /* This would ignore the replys that come in after their due time */
++ if (cookie == ar->arHBChallengeResp.seqNum) {
++ ar->arHBChallengeResp.outstanding = FALSE;
++ }
++ }
++}
++
++
++void
++ar6000_reportError_event(AR_SOFTC_T *ar, WMI_TARGET_ERROR_VAL errorVal)
++{
++ char *errString[] = {
++ [WMI_TARGET_PM_ERR_FAIL] "WMI_TARGET_PM_ERR_FAIL",
++ [WMI_TARGET_KEY_NOT_FOUND] "WMI_TARGET_KEY_NOT_FOUND",
++ [WMI_TARGET_DECRYPTION_ERR] "WMI_TARGET_DECRYPTION_ERR",
++ [WMI_TARGET_BMISS] "WMI_TARGET_BMISS",
++ [WMI_PSDISABLE_NODE_JOIN] "WMI_PSDISABLE_NODE_JOIN"
++ };
++
++ A_PRINTF("AR6000 Error on Target. Error = 0x%x\n", errorVal);
++
++ /* One error is reported at a time, and errorval is a bitmask */
++ if(errorVal & (errorVal - 1))
++ return;
++
++ A_PRINTF("AR6000 Error type = ");
++ switch(errorVal)
++ {
++ case WMI_TARGET_PM_ERR_FAIL:
++ case WMI_TARGET_KEY_NOT_FOUND:
++ case WMI_TARGET_DECRYPTION_ERR:
++ case WMI_TARGET_BMISS:
++ case WMI_PSDISABLE_NODE_JOIN:
++ A_PRINTF("%s\n", errString[errorVal]);
++ break;
++ default:
++ A_PRINTF("INVALID\n");
++ break;
++ }
++
++}
++
++
++void
++ar6000_cac_event(AR_SOFTC_T *ar, A_UINT8 ac, A_UINT8 cacIndication,
++ A_UINT8 statusCode, A_UINT8 *tspecSuggestion)
++{
++ WMM_TSPEC_IE *tspecIe;
++
++ /*
++ * This is the TSPEC IE suggestion from AP.
++ * Suggestion provided by AP under some error
++ * cases, could be helpful for the host app.
++ * Check documentation.
++ */
++ tspecIe = (WMM_TSPEC_IE *)tspecSuggestion;
++
++ /*
++ * What do we do, if we get TSPEC rejection? One thought
++ * that comes to mind is implictly delete the pstream...
++ */
++ A_PRINTF("AR6000 CAC notification. "
++ "AC = %d, cacIndication = 0x%x, statusCode = 0x%x\n",
++ ac, cacIndication, statusCode);
++}
++
++#define AR6000_PRINT_BSSID(_pBss) do { \
++ A_PRINTF("%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x ",\
++ (_pBss)[0],(_pBss)[1],(_pBss)[2],(_pBss)[3],\
++ (_pBss)[4],(_pBss)[5]); \
++} while(0)
++
++void
++ar6000_roam_tbl_event(AR_SOFTC_T *ar, WMI_TARGET_ROAM_TBL *pTbl)
++{
++ A_UINT8 i;
++
++ A_PRINTF("ROAM TABLE NO OF ENTRIES is %d ROAM MODE is %d\n",
++ pTbl->numEntries, pTbl->roamMode);
++ for (i= 0; i < pTbl->numEntries; i++) {
++ A_PRINTF("[%d]bssid %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x ", i,
++ pTbl->bssRoamInfo[i].bssid[0], pTbl->bssRoamInfo[i].bssid[1],
++ pTbl->bssRoamInfo[i].bssid[2],
++ pTbl->bssRoamInfo[i].bssid[3],
++ pTbl->bssRoamInfo[i].bssid[4],
++ pTbl->bssRoamInfo[i].bssid[5]);
++ A_PRINTF("RSSI %d RSSIDT %d LAST RSSI %d UTIL %d ROAM_UTIL %d"
++ " BIAS %d\n",
++ pTbl->bssRoamInfo[i].rssi,
++ pTbl->bssRoamInfo[i].rssidt,
++ pTbl->bssRoamInfo[i].last_rssi,
++ pTbl->bssRoamInfo[i].util,
++ pTbl->bssRoamInfo[i].roam_util,
++ pTbl->bssRoamInfo[i].bias);
++ }
++}
++
++void
++ar6000_wow_list_event(struct ar6_softc *ar, A_UINT8 num_filters, WMI_GET_WOW_LIST_REPLY *wow_reply)
++{
++ A_UINT8 i,j;
++
++ /*Each event now contains exactly one filter, see bug 26613*/
++ A_PRINTF("WOW pattern %d of %d patterns\n", wow_reply->this_filter_num, wow_reply->num_filters);
++ A_PRINTF("wow mode = %s host mode = %s\n",
++ (wow_reply->wow_mode == 0? "disabled":"enabled"),
++ (wow_reply->host_mode == 1 ? "awake":"asleep"));
++
++
++ /*If there are no patterns, the reply will only contain generic
++ WoW information. Pattern information will exist only if there are
++ patterns present. Bug 26716*/
++
++ /* If this event contains pattern information, display it*/
++ if (wow_reply->this_filter_num) {
++ i=0;
++ A_PRINTF("id=%d size=%d offset=%d\n",
++ wow_reply->wow_filters[i].wow_filter_id,
++ wow_reply->wow_filters[i].wow_filter_size,
++ wow_reply->wow_filters[i].wow_filter_offset);
++ A_PRINTF("wow pattern = ");
++ for (j=0; j< wow_reply->wow_filters[i].wow_filter_size; j++) {
++ A_PRINTF("%2.2x",wow_reply->wow_filters[i].wow_filter_pattern[j]);
++ }
++
++ A_PRINTF("\nwow mask = ");
++ for (j=0; j< wow_reply->wow_filters[i].wow_filter_size; j++) {
++ A_PRINTF("%2.2x",wow_reply->wow_filters[i].wow_filter_mask[j]);
++ }
++ A_PRINTF("\n");
++ }
++}
++
++/*
++ * Report the Roaming related data collected on the target
++ */
++void
++ar6000_display_roam_time(WMI_TARGET_ROAM_TIME *p)
++{
++ A_PRINTF("Disconnect Data : BSSID: ");
++ AR6000_PRINT_BSSID(p->disassoc_bssid);
++ A_PRINTF(" RSSI %d DISASSOC Time %d NO_TXRX_TIME %d\n",
++ p->disassoc_bss_rssi,p->disassoc_time,
++ p->no_txrx_time);
++ A_PRINTF("Connect Data: BSSID: ");
++ AR6000_PRINT_BSSID(p->assoc_bssid);
++ A_PRINTF(" RSSI %d ASSOC Time %d TXRX_TIME %d\n",
++ p->assoc_bss_rssi,p->assoc_time,
++ p->allow_txrx_time);
++ A_PRINTF("Last Data Tx Time (b4 Disassoc) %d "\
++ "First Data Tx Time (after Assoc) %d\n",
++ p->last_data_txrx_time, p->first_data_txrx_time);
++}
++
++void
++ar6000_roam_data_event(AR_SOFTC_T *ar, WMI_TARGET_ROAM_DATA *p)
++{
++ switch (p->roamDataType) {
++ case ROAM_DATA_TIME:
++ ar6000_display_roam_time(&p->u.roamTime);
++ break;
++ default:
++ break;
++ }
++}
++
++void
++ar6000_bssInfo_event_rx(AR_SOFTC_T *ar, A_UINT8 *datap, int len)
++{
++ struct sk_buff *skb;
++ WMI_BSS_INFO_HDR *bih = (WMI_BSS_INFO_HDR *)datap;
++
++
++ if (!ar->arMgmtFilter) {
++ return;
++ }
++ if (((ar->arMgmtFilter & IEEE80211_FILTER_TYPE_BEACON) &&
++ (bih->frameType != BEACON_FTYPE)) ||
++ ((ar->arMgmtFilter & IEEE80211_FILTER_TYPE_PROBE_RESP) &&
++ (bih->frameType != PROBERESP_FTYPE)))
++ {
++ return;
++ }
++
++ if ((skb = A_NETBUF_ALLOC_RAW(len)) != NULL) {
++
++ A_NETBUF_PUT(skb, len);
++ A_MEMCPY(A_NETBUF_DATA(skb), datap, len);
++ skb->dev = ar->arNetDev;
++ printk("MAC RAW...\n");
++// skb->mac.raw = A_NETBUF_DATA(skb);
++ skb->ip_summed = CHECKSUM_NONE;
++ skb->pkt_type = PACKET_OTHERHOST;
++ skb->protocol = __constant_htons(0x0019);
++ netif_rx(skb);
++ }
++}
++
++A_UINT32 wmiSendCmdNum;
++
++A_STATUS
++ar6000_control_tx(void *devt, void *osbuf, WMI_PRI_STREAM_ID streamID)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
++ A_STATUS status = A_OK;
++ struct ar_cookie *cookie = NULL;
++ int i;
++
++ /* take lock to protect ar6000_alloc_cookie() */
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++
++ do {
++
++ AR_DEBUG2_PRINTF("ar_contrstatus = ol_tx: skb=0x%x, len=0x%x, sid=%d\n",
++ (A_UINT32)osbuf, A_NETBUF_LEN(osbuf), streamID);
++
++ if ((streamID == WMI_CONTROL_PRI) && (ar->arWMIControlEpFull)) {
++ /* control endpoint is full, don't allocate resources, we
++ * are just going to drop this packet */
++ cookie = NULL;
++ AR_DEBUG_PRINTF(" WMI Control EP full, dropping packet : 0x%X, len:%d \n",
++ (A_UINT32)osbuf, A_NETBUF_LEN(osbuf));
++ } else {
++ cookie = ar6000_alloc_cookie(ar);
++ }
++
++ if (cookie == NULL) {
++ status = A_NO_MEMORY;
++ break;
++ }
++
++ if(logWmiRawMsgs) {
++ A_PRINTF("WMI cmd send, msgNo %d :", wmiSendCmdNum);
++ for(i = 0; i < a_netbuf_to_len(osbuf); i++)
++ A_PRINTF("%x ", ((A_UINT8 *)a_netbuf_to_data(osbuf))[i]);
++ A_PRINTF("\n");
++ }
++
++ wmiSendCmdNum++;
++
++ } while (FALSE);
++
++ if (cookie != NULL) {
++ /* got a structure to send it out on */
++ ar->arTxPending[streamID]++;
++
++ if (streamID != WMI_CONTROL_PRI) {
++ ar->arTotalTxDataPending++;
++ }
++ }
++
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++
++ if (cookie != NULL) {
++ cookie->arc_bp[0] = (A_UINT32)osbuf;
++ cookie->arc_bp[1] = 0;
++ SET_HTC_PACKET_INFO_TX(&cookie->HtcPkt,
++ cookie,
++ A_NETBUF_DATA(osbuf),
++ A_NETBUF_LEN(osbuf),
++ arWMIStream2EndpointID(ar,streamID),
++ AR6K_CONTROL_PKT_TAG);
++ /* this interface is asynchronous, if there is an error, cleanup will happen in the
++ * TX completion callback */
++ HTCSendPkt(ar->arHtcTarget, &cookie->HtcPkt);
++ status = A_OK;
++ }
++
++ return status;
++}
++
++/* indicate tx activity or inactivity on a WMI stream */
++void ar6000_indicate_tx_activity(void *devt, A_UINT8 TrafficClass, A_BOOL Active)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
++ WMI_PRI_STREAM_ID streamid;
++
++ if (ar->arWmiEnabled) {
++ streamid = wmi_get_stream_id(ar->arWmi, TrafficClass);
++ } else {
++ /* for mbox ping testing, the traffic class is mapped directly as a stream ID,
++ * see handling of AR6000_XIOCTL_TRAFFIC_ACTIVITY_CHANGE in ioctl.c */
++ streamid = (WMI_PRI_STREAM_ID)TrafficClass;
++ }
++
++ /* notify HTC, this may cause credit distribution changes */
++
++ HTCIndicateActivityChange(ar->arHtcTarget,
++ arWMIStream2EndpointID(ar,streamid),
++ Active);
++
++}
++
++module_init(ar6000_init_module);
++module_exit(ar6000_cleanup_module);
++
++/* Init cookie queue */
++static void
++ar6000_cookie_init(AR_SOFTC_T *ar)
++{
++ A_UINT32 i;
++
++ ar->arCookieList = NULL;
++ A_MEMZERO(s_ar_cookie_mem, sizeof(s_ar_cookie_mem));
++
++ for (i = 0; i < MAX_COOKIE_NUM; i++) {
++ ar6000_free_cookie(ar, &s_ar_cookie_mem[i]);
++ }
++}
++
++/* cleanup cookie queue */
++static void
++ar6000_cookie_cleanup(AR_SOFTC_T *ar)
++{
++ /* It is gone .... */
++ ar->arCookieList = NULL;
++}
++
++/* Init cookie queue */
++static void
++ar6000_free_cookie(AR_SOFTC_T *ar, struct ar_cookie * cookie)
++{
++ /* Insert first */
++ A_ASSERT(ar != NULL);
++ A_ASSERT(cookie != NULL);
++ cookie->arc_list_next = ar->arCookieList;
++ ar->arCookieList = cookie;
++}
++
++/* cleanup cookie queue */
++static struct ar_cookie *
++ar6000_alloc_cookie(AR_SOFTC_T *ar)
++{
++ struct ar_cookie *cookie;
++
++ cookie = ar->arCookieList;
++ if(cookie != NULL)
++ {
++ ar->arCookieList = cookie->arc_list_next;
++ }
++
++ return cookie;
++}
++
++#ifdef SEND_EVENT_TO_APP
++/*
++ * This function is used to send event which come from taget to
++ * the application. The buf which send to application is include
++ * the event ID and event content.
++ */
++#define EVENT_ID_LEN 2
++void ar6000_send_event_to_app(AR_SOFTC_T *ar, A_UINT16 eventId,
++ A_UINT8 *datap, int len)
++{
++
++#if (WIRELESS_EXT >= 15)
++
++/* note: IWEVCUSTOM only exists in wireless extensions after version 15 */
++
++ char *buf;
++ A_UINT16 size;
++ union iwreq_data wrqu;
++
++ size = len + EVENT_ID_LEN;
++
++ if (size > IW_CUSTOM_MAX) {
++ AR_DEBUG_PRINTF("WMI event ID : 0x%4.4X, len = %d too big for IWEVCUSTOM (max=%d) \n",
++ eventId, size, IW_CUSTOM_MAX);
++ return;
++ }
++
++ buf = A_MALLOC_NOWAIT(size);
++ A_MEMZERO(buf, size);
++ A_MEMCPY(buf, &eventId, EVENT_ID_LEN);
++ A_MEMCPY(buf+EVENT_ID_LEN, datap, len);
++
++ //AR_DEBUG_PRINTF("event ID = %d,len = %d\n",*(A_UINT16*)buf, size);
++ A_MEMZERO(&wrqu, sizeof(wrqu));
++ wrqu.data.length = size;
++ wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf);
++
++ A_FREE(buf);
++#endif
++
++
++}
++#endif
++
++
++void
++ar6000_tx_retry_err_event(void *devt)
++{
++ AR_DEBUG2_PRINTF("Tx retries reach maximum!\n");
++}
++
++void
++ar6000_snrThresholdEvent_rx(void *devt, WMI_SNR_THRESHOLD_VAL newThreshold, A_UINT8 snr)
++{
++ AR_DEBUG2_PRINTF("snr threshold range %d, snr %d\n", newThreshold, snr);
++}
++
++void
++ar6000_lqThresholdEvent_rx(void *devt, WMI_LQ_THRESHOLD_VAL newThreshold, A_UINT8 lq)
++{
++ AR_DEBUG2_PRINTF("lq threshold range %d, lq %d\n", newThreshold, lq);
++}
++
++
++
++A_UINT32
++a_copy_to_user(void *to, const void *from, A_UINT32 n)
++{
++ return(copy_to_user(to, from, n));
++}
++
++A_UINT32
++a_copy_from_user(void *to, const void *from, A_UINT32 n)
++{
++ return(copy_from_user(to, from, n));
++}
++
++
++A_STATUS
++ar6000_get_driver_cfg(struct net_device *dev,
++ A_UINT16 cfgParam,
++ void *result)
++{
++
++ A_STATUS ret = 0;
++
++ switch(cfgParam)
++ {
++ case AR6000_DRIVER_CFG_GET_WLANNODECACHING:
++ *((A_UINT32 *)result) = wlanNodeCaching;
++ break;
++ case AR6000_DRIVER_CFG_LOG_RAW_WMI_MSGS:
++ *((A_UINT32 *)result) = logWmiRawMsgs;
++ break;
++ default:
++ ret = EINVAL;
++ break;
++ }
++
++ return ret;
++}
++
++void
++ar6000_keepalive_rx(void *devt, A_UINT8 configured)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
++
++ ar->arKeepaliveConfigured = configured;
++ wake_up(&arEvent);
++}
++
++void
++ar6000_pmkid_list_event(void *devt, A_UINT8 numPMKID, WMI_PMKID *pmkidList)
++{
++ A_UINT8 i, j;
++
++ A_PRINTF("Number of Cached PMKIDs is %d\n", numPMKID);
++
++ for (i = 0; i < numPMKID; i++) {
++ A_PRINTF("\nPMKID %d ", i);
++ for (j = 0; j < WMI_PMKID_LEN; j++) {
++ A_PRINTF("%2.2x", pmkidList->pmkid[j]);
++ }
++ pmkidList++;
++ }
++}
++
++#ifdef USER_KEYS
++static A_STATUS
++
++ar6000_reinstall_keys(AR_SOFTC_T *ar, A_UINT8 key_op_ctrl)
++{
++ A_STATUS status = A_OK;
++ struct ieee80211req_key *uik = &ar->user_saved_keys.ucast_ik;
++ struct ieee80211req_key *bik = &ar->user_saved_keys.bcast_ik;
++ CRYPTO_TYPE keyType = ar->user_saved_keys.keyType;
++
++ if (IEEE80211_CIPHER_CCKM_KRK != uik->ik_type) {
++ if (NONE_CRYPT == keyType) {
++ goto _reinstall_keys_out;
++ }
++
++ if (uik->ik_keylen) {
++ status = wmi_addKey_cmd(ar->arWmi, uik->ik_keyix,
++ ar->user_saved_keys.keyType, PAIRWISE_USAGE,
++ uik->ik_keylen, (A_UINT8 *)&uik->ik_keyrsc,
++ uik->ik_keydata, key_op_ctrl, SYNC_BEFORE_WMIFLAG);
++ }
++
++ } else {
++ status = wmi_add_krk_cmd(ar->arWmi, uik->ik_keydata);
++ }
++
++ if (IEEE80211_CIPHER_CCKM_KRK != bik->ik_type) {
++ if (NONE_CRYPT == keyType) {
++ goto _reinstall_keys_out;
++ }
++
++ if (bik->ik_keylen) {
++ status = wmi_addKey_cmd(ar->arWmi, bik->ik_keyix,
++ ar->user_saved_keys.keyType, GROUP_USAGE,
++ bik->ik_keylen, (A_UINT8 *)&bik->ik_keyrsc,
++ bik->ik_keydata, key_op_ctrl, NO_SYNC_WMIFLAG);
++ }
++ } else {
++ status = wmi_add_krk_cmd(ar->arWmi, bik->ik_keydata);
++ }
++
++_reinstall_keys_out:
++ ar->user_savedkeys_stat = USER_SAVEDKEYS_STAT_INIT;
++ ar->user_key_ctrl = 0;
++
++ return status;
++}
++#endif /* USER_KEYS */
++
++
++void
++ar6000_dset_open_req(
++ void *context,
++ A_UINT32 id,
++ A_UINT32 targHandle,
++ A_UINT32 targReplyFn,
++ A_UINT32 targReplyArg)
++{
++}
++
++void
++ar6000_dset_close(
++ void *context,
++ A_UINT32 access_cookie)
++{
++ return;
++}
++
++void
++ar6000_dset_data_req(
++ void *context,
++ A_UINT32 accessCookie,
++ A_UINT32 offset,
++ A_UINT32 length,
++ A_UINT32 targBuf,
++ A_UINT32 targReplyFn,
++ A_UINT32 targReplyArg)
++{
++}
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,361 @@
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifndef _AR6000_H_
++#define _AR6000_H_
++
++#include <linux/version.h>
++
++
++#include <linux/autoconf.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/spinlock.h>
++#include <linux/skbuff.h>
++#include <linux/if_ether.h>
++#include <linux/netdevice.h>
++#include <linux/etherdevice.h>
++#include <net/iw_handler.h>
++#include <linux/if_arp.h>
++#include <linux/ip.h>
++#include <asm/semaphore.h>
++#include <linux/wireless.h>
++#include <linux/module.h>
++#include <asm/io.h>
++
++#include <a_config.h>
++#include <athdefs.h>
++#include "a_types.h"
++#include "a_osapi.h"
++#include "htc_api.h"
++#include "wmi.h"
++#include "a_drv.h"
++#include "bmi.h"
++#include <ieee80211.h>
++#include <ieee80211_ioctl.h>
++#include <wlan_api.h>
++#include <wmi_api.h>
++#include "gpio_api.h"
++#include "gpio.h"
++#include <host_version.h>
++#include <linux/rtnetlink.h>
++#include <linux/init.h>
++#include <linux/moduleparam.h>
++#include "AR6Khwreg.h"
++#include "ar6000_api.h"
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++#include <testcmd.h>
++#endif
++
++#include "targaddrs.h"
++#include "dbglog_api.h"
++#include "ar6000_diag.h"
++#include "common_drv.h"
++
++#ifndef __dev_put
++#define __dev_put(dev) dev_put(dev)
++#endif
++
++#ifdef USER_KEYS
++
++#define USER_SAVEDKEYS_STAT_INIT 0
++#define USER_SAVEDKEYS_STAT_RUN 1
++
++// TODO this needs to move into the AR_SOFTC struct
++struct USER_SAVEDKEYS {
++ struct ieee80211req_key ucast_ik;
++ struct ieee80211req_key bcast_ik;
++ CRYPTO_TYPE keyType;
++ A_BOOL keyOk;
++};
++#endif
++
++#define DBG_INFO 0x00000001
++#define DBG_ERROR 0x00000002
++#define DBG_WARNING 0x00000004
++#define DBG_SDIO 0x00000008
++#define DBG_HIF 0x00000010
++#define DBG_HTC 0x00000020
++#define DBG_WMI 0x00000040
++#define DBG_WMI2 0x00000080
++#define DBG_DRIVER 0x00000100
++
++#define DBG_DEFAULTS (DBG_ERROR|DBG_WARNING)
++
++
++#ifdef DEBUG
++#define AR_DEBUG_PRINTF(args...) if (debugdriver) A_PRINTF(args);
++#define AR_DEBUG2_PRINTF(args...) if (debugdriver >= 2) A_PRINTF(args);
++extern int debugdriver;
++#else
++#define AR_DEBUG_PRINTF(args...)
++#define AR_DEBUG2_PRINTF(args...)
++#endif
++
++A_STATUS ar6000_ReadRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data);
++A_STATUS ar6000_WriteRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data);
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++#define MAX_AR6000 1
++#define AR6000_MAX_RX_BUFFERS 16
++#define AR6000_BUFFER_SIZE 1664
++#define AR6000_TX_TIMEOUT 10
++#define AR6000_ETH_ADDR_LEN 6
++#define AR6000_MAX_ENDPOINTS 4
++#define MAX_NODE_NUM 15
++#define MAX_COOKIE_NUM 150
++#define AR6000_HB_CHALLENGE_RESP_FREQ_DEFAULT 1
++#define AR6000_HB_CHALLENGE_RESP_MISS_THRES_DEFAULT 1
++
++enum {
++ DRV_HB_CHALLENGE = 0,
++ APP_HB_CHALLENGE
++};
++
++/* HTC RAW streams */
++typedef enum _HTC_RAW_STREAM_ID {
++ HTC_RAW_STREAM_NOT_MAPPED = -1,
++ HTC_RAW_STREAM_0 = 0,
++ HTC_RAW_STREAM_1 = 1,
++ HTC_RAW_STREAM_2 = 2,
++ HTC_RAW_STREAM_3 = 3,
++ HTC_RAW_STREAM_NUM_MAX
++} HTC_RAW_STREAM_ID;
++
++#define RAW_HTC_READ_BUFFERS_NUM 4
++#define RAW_HTC_WRITE_BUFFERS_NUM 4
++
++typedef struct {
++ int currPtr;
++ int length;
++ unsigned char data[AR6000_BUFFER_SIZE];
++ HTC_PACKET HTCPacket;
++} raw_htc_buffer;
++
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++/*
++ * add TCMD_MODE besides wmi and bypasswmi
++ * in TCMD_MODE, only few TCMD releated wmi commands
++ * counld be hanlder
++ */
++enum {
++ AR6000_WMI_MODE = 0,
++ AR6000_BYPASS_MODE,
++ AR6000_TCMD_MODE,
++ AR6000_WLAN_MODE
++};
++#endif /* CONFIG_HOST_TCMD_SUPPORT */
++
++struct ar_wep_key {
++ A_UINT8 arKeyIndex;
++ A_UINT8 arKeyLen;
++ A_UINT8 arKey[64];
++} ;
++
++struct ar_node_mapping {
++ A_UINT8 macAddress[6];
++ A_UINT8 epId;
++ A_UINT8 txPending;
++};
++
++struct ar_cookie {
++ A_UINT32 arc_bp[2]; /* Must be first field */
++ HTC_PACKET HtcPkt; /* HTC packet wrapper */
++ struct ar_cookie *arc_list_next;
++};
++
++struct ar_hb_chlng_resp {
++ A_TIMER timer;
++ A_UINT32 frequency;
++ A_UINT32 seqNum;
++ A_BOOL outstanding;
++ A_UINT8 missCnt;
++ A_UINT8 missThres;
++};
++
++typedef struct ar6_softc {
++ struct net_device *arNetDev; /* net_device pointer */
++ void *arWmi;
++ int arTxPending[WMI_PRI_MAX_COUNT];
++ int arTotalTxDataPending;
++ A_UINT8 arNumDataEndPts;
++ A_BOOL arWmiEnabled;
++ A_BOOL arWmiReady;
++ A_BOOL arConnected;
++ A_BOOL arRadioSwitch;
++ HTC_HANDLE arHtcTarget;
++ void *arHifDevice;
++ spinlock_t arLock;
++ struct semaphore arSem;
++ int arRxBuffers[WMI_PRI_MAX_COUNT];
++ int arSsidLen;
++ u_char arSsid[32];
++ A_UINT8 arNetworkType;
++ A_UINT8 arDot11AuthMode;
++ A_UINT8 arAuthMode;
++ A_UINT8 arPairwiseCrypto;
++ A_UINT8 arPairwiseCryptoLen;
++ A_UINT8 arGroupCrypto;
++ A_UINT8 arGroupCryptoLen;
++ A_UINT8 arDefTxKeyIndex;
++ struct ar_wep_key arWepKeyList[WMI_MAX_KEY_INDEX + 1];
++ A_UINT8 arBssid[6];
++ A_UINT8 arReqBssid[6];
++ A_UINT16 arChannelHint;
++ A_UINT16 arBssChannel;
++ A_UINT16 arListenInterval;
++ struct ar6000_version arVersion;
++ A_UINT32 arTargetType;
++ A_INT8 arRssi;
++ A_UINT8 arTxPwr;
++ A_BOOL arTxPwrSet;
++ A_INT32 arBitRate;
++ struct net_device_stats arNetStats;
++ struct iw_statistics arIwStats;
++ A_INT8 arNumChannels;
++ A_UINT16 arChannelList[32];
++ A_UINT32 arRegCode;
++ A_BOOL statsUpdatePending;
++ TARGET_STATS arTargetStats;
++ A_INT8 arMaxRetries;
++ A_UINT8 arPhyCapability;
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++ A_UINT8 tcmdRxReport;
++ A_UINT32 tcmdRxTotalPkt;
++ A_INT32 tcmdRxRssi;
++ A_UINT32 tcmdPm;
++ A_UINT32 arTargetMode;
++#endif
++ AR6000_WLAN_STATE arWlanState;
++ struct ar_node_mapping arNodeMap[MAX_NODE_NUM];
++ A_UINT8 arIbssPsEnable;
++ A_UINT8 arNodeNum;
++ A_UINT8 arNexEpId;
++ struct ar_cookie *arCookieList;
++ A_UINT16 arRateMask;
++ A_UINT8 arSkipScan;
++ A_UINT16 arBeaconInterval;
++ A_BOOL arConnectPending;
++ A_BOOL arWmmEnabled;
++ struct ar_hb_chlng_resp arHBChallengeResp;
++ A_UINT8 arKeepaliveConfigured;
++ A_UINT32 arMgmtFilter;
++ HTC_ENDPOINT_ID arWmi2EpMapping[WMI_PRI_MAX_COUNT];
++ WMI_PRI_STREAM_ID arEp2WmiMapping[ENDPOINT_MAX];
++#ifdef HTC_RAW_INTERFACE
++ HTC_ENDPOINT_ID arRaw2EpMapping[HTC_RAW_STREAM_NUM_MAX];
++ HTC_RAW_STREAM_ID arEp2RawMapping[ENDPOINT_MAX];
++ struct semaphore raw_htc_read_sem[HTC_RAW_STREAM_NUM_MAX];
++ struct semaphore raw_htc_write_sem[HTC_RAW_STREAM_NUM_MAX];
++ wait_queue_head_t raw_htc_read_queue[HTC_RAW_STREAM_NUM_MAX];
++ wait_queue_head_t raw_htc_write_queue[HTC_RAW_STREAM_NUM_MAX];
++ raw_htc_buffer raw_htc_read_buffer[HTC_RAW_STREAM_NUM_MAX][RAW_HTC_READ_BUFFERS_NUM];
++ raw_htc_buffer raw_htc_write_buffer[HTC_RAW_STREAM_NUM_MAX][RAW_HTC_WRITE_BUFFERS_NUM];
++ A_BOOL write_buffer_available[HTC_RAW_STREAM_NUM_MAX];
++ A_BOOL read_buffer_available[HTC_RAW_STREAM_NUM_MAX];
++#endif
++ A_BOOL arNetQueueStopped;
++ A_BOOL arRawIfInit;
++ int arDeviceIndex;
++ COMMON_CREDIT_STATE_INFO arCreditStateInfo;
++ A_BOOL arWMIControlEpFull;
++ A_BOOL dbgLogFetchInProgress;
++ A_UCHAR log_buffer[DBGLOG_HOST_LOG_BUFFER_SIZE];
++ A_UINT32 log_cnt;
++ A_UINT32 dbglog_init_done;
++ A_UINT32 arConnectCtrlFlags;
++ A_UINT32 scan_complete;
++#ifdef USER_KEYS
++ A_INT32 user_savedkeys_stat;
++ A_UINT32 user_key_ctrl;
++ struct USER_SAVEDKEYS user_saved_keys;
++#endif
++} AR_SOFTC_T;
++
++
++#define arWMIStream2EndpointID(ar,wmi) (ar)->arWmi2EpMapping[(wmi)]
++#define arSetWMIStream2EndpointIDMap(ar,wmi,ep) \
++{ (ar)->arWmi2EpMapping[(wmi)] = (ep); \
++ (ar)->arEp2WmiMapping[(ep)] = (wmi); }
++#define arEndpoint2WMIStreamID(ar,ep) (ar)->arEp2WmiMapping[(ep)]
++
++#define arRawIfEnabled(ar) (ar)->arRawIfInit
++#define arRawStream2EndpointID(ar,raw) (ar)->arRaw2EpMapping[(raw)]
++#define arSetRawStream2EndpointIDMap(ar,raw,ep) \
++{ (ar)->arRaw2EpMapping[(raw)] = (ep); \
++ (ar)->arEp2RawMapping[(ep)] = (raw); }
++#define arEndpoint2RawStreamID(ar,ep) (ar)->arEp2RawMapping[(ep)]
++
++struct ar_giwscan_param {
++ char *current_ev;
++ char *end_buf;
++ A_BOOL firstPass;
++};
++
++#define AR6000_STAT_INC(ar, stat) (ar->arNetStats.stat++)
++
++#define AR6000_SPIN_LOCK(lock, param) do { \
++ if (irqs_disabled()) { \
++ AR_DEBUG_PRINTF("IRQs disabled:AR6000_LOCK\n"); \
++ } \
++ spin_lock_bh(lock); \
++} while (0)
++
++#define AR6000_SPIN_UNLOCK(lock, param) do { \
++ if (irqs_disabled()) { \
++ AR_DEBUG_PRINTF("IRQs disabled: AR6000_UNLOCK\n"); \
++ } \
++ spin_unlock_bh(lock); \
++} while (0)
++
++int ar6000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
++int ar6000_ioctl_dispatcher(struct net_device *dev, struct ifreq *rq, int cmd);
++void ar6000_ioctl_iwsetup(struct iw_handler_def *def);
++void ar6000_gpio_init(void);
++void ar6000_init_profile_info(AR_SOFTC_T *ar);
++void ar6000_install_static_wep_keys(AR_SOFTC_T *ar);
++int ar6000_init(struct net_device *dev);
++int ar6000_dbglog_get_debug_logs(AR_SOFTC_T *ar);
++A_STATUS ar6000_SetHTCBlockSize(AR_SOFTC_T *ar);
++
++#ifdef HTC_RAW_INTERFACE
++
++#ifndef __user
++#define __user
++#endif
++
++int ar6000_htc_raw_open(AR_SOFTC_T *ar);
++int ar6000_htc_raw_close(AR_SOFTC_T *ar);
++ssize_t ar6000_htc_raw_read(AR_SOFTC_T *ar,
++ HTC_RAW_STREAM_ID StreamID,
++ char __user *buffer, size_t count);
++ssize_t ar6000_htc_raw_write(AR_SOFTC_T *ar,
++ HTC_RAW_STREAM_ID StreamID,
++ char __user *buffer, size_t count);
++
++#endif /* HTC_RAW_INTERFACE */
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _AR6000_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_raw_if.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_raw_if.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,439 @@
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "ar6000_drv.h"
++
++#ifdef HTC_RAW_INTERFACE
++
++static void
++ar6000_htc_raw_read_cb(void *Context, HTC_PACKET *pPacket)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Context;
++ raw_htc_buffer *busy;
++ HTC_RAW_STREAM_ID streamID;
++
++ busy = (raw_htc_buffer *)pPacket->pPktContext;
++ A_ASSERT(busy != NULL);
++
++ if (pPacket->Status == A_ECANCELED) {
++ /*
++ * HTC provides A_ECANCELED status when it doesn't want to be refilled
++ * (probably due to a shutdown)
++ */
++ return;
++ }
++
++ streamID = arEndpoint2RawStreamID(ar,pPacket->Endpoint);
++ A_ASSERT(streamID != HTC_RAW_STREAM_NOT_MAPPED);
++
++#ifdef CF
++ if (down_trylock(&ar->raw_htc_read_sem[streamID])) {
++#else
++ if (down_interruptible(&ar->raw_htc_read_sem[streamID])) {
++#endif /* CF */
++ AR_DEBUG2_PRINTF("Unable to down the semaphore\n");
++ }
++
++ A_ASSERT((pPacket->Status != A_OK) ||
++ (pPacket->pBuffer == (busy->data + HTC_HEADER_LEN)));
++
++ busy->length = pPacket->ActualLength + HTC_HEADER_LEN;
++ busy->currPtr = HTC_HEADER_LEN;
++ ar->read_buffer_available[streamID] = TRUE;
++ //AR_DEBUG_PRINTF("raw read cb: 0x%X 0x%X \n", busy->currPtr,busy->length);
++ up(&ar->raw_htc_read_sem[streamID]);
++
++ /* Signal the waiting process */
++ AR_DEBUG2_PRINTF("Waking up the StreamID(%d) read process\n", streamID);
++ wake_up_interruptible(&ar->raw_htc_read_queue[streamID]);
++}
++
++static void
++ar6000_htc_raw_write_cb(void *Context, HTC_PACKET *pPacket)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Context;
++ raw_htc_buffer *free;
++ HTC_RAW_STREAM_ID streamID;
++
++ free = (raw_htc_buffer *)pPacket->pPktContext;
++ A_ASSERT(free != NULL);
++
++ if (pPacket->Status == A_ECANCELED) {
++ /*
++ * HTC provides A_ECANCELED status when it doesn't want to be refilled
++ * (probably due to a shutdown)
++ */
++ return;
++ }
++
++ streamID = arEndpoint2RawStreamID(ar,pPacket->Endpoint);
++ A_ASSERT(streamID != HTC_RAW_STREAM_NOT_MAPPED);
++
++#ifdef CF
++ if (down_trylock(&ar->raw_htc_write_sem[streamID])) {
++#else
++ if (down_interruptible(&ar->raw_htc_write_sem[streamID])) {
++#endif
++ AR_DEBUG2_PRINTF("Unable to down the semaphore\n");
++ }
++
++ A_ASSERT(pPacket->pBuffer == (free->data + HTC_HEADER_LEN));
++
++ free->length = 0;
++ ar->write_buffer_available[streamID] = TRUE;
++ up(&ar->raw_htc_write_sem[streamID]);
++
++ /* Signal the waiting process */
++ AR_DEBUG2_PRINTF("Waking up the StreamID(%d) write process\n", streamID);
++ wake_up_interruptible(&ar->raw_htc_write_queue[streamID]);
++}
++
++/* connect to a service */
++static A_STATUS ar6000_connect_raw_service(AR_SOFTC_T *ar,
++ HTC_RAW_STREAM_ID StreamID)
++{
++ A_STATUS status;
++ HTC_SERVICE_CONNECT_RESP response;
++ A_UINT8 streamNo;
++ HTC_SERVICE_CONNECT_REQ connect;
++
++ do {
++
++ A_MEMZERO(&connect,sizeof(connect));
++ /* pass the stream ID as meta data to the RAW streams service */
++ streamNo = (A_UINT8)StreamID;
++ connect.pMetaData = &streamNo;
++ connect.MetaDataLength = sizeof(A_UINT8);
++ /* these fields are the same for all endpoints */
++ connect.EpCallbacks.pContext = ar;
++ connect.EpCallbacks.EpTxComplete = ar6000_htc_raw_write_cb;
++ connect.EpCallbacks.EpRecv = ar6000_htc_raw_read_cb;
++ /* simple interface, we don't need these optional callbacks */
++ connect.EpCallbacks.EpRecvRefill = NULL;
++ connect.EpCallbacks.EpSendFull = NULL;
++ connect.MaxSendQueueDepth = RAW_HTC_WRITE_BUFFERS_NUM;
++
++ /* connect to the raw streams service, we may be able to get 1 or more
++ * connections, depending on WHAT is running on the target */
++ connect.ServiceID = HTC_RAW_STREAMS_SVC;
++
++ A_MEMZERO(&response,sizeof(response));
++
++ /* try to connect to the raw stream, it is okay if this fails with
++ * status HTC_SERVICE_NO_MORE_EP */
++ status = HTCConnectService(ar->arHtcTarget,
++ &connect,
++ &response);
++
++ if (A_FAILED(status)) {
++ if (response.ConnectRespCode == HTC_SERVICE_NO_MORE_EP) {
++ AR_DEBUG_PRINTF("HTC RAW , No more streams allowed \n");
++ status = A_OK;
++ }
++ break;
++ }
++
++ /* set endpoint mapping for the RAW HTC streams */
++ arSetRawStream2EndpointIDMap(ar,StreamID,response.Endpoint);
++
++ AR_DEBUG_PRINTF("HTC RAW : stream ID: %d, endpoint: %d\n",
++ StreamID, arRawStream2EndpointID(ar,StreamID));
++
++ } while (FALSE);
++
++ return status;
++}
++
++int ar6000_htc_raw_open(AR_SOFTC_T *ar)
++{
++ A_STATUS status;
++ int streamID, endPt, count2;
++ raw_htc_buffer *buffer;
++ HTC_SERVICE_ID servicepriority;
++
++ A_ASSERT(ar->arHtcTarget != NULL);
++
++ /* wait for target */
++ status = HTCWaitTarget(ar->arHtcTarget);
++
++ if (A_FAILED(status)) {
++ AR_DEBUG_PRINTF("HTCWaitTarget failed (%d)\n", status);
++ return -ENODEV;
++ }
++
++ for (endPt = 0; endPt < ENDPOINT_MAX; endPt++) {
++ ar->arEp2RawMapping[endPt] = HTC_RAW_STREAM_NOT_MAPPED;
++ }
++
++ for (streamID = HTC_RAW_STREAM_0; streamID < HTC_RAW_STREAM_NUM_MAX; streamID++) {
++ /* Initialize the data structures */
++ init_MUTEX(&ar->raw_htc_read_sem[streamID]);
++ init_MUTEX(&ar->raw_htc_write_sem[streamID]);
++ init_waitqueue_head(&ar->raw_htc_read_queue[streamID]);
++ init_waitqueue_head(&ar->raw_htc_write_queue[streamID]);
++
++ /* try to connect to the raw service */
++ status = ar6000_connect_raw_service(ar,streamID);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ if (arRawStream2EndpointID(ar,streamID) == 0) {
++ break;
++ }
++
++ for (count2 = 0; count2 < RAW_HTC_READ_BUFFERS_NUM; count2 ++) {
++ /* Initialize the receive buffers */
++ buffer = &ar->raw_htc_write_buffer[streamID][count2];
++ memset(buffer, 0, sizeof(raw_htc_buffer));
++ buffer = &ar->raw_htc_read_buffer[streamID][count2];
++ memset(buffer, 0, sizeof(raw_htc_buffer));
++
++ SET_HTC_PACKET_INFO_RX_REFILL(&buffer->HTCPacket,
++ buffer,
++ buffer->data,
++ AR6000_BUFFER_SIZE,
++ arRawStream2EndpointID(ar,streamID));
++
++ /* Queue buffers to HTC for receive */
++ if ((status = HTCAddReceivePkt(ar->arHtcTarget, &buffer->HTCPacket)) != A_OK)
++ {
++ BMIInit();
++ return -EIO;
++ }
++ }
++
++ for (count2 = 0; count2 < RAW_HTC_WRITE_BUFFERS_NUM; count2 ++) {
++ /* Initialize the receive buffers */
++ buffer = &ar->raw_htc_write_buffer[streamID][count2];
++ memset(buffer, 0, sizeof(raw_htc_buffer));
++ }
++
++ ar->read_buffer_available[streamID] = FALSE;
++ ar->write_buffer_available[streamID] = TRUE;
++ }
++
++ if (A_FAILED(status)) {
++ return -EIO;
++ }
++
++ AR_DEBUG_PRINTF("HTC RAW, number of streams the target supports: %d \n", streamID);
++
++ servicepriority = HTC_RAW_STREAMS_SVC; /* only 1 */
++
++ /* set callbacks and priority list */
++ HTCSetCreditDistribution(ar->arHtcTarget,
++ ar,
++ NULL, /* use default */
++ NULL, /* use default */
++ &servicepriority,
++ 1);
++
++ /* Start the HTC component */
++ if ((status = HTCStart(ar->arHtcTarget)) != A_OK) {
++ BMIInit();
++ return -EIO;
++ }
++
++ (ar)->arRawIfInit = TRUE;
++
++ return 0;
++}
++
++int ar6000_htc_raw_close(AR_SOFTC_T *ar)
++{
++ A_PRINTF("ar6000_htc_raw_close called \n");
++ HTCStop(ar->arHtcTarget);
++
++ /* reset the device */
++ ar6000_reset_device(ar->arHifDevice, ar->arTargetType);
++ /* Initialize the BMI component */
++ BMIInit();
++
++ return 0;
++}
++
++raw_htc_buffer *
++get_filled_buffer(AR_SOFTC_T *ar, HTC_RAW_STREAM_ID StreamID)
++{
++ int count;
++ raw_htc_buffer *busy;
++
++ /* Check for data */
++ for (count = 0; count < RAW_HTC_READ_BUFFERS_NUM; count ++) {
++ busy = &ar->raw_htc_read_buffer[StreamID][count];
++ if (busy->length) {
++ break;
++ }
++ }
++ if (busy->length) {
++ ar->read_buffer_available[StreamID] = TRUE;
++ } else {
++ ar->read_buffer_available[StreamID] = FALSE;
++ }
++
++ return busy;
++}
++
++ssize_t ar6000_htc_raw_read(AR_SOFTC_T *ar, HTC_RAW_STREAM_ID StreamID,
++ char __user *buffer, size_t length)
++{
++ int readPtr;
++ raw_htc_buffer *busy;
++
++ if (arRawStream2EndpointID(ar,StreamID) == 0) {
++ AR_DEBUG_PRINTF("StreamID(%d) not connected! \n", StreamID);
++ return -EFAULT;
++ }
++
++ if (down_interruptible(&ar->raw_htc_read_sem[StreamID])) {
++ return -ERESTARTSYS;
++ }
++
++ busy = get_filled_buffer(ar,StreamID);
++ while (!ar->read_buffer_available[StreamID]) {
++ up(&ar->raw_htc_read_sem[StreamID]);
++
++ /* Wait for the data */
++ AR_DEBUG2_PRINTF("Sleeping StreamID(%d) read process\n", StreamID);
++ if (wait_event_interruptible(ar->raw_htc_read_queue[StreamID],
++ ar->read_buffer_available[StreamID]))
++ {
++ return -EINTR;
++ }
++ if (down_interruptible(&ar->raw_htc_read_sem[StreamID])) {
++ return -ERESTARTSYS;
++ }
++ busy = get_filled_buffer(ar,StreamID);
++ }
++
++ /* Read the data */
++ readPtr = busy->currPtr;
++ if (length > busy->length - HTC_HEADER_LEN) {
++ length = busy->length - HTC_HEADER_LEN;
++ }
++ if (copy_to_user(buffer, &busy->data[readPtr], length)) {
++ up(&ar->raw_htc_read_sem[StreamID]);
++ return -EFAULT;
++ }
++
++ busy->currPtr += length;
++
++ //AR_DEBUG_PRINTF("raw read ioctl: currPTR : 0x%X 0x%X \n", busy->currPtr,busy->length);
++
++ if (busy->currPtr == busy->length)
++ {
++ busy->currPtr = 0;
++ busy->length = 0;
++ HTC_PACKET_RESET_RX(&busy->HTCPacket);
++ //AR_DEBUG_PRINTF("raw read ioctl: ep for packet:%d \n", busy->HTCPacket.Endpoint);
++ HTCAddReceivePkt(ar->arHtcTarget, &busy->HTCPacket);
++ }
++ ar->read_buffer_available[StreamID] = FALSE;
++ up(&ar->raw_htc_read_sem[StreamID]);
++
++ return length;
++}
++
++static raw_htc_buffer *
++get_free_buffer(AR_SOFTC_T *ar, HTC_ENDPOINT_ID StreamID)
++{
++ int count;
++ raw_htc_buffer *free;
++
++ free = NULL;
++ for (count = 0; count < RAW_HTC_WRITE_BUFFERS_NUM; count ++) {
++ free = &ar->raw_htc_write_buffer[StreamID][count];
++ if (free->length == 0) {
++ break;
++ }
++ }
++ if (!free->length) {
++ ar->write_buffer_available[StreamID] = TRUE;
++ } else {
++ ar->write_buffer_available[StreamID] = FALSE;
++ }
++
++ return free;
++}
++
++ssize_t ar6000_htc_raw_write(AR_SOFTC_T *ar, HTC_RAW_STREAM_ID StreamID,
++ char __user *buffer, size_t length)
++{
++ int writePtr;
++ raw_htc_buffer *free;
++
++ if (arRawStream2EndpointID(ar,StreamID) == 0) {
++ AR_DEBUG_PRINTF("StreamID(%d) not connected! \n", StreamID);
++ return -EFAULT;
++ }
++
++ if (down_interruptible(&ar->raw_htc_write_sem[StreamID])) {
++ return -ERESTARTSYS;
++ }
++
++ /* Search for a free buffer */
++ free = get_free_buffer(ar,StreamID);
++
++ /* Check if there is space to write else wait */
++ while (!ar->write_buffer_available[StreamID]) {
++ up(&ar->raw_htc_write_sem[StreamID]);
++
++ /* Wait for buffer to become free */
++ AR_DEBUG2_PRINTF("Sleeping StreamID(%d) write process\n", StreamID);
++ if (wait_event_interruptible(ar->raw_htc_write_queue[StreamID],
++ ar->write_buffer_available[StreamID]))
++ {
++ return -EINTR;
++ }
++ if (down_interruptible(&ar->raw_htc_write_sem[StreamID])) {
++ return -ERESTARTSYS;
++ }
++ free = get_free_buffer(ar,StreamID);
++ }
++
++ /* Send the data */
++ writePtr = HTC_HEADER_LEN;
++ if (length > (AR6000_BUFFER_SIZE - HTC_HEADER_LEN)) {
++ length = AR6000_BUFFER_SIZE - HTC_HEADER_LEN;
++ }
++
++ if (copy_from_user(&free->data[writePtr], buffer, length)) {
++ up(&ar->raw_htc_read_sem[StreamID]);
++ return -EFAULT;
++ }
++
++ free->length = length;
++
++ SET_HTC_PACKET_INFO_TX(&free->HTCPacket,
++ free,
++ &free->data[writePtr],
++ length,
++ arRawStream2EndpointID(ar,StreamID),
++ AR6K_DATA_PKT_TAG);
++
++ HTCSendPkt(ar->arHtcTarget,&free->HTCPacket);
++
++ ar->write_buffer_available[StreamID] = FALSE;
++ up(&ar->raw_htc_write_sem[StreamID]);
++
++ return length;
++}
++#endif /* HTC_RAW_INTERFACE */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6xapi_linux.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6xapi_linux.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,128 @@
++#ifndef _AR6XAPI_LINUX_H
++#define _AR6XAPI_LINUX_H
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++struct ar6_softc;
++
++void ar6000_ready_event(void *devt, A_UINT8 *datap, A_UINT8 phyCap);
++A_UINT8 ar6000_iptos_to_userPriority(A_UINT8 *pkt);
++A_STATUS ar6000_control_tx(void *devt, void *osbuf, WMI_PRI_STREAM_ID streamID);
++void ar6000_connect_event(struct ar6_softc *ar, A_UINT16 channel,
++ A_UINT8 *bssid, A_UINT16 listenInterval,
++ A_UINT16 beaconInterval, NETWORK_TYPE networkType,
++ A_UINT8 beaconIeLen, A_UINT8 assocReqLen,
++ A_UINT8 assocRespLen,A_UINT8 *assocInfo);
++void ar6000_disconnect_event(struct ar6_softc *ar, A_UINT8 reason,
++ A_UINT8 *bssid, A_UINT8 assocRespLen,
++ A_UINT8 *assocInfo, A_UINT16 protocolReasonStatus);
++void ar6000_tkip_micerr_event(struct ar6_softc *ar, A_UINT8 keyid,
++ A_BOOL ismcast);
++void ar6000_bitrate_rx(void *devt, A_INT32 rateKbps);
++void ar6000_channelList_rx(void *devt, A_INT8 numChan, A_UINT16 *chanList);
++void ar6000_regDomain_event(struct ar6_softc *ar, A_UINT32 regCode);
++void ar6000_txPwr_rx(void *devt, A_UINT8 txPwr);
++void ar6000_keepalive_rx(void *devt, A_UINT8 configured);
++void ar6000_neighborReport_event(struct ar6_softc *ar, int numAps,
++ WMI_NEIGHBOR_INFO *info);
++void ar6000_set_numdataendpts(struct ar6_softc *ar, A_UINT32 num);
++void ar6000_scanComplete_event(struct ar6_softc *ar, A_STATUS status);
++void ar6000_targetStats_event(struct ar6_softc *ar, WMI_TARGET_STATS *pStats);
++void ar6000_rssiThreshold_event(struct ar6_softc *ar,
++ WMI_RSSI_THRESHOLD_VAL newThreshold,
++ A_INT16 rssi);
++void ar6000_reportError_event(struct ar6_softc *, WMI_TARGET_ERROR_VAL errorVal);
++void ar6000_cac_event(struct ar6_softc *ar, A_UINT8 ac, A_UINT8 cac_indication,
++ A_UINT8 statusCode, A_UINT8 *tspecSuggestion);
++void ar6000_hbChallengeResp_event(struct ar6_softc *, A_UINT32 cookie, A_UINT32 source);
++void
++ar6000_roam_tbl_event(struct ar6_softc *ar, WMI_TARGET_ROAM_TBL *pTbl);
++
++void
++ar6000_roam_data_event(struct ar6_softc *ar, WMI_TARGET_ROAM_DATA *p);
++
++void
++ar6000_wow_list_event(struct ar6_softc *ar, A_UINT8 num_filters,
++ WMI_GET_WOW_LIST_REPLY *wow_reply);
++
++void ar6000_pmkid_list_event(void *devt, A_UINT8 numPMKID,
++ WMI_PMKID *pmkidList);
++
++void ar6000_gpio_intr_rx(A_UINT32 intr_mask, A_UINT32 input_values);
++void ar6000_gpio_data_rx(A_UINT32 reg_id, A_UINT32 value);
++void ar6000_gpio_ack_rx(void);
++
++void ar6000_dbglog_init_done(struct ar6_softc *ar);
++
++#ifdef SEND_EVENT_TO_APP
++void ar6000_send_event_to_app(struct ar6_softc *ar, A_UINT16 eventId, A_UINT8 *datap, int len);
++#endif
++
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++void ar6000_tcmd_rx_report_event(void *devt, A_UINT8 * results, int len);
++#endif
++
++void ar6000_tx_retry_err_event(void *devt);
++
++void ar6000_snrThresholdEvent_rx(void *devt,
++ WMI_SNR_THRESHOLD_VAL newThreshold,
++ A_UINT8 snr);
++
++void ar6000_lqThresholdEvent_rx(void *devt, WMI_LQ_THRESHOLD_VAL range, A_UINT8 lqVal);
++
++
++void ar6000_ratemask_rx(void *devt, A_UINT16 ratemask);
++
++A_STATUS ar6000_get_driver_cfg(struct net_device *dev,
++ A_UINT16 cfgParam,
++ void *result);
++void ar6000_bssInfo_event_rx(struct ar6_softc *ar, A_UINT8 *data, int len);
++
++void ar6000_dbglog_event(struct ar6_softc *ar, A_UINT32 dropped,
++ A_INT8 *buffer, A_UINT32 length);
++
++int ar6000_dbglog_get_debug_logs(struct ar6_softc *ar);
++
++void ar6000_indicate_tx_activity(void *devt, A_UINT8 trafficClass, A_BOOL Active);
++
++void ar6000_dset_open_req(void *devt,
++ A_UINT32 id,
++ A_UINT32 targ_handle,
++ A_UINT32 targ_reply_fn,
++ A_UINT32 targ_reply_arg);
++void ar6000_dset_close(void *devt, A_UINT32 access_cookie);
++void ar6000_dset_data_req(void *devt,
++ A_UINT32 access_cookie,
++ A_UINT32 offset,
++ A_UINT32 length,
++ A_UINT32 targ_buf,
++ A_UINT32 targ_reply_fn,
++ A_UINT32 targ_reply_arg);
++
++
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/athdrv_linux.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/athdrv_linux.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,993 @@
++/*
++ * Copyright (c) 2004-2006 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifndef _ATHDRV_LINUX_H
++#define _ATHDRV_LINUX_H
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++
++/*
++ * There are two types of ioctl's here: Standard ioctls and
++ * eXtended ioctls. All extended ioctls (XIOCTL) are multiplexed
++ * off of the single ioctl command, AR6000_IOCTL_EXTENDED. The
++ * arguments for every XIOCTL starts with a 32-bit command word
++ * that is used to select which extended ioctl is in use. After
++ * the command word are command-specific arguments.
++ */
++
++/* Linux standard Wireless Extensions, private ioctl interfaces */
++#define IEEE80211_IOCTL_SETPARAM (SIOCIWFIRSTPRIV+0)
++#define IEEE80211_IOCTL_GETPARAM (SIOCIWFIRSTPRIV+1)
++#define IEEE80211_IOCTL_SETKEY (SIOCIWFIRSTPRIV+2)
++#define IEEE80211_IOCTL_SETWMMPARAMS (SIOCIWFIRSTPRIV+3)
++#define IEEE80211_IOCTL_DELKEY (SIOCIWFIRSTPRIV+4)
++#define IEEE80211_IOCTL_GETWMMPARAMS (SIOCIWFIRSTPRIV+5)
++#define IEEE80211_IOCTL_SETOPTIE (SIOCIWFIRSTPRIV+6)
++#define IEEE80211_IOCTL_SETMLME (SIOCIWFIRSTPRIV+7)
++//#define IEEE80211_IOCTL_GETOPTIE (SIOCIWFIRSTPRIV+7)
++#define IEEE80211_IOCTL_ADDPMKID (SIOCIWFIRSTPRIV+8)
++//#define IEEE80211_IOCTL_SETAUTHALG (SIOCIWFIRSTPRIV+10)
++#define IEEE80211_IOCTL_LASTONE (SIOCIWFIRSTPRIV+9)
++
++
++
++/* ====WMI Ioctls==== */
++/*
++ *
++ * Many ioctls simply provide WMI services to application code:
++ * an application makes such an ioctl call with a set of arguments
++ * that are packaged into the corresponding WMI message, and sent
++ * to the Target.
++ */
++
++#define AR6000_IOCTL_WMI_GETREV (SIOCIWFIRSTPRIV+10)
++/*
++ * arguments:
++ * ar6000_version *revision
++ */
++
++#define AR6000_IOCTL_WMI_SETPWR (SIOCIWFIRSTPRIV+11)
++/*
++ * arguments:
++ * WMI_POWER_MODE_CMD pwrModeCmd (see include/wmi.h)
++ * uses: WMI_SET_POWER_MODE_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_SETSCAN (SIOCIWFIRSTPRIV+12)
++/*
++ * arguments:
++ * WMI_SCAN_PARAMS_CMD scanParams (see include/wmi.h)
++ * uses: WMI_SET_SCAN_PARAMS_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_SETLISTENINT (SIOCIWFIRSTPRIV+13)
++/*
++ * arguments:
++ * UINT32 listenInterval
++ * uses: WMI_SET_LISTEN_INT_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_SETBSSFILTER (SIOCIWFIRSTPRIV+14)
++/*
++ * arguments:
++ * WMI_BSS_FILTER filter (see include/wmi.h)
++ * uses: WMI_SET_BSS_FILTER_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_SET_CHANNELPARAMS (SIOCIWFIRSTPRIV+16)
++/*
++ * arguments:
++ * WMI_CHANNEL_PARAMS_CMD chParams
++ * uses: WMI_SET_CHANNEL_PARAMS_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_SET_PROBEDSSID (SIOCIWFIRSTPRIV+17)
++/*
++ * arguments:
++ * WMI_PROBED_SSID_CMD probedSsids (see include/wmi.h)
++ * uses: WMI_SETPROBED_SSID_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_SET_PMPARAMS (SIOCIWFIRSTPRIV+18)
++/*
++ * arguments:
++ * WMI_POWER_PARAMS_CMD powerParams (see include/wmi.h)
++ * uses: WMI_SET_POWER_PARAMS_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_SET_BADAP (SIOCIWFIRSTPRIV+19)
++/*
++ * arguments:
++ * WMI_ADD_BAD_AP_CMD badAPs (see include/wmi.h)
++ * uses: WMI_ADD_BAD_AP_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_GET_QOS_QUEUE (SIOCIWFIRSTPRIV+20)
++/*
++ * arguments:
++ * ar6000_queuereq queueRequest (see below)
++ */
++
++#define AR6000_IOCTL_WMI_CREATE_QOS (SIOCIWFIRSTPRIV+21)
++/*
++ * arguments:
++ * WMI_CREATE_PSTREAM createPstreamCmd (see include/wmi.h)
++ * uses: WMI_CREATE_PSTREAM_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_DELETE_QOS (SIOCIWFIRSTPRIV+22)
++/*
++ * arguments:
++ * WMI_DELETE_PSTREAM_CMD deletePstreamCmd (see include/wmi.h)
++ * uses: WMI_DELETE_PSTREAM_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_SET_SNRTHRESHOLD (SIOCIWFIRSTPRIV+23)
++/*
++ * arguments:
++ * WMI_SNR_THRESHOLD_PARAMS_CMD thresholdParams (see include/wmi.h)
++ * uses: WMI_SNR_THRESHOLD_PARAMS_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_SET_ERROR_REPORT_BITMASK (SIOCIWFIRSTPRIV+24)
++/*
++ * arguments:
++ * WMI_TARGET_ERROR_REPORT_BITMASK errorReportBitMask (see include/wmi.h)
++ * uses: WMI_TARGET_ERROR_REPORT_BITMASK_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_GET_TARGET_STATS (SIOCIWFIRSTPRIV+25)
++/*
++ * arguments:
++ * TARGET_STATS *targetStats (see below)
++ * uses: WMI_GET_STATISTICS_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_SET_ASSOC_INFO (SIOCIWFIRSTPRIV+26)
++/*
++ * arguments:
++ * WMI_SET_ASSOC_INFO_CMD setAssocInfoCmd
++ * uses: WMI_SET_ASSOC_INFO_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_SET_ACCESS_PARAMS (SIOCIWFIRSTPRIV+27)
++/*
++ * arguments:
++ * WMI_SET_ACCESS_PARAMS_CMD setAccessParams (see include/wmi.h)
++ * uses: WMI_SET_ACCESS_PARAMS_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_SET_BMISS_TIME (SIOCIWFIRSTPRIV+28)
++/*
++ * arguments:
++ * UINT32 beaconMissTime
++ * uses: WMI_SET_BMISS_TIME_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_SET_DISC_TIMEOUT (SIOCIWFIRSTPRIV+29)
++/*
++ * arguments:
++ * WMI_DISC_TIMEOUT_CMD disconnectTimeoutCmd (see include/wmi.h)
++ * uses: WMI_SET_DISC_TIMEOUT_CMDID
++ */
++
++#define AR6000_IOCTL_WMI_SET_IBSS_PM_CAPS (SIOCIWFIRSTPRIV+30)
++/*
++ * arguments:
++ * WMI_IBSS_PM_CAPS_CMD ibssPowerMgmtCapsCmd
++ * uses: WMI_SET_IBSS_PM_CAPS_CMDID
++ */
++
++/*
++ * There is a very small space available for driver-private
++ * wireless ioctls. In order to circumvent this limitation,
++ * we multiplex a bunch of ioctls (XIOCTLs) on top of a
++ * single AR6000_IOCTL_EXTENDED ioctl.
++ */
++#define AR6000_IOCTL_EXTENDED (SIOCIWFIRSTPRIV+31)
++
++
++/* ====BMI Extended Ioctls==== */
++
++#define AR6000_XIOCTL_BMI_DONE 1
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_BMI_DONE)
++ * uses: BMI_DONE
++ */
++
++#define AR6000_XIOCTL_BMI_READ_MEMORY 2
++/*
++ * arguments:
++ * union {
++ * struct {
++ * UINT32 cmd (AR6000_XIOCTL_BMI_READ_MEMORY)
++ * UINT32 address
++ * UINT32 length
++ * }
++ * char results[length]
++ * }
++ * uses: BMI_READ_MEMORY
++ */
++
++#define AR6000_XIOCTL_BMI_WRITE_MEMORY 3
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_BMI_WRITE_MEMORY)
++ * UINT32 address
++ * UINT32 length
++ * char data[length]
++ * uses: BMI_WRITE_MEMORY
++ */
++
++#define AR6000_XIOCTL_BMI_EXECUTE 4
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_BMI_EXECUTE)
++ * UINT32 TargetAddress
++ * UINT32 parameter
++ * uses: BMI_EXECUTE
++ */
++
++#define AR6000_XIOCTL_BMI_SET_APP_START 5
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_BMI_SET_APP_START)
++ * UINT32 TargetAddress
++ * uses: BMI_SET_APP_START
++ */
++
++#define AR6000_XIOCTL_BMI_READ_SOC_REGISTER 6
++/*
++ * arguments:
++ * union {
++ * struct {
++ * UINT32 cmd (AR6000_XIOCTL_BMI_READ_SOC_REGISTER)
++ * UINT32 TargetAddress, 32-bit aligned
++ * }
++ * UINT32 result
++ * }
++ * uses: BMI_READ_SOC_REGISTER
++ */
++
++#define AR6000_XIOCTL_BMI_WRITE_SOC_REGISTER 7
++/*
++ * arguments:
++ * struct {
++ * UINT32 cmd (AR6000_XIOCTL_BMI_WRITE_SOC_REGISTER)
++ * UINT32 TargetAddress, 32-bit aligned
++ * UINT32 newValue
++ * }
++ * uses: BMI_WRITE_SOC_REGISTER
++ */
++
++#define AR6000_XIOCTL_BMI_TEST 8
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_BMI_TEST)
++ * UINT32 address
++ * UINT32 length
++ * UINT32 count
++ */
++
++
++
++/* Historical Host-side DataSet support */
++#define AR6000_XIOCTL_UNUSED9 9
++#define AR6000_XIOCTL_UNUSED10 10
++#define AR6000_XIOCTL_UNUSED11 11
++
++/* ====Misc Extended Ioctls==== */
++
++#define AR6000_XIOCTL_FORCE_TARGET_RESET 12
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_FORCE_TARGET_RESET)
++ */
++
++
++#ifdef HTC_RAW_INTERFACE
++/* HTC Raw Interface Ioctls */
++#define AR6000_XIOCTL_HTC_RAW_OPEN 13
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_HTC_RAW_OPEN)
++ */
++
++#define AR6000_XIOCTL_HTC_RAW_CLOSE 14
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_HTC_RAW_CLOSE)
++ */
++
++#define AR6000_XIOCTL_HTC_RAW_READ 15
++/*
++ * arguments:
++ * union {
++ * struct {
++ * UINT32 cmd (AR6000_XIOCTL_HTC_RAW_READ)
++ * UINT32 mailboxID
++ * UINT32 length
++ * }
++ * results[length]
++ * }
++ */
++
++#define AR6000_XIOCTL_HTC_RAW_WRITE 16
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_HTC_RAW_WRITE)
++ * UINT32 mailboxID
++ * UINT32 length
++ * char buffer[length]
++ */
++#endif /* HTC_RAW_INTERFACE */
++
++#define AR6000_XIOCTL_CHECK_TARGET_READY 17
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_CHECK_TARGET_READY)
++ */
++
++
++
++/* ====GPIO (General Purpose I/O) Extended Ioctls==== */
++
++#define AR6000_XIOCTL_GPIO_OUTPUT_SET 18
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_GPIO_OUTPUT_SET)
++ * ar6000_gpio_output_set_cmd_s (see below)
++ * uses: WMIX_GPIO_OUTPUT_SET_CMDID
++ */
++
++#define AR6000_XIOCTL_GPIO_INPUT_GET 19
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_GPIO_INPUT_GET)
++ * uses: WMIX_GPIO_INPUT_GET_CMDID
++ */
++
++#define AR6000_XIOCTL_GPIO_REGISTER_SET 20
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_GPIO_REGISTER_SET)
++ * ar6000_gpio_register_cmd_s (see below)
++ * uses: WMIX_GPIO_REGISTER_SET_CMDID
++ */
++
++#define AR6000_XIOCTL_GPIO_REGISTER_GET 21
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_GPIO_REGISTER_GET)
++ * ar6000_gpio_register_cmd_s (see below)
++ * uses: WMIX_GPIO_REGISTER_GET_CMDID
++ */
++
++#define AR6000_XIOCTL_GPIO_INTR_ACK 22
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_GPIO_INTR_ACK)
++ * ar6000_cpio_intr_ack_cmd_s (see below)
++ * uses: WMIX_GPIO_INTR_ACK_CMDID
++ */
++
++#define AR6000_XIOCTL_GPIO_INTR_WAIT 23
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_GPIO_INTR_WAIT)
++ */
++
++
++
++/* ====more wireless commands==== */
++
++#define AR6000_XIOCTL_SET_ADHOC_BSSID 24
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_SET_ADHOC_BSSID)
++ * WMI_SET_ADHOC_BSSID_CMD setAdHocBssidCmd (see include/wmi.h)
++ */
++
++#define AR6000_XIOCTL_SET_OPT_MODE 25
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_SET_OPT_MODE)
++ * WMI_SET_OPT_MODE_CMD setOptModeCmd (see include/wmi.h)
++ * uses: WMI_SET_OPT_MODE_CMDID
++ */
++
++#define AR6000_XIOCTL_OPT_SEND_FRAME 26
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_OPT_SEND_FRAME)
++ * WMI_OPT_TX_FRAME_CMD optTxFrameCmd (see include/wmi.h)
++ * uses: WMI_OPT_TX_FRAME_CMDID
++ */
++
++#define AR6000_XIOCTL_SET_ADHOC_BEACON_INTVAL 27
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_SET_ADHOC_BEACON_INTVAL)
++ * WMI_BEACON_INT_CMD beaconIntCmd (see include/wmi.h)
++ * uses: WMI_SET_BEACON_INT_CMDID
++ */
++
++
++#define IEEE80211_IOCTL_SETAUTHALG 28
++
++
++#define AR6000_XIOCTL_SET_VOICE_PKT_SIZE 29
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_SET_VOICE_PKT_SIZE)
++ * WMI_SET_VOICE_PKT_SIZE_CMD setVoicePktSizeCmd (see include/wmi.h)
++ * uses: WMI_SET_VOICE_PKT_SIZE_CMDID
++ */
++
++
++#define AR6000_XIOCTL_SET_MAX_SP 30
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_SET_MAX_SP)
++ * WMI_SET_MAX_SP_LEN_CMD maxSPLen(see include/wmi.h)
++ * uses: WMI_SET_MAX_SP_LEN_CMDID
++ */
++
++#define AR6000_XIOCTL_WMI_GET_ROAM_TBL 31
++
++#define AR6000_XIOCTL_WMI_SET_ROAM_CTRL 32
++
++#define AR6000_XIOCTRL_WMI_SET_POWERSAVE_TIMERS 33
++
++
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTRL_WMI_SET_POWERSAVE_TIMERS)
++ * WMI_SET_POWERSAVE_TIMERS_CMD powerSaveTimers(see include/wmi.h)
++ * WMI_SET_POWERSAVE_TIMERS_CMDID
++ */
++
++#define AR6000_XIOCTRL_WMI_GET_POWER_MODE 34
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTRL_WMI_GET_POWER_MODE)
++ */
++
++#define AR6000_XIOCTRL_WMI_SET_WLAN_STATE 35
++typedef enum {
++ WLAN_DISABLED,
++ WLAN_ENABLED
++} AR6000_WLAN_STATE;
++/*
++ * arguments:
++ * enable/disable
++ */
++
++#define AR6000_XIOCTL_WMI_GET_ROAM_DATA 36
++
++#define AR6000_XIOCTL_WMI_SETRETRYLIMITS 37
++/*
++ * arguments:
++ * WMI_SET_RETRY_LIMITS_CMD ibssSetRetryLimitsCmd
++ * uses: WMI_SET_RETRY_LIMITS_CMDID
++ */
++
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++/* ====extended commands for radio test ==== */
++
++#define AR6000_XIOCTL_TCMD_CONT_TX 38
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_TCMD_CONT_TX)
++ * WMI_TCMD_CONT_TX_CMD contTxCmd (see include/wmi.h)
++ * uses: WMI_TCMD_CONT_TX_CMDID
++ */
++
++#define AR6000_XIOCTL_TCMD_CONT_RX 39
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_TCMD_CONT_RX)
++ * WMI_TCMD_CONT_RX_CMD rxCmd (see include/wmi.h)
++ * uses: WMI_TCMD_CONT_RX_CMDID
++ */
++
++#define AR6000_XIOCTL_TCMD_PM 40
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_TCMD_PM)
++ * WMI_TCMD_PM_CMD pmCmd (see include/wmi.h)
++ * uses: WMI_TCMD_PM_CMDID
++ */
++
++#endif /* CONFIG_HOST_TCMD_SUPPORT */
++
++#define AR6000_XIOCTL_WMI_STARTSCAN 41
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_WMI_STARTSCAN)
++ * UINT8 scanType
++ * UINT8 scanConnected
++ * A_BOOL forceFgScan
++ * uses: WMI_START_SCAN_CMDID
++ */
++
++#define AR6000_XIOCTL_WMI_SETFIXRATES 42
++
++#define AR6000_XIOCTL_WMI_GETFIXRATES 43
++
++
++#define AR6000_XIOCTL_WMI_SET_RSSITHRESHOLD 44
++/*
++ * arguments:
++ * WMI_RSSI_THRESHOLD_PARAMS_CMD thresholdParams (see include/wmi.h)
++ * uses: WMI_RSSI_THRESHOLD_PARAMS_CMDID
++ */
++
++#define AR6000_XIOCTL_WMI_CLR_RSSISNR 45
++/*
++ * arguments:
++ * WMI_CLR_RSSISNR_CMD thresholdParams (see include/wmi.h)
++ * uses: WMI_CLR_RSSISNR_CMDID
++ */
++
++#define AR6000_XIOCTL_WMI_SET_LQTHRESHOLD 46
++/*
++ * arguments:
++ * WMI_LQ_THRESHOLD_PARAMS_CMD thresholdParams (see include/wmi.h)
++ * uses: WMI_LQ_THRESHOLD_PARAMS_CMDID
++ */
++
++#define AR6000_XIOCTL_WMI_SET_RTS 47
++/*
++ * arguments:
++ * WMI_SET_RTS_MODE_CMD (see include/wmi.h)
++ * uses: WMI_SET_RTS_MODE_CMDID
++ */
++
++#define AR6000_XIOCTL_WMI_SET_LPREAMBLE 48
++
++#define AR6000_XIOCTL_WMI_SET_AUTHMODE 49
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_WMI_SET_AUTHMODE)
++ * UINT8 mode
++ * uses: WMI_SET_RECONNECT_AUTH_MODE_CMDID
++ */
++
++#define AR6000_XIOCTL_WMI_SET_REASSOCMODE 50
++
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_WMI_SET_WMM)
++ * UINT8 mode
++ * uses: WMI_SET_WMM_CMDID
++ */
++#define AR6000_XIOCTL_WMI_SET_WMM 51
++
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_WMI_SET_HB_CHALLENGE_RESP_PARAMS)
++ * UINT32 frequency
++ * UINT8 threshold
++ */
++#define AR6000_XIOCTL_WMI_SET_HB_CHALLENGE_RESP_PARAMS 52
++
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_WMI_GET_HB_CHALLENGE_RESP)
++ * UINT32 cookie
++ */
++#define AR6000_XIOCTL_WMI_GET_HB_CHALLENGE_RESP 53
++
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_WMI_GET_RD)
++ * UINT32 regDomain
++ */
++#define AR6000_XIOCTL_WMI_GET_RD 54
++
++#define AR6000_XIOCTL_DIAG_READ 55
++
++#define AR6000_XIOCTL_DIAG_WRITE 56
++
++/*
++ * arguments cmd (AR6000_XIOCTL_SET_TXOP)
++ * WMI_TXOP_CFG txopEnable
++ */
++#define AR6000_XIOCTL_WMI_SET_TXOP 57
++
++#ifdef USER_KEYS
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_USER_SETKEYS)
++ * UINT32 keyOpCtrl
++ * uses AR6000_USER_SETKEYS_INFO
++ */
++#define AR6000_XIOCTL_USER_SETKEYS 58
++#endif /* USER_KEYS */
++
++#define AR6000_XIOCTL_WMI_SET_KEEPALIVE 59
++/*
++ * arguments:
++ * UINT8 cmd (AR6000_XIOCTL_WMI_SET_KEEPALIVE)
++ * UINT8 keepaliveInterval
++ * uses: WMI_SET_KEEPALIVE_CMDID
++ */
++
++#define AR6000_XIOCTL_WMI_GET_KEEPALIVE 60
++/*
++ * arguments:
++ * UINT8 cmd (AR6000_XIOCTL_WMI_GET_KEEPALIVE)
++ * UINT8 keepaliveInterval
++ * A_BOOL configured
++ * uses: WMI_GET_KEEPALIVE_CMDID
++ */
++
++/* ====ROM Patching Extended Ioctls==== */
++
++#define AR6000_XIOCTL_BMI_ROMPATCH_INSTALL 61
++/*
++ * arguments:
++ * union {
++ * struct {
++ * UINT32 cmd (AR6000_XIOCTL_BMI_ROMPATCH_INSTALL)
++ * UINT32 ROM Address
++ * UINT32 RAM Address
++ * UINT32 number of bytes
++ * UINT32 activate? (0 or 1)
++ * }
++ * A_UINT32 resulting rompatch ID
++ * }
++ * uses: BMI_ROMPATCH_INSTALL
++ */
++
++#define AR6000_XIOCTL_BMI_ROMPATCH_UNINSTALL 62
++/*
++ * arguments:
++ * struct {
++ * UINT32 cmd (AR6000_XIOCTL_BMI_ROMPATCH_UNINSTALL)
++ * UINT32 rompatch ID
++ * }
++ * uses: BMI_ROMPATCH_UNINSTALL
++ */
++
++#define AR6000_XIOCTL_BMI_ROMPATCH_ACTIVATE 63
++/*
++ * arguments:
++ * struct {
++ * UINT32 cmd (AR6000_XIOCTL_BMI_ROMPATCH_ACTIVATE)
++ * UINT32 rompatch count
++ * UINT32 rompatch IDs[rompatch count]
++ * }
++ * uses: BMI_ROMPATCH_ACTIVATE
++ */
++
++#define AR6000_XIOCTL_BMI_ROMPATCH_DEACTIVATE 64
++/*
++ * arguments:
++ * struct {
++ * UINT32 cmd (AR6000_XIOCTL_BMI_ROMPATCH_DEACTIVATE)
++ * UINT32 rompatch count
++ * UINT32 rompatch IDs[rompatch count]
++ * }
++ * uses: BMI_ROMPATCH_DEACTIVATE
++ */
++
++#define AR6000_XIOCTL_WMI_SET_APPIE 65
++/*
++ * arguments:
++ * struct {
++ * UINT32 cmd (AR6000_XIOCTL_WMI_SET_APPIE)
++ * UINT32 app_frmtype;
++ * UINT32 app_buflen;
++ * UINT8 app_buf[];
++ * }
++ */
++#define AR6000_XIOCTL_WMI_SET_MGMT_FRM_RX_FILTER 66
++/*
++ * arguments:
++ * A_UINT32 filter_type;
++ */
++
++#define AR6000_XIOCTL_DBGLOG_CFG_MODULE 67
++
++#define AR6000_XIOCTL_DBGLOG_GET_DEBUG_LOGS 68
++
++#define AR6000_XIOCTL_WMI_SET_WSC_STATUS 70
++/*
++ * arguments:
++ * A_UINT32 wsc_status;
++ * (WSC_REG_INACTIVE or WSC_REG_ACTIVE)
++ */
++
++/*
++ * arguments:
++ * struct {
++ * A_UINT8 streamType;
++ * A_UINT8 status;
++ * }
++ * uses: WMI_SET_BT_STATUS_CMDID
++ */
++#define AR6000_XIOCTL_WMI_SET_BT_STATUS 71
++
++/*
++ * arguments:
++ * struct {
++ * A_UINT8 paramType;
++ * union {
++ * A_UINT8 noSCOPkts;
++ * BT_PARAMS_A2DP a2dpParams;
++ * BT_COEX_REGS regs;
++ * };
++ * }
++ * uses: WMI_SET_BT_PARAM_CMDID
++ */
++#define AR6000_XIOCTL_WMI_SET_BT_PARAMS 72
++
++#define AR6000_XIOCTL_WMI_SET_HOST_SLEEP_MODE 73
++#define AR6000_XIOCTL_WMI_SET_WOW_MODE 74
++#define AR6000_XIOCTL_WMI_GET_WOW_LIST 75
++#define AR6000_XIOCTL_WMI_ADD_WOW_PATTERN 76
++#define AR6000_XIOCTL_WMI_DEL_WOW_PATTERN 77
++
++
++
++#define AR6000_XIOCTL_TARGET_INFO 78
++/*
++ * arguments:
++ * UINT32 cmd (AR6000_XIOCTL_TARGET_INFO)
++ * A_UINT32 TargetVersion (returned)
++ * A_UINT32 TargetType (returned)
++ * (See also bmi_msg.h target_ver and target_type)
++ */
++
++#define AR6000_XIOCTL_DUMP_HTC_CREDIT_STATE 79
++/*
++ * arguments:
++ * none
++ */
++
++#define AR6000_XIOCTL_TRAFFIC_ACTIVITY_CHANGE 80
++/*
++ * This ioctl is used to emulate traffic activity
++ * timeouts. Activity/inactivity will trigger the driver
++ * to re-balance credits.
++ *
++ * arguments:
++ * ar6000_traffic_activity_change
++ */
++
++#define AR6000_XIOCTL_WMI_SET_CONNECT_CTRL_FLAGS 81
++/*
++ * This ioctl is used to set the connect control flags
++ *
++ * arguments:
++ * A_UINT32 connectCtrlFlags
++ */
++
++#define AR6000_XIOCTL_WMI_SET_AKMP_PARAMS 82
++/*
++ * This IOCTL sets any Authentication,Key Management and Protection
++ * related parameters. This is used along with the information set in
++ * Connect Command.
++ * Currently this enables Multiple PMKIDs to an AP.
++ *
++ * arguments:
++ * struct {
++ * A_UINT32 akmpInfo;
++ * }
++ * uses: WMI_SET_AKMP_PARAMS_CMD
++ */
++
++#define AR6000_XIOCTL_WMI_GET_PMKID_LIST 83
++
++#define AR6000_XIOCTL_WMI_SET_PMKID_LIST 84
++/*
++ * This IOCTL is used to set a list of PMKIDs. This list of
++ * PMKIDs is used in the [Re]AssocReq Frame. This list is used
++ * only if the MultiPMKID option is enabled via the
++ * AR6000_XIOCTL_WMI_SET_AKMP_PARAMS IOCTL.
++ *
++ * arguments:
++ * struct {
++ * A_UINT32 numPMKID;
++ * WMI_PMKID pmkidList[WMI_MAX_PMKID_CACHE];
++ * }
++ * uses: WMI_SET_PMKIDLIST_CMD
++ */
++
++/* Historical DSETPATCH support for INI patches */
++#define AR6000_XIOCTL_UNUSED90 90
++
++
++
++/* used by AR6000_IOCTL_WMI_GETREV */
++struct ar6000_version {
++ A_UINT32 host_ver;
++ A_UINT32 target_ver;
++};
++
++/* used by AR6000_IOCTL_WMI_GET_QOS_QUEUE */
++struct ar6000_queuereq {
++ A_UINT8 trafficClass;
++ A_UINT16 activeTsids;
++};
++
++/* used by AR6000_IOCTL_WMI_GET_TARGET_STATS */
++typedef struct targetStats_t {
++ A_UINT64 tx_packets;
++ A_UINT64 tx_bytes;
++ A_UINT64 tx_unicast_pkts;
++ A_UINT64 tx_unicast_bytes;
++ A_UINT64 tx_multicast_pkts;
++ A_UINT64 tx_multicast_bytes;
++ A_UINT64 tx_broadcast_pkts;
++ A_UINT64 tx_broadcast_bytes;
++ A_UINT64 tx_rts_success_cnt;
++ A_UINT64 tx_packet_per_ac[4];
++
++ A_UINT64 tx_errors;
++ A_UINT64 tx_failed_cnt;
++ A_UINT64 tx_retry_cnt;
++ A_UINT64 tx_rts_fail_cnt;
++ A_INT32 tx_unicast_rate;
++ A_UINT64 rx_packets;
++ A_UINT64 rx_bytes;
++ A_UINT64 rx_unicast_pkts;
++ A_UINT64 rx_unicast_bytes;
++ A_UINT64 rx_multicast_pkts;
++ A_UINT64 rx_multicast_bytes;
++ A_UINT64 rx_broadcast_pkts;
++ A_UINT64 rx_broadcast_bytes;
++ A_UINT64 rx_fragment_pkt;
++
++ A_UINT64 rx_errors;
++ A_UINT64 rx_crcerr;
++ A_UINT64 rx_key_cache_miss;
++ A_UINT64 rx_decrypt_err;
++ A_UINT64 rx_duplicate_frames;
++ A_INT32 rx_unicast_rate;
++
++ A_UINT64 tkip_local_mic_failure;
++ A_UINT64 tkip_counter_measures_invoked;
++ A_UINT64 tkip_replays;
++ A_UINT64 tkip_format_errors;
++ A_UINT64 ccmp_format_errors;
++ A_UINT64 ccmp_replays;
++
++ A_UINT64 power_save_failure_cnt;
++ A_INT16 noise_floor_calibation;
++
++ A_UINT64 cs_bmiss_cnt;
++ A_UINT64 cs_lowRssi_cnt;
++ A_UINT64 cs_connect_cnt;
++ A_UINT64 cs_disconnect_cnt;
++ A_UINT8 cs_aveBeacon_snr;
++ A_INT16 cs_aveBeacon_rssi;
++ A_UINT8 cs_lastRoam_msec;
++ A_UINT8 cs_snr;
++ A_INT16 cs_rssi;
++
++ A_UINT32 lq_val;
++
++ A_UINT32 wow_num_pkts_dropped;
++ A_UINT8 wow_num_host_pkt_wakeups;
++ A_UINT8 wow_num_host_event_wakeups;
++ A_UINT16 wow_num_events_discarded;
++
++}TARGET_STATS;
++
++typedef struct targetStats_cmd_t {
++ TARGET_STATS targetStats;
++ int clearStats;
++} TARGET_STATS_CMD;
++
++/* used by AR6000_XIOCTL_USER_SETKEYS */
++
++/*
++ * Setting this bit to 1 doesnot initialize the RSC on the firmware
++ */
++#define AR6000_XIOCTL_USER_SETKEYS_RSC_CTRL 1
++#define AR6000_USER_SETKEYS_RSC_UNCHANGED 0x00000002
++
++typedef struct {
++ A_UINT32 keyOpCtrl; /* Bit Map of Key Mgmt Ctrl Flags */
++} AR6000_USER_SETKEYS_INFO;
++
++
++/* used by AR6000_XIOCTL_GPIO_OUTPUT_SET */
++struct ar6000_gpio_output_set_cmd_s {
++ A_UINT32 set_mask;
++ A_UINT32 clear_mask;
++ A_UINT32 enable_mask;
++ A_UINT32 disable_mask;
++};
++
++/*
++ * used by AR6000_XIOCTL_GPIO_REGISTER_GET and AR6000_XIOCTL_GPIO_REGISTER_SET
++ */
++struct ar6000_gpio_register_cmd_s {
++ A_UINT32 gpioreg_id;
++ A_UINT32 value;
++};
++
++/* used by AR6000_XIOCTL_GPIO_INTR_ACK */
++struct ar6000_gpio_intr_ack_cmd_s {
++ A_UINT32 ack_mask;
++};
++
++/* used by AR6000_XIOCTL_GPIO_INTR_WAIT */
++struct ar6000_gpio_intr_wait_cmd_s {
++ A_UINT32 intr_mask;
++ A_UINT32 input_values;
++};
++
++/* used by the AR6000_XIOCTL_DBGLOG_CFG_MODULE */
++typedef struct ar6000_dbglog_module_config_s {
++ A_UINT32 valid;
++ A_UINT16 mmask;
++ A_UINT16 tsr;
++ A_BOOL rep;
++ A_UINT16 size;
++} DBGLOG_MODULE_CONFIG;
++
++typedef struct user_rssi_thold_t {
++ A_INT16 tag;
++ A_INT16 rssi;
++} USER_RSSI_THOLD;
++
++typedef struct user_rssi_params_t {
++ A_UINT8 weight;
++ A_UINT32 pollTime;
++ USER_RSSI_THOLD tholds[12];
++} USER_RSSI_PARAMS;
++
++/*
++ * Host driver may have some config parameters. Typically, these
++ * config params are one time config parameters. These could
++ * correspond to any of the underlying modules. Host driver exposes
++ * an api for the underlying modules to get this config.
++ */
++#define AR6000_DRIVER_CFG_BASE 0x8000
++
++/* Should driver perform wlan node caching? */
++#define AR6000_DRIVER_CFG_GET_WLANNODECACHING 0x8001
++/*Should we log raw WMI msgs */
++#define AR6000_DRIVER_CFG_LOG_RAW_WMI_MSGS 0x8002
++
++/* used by AR6000_XIOCTL_DIAG_READ & AR6000_XIOCTL_DIAG_WRITE */
++struct ar6000_diag_window_cmd_s {
++ unsigned int addr;
++ unsigned int value;
++};
++
++
++struct ar6000_traffic_activity_change {
++ A_UINT32 StreamID; /* stream ID to indicate activity change */
++ A_UINT32 Active; /* active (1) or inactive (0) */
++};
++
++#ifdef __cplusplus
++}
++#endif
++#endif
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/athtypes_linux.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/athtypes_linux.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,47 @@
++/*
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/os/linux/include/athtypes_linux.h#1 $
++ *
++ * This file contains the definitions of the basic atheros data types.
++ * It is used to map the data types in atheros files to a platform specific
++ * type.
++ *
++ * Copyright 2003-2005 Atheros Communications, Inc., All Rights Reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifndef _ATHTYPES_LINUX_H_
++#define _ATHTYPES_LINUX_H_
++
++#ifdef __KERNEL__
++#include <linux/types.h>
++#endif
++
++typedef int8_t A_INT8;
++typedef int16_t A_INT16;
++typedef int32_t A_INT32;
++typedef int64_t A_INT64;
++
++typedef u_int8_t A_UINT8;
++typedef u_int16_t A_UINT16;
++typedef u_int32_t A_UINT32;
++typedef u_int64_t A_UINT64;
++
++typedef int A_BOOL;
++typedef char A_CHAR;
++typedef unsigned char A_UCHAR;
++typedef unsigned long A_ATH_TIMER;
++
++
++#endif /* _ATHTYPES_LINUX_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/config_linux.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/config_linux.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,44 @@
++/*
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifndef _CONFIG_LINUX_H_
++#define _CONFIG_LINUX_H_
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++/*
++ * Host-side GPIO support is optional.
++ * If run-time access to GPIO pins is not required, then
++ * this should be changed to #undef.
++ */
++#define CONFIG_HOST_GPIO_SUPPORT
++
++/*
++ * Host side Test Command support
++ */
++#define CONFIG_HOST_TCMD_SUPPORT
++
++#define USE_4BYTE_REGISTER_ACCESS
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/debug_linux.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/debug_linux.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,86 @@
++/*
++ * Copyright (c) 2004-2006 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifndef _DEBUG_LINUX_H_
++#define _DEBUG_LINUX_H_
++
++#define DBG_DEFAULTS (DBG_ERROR|DBG_WARNING)
++
++extern A_UINT32 g_dbg_flags;
++
++#define DBGFMT "%s() : "
++#define DBGARG __func__
++#define DBGFN A_PRINTF
++
++/* ------- Debug related stuff ------- */
++enum {
++ ATH_DEBUG_SEND = 0x0001,
++ ATH_DEBUG_RECV = 0x0002,
++ ATH_DEBUG_SYNC = 0x0004,
++ ATH_DEBUG_DUMP = 0x0008,
++ ATH_DEBUG_IRQ = 0x0010,
++ ATH_DEBUG_TRC = 0x0020,
++ ATH_DEBUG_WARN = 0x0040,
++ ATH_DEBUG_ERR = 0x0080,
++ ATH_LOG_INF = 0x0100,
++ ATH_DEBUG_BMI = 0x0110,
++ ATH_DEBUG_WMI = 0x0120,
++ ATH_DEBUG_HIF = 0x0140,
++ ATH_DEBUG_HTC = 0x0180,
++ ATH_DEBUG_WLAN = 0x1000,
++ ATH_LOG_ERR = 0x1010,
++ ATH_DEBUG_ANY = 0xFFFF,
++};
++
++#ifdef DEBUG
++
++#define A_DPRINTF(f, a) \
++ if(g_dbg_flags & (f)) \
++ { \
++ DBGFN a ; \
++ }
++
++
++// TODO FIX usage of A_PRINTF!
++#define AR_DEBUG_LVL_CHECK(lvl) (debughtc & (lvl))
++#define AR_DEBUG_PRINTBUF(buffer, length, desc) do { \
++ if (debughtc & ATH_DEBUG_DUMP) { \
++ DebugDumpBytes(buffer, length,desc); \
++ } \
++} while(0)
++#define PRINTX_ARG(arg...) arg
++#define AR_DEBUG_PRINTF(flags, args) do { \
++ if (debughtc & (flags)) { \
++ A_PRINTF(KERN_ALERT PRINTX_ARG args); \
++ } \
++} while (0)
++#define AR_DEBUG_ASSERT(test) do { \
++ if (!(test)) { \
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Debug Assert Caught, File %s, Line: %d, Test:%s \n",__FILE__, __LINE__,#test)); \
++ } \
++} while(0)
++extern int debughtc;
++#else
++#define AR_DEBUG_PRINTF(flags, args)
++#define AR_DEBUG_PRINTBUF(buffer, length, desc)
++#define AR_DEBUG_ASSERT(test)
++#define AR_DEBUG_LVL_CHECK(lvl) 0
++#define A_DPRINTF(f, a)
++#endif
++
++#endif /* _DEBUG_LINUX_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ioctl.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ioctl.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,2540 @@
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "ar6000_drv.h"
++
++static A_UINT8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
++static A_UINT8 null_mac[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
++extern USER_RSSI_THOLD rssi_map[12];
++extern unsigned int wmitimeout;
++extern A_WAITQUEUE_HEAD arEvent;
++extern int tspecCompliance;
++extern int bmienable;
++extern int bypasswmi;
++
++static int
++ar6000_ioctl_get_roam_tbl(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if(wmi_get_roam_tbl_cmd(ar->arWmi) != A_OK) {
++ return -EIO;
++ }
++
++ return 0;
++}
++
++static int
++ar6000_ioctl_get_roam_data(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++
++ /* currently assume only roam times are required */
++ if(wmi_get_roam_data_cmd(ar->arWmi, ROAM_DATA_TIME) != A_OK) {
++ return -EIO;
++ }
++
++
++ return 0;
++}
++
++static int
++ar6000_ioctl_set_roam_ctrl(struct net_device *dev, char *userdata)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_SET_ROAM_CTRL_CMD cmd;
++ A_UINT8 size = sizeof(cmd);
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++
++ if (copy_from_user(&cmd, userdata, size)) {
++ return -EFAULT;
++ }
++
++ if (cmd.roamCtrlType == WMI_SET_HOST_BIAS) {
++ if (cmd.info.bssBiasInfo.numBss > 1) {
++ size += (cmd.info.bssBiasInfo.numBss - 1) * sizeof(WMI_BSS_BIAS);
++ }
++ }
++
++ if (copy_from_user(&cmd, userdata, size)) {
++ return -EFAULT;
++ }
++
++ if(wmi_set_roam_ctrl_cmd(ar->arWmi, &cmd, size) != A_OK) {
++ return -EIO;
++ }
++
++ return 0;
++}
++
++static int
++ar6000_ioctl_set_powersave_timers(struct net_device *dev, char *userdata)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_POWERSAVE_TIMERS_POLICY_CMD cmd;
++ A_UINT8 size = sizeof(cmd);
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user(&cmd, userdata, size)) {
++ return -EFAULT;
++ }
++
++ if (copy_from_user(&cmd, userdata, size)) {
++ return -EFAULT;
++ }
++
++ if(wmi_set_powersave_timers_cmd(ar->arWmi, &cmd, size) != A_OK) {
++ return -EIO;
++ }
++
++ return 0;
++}
++
++static int
++ar6000_ioctl_set_wmm(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_SET_WMM_CMD cmd;
++ A_STATUS ret;
++
++ if ((dev->flags & IFF_UP) != IFF_UP) {
++ return -EIO;
++ }
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user(&cmd, (char *)((unsigned int*)rq->ifr_data + 1),
++ sizeof(cmd)))
++ {
++ return -EFAULT;
++ }
++
++ if (cmd.status == WMI_WMM_ENABLED) {
++ ar->arWmmEnabled = TRUE;
++ } else {
++ ar->arWmmEnabled = FALSE;
++ }
++
++ ret = wmi_set_wmm_cmd(ar->arWmi, cmd.status);
++
++ switch (ret) {
++ case A_OK:
++ return 0;
++ case A_EBUSY :
++ return -EBUSY;
++ case A_NO_MEMORY:
++ return -ENOMEM;
++ case A_EINVAL:
++ default:
++ return -EFAULT;
++ }
++}
++
++static int
++ar6000_ioctl_set_txop(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_SET_WMM_TXOP_CMD cmd;
++ A_STATUS ret;
++
++ if ((dev->flags & IFF_UP) != IFF_UP) {
++ return -EIO;
++ }
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user(&cmd, (char *)((unsigned int*)rq->ifr_data + 1),
++ sizeof(cmd)))
++ {
++ return -EFAULT;
++ }
++
++ ret = wmi_set_wmm_txop(ar->arWmi, cmd.txopEnable);
++
++ switch (ret) {
++ case A_OK:
++ return 0;
++ case A_EBUSY :
++ return -EBUSY;
++ case A_NO_MEMORY:
++ return -ENOMEM;
++ case A_EINVAL:
++ default:
++ return -EFAULT;
++ }
++}
++
++static int
++ar6000_ioctl_get_rd(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ A_STATUS ret = 0;
++
++ if ((dev->flags & IFF_UP) != IFF_UP || ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if(copy_to_user((char *)((unsigned int*)rq->ifr_data + 1),
++ &ar->arRegCode, sizeof(ar->arRegCode)))
++ ret = -EFAULT;
++
++ return ret;
++}
++
++
++/* Get power mode command */
++static int
++ar6000_ioctl_get_power_mode(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_POWER_MODE_CMD power_mode;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ power_mode.powerMode = wmi_get_power_mode_cmd(ar->arWmi);
++ if (copy_to_user(rq->ifr_data, &power_mode, sizeof(WMI_POWER_MODE_CMD))) {
++ ret = -EFAULT;
++ }
++
++ return ret;
++}
++
++
++static int
++ar6000_ioctl_set_channelParams(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_CHANNEL_PARAMS_CMD cmd, *cmdp;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++
++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
++ return -EFAULT;
++ }
++
++ if (cmd.numChannels > 1) {
++ cmdp = A_MALLOC(130);
++ if (copy_from_user(cmdp, rq->ifr_data,
++ sizeof (*cmdp) +
++ ((cmd.numChannels - 1) * sizeof(A_UINT16))))
++ {
++ kfree(cmdp);
++ return -EFAULT;
++ }
++ } else {
++ cmdp = &cmd;
++ }
++
++ if ((ar->arPhyCapability == WMI_11G_CAPABILITY) &&
++ ((cmdp->phyMode == WMI_11A_MODE) || (cmdp->phyMode == WMI_11AG_MODE)))
++ {
++ ret = -EINVAL;
++ }
++
++ if (!ret &&
++ (wmi_set_channelParams_cmd(ar->arWmi, cmdp->scanParam, cmdp->phyMode,
++ cmdp->numChannels, cmdp->channelList)
++ != A_OK))
++ {
++ ret = -EIO;
++ }
++
++ if (cmd.numChannels > 1) {
++ kfree(cmdp);
++ }
++
++ return ret;
++}
++
++static int
++ar6000_ioctl_set_snr_threshold(struct net_device *dev, struct ifreq *rq)
++{
++
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_SNR_THRESHOLD_PARAMS_CMD cmd;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
++ return -EFAULT;
++ }
++
++ if( wmi_set_snr_threshold_params(ar->arWmi, &cmd) != A_OK ) {
++ ret = -EIO;
++ }
++
++ return ret;
++}
++
++static int
++ar6000_ioctl_set_rssi_threshold(struct net_device *dev, struct ifreq *rq)
++{
++#define SWAP_THOLD(thold1, thold2) do { \
++ USER_RSSI_THOLD tmpThold; \
++ tmpThold.tag = thold1.tag; \
++ tmpThold.rssi = thold1.rssi; \
++ thold1.tag = thold2.tag; \
++ thold1.rssi = thold2.rssi; \
++ thold2.tag = tmpThold.tag; \
++ thold2.rssi = tmpThold.rssi; \
++} while (0)
++
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_RSSI_THRESHOLD_PARAMS_CMD cmd;
++ USER_RSSI_PARAMS rssiParams;
++ A_INT32 i, j;
++
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user((char *)&rssiParams, (char *)((unsigned int *)rq->ifr_data + 1), sizeof(USER_RSSI_PARAMS))) {
++ return -EFAULT;
++ }
++ cmd.weight = rssiParams.weight;
++ cmd.pollTime = rssiParams.pollTime;
++
++ A_MEMCPY(rssi_map, &rssiParams.tholds, sizeof(rssi_map));
++ /*
++ * only 6 elements, so use bubble sorting, in ascending order
++ */
++ for (i = 5; i > 0; i--) {
++ for (j = 0; j < i; j++) { /* above tholds */
++ if (rssi_map[j+1].rssi < rssi_map[j].rssi) {
++ SWAP_THOLD(rssi_map[j+1], rssi_map[j]);
++ } else if (rssi_map[j+1].rssi == rssi_map[j].rssi) {
++ return EFAULT;
++ }
++ }
++ }
++ for (i = 11; i > 6; i--) {
++ for (j = 6; j < i; j++) { /* below tholds */
++ if (rssi_map[j+1].rssi < rssi_map[j].rssi) {
++ SWAP_THOLD(rssi_map[j+1], rssi_map[j]);
++ } else if (rssi_map[j+1].rssi == rssi_map[j].rssi) {
++ return EFAULT;
++ }
++ }
++ }
++
++#ifdef DEBUG
++ for (i = 0; i < 12; i++) {
++ AR_DEBUG2_PRINTF("thold[%d].tag: %d, thold[%d].rssi: %d \n",
++ i, rssi_map[i].tag, i, rssi_map[i].rssi);
++ }
++#endif
++ cmd.thresholdAbove1_Val = rssi_map[0].rssi;
++ cmd.thresholdAbove2_Val = rssi_map[1].rssi;
++ cmd.thresholdAbove3_Val = rssi_map[2].rssi;
++ cmd.thresholdAbove4_Val = rssi_map[3].rssi;
++ cmd.thresholdAbove5_Val = rssi_map[4].rssi;
++ cmd.thresholdAbove6_Val = rssi_map[5].rssi;
++ cmd.thresholdBelow1_Val = rssi_map[6].rssi;
++ cmd.thresholdBelow2_Val = rssi_map[7].rssi;
++ cmd.thresholdBelow3_Val = rssi_map[8].rssi;
++ cmd.thresholdBelow4_Val = rssi_map[9].rssi;
++ cmd.thresholdBelow5_Val = rssi_map[10].rssi;
++ cmd.thresholdBelow6_Val = rssi_map[11].rssi;
++
++ if( wmi_set_rssi_threshold_params(ar->arWmi, &cmd) != A_OK ) {
++ ret = -EIO;
++ }
++
++ return ret;
++}
++
++static int
++ar6000_ioctl_set_lq_threshold(struct net_device *dev, struct ifreq *rq)
++{
++
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_LQ_THRESHOLD_PARAMS_CMD cmd;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user(&cmd, (char *)((unsigned int *)rq->ifr_data + 1), sizeof(cmd))) {
++ return -EFAULT;
++ }
++
++ if( wmi_set_lq_threshold_params(ar->arWmi, &cmd) != A_OK ) {
++ ret = -EIO;
++ }
++
++ return ret;
++}
++
++
++static int
++ar6000_ioctl_set_probedSsid(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_PROBED_SSID_CMD cmd;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
++ return -EFAULT;
++ }
++
++ if (wmi_probedSsid_cmd(ar->arWmi, cmd.entryIndex, cmd.flag, cmd.ssidLength,
++ cmd.ssid) != A_OK)
++ {
++ ret = -EIO;
++ }
++
++ return ret;
++}
++
++static int
++ar6000_ioctl_set_badAp(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_ADD_BAD_AP_CMD cmd;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++
++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
++ return -EFAULT;
++ }
++
++ if (cmd.badApIndex > WMI_MAX_BAD_AP_INDEX) {
++ return -EIO;
++ }
++
++ if (A_MEMCMP(cmd.bssid, null_mac, AR6000_ETH_ADDR_LEN) == 0) {
++ /*
++ * This is a delete badAP.
++ */
++ if (wmi_deleteBadAp_cmd(ar->arWmi, cmd.badApIndex) != A_OK) {
++ ret = -EIO;
++ }
++ } else {
++ if (wmi_addBadAp_cmd(ar->arWmi, cmd.badApIndex, cmd.bssid) != A_OK) {
++ ret = -EIO;
++ }
++ }
++
++ return ret;
++}
++
++static int
++ar6000_ioctl_create_qos(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_CREATE_PSTREAM_CMD cmd;
++ A_STATUS ret;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++
++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
++ return -EFAULT;
++ }
++
++ ret = wmi_verify_tspec_params(&cmd, tspecCompliance);
++ if (ret == A_OK)
++ ret = wmi_create_pstream_cmd(ar->arWmi, &cmd);
++
++ switch (ret) {
++ case A_OK:
++ return 0;
++ case A_EBUSY :
++ return -EBUSY;
++ case A_NO_MEMORY:
++ return -ENOMEM;
++ case A_EINVAL:
++ default:
++ return -EFAULT;
++ }
++}
++
++static int
++ar6000_ioctl_delete_qos(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_DELETE_PSTREAM_CMD cmd;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
++ return -EFAULT;
++ }
++
++ ret = wmi_delete_pstream_cmd(ar->arWmi, cmd.trafficClass, cmd.tsid);
++
++ switch (ret) {
++ case A_OK:
++ return 0;
++ case A_EBUSY :
++ return -EBUSY;
++ case A_NO_MEMORY:
++ return -ENOMEM;
++ case A_EINVAL:
++ default:
++ return -EFAULT;
++ }
++}
++
++static int
++ar6000_ioctl_get_qos_queue(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ struct ar6000_queuereq qreq;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if( copy_from_user(&qreq, rq->ifr_data,
++ sizeof(struct ar6000_queuereq)))
++ return -EFAULT;
++
++ qreq.activeTsids = wmi_get_mapped_qos_queue(ar->arWmi, qreq.trafficClass);
++
++ if (copy_to_user(rq->ifr_data, &qreq,
++ sizeof(struct ar6000_queuereq)))
++ {
++ ret = -EFAULT;
++ }
++
++ return ret;
++}
++
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++static A_STATUS
++ar6000_ioctl_tcmd_get_rx_report(struct net_device *dev,
++ struct ifreq *rq, A_UINT8 *data, A_UINT32 len)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ A_UINT32 buf[2];
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (down_interruptible(&ar->arSem)) {
++ return -ERESTARTSYS;
++ }
++ ar->tcmdRxReport = 0;
++ if (wmi_test_cmd(ar->arWmi, data, len) != A_OK) {
++ up(&ar->arSem);
++ return -EIO;
++ }
++
++ wait_event_interruptible_timeout(arEvent, ar->tcmdRxReport != 0, wmitimeout * HZ);
++
++ if (signal_pending(current)) {
++ ret = -EINTR;
++ }
++
++ buf[0] = ar->tcmdRxTotalPkt;
++ buf[1] = ar->tcmdRxRssi;
++ if (!ret && copy_to_user(rq->ifr_data, buf, sizeof(buf))) {
++ ret = -EFAULT;
++ }
++
++ up(&ar->arSem);
++
++ return ret;
++}
++
++void
++ar6000_tcmd_rx_report_event(void *devt, A_UINT8 * results, int len)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
++ TCMD_CONT_RX * rx_rep = (TCMD_CONT_RX *)results;
++
++ ar->tcmdRxTotalPkt = rx_rep->u.report.totalPkt;
++ ar->tcmdRxRssi = rx_rep->u.report.rssiInDBm;
++ ar->tcmdRxReport = 1;
++
++ wake_up(&arEvent);
++}
++#endif /* CONFIG_HOST_TCMD_SUPPORT*/
++
++static int
++ar6000_ioctl_set_error_report_bitmask(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_TARGET_ERROR_REPORT_BITMASK cmd;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
++ return -EFAULT;
++ }
++
++ ret = wmi_set_error_report_bitmask(ar->arWmi, cmd.bitmask);
++
++ return (ret==0 ? ret : -EINVAL);
++}
++
++static int
++ar6000_clear_target_stats(struct net_device *dev)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ TARGET_STATS *pStats = &ar->arTargetStats;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++ A_MEMZERO(pStats, sizeof(TARGET_STATS));
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ return ret;
++}
++
++static int
++ar6000_ioctl_get_target_stats(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ TARGET_STATS_CMD cmd;
++ TARGET_STATS *pStats = &ar->arTargetStats;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
++ return -EFAULT;
++ }
++ if (down_interruptible(&ar->arSem)) {
++ return -ERESTARTSYS;
++ }
++
++ ar->statsUpdatePending = TRUE;
++
++ if(wmi_get_stats_cmd(ar->arWmi) != A_OK) {
++ up(&ar->arSem);
++ return -EIO;
++ }
++
++ wait_event_interruptible_timeout(arEvent, ar->statsUpdatePending == FALSE, wmitimeout * HZ);
++
++ if (signal_pending(current)) {
++ ret = -EINTR;
++ }
++
++ if (!ret && copy_to_user(rq->ifr_data, pStats, sizeof(*pStats))) {
++ ret = -EFAULT;
++ }
++
++ if (cmd.clearStats == 1) {
++ ret = ar6000_clear_target_stats(dev);
++ }
++
++ up(&ar->arSem);
++
++ return ret;
++}
++
++static int
++ar6000_ioctl_set_access_params(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_SET_ACCESS_PARAMS_CMD cmd;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
++ return -EFAULT;
++ }
++
++ if (wmi_set_access_params_cmd(ar->arWmi, cmd.txop, cmd.eCWmin, cmd.eCWmax,
++ cmd.aifsn) == A_OK)
++ {
++ ret = 0;
++ } else {
++ ret = -EINVAL;
++ }
++
++ return (ret);
++}
++
++static int
++ar6000_ioctl_set_disconnect_timeout(struct net_device *dev, struct ifreq *rq)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_DISC_TIMEOUT_CMD cmd;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
++ return -EFAULT;
++ }
++
++ if (wmi_disctimeout_cmd(ar->arWmi, cmd.disconnectTimeout) == A_OK)
++ {
++ ret = 0;
++ } else {
++ ret = -EINVAL;
++ }
++
++ return (ret);
++}
++
++static int
++ar6000_xioctl_set_voice_pkt_size(struct net_device *dev, char * userdata)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_SET_VOICE_PKT_SIZE_CMD cmd;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user(&cmd, userdata, sizeof(cmd))) {
++ return -EFAULT;
++ }
++
++ if (wmi_set_voice_pkt_size_cmd(ar->arWmi, cmd.voicePktSize) == A_OK)
++ {
++ ret = 0;
++ } else {
++ ret = -EINVAL;
++ }
++
++
++ return (ret);
++}
++
++static int
++ar6000_xioctl_set_max_sp_len(struct net_device *dev, char * userdata)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_SET_MAX_SP_LEN_CMD cmd;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user(&cmd, userdata, sizeof(cmd))) {
++ return -EFAULT;
++ }
++
++ if (wmi_set_max_sp_len_cmd(ar->arWmi, cmd.maxSPLen) == A_OK)
++ {
++ ret = 0;
++ } else {
++ ret = -EINVAL;
++ }
++
++ return (ret);
++}
++
++
++static int
++ar6000_xioctl_set_bt_status_cmd(struct net_device *dev, char * userdata)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_SET_BT_STATUS_CMD cmd;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user(&cmd, userdata, sizeof(cmd))) {
++ return -EFAULT;
++ }
++
++ if (wmi_set_bt_status_cmd(ar->arWmi, cmd.streamType, cmd.status) == A_OK)
++ {
++ ret = 0;
++ } else {
++ ret = -EINVAL;
++ }
++
++ return (ret);
++}
++
++static int
++ar6000_xioctl_set_bt_params_cmd(struct net_device *dev, char * userdata)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_SET_BT_PARAMS_CMD cmd;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (copy_from_user(&cmd, userdata, sizeof(cmd))) {
++ return -EFAULT;
++ }
++
++ if (wmi_set_bt_params_cmd(ar->arWmi, &cmd) == A_OK)
++ {
++ ret = 0;
++ } else {
++ ret = -EINVAL;
++ }
++
++ return (ret);
++}
++
++#ifdef CONFIG_HOST_GPIO_SUPPORT
++struct ar6000_gpio_intr_wait_cmd_s gpio_intr_results;
++/* gpio_reg_results and gpio_data_available are protected by arSem */
++static struct ar6000_gpio_register_cmd_s gpio_reg_results;
++static A_BOOL gpio_data_available; /* Requested GPIO data available */
++static A_BOOL gpio_intr_available; /* GPIO interrupt info available */
++static A_BOOL gpio_ack_received; /* GPIO ack was received */
++
++/* Host-side initialization for General Purpose I/O support */
++void ar6000_gpio_init(void)
++{
++ gpio_intr_available = FALSE;
++ gpio_data_available = FALSE;
++ gpio_ack_received = FALSE;
++}
++
++/*
++ * Called when a GPIO interrupt is received from the Target.
++ * intr_values shows which GPIO pins have interrupted.
++ * input_values shows a recent value of GPIO pins.
++ */
++void
++ar6000_gpio_intr_rx(A_UINT32 intr_mask, A_UINT32 input_values)
++{
++ gpio_intr_results.intr_mask = intr_mask;
++ gpio_intr_results.input_values = input_values;
++ *((volatile A_BOOL *)&gpio_intr_available) = TRUE;
++ wake_up(&arEvent);
++}
++
++/*
++ * This is called when a response is received from the Target
++ * for a previous or ar6000_gpio_input_get or ar6000_gpio_register_get
++ * call.
++ */
++void
++ar6000_gpio_data_rx(A_UINT32 reg_id, A_UINT32 value)
++{
++ gpio_reg_results.gpioreg_id = reg_id;
++ gpio_reg_results.value = value;
++ *((volatile A_BOOL *)&gpio_data_available) = TRUE;
++ wake_up(&arEvent);
++}
++
++/*
++ * This is called when an acknowledgement is received from the Target
++ * for a previous or ar6000_gpio_output_set or ar6000_gpio_register_set
++ * call.
++ */
++void
++ar6000_gpio_ack_rx(void)
++{
++ gpio_ack_received = TRUE;
++ wake_up(&arEvent);
++}
++
++A_STATUS
++ar6000_gpio_output_set(struct net_device *dev,
++ A_UINT32 set_mask,
++ A_UINT32 clear_mask,
++ A_UINT32 enable_mask,
++ A_UINT32 disable_mask)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ gpio_ack_received = FALSE;
++ return wmi_gpio_output_set(ar->arWmi,
++ set_mask, clear_mask, enable_mask, disable_mask);
++}
++
++static A_STATUS
++ar6000_gpio_input_get(struct net_device *dev)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ *((volatile A_BOOL *)&gpio_data_available) = FALSE;
++ return wmi_gpio_input_get(ar->arWmi);
++}
++
++static A_STATUS
++ar6000_gpio_register_set(struct net_device *dev,
++ A_UINT32 gpioreg_id,
++ A_UINT32 value)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ gpio_ack_received = FALSE;
++ return wmi_gpio_register_set(ar->arWmi, gpioreg_id, value);
++}
++
++static A_STATUS
++ar6000_gpio_register_get(struct net_device *dev,
++ A_UINT32 gpioreg_id)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ *((volatile A_BOOL *)&gpio_data_available) = FALSE;
++ return wmi_gpio_register_get(ar->arWmi, gpioreg_id);
++}
++
++static A_STATUS
++ar6000_gpio_intr_ack(struct net_device *dev,
++ A_UINT32 ack_mask)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ gpio_intr_available = FALSE;
++ return wmi_gpio_intr_ack(ar->arWmi, ack_mask);
++}
++#endif /* CONFIG_HOST_GPIO_SUPPORT */
++
++int ar6000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ HIF_DEVICE *hifDevice = ar->arHifDevice;
++ int ret, param, param2;
++ unsigned int address = 0;
++ unsigned int length = 0;
++ unsigned char *buffer;
++ char *userdata;
++ A_UINT32 connectCtrlFlags;
++
++
++ static WMI_SCAN_PARAMS_CMD scParams = {0, 0, 0, 0, 0,
++ WMI_SHORTSCANRATIO_DEFAULT,
++ DEFAULT_SCAN_CTRL_FLAGS,
++ 0};
++ WMI_SET_AKMP_PARAMS_CMD akmpParams;
++ WMI_SET_PMKID_LIST_CMD pmkidInfo;
++
++ if (cmd == AR6000_IOCTL_EXTENDED)
++ {
++ /*
++ * This allows for many more wireless ioctls than would otherwise
++ * be available. Applications embed the actual ioctl command in
++ * the first word of the parameter block, and use the command
++ * AR6000_IOCTL_EXTENDED_CMD on the ioctl call.
++ */
++ get_user(cmd, (int *)rq->ifr_data);
++ userdata = (char *)(((unsigned int *)rq->ifr_data)+1);
++ }
++ else
++ {
++ userdata = (char *)rq->ifr_data;
++ }
++
++ if ((ar->arWlanState == WLAN_DISABLED) &&
++ ((cmd != AR6000_XIOCTRL_WMI_SET_WLAN_STATE) &&
++ (cmd != AR6000_XIOCTL_DIAG_READ) &&
++ (cmd != AR6000_XIOCTL_DIAG_WRITE)))
++ {
++ return -EIO;
++ }
++
++ ret = 0;
++ switch(cmd)
++ {
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++ case AR6000_XIOCTL_TCMD_CONT_TX:
++ {
++ TCMD_CONT_TX txCmd;
++
++ if (ar->tcmdPm == TCMD_PM_SLEEP) {
++ A_PRINTF("Can NOT send tx tcmd when target is asleep! \n");
++ return -EFAULT;
++ }
++
++ if(copy_from_user(&txCmd, userdata, sizeof(TCMD_CONT_TX)))
++ return -EFAULT;
++ wmi_test_cmd(ar->arWmi,(A_UINT8 *)&txCmd, sizeof(TCMD_CONT_TX));
++ }
++ break;
++ case AR6000_XIOCTL_TCMD_CONT_RX:
++ {
++ TCMD_CONT_RX rxCmd;
++
++ if (ar->tcmdPm == TCMD_PM_SLEEP) {
++ A_PRINTF("Can NOT send rx tcmd when target is asleep! \n");
++ return -EFAULT;
++ }
++ if(copy_from_user(&rxCmd, userdata, sizeof(TCMD_CONT_RX)))
++ return -EFAULT;
++ switch(rxCmd.act)
++ {
++ case TCMD_CONT_RX_PROMIS:
++ case TCMD_CONT_RX_FILTER:
++ case TCMD_CONT_RX_SETMAC:
++ wmi_test_cmd(ar->arWmi,(A_UINT8 *)&rxCmd,
++ sizeof(TCMD_CONT_RX));
++ break;
++ case TCMD_CONT_RX_REPORT:
++ ar6000_ioctl_tcmd_get_rx_report(dev, rq,
++ (A_UINT8 *)&rxCmd, sizeof(TCMD_CONT_RX));
++ break;
++ default:
++ A_PRINTF("Unknown Cont Rx mode: %d\n",rxCmd.act);
++ return -EINVAL;
++ }
++ }
++ break;
++ case AR6000_XIOCTL_TCMD_PM:
++ {
++ TCMD_PM pmCmd;
++
++ if(copy_from_user(&pmCmd, userdata, sizeof(TCMD_PM)))
++ return -EFAULT;
++ ar->tcmdPm = pmCmd.mode;
++ wmi_test_cmd(ar->arWmi, (A_UINT8*)&pmCmd, sizeof(TCMD_PM));
++ }
++ break;
++#endif /* CONFIG_HOST_TCMD_SUPPORT */
++
++ case AR6000_XIOCTL_BMI_DONE:
++ if(bmienable)
++ {
++ ret = ar6000_init(dev);
++ }
++ else
++ {
++ ret = BMIDone(hifDevice);
++ }
++ break;
++
++ case AR6000_XIOCTL_BMI_READ_MEMORY:
++ get_user(address, (unsigned int *)userdata);
++ get_user(length, (unsigned int *)userdata + 1);
++ AR_DEBUG_PRINTF("Read Memory (address: 0x%x, length: %d)\n",
++ address, length);
++ if ((buffer = (unsigned char *)A_MALLOC(length)) != NULL) {
++ A_MEMZERO(buffer, length);
++ ret = BMIReadMemory(hifDevice, address, buffer, length);
++ if (copy_to_user(rq->ifr_data, buffer, length)) {
++ ret = -EFAULT;
++ }
++ A_FREE(buffer);
++ } else {
++ ret = -ENOMEM;
++ }
++ break;
++
++ case AR6000_XIOCTL_BMI_WRITE_MEMORY:
++ get_user(address, (unsigned int *)userdata);
++ get_user(length, (unsigned int *)userdata + 1);
++ AR_DEBUG_PRINTF("Write Memory (address: 0x%x, length: %d)\n",
++ address, length);
++ if ((buffer = (unsigned char *)A_MALLOC(length)) != NULL) {
++ A_MEMZERO(buffer, length);
++ if (copy_from_user(buffer, &userdata[sizeof(address) +
++ sizeof(length)], length))
++ {
++ ret = -EFAULT;
++ } else {
++ ret = BMIWriteMemory(hifDevice, address, buffer, length);
++ }
++ A_FREE(buffer);
++ } else {
++ ret = -ENOMEM;
++ }
++ break;
++
++ case AR6000_XIOCTL_BMI_TEST:
++ AR_DEBUG_PRINTF("No longer supported\n");
++ ret = -EOPNOTSUPP;
++ break;
++
++ case AR6000_XIOCTL_BMI_EXECUTE:
++ get_user(address, (unsigned int *)userdata);
++ get_user(param, (unsigned int *)userdata + 1);
++ AR_DEBUG_PRINTF("Execute (address: 0x%x, param: %d)\n",
++ address, param);
++ ret = BMIExecute(hifDevice, address, ¶m);
++ put_user(param, (unsigned int *)rq->ifr_data); /* return value */
++ break;
++
++ case AR6000_XIOCTL_BMI_SET_APP_START:
++ get_user(address, (unsigned int *)userdata);
++ AR_DEBUG_PRINTF("Set App Start (address: 0x%x)\n", address);
++ ret = BMISetAppStart(hifDevice, address);
++ break;
++
++ case AR6000_XIOCTL_BMI_READ_SOC_REGISTER:
++ get_user(address, (unsigned int *)userdata);
++ ret = BMIReadSOCRegister(hifDevice, address, ¶m);
++ put_user(param, (unsigned int *)rq->ifr_data); /* return value */
++ break;
++
++ case AR6000_XIOCTL_BMI_WRITE_SOC_REGISTER:
++ get_user(address, (unsigned int *)userdata);
++ get_user(param, (unsigned int *)userdata + 1);
++ ret = BMIWriteSOCRegister(hifDevice, address, param);
++ break;
++
++#ifdef HTC_RAW_INTERFACE
++ case AR6000_XIOCTL_HTC_RAW_OPEN:
++ ret = A_OK;
++ if (!arRawIfEnabled(ar)) {
++ /* make sure block size is set in case the target was reset since last
++ * BMI phase (i.e. flashup downloads) */
++ ret = ar6000_SetHTCBlockSize(ar);
++ if (A_FAILED(ret)) {
++ break;
++ }
++ /* Terminate the BMI phase */
++ ret = BMIDone(hifDevice);
++ if (ret == A_OK) {
++ ret = ar6000_htc_raw_open(ar);
++ }
++ }
++ break;
++
++ case AR6000_XIOCTL_HTC_RAW_CLOSE:
++ if (arRawIfEnabled(ar)) {
++ ret = ar6000_htc_raw_close(ar);
++ arRawIfEnabled(ar) = FALSE;
++ } else {
++ ret = A_ERROR;
++ }
++ break;
++
++ case AR6000_XIOCTL_HTC_RAW_READ:
++ if (arRawIfEnabled(ar)) {
++ unsigned int streamID;
++ get_user(streamID, (unsigned int *)userdata);
++ get_user(length, (unsigned int *)userdata + 1);
++ buffer = rq->ifr_data + sizeof(length);
++ ret = ar6000_htc_raw_read(ar, (HTC_RAW_STREAM_ID)streamID,
++ buffer, length);
++ put_user(ret, (unsigned int *)rq->ifr_data);
++ } else {
++ ret = A_ERROR;
++ }
++ break;
++
++ case AR6000_XIOCTL_HTC_RAW_WRITE:
++ if (arRawIfEnabled(ar)) {
++ unsigned int streamID;
++ get_user(streamID, (unsigned int *)userdata);
++ get_user(length, (unsigned int *)userdata + 1);
++ buffer = userdata + sizeof(streamID) + sizeof(length);
++ ret = ar6000_htc_raw_write(ar, (HTC_RAW_STREAM_ID)streamID,
++ buffer, length);
++ put_user(ret, (unsigned int *)rq->ifr_data);
++ } else {
++ ret = A_ERROR;
++ }
++ break;
++#endif /* HTC_RAW_INTERFACE */
++
++ case AR6000_IOCTL_WMI_GETREV:
++ {
++ if (copy_to_user(rq->ifr_data, &ar->arVersion,
++ sizeof(ar->arVersion)))
++ {
++ ret = -EFAULT;
++ }
++ break;
++ }
++ case AR6000_IOCTL_WMI_SETPWR:
++ {
++ WMI_POWER_MODE_CMD pwrModeCmd;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&pwrModeCmd, userdata,
++ sizeof(pwrModeCmd)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_powermode_cmd(ar->arWmi, pwrModeCmd.powerMode)
++ != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++ break;
++ }
++ case AR6000_IOCTL_WMI_SET_IBSS_PM_CAPS:
++ {
++ WMI_IBSS_PM_CAPS_CMD ibssPmCaps;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&ibssPmCaps, userdata,
++ sizeof(ibssPmCaps)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_ibsspmcaps_cmd(ar->arWmi, ibssPmCaps.power_saving, ibssPmCaps.ttl,
++ ibssPmCaps.atim_windows, ibssPmCaps.timeout_value) != A_OK)
++ {
++ ret = -EIO;
++ }
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++ ar->arIbssPsEnable = ibssPmCaps.power_saving;
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ }
++ break;
++ }
++ case AR6000_IOCTL_WMI_SET_PMPARAMS:
++ {
++ WMI_POWER_PARAMS_CMD pmParams;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&pmParams, userdata,
++ sizeof(pmParams)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_pmparams_cmd(ar->arWmi, pmParams.idle_period,
++ pmParams.pspoll_number,
++ pmParams.dtim_policy) != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++ break;
++ }
++ case AR6000_IOCTL_WMI_SETSCAN:
++ {
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&scParams, userdata,
++ sizeof(scParams)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (CAN_SCAN_IN_CONNECT(scParams.scanCtrlFlags)) {
++ ar->arSkipScan = FALSE;
++ } else {
++ ar->arSkipScan = TRUE;
++ }
++
++ if (wmi_scanparams_cmd(ar->arWmi, scParams.fg_start_period,
++ scParams.fg_end_period,
++ scParams.bg_period,
++ scParams.minact_chdwell_time,
++ scParams.maxact_chdwell_time,
++ scParams.pas_chdwell_time,
++ scParams.shortScanRatio,
++ scParams.scanCtrlFlags,
++ scParams.max_dfsch_act_time) != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++ break;
++ }
++ case AR6000_IOCTL_WMI_SETLISTENINT:
++ {
++ WMI_LISTEN_INT_CMD listenCmd;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&listenCmd, userdata,
++ sizeof(listenCmd)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_listeninterval_cmd(ar->arWmi, listenCmd.listenInterval, listenCmd.numBeacons) != A_OK) {
++ ret = -EIO;
++ } else {
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++ ar->arListenInterval = param;
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ }
++
++ }
++ break;
++ }
++ case AR6000_IOCTL_WMI_SET_BMISS_TIME:
++ {
++ WMI_BMISS_TIME_CMD bmissCmd;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&bmissCmd, userdata,
++ sizeof(bmissCmd)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_bmisstime_cmd(ar->arWmi, bmissCmd.bmissTime, bmissCmd.numBeacons) != A_OK) {
++ ret = -EIO;
++ }
++ }
++ break;
++ }
++ case AR6000_IOCTL_WMI_SETBSSFILTER:
++ {
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else {
++
++ get_user(param, (unsigned char *)userdata);
++ get_user(param2, (unsigned int *)(userdata + 1));
++ printk("SETBSSFILTER: filter 0x%x, mask: 0x%x\n", param, param2);
++ if (wmi_bssfilter_cmd(ar->arWmi, param, param2) != A_OK) {
++ ret = -EIO;
++ }
++ }
++ break;
++ }
++ case AR6000_IOCTL_WMI_SET_SNRTHRESHOLD:
++ {
++ ret = ar6000_ioctl_set_snr_threshold(dev, rq);
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SET_RSSITHRESHOLD:
++ {
++ ret = ar6000_ioctl_set_rssi_threshold(dev, rq);
++ break;
++ }
++ case AR6000_XIOCTL_WMI_CLR_RSSISNR:
++ {
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ }
++ ret = wmi_clr_rssi_snr(ar->arWmi);
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SET_LQTHRESHOLD:
++ {
++ ret = ar6000_ioctl_set_lq_threshold(dev, rq);
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SET_LPREAMBLE:
++ {
++ WMI_SET_LPREAMBLE_CMD setLpreambleCmd;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&setLpreambleCmd, userdata,
++ sizeof(setLpreambleCmd)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_set_lpreamble_cmd(ar->arWmi, setLpreambleCmd.status)
++ != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SET_RTS:
++ {
++ WMI_SET_RTS_CMD rtsCmd;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&rtsCmd, userdata,
++ sizeof(rtsCmd)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_set_rts_cmd(ar->arWmi, rtsCmd.threshold)
++ != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SET_WMM:
++ {
++ ret = ar6000_ioctl_set_wmm(dev, rq);
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SET_TXOP:
++ {
++ ret = ar6000_ioctl_set_txop(dev, rq);
++ break;
++ }
++ case AR6000_XIOCTL_WMI_GET_RD:
++ {
++ ret = ar6000_ioctl_get_rd(dev, rq);
++ break;
++ }
++ case AR6000_IOCTL_WMI_SET_CHANNELPARAMS:
++ {
++ ret = ar6000_ioctl_set_channelParams(dev, rq);
++ break;
++ }
++ case AR6000_IOCTL_WMI_SET_PROBEDSSID:
++ {
++ ret = ar6000_ioctl_set_probedSsid(dev, rq);
++ break;
++ }
++ case AR6000_IOCTL_WMI_SET_BADAP:
++ {
++ ret = ar6000_ioctl_set_badAp(dev, rq);
++ break;
++ }
++ case AR6000_IOCTL_WMI_CREATE_QOS:
++ {
++ ret = ar6000_ioctl_create_qos(dev, rq);
++ break;
++ }
++ case AR6000_IOCTL_WMI_DELETE_QOS:
++ {
++ ret = ar6000_ioctl_delete_qos(dev, rq);
++ break;
++ }
++ case AR6000_IOCTL_WMI_GET_QOS_QUEUE:
++ {
++ ret = ar6000_ioctl_get_qos_queue(dev, rq);
++ break;
++ }
++ case AR6000_IOCTL_WMI_GET_TARGET_STATS:
++ {
++ ret = ar6000_ioctl_get_target_stats(dev, rq);
++ break;
++ }
++ case AR6000_IOCTL_WMI_SET_ERROR_REPORT_BITMASK:
++ {
++ ret = ar6000_ioctl_set_error_report_bitmask(dev, rq);
++ break;
++ }
++ case AR6000_IOCTL_WMI_SET_ASSOC_INFO:
++ {
++ WMI_SET_ASSOC_INFO_CMD cmd;
++ A_UINT8 assocInfo[WMI_MAX_ASSOC_INFO_LEN];
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else {
++ get_user(cmd.ieType, userdata);
++ if (cmd.ieType >= WMI_MAX_ASSOC_INFO_TYPE) {
++ ret = -EIO;
++ } else {
++ get_user(cmd.bufferSize, userdata + 1);
++ if (cmd.bufferSize > WMI_MAX_ASSOC_INFO_LEN) {
++ ret = -EFAULT;
++ break;
++ }
++ if (copy_from_user(assocInfo, userdata + 2,
++ cmd.bufferSize))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_associnfo_cmd(ar->arWmi, cmd.ieType,
++ cmd.bufferSize,
++ assocInfo) != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++ }
++ }
++ break;
++ }
++ case AR6000_IOCTL_WMI_SET_ACCESS_PARAMS:
++ {
++ ret = ar6000_ioctl_set_access_params(dev, rq);
++ break;
++ }
++ case AR6000_IOCTL_WMI_SET_DISC_TIMEOUT:
++ {
++ ret = ar6000_ioctl_set_disconnect_timeout(dev, rq);
++ break;
++ }
++ case AR6000_XIOCTL_FORCE_TARGET_RESET:
++ {
++ if (ar->arHtcTarget)
++ {
++// HTCForceReset(htcTarget);
++ }
++ else
++ {
++ AR_DEBUG_PRINTF("ar6000_ioctl cannot attempt reset.\n");
++ }
++ break;
++ }
++ case AR6000_XIOCTL_TARGET_INFO:
++ case AR6000_XIOCTL_CHECK_TARGET_READY: /* backwards compatibility */
++ {
++ /* If we made it to here, then the Target exists and is ready. */
++
++ if (cmd == AR6000_XIOCTL_TARGET_INFO) {
++ if (copy_to_user((A_UINT32 *)rq->ifr_data, &ar->arVersion.target_ver,
++ sizeof(ar->arVersion.target_ver)))
++ {
++ ret = -EFAULT;
++ }
++ if (copy_to_user(((A_UINT32 *)rq->ifr_data)+1, &ar->arTargetType,
++ sizeof(ar->arTargetType)))
++ {
++ ret = -EFAULT;
++ }
++ }
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SET_HB_CHALLENGE_RESP_PARAMS:
++ {
++ WMI_SET_HB_CHALLENGE_RESP_PARAMS_CMD hbparam;
++
++ if (copy_from_user(&hbparam, userdata, sizeof(hbparam)))
++ {
++ ret = -EFAULT;
++ } else {
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++ /* Start a cyclic timer with the parameters provided. */
++ if (hbparam.frequency) {
++ ar->arHBChallengeResp.frequency = hbparam.frequency;
++ }
++ if (hbparam.threshold) {
++ ar->arHBChallengeResp.missThres = hbparam.threshold;
++ }
++
++ /* Delete the pending timer and start a new one */
++ if (timer_pending(&ar->arHBChallengeResp.timer)) {
++ A_UNTIMEOUT(&ar->arHBChallengeResp.timer);
++ }
++ A_TIMEOUT_MS(&ar->arHBChallengeResp.timer, ar->arHBChallengeResp.frequency * 1000, 0);
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ }
++ break;
++ }
++ case AR6000_XIOCTL_WMI_GET_HB_CHALLENGE_RESP:
++ {
++ A_UINT32 cookie;
++
++ if (copy_from_user(&cookie, userdata, sizeof(cookie))) {
++ return -EFAULT;
++ }
++
++ /* Send the challenge on the control channel */
++ if (wmi_get_challenge_resp_cmd(ar->arWmi, cookie, APP_HB_CHALLENGE) != A_OK) {
++ return -EIO;
++ }
++ break;
++ }
++#ifdef USER_KEYS
++ case AR6000_XIOCTL_USER_SETKEYS:
++ {
++
++ ar->user_savedkeys_stat = USER_SAVEDKEYS_STAT_RUN;
++
++ if (copy_from_user(&ar->user_key_ctrl, userdata,
++ sizeof(ar->user_key_ctrl)))
++ {
++ return -EFAULT;
++ }
++
++ A_PRINTF("ar6000 USER set key %x\n", ar->user_key_ctrl);
++ break;
++ }
++#endif /* USER_KEYS */
++
++#ifdef CONFIG_HOST_GPIO_SUPPORT
++ case AR6000_XIOCTL_GPIO_OUTPUT_SET:
++ {
++ struct ar6000_gpio_output_set_cmd_s gpio_output_set_cmd;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++ if (down_interruptible(&ar->arSem)) {
++ return -ERESTARTSYS;
++ }
++
++ if (copy_from_user(&gpio_output_set_cmd, userdata,
++ sizeof(gpio_output_set_cmd)))
++ {
++ ret = -EFAULT;
++ } else {
++ ret = ar6000_gpio_output_set(dev,
++ gpio_output_set_cmd.set_mask,
++ gpio_output_set_cmd.clear_mask,
++ gpio_output_set_cmd.enable_mask,
++ gpio_output_set_cmd.disable_mask);
++ if (ret != A_OK) {
++ ret = EIO;
++ }
++ }
++ up(&ar->arSem);
++ break;
++ }
++ case AR6000_XIOCTL_GPIO_INPUT_GET:
++ {
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++ if (down_interruptible(&ar->arSem)) {
++ return -ERESTARTSYS;
++ }
++
++ ret = ar6000_gpio_input_get(dev);
++ if (ret != A_OK) {
++ up(&ar->arSem);
++ return -EIO;
++ }
++
++ /* Wait for Target to respond. */
++ wait_event_interruptible(arEvent, gpio_data_available);
++ if (signal_pending(current)) {
++ ret = -EINTR;
++ } else {
++ A_ASSERT(gpio_reg_results.gpioreg_id == GPIO_ID_NONE);
++
++ if (copy_to_user(userdata, &gpio_reg_results.value,
++ sizeof(gpio_reg_results.value)))
++ {
++ ret = -EFAULT;
++ }
++ }
++ up(&ar->arSem);
++ break;
++ }
++ case AR6000_XIOCTL_GPIO_REGISTER_SET:
++ {
++ struct ar6000_gpio_register_cmd_s gpio_register_cmd;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++ if (down_interruptible(&ar->arSem)) {
++ return -ERESTARTSYS;
++ }
++
++ if (copy_from_user(&gpio_register_cmd, userdata,
++ sizeof(gpio_register_cmd)))
++ {
++ ret = -EFAULT;
++ } else {
++ ret = ar6000_gpio_register_set(dev,
++ gpio_register_cmd.gpioreg_id,
++ gpio_register_cmd.value);
++ if (ret != A_OK) {
++ ret = EIO;
++ }
++
++ /* Wait for acknowledgement from Target */
++ wait_event_interruptible(arEvent, gpio_ack_received);
++ if (signal_pending(current)) {
++ ret = -EINTR;
++ }
++ }
++ up(&ar->arSem);
++ break;
++ }
++ case AR6000_XIOCTL_GPIO_REGISTER_GET:
++ {
++ struct ar6000_gpio_register_cmd_s gpio_register_cmd;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++ if (down_interruptible(&ar->arSem)) {
++ return -ERESTARTSYS;
++ }
++
++ if (copy_from_user(&gpio_register_cmd, userdata,
++ sizeof(gpio_register_cmd)))
++ {
++ ret = -EFAULT;
++ } else {
++ ret = ar6000_gpio_register_get(dev, gpio_register_cmd.gpioreg_id);
++ if (ret != A_OK) {
++ up(&ar->arSem);
++ return -EIO;
++ }
++
++ /* Wait for Target to respond. */
++ wait_event_interruptible(arEvent, gpio_data_available);
++ if (signal_pending(current)) {
++ ret = -EINTR;
++ } else {
++ A_ASSERT(gpio_register_cmd.gpioreg_id == gpio_reg_results.gpioreg_id);
++ if (copy_to_user(userdata, &gpio_reg_results,
++ sizeof(gpio_reg_results)))
++ {
++ ret = -EFAULT;
++ }
++ }
++ }
++ up(&ar->arSem);
++ break;
++ }
++ case AR6000_XIOCTL_GPIO_INTR_ACK:
++ {
++ struct ar6000_gpio_intr_ack_cmd_s gpio_intr_ack_cmd;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++ if (down_interruptible(&ar->arSem)) {
++ return -ERESTARTSYS;
++ }
++
++ if (copy_from_user(&gpio_intr_ack_cmd, userdata,
++ sizeof(gpio_intr_ack_cmd)))
++ {
++ ret = -EFAULT;
++ } else {
++ ret = ar6000_gpio_intr_ack(dev, gpio_intr_ack_cmd.ack_mask);
++ if (ret != A_OK) {
++ ret = EIO;
++ }
++ }
++ up(&ar->arSem);
++ break;
++ }
++ case AR6000_XIOCTL_GPIO_INTR_WAIT:
++ {
++ /* Wait for Target to report an interrupt. */
++ dev_hold(dev);
++ rtnl_unlock();
++ wait_event_interruptible(arEvent, gpio_intr_available);
++ rtnl_lock();
++ __dev_put(dev);
++
++ if (signal_pending(current)) {
++ ret = -EINTR;
++ } else {
++ if (copy_to_user(userdata, &gpio_intr_results,
++ sizeof(gpio_intr_results)))
++ {
++ ret = -EFAULT;
++ }
++ }
++ break;
++ }
++#endif /* CONFIG_HOST_GPIO_SUPPORT */
++
++ case AR6000_XIOCTL_DBGLOG_CFG_MODULE:
++ {
++ struct ar6000_dbglog_module_config_s config;
++
++ if (copy_from_user(&config, userdata, sizeof(config))) {
++ return -EFAULT;
++ }
++
++ /* Send the challenge on the control channel */
++ if (wmi_config_debug_module_cmd(ar->arWmi, config.mmask,
++ config.tsr, config.rep,
++ config.size, config.valid) != A_OK)
++ {
++ return -EIO;
++ }
++ break;
++ }
++
++ case AR6000_XIOCTL_DBGLOG_GET_DEBUG_LOGS:
++ {
++ /* Send the challenge on the control channel */
++ if (ar6000_dbglog_get_debug_logs(ar) != A_OK)
++ {
++ return -EIO;
++ }
++ break;
++ }
++
++ case AR6000_XIOCTL_SET_ADHOC_BSSID:
++ {
++ WMI_SET_ADHOC_BSSID_CMD adhocBssid;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&adhocBssid, userdata,
++ sizeof(adhocBssid)))
++ {
++ ret = -EFAULT;
++ } else if (A_MEMCMP(adhocBssid.bssid, bcast_mac,
++ AR6000_ETH_ADDR_LEN) == 0)
++ {
++ ret = -EFAULT;
++ } else {
++
++ A_MEMCPY(ar->arReqBssid, adhocBssid.bssid, sizeof(ar->arReqBssid));
++ }
++ break;
++ }
++
++ case AR6000_XIOCTL_SET_OPT_MODE:
++ {
++ WMI_SET_OPT_MODE_CMD optModeCmd;
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&optModeCmd, userdata,
++ sizeof(optModeCmd)))
++ {
++ ret = -EFAULT;
++ } else if (ar->arConnected && optModeCmd.optMode == SPECIAL_ON) {
++ ret = -EFAULT;
++
++ } else if (wmi_set_opt_mode_cmd(ar->arWmi, optModeCmd.optMode)
++ != A_OK)
++ {
++ ret = -EIO;
++ }
++ break;
++ }
++
++ case AR6000_XIOCTL_OPT_SEND_FRAME:
++ {
++ WMI_OPT_TX_FRAME_CMD optTxFrmCmd;
++ A_UINT8 data[MAX_OPT_DATA_LEN];
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&optTxFrmCmd, userdata,
++ sizeof(optTxFrmCmd)))
++ {
++ ret = -EFAULT;
++ } else if (copy_from_user(data,
++ userdata+sizeof(WMI_OPT_TX_FRAME_CMD)-1,
++ optTxFrmCmd.optIEDataLen))
++ {
++ ret = -EFAULT;
++ } else {
++ ret = wmi_opt_tx_frame_cmd(ar->arWmi,
++ optTxFrmCmd.frmType,
++ optTxFrmCmd.dstAddr,
++ optTxFrmCmd.bssid,
++ optTxFrmCmd.optIEDataLen,
++ data);
++ }
++
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SETRETRYLIMITS:
++ {
++ WMI_SET_RETRY_LIMITS_CMD setRetryParams;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&setRetryParams, userdata,
++ sizeof(setRetryParams)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_set_retry_limits_cmd(ar->arWmi, setRetryParams.frameType,
++ setRetryParams.trafficClass,
++ setRetryParams.maxRetries,
++ setRetryParams.enableNotify) != A_OK)
++ {
++ ret = -EIO;
++ }
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++ ar->arMaxRetries = setRetryParams.maxRetries;
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ }
++ break;
++ }
++
++ case AR6000_XIOCTL_SET_ADHOC_BEACON_INTVAL:
++ {
++ WMI_BEACON_INT_CMD bIntvlCmd;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&bIntvlCmd, userdata,
++ sizeof(bIntvlCmd)))
++ {
++ ret = -EFAULT;
++ } else if (wmi_set_adhoc_bconIntvl_cmd(ar->arWmi, bIntvlCmd.beaconInterval)
++ != A_OK)
++ {
++ ret = -EIO;
++ }
++ break;
++ }
++ case IEEE80211_IOCTL_SETAUTHALG:
++ {
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ struct ieee80211req_authalg req;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&req, userdata,
++ sizeof(struct ieee80211req_authalg)))
++ {
++ ret = -EFAULT;
++ } else if (req.auth_alg == AUTH_ALG_OPEN_SYSTEM) {
++ ar->arDot11AuthMode = OPEN_AUTH;
++ ar->arPairwiseCrypto = NONE_CRYPT;
++ ar->arGroupCrypto = NONE_CRYPT;
++ } else if (req.auth_alg == AUTH_ALG_LEAP) {
++ ar->arDot11AuthMode = LEAP_AUTH;
++ } else {
++ ret = -EIO;
++ }
++ break;
++ }
++
++ case AR6000_XIOCTL_SET_VOICE_PKT_SIZE:
++ ret = ar6000_xioctl_set_voice_pkt_size(dev, userdata);
++ break;
++
++ case AR6000_XIOCTL_SET_MAX_SP:
++ ret = ar6000_xioctl_set_max_sp_len(dev, userdata);
++ break;
++
++ case AR6000_XIOCTL_WMI_GET_ROAM_TBL:
++ ret = ar6000_ioctl_get_roam_tbl(dev, rq);
++ break;
++ case AR6000_XIOCTL_WMI_SET_ROAM_CTRL:
++ ret = ar6000_ioctl_set_roam_ctrl(dev, userdata);
++ break;
++ case AR6000_XIOCTRL_WMI_SET_POWERSAVE_TIMERS:
++ ret = ar6000_ioctl_set_powersave_timers(dev, userdata);
++ break;
++ case AR6000_XIOCTRL_WMI_GET_POWER_MODE:
++ ret = ar6000_ioctl_get_power_mode(dev, rq);
++ break;
++ case AR6000_XIOCTRL_WMI_SET_WLAN_STATE:
++ get_user(ar->arWlanState, (unsigned int *)userdata);
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ break;
++ }
++
++ if (ar->arWlanState == WLAN_ENABLED) {
++ /* Enable foreground scanning */
++ if (wmi_scanparams_cmd(ar->arWmi, scParams.fg_start_period,
++ scParams.fg_end_period,
++ scParams.bg_period,
++ scParams.minact_chdwell_time,
++ scParams.maxact_chdwell_time,
++ scParams.pas_chdwell_time,
++ scParams.shortScanRatio,
++ scParams.scanCtrlFlags,
++ scParams.max_dfsch_act_time) != A_OK)
++ {
++ ret = -EIO;
++ }
++ if (ar->arSsidLen) {
++ ar->arConnectPending = TRUE;
++ if (wmi_connect_cmd(ar->arWmi, ar->arNetworkType,
++ ar->arDot11AuthMode, ar->arAuthMode,
++ ar->arPairwiseCrypto,
++ ar->arPairwiseCryptoLen,
++ ar->arGroupCrypto, ar->arGroupCryptoLen,
++ ar->arSsidLen, ar->arSsid,
++ ar->arReqBssid, ar->arChannelHint,
++ ar->arConnectCtrlFlags) != A_OK)
++ {
++ ret = -EIO;
++ ar->arConnectPending = FALSE;
++ }
++ }
++ } else {
++ /* Disconnect from the AP and disable foreground scanning */
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++ if (ar->arConnected == TRUE || ar->arConnectPending == TRUE) {
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ wmi_disconnect_cmd(ar->arWmi);
++ } else {
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ }
++
++ if (wmi_scanparams_cmd(ar->arWmi, 0xFFFF, 0, 0, 0, 0, 0, 0, 0xFF, 0) != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++ break;
++ case AR6000_XIOCTL_WMI_GET_ROAM_DATA:
++ ret = ar6000_ioctl_get_roam_data(dev, rq);
++ break;
++ case AR6000_XIOCTL_WMI_SET_BT_STATUS:
++ ret = ar6000_xioctl_set_bt_status_cmd(dev, userdata);
++ break;
++ case AR6000_XIOCTL_WMI_SET_BT_PARAMS:
++ ret = ar6000_xioctl_set_bt_params_cmd(dev, userdata);
++ break;
++ case AR6000_XIOCTL_WMI_STARTSCAN:
++ {
++ WMI_START_SCAN_CMD setStartScanCmd;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&setStartScanCmd, userdata,
++ sizeof(setStartScanCmd)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_startscan_cmd(ar->arWmi, setStartScanCmd.scanType,
++ setStartScanCmd.forceFgScan,
++ setStartScanCmd.isLegacy,
++ setStartScanCmd.homeDwellTime,
++ setStartScanCmd.forceScanInterval) != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SETFIXRATES:
++ {
++ WMI_FIX_RATES_CMD setFixRatesCmd;
++ A_STATUS returnStatus;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&setFixRatesCmd, userdata,
++ sizeof(setFixRatesCmd)))
++ {
++ ret = -EFAULT;
++ } else {
++ returnStatus = wmi_set_fixrates_cmd(ar->arWmi, setFixRatesCmd.fixRateMask);
++ if (returnStatus == A_EINVAL)
++ {
++ ret = -EINVAL;
++ }
++ else if(returnStatus != A_OK) {
++ ret = -EIO;
++ }
++ }
++ break;
++ }
++
++ case AR6000_XIOCTL_WMI_GETFIXRATES:
++ {
++ WMI_FIX_RATES_CMD getFixRatesCmd;
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (down_interruptible(&ar->arSem)) {
++ return -ERESTARTSYS;
++ }
++ /* Used copy_from_user/copy_to_user to access user space data */
++ if (copy_from_user(&getFixRatesCmd, userdata, sizeof(getFixRatesCmd))) {
++ ret = -EFAULT;
++ } else {
++ ar->arRateMask = 0xFFFF;
++
++ if (wmi_get_ratemask_cmd(ar->arWmi) != A_OK) {
++ up(&ar->arSem);
++ return -EIO;
++ }
++
++ wait_event_interruptible_timeout(arEvent, ar->arRateMask != 0xFFFF, wmitimeout * HZ);
++
++ if (signal_pending(current)) {
++ ret = -EINTR;
++ }
++
++ if (!ret) {
++ getFixRatesCmd.fixRateMask = ar->arRateMask;
++ }
++
++ if(copy_to_user(userdata, &getFixRatesCmd, sizeof(getFixRatesCmd))) {
++ ret = -EFAULT;
++ }
++
++ up(&ar->arSem);
++ }
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SET_AUTHMODE:
++ {
++ WMI_SET_AUTH_MODE_CMD setAuthMode;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&setAuthMode, userdata,
++ sizeof(setAuthMode)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_set_authmode_cmd(ar->arWmi, setAuthMode.mode) != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SET_REASSOCMODE:
++ {
++ WMI_SET_REASSOC_MODE_CMD setReassocMode;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&setReassocMode, userdata,
++ sizeof(setReassocMode)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_set_reassocmode_cmd(ar->arWmi, setReassocMode.mode) != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++ break;
++ }
++ case AR6000_XIOCTL_DIAG_READ:
++ {
++ A_UINT32 addr, data;
++ get_user(addr, (unsigned int *)userdata);
++ if (ar6000_ReadRegDiag(ar->arHifDevice, &addr, &data) != A_OK) {
++ ret = -EIO;
++ }
++ put_user(data, (unsigned int *)userdata + 1);
++ break;
++ }
++ case AR6000_XIOCTL_DIAG_WRITE:
++ {
++ A_UINT32 addr, data;
++ get_user(addr, (unsigned int *)userdata);
++ get_user(data, (unsigned int *)userdata + 1);
++ if (ar6000_WriteRegDiag(ar->arHifDevice, &addr, &data) != A_OK) {
++ ret = -EIO;
++ }
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SET_KEEPALIVE:
++ {
++ WMI_SET_KEEPALIVE_CMD setKeepAlive;
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ } else if (copy_from_user(&setKeepAlive, userdata,
++ sizeof(setKeepAlive))){
++ ret = -EFAULT;
++ } else {
++ if (wmi_set_keepalive_cmd(ar->arWmi, setKeepAlive.keepaliveInterval) != A_OK) {
++ ret = -EIO;
++ }
++ }
++ break;
++ }
++ case AR6000_XIOCTL_WMI_GET_KEEPALIVE:
++ {
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ WMI_GET_KEEPALIVE_CMD getKeepAlive;
++ int ret = 0;
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++ if (down_interruptible(&ar->arSem)) {
++ return -ERESTARTSYS;
++ }
++ if (copy_from_user(&getKeepAlive, userdata,sizeof(getKeepAlive))) {
++ ret = -EFAULT;
++ } else {
++ getKeepAlive.keepaliveInterval = wmi_get_keepalive_cmd(ar->arWmi);
++ ar->arKeepaliveConfigured = 0xFF;
++ if (wmi_get_keepalive_configured(ar->arWmi) != A_OK){
++ up(&ar->arSem);
++ return -EIO;
++ }
++ wait_event_interruptible_timeout(arEvent, ar->arKeepaliveConfigured != 0xFF, wmitimeout * HZ);
++ if (signal_pending(current)) {
++ ret = -EINTR;
++ }
++
++ if (!ret) {
++ getKeepAlive.configured = ar->arKeepaliveConfigured;
++ }
++ if (copy_to_user(userdata, &getKeepAlive, sizeof(getKeepAlive))) {
++ ret = -EFAULT;
++ }
++ up(&ar->arSem);
++ }
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SET_APPIE:
++ {
++ WMI_SET_APPIE_CMD appIEcmd;
++ A_UINT8 appIeInfo[IEEE80211_APPIE_FRAME_MAX_LEN];
++ A_UINT32 fType,ieLen;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++ get_user(fType, (A_UINT32 *)userdata);
++ appIEcmd.mgmtFrmType = fType;
++ if (appIEcmd.mgmtFrmType >= IEEE80211_APPIE_NUM_OF_FRAME) {
++ ret = -EIO;
++ } else {
++ get_user(ieLen, (A_UINT32 *)(userdata + 4));
++ appIEcmd.ieLen = ieLen;
++ if (appIEcmd.ieLen > IEEE80211_APPIE_FRAME_MAX_LEN) {
++ ret = -EIO;
++ break;
++ }
++ if (copy_from_user(appIeInfo, userdata + 8, appIEcmd.ieLen)) {
++ ret = -EFAULT;
++ } else {
++ if (wmi_set_appie_cmd(ar->arWmi, appIEcmd.mgmtFrmType,
++ appIEcmd.ieLen, appIeInfo) != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++ }
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SET_MGMT_FRM_RX_FILTER:
++ {
++ WMI_BSS_FILTER_CMD cmd;
++ A_UINT32 filterType;
++
++ if (copy_from_user(&filterType, userdata, sizeof(A_UINT32)))
++ {
++ return -EFAULT;
++ }
++ if (filterType & (IEEE80211_FILTER_TYPE_BEACON |
++ IEEE80211_FILTER_TYPE_PROBE_RESP))
++ {
++ cmd.bssFilter = ALL_BSS_FILTER;
++ } else {
++ cmd.bssFilter = NONE_BSS_FILTER;
++ }
++ if (wmi_bssfilter_cmd(ar->arWmi, cmd.bssFilter, 0) != A_OK) {
++ ret = -EIO;
++ }
++
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++ ar->arMgmtFilter = filterType;
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SET_WSC_STATUS:
++ {
++ A_UINT32 wsc_status;
++
++ if (copy_from_user(&wsc_status, userdata, sizeof(A_UINT32)))
++ {
++ return -EFAULT;
++ }
++ if (wmi_set_wsc_status_cmd(ar->arWmi, wsc_status) != A_OK) {
++ ret = -EIO;
++ }
++ break;
++ }
++ case AR6000_XIOCTL_BMI_ROMPATCH_INSTALL:
++ {
++ A_UINT32 ROM_addr;
++ A_UINT32 RAM_addr;
++ A_UINT32 nbytes;
++ A_UINT32 do_activate;
++ A_UINT32 rompatch_id;
++
++ get_user(ROM_addr, (A_UINT32 *)userdata);
++ get_user(RAM_addr, (A_UINT32 *)userdata + 1);
++ get_user(nbytes, (A_UINT32 *)userdata + 2);
++ get_user(do_activate, (A_UINT32 *)userdata + 3);
++ AR_DEBUG_PRINTF("Install rompatch from ROM: 0x%x to RAM: 0x%x length: %d\n",
++ ROM_addr, RAM_addr, nbytes);
++ ret = BMIrompatchInstall(hifDevice, ROM_addr, RAM_addr,
++ nbytes, do_activate, &rompatch_id);
++ if (ret == A_OK) {
++ put_user(rompatch_id, (unsigned int *)rq->ifr_data); /* return value */
++ }
++ break;
++ }
++
++ case AR6000_XIOCTL_BMI_ROMPATCH_UNINSTALL:
++ {
++ A_UINT32 rompatch_id;
++
++ get_user(rompatch_id, (A_UINT32 *)userdata);
++ AR_DEBUG_PRINTF("UNinstall rompatch_id %d\n", rompatch_id);
++ ret = BMIrompatchUninstall(hifDevice, rompatch_id);
++ break;
++ }
++
++ case AR6000_XIOCTL_BMI_ROMPATCH_ACTIVATE:
++ case AR6000_XIOCTL_BMI_ROMPATCH_DEACTIVATE:
++ {
++ A_UINT32 rompatch_count;
++
++ get_user(rompatch_count, (A_UINT32 *)userdata);
++ AR_DEBUG_PRINTF("Change rompatch activation count=%d\n", rompatch_count);
++ length = sizeof(A_UINT32) * rompatch_count;
++ if ((buffer = (unsigned char *)A_MALLOC(length)) != NULL) {
++ A_MEMZERO(buffer, length);
++ if (copy_from_user(buffer, &userdata[sizeof(rompatch_count)], length))
++ {
++ ret = -EFAULT;
++ } else {
++ if (cmd == AR6000_XIOCTL_BMI_ROMPATCH_ACTIVATE) {
++ ret = BMIrompatchActivate(hifDevice, rompatch_count, (A_UINT32 *)buffer);
++ } else {
++ ret = BMIrompatchDeactivate(hifDevice, rompatch_count, (A_UINT32 *)buffer);
++ }
++ }
++ A_FREE(buffer);
++ } else {
++ ret = -ENOMEM;
++ }
++
++ break;
++ }
++
++ case AR6000_XIOCTL_WMI_SET_HOST_SLEEP_MODE:
++ {
++ WMI_SET_HOST_SLEEP_MODE_CMD setHostSleepMode;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&setHostSleepMode, userdata,
++ sizeof(setHostSleepMode)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_set_host_sleep_mode_cmd(ar->arWmi,
++ &setHostSleepMode) != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++ break;
++ }
++ case AR6000_XIOCTL_WMI_SET_WOW_MODE:
++ {
++ WMI_SET_WOW_MODE_CMD setWowMode;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&setWowMode, userdata,
++ sizeof(setWowMode)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_set_wow_mode_cmd(ar->arWmi,
++ &setWowMode) != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++ break;
++ }
++ case AR6000_XIOCTL_WMI_GET_WOW_LIST:
++ {
++ WMI_GET_WOW_LIST_CMD getWowList;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&getWowList, userdata,
++ sizeof(getWowList)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_get_wow_list_cmd(ar->arWmi,
++ &getWowList) != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++ break;
++ }
++ case AR6000_XIOCTL_WMI_ADD_WOW_PATTERN:
++ {
++#define WOW_PATTERN_SIZE 64
++#define WOW_MASK_SIZE 64
++
++ WMI_ADD_WOW_PATTERN_CMD cmd;
++ A_UINT8 mask_data[WOW_PATTERN_SIZE]={0};
++ A_UINT8 pattern_data[WOW_PATTERN_SIZE]={0};
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else {
++
++ if(copy_from_user(&cmd, userdata,
++ sizeof(WMI_ADD_WOW_PATTERN_CMD)))
++ return -EFAULT;
++ if (copy_from_user(pattern_data,
++ userdata + 3,
++ cmd.filter_size)){
++ ret = -EFAULT;
++ break;
++ }
++ if (copy_from_user(mask_data,
++ (userdata + 3 + cmd.filter_size),
++ cmd.filter_size)){
++ ret = -EFAULT;
++ break;
++ } else {
++ if (wmi_add_wow_pattern_cmd(ar->arWmi,
++ &cmd, pattern_data, mask_data, cmd.filter_size) != A_OK){
++ ret = -EIO;
++ }
++ }
++ }
++#undef WOW_PATTERN_SIZE
++#undef WOW_MASK_SIZE
++ break;
++ }
++ case AR6000_XIOCTL_WMI_DEL_WOW_PATTERN:
++ {
++ WMI_DEL_WOW_PATTERN_CMD delWowPattern;
++
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&delWowPattern, userdata,
++ sizeof(delWowPattern)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_del_wow_pattern_cmd(ar->arWmi,
++ &delWowPattern) != A_OK)
++ {
++ ret = -EIO;
++ }
++ }
++ break;
++ }
++ case AR6000_XIOCTL_DUMP_HTC_CREDIT_STATE:
++ if (ar->arHtcTarget != NULL) {
++ HTCDumpCreditStates(ar->arHtcTarget);
++ }
++ break;
++ case AR6000_XIOCTL_TRAFFIC_ACTIVITY_CHANGE:
++ if (ar->arHtcTarget != NULL) {
++ struct ar6000_traffic_activity_change data;
++
++ if (copy_from_user(&data, userdata, sizeof(data)))
++ {
++ return -EFAULT;
++ }
++ /* note, this is used for testing (mbox ping testing), indicate activity
++ * change using the stream ID as the traffic class */
++ ar6000_indicate_tx_activity(ar,
++ (A_UINT8)data.StreamID,
++ data.Active ? TRUE : FALSE);
++ }
++ break;
++ case AR6000_XIOCTL_WMI_SET_CONNECT_CTRL_FLAGS:
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&connectCtrlFlags, userdata,
++ sizeof(connectCtrlFlags)))
++ {
++ ret = -EFAULT;
++ } else {
++ ar->arConnectCtrlFlags = connectCtrlFlags;
++ }
++ break;
++ case AR6000_XIOCTL_WMI_SET_AKMP_PARAMS:
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else if (copy_from_user(&akmpParams, userdata,
++ sizeof(WMI_SET_AKMP_PARAMS_CMD)))
++ {
++ ret = -EFAULT;
++ } else {
++ if (wmi_set_akmp_params_cmd(ar->arWmi, &akmpParams) != A_OK) {
++ ret = -EIO;
++ }
++ }
++ break;
++ case AR6000_XIOCTL_WMI_SET_PMKID_LIST:
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else {
++ if (copy_from_user(&pmkidInfo.numPMKID, userdata,
++ sizeof(pmkidInfo.numPMKID)))
++ {
++ ret = -EFAULT;
++ break;
++ }
++ if (copy_from_user(&pmkidInfo.pmkidList,
++ userdata + sizeof(pmkidInfo.numPMKID),
++ pmkidInfo.numPMKID * sizeof(WMI_PMKID)))
++ {
++ ret = -EFAULT;
++ break;
++ }
++ if (wmi_set_pmkid_list_cmd(ar->arWmi, &pmkidInfo) != A_OK) {
++ ret = -EIO;
++ }
++ }
++ break;
++ case AR6000_XIOCTL_WMI_GET_PMKID_LIST:
++ if (ar->arWmiReady == FALSE) {
++ ret = -EIO;
++ } else {
++ if (wmi_get_pmkid_list_cmd(ar->arWmi) != A_OK) {
++ ret = -EIO;
++ }
++ }
++ break;
++ default:
++ ret = -EOPNOTSUPP;
++ }
++ return ret;
++}
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/netbuf.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/netbuf.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,225 @@
++
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++#include <linux/kernel.h>
++#include <linux/skbuff.h>
++#include <a_config.h>
++#include "athdefs.h"
++#include "a_types.h"
++#include "a_osapi.h"
++#include "htc_packet.h"
++
++#define AR6000_DATA_OFFSET 64
++
++void a_netbuf_enqueue(A_NETBUF_QUEUE_T *q, void *pkt)
++{
++ skb_queue_tail((struct sk_buff_head *) q, (struct sk_buff *) pkt);
++}
++
++void a_netbuf_prequeue(A_NETBUF_QUEUE_T *q, void *pkt)
++{
++ skb_queue_head((struct sk_buff_head *) q, (struct sk_buff *) pkt);
++}
++
++void *a_netbuf_dequeue(A_NETBUF_QUEUE_T *q)
++{
++ return((void *) skb_dequeue((struct sk_buff_head *) q));
++}
++
++int a_netbuf_queue_size(A_NETBUF_QUEUE_T *q)
++{
++ return(skb_queue_len((struct sk_buff_head *) q));
++}
++
++int a_netbuf_queue_empty(A_NETBUF_QUEUE_T *q)
++{
++ return(skb_queue_empty((struct sk_buff_head *) q));
++}
++
++void a_netbuf_queue_init(A_NETBUF_QUEUE_T *q)
++{
++ skb_queue_head_init((struct sk_buff_head *) q);
++}
++
++void *
++a_netbuf_alloc(int size)
++{
++ struct sk_buff *skb;
++ skb = dev_alloc_skb(AR6000_DATA_OFFSET + sizeof(HTC_PACKET) + size);
++ skb_reserve(skb, AR6000_DATA_OFFSET + sizeof(HTC_PACKET));
++ return ((void *)skb);
++}
++
++/*
++ * Allocate an SKB w.o. any encapsulation requirement.
++ */
++void *
++a_netbuf_alloc_raw(int size)
++{
++ struct sk_buff *skb;
++
++ skb = dev_alloc_skb(size);
++
++ return ((void *)skb);
++}
++
++void
++a_netbuf_free(void *bufPtr)
++{
++ struct sk_buff *skb = (struct sk_buff *)bufPtr;
++
++ dev_kfree_skb(skb);
++}
++
++A_UINT32
++a_netbuf_to_len(void *bufPtr)
++{
++ return (((struct sk_buff *)bufPtr)->len);
++}
++
++void *
++a_netbuf_to_data(void *bufPtr)
++{
++ return (((struct sk_buff *)bufPtr)->data);
++}
++
++/*
++ * Add len # of bytes to the beginning of the network buffer
++ * pointed to by bufPtr
++ */
++A_STATUS
++a_netbuf_push(void *bufPtr, A_INT32 len)
++{
++ skb_push((struct sk_buff *)bufPtr, len);
++
++ return A_OK;
++}
++
++/*
++ * Add len # of bytes to the beginning of the network buffer
++ * pointed to by bufPtr and also fill with data
++ */
++A_STATUS
++a_netbuf_push_data(void *bufPtr, char *srcPtr, A_INT32 len)
++{
++ skb_push((struct sk_buff *) bufPtr, len);
++ A_MEMCPY(((struct sk_buff *)bufPtr)->data, srcPtr, len);
++
++ return A_OK;
++}
++
++/*
++ * Add len # of bytes to the end of the network buffer
++ * pointed to by bufPtr
++ */
++A_STATUS
++a_netbuf_put(void *bufPtr, A_INT32 len)
++{
++ skb_put((struct sk_buff *)bufPtr, len);
++
++ return A_OK;
++}
++
++/*
++ * Add len # of bytes to the end of the network buffer
++ * pointed to by bufPtr and also fill with data
++ */
++A_STATUS
++a_netbuf_put_data(void *bufPtr, char *srcPtr, A_INT32 len)
++{
++ char *start = ((struct sk_buff *)bufPtr)->data +
++ ((struct sk_buff *)bufPtr)->len;
++ skb_put((struct sk_buff *)bufPtr, len);
++ A_MEMCPY(start, srcPtr, len);
++
++ return A_OK;
++}
++
++
++/*
++ * Trim the network buffer pointed to by bufPtr to len # of bytes
++ */
++A_STATUS
++a_netbuf_setlen(void *bufPtr, A_INT32 len)
++{
++ skb_trim((struct sk_buff *)bufPtr, len);
++
++ return A_OK;
++}
++
++/*
++ * Chop of len # of bytes from the end of the buffer.
++ */
++A_STATUS
++a_netbuf_trim(void *bufPtr, A_INT32 len)
++{
++ skb_trim((struct sk_buff *)bufPtr, ((struct sk_buff *)bufPtr)->len - len);
++
++ return A_OK;
++}
++
++/*
++ * Chop of len # of bytes from the end of the buffer and return the data.
++ */
++A_STATUS
++a_netbuf_trim_data(void *bufPtr, char *dstPtr, A_INT32 len)
++{
++ char *start = ((struct sk_buff *)bufPtr)->data +
++ (((struct sk_buff *)bufPtr)->len - len);
++
++ A_MEMCPY(dstPtr, start, len);
++ skb_trim((struct sk_buff *)bufPtr, ((struct sk_buff *)bufPtr)->len - len);
++
++ return A_OK;
++}
++
++
++/*
++ * Returns the number of bytes available to a a_netbuf_push()
++ */
++A_INT32
++a_netbuf_headroom(void *bufPtr)
++{
++ return (skb_headroom((struct sk_buff *)bufPtr));
++}
++
++/*
++ * Removes specified number of bytes from the beginning of the buffer
++ */
++A_STATUS
++a_netbuf_pull(void *bufPtr, A_INT32 len)
++{
++ skb_pull((struct sk_buff *)bufPtr, len);
++
++ return A_OK;
++}
++
++/*
++ * Removes specified number of bytes from the beginning of the buffer
++ * and return the data
++ */
++A_STATUS
++a_netbuf_pull_data(void *bufPtr, char *dstPtr, A_INT32 len)
++{
++ A_MEMCPY(dstPtr, ((struct sk_buff *)bufPtr)->data, len);
++ skb_pull((struct sk_buff *)bufPtr, len);
++
++ return A_OK;
++}
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/osapi_linux.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/osapi_linux.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,319 @@
++/*
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/os/linux/include/osapi_linux.h#1 $
++ *
++ * This file contains the definitions of the basic atheros data types.
++ * It is used to map the data types in atheros files to a platform specific
++ * type.
++ *
++ * Copyright 2003-2005 Atheros Communications, Inc., All Rights Reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifndef _OSAPI_LINUX_H_
++#define _OSAPI_LINUX_H_
++
++#ifdef __KERNEL__
++
++#include <linux/version.h>
++#include <linux/types.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/skbuff.h>
++#include <linux/netdevice.h>
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++#include <linux/jiffies.h>
++#endif
++#include <linux/timer.h>
++#include <linux/delay.h>
++#include <linux/wait.h>
++#ifdef KERNEL_2_4
++#include <asm/arch/irq.h>
++#include <asm/irq.h>
++#endif
++
++#ifdef __GNUC__
++#define __ATTRIB_PACK __attribute__ ((packed))
++#define __ATTRIB_PRINTF __attribute__ ((format (printf, 1, 2)))
++#define __ATTRIB_NORETURN __attribute__ ((noreturn))
++#ifndef INLINE
++#define INLINE __inline__
++#endif
++#else /* Not GCC */
++#define __ATTRIB_PACK
++#define __ATTRIB_PRINTF
++#define __ATTRIB_NORETURN
++#ifndef INLINE
++#define INLINE __inline
++#endif
++#endif /* End __GNUC__ */
++
++#define PREPACK
++#define POSTPACK __ATTRIB_PACK
++
++/*
++ * Endianes macros
++ */
++#define A_BE2CPU8(x) ntohb(x)
++#define A_BE2CPU16(x) ntohs(x)
++#define A_BE2CPU32(x) ntohl(x)
++
++#define A_LE2CPU8(x) (x)
++#define A_LE2CPU16(x) (x)
++#define A_LE2CPU32(x) (x)
++
++#define A_CPU2BE8(x) htonb(x)
++#define A_CPU2BE16(x) htons(x)
++#define A_CPU2BE32(x) htonl(x)
++
++#define A_MEMCPY(dst, src, len) memcpy((A_UINT8 *)(dst), (src), (len))
++#define A_MEMZERO(addr, len) memset(addr, 0, len)
++#define A_MEMCMP(addr1, addr2, len) memcmp((addr1), (addr2), (len))
++#define A_MALLOC(size) kmalloc((size), GFP_KERNEL)
++#define A_MALLOC_NOWAIT(size) kmalloc((size), GFP_ATOMIC)
++#define A_FREE(addr) kfree(addr)
++#define A_PRINTF(args...) printk(args)
++
++/* Mutual Exclusion */
++typedef spinlock_t A_MUTEX_T;
++#define A_MUTEX_INIT(mutex) spin_lock_init(mutex)
++#define A_MUTEX_LOCK(mutex) spin_lock_bh(mutex)
++#define A_MUTEX_UNLOCK(mutex) spin_unlock_bh(mutex)
++#define A_IS_MUTEX_VALID(mutex) TRUE /* okay to return true, since A_MUTEX_DELETE does nothing */
++#define A_MUTEX_DELETE(mutex) /* spin locks are not kernel resources so nothing to free.. */
++
++/* Get current time in ms adding a constant offset (in ms) */
++#define A_GET_MS(offset) \
++ (jiffies + ((offset) / 1000) * HZ)
++
++/*
++ * Timer Functions
++ */
++#define A_MDELAY(msecs) mdelay(msecs)
++typedef struct timer_list A_TIMER;
++
++#define A_INIT_TIMER(pTimer, pFunction, pArg) do { \
++ init_timer(pTimer); \
++ (pTimer)->function = (pFunction); \
++ (pTimer)->data = (unsigned long)(pArg); \
++} while (0)
++
++/*
++ * Start a Timer that elapses after 'periodMSec' milli-seconds
++ * Support is provided for a one-shot timer. The 'repeatFlag' is
++ * ignored.
++ */
++#define A_TIMEOUT_MS(pTimer, periodMSec, repeatFlag) do { \
++ if (repeatFlag) { \
++ printk("\n" __FILE__ ":%d: Timer Repeat requested\n",__LINE__); \
++ panic("Timer Repeat"); \
++ } \
++ mod_timer((pTimer), jiffies + HZ * (periodMSec) / 1000); \
++} while (0)
++
++/*
++ * Cancel the Timer.
++ */
++#define A_UNTIMEOUT(pTimer) do { \
++ del_timer((pTimer)); \
++} while (0)
++
++#define A_DELETE_TIMER(pTimer) do { \
++} while (0)
++
++/*
++ * Wait Queue related functions
++ */
++typedef wait_queue_head_t A_WAITQUEUE_HEAD;
++#define A_INIT_WAITQUEUE_HEAD(head) init_waitqueue_head(head)
++#ifndef wait_event_interruptible_timeout
++#define __wait_event_interruptible_timeout(wq, condition, ret) \
++do { \
++ wait_queue_t __wait; \
++ init_waitqueue_entry(&__wait, current); \
++ \
++ add_wait_queue(&wq, &__wait); \
++ for (;;) { \
++ set_current_state(TASK_INTERRUPTIBLE); \
++ if (condition) \
++ break; \
++ if (!signal_pending(current)) { \
++ ret = schedule_timeout(ret); \
++ if (!ret) \
++ break; \
++ continue; \
++ } \
++ ret = -ERESTARTSYS; \
++ break; \
++ } \
++ current->state = TASK_RUNNING; \
++ remove_wait_queue(&wq, &__wait); \
++} while (0)
++
++#define wait_event_interruptible_timeout(wq, condition, timeout) \
++({ \
++ long __ret = timeout; \
++ if (!(condition)) \
++ __wait_event_interruptible_timeout(wq, condition, __ret); \
++ __ret; \
++})
++#endif /* wait_event_interruptible_timeout */
++
++#define A_WAIT_EVENT_INTERRUPTIBLE_TIMEOUT(head, condition, timeout) do { \
++ wait_event_interruptible_timeout(head, condition, timeout); \
++} while (0)
++
++#define A_WAKE_UP(head) wake_up(head)
++
++#ifdef DEBUG
++#define A_ASSERT(expr) \
++ if (!(expr)) { \
++ printk(KERN_ALERT "\n" __FILE__ ":%d: Assertion " #expr " failed!\n",__LINE__); \
++ panic(#expr); \
++ }
++
++#else
++#define A_ASSERT(expr)
++#endif /* DEBUG */
++
++/*
++ * Initialization of the network buffer subsystem
++ */
++#define A_NETBUF_INIT()
++
++/*
++ * Network buffer queue support
++ */
++typedef struct sk_buff_head A_NETBUF_QUEUE_T;
++
++#define A_NETBUF_QUEUE_INIT(q) \
++ a_netbuf_queue_init(q)
++
++#define A_NETBUF_ENQUEUE(q, pkt) \
++ a_netbuf_enqueue((q), (pkt))
++#define A_NETBUF_PREQUEUE(q, pkt) \
++ a_netbuf_prequeue((q), (pkt))
++#define A_NETBUF_DEQUEUE(q) \
++ (a_netbuf_dequeue(q))
++#define A_NETBUF_QUEUE_SIZE(q) \
++ a_netbuf_queue_size(q)
++#define A_NETBUF_QUEUE_EMPTY(q) \
++ a_netbuf_queue_empty(q)
++
++/*
++ * Network buffer support
++ */
++#define A_NETBUF_ALLOC(size) \
++ a_netbuf_alloc(size)
++#define A_NETBUF_ALLOC_RAW(size) \
++ a_netbuf_alloc_raw(size)
++#define A_NETBUF_FREE(bufPtr) \
++ a_netbuf_free(bufPtr)
++#define A_NETBUF_DATA(bufPtr) \
++ a_netbuf_to_data(bufPtr)
++#define A_NETBUF_LEN(bufPtr) \
++ a_netbuf_to_len(bufPtr)
++#define A_NETBUF_PUSH(bufPtr, len) \
++ a_netbuf_push(bufPtr, len)
++#define A_NETBUF_PUT(bufPtr, len) \
++ a_netbuf_put(bufPtr, len)
++#define A_NETBUF_TRIM(bufPtr,len) \
++ a_netbuf_trim(bufPtr, len)
++#define A_NETBUF_PULL(bufPtr, len) \
++ a_netbuf_pull(bufPtr, len)
++#define A_NETBUF_HEADROOM(bufPtr)\
++ a_netbuf_headroom(bufPtr)
++#define A_NETBUF_SETLEN(bufPtr,len) \
++ a_netbuf_setlen(bufPtr, len)
++
++/* Add data to end of a buffer */
++#define A_NETBUF_PUT_DATA(bufPtr, srcPtr, len) \
++ a_netbuf_put_data(bufPtr, srcPtr, len)
++
++/* Add data to start of the buffer */
++#define A_NETBUF_PUSH_DATA(bufPtr, srcPtr, len) \
++ a_netbuf_push_data(bufPtr, srcPtr, len)
++
++/* Remove data at start of the buffer */
++#define A_NETBUF_PULL_DATA(bufPtr, dstPtr, len) \
++ a_netbuf_pull_data(bufPtr, dstPtr, len)
++
++/* Remove data from the end of the buffer */
++#define A_NETBUF_TRIM_DATA(bufPtr, dstPtr, len) \
++ a_netbuf_trim_data(bufPtr, dstPtr, len)
++
++/* View data as "size" contiguous bytes of type "t" */
++#define A_NETBUF_VIEW_DATA(bufPtr, t, size) \
++ (t )( ((struct skbuf *)(bufPtr))->data)
++
++/* return the beginning of the headroom for the buffer */
++#define A_NETBUF_HEAD(bufPtr) \
++ ((((struct sk_buff *)(bufPtr))->head))
++
++/*
++ * OS specific network buffer access routines
++ */
++void *a_netbuf_alloc(int size);
++void *a_netbuf_alloc_raw(int size);
++void a_netbuf_free(void *bufPtr);
++void *a_netbuf_to_data(void *bufPtr);
++A_UINT32 a_netbuf_to_len(void *bufPtr);
++A_STATUS a_netbuf_push(void *bufPtr, A_INT32 len);
++A_STATUS a_netbuf_push_data(void *bufPtr, char *srcPtr, A_INT32 len);
++A_STATUS a_netbuf_put(void *bufPtr, A_INT32 len);
++A_STATUS a_netbuf_put_data(void *bufPtr, char *srcPtr, A_INT32 len);
++A_STATUS a_netbuf_pull(void *bufPtr, A_INT32 len);
++A_STATUS a_netbuf_pull_data(void *bufPtr, char *dstPtr, A_INT32 len);
++A_STATUS a_netbuf_trim(void *bufPtr, A_INT32 len);
++A_STATUS a_netbuf_trim_data(void *bufPtr, char *dstPtr, A_INT32 len);
++A_STATUS a_netbuf_setlen(void *bufPtr, A_INT32 len);
++A_INT32 a_netbuf_headroom(void *bufPtr);
++void a_netbuf_enqueue(A_NETBUF_QUEUE_T *q, void *pkt);
++void a_netbuf_prequeue(A_NETBUF_QUEUE_T *q, void *pkt);
++void *a_netbuf_dequeue(A_NETBUF_QUEUE_T *q);
++int a_netbuf_queue_size(A_NETBUF_QUEUE_T *q);
++int a_netbuf_queue_empty(A_NETBUF_QUEUE_T *q);
++int a_netbuf_queue_empty(A_NETBUF_QUEUE_T *q);
++void a_netbuf_queue_init(A_NETBUF_QUEUE_T *q);
++
++/*
++ * Kernel v.s User space functions
++ */
++A_UINT32 a_copy_to_user(void *to, const void *from, A_UINT32 n);
++A_UINT32 a_copy_from_user(void *to, const void *from, A_UINT32 n);
++
++#else /* __KERNEL__ */
++
++#ifdef __GNUC__
++#define __ATTRIB_PACK __attribute__ ((packed))
++#define __ATTRIB_PRINTF __attribute__ ((format (printf, 1, 2)))
++#define __ATTRIB_NORETURN __attribute__ ((noreturn))
++#ifndef INLINE
++#define INLINE __inline__
++#endif
++#else /* Not GCC */
++#define __ATTRIB_PACK
++#define __ATTRIB_PRINTF
++#define __ATTRIB_NORETURN
++#ifndef INLINE
++#define INLINE __inline
++#endif
++#endif /* End __GNUC__ */
++
++#define PREPACK
++#define POSTPACK __ATTRIB_PACK
++
++#endif /* __KERNEL__ */
++
++#endif /* _OSAPI_LINUX_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/wireless_ext.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/wireless_ext.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,1952 @@
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "ar6000_drv.h"
++
++static A_UINT8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
++static void ar6000_set_quality(struct iw_quality *iq, A_INT8 rssi);
++extern unsigned int wmitimeout;
++extern A_WAITQUEUE_HEAD arEvent;
++extern wait_queue_head_t ar6000_scan_queue;
++
++/*
++ * Encode a WPA or RSN information element as a custom
++ * element using the hostap format.
++ */
++static u_int
++encode_ie(void *buf, size_t bufsize,
++ const u_int8_t *ie, size_t ielen,
++ const char *leader, size_t leader_len)
++{
++ u_int8_t *p;
++ int i;
++
++ if (bufsize < leader_len)
++ return 0;
++ p = buf;
++ memcpy(p, leader, leader_len);
++ bufsize -= leader_len;
++ p += leader_len;
++ for (i = 0; i < ielen && bufsize > 2; i++)
++ p += sprintf(p, "%02x", ie[i]);
++ return (i == ielen ? p - (u_int8_t *)buf : 0);
++}
++
++void
++ar6000_scan_node(void *arg, bss_t *ni)
++{
++ struct iw_event iwe;
++#if WIRELESS_EXT > 14
++ char buf[64*2 + 30];
++#endif
++ struct ar_giwscan_param *param;
++ A_CHAR *current_ev;
++ A_CHAR *end_buf;
++ struct ieee80211_common_ie *cie;
++
++ param = (struct ar_giwscan_param *)arg;
++
++ if (param->current_ev >= param->end_buf) {
++ return;
++ }
++ if ((param->firstPass == TRUE) &&
++ ((ni->ni_cie.ie_wpa == NULL) && (ni->ni_cie.ie_rsn == NULL))) {
++ /*
++ * Only forward wpa bss's in first pass
++ */
++ return;
++ }
++
++ if ((param->firstPass == FALSE) &&
++ ((ni->ni_cie.ie_wpa != NULL) || (ni->ni_cie.ie_rsn != NULL))) {
++ /*
++ * Only forward non-wpa bss's in 2nd pass
++ */
++ return;
++ }
++
++ current_ev = param->current_ev;
++ end_buf = param->end_buf;
++
++ cie = &ni->ni_cie;
++
++ A_MEMZERO(&iwe, sizeof(iwe));
++ iwe.cmd = SIOCGIWAP;
++ iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
++ A_MEMCPY(iwe.u.ap_addr.sa_data, ni->ni_macaddr, 6);
++ current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
++ IW_EV_ADDR_LEN);
++
++ A_MEMZERO(&iwe, sizeof(iwe));
++ iwe.cmd = SIOCGIWESSID;
++ iwe.u.data.flags = 1;
++ iwe.u.data.length = cie->ie_ssid[1];
++ current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe,
++ &cie->ie_ssid[2]);
++
++ if (cie->ie_capInfo & (IEEE80211_CAPINFO_ESS|IEEE80211_CAPINFO_IBSS)) {
++ A_MEMZERO(&iwe, sizeof(iwe));
++ iwe.cmd = SIOCGIWMODE;
++ iwe.u.mode = cie->ie_capInfo & IEEE80211_CAPINFO_ESS ?
++ IW_MODE_MASTER : IW_MODE_ADHOC;
++ current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
++ IW_EV_UINT_LEN);
++ }
++
++ A_MEMZERO(&iwe, sizeof(iwe));
++ iwe.cmd = SIOCGIWFREQ;
++ iwe.u.freq.m = cie->ie_chan * 100000;
++ iwe.u.freq.e = 1;
++ current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
++ IW_EV_FREQ_LEN);
++
++ A_MEMZERO(&iwe, sizeof(iwe));
++ iwe.cmd = IWEVQUAL;
++ ar6000_set_quality(&iwe.u.qual, ni->ni_snr);
++ current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
++ IW_EV_QUAL_LEN);
++
++ A_MEMZERO(&iwe, sizeof(iwe));
++ iwe.cmd = SIOCGIWENCODE;
++ if (cie->ie_capInfo & IEEE80211_CAPINFO_PRIVACY) {
++ iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
++ } else {
++ iwe.u.data.flags = IW_ENCODE_DISABLED;
++ }
++ iwe.u.data.length = 0;
++ current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, "");
++
++ A_MEMZERO(&iwe, sizeof(iwe));
++ iwe.cmd = IWEVCUSTOM;
++ snprintf(buf, sizeof(buf), "bcn_int=%d", cie->ie_beaconInt);
++ iwe.u.data.length = strlen(buf);
++ current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf);
++
++ if (cie->ie_wpa != NULL) {
++ static const char wpa_leader[] = "wpa_ie=";
++
++ A_MEMZERO(&iwe, sizeof(iwe));
++ iwe.cmd = IWEVCUSTOM;
++ iwe.u.data.length = encode_ie(buf, sizeof(buf), cie->ie_wpa,
++ cie->ie_wpa[1]+2,
++ wpa_leader, sizeof(wpa_leader)-1);
++
++ if (iwe.u.data.length != 0) {
++ current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf);
++ }
++ }
++
++ if (cie->ie_rsn != NULL && cie->ie_rsn[0] == IEEE80211_ELEMID_RSN) {
++ static const char rsn_leader[] = "rsn_ie=";
++
++ A_MEMZERO(&iwe, sizeof(iwe));
++ iwe.cmd = IWEVCUSTOM;
++ iwe.u.data.length = encode_ie(buf, sizeof(buf), cie->ie_rsn,
++ cie->ie_rsn[1]+2,
++ rsn_leader, sizeof(rsn_leader)-1);
++
++ if (iwe.u.data.length != 0) {
++ current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf);
++ }
++ }
++
++ if (cie->ie_wmm != NULL) {
++ static const char wmm_leader[] = "wmm_ie=";
++
++ A_MEMZERO(&iwe, sizeof(iwe));
++ iwe.cmd = IWEVCUSTOM;
++ iwe.u.data.length = encode_ie(buf, sizeof(buf), cie->ie_wmm,
++ cie->ie_wmm[1]+2,
++ wmm_leader, sizeof(wmm_leader)-1);
++ if (iwe.u.data.length != 0) {
++ current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf);
++ }
++ }
++
++ if (cie->ie_ath != NULL) {
++ static const char ath_leader[] = "ath_ie=";
++
++ A_MEMZERO(&iwe, sizeof(iwe));
++ iwe.cmd = IWEVCUSTOM;
++ iwe.u.data.length = encode_ie(buf, sizeof(buf), cie->ie_ath,
++ cie->ie_ath[1]+2,
++ ath_leader, sizeof(ath_leader)-1);
++ if (iwe.u.data.length != 0) {
++ current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf);
++ }
++ }
++
++ param->current_ev = current_ev;
++}
++
++int
++ar6000_ioctl_giwscan(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_point *data, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ struct ar_giwscan_param param;
++ int i;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ param.current_ev = extra;
++ param.end_buf = extra + IW_SCAN_MAX_DATA;
++ param.firstPass = TRUE;
++
++ /*
++ * Do two passes to insure WPA scan candidates
++ * are sorted to the front. This is a hack to deal with
++ * the wireless extensions capping scan results at
++ * IW_SCAN_MAX_DATA bytes. In densely populated environments
++ * it's easy to overflow this buffer (especially with WPA/RSN
++ * information elements). Note this sorting hack does not
++ * guarantee we won't overflow anyway.
++ */
++ for (i = 0; i < 2; i++) {
++ /*
++ * Translate data to WE format.
++ */
++ wmi_iterate_nodes(ar->arWmi, ar6000_scan_node, ¶m);
++ param.firstPass = FALSE;
++ if (param.current_ev >= param.end_buf) {
++ data->length = param.current_ev - extra;
++ return -E2BIG;
++ }
++ }
++
++ if(!(data->length = param.current_ev - extra)) {
++ printk("%s(): data length %d\n", __FUNCTION__, data->length);
++ return -EAGAIN;
++ }
++ return 0;
++}
++
++extern int reconnect_flag;
++/* SIOCSIWESSID */
++static int
++ar6000_ioctl_siwessid(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_point *data, char *ssid)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ A_STATUS status;
++ A_UINT8 arNetworkType;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ /*
++ * iwconfig passes a string with length excluding any trailing NUL.
++ * FIXME: we should be able to set an ESSID of 32 bytes, yet things fall
++ * over badly if we do. So we limit the ESSID to 31 bytes.
++ */
++ if (data->flags && (!data->length || data->length >= sizeof(ar->arSsid))) {
++ /*
++ * ssid is invalid
++ */
++ return -EINVAL;
++ }
++ /* Added for bug 25178, return an IOCTL error instead of target returning
++ Illegal parameter error when either the BSSID or channel is missing
++ and we cannot scan during connect.
++ */
++ if (data->flags) {
++ if (ar->arSkipScan == TRUE &&
++ (ar->arChannelHint == 0 ||
++ (!ar->arReqBssid[0] && !ar->arReqBssid[1] && !ar->arReqBssid[2] &&
++ !ar->arReqBssid[3] && !ar->arReqBssid[4] && !ar->arReqBssid[5])))
++ {
++ return -EINVAL;
++ }
++ }
++
++ if (down_interruptible(&ar->arSem)) {
++ return -ERESTARTSYS;
++ }
++
++ if (ar->arTxPending[WMI_CONTROL_PRI]) {
++ /*
++ * sleep until the command queue drains
++ */
++ wait_event_interruptible_timeout(arEvent,
++ ar->arTxPending[WMI_CONTROL_PRI] == 0, wmitimeout * HZ);
++ if (signal_pending(current)) {
++ return -EINTR;
++ }
++ }
++
++ if (!data->flags) {
++ arNetworkType = ar->arNetworkType;
++ ar6000_init_profile_info(ar);
++ ar->arNetworkType = arNetworkType;
++ }
++
++ if ((ar->arSsidLen) || (!data->flags))
++ {
++ if ((!data->flags) ||
++ (A_MEMCMP(ar->arSsid, ssid, ar->arSsidLen) != 0) ||
++ (ar->arSsidLen != (data->length)))
++ {
++ /*
++ * SSID set previously or essid off has been issued.
++ *
++ * Disconnect Command is issued in two cases after wmi is ready
++ * (1) ssid is different from the previous setting
++ * (2) essid off has been issued
++ *
++ */
++ if (ar->arWmiReady == TRUE) {
++ reconnect_flag = 0;
++ status = wmi_disconnect_cmd(ar->arWmi);
++ A_MEMZERO(ar->arSsid, sizeof(ar->arSsid));
++ ar->arSsidLen = 0;
++ if (ar->arSkipScan == FALSE) {
++ A_MEMZERO(ar->arReqBssid, sizeof(ar->arReqBssid));
++ }
++ if (!data->flags) {
++ up(&ar->arSem);
++ return 0;
++ }
++ } else {
++ up(&ar->arSem);
++ }
++ }
++ else
++ {
++ /*
++ * SSID is same, so we assume profile hasn't changed.
++ * If the interface is up and wmi is ready, we issue
++ * a reconnect cmd. Issue a reconnect only we are already
++ * connected.
++ */
++ if((ar->arConnected == TRUE) && (ar->arWmiReady == TRUE))
++ {
++ reconnect_flag = TRUE;
++ status = wmi_reconnect_cmd(ar->arWmi,ar->arReqBssid,
++ ar->arChannelHint);
++ up(&ar->arSem);
++ if (status != A_OK) {
++ return -EIO;
++ }
++ return 0;
++ }
++ else{
++ /*
++ * Dont return if connect is pending.
++ */
++ if(!(ar->arConnectPending)) {
++ up(&ar->arSem);
++ return 0;
++ }
++ }
++ }
++ }
++
++ ar->arSsidLen = data->length;
++ A_MEMCPY(ar->arSsid, ssid, ar->arSsidLen);
++
++ /* The ssid length check prevents second "essid off" from the user,
++ to be treated as a connect cmd. The second "essid off" is ignored.
++ */
++ if((ar->arWmiReady == TRUE) && (ar->arSsidLen > 0) )
++ {
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++ if (SHARED_AUTH == ar->arDot11AuthMode) {
++ ar6000_install_static_wep_keys(ar);
++ }
++ AR_DEBUG_PRINTF("Connect called with authmode %d dot11 auth %d"\
++ " PW crypto %d PW crypto Len %d GRP crypto %d"\
++ " GRP crypto Len %d\n",
++ ar->arAuthMode, ar->arDot11AuthMode,
++ ar->arPairwiseCrypto, ar->arPairwiseCryptoLen,
++ ar->arGroupCrypto, ar->arGroupCryptoLen);
++ reconnect_flag = 0;
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++ status = wmi_connect_cmd(ar->arWmi, ar->arNetworkType,
++ ar->arDot11AuthMode, ar->arAuthMode,
++ ar->arPairwiseCrypto, ar->arPairwiseCryptoLen,
++ ar->arGroupCrypto,ar->arGroupCryptoLen,
++ ar->arSsidLen, ar->arSsid,
++ ar->arReqBssid, ar->arChannelHint,
++ ar->arConnectCtrlFlags);
++
++
++ up(&ar->arSem);
++
++ if (status != A_OK) {
++ return -EIO;
++ }
++ ar->arConnectPending = TRUE;
++ }else{
++ up(&ar->arSem);
++ }
++ return 0;
++}
++
++/* SIOCGIWESSID */
++static int
++ar6000_ioctl_giwessid(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_point *data, char *essid)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ data->flags = 1;
++ data->length = ar->arSsidLen;
++ A_MEMCPY(essid, ar->arSsid, ar->arSsidLen);
++
++ return 0;
++}
++
++
++void ar6000_install_static_wep_keys(AR_SOFTC_T *ar)
++{
++ A_UINT8 index;
++ A_UINT8 keyUsage;
++
++ for (index = WMI_MIN_KEY_INDEX; index <= WMI_MAX_KEY_INDEX; index++) {
++ if (ar->arWepKeyList[index].arKeyLen) {
++ keyUsage = GROUP_USAGE;
++ if (index == ar->arDefTxKeyIndex) {
++ keyUsage |= TX_USAGE;
++ }
++ wmi_addKey_cmd(ar->arWmi,
++ index,
++ WEP_CRYPT,
++ keyUsage,
++ ar->arWepKeyList[index].arKeyLen,
++ NULL,
++ ar->arWepKeyList[index].arKey, KEY_OP_INIT_VAL,
++ NO_SYNC_WMIFLAG);
++ }
++ }
++}
++
++int
++ar6000_ioctl_delkey(struct net_device *dev, struct iw_request_info *info,
++ void *w, char *extra)
++{
++ return 0;
++}
++
++int
++ar6000_ioctl_setmlme(struct net_device *dev, struct iw_request_info *info,
++ void *w, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ struct ieee80211req_mlme *mlme = (struct ieee80211req_mlme *)extra;
++
++ if ((ar->arWmiReady == FALSE) || (ar->arConnected != TRUE))
++ return -EIO;
++
++ switch (mlme->im_op) {
++ case IEEE80211_MLME_DISASSOC:
++ case IEEE80211_MLME_DEAUTH:
++ /* Not Supported */
++ break;
++ default:
++ break;
++ }
++ return 0;
++}
++
++
++int
++ar6000_ioctl_setwmmparams(struct net_device *dev, struct iw_request_info *info,
++ void *w, char *extra)
++{
++ return -EIO; /* for now */
++}
++
++int
++ar6000_ioctl_getwmmparams(struct net_device *dev, struct iw_request_info *info,
++ void *w, char *extra)
++{
++ return -EIO; /* for now */
++}
++
++int ar6000_ioctl_setoptie(struct net_device *dev, struct iw_request_info *info,
++ struct iw_point *data, char *extra)
++{
++ /* The target generates the WPA/RSN IE */
++ return 0;
++}
++
++int
++ar6000_ioctl_setauthalg(struct net_device *dev, struct iw_request_info *info,
++ void *w, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ struct ieee80211req_authalg *req = (struct ieee80211req_authalg *)extra;
++ int ret = 0;
++
++
++ AR6000_SPIN_LOCK(&ar->arLock, 0);
++
++ if (req->auth_alg == AUTH_ALG_OPEN_SYSTEM) {
++ ar->arDot11AuthMode = OPEN_AUTH;
++ } else if (req->auth_alg == AUTH_ALG_LEAP) {
++ ar->arDot11AuthMode = LEAP_AUTH;
++ ar->arPairwiseCrypto = WEP_CRYPT;
++ ar->arGroupCrypto = WEP_CRYPT;
++ } else {
++ ret = -EIO;
++ }
++
++ AR6000_SPIN_UNLOCK(&ar->arLock, 0);
++
++ return ret;
++}
++static int
++ar6000_ioctl_addpmkid(struct net_device *dev, struct iw_request_info *info,
++ void *w, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ struct ieee80211req_addpmkid *req = (struct ieee80211req_addpmkid *)extra;
++ A_STATUS status;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ AR_DEBUG_PRINTF("Add pmkid for %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x en=%d\n",
++ req->pi_bssid[0], req->pi_bssid[1], req->pi_bssid[2],
++ req->pi_bssid[3], req->pi_bssid[4], req->pi_bssid[5],
++ req->pi_enable);
++
++ status = wmi_setPmkid_cmd(ar->arWmi, req->pi_bssid, req->pi_pmkid,
++ req->pi_enable);
++
++ if (status != A_OK) {
++ return -EIO;
++ }
++
++ return 0;
++}
++
++/*
++ * SIOCSIWRATE
++ */
++int
++ar6000_ioctl_siwrate(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_param *rrq, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ A_UINT32 kbps;
++
++ if (rrq->fixed) {
++ kbps = rrq->value / 1000; /* rrq->value is in bps */
++ } else {
++ kbps = -1; /* -1 indicates auto rate */
++ }
++ if(kbps != -1 && wmi_validate_bitrate(ar->arWmi, kbps) == A_EINVAL)
++ {
++ AR_DEBUG_PRINTF("BitRate is not Valid %d\n", kbps);
++ return -EINVAL;
++ }
++ ar->arBitRate = kbps;
++ if(ar->arWmiReady == TRUE)
++ {
++ if (wmi_set_bitrate_cmd(ar->arWmi, kbps) != A_OK) {
++ return -EINVAL;
++ }
++ }
++ return 0;
++}
++
++/*
++ * SIOCGIWRATE
++ */
++int
++ar6000_ioctl_giwrate(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_param *rrq, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ int ret = 0;
++
++ if (down_interruptible(&ar->arSem)) {
++ return -ERESTARTSYS;
++ }
++ if(ar->arWmiReady == TRUE)
++ {
++ ar->arBitRate = 0xFFFF;
++ if (wmi_get_bitrate_cmd(ar->arWmi) != A_OK) {
++ up(&ar->arSem);
++ return -EIO;
++ }
++ wait_event_interruptible_timeout(arEvent, ar->arBitRate != 0xFFFF, wmitimeout * HZ);
++ if (signal_pending(current)) {
++ ret = -EINTR;
++ }
++ }
++ /* If the interface is down or wmi is not ready or the target is not
++ connected - return the value stored in the device structure */
++ if (!ret) {
++ if (ar->arBitRate == -1) {
++ rrq->fixed = TRUE;
++ rrq->value = 0;
++ } else {
++ rrq->value = ar->arBitRate * 1000;
++ }
++ }
++
++ up(&ar->arSem);
++
++ return ret;
++}
++
++/*
++ * SIOCSIWTXPOW
++ */
++static int
++ar6000_ioctl_siwtxpow(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_param *rrq, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ A_UINT8 dbM;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ if (ar->arRadioSwitch == WLAN_ENABLED
++ && rrq->disabled) {
++ if (wmi_switch_radio(ar->arWmi, WLAN_DISABLED) < 0)
++ return -EIO;
++ ar->arRadioSwitch = WLAN_DISABLED;
++ } else if (ar->arRadioSwitch == WLAN_DISABLED
++ && !rrq->disabled) {
++ if (wmi_switch_radio(ar->arWmi, WLAN_ENABLED) < 0)
++ return -EIO;
++ ar->arRadioSwitch = WLAN_ENABLED;
++ }
++
++ if (rrq->fixed) {
++ if (rrq->flags != IW_TXPOW_DBM) {
++ return -EOPNOTSUPP;
++ }
++ ar->arTxPwr= dbM = rrq->value;
++ ar->arTxPwrSet = TRUE;
++ } else {
++ ar->arTxPwr = dbM = 0;
++ ar->arTxPwrSet = FALSE;
++ }
++ if(ar->arWmiReady == TRUE)
++ {
++ AR_DEBUG_PRINTF("Set tx pwr cmd %d dbM\n", dbM);
++ wmi_set_txPwr_cmd(ar->arWmi, dbM);
++ }
++ return 0;
++}
++
++/*
++ * SIOCGIWTXPOW
++ */
++int
++ar6000_ioctl_giwtxpow(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_param *rrq, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ int ret = 0;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ if (ar->arRadioSwitch == WLAN_DISABLED) {
++ rrq->disabled = 1;
++ return 0;
++ }
++
++ if (down_interruptible(&ar->arSem)) {
++ return -ERESTARTSYS;
++ }
++ if((ar->arWmiReady == TRUE) && (ar->arConnected == TRUE))
++ {
++ ar->arTxPwr = 0;
++
++ if (wmi_get_txPwr_cmd(ar->arWmi) != A_OK) {
++ up(&ar->arSem);
++ return -EIO;
++ }
++
++ wait_event_interruptible_timeout(arEvent, ar->arTxPwr != 0, wmitimeout * HZ);
++
++ if (signal_pending(current)) {
++ ret = -EINTR;
++ }
++ }
++ /* If the interace is down or wmi is not ready or target is not connected
++ then return value stored in the device structure */
++
++ if (!ret) {
++ if (ar->arTxPwrSet == TRUE) {
++ rrq->fixed = TRUE;
++ }
++ rrq->value = ar->arTxPwr;
++ rrq->flags = IW_TXPOW_DBM;
++ }
++
++ up(&ar->arSem);
++
++ return ret;
++}
++
++/*
++ * SIOCSIWRETRY
++ * since iwconfig only provides us with one max retry value, we use it
++ * to apply to data frames of the BE traffic class.
++ */
++static int
++ar6000_ioctl_siwretry(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_param *rrq, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ if (rrq->disabled) {
++ return -EOPNOTSUPP;
++ }
++
++ if ((rrq->flags & IW_RETRY_TYPE) != IW_RETRY_LIMIT) {
++ return -EOPNOTSUPP;
++ }
++
++ if ( !(rrq->value >= WMI_MIN_RETRIES) || !(rrq->value <= WMI_MAX_RETRIES)) {
++ return - EINVAL;
++ }
++ if(ar->arWmiReady == TRUE)
++ {
++ if (wmi_set_retry_limits_cmd(ar->arWmi, DATA_FRAMETYPE, WMM_AC_BE,
++ rrq->value, 0) != A_OK){
++ return -EINVAL;
++ }
++ }
++ ar->arMaxRetries = rrq->value;
++ return 0;
++}
++
++/*
++ * SIOCGIWRETRY
++ */
++static int
++ar6000_ioctl_giwretry(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_param *rrq, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ rrq->disabled = 0;
++ switch (rrq->flags & IW_RETRY_TYPE) {
++ case IW_RETRY_LIFETIME:
++ return -EOPNOTSUPP;
++ break;
++ case IW_RETRY_LIMIT:
++ rrq->flags = IW_RETRY_LIMIT;
++ switch (rrq->flags & IW_RETRY_MODIFIER) {
++ case IW_RETRY_MIN:
++ rrq->flags |= IW_RETRY_MIN;
++ rrq->value = WMI_MIN_RETRIES;
++ break;
++ case IW_RETRY_MAX:
++ rrq->flags |= IW_RETRY_MAX;
++ rrq->value = ar->arMaxRetries;
++ break;
++ }
++ break;
++ }
++ return 0;
++}
++
++/*
++ * SIOCSIWENCODE
++ */
++static int
++ar6000_ioctl_siwencode(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_point *erq, char *keybuf)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ int index;
++ A_INT32 auth = ar->arDot11AuthMode;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ index = erq->flags & IW_ENCODE_INDEX;
++
++ if (index && (((index - 1) < WMI_MIN_KEY_INDEX) ||
++ ((index - 1) > WMI_MAX_KEY_INDEX)))
++ {
++ return -EIO;
++ }
++
++ if (erq->flags & IW_ENCODE_DISABLED) {
++ /*
++ * Encryption disabled
++ */
++ if (index) {
++ /*
++ * If key index was specified then clear the specified key
++ */
++ index--;
++ A_MEMZERO(ar->arWepKeyList[index].arKey,
++ sizeof(ar->arWepKeyList[index].arKey));
++ ar->arWepKeyList[index].arKeyLen = 0;
++ }
++ ar->arDot11AuthMode = OPEN_AUTH;
++ ar->arPairwiseCrypto = NONE_CRYPT;
++ ar->arGroupCrypto = NONE_CRYPT;
++ ar->arAuthMode = NONE_AUTH;
++ } else {
++ /*
++ * Enabling WEP encryption
++ */
++ if (index) {
++ index--; /* keyindex is off base 1 in iwconfig */
++ }
++
++ if (erq->flags & IW_ENCODE_OPEN) {
++ auth = OPEN_AUTH;
++ } else if (erq->flags & IW_ENCODE_RESTRICTED) {
++ auth = SHARED_AUTH;
++ }
++
++ if (erq->length) {
++ if (!IEEE80211_IS_VALID_WEP_CIPHER_LEN(erq->length)) {
++ return -EIO;
++ }
++
++ A_MEMZERO(ar->arWepKeyList[index].arKey,
++ sizeof(ar->arWepKeyList[index].arKey));
++ A_MEMCPY(ar->arWepKeyList[index].arKey, keybuf, erq->length);
++ ar->arWepKeyList[index].arKeyLen = erq->length;
++ } else {
++ if (ar->arWepKeyList[index].arKeyLen == 0) {
++ return -EIO;
++ }
++ ar->arDefTxKeyIndex = index;
++ }
++
++ ar->arPairwiseCrypto = WEP_CRYPT;
++ ar->arGroupCrypto = WEP_CRYPT;
++ ar->arDot11AuthMode = auth;
++ ar->arAuthMode = NONE_AUTH;
++ }
++
++ /*
++ * profile has changed. Erase ssid to signal change
++ */
++ A_MEMZERO(ar->arSsid, sizeof(ar->arSsid));
++ ar->arSsidLen = 0;
++
++ return 0;
++}
++
++static int
++ar6000_ioctl_giwencode(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_point *erq, char *key)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev);
++ A_UINT8 keyIndex;
++ struct ar_wep_key *wk;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ if (ar->arPairwiseCrypto == NONE_CRYPT) {
++ erq->length = 0;
++ erq->flags = IW_ENCODE_DISABLED;
++ } else {
++ /* get the keyIndex */
++ keyIndex = erq->flags & IW_ENCODE_INDEX;
++ if (0 == keyIndex) {
++ keyIndex = ar->arDefTxKeyIndex;
++ } else if ((keyIndex - 1 < WMI_MIN_KEY_INDEX) ||
++ (keyIndex - 1 > WMI_MAX_KEY_INDEX))
++ {
++ keyIndex = WMI_MIN_KEY_INDEX;
++ } else {
++ keyIndex--;
++ }
++ erq->flags = keyIndex + 1;
++ erq->flags |= IW_ENCODE_ENABLED;
++ wk = &ar->arWepKeyList[keyIndex];
++ if (erq->length > wk->arKeyLen) {
++ erq->length = wk->arKeyLen;
++ }
++ if (wk->arKeyLen) {
++ A_MEMCPY(key, wk->arKey, erq->length);
++ }
++ if (ar->arDot11AuthMode == OPEN_AUTH) {
++ erq->flags |= IW_ENCODE_OPEN;
++ } else if (ar->arDot11AuthMode == SHARED_AUTH) {
++ erq->flags |= IW_ENCODE_RESTRICTED;
++ }
++ }
++
++ return 0;
++}
++
++static int ar6000_ioctl_siwpower(struct net_device *dev,
++ struct iw_request_info *info,
++ union iwreq_data *wrqu, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev);
++ WMI_POWER_MODE power_mode;
++
++ if (wrqu->power.disabled)
++ power_mode = MAX_PERF_POWER;
++ else
++ power_mode = REC_POWER;
++
++ if (wmi_powermode_cmd(ar->arWmi, power_mode) < 0)
++ return -EIO;
++
++ return 0;
++}
++
++static int ar6000_ioctl_giwpower(struct net_device *dev,
++ struct iw_request_info *info,
++ union iwreq_data *wrqu, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev);
++
++ return wmi_get_power_mode_cmd(ar->arWmi);
++}
++
++static int ar6000_ioctl_siwgenie(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_point *dwrq,
++ char *extra)
++{
++ /* The target does that for us */
++ return 0;
++}
++
++static int ar6000_ioctl_giwgenie(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_point *dwrq,
++ char *extra)
++{
++ return 0;
++}
++
++static int ar6000_ioctl_siwauth(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_param *param,
++ char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev);
++ int reset = 0;
++
++ switch (param->flags & IW_AUTH_INDEX) {
++ case IW_AUTH_WPA_VERSION:
++ if (param->value & IW_AUTH_WPA_VERSION_DISABLED) {
++ ar->arAuthMode = NONE_AUTH;
++ }
++ if (param->value & IW_AUTH_WPA_VERSION_WPA) {
++ ar->arAuthMode = WPA_AUTH;
++ }
++ if (param->value & IW_AUTH_WPA_VERSION_WPA2) {
++ ar->arAuthMode = WPA2_AUTH;
++ }
++
++ reset = 1;
++ break;
++ case IW_AUTH_CIPHER_PAIRWISE:
++ if (param->value & IW_AUTH_CIPHER_NONE) {
++ ar->arPairwiseCrypto = NONE_CRYPT;
++ }
++ if (param->value & IW_AUTH_CIPHER_WEP40) {
++ ar->arPairwiseCrypto = WEP_CRYPT;
++ }
++ if (param->value & IW_AUTH_CIPHER_TKIP) {
++ ar->arPairwiseCrypto = TKIP_CRYPT;
++ }
++ if (param->value & IW_AUTH_CIPHER_CCMP) {
++ ar->arPairwiseCrypto = AES_CRYPT;
++ }
++
++ reset = 1;
++ break;
++ case IW_AUTH_CIPHER_GROUP:
++ if (param->value & IW_AUTH_CIPHER_NONE) {
++ ar->arGroupCrypto = NONE_CRYPT;
++ }
++ if (param->value & IW_AUTH_CIPHER_WEP40) {
++ ar->arGroupCrypto = WEP_CRYPT;
++ }
++ if (param->value & IW_AUTH_CIPHER_TKIP) {
++ ar->arGroupCrypto = TKIP_CRYPT;
++ }
++ if (param->value & IW_AUTH_CIPHER_CCMP) {
++ ar->arGroupCrypto = AES_CRYPT;
++ }
++
++ reset = 1;
++ break;
++ case IW_AUTH_KEY_MGMT:
++ if (param->value & IW_AUTH_KEY_MGMT_PSK) {
++ if (ar->arAuthMode == WPA_AUTH) {
++ ar->arAuthMode = WPA_PSK_AUTH;
++ } else if (ar->arAuthMode == WPA2_AUTH) {
++ ar->arAuthMode = WPA2_PSK_AUTH;
++ }
++
++ reset = 1;
++ }
++ break;
++
++ case IW_AUTH_TKIP_COUNTERMEASURES:
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++ wmi_set_tkip_countermeasures_cmd(ar->arWmi, param->value);
++ break;
++
++ case IW_AUTH_DROP_UNENCRYPTED:
++ break;
++
++ case IW_AUTH_80211_AUTH_ALG:
++ if (param->value & IW_AUTH_ALG_OPEN_SYSTEM) {
++ ar->arDot11AuthMode = OPEN_AUTH;
++ }
++ if (param->value & IW_AUTH_ALG_SHARED_KEY) {
++ ar->arDot11AuthMode = SHARED_AUTH;
++ }
++ if (param->value & IW_AUTH_ALG_LEAP) {
++ ar->arDot11AuthMode = LEAP_AUTH;
++ ar->arPairwiseCrypto = WEP_CRYPT;
++ ar->arGroupCrypto = WEP_CRYPT;
++ }
++
++ reset = 1;
++ break;
++
++ case IW_AUTH_WPA_ENABLED:
++ reset = 1;
++ break;
++
++ case IW_AUTH_RX_UNENCRYPTED_EAPOL:
++ break;
++
++ case IW_AUTH_PRIVACY_INVOKED:
++ break;
++
++ default:
++ printk("%s(): Unknown flag 0x%x\n", __FUNCTION__, param->flags);
++ return -EOPNOTSUPP;
++ }
++
++ if (reset) {
++ A_MEMZERO(ar->arSsid, sizeof(ar->arSsid));
++ ar->arSsidLen = 0;
++ }
++
++ return 0;
++}
++
++static int ar6000_ioctl_giwauth(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_param *dwrq,
++ char *extra)
++{
++ return 0;
++}
++
++static int ar6000_ioctl_siwencodeext(struct net_device *dev,
++ struct iw_request_info *info,
++ union iwreq_data *wrqu,
++ char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev);
++ struct iw_point *encoding = &wrqu->encoding;
++ struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
++ int alg = ext->alg, idx;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ /* Determine and validate the key index */
++ idx = (encoding->flags & IW_ENCODE_INDEX) - 1;
++ if (idx) {
++ if (idx < 0 || idx > 3)
++ return -EINVAL;
++ }
++
++ if ((alg == IW_ENCODE_ALG_TKIP) || (alg == IW_ENCODE_ALG_CCMP)) {
++ struct ieee80211req_key ik;
++ KEY_USAGE key_usage;
++ CRYPTO_TYPE key_type = NONE_CRYPT;
++ int status;
++
++ ar->user_saved_keys.keyOk = FALSE;
++
++ if (alg == IW_ENCODE_ALG_TKIP) {
++ key_type = TKIP_CRYPT;
++ ik.ik_type = IEEE80211_CIPHER_TKIP;
++ } else {
++ key_type = AES_CRYPT;
++ ik.ik_type = IEEE80211_CIPHER_AES_CCM;
++ }
++
++ ik.ik_keyix = idx;
++ ik.ik_keylen = ext->key_len;
++ ik.ik_flags = IEEE80211_KEY_RECV;
++ if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
++ ik.ik_flags |= IEEE80211_KEY_XMIT
++ | IEEE80211_KEY_DEFAULT;
++ }
++
++ if (ext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) {
++ memcpy(&ik.ik_keyrsc, ext->rx_seq, 8);
++ }
++
++ memcpy(ik.ik_keydata, ext->key, ext->key_len);
++
++ ar->user_saved_keys.keyType = key_type;
++ if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) {
++ key_usage = GROUP_USAGE;
++ memset(ik.ik_macaddr, 0, ETH_ALEN);
++ memcpy(&ar->user_saved_keys.bcast_ik, &ik,
++ sizeof(struct ieee80211req_key));
++ } else {
++ key_usage = PAIRWISE_USAGE;
++ memcpy(ik.ik_macaddr, ext->addr.sa_data, ETH_ALEN);
++ memcpy(&ar->user_saved_keys.ucast_ik, &ik,
++ sizeof(struct ieee80211req_key));
++ }
++
++ status = wmi_addKey_cmd(ar->arWmi, ik.ik_keyix, key_type,
++ key_usage, ik.ik_keylen,
++ (A_UINT8 *)&ik.ik_keyrsc,
++ ik.ik_keydata,
++ KEY_OP_INIT_VAL, SYNC_BEFORE_WMIFLAG);
++
++ if (status < 0)
++ return -EIO;
++
++ ar->user_saved_keys.keyOk = TRUE;
++
++ return 0;
++
++ } else {
++ /* WEP falls back to SIWENCODE */
++ return -EOPNOTSUPP;
++ }
++
++ return 0;
++}
++
++
++static int ar6000_ioctl_giwencodeext(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_point *dwrq,
++ char *extra)
++{
++ return 0;
++}
++
++
++static int
++ar6000_ioctl_setparam(struct net_device *dev,
++ struct iw_request_info *info,
++ void *erq, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ int *i = (int *)extra;
++ int param = i[0];
++ int value = i[1];
++ int ret = 0;
++ A_BOOL profChanged = FALSE;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ switch (param) {
++ case IEEE80211_PARAM_WPA:
++ switch (value) {
++ case WPA_MODE_WPA1:
++ ar->arAuthMode = WPA_AUTH;
++ profChanged = TRUE;
++ break;
++ case WPA_MODE_WPA2:
++ ar->arAuthMode = WPA2_AUTH;
++ profChanged = TRUE;
++ break;
++ case WPA_MODE_NONE:
++ ar->arAuthMode = NONE_AUTH;
++ profChanged = TRUE;
++ break;
++ default:
++ printk("IEEE80211_PARAM_WPA: Unknown value %d\n", value);
++ }
++ break;
++ case IEEE80211_PARAM_AUTHMODE:
++ switch(value) {
++ case IEEE80211_AUTH_WPA_PSK:
++ if (WPA_AUTH == ar->arAuthMode) {
++ ar->arAuthMode = WPA_PSK_AUTH;
++ profChanged = TRUE;
++ } else if (WPA2_AUTH == ar->arAuthMode) {
++ ar->arAuthMode = WPA2_PSK_AUTH;
++ profChanged = TRUE;
++ } else {
++ AR_DEBUG_PRINTF("Error - Setting PSK mode when WPA "\
++ "param was set to %d\n",
++ ar->arAuthMode);
++ ret = -1;
++ }
++ break;
++ case IEEE80211_AUTH_WPA_CCKM:
++ if (WPA2_AUTH == ar->arAuthMode) {
++ ar->arAuthMode = WPA2_AUTH_CCKM;
++ } else {
++ ar->arAuthMode = WPA_AUTH_CCKM;
++ }
++ break;
++ default:
++ break;
++ }
++ break;
++ case IEEE80211_PARAM_UCASTCIPHER:
++ switch (value) {
++ case IEEE80211_CIPHER_AES_CCM:
++ ar->arPairwiseCrypto = AES_CRYPT;
++ profChanged = TRUE;
++ break;
++ case IEEE80211_CIPHER_TKIP:
++ ar->arPairwiseCrypto = TKIP_CRYPT;
++ profChanged = TRUE;
++ break;
++ case IEEE80211_CIPHER_WEP:
++ ar->arPairwiseCrypto = WEP_CRYPT;
++ profChanged = TRUE;
++ break;
++ case IEEE80211_CIPHER_NONE:
++ ar->arPairwiseCrypto = NONE_CRYPT;
++ profChanged = TRUE;
++ break;
++ }
++ break;
++ case IEEE80211_PARAM_UCASTKEYLEN:
++ if (!IEEE80211_IS_VALID_WEP_CIPHER_LEN(value)) {
++ ret = -EIO;
++ } else {
++ ar->arPairwiseCryptoLen = value;
++ }
++ break;
++ case IEEE80211_PARAM_MCASTCIPHER:
++ switch (value) {
++ case IEEE80211_CIPHER_AES_CCM:
++ ar->arGroupCrypto = AES_CRYPT;
++ profChanged = TRUE;
++ break;
++ case IEEE80211_CIPHER_TKIP:
++ ar->arGroupCrypto = TKIP_CRYPT;
++ profChanged = TRUE;
++ break;
++ case IEEE80211_CIPHER_WEP:
++ ar->arGroupCrypto = WEP_CRYPT;
++ profChanged = TRUE;
++ break;
++ case IEEE80211_CIPHER_NONE:
++ ar->arGroupCrypto = NONE_CRYPT;
++ profChanged = TRUE;
++ break;
++ }
++ break;
++ case IEEE80211_PARAM_MCASTKEYLEN:
++ if (!IEEE80211_IS_VALID_WEP_CIPHER_LEN(value)) {
++ ret = -EIO;
++ } else {
++ ar->arGroupCryptoLen = value;
++ }
++ break;
++ case IEEE80211_PARAM_COUNTERMEASURES:
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++ wmi_set_tkip_countermeasures_cmd(ar->arWmi, value);
++ break;
++ default:
++ break;
++ }
++
++ if (profChanged == TRUE) {
++ /*
++ * profile has changed. Erase ssid to signal change
++ */
++ A_MEMZERO(ar->arSsid, sizeof(ar->arSsid));
++ ar->arSsidLen = 0;
++ }
++
++ return ret;
++}
++
++int
++ar6000_ioctl_getparam(struct net_device *dev, struct iw_request_info *info,
++ void *w, char *extra)
++{
++ return -EIO; /* for now */
++}
++
++int
++ar6000_ioctl_setkey(struct net_device *dev, struct iw_request_info *info,
++ void *w, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ struct ieee80211req_key *ik = (struct ieee80211req_key *)extra;
++ KEY_USAGE keyUsage;
++ A_STATUS status;
++ CRYPTO_TYPE keyType = NONE_CRYPT;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ ar->user_saved_keys.keyOk = FALSE;
++
++ if ( 0 == memcmp(ik->ik_macaddr, "\x00\x00\x00\x00\x00\x00",
++ IEEE80211_ADDR_LEN)) {
++ keyUsage = GROUP_USAGE;
++ A_MEMCPY(&ar->user_saved_keys.bcast_ik, ik,
++ sizeof(struct ieee80211req_key));
++ } else {
++ keyUsage = PAIRWISE_USAGE;
++ A_MEMCPY(&ar->user_saved_keys.ucast_ik, ik,
++ sizeof(struct ieee80211req_key));
++ }
++
++ switch (ik->ik_type) {
++ case IEEE80211_CIPHER_WEP:
++ keyType = WEP_CRYPT;
++ break;
++ case IEEE80211_CIPHER_TKIP:
++ keyType = TKIP_CRYPT;
++ break;
++ case IEEE80211_CIPHER_AES_CCM:
++ keyType = AES_CRYPT;
++ break;
++ default:
++ break;
++ }
++ ar->user_saved_keys.keyType = keyType;
++
++ if (IEEE80211_CIPHER_CCKM_KRK != ik->ik_type) {
++ if (NONE_CRYPT == keyType) {
++ return -EIO;
++ }
++
++ status = wmi_addKey_cmd(ar->arWmi, ik->ik_keyix, keyType, keyUsage,
++ ik->ik_keylen, (A_UINT8 *)&ik->ik_keyrsc,
++ ik->ik_keydata, KEY_OP_INIT_VAL,
++ SYNC_BEFORE_WMIFLAG);
++
++ if (status != A_OK) {
++ return -EIO;
++ }
++ } else {
++ status = wmi_add_krk_cmd(ar->arWmi, ik->ik_keydata);
++ }
++
++ ar->user_saved_keys.keyOk = TRUE;
++
++ return 0;
++}
++
++
++/*
++ * SIOCGIWNAME
++ */
++int
++ar6000_ioctl_giwname(struct net_device *dev,
++ struct iw_request_info *info,
++ char *name, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ switch (ar->arPhyCapability) {
++ case (WMI_11A_CAPABILITY):
++ strncpy(name, "AR6000 802.11a", IFNAMSIZ);
++ break;
++ case (WMI_11G_CAPABILITY):
++ strncpy(name, "AR6000 802.11g", IFNAMSIZ);
++ break;
++ case (WMI_11AG_CAPABILITY):
++ strncpy(name, "AR6000 802.11ag", IFNAMSIZ);
++ break;
++ default:
++ strncpy(name, "AR6000 802.11", IFNAMSIZ);
++ break;
++ }
++
++ return 0;
++}
++
++/*
++ * SIOCSIWFREQ
++ */
++int
++ar6000_ioctl_siwfreq(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_freq *freq, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ /*
++ * We support limiting the channels via wmiconfig.
++ *
++ * We use this command to configure the channel hint for the connect cmd
++ * so it is possible the target will end up connecting to a different
++ * channel.
++ */
++ if (freq->e > 1) {
++ return -EINVAL;
++ } else if (freq->e == 1) {
++ ar->arChannelHint = freq->m / 100000;
++ } else {
++ ar->arChannelHint = wlan_ieee2freq(freq->m);
++ }
++
++ A_PRINTF("channel hint set to %d\n", ar->arChannelHint);
++ return 0;
++}
++
++/*
++ * SIOCGIWFREQ
++ */
++int
++ar6000_ioctl_giwfreq(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_freq *freq, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ if (ar->arConnected != TRUE) {
++ return -EINVAL;
++ }
++
++ freq->m = ar->arBssChannel * 100000;
++ freq->e = 1;
++
++ return 0;
++}
++
++/*
++ * SIOCSIWMODE
++ */
++int
++ar6000_ioctl_siwmode(struct net_device *dev,
++ struct iw_request_info *info,
++ __u32 *mode, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ switch (*mode) {
++ case IW_MODE_INFRA:
++ ar->arNetworkType = INFRA_NETWORK;
++ break;
++ case IW_MODE_ADHOC:
++ ar->arNetworkType = ADHOC_NETWORK;
++ break;
++ default:
++ return -EINVAL;
++ }
++
++ return 0;
++}
++
++/*
++ * SIOCGIWMODE
++ */
++int
++ar6000_ioctl_giwmode(struct net_device *dev,
++ struct iw_request_info *info,
++ __u32 *mode, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ switch (ar->arNetworkType) {
++ case INFRA_NETWORK:
++ *mode = IW_MODE_INFRA;
++ break;
++ case ADHOC_NETWORK:
++ *mode = IW_MODE_ADHOC;
++ break;
++ default:
++ return -EIO;
++ }
++ return 0;
++}
++
++/*
++ * SIOCSIWSENS
++ */
++int
++ar6000_ioctl_siwsens(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_param *sens, char *extra)
++{
++ return 0;
++}
++
++/*
++ * SIOCGIWSENS
++ */
++int
++ar6000_ioctl_giwsens(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_param *sens, char *extra)
++{
++ sens->value = 0;
++ sens->fixed = 1;
++
++ return 0;
++}
++
++/*
++ * SIOCGIWRANGE
++ */
++int
++ar6000_ioctl_giwrange(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_point *data, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ struct iw_range *range = (struct iw_range *) extra;
++ int i, ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ if (down_interruptible(&ar->arSem)) {
++ return -ERESTARTSYS;
++ }
++ ar->arNumChannels = -1;
++ A_MEMZERO(ar->arChannelList, sizeof (ar->arChannelList));
++
++ if (wmi_get_channelList_cmd(ar->arWmi) != A_OK) {
++ up(&ar->arSem);
++ return -EIO;
++ }
++
++ wait_event_interruptible_timeout(arEvent, ar->arNumChannels != -1, wmitimeout * HZ);
++
++ if (signal_pending(current)) {
++ up(&ar->arSem);
++ return -EINTR;
++ }
++
++ data->length = sizeof(struct iw_range);
++ A_MEMZERO(range, sizeof(struct iw_range));
++
++ range->txpower_capa = IW_TXPOW_DBM;
++
++ range->min_pmp = 1 * 1024;
++ range->max_pmp = 65535 * 1024;
++ range->min_pmt = 1 * 1024;
++ range->max_pmt = 1000 * 1024;
++ range->pmp_flags = IW_POWER_PERIOD;
++ range->pmt_flags = IW_POWER_TIMEOUT;
++ range->pm_capa = 0;
++
++ range->we_version_compiled = WIRELESS_EXT;
++ range->we_version_source = 13;
++
++ range->retry_capa = IW_RETRY_LIMIT;
++ range->retry_flags = IW_RETRY_LIMIT;
++ range->min_retry = 0;
++ range->max_retry = 255;
++
++ range->num_frequency = range->num_channels = ar->arNumChannels;
++ for (i = 0; i < ar->arNumChannels; i++) {
++ range->freq[i].i = wlan_freq2ieee(ar->arChannelList[i]);
++ range->freq[i].m = ar->arChannelList[i] * 100000;
++ range->freq[i].e = 1;
++ /*
++ * Linux supports max of 32 channels, bail out once you
++ * reach the max.
++ */
++ if (i == IW_MAX_FREQUENCIES) {
++ break;
++ }
++ }
++
++ /* Max quality is max field value minus noise floor */
++ range->max_qual.qual = 0xff - 161;
++
++ /*
++ * In order to use dBm measurements, 'level' must be lower
++ * than any possible measurement (see iw_print_stats() in
++ * wireless tools). It's unclear how this is meant to be
++ * done, but setting zero in these values forces dBm and
++ * the actual numbers are not used.
++ */
++ range->max_qual.level = 0;
++ range->max_qual.noise = 0;
++
++ range->sensitivity = 3;
++
++ range->max_encoding_tokens = 4;
++ /* XXX query driver to find out supported key sizes */
++ range->num_encoding_sizes = 3;
++ range->encoding_size[0] = 5; /* 40-bit */
++ range->encoding_size[1] = 13; /* 104-bit */
++ range->encoding_size[2] = 16; /* 128-bit */
++
++ range->num_bitrates = 0;
++
++ /* estimated maximum TCP throughput values (bps) */
++ range->throughput = 22000000;
++
++ range->min_rts = 0;
++ range->max_rts = 2347;
++ range->min_frag = 256;
++ range->max_frag = 2346;
++
++ up(&ar->arSem);
++
++ return ret;
++}
++
++
++/*
++ * SIOCSIWAP
++ * This ioctl is used to set the desired bssid for the connect command.
++ */
++int
++ar6000_ioctl_siwap(struct net_device *dev,
++ struct iw_request_info *info,
++ struct sockaddr *ap_addr, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ if (ap_addr->sa_family != ARPHRD_ETHER) {
++ return -EIO;
++ }
++
++ if (A_MEMCMP(&ap_addr->sa_data, bcast_mac, AR6000_ETH_ADDR_LEN) == 0) {
++ A_MEMZERO(ar->arReqBssid, sizeof(ar->arReqBssid));
++ } else {
++ A_MEMCPY(ar->arReqBssid, &ap_addr->sa_data, sizeof(ar->arReqBssid));
++ }
++
++ return 0;
++}
++
++/*
++ * SIOCGIWAP
++ */
++int
++ar6000_ioctl_giwap(struct net_device *dev,
++ struct iw_request_info *info,
++ struct sockaddr *ap_addr, char *extra)
++{
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ if (ar->arConnected != TRUE) {
++ return -EINVAL;
++ }
++
++ A_MEMCPY(&ap_addr->sa_data, ar->arBssid, sizeof(ar->arBssid));
++ ap_addr->sa_family = ARPHRD_ETHER;
++
++ return 0;
++}
++
++/*
++ * SIOCGIWAPLIST
++ */
++int
++ar6000_ioctl_iwaplist(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_point *data, char *extra)
++{
++ return -EIO; /* for now */
++}
++
++/*
++ * SIOCSIWSCAN
++ */
++int
++ar6000_ioctl_siwscan(struct net_device *dev,
++ struct iw_request_info *info,
++ struct iw_point *data, char *extra)
++{
++#define ACT_DWELLTIME_DEFAULT 105
++#define HOME_TXDRAIN_TIME 100
++#define SCAN_INT HOME_TXDRAIN_TIME + ACT_DWELLTIME_DEFAULT
++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
++ int ret = 0;
++
++ if (ar->arWmiReady == FALSE) {
++ return -EIO;
++ }
++
++ if (ar->arWlanState == WLAN_DISABLED) {
++ return -EIO;
++ }
++
++ /* We ask for everything from the target */
++ if (wmi_bssfilter_cmd(ar->arWmi, ALL_BSS_FILTER, 0) != A_OK) {
++ printk("Couldn't set filtering\n");
++ ret = -EIO;
++ }
++
++ if (wmi_startscan_cmd(ar->arWmi, WMI_LONG_SCAN, FALSE, FALSE, \
++ HOME_TXDRAIN_TIME, SCAN_INT) != A_OK) {
++ ret = -EIO;
++ }
++
++ ar->scan_complete = 0;
++ wait_event_interruptible_timeout(ar6000_scan_queue, ar->scan_complete,
++ 5 * HZ);
++
++ if (wmi_bssfilter_cmd(ar->arWmi, NONE_BSS_FILTER, 0) != A_OK) {
++ printk("Couldn't set filtering\n");
++ ret = -EIO;
++ }
++
++ return ret;
++#undef ACT_DWELLTIME_DEFAULT
++#undef HOME_TXDRAIN_TIME
++#undef SCAN_INT
++}
++
++
++/*
++ * Units are in db above the noise floor. That means the
++ * rssi values reported in the tx/rx descriptors in the
++ * driver are the SNR expressed in db.
++ *
++ * If you assume that the noise floor is -95, which is an
++ * excellent assumption 99.5 % of the time, then you can
++ * derive the absolute signal level (i.e. -95 + rssi).
++ * There are some other slight factors to take into account
++ * depending on whether the rssi measurement is from 11b,
++ * 11g, or 11a. These differences are at most 2db and
++ * can be documented.
++ *
++ * NB: various calculations are based on the orinoco/wavelan
++ * drivers for compatibility
++ */
++static void
++ar6000_set_quality(struct iw_quality *iq, A_INT8 rssi)
++{
++ if (rssi < 0) {
++ iq->qual = 0;
++ } else {
++ iq->qual = rssi;
++ }
++
++ /* NB: max is 94 because noise is hardcoded to 161 */
++ if (iq->qual > 94)
++ iq->qual = 94;
++
++ iq->noise = 161; /* -95dBm */
++ iq->level = iq->noise + iq->qual;
++ iq->updated = 7;
++}
++
++
++/* Structures to export the Wireless Handlers */
++static const iw_handler ath_handlers[] = {
++ (iw_handler) NULL, /* SIOCSIWCOMMIT */
++ (iw_handler) ar6000_ioctl_giwname, /* SIOCGIWNAME */
++ (iw_handler) NULL, /* SIOCSIWNWID */
++ (iw_handler) NULL, /* SIOCGIWNWID */
++ (iw_handler) ar6000_ioctl_siwfreq, /* SIOCSIWFREQ */
++ (iw_handler) ar6000_ioctl_giwfreq, /* SIOCGIWFREQ */
++ (iw_handler) ar6000_ioctl_siwmode, /* SIOCSIWMODE */
++ (iw_handler) ar6000_ioctl_giwmode, /* SIOCGIWMODE */
++ (iw_handler) ar6000_ioctl_siwsens, /* SIOCSIWSENS */
++ (iw_handler) ar6000_ioctl_giwsens, /* SIOCGIWSENS */
++ (iw_handler) NULL /* not _used */, /* SIOCSIWRANGE */
++ (iw_handler) ar6000_ioctl_giwrange, /* SIOCGIWRANGE */
++ (iw_handler) NULL /* not used */, /* SIOCSIWPRIV */
++ (iw_handler) NULL /* kernel code */, /* SIOCGIWPRIV */
++ (iw_handler) NULL /* not used */, /* SIOCSIWSTATS */
++ (iw_handler) NULL /* kernel code */, /* SIOCGIWSTATS */
++ (iw_handler) NULL, /* SIOCSIWSPY */
++ (iw_handler) NULL, /* SIOCGIWSPY */
++ (iw_handler) NULL, /* SIOCSIWTHRSPY */
++ (iw_handler) NULL, /* SIOCGIWTHRSPY */
++ (iw_handler) ar6000_ioctl_siwap, /* SIOCSIWAP */
++ (iw_handler) ar6000_ioctl_giwap, /* SIOCGIWAP */
++ (iw_handler) NULL, /* -- hole -- */
++ (iw_handler) ar6000_ioctl_iwaplist, /* SIOCGIWAPLIST */
++ (iw_handler) ar6000_ioctl_siwscan, /* SIOCSIWSCAN */
++ (iw_handler) ar6000_ioctl_giwscan, /* SIOCGIWSCAN */
++ (iw_handler) ar6000_ioctl_siwessid, /* SIOCSIWESSID */
++ (iw_handler) ar6000_ioctl_giwessid, /* SIOCGIWESSID */
++ (iw_handler) NULL, /* SIOCSIWNICKN */
++ (iw_handler) NULL, /* SIOCGIWNICKN */
++ (iw_handler) NULL, /* -- hole -- */
++ (iw_handler) NULL, /* -- hole -- */
++ (iw_handler) ar6000_ioctl_siwrate, /* SIOCSIWRATE */
++ (iw_handler) ar6000_ioctl_giwrate, /* SIOCGIWRATE */
++ (iw_handler) NULL, /* SIOCSIWRTS */
++ (iw_handler) NULL, /* SIOCGIWRTS */
++ (iw_handler) NULL, /* SIOCSIWFRAG */
++ (iw_handler) NULL, /* SIOCGIWFRAG */
++ (iw_handler) ar6000_ioctl_siwtxpow, /* SIOCSIWTXPOW */
++ (iw_handler) ar6000_ioctl_giwtxpow, /* SIOCGIWTXPOW */
++ (iw_handler) ar6000_ioctl_siwretry, /* SIOCSIWRETRY */
++ (iw_handler) ar6000_ioctl_giwretry, /* SIOCGIWRETRY */
++ (iw_handler) ar6000_ioctl_siwencode, /* SIOCSIWENCODE */
++ (iw_handler) ar6000_ioctl_giwencode, /* SIOCGIWENCODE */
++ (iw_handler) ar6000_ioctl_siwpower, /* SIOCSIWPOWER */
++ (iw_handler) ar6000_ioctl_giwpower, /* SIOCGIWPOWER */
++ (iw_handler) NULL, /* -- hole -- */
++ (iw_handler) NULL, /* -- hole -- */
++ (iw_handler) ar6000_ioctl_siwgenie, /* SIOCSIWGENIE */
++ (iw_handler) ar6000_ioctl_giwgenie, /* SIOCGIWGENIE */
++ (iw_handler) ar6000_ioctl_siwauth, /* SIOCSIWAUTH */
++ (iw_handler) ar6000_ioctl_giwauth, /* SIOCGIWAUTH */
++ (iw_handler) ar6000_ioctl_siwencodeext,/* SIOCSIWENCODEEXT */
++ (iw_handler) ar6000_ioctl_giwencodeext,/* SIOCGIWENCODEEXT */
++ (iw_handler) NULL, /* SIOCSIWPMKSA */
++};
++
++static const iw_handler ath_priv_handlers[] = {
++ (iw_handler) ar6000_ioctl_setparam, /* SIOCWFIRSTPRIV+0 */
++ (iw_handler) ar6000_ioctl_getparam, /* SIOCWFIRSTPRIV+1 */
++ (iw_handler) ar6000_ioctl_setkey, /* SIOCWFIRSTPRIV+2 */
++ (iw_handler) ar6000_ioctl_setwmmparams, /* SIOCWFIRSTPRIV+3 */
++ (iw_handler) ar6000_ioctl_delkey, /* SIOCWFIRSTPRIV+4 */
++ (iw_handler) ar6000_ioctl_getwmmparams, /* SIOCWFIRSTPRIV+5 */
++ (iw_handler) ar6000_ioctl_setoptie, /* SIOCWFIRSTPRIV+6 */
++ (iw_handler) ar6000_ioctl_setmlme, /* SIOCWFIRSTPRIV+7 */
++ (iw_handler) ar6000_ioctl_addpmkid, /* SIOCWFIRSTPRIV+8 */
++};
++
++#define IW_PRIV_TYPE_KEY \
++ (IW_PRIV_TYPE_BYTE | sizeof(struct ieee80211req_key))
++#define IW_PRIV_TYPE_DELKEY \
++ (IW_PRIV_TYPE_BYTE | sizeof(struct ieee80211req_del_key))
++#define IW_PRIV_TYPE_MLME \
++ (IW_PRIV_TYPE_BYTE | sizeof(struct ieee80211req_mlme))
++#define IW_PRIV_TYPE_ADDPMKID \
++ (IW_PRIV_TYPE_BYTE | sizeof(struct ieee80211req_addpmkid))
++
++static const struct iw_priv_args ar6000_priv_args[] = {
++ { IEEE80211_IOCTL_SETKEY,
++ IW_PRIV_TYPE_KEY | IW_PRIV_SIZE_FIXED, 0, "setkey"},
++ { IEEE80211_IOCTL_DELKEY,
++ IW_PRIV_TYPE_DELKEY | IW_PRIV_SIZE_FIXED, 0, "delkey"},
++ { IEEE80211_IOCTL_SETPARAM,
++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "setparam"},
++ { IEEE80211_IOCTL_GETPARAM,
++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getparam"},
++ { IEEE80211_IOCTL_SETWMMPARAMS,
++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 4, 0, "setwmmparams"},
++ { IEEE80211_IOCTL_GETWMMPARAMS,
++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 3,
++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getwmmparams"},
++ { IEEE80211_IOCTL_SETOPTIE,
++ IW_PRIV_TYPE_BYTE, 0, "setie"},
++ { IEEE80211_IOCTL_SETMLME,
++ IW_PRIV_TYPE_MLME, 0, "setmlme"},
++ { IEEE80211_IOCTL_ADDPMKID,
++ IW_PRIV_TYPE_ADDPMKID | IW_PRIV_SIZE_FIXED, 0, "addpmkid"},
++};
++
++void ar6000_ioctl_iwsetup(struct iw_handler_def *def)
++{
++ def->private_args = (struct iw_priv_args *)ar6000_priv_args;
++ def->num_private_args = ARRAY_SIZE(ar6000_priv_args);
++}
++
++struct iw_handler_def ath_iw_handler_def = {
++ .standard = (iw_handler *)ath_handlers,
++ .num_standard = ARRAY_SIZE(ath_handlers),
++ .private = (iw_handler *)ath_priv_handlers,
++ .num_private = ARRAY_SIZE(ath_priv_handlers),
++};
++
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/bmi/bmi.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/bmi/bmi.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,657 @@
++/*
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "hif.h"
++#include "bmi.h"
++#include "htc_api.h"
++#include "bmi_internal.h"
++
++/*
++Although we had envisioned BMI to run on top of HTC, this is not what the
++final implementation boiled down to on dragon. Its a part of BSP and does
++not use the HTC protocol either. On the host side, however, we were still
++living with the original idea. I think the time has come to accept the truth
++and separate it from HTC which has been carrying BMI's burden all this while.
++It shall make HTC state machine relatively simpler
++*/
++
++/* APIs visible to the driver */
++void
++BMIInit(void)
++{
++ bmiDone = FALSE;
++}
++
++A_STATUS
++BMIDone(HIF_DEVICE *device)
++{
++ A_STATUS status;
++ A_UINT32 cid;
++
++ if (bmiDone) {
++ AR_DEBUG_PRINTF (ATH_DEBUG_BMI, ("BMIDone skipped\n"));
++ return A_OK;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Done: Enter (device: 0x%p)\n", device));
++ bmiDone = TRUE;
++ cid = BMI_DONE;
++
++ status = bmiBufferSend(device, (A_UCHAR *)&cid, sizeof(cid));
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
++ return A_ERROR;
++ }
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Done: Exit\n"));
++
++ return A_OK;
++}
++
++A_STATUS
++BMIGetTargetInfo(HIF_DEVICE *device, struct bmi_target_info *targ_info)
++{
++ A_STATUS status;
++ A_UINT32 cid;
++
++ if (bmiDone) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Get Target Info: Enter (device: 0x%p)\n", device));
++ cid = BMI_GET_TARGET_INFO;
++
++ status = bmiBufferSend(device, (A_UCHAR *)&cid, sizeof(cid));
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
++ return A_ERROR;
++ }
++
++ status = bmiBufferReceive(device, (A_UCHAR *)&targ_info->target_ver,
++ sizeof(targ_info->target_ver));
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Version from the device\n"));
++ return A_ERROR;
++ }
++
++ if (targ_info->target_ver == TARGET_VERSION_SENTINAL) {
++ /* Determine how many bytes are in the Target's targ_info */
++ status = bmiBufferReceive(device, (A_UCHAR *)&targ_info->target_info_byte_count,
++ sizeof(targ_info->target_info_byte_count));
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Info Byte Count from the device\n"));
++ return A_ERROR;
++ }
++
++ /*
++ * The Target's targ_info doesn't match the Host's targ_info.
++ * We need to do some backwards compatibility work to make this OK.
++ */
++ A_ASSERT(targ_info->target_info_byte_count == sizeof(*targ_info));
++
++ /* Read the remainder of the targ_info */
++ status = bmiBufferReceive(device,
++ ((A_UCHAR *)targ_info)+sizeof(targ_info->target_info_byte_count),
++ sizeof(*targ_info)-sizeof(targ_info->target_info_byte_count));
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Info (%d bytes) from the device\n",
++ targ_info->target_info_byte_count));
++ return A_ERROR;
++ }
++ } else {
++ /*
++ * Target must be an AR6001 whose firmware does not
++ * support BMI_GET_TARGET_INFO. Construct the data
++ * that it would have sent.
++ */
++ targ_info->target_info_byte_count = sizeof(targ_info);
++ targ_info->target_type = TARGET_TYPE_AR6001;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Get Target Info: Exit (ver: 0x%x type: 0x%x)\n",
++ targ_info->target_ver, targ_info->target_type));
++ printk("BMI Get Target Info: Exit (ver: 0x%x type: 0x%x)\n",
++ targ_info->target_ver, targ_info->target_type);
++
++ return A_OK;
++}
++
++A_STATUS
++BMIReadMemory(HIF_DEVICE *device,
++ A_UINT32 address,
++ A_UCHAR *buffer,
++ A_UINT32 length)
++{
++ A_UINT32 cid;
++ A_STATUS status;
++ A_UINT32 offset;
++ A_UINT32 remaining, rxlen;
++ static A_UCHAR data[BMI_DATASZ_MAX + sizeof(cid) + sizeof(address) + sizeof(length)];
++ memset (&data, 0, BMI_DATASZ_MAX + sizeof(cid) + sizeof(address) + sizeof(length));
++
++ if (bmiDone) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
++ ("BMI Read Memory: Enter (device: 0x%p, address: 0x%x, length: %d)\n",
++ device, address, length));
++
++ cid = BMI_READ_MEMORY;
++
++ remaining = length;
++
++ while (remaining)
++ {
++ rxlen = (remaining < BMI_DATASZ_MAX) ? remaining : BMI_DATASZ_MAX;
++ offset = 0;
++ A_MEMCPY(&data[offset], &cid, sizeof(cid));
++ offset += sizeof(cid);
++ A_MEMCPY(&data[offset], &address, sizeof(address));
++ offset += sizeof(address);
++ A_MEMCPY(&data[offset], &rxlen, sizeof(rxlen));
++ offset += sizeof(length);
++
++ status = bmiBufferSend(device, data, offset);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
++ return A_ERROR;
++ }
++ status = bmiBufferReceive(device, data, rxlen);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n"));
++ return A_ERROR;
++ }
++ A_MEMCPY(&buffer[length - remaining], data, rxlen);
++ remaining -= rxlen; address += rxlen;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Read Memory: Exit\n"));
++ return A_OK;
++}
++
++A_STATUS
++BMIWriteMemory(HIF_DEVICE *device,
++ A_UINT32 address,
++ A_UCHAR *buffer,
++ A_UINT32 length)
++{
++ A_UINT32 cid;
++ A_STATUS status;
++ A_UINT32 offset;
++ A_UINT32 remaining, txlen;
++ const A_UINT32 header = sizeof(cid) + sizeof(address) + sizeof(length);
++ static A_UCHAR data[BMI_DATASZ_MAX + sizeof(cid) + sizeof(address) + sizeof(length)];
++ memset (&data, 0, header);
++
++ if (bmiDone) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
++ ("BMI Write Memory: Enter (device: 0x%p, address: 0x%x, length: %d)\n",
++ device, address, length));
++
++ cid = BMI_WRITE_MEMORY;
++
++ remaining = length;
++ while (remaining)
++ {
++ txlen = (remaining < (BMI_DATASZ_MAX - header)) ?
++ remaining : (BMI_DATASZ_MAX - header);
++ offset = 0;
++ A_MEMCPY(&data[offset], &cid, sizeof(cid));
++ offset += sizeof(cid);
++ A_MEMCPY(&data[offset], &address, sizeof(address));
++ offset += sizeof(address);
++ A_MEMCPY(&data[offset], &txlen, sizeof(txlen));
++ offset += sizeof(txlen);
++ A_MEMCPY(&data[offset], &buffer[length - remaining], txlen);
++ offset += txlen;
++ status = bmiBufferSend(device, data, offset);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
++ return A_ERROR;
++ }
++ remaining -= txlen; address += txlen;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Write Memory: Exit\n"));
++
++ return A_OK;
++}
++
++A_STATUS
++BMIExecute(HIF_DEVICE *device,
++ A_UINT32 address,
++ A_UINT32 *param)
++{
++ A_UINT32 cid;
++ A_STATUS status;
++ A_UINT32 offset;
++ static A_UCHAR data[sizeof(cid) + sizeof(address) + sizeof(*param)];
++ memset (&data, 0, sizeof(cid) + sizeof(address) + sizeof(*param));
++
++ if (bmiDone) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
++ ("BMI Execute: Enter (device: 0x%p, address: 0x%x, param: %d)\n",
++ device, address, *param));
++
++ cid = BMI_EXECUTE;
++
++ offset = 0;
++ A_MEMCPY(&data[offset], &cid, sizeof(cid));
++ offset += sizeof(cid);
++ A_MEMCPY(&data[offset], &address, sizeof(address));
++ offset += sizeof(address);
++ A_MEMCPY(&data[offset], param, sizeof(*param));
++ offset += sizeof(*param);
++ status = bmiBufferSend(device, data, offset);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
++ return A_ERROR;
++ }
++
++ status = bmiBufferReceive(device, data, sizeof(*param));
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n"));
++ return A_ERROR;
++ }
++
++ A_MEMCPY(param, data, sizeof(*param));
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Execute: Exit (param: %d)\n", *param));
++ return A_OK;
++}
++
++A_STATUS
++BMISetAppStart(HIF_DEVICE *device,
++ A_UINT32 address)
++{
++ A_UINT32 cid;
++ A_STATUS status;
++ A_UINT32 offset;
++ static A_UCHAR data[sizeof(cid) + sizeof(address)];
++ memset (&data, 0, sizeof(cid) + sizeof(address));
++
++ if (bmiDone) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
++ ("BMI Set App Start: Enter (device: 0x%p, address: 0x%x)\n",
++ device, address));
++
++ cid = BMI_SET_APP_START;
++
++ offset = 0;
++ A_MEMCPY(&data[offset], &cid, sizeof(cid));
++ offset += sizeof(cid);
++ A_MEMCPY(&data[offset], &address, sizeof(address));
++ offset += sizeof(address);
++ status = bmiBufferSend(device, data, offset);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Set App Start: Exit\n"));
++ return A_OK;
++}
++
++A_STATUS
++BMIReadSOCRegister(HIF_DEVICE *device,
++ A_UINT32 address,
++ A_UINT32 *param)
++{
++ A_UINT32 cid;
++ A_STATUS status;
++ A_UINT32 offset;
++ static A_UCHAR data[sizeof(cid) + sizeof(address)];
++ memset (&data, 0, sizeof(cid) + sizeof(address));
++
++ if (bmiDone) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
++ ("BMI Read SOC Register: Enter (device: 0x%p, address: 0x%x)\n",
++ device, address));
++
++ cid = BMI_READ_SOC_REGISTER;
++
++ offset = 0;
++ A_MEMCPY(&data[offset], &cid, sizeof(cid));
++ offset += sizeof(cid);
++ A_MEMCPY(&data[offset], &address, sizeof(address));
++ offset += sizeof(address);
++
++ status = bmiBufferSend(device, data, offset);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
++ return A_ERROR;
++ }
++
++ status = bmiBufferReceive(device, data, sizeof(*param));
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n"));
++ return A_ERROR;
++ }
++ A_MEMCPY(param, data, sizeof(*param));
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Read SOC Register: Exit (value: %d)\n", *param));
++ return A_OK;
++}
++
++A_STATUS
++BMIWriteSOCRegister(HIF_DEVICE *device,
++ A_UINT32 address,
++ A_UINT32 param)
++{
++ A_UINT32 cid;
++ A_STATUS status;
++ A_UINT32 offset;
++ static A_UCHAR data[sizeof(cid) + sizeof(address) + sizeof(param)];
++
++ memset (&data, 0, sizeof(cid) + sizeof(address) + sizeof(param));
++
++ if (bmiDone) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
++ ("BMI Write SOC Register: Enter (device: 0x%p, address: 0x%x, param: %d)\n",
++ device, address, param));
++
++ cid = BMI_WRITE_SOC_REGISTER;
++
++ offset = 0;
++ A_MEMCPY(&data[offset], &cid, sizeof(cid));
++ offset += sizeof(cid);
++ A_MEMCPY(&data[offset], &address, sizeof(address));
++ offset += sizeof(address);
++ A_MEMCPY(&data[offset], ¶m, sizeof(param));
++ offset += sizeof(param);
++ status = bmiBufferSend(device, data, offset);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Read SOC Register: Exit\n"));
++ return A_OK;
++}
++
++A_STATUS
++BMIrompatchInstall(HIF_DEVICE *device,
++ A_UINT32 ROM_addr,
++ A_UINT32 RAM_addr,
++ A_UINT32 nbytes,
++ A_UINT32 do_activate,
++ A_UINT32 *rompatch_id)
++{
++ A_UINT32 cid;
++ A_STATUS status;
++ A_UINT32 offset;
++ static A_UCHAR data[sizeof(cid) + sizeof(ROM_addr) + sizeof(RAM_addr) +
++ sizeof(nbytes) + sizeof(do_activate)];
++
++ memset (&data, 0, sizeof(cid) + sizeof(ROM_addr) + sizeof(RAM_addr) +
++ sizeof(nbytes) + sizeof(do_activate));
++
++ if (bmiDone) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
++ ("BMI rompatch Install: Enter (device: 0x%p, ROMaddr: 0x%x, RAMaddr: 0x%x length: %d activate: %d)\n",
++ device, ROM_addr, RAM_addr, nbytes, do_activate));
++
++ cid = BMI_ROMPATCH_INSTALL;
++
++ offset = 0;
++ A_MEMCPY(&data[offset], &cid, sizeof(cid));
++ offset += sizeof(cid);
++ A_MEMCPY(&data[offset], &ROM_addr, sizeof(ROM_addr));
++ offset += sizeof(ROM_addr);
++ A_MEMCPY(&data[offset], &RAM_addr, sizeof(RAM_addr));
++ offset += sizeof(RAM_addr);
++ A_MEMCPY(&data[offset], &nbytes, sizeof(nbytes));
++ offset += sizeof(nbytes);
++ A_MEMCPY(&data[offset], &do_activate, sizeof(do_activate));
++ offset += sizeof(do_activate);
++ status = bmiBufferSend(device, data, offset);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
++ return A_ERROR;
++ }
++
++ status = bmiBufferReceive(device, (A_UCHAR *)rompatch_id, sizeof(*rompatch_id));
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI rompatch Install: (rompatch_id=%d)\n", *rompatch_id));
++ return A_OK;
++}
++
++A_STATUS
++BMIrompatchUninstall(HIF_DEVICE *device,
++ A_UINT32 rompatch_id)
++{
++ A_UINT32 cid;
++ A_STATUS status;
++ A_UINT32 offset;
++ static A_UCHAR data[sizeof(cid) + sizeof(rompatch_id)];
++ memset (&data, 0, sizeof(cid) + sizeof(rompatch_id));
++
++ if (bmiDone) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
++ ("BMI rompatch Uninstall: Enter (device: 0x%p, rompatch_id: %d)\n",
++ device, rompatch_id));
++
++ cid = BMI_ROMPATCH_UNINSTALL;
++
++ offset = 0;
++ A_MEMCPY(&data[offset], &cid, sizeof(cid));
++ offset += sizeof(cid);
++ A_MEMCPY(&data[offset], &rompatch_id, sizeof(rompatch_id));
++ offset += sizeof(rompatch_id);
++ status = bmiBufferSend(device, data, offset);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI rompatch UNinstall: (rompatch_id=0x%x)\n", rompatch_id));
++ return A_OK;
++}
++
++static A_STATUS
++_BMIrompatchChangeActivation(HIF_DEVICE *device,
++ A_UINT32 rompatch_count,
++ A_UINT32 *rompatch_list,
++ A_UINT32 do_activate)
++{
++ A_UINT32 cid;
++ A_STATUS status;
++ A_UINT32 offset;
++ static A_UCHAR data[BMI_DATASZ_MAX + sizeof(cid) + sizeof(rompatch_count)];
++ A_UINT32 length;
++
++ memset (&data, 0, BMI_DATASZ_MAX + sizeof(cid) + sizeof(rompatch_count));
++
++ if (bmiDone) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
++ ("BMI Change rompatch Activation: Enter (device: 0x%p, count: %d)\n",
++ device, rompatch_count));
++
++ cid = do_activate ? BMI_ROMPATCH_ACTIVATE : BMI_ROMPATCH_DEACTIVATE;
++
++ offset = 0;
++ A_MEMCPY(&data[offset], &cid, sizeof(cid));
++ offset += sizeof(cid);
++ A_MEMCPY(&data[offset], &rompatch_count, sizeof(rompatch_count));
++ offset += sizeof(rompatch_count);
++ length = rompatch_count * sizeof(*rompatch_list);
++ A_MEMCPY(&data[offset], rompatch_list, length);
++ offset += length;
++ status = bmiBufferSend(device, data, offset);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
++ return A_ERROR;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Change rompatch Activation: Exit\n"));
++
++ return A_OK;
++}
++
++A_STATUS
++BMIrompatchActivate(HIF_DEVICE *device,
++ A_UINT32 rompatch_count,
++ A_UINT32 *rompatch_list)
++{
++ return _BMIrompatchChangeActivation(device, rompatch_count, rompatch_list, 1);
++}
++
++A_STATUS
++BMIrompatchDeactivate(HIF_DEVICE *device,
++ A_UINT32 rompatch_count,
++ A_UINT32 *rompatch_list)
++{
++ return _BMIrompatchChangeActivation(device, rompatch_count, rompatch_list, 0);
++}
++
++/* BMI Access routines */
++A_STATUS
++bmiBufferSend(HIF_DEVICE *device,
++ A_UCHAR *buffer,
++ A_UINT32 length)
++{
++ A_STATUS status;
++ A_UINT32 timeout;
++ A_UINT32 address;
++ static A_UINT32 cmdCredits;
++ A_UINT32 mboxAddress[HTC_MAILBOX_NUM_MAX];
++
++ HIFConfigureDevice(device, HIF_DEVICE_GET_MBOX_ADDR,
++ &mboxAddress, sizeof(mboxAddress));
++
++ cmdCredits = 0;
++ timeout = BMI_COMMUNICATION_TIMEOUT;
++
++ while(timeout-- && !cmdCredits) {
++ /* Read the counter register to get the command credits */
++ address = COUNT_DEC_ADDRESS + (HTC_MAILBOX_NUM_MAX + ENDPOINT1) * 4;
++ /* hit the credit counter with a 4-byte access, the first byte read will hit the counter and cause
++ * a decrement, while the remaining 3 bytes has no effect. The rationale behind this is to
++ * make all HIF accesses 4-byte aligned */
++ status = HIFReadWrite(device, address, (A_UINT8 *)&cmdCredits, 4,
++ HIF_RD_SYNC_BYTE_INC, NULL);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to decrement the command credit count register\n"));
++ return A_ERROR;
++ }
++ /* the counter is only 8=bits, ignore anything in the upper 3 bytes */
++ cmdCredits &= 0xFF;
++ }
++
++ if (cmdCredits) {
++ address = mboxAddress[ENDPOINT1];
++ status = HIFReadWrite(device, address, buffer, length,
++ HIF_WR_SYNC_BYTE_INC, NULL);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to send the BMI data to the device\n"));
++ return A_ERROR;
++ }
++ } else {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("BMI Communication timeout\n"));
++ return A_ERROR;
++ }
++
++ return status;
++}
++
++A_STATUS
++bmiBufferReceive(HIF_DEVICE *device,
++ A_UCHAR *buffer,
++ A_UINT32 length)
++{
++ A_STATUS status;
++ A_UINT32 address;
++ A_UINT32 timeout;
++ static A_UINT32 cmdCredits;
++ A_UINT32 mboxAddress[HTC_MAILBOX_NUM_MAX];
++
++ HIFConfigureDevice(device, HIF_DEVICE_GET_MBOX_ADDR,
++ &mboxAddress, sizeof(mboxAddress));
++
++ cmdCredits = 0;
++ timeout = BMI_COMMUNICATION_TIMEOUT;
++ while(timeout-- && !cmdCredits) {
++ /* Read the counter register to get the command credits */
++ address = COUNT_ADDRESS + (HTC_MAILBOX_NUM_MAX + ENDPOINT1) * 1;
++ /* read the counter using a 4-byte read. Since the counter is NOT auto-decrementing,
++ * we can read this counter multiple times using a non-incrementing address mode.
++ * The rationale here is to make all HIF accesses a multiple of 4 bytes */
++ status = HIFReadWrite(device, address, (A_UINT8 *)&cmdCredits, sizeof(cmdCredits),
++ HIF_RD_SYNC_BYTE_FIX, NULL);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read the command credit count register\n"));
++ return A_ERROR;
++ }
++ /* we did a 4-byte read to the same count register so mask off upper bytes */
++ cmdCredits &= 0xFF;
++ status = A_ERROR;
++ }
++
++ if (cmdCredits) {
++ address = mboxAddress[ENDPOINT1];
++ status = HIFReadWrite(device, address, buffer, length,
++ HIF_RD_SYNC_BYTE_INC, NULL);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read the BMI data from the device\n"));
++ return A_ERROR;
++ }
++ } else {
++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Communication timeout\n"));
++ return A_ERROR;
++ }
++
++ return status;
++}
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/bmi/bmi_internal.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/bmi/bmi_internal.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,45 @@
++#ifndef BMI_INTERNAL_H
++#define BMI_INTERNAL_H
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "a_config.h"
++#include "athdefs.h"
++#include "a_types.h"
++#include "a_osapi.h"
++#include "a_debug.h"
++#include "AR6Khwreg.h"
++#include "bmi_msg.h"
++
++#define BMI_COMMUNICATION_TIMEOUT 100000
++
++/* ------ Global Variable Declarations ------- */
++A_BOOL bmiDone;
++
++A_STATUS
++bmiBufferSend(HIF_DEVICE *device,
++ A_UCHAR *buffer,
++ A_UINT32 length);
++
++A_STATUS
++bmiBufferReceive(HIF_DEVICE *device,
++ A_UCHAR *buffer,
++ A_UINT32 length);
++
++#endif
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/hif/hif.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/hif/hif.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,824 @@
++/*
++ * @file: hif.c
++ *
++ * @abstract: HIF layer reference implementation for Atheros SDIO stack
++ *
++ * @notice: Copyright (c) 2004-2006 Atheros Communications Inc.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "hif_internal.h"
++
++/* ------ Static Variables ------ */
++
++/* ------ Global Variable Declarations ------- */
++SD_PNP_INFO Ids[] = {
++ {
++ .SDIO_ManufacturerID = MANUFACTURER_ID_AR6001_BASE | 0xB,
++ .SDIO_ManufacturerCode = MANUFACTURER_CODE,
++ .SDIO_FunctionClass = FUNCTION_CLASS,
++ .SDIO_FunctionNo = 1
++ },
++ {
++ .SDIO_ManufacturerID = MANUFACTURER_ID_AR6001_BASE | 0xA,
++ .SDIO_ManufacturerCode = MANUFACTURER_CODE,
++ .SDIO_FunctionClass = FUNCTION_CLASS,
++ .SDIO_FunctionNo = 1
++ },
++ {
++ .SDIO_ManufacturerID = MANUFACTURER_ID_AR6001_BASE | 0x9,
++ .SDIO_ManufacturerCode = MANUFACTURER_CODE,
++ .SDIO_FunctionClass = FUNCTION_CLASS,
++ .SDIO_FunctionNo = 1
++ },
++ {
++ .SDIO_ManufacturerID = MANUFACTURER_ID_AR6001_BASE | 0x8,
++ .SDIO_ManufacturerCode = MANUFACTURER_CODE,
++ .SDIO_FunctionClass = FUNCTION_CLASS,
++ .SDIO_FunctionNo = 1
++ },
++ {
++ .SDIO_ManufacturerID = MANUFACTURER_ID_AR6002_BASE | 0x0,
++ .SDIO_ManufacturerCode = MANUFACTURER_CODE,
++ .SDIO_FunctionClass = FUNCTION_CLASS,
++ .SDIO_FunctionNo = 1
++ },
++ {
++ .SDIO_ManufacturerID = MANUFACTURER_ID_AR6002_BASE | 0x1,
++ .SDIO_ManufacturerCode = MANUFACTURER_CODE,
++ .SDIO_FunctionClass = FUNCTION_CLASS,
++ .SDIO_FunctionNo = 1
++ },
++ {
++ } //list is null termintaed
++};
++
++TARGET_FUNCTION_CONTEXT FunctionContext = {
++ .function.Version = CT_SDIO_STACK_VERSION_CODE,
++ .function.pName = "sdio_wlan",
++ .function.MaxDevices = 1,
++ .function.NumDevices = 0,
++ .function.pIds = Ids,
++ .function.pProbe = hifDeviceInserted,
++ .function.pRemove = hifDeviceRemoved,
++ .function.pSuspend = NULL,
++ .function.pResume = NULL,
++ .function.pWake = NULL,
++ .function.pContext = &FunctionContext,
++};
++
++HIF_DEVICE hifDevice[HIF_MAX_DEVICES];
++HTC_CALLBACKS htcCallbacks;
++BUS_REQUEST busRequest[BUS_REQUEST_MAX_NUM];
++static BUS_REQUEST *s_busRequestFreeQueue = NULL;
++OS_CRITICALSECTION lock;
++extern A_UINT32 onebitmode;
++extern A_UINT32 busspeedlow;
++
++#ifdef DEBUG
++extern A_UINT32 debughif;
++#define ATH_DEBUG_ERROR 1
++#define ATH_DEBUG_WARN 2
++#define ATH_DEBUG_TRACE 3
++#define _AR_DEBUG_PRINTX_ARG(arg...) arg
++#define AR_DEBUG_PRINTF(lvl, args)\
++ {if (lvl <= debughif)\
++ A_PRINTF(KERN_ALERT _AR_DEBUG_PRINTX_ARG args);\
++ }
++#else
++#define AR_DEBUG_PRINTF(lvl, args)
++#endif
++
++static BUS_REQUEST *hifAllocateBusRequest(void);
++static void hifFreeBusRequest(BUS_REQUEST *busrequest);
++static THREAD_RETURN insert_helper_func(POSKERNEL_HELPER pHelper);
++static void ResetAllCards(void);
++
++/* ------ Functions ------ */
++int HIFInit(HTC_CALLBACKS *callbacks)
++{
++ SDIO_STATUS status;
++ DBG_ASSERT(callbacks != NULL);
++
++ /* Store the callback and event handlers */
++ htcCallbacks.deviceInsertedHandler = callbacks->deviceInsertedHandler;
++ htcCallbacks.deviceRemovedHandler = callbacks->deviceRemovedHandler;
++ htcCallbacks.deviceSuspendHandler = callbacks->deviceSuspendHandler;
++ htcCallbacks.deviceResumeHandler = callbacks->deviceResumeHandler;
++ htcCallbacks.deviceWakeupHandler = callbacks->deviceWakeupHandler;
++ htcCallbacks.rwCompletionHandler = callbacks->rwCompletionHandler;
++ htcCallbacks.dsrHandler = callbacks->dsrHandler;
++
++ CriticalSectionInit(&lock);
++
++ /* Register with bus driver core */
++ status = SDIO_RegisterFunction(&FunctionContext.function);
++ DBG_ASSERT(SDIO_SUCCESS(status));
++
++ return(0);
++}
++
++A_STATUS
++HIFReadWrite(HIF_DEVICE *device,
++ A_UINT32 address,
++ A_UCHAR *buffer,
++ A_UINT32 length,
++ A_UINT32 request,
++ void *context)
++{
++ A_UINT8 rw;
++ A_UINT8 mode;
++ A_UINT8 funcNo;
++ A_UINT8 opcode;
++ A_UINT16 count;
++ SDREQUEST *sdrequest;
++ SDIO_STATUS sdiostatus;
++ BUS_REQUEST *busrequest;
++ A_STATUS status = A_OK;
++
++ DBG_ASSERT(device != NULL);
++ DBG_ASSERT(device->handle != NULL);
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Device: %p\n", device));
++
++ do {
++ busrequest = hifAllocateBusRequest();
++ if (busrequest == NULL) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("HIF Unable to allocate bus request\n"));
++ status = A_NO_RESOURCE;
++ break;
++ }
++
++ sdrequest = busrequest->request;
++ busrequest->context = context;
++
++ sdrequest->pDataBuffer = buffer;
++ if (request & HIF_SYNCHRONOUS) {
++ sdrequest->Flags = SDREQ_FLAGS_RESP_SDIO_R5 | SDREQ_FLAGS_DATA_TRANS;
++ sdrequest->pCompleteContext = NULL;
++ sdrequest->pCompletion = NULL;
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Execution mode: Synchronous\n"));
++ } else if (request & HIF_ASYNCHRONOUS) {
++ sdrequest->Flags = SDREQ_FLAGS_RESP_SDIO_R5 | SDREQ_FLAGS_DATA_TRANS |
++ SDREQ_FLAGS_TRANS_ASYNC;
++ sdrequest->pCompleteContext = busrequest;
++ sdrequest->pCompletion = hifRWCompletionHandler;
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Execution mode: Asynchronous\n"));
++ } else {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
++ ("Invalid execution mode: 0x%08x\n", request));
++ status = A_EINVAL;
++ break;
++ }
++
++ if (request & HIF_EXTENDED_IO) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Command type: CMD53\n"));
++ sdrequest->Command = CMD53;
++ } else {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
++ ("Invalid command type: 0x%08x\n", request));
++ status = A_EINVAL;
++ break;
++ }
++
++ if (request & HIF_BLOCK_BASIS) {
++ mode = CMD53_BLOCK_BASIS;
++ sdrequest->BlockLen = HIF_MBOX_BLOCK_SIZE;
++ sdrequest->BlockCount = length / HIF_MBOX_BLOCK_SIZE;
++ count = sdrequest->BlockCount;
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
++ ("Block mode (BlockLen: %d, BlockCount: %d)\n",
++ sdrequest->BlockLen, sdrequest->BlockCount));
++ } else if (request & HIF_BYTE_BASIS) {
++ mode = CMD53_BYTE_BASIS;
++ sdrequest->BlockLen = length;
++ sdrequest->BlockCount = 1;
++ count = sdrequest->BlockLen;
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
++ ("Byte mode (BlockLen: %d, BlockCount: %d)\n",
++ sdrequest->BlockLen, sdrequest->BlockCount));
++ } else {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
++ ("Invalid data mode: 0x%08x\n", request));
++ status = A_EINVAL;
++ break;
++ }
++
++#if 0
++ /* useful for checking register accesses */
++ if (length & 0x3) {
++ A_PRINTF(KERN_ALERT"HIF (%s) is not a multiple of 4 bytes, addr:0x%X, len:%d\n",
++ request & HIF_WRITE ? "write":"read", address, length);
++ }
++#endif
++
++ if ((address >= HIF_MBOX_START_ADDR(0)) &&
++ (address <= HIF_MBOX_END_ADDR(3)))
++ {
++
++ DBG_ASSERT(length <= HIF_MBOX_WIDTH);
++
++ /*
++ * Mailbox write. Adjust the address so that the last byte
++ * falls on the EOM address.
++ */
++ address += (HIF_MBOX_WIDTH - length);
++ }
++
++
++
++ if (request & HIF_WRITE) {
++ rw = CMD53_WRITE;
++ sdrequest->Flags |= SDREQ_FLAGS_DATA_WRITE;
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Direction: Write\n"));
++ } else if (request & HIF_READ) {
++ rw = CMD53_READ;
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Direction: Read\n"));
++ } else {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
++ ("Invalid direction: 0x%08x\n", request));
++ status = A_EINVAL;
++ break;
++ }
++
++ if (request & HIF_FIXED_ADDRESS) {
++ opcode = CMD53_FIXED_ADDRESS;
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Address mode: Fixed\n"));
++ } else if (request & HIF_INCREMENTAL_ADDRESS) {
++ opcode = CMD53_INCR_ADDRESS;
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Address mode: Incremental\n"));
++ } else {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
++ ("Invalid address mode: 0x%08x\n", request));
++ status = A_EINVAL;
++ break;
++ }
++
++ funcNo = SDDEVICE_GET_SDIO_FUNCNO(device->handle);
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Function number: %d\n", funcNo));
++ SDIO_SET_CMD53_ARG(sdrequest->Argument, rw, funcNo,
++ mode, opcode, address, count);
++
++ /* Send the command out */
++ sdiostatus = SDDEVICE_CALL_REQUEST_FUNC(device->handle, sdrequest);
++
++ if (!SDIO_SUCCESS(sdiostatus)) {
++ status = A_ERROR;
++ }
++
++ } while (FALSE);
++
++ if (A_FAILED(status) || (request & HIF_SYNCHRONOUS)) {
++ if (busrequest != NULL) {
++ hifFreeBusRequest(busrequest);
++ }
++ }
++
++ if (A_FAILED(status) && (request & HIF_ASYNCHRONOUS)) {
++ /* call back async handler on failure */
++ htcCallbacks.rwCompletionHandler(context, status);
++ }
++
++ return status;
++}
++
++A_STATUS
++HIFConfigureDevice(HIF_DEVICE *device, HIF_DEVICE_CONFIG_OPCODE opcode,
++ void *config, A_UINT32 configLen)
++{
++ A_UINT32 count;
++
++ switch(opcode) {
++ case HIF_DEVICE_GET_MBOX_BLOCK_SIZE:
++ ((A_UINT32 *)config)[0] = HIF_MBOX0_BLOCK_SIZE;
++ ((A_UINT32 *)config)[1] = HIF_MBOX1_BLOCK_SIZE;
++ ((A_UINT32 *)config)[2] = HIF_MBOX2_BLOCK_SIZE;
++ ((A_UINT32 *)config)[3] = HIF_MBOX3_BLOCK_SIZE;
++ break;
++
++ case HIF_DEVICE_GET_MBOX_ADDR:
++ for (count = 0; count < 4; count ++) {
++ ((A_UINT32 *)config)[count] = HIF_MBOX_START_ADDR(count);
++ }
++ break;
++ case HIF_DEVICE_GET_IRQ_PROC_MODE:
++ /* the SDIO stack allows the interrupts to be processed either way, ASYNC or SYNC */
++ *((HIF_DEVICE_IRQ_PROCESSING_MODE *)config) = HIF_DEVICE_IRQ_ASYNC_SYNC;
++ break;
++ default:
++ AR_DEBUG_PRINTF(ATH_DEBUG_WARN,
++ ("Unsupported configuration opcode: %d\n", opcode));
++ return A_ERROR;
++ }
++
++ return A_OK;
++}
++
++void
++HIFShutDownDevice(HIF_DEVICE *device)
++{
++ A_UINT8 data;
++ A_UINT32 count;
++ SDIO_STATUS status;
++ SDCONFIG_BUS_MODE_DATA busSettings;
++ SDCONFIG_FUNC_ENABLE_DISABLE_DATA fData;
++
++ if (device != NULL) {
++ DBG_ASSERT(device->handle != NULL);
++
++ /* Remove the allocated current if any */
++ status = SDLIB_IssueConfig(device->handle,
++ SDCONFIG_FUNC_FREE_SLOT_CURRENT, NULL, 0);
++ DBG_ASSERT(SDIO_SUCCESS(status));
++
++ /* Disable the card */
++ fData.EnableFlags = SDCONFIG_DISABLE_FUNC;
++ fData.TimeOut = 1;
++ status = SDLIB_IssueConfig(device->handle, SDCONFIG_FUNC_ENABLE_DISABLE,
++ &fData, sizeof(fData));
++ DBG_ASSERT(SDIO_SUCCESS(status));
++
++ /* Perform a soft I/O reset */
++ data = SDIO_IO_RESET;
++ status = SDLIB_IssueCMD52(device->handle, 0, SDIO_IO_ABORT_REG,
++ &data, 1, 1);
++ DBG_ASSERT(SDIO_SUCCESS(status));
++
++ /*
++ * WAR - Codetelligence driver does not seem to shutdown correctly in 1
++ * bit mode. By default it configures the HC in the 4 bit. Its later in
++ * our driver that we switch to 1 bit mode. If we try to shutdown, the
++ * driver hangs so we revert to 4 bit mode, to be transparent to the
++ * underlying bus driver.
++ */
++ if (onebitmode) {
++ ZERO_OBJECT(busSettings);
++ busSettings.BusModeFlags = SDDEVICE_GET_BUSMODE_FLAGS(device->handle);
++ SDCONFIG_SET_BUS_WIDTH(busSettings.BusModeFlags,
++ SDCONFIG_BUS_WIDTH_4_BIT);
++
++ /* Issue config request to change the bus width to 4 bit */
++ status = SDLIB_IssueConfig(device->handle, SDCONFIG_BUS_MODE_CTRL,
++ &busSettings,
++ sizeof(SDCONFIG_BUS_MODE_DATA));
++ DBG_ASSERT(SDIO_SUCCESS(status));
++ }
++
++ /* Free the bus requests */
++ for (count = 0; count < BUS_REQUEST_MAX_NUM; count ++) {
++ SDDeviceFreeRequest(device->handle, busRequest[count].request);
++ }
++ /* Clean up the queue */
++ s_busRequestFreeQueue = NULL;
++ } else {
++ /* since we are unloading the driver anyways, reset all cards in case the SDIO card
++ * is externally powered and we are unloading the SDIO stack. This avoids the problem when
++ * the SDIO stack is reloaded and attempts are made to re-enumerate a card that is already
++ * enumerated */
++ ResetAllCards();
++ /* Unregister with bus driver core */
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
++ ("Unregistering with the bus driver\n"));
++ status = SDIO_UnregisterFunction(&FunctionContext.function);
++ DBG_ASSERT(SDIO_SUCCESS(status));
++ }
++}
++
++void
++hifRWCompletionHandler(SDREQUEST *request)
++{
++ A_STATUS status;
++ void *context;
++ BUS_REQUEST *busrequest;
++
++ if (SDIO_SUCCESS(request->Status)) {
++ status = A_OK;
++ } else {
++ status = A_ERROR;
++ }
++
++ DBG_ASSERT(status == A_OK);
++ busrequest = (BUS_REQUEST *) request->pCompleteContext;
++ context = (void *) busrequest->context;
++ /* free the request before calling the callback, in case the
++ * callback submits another request, this guarantees that
++ * there is at least 1 free request available everytime the callback
++ * is invoked */
++ hifFreeBusRequest(busrequest);
++ htcCallbacks.rwCompletionHandler(context, status);
++}
++
++void
++hifIRQHandler(void *context)
++{
++ A_STATUS status;
++ HIF_DEVICE *device;
++
++ device = (HIF_DEVICE *)context;
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Device: %p\n", device));
++ status = htcCallbacks.dsrHandler(device->htc_handle);
++ DBG_ASSERT(status == A_OK);
++}
++
++BOOL
++hifDeviceInserted(SDFUNCTION *function, SDDEVICE *handle)
++{
++ BOOL enabled;
++ A_UINT8 data;
++ A_UINT32 count;
++ HIF_DEVICE *device;
++ SDIO_STATUS status;
++ A_UINT16 maxBlocks;
++ A_UINT16 maxBlockSize;
++ SDCONFIG_BUS_MODE_DATA busSettings;
++ SDCONFIG_FUNC_ENABLE_DISABLE_DATA fData;
++ TARGET_FUNCTION_CONTEXT *functionContext;
++ SDCONFIG_FUNC_SLOT_CURRENT_DATA slotCurrent;
++ SD_BUSCLOCK_RATE currentBusClock;
++
++ DBG_ASSERT(function != NULL);
++ DBG_ASSERT(handle != NULL);
++
++ device = addHifDevice(handle);
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Device: %p\n", device));
++ functionContext = (TARGET_FUNCTION_CONTEXT *)function->pContext;
++
++ /*
++ * Issue commands to get the manufacturer ID and stuff and compare it
++ * against the rev Id derived from the ID registered during the
++ * initialization process. Report the device only in the case there
++ * is a match. In the case od SDIO, the bus driver has already queried
++ * these details so we just need to use their data structures to get the
++ * relevant values. Infact, the driver has already matched it against
++ * the Ids that we registered with it so we dont need to the step here.
++ */
++
++ /* Configure the SDIO Bus Width */
++ if (onebitmode) {
++ data = SDIO_BUS_WIDTH_1_BIT;
++ status = SDLIB_IssueCMD52(handle, 0, SDIO_BUS_IF_REG, &data, 1, 1);
++ if (!SDIO_SUCCESS(status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
++ ("Unable to set the bus width to 1 bit\n"));
++ return FALSE;
++ }
++ }
++
++ /* Get current bus flags */
++ ZERO_OBJECT(busSettings);
++
++ busSettings.BusModeFlags = SDDEVICE_GET_BUSMODE_FLAGS(handle);
++ if (onebitmode) {
++ SDCONFIG_SET_BUS_WIDTH(busSettings.BusModeFlags,
++ SDCONFIG_BUS_WIDTH_1_BIT);
++ }
++
++ /* get the current operating clock, the bus driver sets us up based
++ * on what our CIS reports and what the host controller can handle
++ * we can use this to determine whether we want to drop our clock rate
++ * down */
++ currentBusClock = SDDEVICE_GET_OPER_CLOCK(handle);
++ busSettings.ClockRate = currentBusClock;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
++ ("HIF currently running at: %d \n",currentBusClock));
++
++ /* see if HIF wants to run at a lower clock speed, we may already be
++ * at that lower clock speed */
++ if (currentBusClock > (SDIO_CLOCK_FREQUENCY_DEFAULT >> busspeedlow)) {
++ busSettings.ClockRate = SDIO_CLOCK_FREQUENCY_DEFAULT >> busspeedlow;
++ AR_DEBUG_PRINTF(ATH_DEBUG_WARN,
++ ("HIF overriding clock to %d \n",busSettings.ClockRate));
++ }
++
++ /* Issue config request to override clock rate */
++ status = SDLIB_IssueConfig(handle, SDCONFIG_FUNC_CHANGE_BUS_MODE, &busSettings,
++ sizeof(SDCONFIG_BUS_MODE_DATA));
++ if (!SDIO_SUCCESS(status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
++ ("Unable to configure the host clock\n"));
++ return FALSE;
++ } else {
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
++ ("Configured clock: %d, Maximum clock: %d\n",
++ busSettings.ActualClockRate,
++ SDDEVICE_GET_MAX_CLOCK(handle)));
++ }
++
++ /*
++ * Check if the target supports block mode. This result of this check
++ * can be used to implement the HIFReadWrite API.
++ */
++ if (SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE(handle)) {
++ /* Limit block size to operational block limit or card function
++ capability */
++ maxBlockSize = min(SDDEVICE_GET_OPER_BLOCK_LEN(handle),
++ SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE(handle));
++
++ /* check if the card support multi-block transfers */
++ if (!(SDDEVICE_GET_SDIOCARD_CAPS(handle) & SDIO_CAPS_MULTI_BLOCK)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Byte basis only\n"));
++
++ /* Limit block size to max byte basis */
++ maxBlockSize = min(maxBlockSize,
++ (A_UINT16)SDIO_MAX_LENGTH_BYTE_BASIS);
++ maxBlocks = 1;
++ } else {
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Multi-block capable\n"));
++ maxBlocks = SDDEVICE_GET_OPER_BLOCKS(handle);
++ status = SDLIB_SetFunctionBlockSize(handle, HIF_MBOX_BLOCK_SIZE);
++ if (!SDIO_SUCCESS(status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
++ ("Failed to set block size. Err:%d\n", status));
++ return FALSE;
++ }
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
++ ("Bytes Per Block: %d bytes, Block Count:%d \n",
++ maxBlockSize, maxBlocks));
++ } else {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
++ ("Function does not support Block Mode!\n"));
++ return FALSE;
++ }
++
++ /* Allocate the slot current */
++ status = SDLIB_GetDefaultOpCurrent(handle, &slotCurrent.SlotCurrent);
++ if (SDIO_SUCCESS(status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Allocating Slot current: %d mA\n",
++ slotCurrent.SlotCurrent));
++ status = SDLIB_IssueConfig(handle, SDCONFIG_FUNC_ALLOC_SLOT_CURRENT,
++ &slotCurrent, sizeof(slotCurrent));
++ if (!SDIO_SUCCESS(status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
++ ("Failed to allocate slot current %d\n", status));
++ return FALSE;
++ }
++ }
++
++ /* Enable the dragon function */
++ count = 0;
++ enabled = FALSE;
++ fData.TimeOut = 1;
++ fData.EnableFlags = SDCONFIG_ENABLE_FUNC;
++ while ((count++ < SDWLAN_ENABLE_DISABLE_TIMEOUT) && !enabled)
++ {
++ /* Enable dragon */
++ status = SDLIB_IssueConfig(handle, SDCONFIG_FUNC_ENABLE_DISABLE,
++ &fData, sizeof(fData));
++ if (!SDIO_SUCCESS(status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
++ ("Attempting to enable the card again\n"));
++ continue;
++ }
++
++ /* Mark the status as enabled */
++ enabled = TRUE;
++ }
++
++ /* Check if we were succesful in enabling the target */
++ if (!enabled) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
++ ("Failed to communicate with the target\n"));
++ return FALSE;
++ }
++
++ /* Allocate the bus requests to be used later */
++ A_MEMZERO(busRequest, sizeof(busRequest));
++ for (count = 0; count < BUS_REQUEST_MAX_NUM; count ++) {
++ if ((busRequest[count].request = SDDeviceAllocRequest(handle)) == NULL){
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("Unable to allocate memory\n"));
++ /* TODO: Free the memory that has already been allocated */
++ return FALSE;
++ }
++ hifFreeBusRequest(&busRequest[count]);
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
++ ("0x%08x = busRequest[%d].request = 0x%08x\n",
++ (unsigned int) &busRequest[count], count,
++ (unsigned int) busRequest[count].request));
++ }
++
++ /* Schedule a worker to handle device inserted, this is a temporary workaround
++ * to fix a deadlock if the device fails to intialize in the insertion handler
++ * The failure causes the instance to shutdown the HIF layer and unregister the
++ * function driver within the busdriver probe context which can deadlock
++ *
++ * NOTE: we cannot use the default work queue because that would block
++ * SD bus request processing for all synchronous I/O. We must use a kernel
++ * thread that is creating using the helper library.
++ * */
++
++ if (SDIO_SUCCESS(SDLIB_OSCreateHelper(&device->insert_helper,
++ insert_helper_func,
++ device))) {
++ device->helper_started = TRUE;
++ }
++
++ return TRUE;
++}
++
++static THREAD_RETURN insert_helper_func(POSKERNEL_HELPER pHelper)
++{
++
++ /*
++ * Adding a wait of around a second before we issue the very first
++ * command to dragon. During the process of loading/unloading the
++ * driver repeatedly it was observed that we get a data timeout
++ * while accessing function 1 registers in the chip. The theory at
++ * this point is that some initialization delay in dragon is
++ * causing the SDIO state in dragon core to be not ready even after
++ * the ready bit indicates that function 1 is ready. Accomodating
++ * for this behavior by adding some delay in the driver before it
++ * issues the first command after switching on dragon. Need to
++ * investigate this a bit more - TODO
++ */
++
++ A_MDELAY(1000);
++ /* Inform HTC */
++ if ((htcCallbacks.deviceInsertedHandler(SD_GET_OS_HELPER_CONTEXT(pHelper))) != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Device rejected\n"));
++ }
++
++ return 0;
++}
++
++void
++HIFAckInterrupt(HIF_DEVICE *device)
++{
++ SDIO_STATUS status;
++ DBG_ASSERT(device != NULL);
++ DBG_ASSERT(device->handle != NULL);
++
++ /* Acknowledge our function IRQ */
++ status = SDLIB_IssueConfig(device->handle, SDCONFIG_FUNC_ACK_IRQ,
++ NULL, 0);
++ DBG_ASSERT(SDIO_SUCCESS(status));
++}
++
++void
++HIFUnMaskInterrupt(HIF_DEVICE *device)
++{
++ SDIO_STATUS status;
++
++ DBG_ASSERT(device != NULL);
++ DBG_ASSERT(device->handle != NULL);
++
++ /* Register the IRQ Handler */
++ SDDEVICE_SET_IRQ_HANDLER(device->handle, hifIRQHandler, device);
++
++ /* Unmask our function IRQ */
++ status = SDLIB_IssueConfig(device->handle, SDCONFIG_FUNC_UNMASK_IRQ,
++ NULL, 0);
++ DBG_ASSERT(SDIO_SUCCESS(status));
++}
++
++void HIFMaskInterrupt(HIF_DEVICE *device)
++{
++ SDIO_STATUS status;
++ DBG_ASSERT(device != NULL);
++ DBG_ASSERT(device->handle != NULL);
++
++ /* Mask our function IRQ */
++ status = SDLIB_IssueConfig(device->handle, SDCONFIG_FUNC_MASK_IRQ,
++ NULL, 0);
++ DBG_ASSERT(SDIO_SUCCESS(status));
++
++ /* Unregister the IRQ Handler */
++ SDDEVICE_SET_IRQ_HANDLER(device->handle, NULL, NULL);
++}
++
++static BUS_REQUEST *hifAllocateBusRequest(void)
++{
++ BUS_REQUEST *busrequest;
++
++ /* Acquire lock */
++ CriticalSectionAcquire(&lock);
++
++ /* Remove first in list */
++ if((busrequest = s_busRequestFreeQueue) != NULL)
++ {
++ s_busRequestFreeQueue = busrequest->next;
++ }
++
++ /* Release lock */
++ CriticalSectionRelease(&lock);
++
++ return busrequest;
++}
++
++static void
++hifFreeBusRequest(BUS_REQUEST *busrequest)
++{
++ DBG_ASSERT(busrequest != NULL);
++
++ /* Acquire lock */
++ CriticalSectionAcquire(&lock);
++
++ /* Insert first in list */
++ busrequest->next = s_busRequestFreeQueue;
++ s_busRequestFreeQueue = busrequest;
++
++ /* Release lock */
++ CriticalSectionRelease(&lock);
++}
++
++void
++hifDeviceRemoved(SDFUNCTION *function, SDDEVICE *handle)
++{
++ A_STATUS status;
++ HIF_DEVICE *device;
++ DBG_ASSERT(function != NULL);
++ DBG_ASSERT(handle != NULL);
++
++ device = getHifDevice(handle);
++ status = htcCallbacks.deviceRemovedHandler(device->htc_handle, A_OK);
++
++ /* cleanup the helper thread */
++ if (device->helper_started) {
++ SDLIB_OSDeleteHelper(&device->insert_helper);
++ device->helper_started = FALSE;
++ }
++
++ delHifDevice(handle);
++ DBG_ASSERT(status == A_OK);
++}
++
++HIF_DEVICE *
++addHifDevice(SDDEVICE *handle)
++{
++ DBG_ASSERT(handle != NULL);
++ hifDevice[0].handle = handle;
++ return &hifDevice[0];
++}
++
++HIF_DEVICE *
++getHifDevice(SDDEVICE *handle)
++{
++ DBG_ASSERT(handle != NULL);
++ return &hifDevice[0];
++}
++
++void
++delHifDevice(SDDEVICE *handle)
++{
++ DBG_ASSERT(handle != NULL);
++ hifDevice[0].handle = NULL;
++}
++
++struct device*
++HIFGetOSDevice(HIF_DEVICE *device)
++{
++ return &device->handle->Device.dev;
++}
++
++static void ResetAllCards(void)
++{
++ UINT8 data;
++ SDIO_STATUS status;
++ int i;
++
++ data = SDIO_IO_RESET;
++
++ /* set the I/O CARD reset bit:
++ * NOTE: we are exploiting a "feature" of the SDIO core that resets the core when you
++ * set the RES bit in the SDIO_IO_ABORT register. This bit however "normally" resets the
++ * I/O functions leaving the SDIO core in the same state (as per SDIO spec).
++ * In this design, this reset can be used to reset the SDIO core itself */
++ for (i = 0; i < HIF_MAX_DEVICES; i++) {
++ if (hifDevice[i].handle != NULL) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
++ ("Issuing I/O Card reset for instance: %d \n",i));
++ /* set the I/O Card reset bit */
++ status = SDLIB_IssueCMD52(hifDevice[i].handle,
++ 0, /* function 0 space */
++ SDIO_IO_ABORT_REG,
++ &data,
++ 1, /* 1 byte */
++ TRUE); /* write */
++ }
++ }
++
++}
++
++void HIFSetHandle(void *hif_handle, void *handle)
++{
++ HIF_DEVICE *device = (HIF_DEVICE *) hif_handle;
++
++ device->htc_handle = handle;
++
++ return;
++}
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/hif/hif_internal.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/hif/hif_internal.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,102 @@
++/*
++ * @file: hif_internal.h
++ *
++ * @abstract: internal header file for hif layer
++ *
++ * @notice: Copyright (c) 2004-2006 Atheros Communications Inc.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include <linux/sdio/ctsystem.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/_sdio_defs.h>
++#include <linux/sdio/sdio_lib.h>
++#include "a_config.h"
++#include "athdefs.h"
++#include "a_types.h"
++#include "a_osapi.h"
++#include "hif.h"
++
++#define MANUFACTURER_ID_AR6001_BASE 0x100
++#define MANUFACTURER_ID_AR6002_BASE 0x200
++#define FUNCTION_CLASS 0x0
++#define MANUFACTURER_CODE 0x271
++
++#define BUS_REQUEST_MAX_NUM 64
++
++#define SDIO_CLOCK_FREQUENCY_DEFAULT 25000000
++#define SDWLAN_ENABLE_DISABLE_TIMEOUT 20
++#define FLAGS_CARD_ENAB 0x02
++#define FLAGS_CARD_IRQ_UNMSK 0x04
++
++#define HIF_MBOX_BLOCK_SIZE 128
++#define HIF_MBOX_BASE_ADDR 0x800
++#define HIF_MBOX_WIDTH 0x800
++#define HIF_MBOX0_BLOCK_SIZE 1
++#define HIF_MBOX1_BLOCK_SIZE HIF_MBOX_BLOCK_SIZE
++#define HIF_MBOX2_BLOCK_SIZE HIF_MBOX_BLOCK_SIZE
++#define HIF_MBOX3_BLOCK_SIZE HIF_MBOX_BLOCK_SIZE
++
++#define HIF_MBOX_START_ADDR(mbox) \
++ HIF_MBOX_BASE_ADDR + mbox * HIF_MBOX_WIDTH
++
++#define HIF_MBOX_END_ADDR(mbox) \
++ HIF_MBOX_START_ADDR(mbox) + HIF_MBOX_WIDTH - 1
++
++struct hif_device {
++ SDDEVICE *handle;
++ void *htc_handle;
++ OSKERNEL_HELPER insert_helper;
++ BOOL helper_started;
++};
++
++typedef struct target_function_context {
++ SDFUNCTION function; /* function description of the bus driver */
++ OS_SEMAPHORE instanceSem; /* instance lock. Unused */
++ SDLIST instanceList; /* list of instances. Unused */
++} TARGET_FUNCTION_CONTEXT;
++
++typedef struct bus_request {
++ struct bus_request *next;
++ SDREQUEST *request;
++ void *context;
++} BUS_REQUEST;
++
++BOOL
++hifDeviceInserted(SDFUNCTION *function, SDDEVICE *device);
++
++void
++hifDeviceRemoved(SDFUNCTION *function, SDDEVICE *device);
++
++SDREQUEST *
++hifAllocateDeviceRequest(SDDEVICE *device);
++
++void
++hifFreeDeviceRequest(SDREQUEST *request);
++
++void
++hifRWCompletionHandler(SDREQUEST *request);
++
++void
++hifIRQHandler(void *context);
++
++HIF_DEVICE *
++addHifDevice(SDDEVICE *handle);
++
++HIF_DEVICE *
++getHifDevice(SDDEVICE *handle);
++
++void
++delHifDevice(SDDEVICE *handle);
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/ar6k.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/ar6k.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,991 @@
++/*
++ * AR6K device layer that handles register level I/O
++ *
++ * Copyright (c) 2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++#include "a_config.h"
++#include "athdefs.h"
++#include "a_types.h"
++#include "AR6Khwreg.h"
++#include "a_osapi.h"
++#include "a_debug.h"
++#include "hif.h"
++#include "htc_packet.h"
++#include "ar6k.h"
++
++#define MAILBOX_FOR_BLOCK_SIZE 1
++
++extern A_UINT32 resetok;
++
++static A_STATUS DevEnableInterrupts(AR6K_DEVICE *pDev);
++static A_STATUS DevDisableInterrupts(AR6K_DEVICE *pDev);
++
++#define LOCK_AR6K(p) A_MUTEX_LOCK(&(p)->Lock);
++#define UNLOCK_AR6K(p) A_MUTEX_UNLOCK(&(p)->Lock);
++
++void AR6KFreeIOPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket)
++{
++ LOCK_AR6K(pDev);
++ HTC_PACKET_ENQUEUE(&pDev->RegisterIOList,pPacket);
++ UNLOCK_AR6K(pDev);
++}
++
++HTC_PACKET *AR6KAllocIOPacket(AR6K_DEVICE *pDev)
++{
++ HTC_PACKET *pPacket;
++
++ LOCK_AR6K(pDev);
++ pPacket = HTC_PACKET_DEQUEUE(&pDev->RegisterIOList);
++ UNLOCK_AR6K(pDev);
++
++ return pPacket;
++}
++
++A_STATUS DevSetup(AR6K_DEVICE *pDev)
++{
++ A_UINT32 mailboxaddrs[AR6K_MAILBOXES];
++ A_UINT32 blocksizes[AR6K_MAILBOXES];
++ A_STATUS status = A_OK;
++ int i;
++
++ AR_DEBUG_ASSERT(AR6K_IRQ_PROC_REGS_SIZE == 16);
++ AR_DEBUG_ASSERT(AR6K_IRQ_ENABLE_REGS_SIZE == 4);
++
++ do {
++ /* give a handle to HIF for this target */
++ HIFSetHandle(pDev->HIFDevice, (void *)pDev);
++ /* initialize our free list of IO packets */
++ INIT_HTC_PACKET_QUEUE(&pDev->RegisterIOList);
++ A_MUTEX_INIT(&pDev->Lock);
++
++ /* get the addresses for all 4 mailboxes */
++ status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_ADDR,
++ mailboxaddrs, sizeof(mailboxaddrs));
++
++ if (status != A_OK) {
++ AR_DEBUG_ASSERT(FALSE);
++ break;
++ }
++
++ /* carve up register I/O packets (these are for ASYNC register I/O ) */
++ for (i = 0; i < AR6K_MAX_REG_IO_BUFFERS; i++) {
++ HTC_PACKET *pIOPacket;
++ pIOPacket = &pDev->RegIOBuffers[i].HtcPacket;
++ SET_HTC_PACKET_INFO_RX_REFILL(pIOPacket,
++ pDev,
++ pDev->RegIOBuffers[i].Buffer,
++ AR6K_REG_IO_BUFFER_SIZE,
++ 0); /* don't care */
++ AR6KFreeIOPacket(pDev,pIOPacket);
++ }
++
++ /* get the address of the mailbox we are using */
++ pDev->MailboxAddress = mailboxaddrs[HTC_MAILBOX];
++
++ /* get the block sizes */
++ status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_BLOCK_SIZE,
++ blocksizes, sizeof(blocksizes));
++
++ if (status != A_OK) {
++ AR_DEBUG_ASSERT(FALSE);
++ break;
++ }
++
++ /* note: we actually get the block size of a mailbox other than 0, for SDIO the block
++ * size on mailbox 0 is artificially set to 1. So we use the block size that is set
++ * for the other 3 mailboxes */
++ pDev->BlockSize = blocksizes[MAILBOX_FOR_BLOCK_SIZE];
++ /* must be a power of 2 */
++ AR_DEBUG_ASSERT((pDev->BlockSize & (pDev->BlockSize - 1)) == 0);
++
++ /* assemble mask, used for padding to a block */
++ pDev->BlockMask = pDev->BlockSize - 1;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("BlockSize: %d, MailboxAddress:0x%X \n",
++ pDev->BlockSize, pDev->MailboxAddress));
++
++ pDev->GetPendingEventsFunc = NULL;
++ /* see if the HIF layer implements the get pending events function */
++ HIFConfigureDevice(pDev->HIFDevice,
++ HIF_DEVICE_GET_PENDING_EVENTS_FUNC,
++ &pDev->GetPendingEventsFunc,
++ sizeof(pDev->GetPendingEventsFunc));
++
++ /* assume we can process HIF interrupt events asynchronously */
++ pDev->HifIRQProcessingMode = HIF_DEVICE_IRQ_ASYNC_SYNC;
++
++ /* see if the HIF layer overrides this assumption */
++ HIFConfigureDevice(pDev->HIFDevice,
++ HIF_DEVICE_GET_IRQ_PROC_MODE,
++ &pDev->HifIRQProcessingMode,
++ sizeof(pDev->HifIRQProcessingMode));
++
++ switch (pDev->HifIRQProcessingMode) {
++ case HIF_DEVICE_IRQ_SYNC_ONLY:
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("HIF Interrupt processing is SYNC ONLY\n"));
++ break;
++ case HIF_DEVICE_IRQ_ASYNC_SYNC:
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("HIF Interrupt processing is ASYNC and SYNC\n"));
++ break;
++ default:
++ AR_DEBUG_ASSERT(FALSE);
++ }
++
++ pDev->HifMaskUmaskRecvEvent = NULL;
++
++ /* see if the HIF layer implements the mask/unmask recv events function */
++ HIFConfigureDevice(pDev->HIFDevice,
++ HIF_DEVICE_GET_RECV_EVENT_MASK_UNMASK_FUNC,
++ &pDev->HifMaskUmaskRecvEvent,
++ sizeof(pDev->HifMaskUmaskRecvEvent));
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("HIF special overrides : 0x%X , 0x%X\n",
++ (A_UINT32)pDev->GetPendingEventsFunc, (A_UINT32)pDev->HifMaskUmaskRecvEvent));
++
++ status = DevDisableInterrupts(pDev);
++
++ } while (FALSE);
++
++ if (A_FAILED(status)) {
++ /* make sure handle is cleared */
++ HIFSetHandle(pDev->HIFDevice, NULL);
++ }
++
++ return status;
++
++}
++
++static A_STATUS DevEnableInterrupts(AR6K_DEVICE *pDev)
++{
++ A_STATUS status;
++ AR6K_IRQ_ENABLE_REGISTERS regs;
++
++ LOCK_AR6K(pDev);
++
++ /* Enable all the interrupts except for the dragon interrupt */
++ pDev->IrqEnableRegisters.int_status_enable = INT_STATUS_ENABLE_ERROR_SET(0x01) |
++ INT_STATUS_ENABLE_CPU_SET(0x01) |
++ INT_STATUS_ENABLE_COUNTER_SET(0x01);
++
++ if (NULL == pDev->GetPendingEventsFunc) {
++ pDev->IrqEnableRegisters.int_status_enable |= INT_STATUS_ENABLE_MBOX_DATA_SET(0x01);
++ } else {
++ /* The HIF layer provided us with a pending events function which means that
++ * the detection of pending mbox messages is handled in the HIF layer.
++ * This is the case for the SPI2 interface.
++ * In the normal case we enable MBOX interrupts, for the case
++ * with HIFs that offer this mechanism, we keep these interrupts
++ * masked */
++ pDev->IrqEnableRegisters.int_status_enable &= ~INT_STATUS_ENABLE_MBOX_DATA_SET(0x01);
++ }
++
++
++ /* Set up the CPU Interrupt Status Register */
++ pDev->IrqEnableRegisters.cpu_int_status_enable = CPU_INT_STATUS_ENABLE_BIT_SET(0x00);
++
++ /* Set up the Error Interrupt Status Register */
++ pDev->IrqEnableRegisters.error_status_enable =
++ ERROR_STATUS_ENABLE_RX_UNDERFLOW_SET(0x01) |
++ ERROR_STATUS_ENABLE_TX_OVERFLOW_SET(0x01);
++
++ /* Set up the Counter Interrupt Status Register (only for debug interrupt to catch fatal errors) */
++ pDev->IrqEnableRegisters.counter_int_status_enable =
++ COUNTER_INT_STATUS_ENABLE_BIT_SET(AR6K_TARGET_DEBUG_INTR_MASK);
++
++ /* copy into our temp area */
++ A_MEMCPY(®s,&pDev->IrqEnableRegisters,AR6K_IRQ_ENABLE_REGS_SIZE);
++
++ UNLOCK_AR6K(pDev);
++
++ /* always synchronous */
++ status = HIFReadWrite(pDev->HIFDevice,
++ INT_STATUS_ENABLE_ADDRESS,
++ ®s.int_status_enable,
++ AR6K_IRQ_ENABLE_REGS_SIZE,
++ HIF_WR_SYNC_BYTE_INC,
++ NULL);
++
++ if (status != A_OK) {
++ /* Can't write it for some reason */
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ ("Failed to update interrupt control registers err: %d\n", status));
++
++ }
++
++ return status;
++}
++
++static A_STATUS DevDisableInterrupts(AR6K_DEVICE *pDev)
++{
++ AR6K_IRQ_ENABLE_REGISTERS regs;
++
++ LOCK_AR6K(pDev);
++ /* Disable all interrupts */
++ pDev->IrqEnableRegisters.int_status_enable = 0;
++ pDev->IrqEnableRegisters.cpu_int_status_enable = 0;
++ pDev->IrqEnableRegisters.error_status_enable = 0;
++ pDev->IrqEnableRegisters.counter_int_status_enable = 0;
++ /* copy into our temp area */
++ A_MEMCPY(®s,&pDev->IrqEnableRegisters,AR6K_IRQ_ENABLE_REGS_SIZE);
++
++ UNLOCK_AR6K(pDev);
++
++ /* always synchronous */
++ return HIFReadWrite(pDev->HIFDevice,
++ INT_STATUS_ENABLE_ADDRESS,
++ ®s.int_status_enable,
++ AR6K_IRQ_ENABLE_REGS_SIZE,
++ HIF_WR_SYNC_BYTE_INC,
++ NULL);
++}
++
++/* enable device interrupts */
++A_STATUS DevUnmaskInterrupts(AR6K_DEVICE *pDev)
++{
++ /* Unmask the host controller interrupts */
++ HIFUnMaskInterrupt(pDev->HIFDevice);
++
++ return DevEnableInterrupts(pDev);
++}
++
++/* disable all device interrupts */
++A_STATUS DevMaskInterrupts(AR6K_DEVICE *pDev)
++{
++ A_STATUS status;
++
++ status = DevDisableInterrupts(pDev);
++
++ if (A_SUCCESS(status)) {
++ /* Disable the interrupt at the HIF layer */
++ HIFMaskInterrupt(pDev->HIFDevice);
++ }
++
++ return status;
++}
++
++/* callback when our fetch to enable/disable completes */
++static void DevDoEnableDisableRecvAsyncHandler(void *Context, HTC_PACKET *pPacket)
++{
++ AR6K_DEVICE *pDev = (AR6K_DEVICE *)Context;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevDoEnableDisableRecvAsyncHandler: (dev: 0x%X)\n", (A_UINT32)pDev));
++
++ if (A_FAILED(pPacket->Status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ (" Failed to disable receiver, status:%d \n", pPacket->Status));
++ }
++ /* free this IO packet */
++ AR6KFreeIOPacket(pDev,pPacket);
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevDoEnableDisableRecvAsyncHandler \n"));
++}
++
++/* disable packet reception (used in case the host runs out of buffers)
++ * this is the "override" method when the HIF reports another methods to
++ * disable recv events */
++static A_STATUS DevDoEnableDisableRecvOverride(AR6K_DEVICE *pDev, A_BOOL EnableRecv, A_BOOL AsyncMode)
++{
++ A_STATUS status = A_OK;
++ HTC_PACKET *pIOPacket = NULL;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("DevDoEnableDisableRecvOverride: Enable:%d Mode:%d\n",
++ EnableRecv,AsyncMode));
++
++ do {
++
++ if (AsyncMode) {
++
++ pIOPacket = AR6KAllocIOPacket(pDev);
++
++ if (NULL == pIOPacket) {
++ status = A_NO_MEMORY;
++ AR_DEBUG_ASSERT(FALSE);
++ break;
++ }
++
++ /* stick in our completion routine when the I/O operation completes */
++ pIOPacket->Completion = DevDoEnableDisableRecvAsyncHandler;
++ pIOPacket->pContext = pDev;
++
++ /* call the HIF layer override and do this asynchronously */
++ status = pDev->HifMaskUmaskRecvEvent(pDev->HIFDevice,
++ EnableRecv ? HIF_UNMASK_RECV : HIF_MASK_RECV,
++ pIOPacket);
++ break;
++ }
++
++ /* if we get here we are doing it synchronously */
++ status = pDev->HifMaskUmaskRecvEvent(pDev->HIFDevice,
++ EnableRecv ? HIF_UNMASK_RECV : HIF_MASK_RECV,
++ NULL);
++
++ } while (FALSE);
++
++ if (A_FAILED(status) && (pIOPacket != NULL)) {
++ AR6KFreeIOPacket(pDev,pIOPacket);
++ }
++
++ return status;
++}
++
++/* disable packet reception (used in case the host runs out of buffers)
++ * this is the "normal" method using the interrupt enable registers through
++ * the host I/F */
++static A_STATUS DevDoEnableDisableRecvNormal(AR6K_DEVICE *pDev, A_BOOL EnableRecv, A_BOOL AsyncMode)
++{
++ A_STATUS status = A_OK;
++ HTC_PACKET *pIOPacket = NULL;
++ AR6K_IRQ_ENABLE_REGISTERS regs;
++
++ /* take the lock to protect interrupt enable shadows */
++ LOCK_AR6K(pDev);
++
++ if (EnableRecv) {
++ pDev->IrqEnableRegisters.int_status_enable |= INT_STATUS_ENABLE_MBOX_DATA_SET(0x01);
++ } else {
++ pDev->IrqEnableRegisters.int_status_enable &= ~INT_STATUS_ENABLE_MBOX_DATA_SET(0x01);
++ }
++
++ /* copy into our temp area */
++ A_MEMCPY(®s,&pDev->IrqEnableRegisters,AR6K_IRQ_ENABLE_REGS_SIZE);
++ UNLOCK_AR6K(pDev);
++
++ do {
++
++ if (AsyncMode) {
++
++ pIOPacket = AR6KAllocIOPacket(pDev);
++
++ if (NULL == pIOPacket) {
++ status = A_NO_MEMORY;
++ AR_DEBUG_ASSERT(FALSE);
++ break;
++ }
++
++ /* copy values to write to our async I/O buffer */
++ A_MEMCPY(pIOPacket->pBuffer,®s,AR6K_IRQ_ENABLE_REGS_SIZE);
++
++ /* stick in our completion routine when the I/O operation completes */
++ pIOPacket->Completion = DevDoEnableDisableRecvAsyncHandler;
++ pIOPacket->pContext = pDev;
++
++ /* write it out asynchronously */
++ HIFReadWrite(pDev->HIFDevice,
++ INT_STATUS_ENABLE_ADDRESS,
++ pIOPacket->pBuffer,
++ AR6K_IRQ_ENABLE_REGS_SIZE,
++ HIF_WR_ASYNC_BYTE_INC,
++ pIOPacket);
++ break;
++ }
++
++ /* if we get here we are doing it synchronously */
++
++ status = HIFReadWrite(pDev->HIFDevice,
++ INT_STATUS_ENABLE_ADDRESS,
++ ®s.int_status_enable,
++ AR6K_IRQ_ENABLE_REGS_SIZE,
++ HIF_WR_SYNC_BYTE_INC,
++ NULL);
++
++ } while (FALSE);
++
++ if (A_FAILED(status) && (pIOPacket != NULL)) {
++ AR6KFreeIOPacket(pDev,pIOPacket);
++ }
++
++ return status;
++}
++
++
++A_STATUS DevStopRecv(AR6K_DEVICE *pDev, A_BOOL AsyncMode)
++{
++ if (NULL == pDev->HifMaskUmaskRecvEvent) {
++ return DevDoEnableDisableRecvNormal(pDev,FALSE,AsyncMode);
++ } else {
++ return DevDoEnableDisableRecvOverride(pDev,FALSE,AsyncMode);
++ }
++}
++
++A_STATUS DevEnableRecv(AR6K_DEVICE *pDev, A_BOOL AsyncMode)
++{
++ if (NULL == pDev->HifMaskUmaskRecvEvent) {
++ return DevDoEnableDisableRecvNormal(pDev,TRUE,AsyncMode);
++ } else {
++ return DevDoEnableDisableRecvOverride(pDev,TRUE,AsyncMode);
++ }
++}
++
++void DevDumpRegisters(AR6K_IRQ_PROC_REGISTERS *pIrqProcRegs,
++ AR6K_IRQ_ENABLE_REGISTERS *pIrqEnableRegs)
++{
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ("\n<------- Register Table -------->\n"));
++
++ if (pIrqProcRegs != NULL) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
++ ("Int Status: 0x%x\n",pIrqProcRegs->host_int_status));
++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
++ ("CPU Int Status: 0x%x\n",pIrqProcRegs->cpu_int_status));
++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
++ ("Error Int Status: 0x%x\n",pIrqProcRegs->error_int_status));
++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
++ ("Counter Int Status: 0x%x\n",pIrqProcRegs->counter_int_status));
++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
++ ("Mbox Frame: 0x%x\n",pIrqProcRegs->mbox_frame));
++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
++ ("Rx Lookahead Valid: 0x%x\n",pIrqProcRegs->rx_lookahead_valid));
++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
++ ("Rx Lookahead 0: 0x%x\n",pIrqProcRegs->rx_lookahead[0]));
++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
++ ("Rx Lookahead 1: 0x%x\n",pIrqProcRegs->rx_lookahead[1]));
++ }
++
++ if (pIrqEnableRegs != NULL) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
++ ("Int Status Enable: 0x%x\n",pIrqEnableRegs->int_status_enable));
++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
++ ("Counter Int Status Enable: 0x%x\n",pIrqEnableRegs->counter_int_status_enable));
++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ("<------------------------------->\n"));
++ }
++}
++
++
++#ifdef MBOXHW_UNIT_TEST
++
++
++/* This is a mailbox hardware unit test that must be called in a schedulable context
++ * This test is very simple, it will send a list of buffers with a counting pattern
++ * and the target will invert the data and send the message back
++ *
++ * the unit test has the following constraints:
++ *
++ * The target has at least 8 buffers of 256 bytes each. The host will send
++ * the following pattern of buffers in rapid succession :
++ *
++ * 1 buffer - 128 bytes
++ * 1 buffer - 256 bytes
++ * 1 buffer - 512 bytes
++ * 1 buffer - 1024 bytes
++ *
++ * The host will send the buffers to one mailbox and wait for buffers to be reflected
++ * back from the same mailbox. The target sends the buffers FIFO order.
++ * Once the final buffer has been received for a mailbox, the next mailbox is tested.
++ *
++ *
++ * Note: To simplifythe test , we assume that the chosen buffer sizes
++ * will fall on a nice block pad
++ *
++ * It is expected that higher-order tests will be written to stress the mailboxes using
++ * a message-based protocol (with some performance timming) that can create more
++ * randomness in the packets sent over mailboxes.
++ *
++ * */
++
++#define A_ROUND_UP_PWR2(x, align) (((int) (x) + ((align)-1)) & ~((align)-1))
++
++#define BUFFER_BLOCK_PAD 128
++
++#if 0
++#define BUFFER1 128
++#define BUFFER2 256
++#define BUFFER3 512
++#define BUFFER4 1024
++#endif
++
++#if 1
++#define BUFFER1 80
++#define BUFFER2 200
++#define BUFFER3 444
++#define BUFFER4 800
++#endif
++
++#define TOTAL_BYTES (A_ROUND_UP_PWR2(BUFFER1,BUFFER_BLOCK_PAD) + \
++ A_ROUND_UP_PWR2(BUFFER2,BUFFER_BLOCK_PAD) + \
++ A_ROUND_UP_PWR2(BUFFER3,BUFFER_BLOCK_PAD) + \
++ A_ROUND_UP_PWR2(BUFFER4,BUFFER_BLOCK_PAD) )
++
++#define TEST_BYTES (BUFFER1 + BUFFER2 + BUFFER3 + BUFFER4)
++
++#define TEST_CREDITS_RECV_TIMEOUT 100
++
++static A_UINT8 g_Buffer[TOTAL_BYTES];
++static A_UINT32 g_MailboxAddrs[AR6K_MAILBOXES];
++static A_UINT32 g_BlockSizes[AR6K_MAILBOXES];
++
++#define BUFFER_PROC_LIST_DEPTH 4
++
++typedef struct _BUFFER_PROC_LIST{
++ A_UINT8 *pBuffer;
++ A_UINT32 length;
++}BUFFER_PROC_LIST;
++
++
++#define PUSH_BUFF_PROC_ENTRY(pList,len,pCurrpos) \
++{ \
++ (pList)->pBuffer = (pCurrpos); \
++ (pList)->length = (len); \
++ (pCurrpos) += (len); \
++ (pList)++; \
++}
++
++/* a simple and crude way to send different "message" sizes */
++static void AssembleBufferList(BUFFER_PROC_LIST *pList)
++{
++ A_UINT8 *pBuffer = g_Buffer;
++
++#if BUFFER_PROC_LIST_DEPTH < 4
++#error "Buffer processing list depth is not deep enough!!"
++#endif
++
++ PUSH_BUFF_PROC_ENTRY(pList,BUFFER1,pBuffer);
++ PUSH_BUFF_PROC_ENTRY(pList,BUFFER2,pBuffer);
++ PUSH_BUFF_PROC_ENTRY(pList,BUFFER3,pBuffer);
++ PUSH_BUFF_PROC_ENTRY(pList,BUFFER4,pBuffer);
++
++}
++
++#define FILL_ZERO TRUE
++#define FILL_COUNTING FALSE
++static void InitBuffers(A_BOOL Zero)
++{
++ A_UINT16 *pBuffer16 = (A_UINT16 *)g_Buffer;
++ int i;
++
++ /* fill buffer with 16 bit counting pattern or zeros */
++ for (i = 0; i < (TOTAL_BYTES / 2) ; i++) {
++ if (!Zero) {
++ pBuffer16[i] = (A_UINT16)i;
++ } else {
++ pBuffer16[i] = 0;
++ }
++ }
++}
++
++
++static A_BOOL CheckOneBuffer(A_UINT16 *pBuffer16, int Length)
++{
++ int i;
++ A_UINT16 startCount;
++ A_BOOL success = TRUE;
++
++ /* get the starting count */
++ startCount = pBuffer16[0];
++ /* invert it, this is the expected value */
++ startCount = ~startCount;
++ /* scan the buffer and verify */
++ for (i = 0; i < (Length / 2) ; i++,startCount++) {
++ /* target will invert all the data */
++ if ((A_UINT16)pBuffer16[i] != (A_UINT16)~startCount) {
++ success = FALSE;
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Invalid Data Got:0x%X, Expecting:0x%X (offset:%d, total:%d) \n",
++ pBuffer16[i], ((A_UINT16)~startCount), i, Length));
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("0x%X 0x%X 0x%X 0x%X \n",
++ pBuffer16[i], pBuffer16[i + 1], pBuffer16[i + 2],pBuffer16[i+3]));
++ break;
++ }
++ }
++
++ return success;
++}
++
++static A_BOOL CheckBuffers(void)
++{
++ int i;
++ A_BOOL success = TRUE;
++ BUFFER_PROC_LIST checkList[BUFFER_PROC_LIST_DEPTH];
++
++ /* assemble the list */
++ AssembleBufferList(checkList);
++
++ /* scan the buffers and verify */
++ for (i = 0; i < BUFFER_PROC_LIST_DEPTH ; i++) {
++ success = CheckOneBuffer((A_UINT16 *)checkList[i].pBuffer, checkList[i].length);
++ if (!success) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Buffer : 0x%X, Length:%d failed verify \n",
++ (A_UINT32)checkList[i].pBuffer, checkList[i].length));
++ break;
++ }
++ }
++
++ return success;
++}
++
++ /* find the end marker for the last buffer we will be sending */
++static A_UINT16 GetEndMarker(void)
++{
++ A_UINT8 *pBuffer;
++ BUFFER_PROC_LIST checkList[BUFFER_PROC_LIST_DEPTH];
++
++ /* fill up buffers with the normal counting pattern */
++ InitBuffers(FILL_COUNTING);
++
++ /* assemble the list we will be sending down */
++ AssembleBufferList(checkList);
++ /* point to the last 2 bytes of the last buffer */
++ pBuffer = &(checkList[BUFFER_PROC_LIST_DEPTH - 1].pBuffer[(checkList[BUFFER_PROC_LIST_DEPTH - 1].length) - 2]);
++
++ /* the last count in the last buffer is the marker */
++ return (A_UINT16)pBuffer[0] | ((A_UINT16)pBuffer[1] << 8);
++}
++
++#define ATH_PRINT_OUT_ZONE ATH_DEBUG_ERR
++
++/* send the ordered buffers to the target */
++static A_STATUS SendBuffers(AR6K_DEVICE *pDev, int mbox)
++{
++ A_STATUS status = A_OK;
++ A_UINT32 request = HIF_WR_SYNC_BLOCK_INC;
++ BUFFER_PROC_LIST sendList[BUFFER_PROC_LIST_DEPTH];
++ int i;
++ int totalBytes = 0;
++ int paddedLength;
++ int totalwPadding = 0;
++
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Sending buffers on mailbox : %d \n",mbox));
++
++ /* fill buffer with counting pattern */
++ InitBuffers(FILL_COUNTING);
++
++ /* assemble the order in which we send */
++ AssembleBufferList(sendList);
++
++ for (i = 0; i < BUFFER_PROC_LIST_DEPTH; i++) {
++
++ /* we are doing block transfers, so we need to pad everything to a block size */
++ paddedLength = (sendList[i].length + (g_BlockSizes[mbox] - 1)) &
++ (~(g_BlockSizes[mbox] - 1));
++
++ /* send each buffer synchronously */
++ status = HIFReadWrite(pDev->HIFDevice,
++ g_MailboxAddrs[mbox],
++ sendList[i].pBuffer,
++ paddedLength,
++ request,
++ NULL);
++ if (status != A_OK) {
++ break;
++ }
++ totalBytes += sendList[i].length;
++ totalwPadding += paddedLength;
++ }
++
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Sent %d bytes (%d padded bytes) to mailbox : %d \n",totalBytes,totalwPadding,mbox));
++
++ return status;
++}
++
++/* poll the mailbox credit counter until we get a credit or timeout */
++static A_STATUS GetCredits(AR6K_DEVICE *pDev, int mbox, int *pCredits)
++{
++ A_STATUS status = A_OK;
++ int timeout = TEST_CREDITS_RECV_TIMEOUT;
++ A_UINT8 credits = 0;
++ A_UINT32 address;
++
++ while (TRUE) {
++
++ /* Read the counter register to get credits, this auto-decrements */
++ address = COUNT_DEC_ADDRESS + (AR6K_MAILBOXES + mbox) * 4;
++ status = HIFReadWrite(pDev->HIFDevice, address, &credits, sizeof(credits),
++ HIF_RD_SYNC_BYTE_FIX, NULL);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ ("Unable to decrement the command credit count register (mbox=%d)\n",mbox));
++ status = A_ERROR;
++ break;
++ }
++
++ if (credits) {
++ break;
++ }
++
++ timeout--;
++
++ if (timeout <= 0) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ (" Timeout reading credit registers (mbox=%d, address:0x%X) \n",mbox,address));
++ status = A_ERROR;
++ break;
++ }
++
++ /* delay a little, target may not be ready */
++ A_MDELAY(1000);
++
++ }
++
++ if (status == A_OK) {
++ *pCredits = credits;
++ }
++
++ return status;
++}
++
++
++/* wait for the buffers to come back */
++static A_STATUS RecvBuffers(AR6K_DEVICE *pDev, int mbox)
++{
++ A_STATUS status = A_OK;
++ A_UINT32 request = HIF_RD_SYNC_BLOCK_INC;
++ BUFFER_PROC_LIST recvList[BUFFER_PROC_LIST_DEPTH];
++ int curBuffer;
++ int credits;
++ int i;
++ int totalBytes = 0;
++ int paddedLength;
++ int totalwPadding = 0;
++
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Waiting for buffers on mailbox : %d \n",mbox));
++
++ /* zero the buffers */
++ InitBuffers(FILL_ZERO);
++
++ /* assemble the order in which we should receive */
++ AssembleBufferList(recvList);
++
++ curBuffer = 0;
++
++ while (curBuffer < BUFFER_PROC_LIST_DEPTH) {
++
++ /* get number of buffers that have been completed, this blocks
++ * until we get at least 1 credit or it times out */
++ status = GetCredits(pDev, mbox, &credits);
++
++ if (status != A_OK) {
++ break;
++ }
++
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Got %d messages on mailbox : %d \n",credits, mbox));
++
++ /* get all the buffers that are sitting on the queue */
++ for (i = 0; i < credits; i++) {
++ AR_DEBUG_ASSERT(curBuffer < BUFFER_PROC_LIST_DEPTH);
++ /* recv the current buffer synchronously, the buffers should come back in
++ * order... with padding applied by the target */
++ paddedLength = (recvList[curBuffer].length + (g_BlockSizes[mbox] - 1)) &
++ (~(g_BlockSizes[mbox] - 1));
++
++ status = HIFReadWrite(pDev->HIFDevice,
++ g_MailboxAddrs[mbox],
++ recvList[curBuffer].pBuffer,
++ paddedLength,
++ request,
++ NULL);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to read %d bytes on mailbox:%d : address:0x%X \n",
++ recvList[curBuffer].length, mbox, g_MailboxAddrs[mbox]));
++ break;
++ }
++
++ totalwPadding += paddedLength;
++ totalBytes += recvList[curBuffer].length;
++ curBuffer++;
++ }
++
++ if (status != A_OK) {
++ break;
++ }
++ /* go back and get some more */
++ credits = 0;
++ }
++
++ if (totalBytes != TEST_BYTES) {
++ AR_DEBUG_ASSERT(FALSE);
++ } else {
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Got all buffers on mbox:%d total recv :%d (w/Padding : %d) \n",
++ mbox, totalBytes, totalwPadding));
++ }
++
++ return status;
++
++
++}
++
++static A_STATUS DoOneMboxHWTest(AR6K_DEVICE *pDev, int mbox)
++{
++ A_STATUS status;
++
++ do {
++ /* send out buffers */
++ status = SendBuffers(pDev,mbox);
++
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Sending buffers Failed : %d mbox:%d\n",status,mbox));
++ break;
++ }
++
++ /* go get them, this will block */
++ status = RecvBuffers(pDev, mbox);
++
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Recv buffers Failed : %d mbox:%d\n",status,mbox));
++ break;
++ }
++
++ /* check the returned data patterns */
++ if (!CheckBuffers()) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Buffer Verify Failed : mbox:%d\n",mbox));
++ status = A_ERROR;
++ break;
++ }
++
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" Send/Recv success! mailbox : %d \n",mbox));
++
++ } while (FALSE);
++
++ return status;
++}
++
++/* here is where the test starts */
++A_STATUS DoMboxHWTest(AR6K_DEVICE *pDev)
++{
++ int i;
++ A_STATUS status;
++ int credits = 0;
++ A_UINT8 params[4];
++ int numBufs;
++ int bufferSize;
++ A_UINT16 temp;
++
++
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" DoMboxHWTest START - \n"));
++
++ do {
++ /* get the addresses for all 4 mailboxes */
++ status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_ADDR,
++ g_MailboxAddrs, sizeof(g_MailboxAddrs));
++
++ if (status != A_OK) {
++ AR_DEBUG_ASSERT(FALSE);
++ break;
++ }
++
++ /* get the block sizes */
++ status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_BLOCK_SIZE,
++ g_BlockSizes, sizeof(g_BlockSizes));
++
++ if (status != A_OK) {
++ AR_DEBUG_ASSERT(FALSE);
++ break;
++ }
++
++ /* note, the HIF layer usually reports mbox 0 to have a block size of
++ * 1, but our test wants to run in block-mode for all mailboxes, so we treat all mailboxes
++ * the same. */
++ g_BlockSizes[0] = g_BlockSizes[1];
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Block Size to use: %d \n",g_BlockSizes[0]));
++
++ if (g_BlockSizes[1] > BUFFER_BLOCK_PAD) {
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("%d Block size is too large for buffer pad %d\n",
++ g_BlockSizes[1], BUFFER_BLOCK_PAD));
++ break;
++ }
++
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Waiting for target.... \n"));
++
++ /* the target lets us know it is ready by giving us 1 credit on
++ * mailbox 0 */
++ status = GetCredits(pDev, 0, &credits);
++
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to wait for target ready \n"));
++ break;
++ }
++
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Target is ready ...\n"));
++
++ /* read the first 4 scratch registers */
++ status = HIFReadWrite(pDev->HIFDevice,
++ SCRATCH_ADDRESS,
++ params,
++ 4,
++ HIF_RD_SYNC_BYTE_INC,
++ NULL);
++
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to wait get parameters \n"));
++ break;
++ }
++
++ numBufs = params[0];
++ bufferSize = (int)(((A_UINT16)params[2] << 8) | (A_UINT16)params[1]);
++
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE,
++ ("Target parameters: bufs per mailbox:%d, buffer size:%d bytes (total space: %d, minimum required space (w/padding): %d) \n",
++ numBufs, bufferSize, (numBufs * bufferSize), TOTAL_BYTES));
++
++ if ((numBufs * bufferSize) < TOTAL_BYTES) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Not Enough buffer space to run test! need:%d, got:%d \n",
++ TOTAL_BYTES, (numBufs*bufferSize)));
++ status = A_ERROR;
++ break;
++ }
++
++ temp = GetEndMarker();
++
++ status = HIFReadWrite(pDev->HIFDevice,
++ SCRATCH_ADDRESS + 4,
++ (A_UINT8 *)&temp,
++ 2,
++ HIF_WR_SYNC_BYTE_INC,
++ NULL);
++
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to write end marker \n"));
++ break;
++ }
++
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("End Marker: 0x%X \n",temp));
++
++ temp = (A_UINT16)g_BlockSizes[1];
++ /* convert to a mask */
++ temp = temp - 1;
++ status = HIFReadWrite(pDev->HIFDevice,
++ SCRATCH_ADDRESS + 6,
++ (A_UINT8 *)&temp,
++ 2,
++ HIF_WR_SYNC_BYTE_INC,
++ NULL);
++
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to write block mask \n"));
++ break;
++ }
++
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Set Block Mask: 0x%X \n",temp));
++
++ /* execute the test on each mailbox */
++ for (i = 0; i < AR6K_MAILBOXES; i++) {
++ status = DoOneMboxHWTest(pDev, i);
++ if (status != A_OK) {
++ break;
++ }
++ }
++
++ } while (FALSE);
++
++ if (status == A_OK) {
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" DoMboxHWTest DONE - SUCCESS! - \n"));
++ } else {
++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" DoMboxHWTest DONE - FAILED! - \n"));
++ }
++ /* don't let HTC_Start continue, the target is actually not running any HTC code */
++ return A_ERROR;
++}
++#endif
++
++
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/ar6k_events.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/ar6k_events.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,638 @@
++/*
++ * AR6K Driver layer event handling (i.e. interrupts, message polling)
++ *
++ * Copyright (c) 2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++#include "a_config.h"
++#include "athdefs.h"
++#include "a_types.h"
++#include "AR6Khwreg.h"
++#include "a_osapi.h"
++#include "a_debug.h"
++#include "hif.h"
++#include "htc_packet.h"
++#include "ar6k.h"
++
++extern void AR6KFreeIOPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket);
++extern HTC_PACKET *AR6KAllocIOPacket(AR6K_DEVICE *pDev);
++
++static A_STATUS DevServiceDebugInterrupt(AR6K_DEVICE *pDev);
++
++#define DELAY_PER_INTERVAL_MS 10 /* 10 MS delay per polling interval */
++
++/* completion routine for ALL HIF layer async I/O */
++A_STATUS DevRWCompletionHandler(void *context, A_STATUS status)
++{
++ HTC_PACKET *pPacket = (HTC_PACKET *)context;
++
++ COMPLETE_HTC_PACKET(pPacket,status);
++
++ return A_OK;
++}
++
++/* mailbox recv message polling */
++A_STATUS DevPollMboxMsgRecv(AR6K_DEVICE *pDev,
++ A_UINT32 *pLookAhead,
++ int TimeoutMS)
++{
++ A_STATUS status = A_OK;
++ int timeout = TimeoutMS/DELAY_PER_INTERVAL_MS;
++
++ AR_DEBUG_ASSERT(timeout > 0);
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("+DevPollMboxMsgRecv \n"));
++
++ while (TRUE) {
++
++ if (pDev->GetPendingEventsFunc != NULL)
++ {
++
++ HIF_PENDING_EVENTS_INFO events;
++
++ /* the HIF layer uses a special mechanism to get events, do this
++ * synchronously */
++ status = pDev->GetPendingEventsFunc(pDev->HIFDevice,
++ &events,
++ NULL);
++ if (A_FAILED(status))
++ {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Failed to get pending events \n"));
++ break;
++ }
++
++ if (events.Events & HIF_RECV_MSG_AVAIL)
++ {
++ /* there is a message available, the lookahead should be valid now */
++ *pLookAhead = events.LookAhead;
++
++ break;
++ }
++ }
++ else
++ {
++
++ /* this is the standard HIF way.... */
++ /* load the register table */
++ status = HIFReadWrite(pDev->HIFDevice,
++ HOST_INT_STATUS_ADDRESS,
++ (A_UINT8 *)&pDev->IrqProcRegisters,
++ AR6K_IRQ_PROC_REGS_SIZE,
++ HIF_RD_SYNC_BYTE_INC,
++ NULL);
++
++ if (A_FAILED(status))
++ {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Failed to read register table \n"));
++ break;
++ }
++
++ /* check for MBOX data and valid lookahead */
++ if (pDev->IrqProcRegisters.host_int_status & (1 << HTC_MAILBOX))
++ {
++ if (pDev->IrqProcRegisters.rx_lookahead_valid & (1 << HTC_MAILBOX))
++ {
++ /* mailbox has a message and the look ahead is valid */
++ *pLookAhead = pDev->IrqProcRegisters.rx_lookahead[HTC_MAILBOX];
++ break;
++ }
++ }
++
++ }
++
++ timeout--;
++
++ if (timeout <= 0)
++ {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, (" Timeout waiting for recv message \n"));
++ status = A_ERROR;
++
++ /* check if the target asserted */
++ if ( pDev->IrqProcRegisters.counter_int_status & AR6K_TARGET_DEBUG_INTR_MASK) {
++ /* target signaled an assert, process this pending interrupt
++ * this will call the target failure handler */
++ DevServiceDebugInterrupt(pDev);
++ }
++
++ break;
++ }
++
++ /* delay a little */
++ A_MDELAY(DELAY_PER_INTERVAL_MS);
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,(" Retry Mbox Poll : %d \n",timeout));
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("-DevPollMboxMsgRecv \n"));
++
++ return status;
++}
++
++static A_STATUS DevServiceCPUInterrupt(AR6K_DEVICE *pDev)
++{
++ A_STATUS status;
++ A_UINT8 cpu_int_status;
++ A_UINT8 regBuffer[4];
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("CPU Interrupt\n"));
++ cpu_int_status = pDev->IrqProcRegisters.cpu_int_status &
++ pDev->IrqEnableRegisters.cpu_int_status_enable;
++ AR_DEBUG_ASSERT(cpu_int_status);
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
++ ("Valid interrupt source(s) in CPU_INT_STATUS: 0x%x\n",
++ cpu_int_status));
++
++ /* Clear the interrupt */
++ pDev->IrqProcRegisters.cpu_int_status &= ~cpu_int_status; /* W1C */
++
++ /* set up the register transfer buffer to hit the register 4 times , this is done
++ * to make the access 4-byte aligned to mitigate issues with host bus interconnects that
++ * restrict bus transfer lengths to be a multiple of 4-bytes */
++
++ /* set W1C value to clear the interrupt, this hits the register first */
++ regBuffer[0] = cpu_int_status;
++ /* the remaining 4 values are set to zero which have no-effect */
++ regBuffer[1] = 0;
++ regBuffer[2] = 0;
++ regBuffer[3] = 0;
++
++ status = HIFReadWrite(pDev->HIFDevice,
++ CPU_INT_STATUS_ADDRESS,
++ regBuffer,
++ 4,
++ HIF_WR_SYNC_BYTE_FIX,
++ NULL);
++
++ AR_DEBUG_ASSERT(status == A_OK);
++ return status;
++}
++
++
++static A_STATUS DevServiceErrorInterrupt(AR6K_DEVICE *pDev)
++{
++ A_STATUS status;
++ A_UINT8 error_int_status;
++ A_UINT8 regBuffer[4];
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("Error Interrupt\n"));
++ error_int_status = pDev->IrqProcRegisters.error_int_status & 0x0F;
++ AR_DEBUG_ASSERT(error_int_status);
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
++ ("Valid interrupt source(s) in ERROR_INT_STATUS: 0x%x\n",
++ error_int_status));
++
++ if (ERROR_INT_STATUS_WAKEUP_GET(error_int_status)) {
++ /* Wakeup */
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("Error : Wakeup\n"));
++ }
++
++ if (ERROR_INT_STATUS_RX_UNDERFLOW_GET(error_int_status)) {
++ /* Rx Underflow */
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Error : Rx Underflow\n"));
++ }
++
++ if (ERROR_INT_STATUS_TX_OVERFLOW_GET(error_int_status)) {
++ /* Tx Overflow */
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Error : Tx Overflow\n"));
++ }
++
++ /* Clear the interrupt */
++ pDev->IrqProcRegisters.error_int_status &= ~error_int_status; /* W1C */
++
++ /* set up the register transfer buffer to hit the register 4 times , this is done
++ * to make the access 4-byte aligned to mitigate issues with host bus interconnects that
++ * restrict bus transfer lengths to be a multiple of 4-bytes */
++
++ /* set W1C value to clear the interrupt, this hits the register first */
++ regBuffer[0] = error_int_status;
++ /* the remaining 4 values are set to zero which have no-effect */
++ regBuffer[1] = 0;
++ regBuffer[2] = 0;
++ regBuffer[3] = 0;
++
++ status = HIFReadWrite(pDev->HIFDevice,
++ ERROR_INT_STATUS_ADDRESS,
++ regBuffer,
++ 4,
++ HIF_WR_SYNC_BYTE_FIX,
++ NULL);
++
++ AR_DEBUG_ASSERT(status == A_OK);
++ return status;
++}
++
++static A_STATUS DevServiceDebugInterrupt(AR6K_DEVICE *pDev)
++{
++ A_UINT32 dummy;
++ A_STATUS status;
++
++ /* Send a target failure event to the application */
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Target debug interrupt\n"));
++
++ if (pDev->TargetFailureCallback != NULL) {
++ pDev->TargetFailureCallback(pDev->HTCContext);
++ }
++
++ /* clear the interrupt , the debug error interrupt is
++ * counter 0 */
++ /* read counter to clear interrupt */
++ status = HIFReadWrite(pDev->HIFDevice,
++ COUNT_DEC_ADDRESS,
++ (A_UINT8 *)&dummy,
++ 4,
++ HIF_RD_SYNC_BYTE_INC,
++ NULL);
++
++ AR_DEBUG_ASSERT(status == A_OK);
++ return status;
++}
++
++static A_STATUS DevServiceCounterInterrupt(AR6K_DEVICE *pDev)
++{
++ A_UINT8 counter_int_status;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("Counter Interrupt\n"));
++
++ counter_int_status = pDev->IrqProcRegisters.counter_int_status &
++ pDev->IrqEnableRegisters.counter_int_status_enable;
++
++ AR_DEBUG_ASSERT(counter_int_status);
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
++ ("Valid interrupt source(s) in COUNTER_INT_STATUS: 0x%x\n",
++ counter_int_status));
++
++ /* Check if the debug interrupt is pending */
++ if (counter_int_status & AR6K_TARGET_DEBUG_INTR_MASK) {
++ return DevServiceDebugInterrupt(pDev);
++ }
++
++ return A_OK;
++}
++
++/* callback when our fetch to get interrupt status registers completes */
++static void DevGetEventAsyncHandler(void *Context, HTC_PACKET *pPacket)
++{
++ AR6K_DEVICE *pDev = (AR6K_DEVICE *)Context;
++ A_UINT32 lookAhead = 0;
++ A_BOOL otherInts = FALSE;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevGetEventAsyncHandler: (dev: 0x%X)\n", (A_UINT32)pDev));
++
++ do {
++
++ if (A_FAILED(pPacket->Status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ (" GetEvents I/O request failed, status:%d \n", pPacket->Status));
++ /* bail out, don't unmask HIF interrupt */
++ break;
++ }
++
++ if (pDev->GetPendingEventsFunc != NULL) {
++ /* the HIF layer collected the information for us */
++ HIF_PENDING_EVENTS_INFO *pEvents = (HIF_PENDING_EVENTS_INFO *)pPacket->pBuffer;
++ if (pEvents->Events & HIF_RECV_MSG_AVAIL) {
++ lookAhead = pEvents->LookAhead;
++ if (0 == lookAhead) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" DevGetEventAsyncHandler1, lookAhead is zero! \n"));
++ }
++ }
++ if (pEvents->Events & HIF_OTHER_EVENTS) {
++ otherInts = TRUE;
++ }
++ } else {
++ /* standard interrupt table handling.... */
++ AR6K_IRQ_PROC_REGISTERS *pReg = (AR6K_IRQ_PROC_REGISTERS *)pPacket->pBuffer;
++ A_UINT8 host_int_status;
++
++ host_int_status = pReg->host_int_status & pDev->IrqEnableRegisters.int_status_enable;
++
++ if (host_int_status & (1 << HTC_MAILBOX)) {
++ host_int_status &= ~(1 << HTC_MAILBOX);
++ if (pReg->rx_lookahead_valid & (1 << HTC_MAILBOX)) {
++ /* mailbox has a message and the look ahead is valid */
++ lookAhead = pReg->rx_lookahead[HTC_MAILBOX];
++ if (0 == lookAhead) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" DevGetEventAsyncHandler2, lookAhead is zero! \n"));
++ }
++ }
++ }
++
++ if (host_int_status) {
++ /* there are other interrupts to handle */
++ otherInts = TRUE;
++ }
++ }
++
++ if (otherInts || (lookAhead == 0)) {
++ /* if there are other interrupts to process, we cannot do this in the async handler so
++ * ack the interrupt which will cause our sync handler to run again
++ * if however there are no more messages, we can now ack the interrupt */
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
++ (" Acking interrupt from DevGetEventAsyncHandler (otherints:%d, lookahead:0x%X)\n",
++ otherInts, lookAhead));
++ HIFAckInterrupt(pDev->HIFDevice);
++ } else {
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
++ (" DevGetEventAsyncHandler : detected another message, lookahead :0x%X \n",
++ lookAhead));
++ /* lookahead is non-zero and there are no other interrupts to service,
++ * go get the next message */
++ pDev->MessagePendingCallback(pDev->HTCContext, lookAhead, NULL);
++ }
++
++ } while (FALSE);
++
++ /* free this IO packet */
++ AR6KFreeIOPacket(pDev,pPacket);
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevGetEventAsyncHandler \n"));
++}
++
++/* called by the HTC layer when it wants us to check if the device has any more pending
++ * recv messages, this starts off a series of async requests to read interrupt registers */
++A_STATUS DevCheckPendingRecvMsgsAsync(void *context)
++{
++ AR6K_DEVICE *pDev = (AR6K_DEVICE *)context;
++ A_STATUS status = A_OK;
++ HTC_PACKET *pIOPacket;
++
++ /* this is called in an ASYNC only context, we may NOT block, sleep or call any apis that can
++ * cause us to switch contexts */
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevCheckPendingRecvMsgsAsync: (dev: 0x%X)\n", (A_UINT32)pDev));
++
++ do {
++
++ if (HIF_DEVICE_IRQ_SYNC_ONLY == pDev->HifIRQProcessingMode) {
++ /* break the async processing chain right here, no need to continue.
++ * The DevDsrHandler() will handle things in a loop when things are driven
++ * synchronously */
++ break;
++ }
++ /* first allocate one of our HTC packets we created for async I/O
++ * we reuse HTC packet definitions so that we can use the completion mechanism
++ * in DevRWCompletionHandler() */
++ pIOPacket = AR6KAllocIOPacket(pDev);
++
++ if (NULL == pIOPacket) {
++ /* there should be only 1 asynchronous request out at a time to read these registers
++ * so this should actually never happen */
++ status = A_NO_MEMORY;
++ AR_DEBUG_ASSERT(FALSE);
++ break;
++ }
++
++ /* stick in our completion routine when the I/O operation completes */
++ pIOPacket->Completion = DevGetEventAsyncHandler;
++ pIOPacket->pContext = pDev;
++
++ if (pDev->GetPendingEventsFunc) {
++ /* HIF layer has it's own mechanism, pass the IO to it.. */
++ status = pDev->GetPendingEventsFunc(pDev->HIFDevice,
++ (HIF_PENDING_EVENTS_INFO *)pIOPacket->pBuffer,
++ pIOPacket);
++
++ } else {
++ /* standard way, read the interrupt register table asynchronously again */
++ status = HIFReadWrite(pDev->HIFDevice,
++ HOST_INT_STATUS_ADDRESS,
++ pIOPacket->pBuffer,
++ AR6K_IRQ_PROC_REGS_SIZE,
++ HIF_RD_ASYNC_BYTE_INC,
++ pIOPacket);
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,(" Async IO issued to get interrupt status...\n"));
++ } while (FALSE);
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevCheckPendingRecvMsgsAsync \n"));
++
++ return status;
++}
++
++/* process pending interrupts synchronously */
++static A_STATUS ProcessPendingIRQs(AR6K_DEVICE *pDev, A_BOOL *pDone, A_BOOL *pASyncProcessing)
++{
++ A_STATUS status = A_OK;
++ A_UINT8 host_int_status = 0;
++ A_UINT32 lookAhead = 0;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+ProcessPendingIRQs: (dev: 0x%X)\n", (A_UINT32)pDev));
++
++ /*** NOTE: the HIF implementation guarantees that the context of this call allows
++ * us to perform SYNCHRONOUS I/O, that is we can block, sleep or call any API that
++ * can block or switch thread/task ontexts.
++ * This is a fully schedulable context.
++ * */
++ do {
++
++ if (pDev->GetPendingEventsFunc != NULL) {
++ HIF_PENDING_EVENTS_INFO events;
++
++ /* the HIF layer uses a special mechanism to get events
++ * get this synchronously */
++ status = pDev->GetPendingEventsFunc(pDev->HIFDevice,
++ &events,
++ NULL);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ if (events.Events & HIF_RECV_MSG_AVAIL) {
++ lookAhead = events.LookAhead;
++ if (0 == lookAhead) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" ProcessPendingIRQs1 lookAhead is zero! \n"));
++ }
++ }
++
++ if (!(events.Events & HIF_OTHER_EVENTS) ||
++ !(pDev->IrqEnableRegisters.int_status_enable & OTHER_INTS_ENABLED)) {
++ /* no need to read the register table, no other interesting interrupts.
++ * Some interfaces (like SPI) can shadow interrupt sources without
++ * requiring the host to do a full table read */
++ break;
++ }
++
++ /* otherwise fall through and read the register table */
++ }
++
++ /*
++ * Read the first 28 bytes of the HTC register table. This will yield us
++ * the value of different int status registers and the lookahead
++ * registers.
++ * length = sizeof(int_status) + sizeof(cpu_int_status) +
++ * sizeof(error_int_status) + sizeof(counter_int_status) +
++ * sizeof(mbox_frame) + sizeof(rx_lookahead_valid) +
++ * sizeof(hole) + sizeof(rx_lookahead) +
++ * sizeof(int_status_enable) + sizeof(cpu_int_status_enable) +
++ * sizeof(error_status_enable) +
++ * sizeof(counter_int_status_enable);
++ *
++ */
++ status = HIFReadWrite(pDev->HIFDevice,
++ HOST_INT_STATUS_ADDRESS,
++ (A_UINT8 *)&pDev->IrqProcRegisters,
++ AR6K_IRQ_PROC_REGS_SIZE,
++ HIF_RD_SYNC_BYTE_INC,
++ NULL);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_IRQ)) {
++ DevDumpRegisters(&pDev->IrqProcRegisters,
++ &pDev->IrqEnableRegisters);
++ }
++
++ /* Update only those registers that are enabled */
++ host_int_status = pDev->IrqProcRegisters.host_int_status &
++ pDev->IrqEnableRegisters.int_status_enable;
++
++ if (NULL == pDev->GetPendingEventsFunc) {
++ /* only look at mailbox status if the HIF layer did not provide this function,
++ * on some HIF interfaces reading the RX lookahead is not valid to do */
++ if (host_int_status & (1 << HTC_MAILBOX)) {
++ /* mask out pending mailbox value, we use "lookAhead" as the real flag for
++ * mailbox processing below */
++ host_int_status &= ~(1 << HTC_MAILBOX);
++ if (pDev->IrqProcRegisters.rx_lookahead_valid & (1 << HTC_MAILBOX)) {
++ /* mailbox has a message and the look ahead is valid */
++ lookAhead = pDev->IrqProcRegisters.rx_lookahead[HTC_MAILBOX];
++ if (0 == lookAhead) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" ProcessPendingIRQs2, lookAhead is zero! \n"));
++ }
++ }
++ }
++ } else {
++ /* not valid to check if the HIF has another mechanism for reading mailbox pending status*/
++ host_int_status &= ~(1 << HTC_MAILBOX);
++ }
++
++ } while (FALSE);
++
++
++ do {
++
++ /* did the interrupt status fetches succeed? */
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ if ((0 == host_int_status) && (0 == lookAhead)) {
++ /* nothing to process, the caller can use this to break out of a loop */
++ *pDone = TRUE;
++ break;
++ }
++
++ if (lookAhead != 0) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("Pending mailbox message, LookAhead: 0x%X\n",lookAhead));
++ /* Mailbox Interrupt, the HTC layer may issue async requests to empty the
++ * mailbox...
++ * When emptying the recv mailbox we use the async handler above called from the
++ * completion routine of the callers read request. This can improve performance
++ * by reducing context switching when we rapidly pull packets */
++ status = pDev->MessagePendingCallback(pDev->HTCContext, lookAhead, pASyncProcessing);
++ if (A_FAILED(status)) {
++ break;
++ }
++ }
++
++ /* now handle the rest of them */
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
++ (" Valid interrupt source(s) for OTHER interrupts: 0x%x\n",
++ host_int_status));
++
++ if (HOST_INT_STATUS_CPU_GET(host_int_status)) {
++ /* CPU Interrupt */
++ status = DevServiceCPUInterrupt(pDev);
++ if (A_FAILED(status)){
++ break;
++ }
++ }
++
++ if (HOST_INT_STATUS_ERROR_GET(host_int_status)) {
++ /* Error Interrupt */
++ status = DevServiceErrorInterrupt(pDev);
++ if (A_FAILED(status)){
++ break;
++ }
++ }
++
++ if (HOST_INT_STATUS_COUNTER_GET(host_int_status)) {
++ /* Counter Interrupt */
++ status = DevServiceCounterInterrupt(pDev);
++ if (A_FAILED(status)){
++ break;
++ }
++ }
++
++ } while (FALSE);
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-ProcessPendingIRQs: (done:%d, async:%d) status=%d \n",
++ *pDone, *pASyncProcessing, status));
++
++ return status;
++}
++
++
++/* Synchronousinterrupt handler, this handler kicks off all interrupt processing.*/
++A_STATUS DevDsrHandler(void *context)
++{
++ AR6K_DEVICE *pDev = (AR6K_DEVICE *)context;
++ A_STATUS status = A_OK;
++ A_BOOL done = FALSE;
++ A_BOOL asyncProc = FALSE;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevDsrHandler: (dev: 0x%X)\n", (A_UINT32)pDev));
++
++
++ while (!done) {
++ status = ProcessPendingIRQs(pDev, &done, &asyncProc);
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ if (HIF_DEVICE_IRQ_SYNC_ONLY == pDev->HifIRQProcessingMode) {
++ /* the HIF layer does not allow async IRQ processing, override the asyncProc flag */
++ asyncProc = FALSE;
++ /* this will cause us to re-enter ProcessPendingIRQ() and re-read interrupt status registers.
++ * this has a nice side effect of blocking us until all async read requests are completed.
++ * This behavior is required on some HIF implementations that do not allow ASYNC
++ * processing in interrupt handlers (like Windows CE) */
++ }
++
++ if (asyncProc) {
++ /* the function performed some async I/O for performance, we
++ need to exit the ISR immediately, the check below will prevent the interrupt from being
++ Ack'd while we handle it asynchronously */
++ break;
++ }
++
++ }
++
++ if (A_SUCCESS(status) && !asyncProc) {
++ /* Ack the interrupt only if :
++ * 1. we did not get any errors in processing interrupts
++ * 2. there are no outstanding async processing requests */
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,(" Acking interrupt from DevDsrHandler \n"));
++ HIFAckInterrupt(pDev->HIFDevice);
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevDsrHandler \n"));
++ return A_OK;
++}
++
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/ar6k.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/ar6k.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,191 @@
++/*
++ *
++ * Copyright (c) 2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifndef AR6K_H_
++#define AR6K_H_
++
++#define AR6K_MAILBOXES 4
++
++/* HTC runs over mailbox 0 */
++#define HTC_MAILBOX 0
++
++#define AR6K_TARGET_DEBUG_INTR_MASK 0x01
++
++#define OTHER_INTS_ENABLED (INT_STATUS_ENABLE_ERROR_MASK | \
++ INT_STATUS_ENABLE_CPU_MASK | \
++ INT_STATUS_ENABLE_COUNTER_MASK)
++
++//#define MBOXHW_UNIT_TEST 1
++
++#include "athstartpack.h"
++typedef PREPACK struct _AR6K_IRQ_PROC_REGISTERS {
++ A_UINT8 host_int_status;
++ A_UINT8 cpu_int_status;
++ A_UINT8 error_int_status;
++ A_UINT8 counter_int_status;
++ A_UINT8 mbox_frame;
++ A_UINT8 rx_lookahead_valid;
++ A_UINT8 hole[2];
++ A_UINT32 rx_lookahead[2];
++} POSTPACK AR6K_IRQ_PROC_REGISTERS;
++
++#define AR6K_IRQ_PROC_REGS_SIZE sizeof(AR6K_IRQ_PROC_REGISTERS)
++
++
++
++typedef PREPACK struct _AR6K_IRQ_ENABLE_REGISTERS {
++ A_UINT8 int_status_enable;
++ A_UINT8 cpu_int_status_enable;
++ A_UINT8 error_status_enable;
++ A_UINT8 counter_int_status_enable;
++} POSTPACK AR6K_IRQ_ENABLE_REGISTERS;
++
++#include "athendpack.h"
++
++#define AR6K_IRQ_ENABLE_REGS_SIZE sizeof(AR6K_IRQ_ENABLE_REGISTERS)
++
++#define AR6K_REG_IO_BUFFER_SIZE 32
++#define AR6K_MAX_REG_IO_BUFFERS 8
++
++/* buffers for ASYNC I/O */
++typedef struct AR6K_ASYNC_REG_IO_BUFFER {
++ HTC_PACKET HtcPacket; /* we use an HTC packet as a wrapper for our async register-based I/O */
++ A_UINT8 Buffer[AR6K_REG_IO_BUFFER_SIZE];
++} AR6K_ASYNC_REG_IO_BUFFER;
++
++typedef struct _AR6K_DEVICE {
++ A_MUTEX_T Lock;
++ AR6K_IRQ_PROC_REGISTERS IrqProcRegisters;
++ AR6K_IRQ_ENABLE_REGISTERS IrqEnableRegisters;
++ void *HIFDevice;
++ A_UINT32 BlockSize;
++ A_UINT32 BlockMask;
++ A_UINT32 MailboxAddress;
++ HIF_PENDING_EVENTS_FUNC GetPendingEventsFunc;
++ void *HTCContext;
++ HTC_PACKET_QUEUE RegisterIOList;
++ AR6K_ASYNC_REG_IO_BUFFER RegIOBuffers[AR6K_MAX_REG_IO_BUFFERS];
++ void (*TargetFailureCallback)(void *Context);
++ A_STATUS (*MessagePendingCallback)(void *Context, A_UINT32 LookAhead, A_BOOL *pAsyncProc);
++ HIF_DEVICE_IRQ_PROCESSING_MODE HifIRQProcessingMode;
++ HIF_MASK_UNMASK_RECV_EVENT HifMaskUmaskRecvEvent;
++} AR6K_DEVICE;
++
++#define IS_DEV_IRQ_PROCESSING_ASYNC_ALLOWED(pDev) ((pDev)->HifIRQProcessingMode != HIF_DEVICE_IRQ_SYNC_ONLY)
++
++A_STATUS DevSetup(AR6K_DEVICE *pDev);
++A_STATUS DevUnmaskInterrupts(AR6K_DEVICE *pDev);
++A_STATUS DevMaskInterrupts(AR6K_DEVICE *pDev);
++A_STATUS DevPollMboxMsgRecv(AR6K_DEVICE *pDev,
++ A_UINT32 *pLookAhead,
++ int TimeoutMS);
++A_STATUS DevRWCompletionHandler(void *context, A_STATUS status);
++A_STATUS DevDsrHandler(void *context);
++A_STATUS DevCheckPendingRecvMsgsAsync(void *context);
++void DevDumpRegisters(AR6K_IRQ_PROC_REGISTERS *pIrqProcRegs,
++ AR6K_IRQ_ENABLE_REGISTERS *pIrqEnableRegs);
++
++#define DEV_STOP_RECV_ASYNC TRUE
++#define DEV_STOP_RECV_SYNC FALSE
++#define DEV_ENABLE_RECV_ASYNC TRUE
++#define DEV_ENABLE_RECV_SYNC FALSE
++A_STATUS DevStopRecv(AR6K_DEVICE *pDev, A_BOOL ASyncMode);
++A_STATUS DevEnableRecv(AR6K_DEVICE *pDev, A_BOOL ASyncMode);
++
++static INLINE A_STATUS DevSendPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket, A_UINT32 SendLength) {
++ A_UINT32 paddedLength;
++ A_BOOL sync = (pPacket->Completion == NULL) ? TRUE : FALSE;
++ A_STATUS status;
++
++ /* adjust the length to be a multiple of block size if appropriate */
++ paddedLength = (SendLength + (pDev->BlockMask)) &
++ (~(pDev->BlockMask));
++#if 0 // BufferLength may not be set in , fix this...
++ if (paddedLength > pPacket->BufferLength) {
++ AR_DEBUG_ASSERT(FALSE);
++ if (pPacket->Completion != NULL) {
++ COMPLETE_HTC_PACKET(pPacket,A_EINVAL);
++ }
++ return A_EINVAL;
++ }
++#endif
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,
++ ("DevSendPacket, Padded Length: %d Mbox:0x%X (mode:%s)\n",
++ paddedLength,
++ pDev->MailboxAddress,
++ sync ? "SYNC" : "ASYNC"));
++
++ status = HIFReadWrite(pDev->HIFDevice,
++ pDev->MailboxAddress,
++ pPacket->pBuffer,
++ paddedLength, /* the padded length */
++ sync ? HIF_WR_SYNC_BLOCK_INC : HIF_WR_ASYNC_BLOCK_INC,
++ sync ? NULL : pPacket); /* pass the packet as the context to the HIF request */
++
++ if (sync) {
++ pPacket->Status = status;
++ }
++
++ return status;
++}
++
++static INLINE A_STATUS DevRecvPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket, A_UINT32 RecvLength) {
++ A_UINT32 paddedLength;
++ A_STATUS status;
++ A_BOOL sync = (pPacket->Completion == NULL) ? TRUE : FALSE;
++
++ /* adjust the length to be a multiple of block size if appropriate */
++ paddedLength = (RecvLength + (pDev->BlockMask)) &
++ (~(pDev->BlockMask));
++ if (paddedLength > pPacket->BufferLength) {
++ AR_DEBUG_ASSERT(FALSE);
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ ("DevRecvPacket, Not enough space for padlen:%d recvlen:%d bufferlen:%d \n",
++ paddedLength,RecvLength,pPacket->BufferLength));
++ if (pPacket->Completion != NULL) {
++ COMPLETE_HTC_PACKET(pPacket,A_EINVAL);
++ }
++ return A_EINVAL;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
++ ("DevRecvPacket, Padded Length: %d Mbox:0x%X (mode:%s)\n",
++ paddedLength,
++ pDev->MailboxAddress,
++ sync ? "SYNC" : "ASYNC"));
++
++ status = HIFReadWrite(pDev->HIFDevice,
++ pDev->MailboxAddress,
++ pPacket->pBuffer,
++ paddedLength,
++ sync ? HIF_RD_SYNC_BLOCK_INC : HIF_RD_ASYNC_BLOCK_INC,
++ sync ? NULL : pPacket); /* pass the packet as the context to the HIF request */
++
++ if (sync) {
++ pPacket->Status = status;
++ }
++
++ return status;
++}
++
++#ifdef MBOXHW_UNIT_TEST
++A_STATUS DoMboxHWTest(AR6K_DEVICE *pDev);
++#endif
++
++#endif /*AR6K_H_*/
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,507 @@
++/*
++ *
++ * Copyright (c) 2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "htc_internal.h"
++
++
++static HTC_INIT_INFO HTCInitInfo = {NULL,NULL,NULL};
++static A_BOOL HTCInitialized = FALSE;
++
++static A_STATUS HTCTargetInsertedHandler(void *hif_handle);
++static A_STATUS HTCTargetRemovedHandler(void *handle, A_STATUS status);
++static void HTCReportFailure(void *Context);
++
++/* Initializes the HTC layer */
++A_STATUS HTCInit(HTC_INIT_INFO *pInitInfo)
++{
++ HTC_CALLBACKS htcCallbacks;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCInit: Enter\n"));
++ if (HTCInitialized) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCInit: Exit\n"));
++ return A_OK;
++ }
++
++ A_MEMCPY(&HTCInitInfo,pInitInfo,sizeof(HTC_INIT_INFO));
++
++ A_MEMZERO(&htcCallbacks, sizeof(HTC_CALLBACKS));
++
++ /* setup HIF layer callbacks */
++ htcCallbacks.deviceInsertedHandler = HTCTargetInsertedHandler;
++ htcCallbacks.deviceRemovedHandler = HTCTargetRemovedHandler;
++ /* the device layer handles these */
++ htcCallbacks.rwCompletionHandler = DevRWCompletionHandler;
++ htcCallbacks.dsrHandler = DevDsrHandler;
++ HIFInit(&htcCallbacks);
++ HTCInitialized = TRUE;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCInit: Exit\n"));
++ return A_OK;
++}
++
++void HTCFreeControlBuffer(HTC_TARGET *target, HTC_PACKET *pPacket, HTC_PACKET_QUEUE *pList)
++{
++ LOCK_HTC(target);
++ HTC_PACKET_ENQUEUE(pList,pPacket);
++ UNLOCK_HTC(target);
++}
++
++HTC_PACKET *HTCAllocControlBuffer(HTC_TARGET *target, HTC_PACKET_QUEUE *pList)
++{
++ HTC_PACKET *pPacket;
++
++ LOCK_HTC(target);
++ pPacket = HTC_PACKET_DEQUEUE(pList);
++ UNLOCK_HTC(target);
++
++ return pPacket;
++}
++
++/* cleanup the HTC instance */
++static void HTCCleanup(HTC_TARGET *target)
++{
++ if (A_IS_MUTEX_VALID(&target->HTCLock)) {
++ A_MUTEX_DELETE(&target->HTCLock);
++ }
++
++ if (A_IS_MUTEX_VALID(&target->HTCRxLock)) {
++ A_MUTEX_DELETE(&target->HTCRxLock);
++ }
++
++ if (A_IS_MUTEX_VALID(&target->HTCTxLock)) {
++ A_MUTEX_DELETE(&target->HTCTxLock);
++ }
++ /* free our instance */
++ A_FREE(target);
++}
++
++/* registered target arrival callback from the HIF layer */
++static A_STATUS HTCTargetInsertedHandler(void *hif_handle)
++{
++ HTC_TARGET *target = NULL;
++ A_STATUS status;
++ int i;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("htcTargetInserted - Enter\n"));
++
++ do {
++
++ /* allocate target memory */
++ if ((target = (HTC_TARGET *)A_MALLOC(sizeof(HTC_TARGET))) == NULL) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to allocate memory\n"));
++ status = A_ERROR;
++ break;
++ }
++
++ A_MEMZERO(target, sizeof(HTC_TARGET));
++ A_MUTEX_INIT(&target->HTCLock);
++ A_MUTEX_INIT(&target->HTCRxLock);
++ A_MUTEX_INIT(&target->HTCTxLock);
++ INIT_HTC_PACKET_QUEUE(&target->ControlBufferTXFreeList);
++ INIT_HTC_PACKET_QUEUE(&target->ControlBufferRXFreeList);
++
++ /* give device layer the hif device handle */
++ target->Device.HIFDevice = hif_handle;
++ /* give the device layer our context (for event processing)
++ * the device layer will register it's own context with HIF
++ * so we need to set this so we can fetch it in the target remove handler */
++ target->Device.HTCContext = target;
++ /* set device layer target failure callback */
++ target->Device.TargetFailureCallback = HTCReportFailure;
++ /* set device layer recv message pending callback */
++ target->Device.MessagePendingCallback = HTCRecvMessagePendingHandler;
++ target->EpWaitingForBuffers = ENDPOINT_MAX;
++
++ /* setup device layer */
++ status = DevSetup(&target->Device);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ /* carve up buffers/packets for control messages */
++ for (i = 0; i < NUM_CONTROL_RX_BUFFERS; i++) {
++ HTC_PACKET *pControlPacket;
++ pControlPacket = &target->HTCControlBuffers[i].HtcPacket;
++ SET_HTC_PACKET_INFO_RX_REFILL(pControlPacket,
++ target,
++ target->HTCControlBuffers[i].Buffer,
++ HTC_CONTROL_BUFFER_SIZE,
++ ENDPOINT_0);
++ HTC_FREE_CONTROL_RX(target,pControlPacket);
++ }
++
++ for (;i < NUM_CONTROL_BUFFERS;i++) {
++ HTC_PACKET *pControlPacket;
++ pControlPacket = &target->HTCControlBuffers[i].HtcPacket;
++ INIT_HTC_PACKET_INFO(pControlPacket,
++ target->HTCControlBuffers[i].Buffer,
++ HTC_CONTROL_BUFFER_SIZE);
++ HTC_FREE_CONTROL_TX(target,pControlPacket);
++ }
++
++ } while (FALSE);
++
++ if (A_SUCCESS(status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, (" calling AddInstance callback \n"));
++ /* announce ourselves */
++ HTCInitInfo.AddInstance((HTC_HANDLE)target);
++ } else {
++ if (target != NULL) {
++ HTCCleanup(target);
++ }
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("htcTargetInserted - Exit\n"));
++
++ return status;
++}
++
++/* registered removal callback from the HIF layer */
++static A_STATUS HTCTargetRemovedHandler(void *handle, A_STATUS status)
++{
++ HTC_TARGET *target;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("+HTCTargetRemovedHandler handle:0x%X \n",(A_UINT32)handle));
++
++ if (NULL == handle) {
++ /* this could be NULL in the event that target initialization failed */
++ return A_OK;
++ }
++
++ target = ((AR6K_DEVICE *)handle)->HTCContext;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, (" removing target:0x%X instance:0x%X ... \n",
++ (A_UINT32)target, (A_UINT32)target->pInstanceContext));
++
++ if (target->pInstanceContext != NULL) {
++ /* let upper layer know, it needs to call HTCStop() */
++ HTCInitInfo.DeleteInstance(target->pInstanceContext);
++ }
++
++ HIFShutDownDevice(target->Device.HIFDevice);
++
++ HTCCleanup(target);
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("-HTCTargetRemovedHandler \n"));
++ return A_OK;
++}
++
++/* get the low level HIF device for the caller , the caller may wish to do low level
++ * HIF requests */
++void *HTCGetHifDevice(HTC_HANDLE HTCHandle)
++{
++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
++ return target->Device.HIFDevice;
++}
++
++/* set the instance block for this HTC handle, so that on removal, the blob can be
++ * returned to the caller */
++void HTCSetInstance(HTC_HANDLE HTCHandle, void *Instance)
++{
++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
++
++ target->pInstanceContext = Instance;
++}
++
++/* wait for the target to arrive (sends HTC Ready message)
++ * this operation is fully synchronous and the message is polled for */
++A_STATUS HTCWaitTarget(HTC_HANDLE HTCHandle)
++{
++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
++ A_STATUS status;
++ HTC_PACKET *pPacket = NULL;
++ HTC_READY_MSG *pRdyMsg;
++ HTC_SERVICE_CONNECT_REQ connect;
++ HTC_SERVICE_CONNECT_RESP resp;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCWaitTarget - Enter (target:0x%X) \n", (A_UINT32)target));
++
++ do {
++
++#ifdef MBOXHW_UNIT_TEST
++
++ status = DoMboxHWTest(&target->Device);
++
++ if (status != A_OK) {
++ break;
++ }
++
++#endif
++
++ /* we should be getting 1 control message that the target is ready */
++ status = HTCWaitforControlMessage(target, &pPacket);
++
++ if (A_FAILED(status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, (" Target Not Available!!\n"));
++ break;
++ }
++
++ /* we controlled the buffer creation so it has to be properly aligned */
++ pRdyMsg = (HTC_READY_MSG *)pPacket->pBuffer;
++
++ if ((pRdyMsg->MessageID != HTC_MSG_READY_ID) ||
++ (pPacket->ActualLength < sizeof(HTC_READY_MSG))) {
++ /* this message is not valid */
++ AR_DEBUG_ASSERT(FALSE);
++ status = A_EPROTO;
++ break;
++ }
++
++ if (pRdyMsg->CreditCount == 0 || pRdyMsg->CreditSize == 0) {
++ /* this message is not valid */
++ AR_DEBUG_ASSERT(FALSE);
++ status = A_EPROTO;
++ break;
++ }
++
++ target->TargetCredits = pRdyMsg->CreditCount;
++ target->TargetCreditSize = pRdyMsg->CreditSize;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, (" Target Ready: credits: %d credit size: %d\n",
++ target->TargetCredits, target->TargetCreditSize));
++
++ /* setup our pseudo HTC control endpoint connection */
++ A_MEMZERO(&connect,sizeof(connect));
++ A_MEMZERO(&resp,sizeof(resp));
++ connect.EpCallbacks.pContext = target;
++ connect.EpCallbacks.EpTxComplete = HTCControlTxComplete;
++ connect.EpCallbacks.EpRecv = HTCControlRecv;
++ connect.EpCallbacks.EpRecvRefill = NULL; /* not needed */
++ connect.EpCallbacks.EpSendFull = NULL; /* not nedded */
++ connect.MaxSendQueueDepth = NUM_CONTROL_BUFFERS;
++ connect.ServiceID = HTC_CTRL_RSVD_SVC;
++
++ /* connect fake service */
++ status = HTCConnectService((HTC_HANDLE)target,
++ &connect,
++ &resp);
++
++ if (!A_FAILED(status)) {
++ break;
++ }
++
++ } while (FALSE);
++
++ if (pPacket != NULL) {
++ HTC_FREE_CONTROL_RX(target,pPacket);
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCWaitTarget - Exit\n"));
++
++ return status;
++}
++
++
++
++/* Start HTC, enable interrupts and let the target know host has finished setup */
++A_STATUS HTCStart(HTC_HANDLE HTCHandle)
++{
++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
++ HTC_PACKET *pPacket;
++ A_STATUS status;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCStart Enter\n"));
++
++ /* now that we are starting, push control receive buffers into the
++ * HTC control endpoint */
++
++ while (1) {
++ pPacket = HTC_ALLOC_CONTROL_RX(target);
++ if (NULL == pPacket) {
++ break;
++ }
++ HTCAddReceivePkt((HTC_HANDLE)target,pPacket);
++ }
++
++ do {
++
++ AR_DEBUG_ASSERT(target->InitCredits != NULL);
++ AR_DEBUG_ASSERT(target->EpCreditDistributionListHead != NULL);
++ AR_DEBUG_ASSERT(target->EpCreditDistributionListHead->pNext != NULL);
++
++ /* call init credits callback to do the distribution ,
++ * NOTE: the first entry in the distribution list is ENDPOINT_0, so
++ * we pass the start of the list after this one. */
++ target->InitCredits(target->pCredDistContext,
++ target->EpCreditDistributionListHead->pNext,
++ target->TargetCredits);
++
++ if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_TRC)) {
++ DumpCreditDistStates(target);
++ }
++
++ /* the caller is done connecting to services, so we can indicate to the
++ * target that the setup phase is complete */
++ status = HTCSendSetupComplete(target);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ /* unmask interrupts */
++ status = DevUnmaskInterrupts(&target->Device);
++
++ if (A_FAILED(status)) {
++ HTCStop(target);
++ }
++
++ } while (FALSE);
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCStart Exit\n"));
++ return status;
++}
++
++
++/* stop HTC communications, i.e. stop interrupt reception, and flush all queued buffers */
++void HTCStop(HTC_HANDLE HTCHandle)
++{
++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("+HTCStop \n"));
++
++ /* mark that we are shutting down .. */
++ target->HTCStateFlags |= HTC_STATE_STOPPING;
++
++ /* Masking interrupts is a synchronous operation, when this function returns
++ * all pending HIF I/O has completed, we can safely flush the queues */
++ DevMaskInterrupts(&target->Device);
++
++ /* flush all send packets */
++ HTCFlushSendPkts(target);
++ /* flush all recv buffers */
++ HTCFlushRecvBuffers(target);
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("-HTCStop \n"));
++}
++
++/* undo what was done in HTCInit() */
++void HTCShutDown(void)
++{
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("+HTCShutDown: \n"));
++ HTCInitialized = FALSE;
++ /* undo HTCInit */
++ HIFShutDownDevice(NULL);
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("-HTCShutDown: \n"));
++}
++
++void HTCDumpCreditStates(HTC_HANDLE HTCHandle)
++{
++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
++
++ LOCK_HTC_TX(target);
++
++ DumpCreditDistStates(target);
++
++ UNLOCK_HTC_TX(target);
++}
++
++/* report a target failure from the device, this is a callback from the device layer
++ * which uses a mechanism to report errors from the target (i.e. special interrupts) */
++static void HTCReportFailure(void *Context)
++{
++ HTC_TARGET *target = (HTC_TARGET *)Context;
++
++ target->TargetFailure = TRUE;
++
++ if ((target->pInstanceContext != NULL) && (HTCInitInfo.TargetFailure != NULL)) {
++ /* let upper layer know, it needs to call HTCStop() */
++ HTCInitInfo.TargetFailure(target->pInstanceContext, A_ERROR);
++ }
++}
++
++void DebugDumpBytes(A_UCHAR *buffer, A_UINT16 length, char *pDescription)
++{
++ A_CHAR stream[60];
++ A_UINT32 i;
++ A_UINT16 offset, count;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("<---------Dumping %d Bytes : %s ------>\n", length, pDescription));
++
++ count = 0;
++ offset = 0;
++ for(i = 0; i < length; i++) {
++ sprintf(stream + offset, "%2.2X ", buffer[i]);
++ count ++;
++ offset += 3;
++
++ if(count == 16) {
++ count = 0;
++ offset = 0;
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("[H]: %s\n", stream));
++ A_MEMZERO(stream, 60);
++ }
++ }
++
++ if(offset != 0) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("[H]: %s\n", stream));
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("<------------------------------------------------->\n"));
++}
++
++A_BOOL HTCGetEndpointStatistics(HTC_HANDLE HTCHandle,
++ HTC_ENDPOINT_ID Endpoint,
++ HTC_ENDPOINT_STAT_ACTION Action,
++ HTC_ENDPOINT_STATS *pStats)
++{
++
++#ifdef HTC_EP_STAT_PROFILING
++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
++ A_BOOL clearStats = FALSE;
++ A_BOOL sample = FALSE;
++
++ switch (Action) {
++ case HTC_EP_STAT_SAMPLE :
++ sample = TRUE;
++ break;
++ case HTC_EP_STAT_SAMPLE_AND_CLEAR :
++ sample = TRUE;
++ clearStats = TRUE;
++ break;
++ case HTC_EP_STAT_CLEAR :
++ clearStats = TRUE;
++ break;
++ default:
++ break;
++ }
++
++ A_ASSERT(Endpoint < ENDPOINT_MAX);
++
++ /* lock out TX and RX while we sample and/or clear */
++ LOCK_HTC_TX(target);
++ LOCK_HTC_RX(target);
++
++ if (sample) {
++ A_ASSERT(pStats != NULL);
++ /* return the stats to the caller */
++ A_MEMCPY(pStats, &target->EndPoint[Endpoint].EndPointStats, sizeof(HTC_ENDPOINT_STATS));
++ }
++
++ if (clearStats) {
++ /* reset stats */
++ A_MEMZERO(&target->EndPoint[Endpoint].EndPointStats, sizeof(HTC_ENDPOINT_STATS));
++ }
++
++ UNLOCK_HTC_RX(target);
++ UNLOCK_HTC_TX(target);
++
++ return TRUE;
++#else
++ return FALSE;
++#endif
++}
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_debug.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_debug.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,65 @@
++#ifndef HTC_DEBUG_H_
++#define HTC_DEBUG_H_
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++/* ------- Debug related stuff ------- */
++enum {
++ ATH_DEBUG_SEND = 0x0001,
++ ATH_DEBUG_RECV = 0x0002,
++ ATH_DEBUG_SYNC = 0x0004,
++ ATH_DEBUG_DUMP = 0x0008,
++ ATH_DEBUG_IRQ = 0x0010,
++ ATH_DEBUG_TRC = 0x0020,
++ ATH_DEBUG_WARN = 0x0040,
++ ATH_DEBUG_ERR = 0x0080,
++ ATH_DEBUG_ANY = 0xFFFF,
++};
++
++#ifdef DEBUG
++
++// TODO FIX usage of A_PRINTF!
++#define AR_DEBUG_LVL_CHECK(lvl) (debughtc & (lvl))
++#define AR_DEBUG_PRINTBUF(buffer, length, desc) do { \
++ if (debughtc & ATH_DEBUG_DUMP) { \
++ DebugDumpBytes(buffer, length,desc); \
++ } \
++} while(0)
++#define PRINTX_ARG(arg...) arg
++#define AR_DEBUG_PRINTF(flags, args) do { \
++ if (debughtc & (flags)) { \
++ A_PRINTF(KERN_ALERT PRINTX_ARG args); \
++ } \
++} while (0)
++#define AR_DEBUG_ASSERT(test) do { \
++ if (!(test)) { \
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Debug Assert Caught, File %s, Line: %d, Test:%s \n",__FILE__, __LINE__,#test)); \
++ } \
++} while(0)
++extern int debughtc;
++#else
++#define AR_DEBUG_PRINTF(flags, args)
++#define AR_DEBUG_PRINTBUF(buffer, length, desc)
++#define AR_DEBUG_ASSERT(test)
++#define AR_DEBUG_LVL_CHECK(lvl) 0
++#endif
++
++void DebugDumpBytes(A_UCHAR *buffer, A_UINT16 length, char *pDescription);
++
++#endif /*HTC_DEBUG_H_*/
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_internal.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_internal.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,168 @@
++/*
++ *
++ * Copyright (c) 2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifndef _HTC_INTERNAL_H_
++#define _HTC_INTERNAL_H_
++
++/* for debugging, uncomment this to capture the last frame header, on frame header
++ * processing errors, the last frame header is dump for comparison */
++//#define HTC_CAPTURE_LAST_FRAME
++
++//#define HTC_EP_STAT_PROFILING
++
++#ifdef __cplusplus
++extern "C" {
++#endif /* __cplusplus */
++
++/* Header files */
++#include "a_config.h"
++#include "athdefs.h"
++#include "a_types.h"
++#include "a_osapi.h"
++#include "a_debug.h"
++#include "htc.h"
++#include "htc_api.h"
++#include "bmi_msg.h"
++#include "hif.h"
++#include "ar6k.h"
++
++/* HTC operational parameters */
++#define HTC_TARGET_RESPONSE_TIMEOUT 2000 /* in ms */
++#define HTC_TARGET_DEBUG_INTR_MASK 0x01
++#define HTC_TARGET_CREDIT_INTR_MASK 0xF0
++
++typedef struct _HTC_ENDPOINT {
++ HTC_SERVICE_ID ServiceID; /* service ID this endpoint is bound to
++ non-zero value means this endpoint is in use */
++ HTC_PACKET_QUEUE TxQueue; /* HTC frame buffer TX queue */
++ HTC_PACKET_QUEUE RxBuffers; /* HTC frame buffer RX list */
++ HTC_ENDPOINT_CREDIT_DIST CreditDist; /* credit distribution structure (exposed to driver layer) */
++ HTC_EP_CALLBACKS EpCallBacks; /* callbacks associated with this endpoint */
++ int MaxTxQueueDepth; /* max depth of the TX queue before we need to
++ call driver's full handler */
++ int CurrentTxQueueDepth; /* current TX queue depth */
++ int MaxMsgLength; /* max length of endpoint message */
++#ifdef HTC_EP_STAT_PROFILING
++ HTC_ENDPOINT_STATS EndPointStats; /* endpoint statistics */
++#endif
++} HTC_ENDPOINT;
++
++#ifdef HTC_EP_STAT_PROFILING
++#define INC_HTC_EP_STAT(p,stat,count) (p)->EndPointStats.stat += (count);
++#else
++#define INC_HTC_EP_STAT(p,stat,count)
++#endif
++
++#define HTC_SERVICE_TX_PACKET_TAG HTC_TX_PACKET_TAG_INTERNAL
++
++#define NUM_CONTROL_BUFFERS 8
++#define NUM_CONTROL_TX_BUFFERS 2
++#define NUM_CONTROL_RX_BUFFERS (NUM_CONTROL_BUFFERS - NUM_CONTROL_TX_BUFFERS)
++
++#define HTC_CONTROL_BUFFER_SIZE (HTC_MAX_CONTROL_MESSAGE_LENGTH + HTC_HDR_LENGTH)
++
++typedef struct HTC_CONTROL_BUFFER {
++ HTC_PACKET HtcPacket;
++ A_UINT8 Buffer[HTC_CONTROL_BUFFER_SIZE];
++} HTC_CONTROL_BUFFER;
++
++/* our HTC target state */
++typedef struct _HTC_TARGET {
++ HTC_ENDPOINT EndPoint[ENDPOINT_MAX];
++ HTC_CONTROL_BUFFER HTCControlBuffers[NUM_CONTROL_BUFFERS];
++ HTC_ENDPOINT_CREDIT_DIST *EpCreditDistributionListHead;
++ HTC_PACKET_QUEUE ControlBufferTXFreeList;
++ HTC_PACKET_QUEUE ControlBufferRXFreeList;
++ HTC_CREDIT_DIST_CALLBACK DistributeCredits;
++ HTC_CREDIT_INIT_CALLBACK InitCredits;
++ void *pCredDistContext;
++ int TargetCredits;
++ int TargetCreditSize;
++ A_MUTEX_T HTCLock;
++ A_MUTEX_T HTCRxLock;
++ A_MUTEX_T HTCTxLock;
++ AR6K_DEVICE Device; /* AR6K - specific state */
++ A_UINT32 HTCStateFlags;
++ HTC_ENDPOINT_ID EpWaitingForBuffers;
++ A_BOOL TargetFailure;
++ void *pInstanceContext;
++#define HTC_STATE_WAIT_BUFFERS (1 << 0)
++#define HTC_STATE_STOPPING (1 << 1)
++#ifdef HTC_CAPTURE_LAST_FRAME
++ HTC_FRAME_HDR LastFrameHdr; /* useful for debugging */
++ A_UINT8 LastTrailer[256];
++ A_UINT8 LastTrailerLength;
++#endif
++} HTC_TARGET;
++
++#define HTC_STOPPING(t) ((t)->HTCStateFlags & HTC_STATE_STOPPING)
++#define LOCK_HTC(t) A_MUTEX_LOCK(&(t)->HTCLock);
++#define UNLOCK_HTC(t) A_MUTEX_UNLOCK(&(t)->HTCLock);
++#define LOCK_HTC_RX(t) A_MUTEX_LOCK(&(t)->HTCRxLock);
++#define UNLOCK_HTC_RX(t) A_MUTEX_UNLOCK(&(t)->HTCRxLock);
++#define LOCK_HTC_TX(t) A_MUTEX_LOCK(&(t)->HTCTxLock);
++#define UNLOCK_HTC_TX(t) A_MUTEX_UNLOCK(&(t)->HTCTxLock);
++
++#define GET_HTC_TARGET_FROM_HANDLE(hnd) ((HTC_TARGET *)(hnd))
++#define HTC_RECYCLE_RX_PKT(target,p) \
++{ \
++ HTC_PACKET_RESET_RX(pPacket); \
++ HTCAddReceivePkt((HTC_HANDLE)(target),(p)); \
++}
++
++/* internal HTC functions */
++void HTCControlTxComplete(void *Context, HTC_PACKET *pPacket);
++void HTCControlRecv(void *Context, HTC_PACKET *pPacket);
++A_STATUS HTCWaitforControlMessage(HTC_TARGET *target, HTC_PACKET **ppControlPacket);
++HTC_PACKET *HTCAllocControlBuffer(HTC_TARGET *target, HTC_PACKET_QUEUE *pList);
++void HTCFreeControlBuffer(HTC_TARGET *target, HTC_PACKET *pPacket, HTC_PACKET_QUEUE *pList);
++A_STATUS HTCIssueSend(HTC_TARGET *target, HTC_PACKET *pPacket, A_UINT8 Flags);
++A_STATUS HTCIssueRecv(HTC_TARGET *target, HTC_PACKET *pPacket);
++void HTCRecvCompleteHandler(void *Context, HTC_PACKET *pPacket);
++A_STATUS HTCRecvMessagePendingHandler(void *Context, A_UINT32 LookAhead, A_BOOL *pAsyncProc);
++void HTCProcessCreditRpt(HTC_TARGET *target, HTC_CREDIT_REPORT *pRpt, int NumEntries, HTC_ENDPOINT_ID FromEndpoint);
++A_STATUS HTCSendSetupComplete(HTC_TARGET *target);
++void HTCFlushRecvBuffers(HTC_TARGET *target);
++void HTCFlushSendPkts(HTC_TARGET *target);
++void DumpCreditDist(HTC_ENDPOINT_CREDIT_DIST *pEPDist);
++void DumpCreditDistStates(HTC_TARGET *target);
++void DebugDumpBytes(A_UCHAR *buffer, A_UINT16 length, char *pDescription);
++
++static INLINE HTC_PACKET *HTC_ALLOC_CONTROL_TX(HTC_TARGET *target) {
++ HTC_PACKET *pPacket = HTCAllocControlBuffer(target,&target->ControlBufferTXFreeList);
++ if (pPacket != NULL) {
++ /* set payload pointer area with some headroom */
++ pPacket->pBuffer = pPacket->pBufferStart + HTC_HDR_LENGTH;
++ }
++ return pPacket;
++}
++
++#define HTC_FREE_CONTROL_TX(t,p) HTCFreeControlBuffer((t),(p),&(t)->ControlBufferTXFreeList)
++#define HTC_ALLOC_CONTROL_RX(t) HTCAllocControlBuffer((t),&(t)->ControlBufferRXFreeList)
++#define HTC_FREE_CONTROL_RX(t,p) \
++{ \
++ HTC_PACKET_RESET_RX(p); \
++ HTCFreeControlBuffer((t),(p),&(t)->ControlBufferRXFreeList); \
++}
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _HTC_INTERNAL_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_recv.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_recv.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,703 @@
++/*
++ *
++ * Copyright (c) 2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "htc_internal.h"
++
++#define HTCIssueRecv(t, p) \
++ DevRecvPacket(&(t)->Device, \
++ (p), \
++ (p)->ActualLength)
++
++#define DO_RCV_COMPLETION(t,p,e) \
++{ \
++ if ((p)->ActualLength > 0) { \
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, (" completing packet 0x%X (%d bytes) on ep : %d \n", \
++ (A_UINT32)(p), (p)->ActualLength, (p)->Endpoint)); \
++ (e)->EpCallBacks.EpRecv((e)->EpCallBacks.pContext, \
++ (p)); \
++ } else { \
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, (" recycling empty packet \n")); \
++ HTC_RECYCLE_RX_PKT((t), (p)); \
++ } \
++}
++
++#ifdef HTC_EP_STAT_PROFILING
++#define HTC_RX_STAT_PROFILE(t,ep,lookAhead) \
++{ \
++ LOCK_HTC_RX((t)); \
++ INC_HTC_EP_STAT((ep), RxReceived, 1); \
++ if ((lookAhead) != 0) { \
++ INC_HTC_EP_STAT((ep), RxLookAheads, 1); \
++ } \
++ UNLOCK_HTC_RX((t)); \
++}
++#else
++#define HTC_RX_STAT_PROFILE(t,ep,lookAhead)
++#endif
++
++static INLINE A_STATUS HTCProcessTrailer(HTC_TARGET *target,
++ A_UINT8 *pBuffer,
++ int Length,
++ A_UINT32 *pNextLookAhead,
++ HTC_ENDPOINT_ID FromEndpoint)
++{
++ HTC_RECORD_HDR *pRecord;
++ A_UINT8 *pRecordBuf;
++ HTC_LOOKAHEAD_REPORT *pLookAhead;
++ A_UINT8 *pOrigBuffer;
++ int origLength;
++ A_STATUS status;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("+HTCProcessTrailer (length:%d) \n", Length));
++
++ if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_RECV)) {
++ AR_DEBUG_PRINTBUF(pBuffer,Length,"Recv Trailer");
++ }
++
++ pOrigBuffer = pBuffer;
++ origLength = Length;
++ status = A_OK;
++
++ while (Length > 0) {
++
++ if (Length < sizeof(HTC_RECORD_HDR)) {
++ status = A_EPROTO;
++ break;
++ }
++ /* these are byte aligned structs */
++ pRecord = (HTC_RECORD_HDR *)pBuffer;
++ Length -= sizeof(HTC_RECORD_HDR);
++ pBuffer += sizeof(HTC_RECORD_HDR);
++
++ if (pRecord->Length > Length) {
++ /* no room left in buffer for record */
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ (" invalid record length: %d (id:%d) buffer has: %d bytes left \n",
++ pRecord->Length, pRecord->RecordID, Length));
++ status = A_EPROTO;
++ break;
++ }
++ /* start of record follows the header */
++ pRecordBuf = pBuffer;
++
++ switch (pRecord->RecordID) {
++ case HTC_RECORD_CREDITS:
++ AR_DEBUG_ASSERT(pRecord->Length >= sizeof(HTC_CREDIT_REPORT));
++ HTCProcessCreditRpt(target,
++ (HTC_CREDIT_REPORT *)pRecordBuf,
++ pRecord->Length / (sizeof(HTC_CREDIT_REPORT)),
++ FromEndpoint);
++ break;
++ case HTC_RECORD_LOOKAHEAD:
++ AR_DEBUG_ASSERT(pRecord->Length >= sizeof(HTC_LOOKAHEAD_REPORT));
++ pLookAhead = (HTC_LOOKAHEAD_REPORT *)pRecordBuf;
++ if ((pLookAhead->PreValid == ((~pLookAhead->PostValid) & 0xFF)) &&
++ (pNextLookAhead != NULL)) {
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
++ (" LookAhead Report Found (pre valid:0x%X, post valid:0x%X) \n",
++ pLookAhead->PreValid,
++ pLookAhead->PostValid));
++
++ /* look ahead bytes are valid, copy them over */
++ ((A_UINT8 *)pNextLookAhead)[0] = pLookAhead->LookAhead[0];
++ ((A_UINT8 *)pNextLookAhead)[1] = pLookAhead->LookAhead[1];
++ ((A_UINT8 *)pNextLookAhead)[2] = pLookAhead->LookAhead[2];
++ ((A_UINT8 *)pNextLookAhead)[3] = pLookAhead->LookAhead[3];
++
++ if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_RECV)) {
++ DebugDumpBytes((A_UINT8 *)pNextLookAhead,4,"Next Look Ahead");
++ }
++ }
++ break;
++ default:
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, (" unhandled record: id:%d length:%d \n",
++ pRecord->RecordID, pRecord->Length));
++ break;
++ }
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ /* advance buffer past this record for next time around */
++ pBuffer += pRecord->Length;
++ Length -= pRecord->Length;
++ }
++
++ if (A_FAILED(status)) {
++ DebugDumpBytes(pOrigBuffer,origLength,"BAD Recv Trailer");
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("-HTCProcessTrailer \n"));
++ return status;
++
++}
++
++/* process a received message (i.e. strip off header, process any trailer data)
++ * note : locks must be released when this function is called */
++static A_STATUS HTCProcessRecvHeader(HTC_TARGET *target, HTC_PACKET *pPacket, A_UINT32 *pNextLookAhead)
++{
++ A_UINT8 temp;
++ A_UINT8 *pBuf;
++ A_STATUS status = A_OK;
++ A_UINT16 payloadLen;
++ A_UINT32 lookAhead;
++
++ pBuf = pPacket->pBuffer;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("+HTCProcessRecvHeader \n"));
++
++ if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_RECV)) {
++ AR_DEBUG_PRINTBUF(pBuf,pPacket->ActualLength,"HTC Recv PKT");
++ }
++
++ do {
++ /* note, we cannot assume the alignment of pBuffer, so we use the safe macros to
++ * retrieve 16 bit fields */
++ payloadLen = A_GET_UINT16_FIELD(pBuf, HTC_FRAME_HDR, PayloadLen);
++
++ ((A_UINT8 *)&lookAhead)[0] = pBuf[0];
++ ((A_UINT8 *)&lookAhead)[1] = pBuf[1];
++ ((A_UINT8 *)&lookAhead)[2] = pBuf[2];
++ ((A_UINT8 *)&lookAhead)[3] = pBuf[3];
++
++ if (lookAhead != pPacket->HTCReserved) {
++ /* somehow the lookahead that gave us the full read length did not
++ * reflect the actual header in the pending message */
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ ("HTCProcessRecvHeader, lookahead mismatch! \n"));
++ DebugDumpBytes((A_UINT8 *)&pPacket->HTCReserved,4,"Expected Message LookAhead");
++ DebugDumpBytes(pBuf,sizeof(HTC_FRAME_HDR),"Current Frame Header");
++#ifdef HTC_CAPTURE_LAST_FRAME
++ DebugDumpBytes((A_UINT8 *)&target->LastFrameHdr,sizeof(HTC_FRAME_HDR),"Last Frame Header");
++ if (target->LastTrailerLength != 0) {
++ DebugDumpBytes(target->LastTrailer,
++ target->LastTrailerLength,
++ "Last trailer");
++ }
++#endif
++ status = A_EPROTO;
++ break;
++ }
++
++ /* get flags */
++ temp = A_GET_UINT8_FIELD(pBuf, HTC_FRAME_HDR, Flags);
++
++ if (temp & HTC_FLAGS_RECV_TRAILER) {
++ /* this packet has a trailer */
++
++ /* extract the trailer length in control byte 0 */
++ temp = A_GET_UINT8_FIELD(pBuf, HTC_FRAME_HDR, ControlBytes[0]);
++
++ if ((temp < sizeof(HTC_RECORD_HDR)) || (temp > payloadLen)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ ("HTCProcessRecvHeader, invalid header (payloadlength should be :%d, CB[0] is:%d) \n",
++ payloadLen, temp));
++ status = A_EPROTO;
++ break;
++ }
++
++ /* process trailer data that follows HDR + application payload */
++ status = HTCProcessTrailer(target,
++ (pBuf + HTC_HDR_LENGTH + payloadLen - temp),
++ temp,
++ pNextLookAhead,
++ pPacket->Endpoint);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++#ifdef HTC_CAPTURE_LAST_FRAME
++ A_MEMCPY(target->LastTrailer, (pBuf + HTC_HDR_LENGTH + payloadLen - temp), temp);
++ target->LastTrailerLength = temp;
++#endif
++ /* trim length by trailer bytes */
++ pPacket->ActualLength -= temp;
++ }
++#ifdef HTC_CAPTURE_LAST_FRAME
++ else {
++ target->LastTrailerLength = 0;
++ }
++#endif
++
++ /* if we get to this point, the packet is good */
++ /* remove header and adjust length */
++ pPacket->pBuffer += HTC_HDR_LENGTH;
++ pPacket->ActualLength -= HTC_HDR_LENGTH;
++
++ } while (FALSE);
++
++ if (A_FAILED(status)) {
++ /* dump the whole packet */
++ DebugDumpBytes(pBuf,pPacket->ActualLength,"BAD HTC Recv PKT");
++ } else {
++#ifdef HTC_CAPTURE_LAST_FRAME
++ A_MEMCPY(&target->LastFrameHdr,pBuf,sizeof(HTC_FRAME_HDR));
++#endif
++ if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_RECV)) {
++ if (pPacket->ActualLength > 0) {
++ AR_DEBUG_PRINTBUF(pPacket->pBuffer,pPacket->ActualLength,"HTC - Application Msg");
++ }
++ }
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("-HTCProcessRecvHeader \n"));
++ return status;
++}
++
++/* asynchronous completion handler for recv packet fetching, when the device layer
++ * completes a read request, it will call this completion handler */
++void HTCRecvCompleteHandler(void *Context, HTC_PACKET *pPacket)
++{
++ HTC_TARGET *target = (HTC_TARGET *)Context;
++ HTC_ENDPOINT *pEndpoint;
++ A_UINT32 nextLookAhead = 0;
++ A_STATUS status;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("+HTCRecvCompleteHandler (status:%d, ep:%d) \n",
++ pPacket->Status, pPacket->Endpoint));
++
++ AR_DEBUG_ASSERT(pPacket->Endpoint < ENDPOINT_MAX);
++ pEndpoint = &target->EndPoint[pPacket->Endpoint];
++ pPacket->Completion = NULL;
++
++ /* get completion status */
++ status = pPacket->Status;
++
++ do {
++ if (A_FAILED(status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("HTCRecvCompleteHandler: request failed (status:%d, ep:%d) \n",
++ pPacket->Status, pPacket->Endpoint));
++ break;
++ }
++ /* process the header for any trailer data */
++ status = HTCProcessRecvHeader(target,pPacket,&nextLookAhead);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++ /* was there a lookahead for the next packet? */
++ if (nextLookAhead != 0) {
++ A_STATUS nextStatus;
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
++ ("HTCRecvCompleteHandler - next look ahead was non-zero : 0x%X \n",
++ nextLookAhead));
++ /* we have another packet, get the next packet fetch started (pipelined) before
++ * we call into the endpoint's callback, this will start another async request */
++ nextStatus = HTCRecvMessagePendingHandler(target,nextLookAhead,NULL);
++ if (A_EPROTO == nextStatus) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ ("Next look ahead from recv header was INVALID\n"));
++ DebugDumpBytes((A_UINT8 *)&nextLookAhead,
++ 4,
++ "BAD lookahead from lookahead report");
++ }
++ } else {
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
++ ("HTCRecvCompleteHandler - rechecking for more messages...\n"));
++ /* if we did not get anything on the look-ahead,
++ * call device layer to asynchronously re-check for messages. If we can keep the async
++ * processing going we get better performance. If there is a pending message we will keep processing
++ * messages asynchronously which should pipeline things nicely */
++ DevCheckPendingRecvMsgsAsync(&target->Device);
++ }
++
++ HTC_RX_STAT_PROFILE(target,pEndpoint,nextLookAhead);
++ DO_RCV_COMPLETION(target,pPacket,pEndpoint);
++
++ } while (FALSE);
++
++ if (A_FAILED(status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ ("HTCRecvCompleteHandler , message fetch failed (status = %d) \n",
++ status));
++ /* recyle this packet */
++ HTC_RECYCLE_RX_PKT(target, pPacket);
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("-HTCRecvCompleteHandler\n"));
++}
++
++/* synchronously wait for a control message from the target,
++ * This function is used at initialization time ONLY. At init messages
++ * on ENDPOINT 0 are expected. */
++A_STATUS HTCWaitforControlMessage(HTC_TARGET *target, HTC_PACKET **ppControlPacket)
++{
++ A_STATUS status;
++ A_UINT32 lookAhead;
++ HTC_PACKET *pPacket = NULL;
++ HTC_FRAME_HDR *pHdr;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("+HTCWaitforControlMessage \n"));
++
++ do {
++
++ *ppControlPacket = NULL;
++
++ /* call the polling function to see if we have a message */
++ status = DevPollMboxMsgRecv(&target->Device,
++ &lookAhead,
++ HTC_TARGET_RESPONSE_TIMEOUT);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
++ ("HTCWaitforControlMessage : lookAhead : 0x%X \n", lookAhead));
++
++ /* check the lookahead */
++ pHdr = (HTC_FRAME_HDR *)&lookAhead;
++
++ if (pHdr->EndpointID != ENDPOINT_0) {
++ /* unexpected endpoint number, should be zero */
++ AR_DEBUG_ASSERT(FALSE);
++ status = A_EPROTO;
++ break;
++ }
++
++ if (A_FAILED(status)) {
++ /* bad message */
++ AR_DEBUG_ASSERT(FALSE);
++ status = A_EPROTO;
++ break;
++ }
++
++ pPacket = HTC_ALLOC_CONTROL_RX(target);
++
++ if (pPacket == NULL) {
++ AR_DEBUG_ASSERT(FALSE);
++ status = A_NO_MEMORY;
++ break;
++ }
++
++ pPacket->HTCReserved = lookAhead;
++ pPacket->ActualLength = pHdr->PayloadLen + HTC_HDR_LENGTH;
++
++ if (pPacket->ActualLength > pPacket->BufferLength) {
++ AR_DEBUG_ASSERT(FALSE);
++ status = A_EPROTO;
++ break;
++ }
++
++ /* we want synchronous operation */
++ pPacket->Completion = NULL;
++
++ /* get the message from the device, this will block */
++ status = HTCIssueRecv(target, pPacket);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ /* process receive header */
++ status = HTCProcessRecvHeader(target,pPacket,NULL);
++
++ pPacket->Status = status;
++
++ if (A_FAILED(status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ ("HTCWaitforControlMessage, HTCProcessRecvHeader failed (status = %d) \n",
++ status));
++ break;
++ }
++
++ /* give the caller this control message packet, they are responsible to free */
++ *ppControlPacket = pPacket;
++
++ } while (FALSE);
++
++ if (A_FAILED(status)) {
++ if (pPacket != NULL) {
++ /* cleanup buffer on error */
++ HTC_FREE_CONTROL_RX(target,pPacket);
++ }
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("-HTCWaitforControlMessage \n"));
++
++ return status;
++}
++
++/* callback when device layer or lookahead report parsing detects a pending message */
++A_STATUS HTCRecvMessagePendingHandler(void *Context, A_UINT32 LookAhead, A_BOOL *pAsyncProc)
++{
++ HTC_TARGET *target = (HTC_TARGET *)Context;
++ A_STATUS status = A_OK;
++ HTC_PACKET *pPacket = NULL;
++ HTC_FRAME_HDR *pHdr;
++ HTC_ENDPOINT *pEndpoint;
++ A_BOOL asyncProc = FALSE;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("+HTCRecvMessagePendingHandler LookAhead:0x%X \n",LookAhead));
++
++ if (IS_DEV_IRQ_PROCESSING_ASYNC_ALLOWED(&target->Device)) {
++ /* We use async mode to get the packets if the device layer supports it.
++ * The device layer interfaces with HIF in which HIF may have restrictions on
++ * how interrupts are processed */
++ asyncProc = TRUE;
++ }
++
++ if (pAsyncProc != NULL) {
++ /* indicate to caller how we decided to process this */
++ *pAsyncProc = asyncProc;
++ }
++
++ while (TRUE) {
++
++ pHdr = (HTC_FRAME_HDR *)&LookAhead;
++
++ if (pHdr->EndpointID >= ENDPOINT_MAX) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Invalid Endpoint in look-ahead: %d \n",pHdr->EndpointID));
++ /* invalid endpoint */
++ status = A_EPROTO;
++ break;
++ }
++
++ if (pHdr->PayloadLen > HTC_MAX_PAYLOAD_LENGTH) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Payload length %d exceeds max HTC : %d !\n",
++ pHdr->PayloadLen, HTC_MAX_PAYLOAD_LENGTH));
++ status = A_EPROTO;
++ break;
++ }
++
++ pEndpoint = &target->EndPoint[pHdr->EndpointID];
++
++ if (0 == pEndpoint->ServiceID) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Endpoint %d is not connected !\n",pHdr->EndpointID));
++ /* endpoint isn't even connected */
++ status = A_EPROTO;
++ break;
++ }
++
++ /* lock RX to get a buffer */
++ LOCK_HTC_RX(target);
++
++ /* get a packet from the endpoint recv queue */
++ pPacket = HTC_PACKET_DEQUEUE(&pEndpoint->RxBuffers);
++
++ if (NULL == pPacket) {
++ /* check for refill handler */
++ if (pEndpoint->EpCallBacks.EpRecvRefill != NULL) {
++ UNLOCK_HTC_RX(target);
++ /* call the re-fill handler */
++ pEndpoint->EpCallBacks.EpRecvRefill(pEndpoint->EpCallBacks.pContext,
++ pHdr->EndpointID);
++ LOCK_HTC_RX(target);
++ /* check if we have more buffers */
++ pPacket = HTC_PACKET_DEQUEUE(&pEndpoint->RxBuffers);
++ /* fall through */
++ }
++ }
++
++ if (NULL == pPacket) {
++ /* this is not an error, we simply need to mark that we are waiting for buffers.*/
++ target->HTCStateFlags |= HTC_STATE_WAIT_BUFFERS;
++ target->EpWaitingForBuffers = pHdr->EndpointID;
++ status = A_NO_MEMORY;
++ }
++
++ UNLOCK_HTC_RX(target);
++
++ if (A_FAILED(status)) {
++ /* no buffers */
++ break;
++ }
++
++ AR_DEBUG_ASSERT(pPacket->Endpoint == pHdr->EndpointID);
++
++ /* make sure this message can fit in the endpoint buffer */
++ if ((pHdr->PayloadLen + HTC_HDR_LENGTH) > pPacket->BufferLength) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ ("Payload Length Error : header reports payload of: %d, endpoint buffer size: %d \n",
++ pHdr->PayloadLen, pPacket->BufferLength));
++ status = A_EPROTO;
++ break;
++ }
++
++ pPacket->HTCReserved = LookAhead; /* set expected look ahead */
++ /* set the amount of data to fetch */
++ pPacket->ActualLength = pHdr->PayloadLen + HTC_HDR_LENGTH;
++
++ if (asyncProc) {
++ /* we use async mode to get the packet if the device layer supports it
++ * set our callback and context */
++ pPacket->Completion = HTCRecvCompleteHandler;
++ pPacket->pContext = target;
++ } else {
++ /* fully synchronous */
++ pPacket->Completion = NULL;
++ }
++
++ /* go fetch the packet */
++ status = HTCIssueRecv(target, pPacket);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ if (asyncProc) {
++ /* we did this asynchronously so we can get out of the loop, the asynch processing
++ * creates a chain of requests to continue processing pending messages in the
++ * context of callbacks */
++ break;
++ }
++
++ /* in the sync case, we process the packet, check lookaheads and then repeat */
++
++ LookAhead = 0;
++ status = HTCProcessRecvHeader(target,pPacket,&LookAhead);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ HTC_RX_STAT_PROFILE(target,pEndpoint,LookAhead);
++ DO_RCV_COMPLETION(target,pPacket,pEndpoint);
++
++ pPacket = NULL;
++
++ if (0 == LookAhead) {
++ break;
++ }
++
++ }
++
++ if (A_NO_MEMORY == status) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ (" Endpoint :%d has no buffers, blocking receiver to prevent overrun.. \n",
++ pHdr->EndpointID));
++ /* try to stop receive at the device layer */
++ DevStopRecv(&target->Device, asyncProc ? DEV_STOP_RECV_ASYNC : DEV_STOP_RECV_SYNC);
++ status = A_OK;
++ } else if (A_FAILED(status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ ("Failed to get pending message : LookAhead Value: 0x%X (status = %d) \n",
++ LookAhead, status));
++ if (pPacket != NULL) {
++ /* clean up packet on error */
++ HTC_RECYCLE_RX_PKT(target, pPacket);
++ }
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("-HTCRecvMessagePendingHandler \n"));
++
++ return status;
++}
++
++/* Makes a buffer available to the HTC module */
++A_STATUS HTCAddReceivePkt(HTC_HANDLE HTCHandle, HTC_PACKET *pPacket)
++{
++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
++ HTC_ENDPOINT *pEndpoint;
++ A_BOOL unblockRecv = FALSE;
++ A_STATUS status = A_OK;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,
++ ("+- HTCAddReceivePkt: endPointId: %d, buffer: 0x%X, length: %d\n",
++ pPacket->Endpoint, (A_UINT32)pPacket->pBuffer, pPacket->BufferLength));
++
++ do {
++
++ if (HTC_STOPPING(target)) {
++ status = A_ECANCELED;
++ break;
++ }
++
++ AR_DEBUG_ASSERT(pPacket->Endpoint < ENDPOINT_MAX);
++
++ pEndpoint = &target->EndPoint[pPacket->Endpoint];
++
++ LOCK_HTC_RX(target);
++
++ /* store receive packet */
++ HTC_PACKET_ENQUEUE(&pEndpoint->RxBuffers, pPacket);
++
++ /* check if we are blocked waiting for a new buffer */
++ if (target->HTCStateFlags & HTC_STATE_WAIT_BUFFERS) {
++ if (target->EpWaitingForBuffers == pPacket->Endpoint) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,(" receiver was blocked on ep:%d, unblocking.. \n",
++ target->EpWaitingForBuffers));
++ target->HTCStateFlags &= ~HTC_STATE_WAIT_BUFFERS;
++ target->EpWaitingForBuffers = ENDPOINT_MAX;
++ unblockRecv = TRUE;
++ }
++ }
++
++ UNLOCK_HTC_RX(target);
++
++ if (unblockRecv && !HTC_STOPPING(target)) {
++ /* TODO : implement a buffer threshold count? */
++ DevEnableRecv(&target->Device,DEV_ENABLE_RECV_SYNC);
++ }
++
++ } while (FALSE);
++
++ return status;
++}
++
++static void HTCFlushEndpointRX(HTC_TARGET *target, HTC_ENDPOINT *pEndpoint)
++{
++ HTC_PACKET *pPacket;
++
++ LOCK_HTC_RX(target);
++
++ while (1) {
++ pPacket = HTC_PACKET_DEQUEUE(&pEndpoint->RxBuffers);
++ if (NULL == pPacket) {
++ break;
++ }
++ UNLOCK_HTC_RX(target);
++ pPacket->Status = A_ECANCELED;
++ pPacket->ActualLength = 0;
++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, (" Flushing RX packet:0x%X, length:%d, ep:%d \n",
++ (A_UINT32)pPacket, pPacket->BufferLength, pPacket->Endpoint));
++ /* give the packet back */
++ pEndpoint->EpCallBacks.EpRecv(pEndpoint->EpCallBacks.pContext,
++ pPacket);
++ LOCK_HTC_RX(target);
++ }
++
++ UNLOCK_HTC_RX(target);
++
++
++}
++
++void HTCFlushRecvBuffers(HTC_TARGET *target)
++{
++ HTC_ENDPOINT *pEndpoint;
++ int i;
++
++ /* NOTE: no need to flush endpoint 0, these buffers were
++ * allocated as part of the HTC struct */
++ for (i = ENDPOINT_1; i < ENDPOINT_MAX; i++) {
++ pEndpoint = &target->EndPoint[i];
++ if (pEndpoint->ServiceID == 0) {
++ /* not in use.. */
++ continue;
++ }
++ HTCFlushEndpointRX(target,pEndpoint);
++ }
++
++
++}
++
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_send.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_send.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,543 @@
++/*
++ *
++ * Copyright (c) 2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "htc_internal.h"
++
++#define DO_EP_TX_COMPLETION(ep,p) \
++{ \
++ (p)->Completion = NULL; \
++ (ep)->EpCallBacks.EpTxComplete((ep)->EpCallBacks.pContext,(p)); \
++}
++
++
++/* call the distribute credits callback with the distribution */
++#define DO_DISTRIBUTION(t,reason,description,pList) \
++{ \
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, \
++ (" calling distribute function (%s) (dfn:0x%X, ctxt:0x%X, dist:0x%X) \n", \
++ (description), \
++ (A_UINT32)(t)->DistributeCredits, \
++ (A_UINT32)(t)->pCredDistContext, \
++ (A_UINT32)pList)); \
++ (t)->DistributeCredits((t)->pCredDistContext, \
++ (pList), \
++ (reason)); \
++}
++
++/* our internal send packet completion handler when packets are submited to the AR6K device
++ * layer */
++static void HTCSendPktCompletionHandler(void *Context, HTC_PACKET *pPacket)
++{
++ HTC_TARGET *target = (HTC_TARGET *)Context;
++ HTC_ENDPOINT *pEndpoint = &target->EndPoint[pPacket->Endpoint];
++
++
++ if (A_FAILED(pPacket->Status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ ("HTCSendPktCompletionHandler: request failed (status:%d, ep:%d) \n",
++ pPacket->Status, pPacket->Endpoint));
++ }
++ /* first, fixup the head room we allocated */
++ pPacket->pBuffer += HTC_HDR_LENGTH;
++ /* do completion */
++ DO_EP_TX_COMPLETION(pEndpoint,pPacket);
++}
++
++A_STATUS HTCIssueSend(HTC_TARGET *target, HTC_PACKET *pPacket, A_UINT8 SendFlags)
++{
++ A_STATUS status;
++ A_UINT8 *pHdrBuf;
++ A_BOOL sync = FALSE;
++
++ /* caller always provides headrooom */
++ pPacket->pBuffer -= HTC_HDR_LENGTH;
++ pHdrBuf = pPacket->pBuffer;
++ /* setup frame header */
++ A_SET_UINT16_FIELD(pHdrBuf,HTC_FRAME_HDR,PayloadLen,(A_UINT16)pPacket->ActualLength);
++ A_SET_UINT8_FIELD(pHdrBuf,HTC_FRAME_HDR,Flags,SendFlags);
++ A_SET_UINT8_FIELD(pHdrBuf,HTC_FRAME_HDR,EndpointID, (A_UINT8)pPacket->Endpoint);
++
++ if (pPacket->Completion == NULL) {
++ /* mark that this request was synchronously issued */
++ sync = TRUE;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,
++ ("+-HTCIssueSend: transmit length : %d (%s) \n",
++ pPacket->ActualLength + HTC_HDR_LENGTH,
++ sync ? "SYNC" : "ASYNC" ));
++
++ /* send message to device */
++ status = DevSendPacket(&target->Device,
++ pPacket,
++ pPacket->ActualLength + HTC_HDR_LENGTH);
++
++ if (sync) {
++ /* use local sync variable. If this was issued asynchronously, pPacket is no longer
++ * safe to access. */
++ pPacket->pBuffer += HTC_HDR_LENGTH;
++ }
++
++ /* if this request was asynchronous, the packet completion routine will be invoked by
++ * the device layer when the HIF layer completes the request */
++
++ return status;
++}
++
++/* try to send the current packet or a packet at the head of the TX queue,
++ * if there are no credits, the packet remains in the queue.
++ * this function always succeeds and returns a flag if the TX queue for
++ * the endpoint has hit the set limit */
++static A_BOOL HTCTrySend(HTC_TARGET *target,
++ HTC_ENDPOINT *pEndpoint,
++ HTC_PACKET *pPacketToSend)
++{
++ HTC_PACKET *pPacket;
++ int creditsRequired;
++ int remainder;
++ A_UINT8 sendFlags;
++ A_BOOL epFull = FALSE;
++
++ LOCK_HTC_TX(target);
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,("+HTCTrySend (pPkt:0x%X)\n",(A_UINT32)pPacketToSend));
++
++ if (pPacketToSend != NULL) {
++ /* caller supplied us a packet to queue to the tail of the HTC TX queue before
++ * we check the tx queue */
++ HTC_PACKET_ENQUEUE(&pEndpoint->TxQueue,pPacketToSend);
++ pEndpoint->CurrentTxQueueDepth++;
++ }
++
++ /* now drain the TX queue for transmission as long as we have enough
++ * credits */
++
++ while (1) {
++
++ if (HTC_QUEUE_EMPTY(&pEndpoint->TxQueue)) {
++ /* nothing in the queue */
++ break;
++ }
++
++ sendFlags = 0;
++
++ /* get packet at head, but don't remove it */
++ pPacket = HTC_GET_PKT_AT_HEAD(&pEndpoint->TxQueue);
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,(" Got head packet:0x%X , Queue Depth: %d\n",
++ (A_UINT32)pPacket, pEndpoint->CurrentTxQueueDepth));
++
++ /* figure out how many credits this message requires */
++ creditsRequired = (pPacket->ActualLength + HTC_HDR_LENGTH) / target->TargetCreditSize;
++ remainder = (pPacket->ActualLength + HTC_HDR_LENGTH) % target->TargetCreditSize;
++
++ if (remainder) {
++ creditsRequired++;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,(" Creds Required:%d Got:%d\n",
++ creditsRequired, pEndpoint->CreditDist.TxCredits));
++
++ if (pEndpoint->CreditDist.TxCredits < creditsRequired) {
++
++ /* not enough credits */
++
++ if (pPacket->Endpoint == ENDPOINT_0) {
++ /* leave it in the queue */
++ break;
++ }
++ /* invoke the registered distribution function only if this is not
++ * endpoint 0, we let the driver layer provide more credits if it can.
++ * We pass the credit distribution list starting at the endpoint in question
++ * */
++
++ /* set how many credits we need */
++ pEndpoint->CreditDist.TxCreditsSeek =
++ creditsRequired - pEndpoint->CreditDist.TxCredits;
++ DO_DISTRIBUTION(target,
++ HTC_CREDIT_DIST_SEEK_CREDITS,
++ "Seek Credits",
++ &pEndpoint->CreditDist);
++
++ pEndpoint->CreditDist.TxCreditsSeek = 0;
++
++ if (pEndpoint->CreditDist.TxCredits < creditsRequired) {
++ /* still not enough credits to send, leave packet in the queue */
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,
++ (" Not enough credits for ep %d leaving packet in queue..\n",
++ pPacket->Endpoint));
++ break;
++ }
++
++ }
++
++ pEndpoint->CreditDist.TxCredits -= creditsRequired;
++ INC_HTC_EP_STAT(pEndpoint, TxCreditsConsummed, creditsRequired);
++
++ /* check if we need credits */
++ if (pEndpoint->CreditDist.TxCredits < pEndpoint->CreditDist.TxCreditsPerMaxMsg) {
++ sendFlags |= HTC_FLAGS_NEED_CREDIT_UPDATE;
++ INC_HTC_EP_STAT(pEndpoint, TxCreditLowIndications, 1);
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,(" Host Needs Credits \n"));
++ }
++
++ /* now we can fully dequeue */
++ pPacket = HTC_PACKET_DEQUEUE(&pEndpoint->TxQueue);
++ pEndpoint->CurrentTxQueueDepth--;
++
++ INC_HTC_EP_STAT(pEndpoint, TxIssued, 1);
++
++ UNLOCK_HTC_TX(target);
++
++ HTCIssueSend(target, pPacket, sendFlags);
++
++ LOCK_HTC_TX(target);
++
++ /* go back and check for more messages */
++ }
++
++ if (pEndpoint->CurrentTxQueueDepth >= pEndpoint->MaxTxQueueDepth) {
++ /* let caller know that this endpoint has reached the maximum depth */
++ epFull = TRUE;
++ }
++
++ UNLOCK_HTC_TX(target);
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,("-HTCTrySend: \n"));
++ return epFull;
++}
++
++/* HTC API - HTCSendPkt */
++A_STATUS HTCSendPkt(HTC_HANDLE HTCHandle, HTC_PACKET *pPacket)
++{
++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
++ HTC_ENDPOINT *pEndpoint;
++ HTC_ENDPOINT_ID ep;
++ A_STATUS status = A_OK;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,
++ ("+HTCSendPkt: Enter endPointId: %d, buffer: 0x%X, length: %d \n",
++ pPacket->Endpoint, (A_UINT32)pPacket->pBuffer, pPacket->ActualLength));
++
++ ep = pPacket->Endpoint;
++ AR_DEBUG_ASSERT(ep < ENDPOINT_MAX);
++ pEndpoint = &target->EndPoint[ep];
++
++ do {
++
++ if (HTC_STOPPING(target)) {
++ status = A_ECANCELED;
++ pPacket->Status = status;
++ DO_EP_TX_COMPLETION(pEndpoint,pPacket);
++ break;
++ }
++ /* everything sent through this interface is asynchronous */
++ /* fill in HTC completion routines */
++ pPacket->Completion = HTCSendPktCompletionHandler;
++ pPacket->pContext = target;
++
++ if (HTCTrySend(target, pEndpoint, pPacket)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, (" Endpoint %d, TX queue is full, Depth:%d, Max:%d \n",
++ ep, pEndpoint->CurrentTxQueueDepth, pEndpoint->MaxTxQueueDepth));
++ /* queue is now full, let caller know */
++ if (pEndpoint->EpCallBacks.EpSendFull != NULL) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, (" Calling driver's send full callback.... \n"));
++ pEndpoint->EpCallBacks.EpSendFull(pEndpoint->EpCallBacks.pContext,
++ ep);
++ }
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("-HTCSendPkt \n"));
++ } while (FALSE);
++
++ return status;
++}
++
++
++/* check TX queues to drain because of credit distribution update */
++static INLINE void HTCCheckEndpointTxQueues(HTC_TARGET *target)
++{
++ HTC_ENDPOINT *pEndpoint;
++ HTC_ENDPOINT_CREDIT_DIST *pDistItem;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("+HTCCheckEndpointTxQueues \n"));
++ pDistItem = target->EpCreditDistributionListHead;
++
++ /* run through the credit distribution list to see
++ * if there are packets queued
++ * NOTE: no locks need to be taken since the distribution list
++ * is not dynamic (cannot be re-ordered) and we are not modifying any state */
++ while (pDistItem != NULL) {
++ pEndpoint = (HTC_ENDPOINT *)pDistItem->pHTCReserved;
++
++ if (pEndpoint->CurrentTxQueueDepth > 0) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, (" Ep %d has %d credits and %d Packets in TX Queue \n",
++ pDistItem->Endpoint, pEndpoint->CreditDist.TxCredits, pEndpoint->CurrentTxQueueDepth));
++ /* try to start the stalled queue, this list is ordered by priority.
++ * Highest priority queue get's processed first, if there are credits available the
++ * highest priority queue will get a chance to reclaim credits from lower priority
++ * ones */
++ HTCTrySend(target, pEndpoint, NULL);
++ }
++
++ pDistItem = pDistItem->pNext;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("-HTCCheckEndpointTxQueues \n"));
++}
++
++/* process credit reports and call distribution function */
++void HTCProcessCreditRpt(HTC_TARGET *target, HTC_CREDIT_REPORT *pRpt, int NumEntries, HTC_ENDPOINT_ID FromEndpoint)
++{
++ int i;
++ HTC_ENDPOINT *pEndpoint;
++ int totalCredits = 0;
++ A_BOOL doDist = FALSE;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("+HTCProcessCreditRpt, Credit Report Entries:%d \n", NumEntries));
++
++ /* lock out TX while we update credits */
++ LOCK_HTC_TX(target);
++
++ for (i = 0; i < NumEntries; i++, pRpt++) {
++ if (pRpt->EndpointID >= ENDPOINT_MAX) {
++ AR_DEBUG_ASSERT(FALSE);
++ break;
++ }
++
++ pEndpoint = &target->EndPoint[pRpt->EndpointID];
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, (" Endpoint %d got %d credits \n",
++ pRpt->EndpointID, pRpt->Credits));
++
++
++#ifdef HTC_EP_STAT_PROFILING
++
++ INC_HTC_EP_STAT(pEndpoint, TxCreditRpts, 1);
++ INC_HTC_EP_STAT(pEndpoint, TxCreditsReturned, pRpt->Credits);
++
++ if (FromEndpoint == pRpt->EndpointID) {
++ /* this credit report arrived on the same endpoint indicating it arrived in an RX
++ * packet */
++ INC_HTC_EP_STAT(pEndpoint, TxCreditsFromRx, pRpt->Credits);
++ INC_HTC_EP_STAT(pEndpoint, TxCreditRptsFromRx, 1);
++ } else if (FromEndpoint == ENDPOINT_0) {
++ /* this credit arrived on endpoint 0 as a NULL message */
++ INC_HTC_EP_STAT(pEndpoint, TxCreditsFromEp0, pRpt->Credits);
++ INC_HTC_EP_STAT(pEndpoint, TxCreditRptsFromEp0, 1);
++ } else {
++ /* arrived on another endpoint */
++ INC_HTC_EP_STAT(pEndpoint, TxCreditsFromOther, pRpt->Credits);
++ INC_HTC_EP_STAT(pEndpoint, TxCreditRptsFromOther, 1);
++ }
++
++#endif
++
++ if (ENDPOINT_0 == pRpt->EndpointID) {
++ /* always give endpoint 0 credits back */
++ pEndpoint->CreditDist.TxCredits += pRpt->Credits;
++ } else {
++ /* for all other endpoints, update credits to distribute, the distribution function
++ * will handle giving out credits back to the endpoints */
++ pEndpoint->CreditDist.TxCreditsToDist += pRpt->Credits;
++ /* flag that we have to do the distribution */
++ doDist = TRUE;
++ }
++
++ totalCredits += pRpt->Credits;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, (" Report indicated %d credits to distribute \n", totalCredits));
++
++ if (doDist) {
++ /* this was a credit return based on a completed send operations
++ * note, this is done with the lock held */
++ DO_DISTRIBUTION(target,
++ HTC_CREDIT_DIST_SEND_COMPLETE,
++ "Send Complete",
++ target->EpCreditDistributionListHead->pNext);
++ }
++
++ UNLOCK_HTC_TX(target);
++
++ if (totalCredits) {
++ HTCCheckEndpointTxQueues(target);
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("-HTCProcessCreditRpt \n"));
++}
++
++/* flush endpoint TX queue */
++static void HTCFlushEndpointTX(HTC_TARGET *target, HTC_ENDPOINT *pEndpoint, HTC_TX_TAG Tag)
++{
++ HTC_PACKET *pPacket;
++ HTC_PACKET_QUEUE discardQueue;
++
++ /* initialize the discard queue */
++ INIT_HTC_PACKET_QUEUE(&discardQueue);
++
++ LOCK_HTC_TX(target);
++
++ /* interate from the front of the TX queue and flush out packets */
++ ITERATE_OVER_LIST_ALLOW_REMOVE(&pEndpoint->TxQueue, pPacket, HTC_PACKET, ListLink) {
++
++ /* check for removal */
++ if ((HTC_TX_PACKET_TAG_ALL == Tag) || (Tag == pPacket->PktInfo.AsTx.Tag)) {
++ /* remove from queue */
++ HTC_PACKET_REMOVE(pPacket);
++ /* add it to the discard pile */
++ HTC_PACKET_ENQUEUE(&discardQueue, pPacket);
++ pEndpoint->CurrentTxQueueDepth--;
++ }
++
++ } ITERATE_END;
++
++ UNLOCK_HTC_TX(target);
++
++ /* empty the discard queue */
++ while (1) {
++ pPacket = HTC_PACKET_DEQUEUE(&discardQueue);
++ if (NULL == pPacket) {
++ break;
++ }
++ pPacket->Status = A_ECANCELED;
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, (" Flushing TX packet:0x%X, length:%d, ep:%d tag:0x%X \n",
++ (A_UINT32)pPacket, pPacket->ActualLength, pPacket->Endpoint, pPacket->PktInfo.AsTx.Tag));
++ DO_EP_TX_COMPLETION(pEndpoint,pPacket);
++ }
++
++}
++
++void DumpCreditDist(HTC_ENDPOINT_CREDIT_DIST *pEPDist)
++{
++#ifdef DEBUG
++ HTC_ENDPOINT *pEndpoint = (HTC_ENDPOINT *)pEPDist->pHTCReserved;
++#endif
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("--- EP : %d ServiceID: 0x%X --------------\n",
++ pEPDist->Endpoint, pEPDist->ServiceID));
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" this:0x%X next:0x%X prev:0x%X\n",
++ (A_UINT32)pEPDist, (A_UINT32)pEPDist->pNext, (A_UINT32)pEPDist->pPrev));
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" DistFlags : 0x%X \n", pEPDist->DistFlags));
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsNorm : %d \n", pEPDist->TxCreditsNorm));
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsMin : %d \n", pEPDist->TxCreditsMin));
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCredits : %d \n", pEPDist->TxCredits));
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsAssigned : %d \n", pEPDist->TxCreditsAssigned));
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsSeek : %d \n", pEPDist->TxCreditsSeek));
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditSize : %d \n", pEPDist->TxCreditSize));
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsPerMaxMsg : %d \n", pEPDist->TxCreditsPerMaxMsg));
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsToDist : %d \n", pEPDist->TxCreditsToDist));
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxQueueDepth : %d \n", pEndpoint->CurrentTxQueueDepth));
++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("----------------------------------------------------\n"));
++}
++
++void DumpCreditDistStates(HTC_TARGET *target)
++{
++ HTC_ENDPOINT_CREDIT_DIST *pEPList = target->EpCreditDistributionListHead;
++
++ while (pEPList != NULL) {
++ DumpCreditDist(pEPList);
++ pEPList = pEPList->pNext;
++ }
++
++ if (target->DistributeCredits != NULL) {
++ DO_DISTRIBUTION(target,
++ HTC_DUMP_CREDIT_STATE,
++ "Dump State",
++ NULL);
++ }
++}
++
++/* flush all send packets from all endpoint queues */
++void HTCFlushSendPkts(HTC_TARGET *target)
++{
++ HTC_ENDPOINT *pEndpoint;
++ int i;
++
++ DumpCreditDistStates(target);
++
++ for (i = ENDPOINT_0; i < ENDPOINT_MAX; i++) {
++ pEndpoint = &target->EndPoint[i];
++ if (pEndpoint->ServiceID == 0) {
++ /* not in use.. */
++ continue;
++ }
++ HTCFlushEndpointTX(target,pEndpoint,HTC_TX_PACKET_TAG_ALL);
++ }
++
++
++}
++
++/* HTC API to flush an endpoint's TX queue*/
++void HTCFlushEndpoint(HTC_HANDLE HTCHandle, HTC_ENDPOINT_ID Endpoint, HTC_TX_TAG Tag)
++{
++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
++ HTC_ENDPOINT *pEndpoint = &target->EndPoint[Endpoint];
++
++ if (pEndpoint->ServiceID == 0) {
++ AR_DEBUG_ASSERT(FALSE);
++ /* not in use.. */
++ return;
++ }
++
++ HTCFlushEndpointTX(target, pEndpoint, Tag);
++}
++
++/* HTC API to indicate activity to the credit distribution function */
++void HTCIndicateActivityChange(HTC_HANDLE HTCHandle,
++ HTC_ENDPOINT_ID Endpoint,
++ A_BOOL Active)
++{
++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
++ HTC_ENDPOINT *pEndpoint = &target->EndPoint[Endpoint];
++ A_BOOL doDist = FALSE;
++
++ if (pEndpoint->ServiceID == 0) {
++ AR_DEBUG_ASSERT(FALSE);
++ /* not in use.. */
++ return;
++ }
++
++ LOCK_HTC_TX(target);
++
++ if (Active) {
++ if (!(pEndpoint->CreditDist.DistFlags & HTC_EP_ACTIVE)) {
++ /* mark active now */
++ pEndpoint->CreditDist.DistFlags |= HTC_EP_ACTIVE;
++ doDist = TRUE;
++ }
++ } else {
++ if (pEndpoint->CreditDist.DistFlags & HTC_EP_ACTIVE) {
++ /* mark inactive now */
++ pEndpoint->CreditDist.DistFlags &= ~HTC_EP_ACTIVE;
++ doDist = TRUE;
++ }
++ }
++
++ if (doDist) {
++ /* do distribution again based on activity change
++ * note, this is done with the lock held */
++ DO_DISTRIBUTION(target,
++ HTC_CREDIT_DIST_ACTIVITY_CHANGE,
++ "Activity Change",
++ target->EpCreditDistributionListHead->pNext);
++ }
++
++ UNLOCK_HTC_TX(target);
++
++}
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_services.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_services.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,403 @@
++/*
++ *
++ * Copyright (c) 2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "htc_internal.h"
++
++void HTCControlTxComplete(void *Context, HTC_PACKET *pPacket)
++{
++ /* not implemented
++ * we do not send control TX frames during normal runtime, only during setup */
++ AR_DEBUG_ASSERT(FALSE);
++}
++
++ /* callback when a control message arrives on this endpoint */
++void HTCControlRecv(void *Context, HTC_PACKET *pPacket)
++{
++ AR_DEBUG_ASSERT(pPacket->Endpoint == ENDPOINT_0);
++
++ /* the only control messages we are expecting are NULL messages (credit resports), which should
++ * never get here */
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ ("HTCControlRecv, got message with length:%d \n",
++ pPacket->ActualLength + HTC_HDR_LENGTH));
++
++ /* dump header and message */
++ DebugDumpBytes(pPacket->pBuffer - HTC_HDR_LENGTH,
++ pPacket->ActualLength + HTC_HDR_LENGTH,
++ "Unexpected ENDPOINT 0 Message");
++
++ HTC_RECYCLE_RX_PKT((HTC_TARGET*)Context,pPacket);
++}
++
++A_STATUS HTCSendSetupComplete(HTC_TARGET *target)
++{
++ HTC_PACKET *pSendPacket = NULL;
++ A_STATUS status;
++ HTC_SETUP_COMPLETE_MSG *pSetupComplete;
++
++ do {
++ /* allocate a packet to send to the target */
++ pSendPacket = HTC_ALLOC_CONTROL_TX(target);
++
++ if (NULL == pSendPacket) {
++ status = A_NO_MEMORY;
++ break;
++ }
++
++ /* assemble setup complete message */
++ pSetupComplete = (HTC_SETUP_COMPLETE_MSG *)pSendPacket->pBuffer;
++ A_MEMZERO(pSetupComplete,sizeof(HTC_SETUP_COMPLETE_MSG));
++ pSetupComplete->MessageID = HTC_MSG_SETUP_COMPLETE_ID;
++
++ SET_HTC_PACKET_INFO_TX(pSendPacket,
++ NULL,
++ (A_UINT8 *)pSetupComplete,
++ sizeof(HTC_SETUP_COMPLETE_MSG),
++ ENDPOINT_0,
++ HTC_SERVICE_TX_PACKET_TAG);
++
++ /* we want synchronous operation */
++ pSendPacket->Completion = NULL;
++ /* send the message */
++ status = HTCIssueSend(target,pSendPacket,0);
++
++ } while (FALSE);
++
++ if (pSendPacket != NULL) {
++ HTC_FREE_CONTROL_TX(target,pSendPacket);
++ }
++
++ return status;
++}
++
++
++A_STATUS HTCConnectService(HTC_HANDLE HTCHandle,
++ HTC_SERVICE_CONNECT_REQ *pConnectReq,
++ HTC_SERVICE_CONNECT_RESP *pConnectResp)
++{
++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
++ A_STATUS status = A_OK;
++ HTC_PACKET *pRecvPacket = NULL;
++ HTC_PACKET *pSendPacket = NULL;
++ HTC_CONNECT_SERVICE_RESPONSE_MSG *pResponseMsg;
++ HTC_CONNECT_SERVICE_MSG *pConnectMsg;
++ HTC_ENDPOINT_ID assignedEndpoint = ENDPOINT_MAX;
++ HTC_ENDPOINT *pEndpoint;
++ int maxMsgSize = 0;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("+HTCConnectService, target:0x%X SvcID:0x%X \n",
++ (A_UINT32)target, pConnectReq->ServiceID));
++
++ do {
++
++ AR_DEBUG_ASSERT(pConnectReq->ServiceID != 0);
++
++ if (HTC_CTRL_RSVD_SVC == pConnectReq->ServiceID) {
++ /* special case for pseudo control service */
++ assignedEndpoint = ENDPOINT_0;
++ maxMsgSize = HTC_MAX_CONTROL_MESSAGE_LENGTH;
++ } else {
++ /* allocate a packet to send to the target */
++ pSendPacket = HTC_ALLOC_CONTROL_TX(target);
++
++ if (NULL == pSendPacket) {
++ AR_DEBUG_ASSERT(FALSE);
++ status = A_NO_MEMORY;
++ break;
++ }
++ /* assemble connect service message */
++ pConnectMsg = (HTC_CONNECT_SERVICE_MSG *)pSendPacket->pBuffer;
++ AR_DEBUG_ASSERT(pConnectMsg != NULL);
++ A_MEMZERO(pConnectMsg,sizeof(HTC_CONNECT_SERVICE_MSG));
++ pConnectMsg->MessageID = HTC_MSG_CONNECT_SERVICE_ID;
++ pConnectMsg->ServiceID = pConnectReq->ServiceID;
++ pConnectMsg->ConnectionFlags = pConnectReq->ConnectionFlags;
++ /* check caller if it wants to transfer meta data */
++ if ((pConnectReq->pMetaData != NULL) &&
++ (pConnectReq->MetaDataLength <= HTC_SERVICE_META_DATA_MAX_LENGTH)) {
++ /* copy meta data into message buffer (after header ) */
++ A_MEMCPY((A_UINT8 *)pConnectMsg + sizeof(HTC_CONNECT_SERVICE_MSG),
++ pConnectReq->pMetaData,
++ pConnectReq->MetaDataLength);
++ pConnectMsg->ServiceMetaLength = pConnectReq->MetaDataLength;
++ }
++
++ SET_HTC_PACKET_INFO_TX(pSendPacket,
++ NULL,
++ (A_UINT8 *)pConnectMsg,
++ sizeof(HTC_CONNECT_SERVICE_MSG) + pConnectMsg->ServiceMetaLength,
++ ENDPOINT_0,
++ HTC_SERVICE_TX_PACKET_TAG);
++
++ /* we want synchronous operation */
++ pSendPacket->Completion = NULL;
++
++ status = HTCIssueSend(target,pSendPacket,0);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ /* wait for response */
++ status = HTCWaitforControlMessage(target, &pRecvPacket);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++ /* we controlled the buffer creation so it has to be properly aligned */
++ pResponseMsg = (HTC_CONNECT_SERVICE_RESPONSE_MSG *)pRecvPacket->pBuffer;
++
++ if ((pResponseMsg->MessageID != HTC_MSG_CONNECT_SERVICE_RESPONSE_ID) ||
++ (pRecvPacket->ActualLength < sizeof(HTC_CONNECT_SERVICE_RESPONSE_MSG))) {
++ /* this message is not valid */
++ AR_DEBUG_ASSERT(FALSE);
++ status = A_EPROTO;
++ break;
++ }
++
++ pConnectResp->ConnectRespCode = pResponseMsg->Status;
++ /* check response status */
++ if (pResponseMsg->Status != HTC_SERVICE_SUCCESS) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
++ (" Target failed service 0x%X connect request (status:%d)\n",
++ pResponseMsg->ServiceID, pResponseMsg->Status));
++ status = A_EPROTO;
++ break;
++ }
++
++ assignedEndpoint = pResponseMsg->EndpointID;
++ maxMsgSize = pResponseMsg->MaxMsgSize;
++
++ if ((pConnectResp->pMetaData != NULL) &&
++ (pResponseMsg->ServiceMetaLength > 0) &&
++ (pResponseMsg->ServiceMetaLength <= HTC_SERVICE_META_DATA_MAX_LENGTH)) {
++ /* caller supplied a buffer and the target responded with data */
++ int copyLength = min((int)pConnectResp->BufferLength, (int)pResponseMsg->ServiceMetaLength);
++ /* copy the meta data */
++ A_MEMCPY(pConnectResp->pMetaData,
++ ((A_UINT8 *)pResponseMsg) + sizeof(HTC_CONNECT_SERVICE_RESPONSE_MSG),
++ copyLength);
++ pConnectResp->ActualLength = copyLength;
++ }
++
++ }
++
++ /* the rest of these are parameter checks so set the error status */
++ status = A_EPROTO;
++
++ if (assignedEndpoint >= ENDPOINT_MAX) {
++ AR_DEBUG_ASSERT(FALSE);
++ break;
++ }
++
++ if (0 == maxMsgSize) {
++ AR_DEBUG_ASSERT(FALSE);
++ break;
++ }
++
++ pEndpoint = &target->EndPoint[assignedEndpoint];
++
++ if (pEndpoint->ServiceID != 0) {
++ /* endpoint already in use! */
++ AR_DEBUG_ASSERT(FALSE);
++ break;
++ }
++
++ /* return assigned endpoint to caller */
++ pConnectResp->Endpoint = assignedEndpoint;
++ pConnectResp->MaxMsgLength = maxMsgSize;
++
++ /* setup the endpoint */
++ pEndpoint->ServiceID = pConnectReq->ServiceID; /* this marks the endpoint in use */
++ pEndpoint->MaxTxQueueDepth = pConnectReq->MaxSendQueueDepth;
++ pEndpoint->MaxMsgLength = maxMsgSize;
++ /* copy all the callbacks */
++ pEndpoint->EpCallBacks = pConnectReq->EpCallbacks;
++ INIT_HTC_PACKET_QUEUE(&pEndpoint->RxBuffers);
++ INIT_HTC_PACKET_QUEUE(&pEndpoint->TxQueue);
++ /* set the credit distribution info for this endpoint, this information is
++ * passed back to the credit distribution callback function */
++ pEndpoint->CreditDist.ServiceID = pConnectReq->ServiceID;
++ pEndpoint->CreditDist.pHTCReserved = pEndpoint;
++ pEndpoint->CreditDist.Endpoint = assignedEndpoint;
++ pEndpoint->CreditDist.TxCreditSize = target->TargetCreditSize;
++ pEndpoint->CreditDist.TxCreditsPerMaxMsg = maxMsgSize / target->TargetCreditSize;
++
++ if (0 == pEndpoint->CreditDist.TxCreditsPerMaxMsg) {
++ pEndpoint->CreditDist.TxCreditsPerMaxMsg = 1;
++ }
++
++ status = A_OK;
++
++ } while (FALSE);
++
++ if (pSendPacket != NULL) {
++ HTC_FREE_CONTROL_TX(target,pSendPacket);
++ }
++
++ if (pRecvPacket != NULL) {
++ HTC_FREE_CONTROL_RX(target,pRecvPacket);
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("-HTCConnectService \n"));
++
++ return status;
++}
++
++static void AddToEndpointDistList(HTC_TARGET *target, HTC_ENDPOINT_CREDIT_DIST *pEpDist)
++{
++ HTC_ENDPOINT_CREDIT_DIST *pCurEntry,*pLastEntry;
++
++ if (NULL == target->EpCreditDistributionListHead) {
++ target->EpCreditDistributionListHead = pEpDist;
++ pEpDist->pNext = NULL;
++ pEpDist->pPrev = NULL;
++ return;
++ }
++
++ /* queue to the end of the list, this does not have to be very
++ * fast since this list is built at startup time */
++ pCurEntry = target->EpCreditDistributionListHead;
++
++ while (pCurEntry) {
++ pLastEntry = pCurEntry;
++ pCurEntry = pCurEntry->pNext;
++ }
++
++ pLastEntry->pNext = pEpDist;
++ pEpDist->pPrev = pLastEntry;
++ pEpDist->pNext = NULL;
++}
++
++
++
++/* default credit init callback */
++static void HTCDefaultCreditInit(void *Context,
++ HTC_ENDPOINT_CREDIT_DIST *pEPList,
++ int TotalCredits)
++{
++ HTC_ENDPOINT_CREDIT_DIST *pCurEpDist;
++ int totalEps = 0;
++ int creditsPerEndpoint;
++
++ pCurEpDist = pEPList;
++ /* first run through the list and figure out how many endpoints we are dealing with */
++ while (pCurEpDist != NULL) {
++ pCurEpDist = pCurEpDist->pNext;
++ totalEps++;
++ }
++
++ /* even distribution */
++ creditsPerEndpoint = TotalCredits/totalEps;
++
++ pCurEpDist = pEPList;
++ /* run through the list and set minimum and normal credits and
++ * provide the endpoint with some credits to start */
++ while (pCurEpDist != NULL) {
++
++ if (creditsPerEndpoint < pCurEpDist->TxCreditsPerMaxMsg) {
++ /* too many endpoints and not enough credits */
++ AR_DEBUG_ASSERT(FALSE);
++ break;
++ }
++ /* our minimum is set for at least 1 max message */
++ pCurEpDist->TxCreditsMin = pCurEpDist->TxCreditsPerMaxMsg;
++ /* this value is ignored by our credit alg, since we do
++ * not dynamically adjust credits, this is the policy of
++ * the "default" credit distribution, something simple and easy */
++ pCurEpDist->TxCreditsNorm = 0xFFFF;
++ /* give the endpoint minimum credits */
++ pCurEpDist->TxCredits = creditsPerEndpoint;
++ pCurEpDist->TxCreditsAssigned = creditsPerEndpoint;
++ pCurEpDist = pCurEpDist->pNext;
++ }
++
++}
++
++/* default credit distribution callback, NOTE, this callback holds the TX lock */
++void HTCDefaultCreditDist(void *Context,
++ HTC_ENDPOINT_CREDIT_DIST *pEPDistList,
++ HTC_CREDIT_DIST_REASON Reason)
++{
++ HTC_ENDPOINT_CREDIT_DIST *pCurEpDist;
++
++ if (Reason == HTC_CREDIT_DIST_SEND_COMPLETE) {
++ pCurEpDist = pEPDistList;
++ /* simple distribution */
++ while (pCurEpDist != NULL) {
++ if (pCurEpDist->TxCreditsToDist > 0) {
++ /* just give the endpoint back the credits */
++ pCurEpDist->TxCredits += pCurEpDist->TxCreditsToDist;
++ pCurEpDist->TxCreditsToDist = 0;
++ }
++ pCurEpDist = pCurEpDist->pNext;
++ }
++ }
++
++ /* note we do not need to handle the other reason codes as this is a very
++ * simple distribution scheme, no need to seek for more credits or handle inactivity */
++}
++
++void HTCSetCreditDistribution(HTC_HANDLE HTCHandle,
++ void *pCreditDistContext,
++ HTC_CREDIT_DIST_CALLBACK CreditDistFunc,
++ HTC_CREDIT_INIT_CALLBACK CreditInitFunc,
++ HTC_SERVICE_ID ServicePriorityOrder[],
++ int ListLength)
++{
++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
++ int i;
++ int ep;
++
++ if (CreditInitFunc != NULL) {
++ /* caller has supplied their own distribution functions */
++ target->InitCredits = CreditInitFunc;
++ AR_DEBUG_ASSERT(CreditDistFunc != NULL);
++ target->DistributeCredits = CreditDistFunc;
++ target->pCredDistContext = pCreditDistContext;
++ } else {
++ /* caller wants HTC to do distribution */
++ /* if caller wants service to handle distributions then
++ * it must set both of these to NULL! */
++ AR_DEBUG_ASSERT(CreditDistFunc == NULL);
++ target->InitCredits = HTCDefaultCreditInit;
++ target->DistributeCredits = HTCDefaultCreditDist;
++ target->pCredDistContext = target;
++ }
++
++ /* always add HTC control endpoint first, we only expose the list after the
++ * first one, this is added for TX queue checking */
++ AddToEndpointDistList(target, &target->EndPoint[ENDPOINT_0].CreditDist);
++
++ /* build the list of credit distribution structures in priority order
++ * supplied by the caller, these will follow endpoint 0 */
++ for (i = 0; i < ListLength; i++) {
++ /* match services with endpoints and add the endpoints to the distribution list
++ * in FIFO order */
++ for (ep = ENDPOINT_1; ep < ENDPOINT_MAX; ep++) {
++ if (target->EndPoint[ep].ServiceID == ServicePriorityOrder[i]) {
++ /* queue this one to the list */
++ AddToEndpointDistList(target, &target->EndPoint[ep].CreditDist);
++ break;
++ }
++ }
++ AR_DEBUG_ASSERT(ep < ENDPOINT_MAX);
++ }
++
++}
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_config.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_config.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,27 @@
++#ifndef _A_CONFIG_H_
++#define _A_CONFIG_H_
++/*
++ * Copyright (c) 2004-2005 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++/*
++ * This file contains software configuration options that enables
++ * specific software "features"
++ */
++#include "../ar6000/config_linux.h"
++
++#endif
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_debug.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_debug.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,41 @@
++#ifndef _A_DEBUG_H_
++#define _A_DEBUG_H_
++/*
++ * Copyright (c) 2004-2006 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include <a_types.h>
++#include <a_osapi.h>
++
++#define DBG_INFO 0x00000001
++#define DBG_ERROR 0x00000002
++#define DBG_WARNING 0x00000004
++#define DBG_SDIO 0x00000008
++#define DBG_HIF 0x00000010
++#define DBG_HTC 0x00000020
++#define DBG_WMI 0x00000040
++#define DBG_WMI2 0x00000080
++#define DBG_DRIVER 0x00000100
++
++#define DBG_DEFAULTS (DBG_ERROR|DBG_WARNING)
++
++#include "../ar6000/debug_linux.h"
++
++#endif
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_drv_api.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_drv_api.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,185 @@
++#ifndef _A_DRV_API_H_
++#define _A_DRV_API_H_
++/*
++ * Copyright (c) 2004-2006 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++/****************************************************************************/
++/****************************************************************************/
++/** **/
++/** WMI related hooks **/
++/** **/
++/****************************************************************************/
++/****************************************************************************/
++
++#include <ar6000_api.h>
++
++#define A_WMI_CHANNELLIST_RX(devt, numChan, chanList) \
++ ar6000_channelList_rx((devt), (numChan), (chanList))
++
++#define A_WMI_SET_NUMDATAENDPTS(devt, num) \
++ ar6000_set_numdataendpts((devt), (num))
++
++#define A_WMI_CONTROL_TX(devt, osbuf, streamID) \
++ ar6000_control_tx((devt), (osbuf), (streamID))
++
++#define A_WMI_TARGETSTATS_EVENT(devt, pStats) \
++ ar6000_targetStats_event((devt), (pStats))
++
++#define A_WMI_SCANCOMPLETE_EVENT(devt, status) \
++ ar6000_scanComplete_event((devt), (status))
++
++#ifdef CONFIG_HOST_DSET_SUPPORT
++
++#define A_WMI_DSET_DATA_REQ(devt, access_cookie, offset, length, targ_buf, targ_reply_fn, targ_reply_arg) \
++ ar6000_dset_data_req((devt), (access_cookie), (offset), (length), (targ_buf), (targ_reply_fn), (targ_reply_arg))
++
++#define A_WMI_DSET_CLOSE(devt, access_cookie) \
++ ar6000_dset_close((devt), (access_cookie))
++
++#endif
++
++#define A_WMI_DSET_OPEN_REQ(devt, id, targ_handle, targ_reply_fn, targ_reply_arg) \
++ ar6000_dset_open_req((devt), (id), (targ_handle), (targ_reply_fn), (targ_reply_arg))
++
++#define A_WMI_CONNECT_EVENT(devt, channel, bssid, listenInterval, beaconInterval, networkType, beaconIeLen, assocReqLen, assocRespLen, assocInfo) \
++ ar6000_connect_event((devt), (channel), (bssid), (listenInterval), (beaconInterval), (networkType), (beaconIeLen), (assocReqLen), (assocRespLen), (assocInfo))
++
++#define A_WMI_REGDOMAIN_EVENT(devt, regCode) \
++ ar6000_regDomain_event((devt), (regCode))
++
++#define A_WMI_NEIGHBORREPORT_EVENT(devt, numAps, info) \
++ ar6000_neighborReport_event((devt), (numAps), (info))
++
++#define A_WMI_DISCONNECT_EVENT(devt, reason, bssid, assocRespLen, assocInfo, protocolReasonStatus) \
++ ar6000_disconnect_event((devt), (reason), (bssid), (assocRespLen), (assocInfo), (protocolReasonStatus))
++
++#define A_WMI_TKIP_MICERR_EVENT(devt, keyid, ismcast) \
++ ar6000_tkip_micerr_event((devt), (keyid), (ismcast))
++
++#define A_WMI_BITRATE_RX(devt, rateKbps) \
++ ar6000_bitrate_rx((devt), (rateKbps))
++
++#define A_WMI_TXPWR_RX(devt, txPwr) \
++ ar6000_txPwr_rx((devt), (txPwr))
++
++#define A_WMI_READY_EVENT(devt, datap, phyCap) \
++ ar6000_ready_event((devt), (datap), (phyCap))
++
++#define A_WMI_DBGLOG_INIT_DONE(ar) \
++ ar6000_dbglog_init_done(ar);
++
++#define A_WMI_RSSI_THRESHOLD_EVENT(devt, newThreshold, rssi) \
++ ar6000_rssiThreshold_event((devt), (newThreshold), (rssi))
++
++#define A_WMI_REPORT_ERROR_EVENT(devt, errorVal) \
++ ar6000_reportError_event((devt), (errorVal))
++
++#define A_WMI_ROAM_TABLE_EVENT(devt, pTbl) \
++ ar6000_roam_tbl_event((devt), (pTbl))
++
++#define A_WMI_ROAM_DATA_EVENT(devt, p) \
++ ar6000_roam_data_event((devt), (p))
++
++#define A_WMI_WOW_LIST_EVENT(devt, num_filters, wow_filters) \
++ ar6000_wow_list_event((devt), (num_filters), (wow_filters))
++
++#define A_WMI_CAC_EVENT(devt, ac, cac_indication, statusCode, tspecSuggestion) \
++ ar6000_cac_event((devt), (ac), (cac_indication), (statusCode), (tspecSuggestion))
++
++#define A_WMI_IPTOS_TO_USERPRIORITY(pkt) \
++ ar6000_iptos_to_userPriority((pkt))
++
++#define A_WMI_PMKID_LIST_EVENT(devt, num_pmkid, pmkid_list) \
++ ar6000_pmkid_list_event((devt), (num_pmkid), (pmkid_list))
++
++#ifdef CONFIG_HOST_GPIO_SUPPORT
++
++#define A_WMI_GPIO_INTR_RX(intr_mask, input_values) \
++ ar6000_gpio_intr_rx((intr_mask), (input_values))
++
++#define A_WMI_GPIO_DATA_RX(reg_id, value) \
++ ar6000_gpio_data_rx((reg_id), (value))
++
++#define A_WMI_GPIO_ACK_RX() \
++ ar6000_gpio_ack_rx()
++
++#endif
++
++#ifdef SEND_EVENT_TO_APP
++
++#define A_WMI_SEND_EVENT_TO_APP(ar, eventId, datap, len) \
++ ar6000_send_event_to_app((ar), (eventId), (datap), (len))
++
++#else
++
++#define A_WMI_SEND_EVENT_TO_APP(ar, eventId, datap, len)
++
++#endif
++
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++#define A_WMI_TCMD_RX_REPORT_EVENT(devt, results, len) \
++ ar6000_tcmd_rx_report_event((devt), (results), (len))
++#endif
++
++#define A_WMI_HBCHALLENGERESP_EVENT(devt, cookie, source) \
++ ar6000_hbChallengeResp_event((devt), (cookie), (source))
++
++#define A_WMI_TX_RETRY_ERR_EVENT(devt) \
++ ar6000_tx_retry_err_event((devt))
++
++#define A_WMI_SNR_THRESHOLD_EVENT_RX(devt, newThreshold, snr) \
++ ar6000_snrThresholdEvent_rx((devt), (newThreshold), (snr))
++
++#define A_WMI_LQ_THRESHOLD_EVENT_RX(devt, range, lqVal) \
++ ar6000_lqThresholdEvent_rx((devt), (range), (lqVal))
++
++#define A_WMI_RATEMASK_RX(devt, ratemask) \
++ ar6000_ratemask_rx((devt), (ratemask))
++
++#define A_WMI_KEEPALIVE_RX(devt, configured) \
++ ar6000_keepalive_rx((devt), (configured))
++
++#define A_WMI_BSSINFO_EVENT_RX(ar, datp, len) \
++ ar6000_bssInfo_event_rx((ar), (datap), (len))
++
++#define A_WMI_DBGLOG_EVENT(ar, dropped, buffer, length) \
++ ar6000_dbglog_event((ar), (dropped), (buffer), (length));
++
++#define A_WMI_STREAM_TX_ACTIVE(devt,trafficClass) \
++ ar6000_indicate_tx_activity((devt),(trafficClass), TRUE)
++
++#define A_WMI_STREAM_TX_INACTIVE(devt,trafficClass) \
++ ar6000_indicate_tx_activity((devt),(trafficClass), FALSE)
++
++/****************************************************************************/
++/****************************************************************************/
++/** **/
++/** HTC related hooks **/
++/** **/
++/****************************************************************************/
++/****************************************************************************/
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_drv.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_drv.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,28 @@
++#ifndef _A_DRV_H_
++#define _A_DRV_H_
++/*
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/a_drv.h#1 $
++ *
++ * This file contains the definitions of the basic atheros data types.
++ * It is used to map the data types in atheros files to a platform specific
++ * type.
++ *
++ * Copyright 2003-2005 Atheros Communications, Inc., All Rights Reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "../ar6000/athdrv_linux.h"
++
++#endif /* _ADRV_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_osapi.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_osapi.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,28 @@
++#ifndef _A_OSAPI_H_
++#define _A_OSAPI_H_
++/*
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/a_osapi.h#1 $
++ *
++ * This file contains the definitions of the basic atheros data types.
++ * It is used to map the data types in atheros files to a platform specific
++ * type.
++ *
++ * Copyright 2003-2005 Atheros Communications, Inc., All Rights Reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "../ar6000/osapi_linux.h"
++
++#endif /* _OSAPI_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ar6000_api.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ar6000_api.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,29 @@
++#ifndef _AR6000_API_H_
++#define _AR6000_API_H_
++/*
++ * Copyright (c) 2004-2005 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * This file contains the API to access the OS dependent atheros host driver
++ * by the WMI or WLAN generic modules.
++ *
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/ar6000_api.h#1 $
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "../ar6000/ar6xapi_linux.h"
++
++#endif /* _AR6000_API_H */
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ar6000_diag.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ar6000_diag.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,38 @@
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifndef AR6000_DIAG_H_
++#define AR6000_DIAG_H_
++
++
++A_STATUS
++ar6000_ReadRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data);
++
++A_STATUS
++ar6000_WriteRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data);
++
++A_STATUS
++ar6000_ReadDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address,
++ A_UCHAR *data, A_UINT32 length);
++
++A_STATUS
++ar6000_WriteDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address,
++ A_UCHAR *data, A_UINT32 length);
++
++#endif /*AR6000_DIAG_H_*/
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6001_regdump.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6001_regdump.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,100 @@
++/*
++ * Copyright (c) 2006 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ */
++
++#ifndef __AR6000_REGDUMP_H__
++#define __AR6000_REGDUMP_H__
++
++#if !defined(__ASSEMBLER__)
++/*
++ * Target CPU state at the time of failure is reflected
++ * in a register dump, which the Host can fetch through
++ * the diagnostic window.
++ */
++
++struct MIPS_exception_frame_s {
++ A_UINT32 pc; /* Program Counter */
++ A_UINT32 at; /* MIPS General Purpose registers */
++ A_UINT32 v0;
++ A_UINT32 v1;
++ A_UINT32 a0;
++ A_UINT32 a1;
++ A_UINT32 a2;
++ A_UINT32 a3;
++ A_UINT32 t0;
++ A_UINT32 t1;
++ A_UINT32 t2;
++ A_UINT32 t3;
++ A_UINT32 t4;
++ A_UINT32 t5;
++ A_UINT32 t6;
++ A_UINT32 t7;
++ A_UINT32 s0;
++ A_UINT32 s1;
++ A_UINT32 s2;
++ A_UINT32 s3;
++ A_UINT32 s4;
++ A_UINT32 s5;
++ A_UINT32 s6;
++ A_UINT32 s7;
++ A_UINT32 t8;
++ A_UINT32 t9;
++ A_UINT32 k0;
++ A_UINT32 k1;
++ A_UINT32 gp;
++ A_UINT32 sp;
++ A_UINT32 s8;
++ A_UINT32 ra;
++ A_UINT32 cause; /* Selected coprocessor regs */
++ A_UINT32 status;
++};
++typedef struct MIPS_exception_frame_s CPU_exception_frame_t;
++
++#endif
++
++/*
++ * Offsets into MIPS_exception_frame structure, for use in assembler code
++ * MUST MATCH C STRUCTURE ABOVE
++ */
++#define RD_pc 0
++#define RD_at 1
++#define RD_v0 2
++#define RD_v1 3
++#define RD_a0 4
++#define RD_a1 5
++#define RD_a2 6
++#define RD_a3 7
++#define RD_t0 8
++#define RD_t1 9
++#define RD_t2 10
++#define RD_t3 11
++#define RD_t4 12
++#define RD_t5 13
++#define RD_t6 14
++#define RD_t7 15
++#define RD_s0 16
++#define RD_s1 17
++#define RD_s2 18
++#define RD_s3 19
++#define RD_s4 20
++#define RD_s5 21
++#define RD_s6 22
++#define RD_s7 23
++#define RD_t8 24
++#define RD_t9 25
++#define RD_k0 26
++#define RD_k1 27
++#define RD_gp 28
++#define RD_sp 29
++#define RD_s8 30
++#define RD_ra 31
++#define RD_cause 32
++#define RD_status 33
++
++#define RD_SIZE (34*4) /* Space for this number of words */
++
++#endif /* __AR6000_REGDUMP_H__ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6Khwreg.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6Khwreg.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,147 @@
++/*
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ * This file contains the definitions for AR6001 registers
++ * that may be directly manipulated by Host software.
++ */
++
++#ifndef __AR6KHWREG_H__
++#define __AR6KHWREG_H__
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++/* Host registers */
++#define HOST_INT_STATUS_ADDRESS 0x00000400
++#define CPU_INT_STATUS_ADDRESS 0x00000401
++#define ERROR_INT_STATUS_ADDRESS 0x00000402
++#define INT_STATUS_ENABLE_ADDRESS 0x00000418
++#define CPU_INT_STATUS_ENABLE_ADDRESS 0x00000419
++#define COUNT_ADDRESS 0x00000420
++#define COUNT_DEC_ADDRESS 0x00000440
++#define WINDOW_DATA_ADDRESS 0x00000474
++#define WINDOW_WRITE_ADDR_ADDRESS 0x00000478
++#define WINDOW_READ_ADDR_ADDRESS 0x0000047c
++
++/* Target addresses */
++#define RESET_CONTROL_ADDRESS 0x0c000000
++#define MC_REMAP_VALID_ADDRESS 0x0c004080
++#define MC_REMAP_SIZE_ADDRESS 0x0c004100
++#define MC_REMAP_COMPARE_ADDRESS 0x0c004180
++#define MC_REMAP_TARGET_ADDRESS 0x0c004200
++#define LOCAL_COUNT_ADDRESS 0x0c014080
++#define LOCAL_SCRATCH_ADDRESS 0x0c0140c0
++
++
++#define INT_STATUS_ENABLE_ERROR_MSB 7
++#define INT_STATUS_ENABLE_ERROR_LSB 7
++#define INT_STATUS_ENABLE_ERROR_MASK 0x00000080
++#define INT_STATUS_ENABLE_ERROR_GET(x) (((x) & INT_STATUS_ENABLE_ERROR_MASK) >> INT_STATUS_ENABLE_ERROR_LSB)
++#define INT_STATUS_ENABLE_ERROR_SET(x) (((x) << INT_STATUS_ENABLE_ERROR_LSB) & INT_STATUS_ENABLE_ERROR_MASK)
++
++#define INT_STATUS_ENABLE_CPU_MSB 6
++#define INT_STATUS_ENABLE_CPU_LSB 6
++#define INT_STATUS_ENABLE_CPU_MASK 0x00000040
++#define INT_STATUS_ENABLE_CPU_GET(x) (((x) & INT_STATUS_ENABLE_CPU_MASK) >> INT_STATUS_ENABLE_CPU_LSB)
++#define INT_STATUS_ENABLE_CPU_SET(x) (((x) << INT_STATUS_ENABLE_CPU_LSB) & INT_STATUS_ENABLE_CPU_MASK)
++
++#define INT_STATUS_ENABLE_COUNTER_MSB 4
++#define INT_STATUS_ENABLE_COUNTER_LSB 4
++#define INT_STATUS_ENABLE_COUNTER_MASK 0x00000010
++#define INT_STATUS_ENABLE_COUNTER_GET(x) (((x) & INT_STATUS_ENABLE_COUNTER_MASK) >> INT_STATUS_ENABLE_COUNTER_LSB)
++#define INT_STATUS_ENABLE_COUNTER_SET(x) (((x) << INT_STATUS_ENABLE_COUNTER_LSB) & INT_STATUS_ENABLE_COUNTER_MASK)
++
++#define INT_STATUS_ENABLE_MBOX_DATA_MSB 3
++#define INT_STATUS_ENABLE_MBOX_DATA_LSB 0
++#define INT_STATUS_ENABLE_MBOX_DATA_MASK 0x0000000f
++#define INT_STATUS_ENABLE_MBOX_DATA_GET(x) (((x) & INT_STATUS_ENABLE_MBOX_DATA_MASK) >> INT_STATUS_ENABLE_MBOX_DATA_LSB)
++#define INT_STATUS_ENABLE_MBOX_DATA_SET(x) (((x) << INT_STATUS_ENABLE_MBOX_DATA_LSB) & INT_STATUS_ENABLE_MBOX_DATA_MASK)
++
++#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_MSB 1
++#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB 1
++#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK 0x00000002
++#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_GET(x) (((x) & ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK) >> ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB)
++#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_SET(x) (((x) << ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB) & ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK)
++
++#define ERROR_STATUS_ENABLE_TX_OVERFLOW_MSB 0
++#define ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB 0
++#define ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK 0x00000001
++#define ERROR_STATUS_ENABLE_TX_OVERFLOW_GET(x) (((x) & ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK) >> ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB)
++#define ERROR_STATUS_ENABLE_TX_OVERFLOW_SET(x) (((x) << ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB) & ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK)
++
++
++#define CPU_INT_STATUS_ENABLE_BIT_MSB 7
++#define CPU_INT_STATUS_ENABLE_BIT_LSB 0
++#define CPU_INT_STATUS_ENABLE_BIT_MASK 0x000000ff
++#define CPU_INT_STATUS_ENABLE_BIT_GET(x) (((x) & CPU_INT_STATUS_ENABLE_BIT_MASK) >> CPU_INT_STATUS_ENABLE_BIT_LSB)
++#define CPU_INT_STATUS_ENABLE_BIT_SET(x) (((x) << CPU_INT_STATUS_ENABLE_BIT_LSB) & CPU_INT_STATUS_ENABLE_BIT_MASK)
++
++#define COUNTER_INT_STATUS_ENABLE_BIT_MSB 7
++#define COUNTER_INT_STATUS_ENABLE_BIT_LSB 0
++#define COUNTER_INT_STATUS_ENABLE_BIT_MASK 0x000000ff
++#define COUNTER_INT_STATUS_ENABLE_BIT_GET(x) (((x) & COUNTER_INT_STATUS_ENABLE_BIT_MASK) >> COUNTER_INT_STATUS_ENABLE_BIT_LSB)
++#define COUNTER_INT_STATUS_ENABLE_BIT_SET(x) (((x) << COUNTER_INT_STATUS_ENABLE_BIT_LSB) & COUNTER_INT_STATUS_ENABLE_BIT_MASK)
++
++#define ERROR_INT_STATUS_WAKEUP_MSB 2
++#define ERROR_INT_STATUS_WAKEUP_LSB 2
++#define ERROR_INT_STATUS_WAKEUP_MASK 0x00000004
++#define ERROR_INT_STATUS_WAKEUP_GET(x) (((x) & ERROR_INT_STATUS_WAKEUP_MASK) >> ERROR_INT_STATUS_WAKEUP_LSB)
++#define ERROR_INT_STATUS_WAKEUP_SET(x) (((x) << ERROR_INT_STATUS_WAKEUP_LSB) & ERROR_INT_STATUS_WAKEUP_MASK)
++
++#define ERROR_INT_STATUS_RX_UNDERFLOW_MSB 1
++#define ERROR_INT_STATUS_RX_UNDERFLOW_LSB 1
++#define ERROR_INT_STATUS_RX_UNDERFLOW_MASK 0x00000002
++#define ERROR_INT_STATUS_RX_UNDERFLOW_GET(x) (((x) & ERROR_INT_STATUS_RX_UNDERFLOW_MASK) >> ERROR_INT_STATUS_RX_UNDERFLOW_LSB)
++#define ERROR_INT_STATUS_RX_UNDERFLOW_SET(x) (((x) << ERROR_INT_STATUS_RX_UNDERFLOW_LSB) & ERROR_INT_STATUS_RX_UNDERFLOW_MASK)
++
++#define ERROR_INT_STATUS_TX_OVERFLOW_MSB 0
++#define ERROR_INT_STATUS_TX_OVERFLOW_LSB 0
++#define ERROR_INT_STATUS_TX_OVERFLOW_MASK 0x00000001
++#define ERROR_INT_STATUS_TX_OVERFLOW_GET(x) (((x) & ERROR_INT_STATUS_TX_OVERFLOW_MASK) >> ERROR_INT_STATUS_TX_OVERFLOW_LSB)
++#define ERROR_INT_STATUS_TX_OVERFLOW_SET(x) (((x) << ERROR_INT_STATUS_TX_OVERFLOW_LSB) & ERROR_INT_STATUS_TX_OVERFLOW_MASK)
++
++#define HOST_INT_STATUS_ERROR_MSB 7
++#define HOST_INT_STATUS_ERROR_LSB 7
++#define HOST_INT_STATUS_ERROR_MASK 0x00000080
++#define HOST_INT_STATUS_ERROR_GET(x) (((x) & HOST_INT_STATUS_ERROR_MASK) >> HOST_INT_STATUS_ERROR_LSB)
++#define HOST_INT_STATUS_ERROR_SET(x) (((x) << HOST_INT_STATUS_ERROR_LSB) & HOST_INT_STATUS_ERROR_MASK)
++
++#define HOST_INT_STATUS_CPU_MSB 6
++#define HOST_INT_STATUS_CPU_LSB 6
++#define HOST_INT_STATUS_CPU_MASK 0x00000040
++#define HOST_INT_STATUS_CPU_GET(x) (((x) & HOST_INT_STATUS_CPU_MASK) >> HOST_INT_STATUS_CPU_LSB)
++#define HOST_INT_STATUS_CPU_SET(x) (((x) << HOST_INT_STATUS_CPU_LSB) & HOST_INT_STATUS_CPU_MASK)
++
++#define HOST_INT_STATUS_COUNTER_MSB 4
++#define HOST_INT_STATUS_COUNTER_LSB 4
++#define HOST_INT_STATUS_COUNTER_MASK 0x00000010
++#define HOST_INT_STATUS_COUNTER_GET(x) (((x) & HOST_INT_STATUS_COUNTER_MASK) >> HOST_INT_STATUS_COUNTER_LSB)
++#define HOST_INT_STATUS_COUNTER_SET(x) (((x) << HOST_INT_STATUS_COUNTER_LSB) & HOST_INT_STATUS_COUNTER_MASK)
++
++#define RESET_CONTROL_WARM_RST_MSB 7
++#define RESET_CONTROL_WARM_RST_LSB 7
++#define RESET_CONTROL_WARM_RST_MASK 0x00000080
++#define RESET_CONTROL_WARM_RST_GET(x) (((x) & RESET_CONTROL_WARM_RST_MASK) >> RESET_CONTROL_WARM_RST_LSB)
++#define RESET_CONTROL_WARM_RST_SET(x) (((x) << RESET_CONTROL_WARM_RST_LSB) & RESET_CONTROL_WARM_RST_MASK)
++
++#define RESET_CONTROL_COLD_RST_MSB 8
++#define RESET_CONTROL_COLD_RST_LSB 8
++#define RESET_CONTROL_COLD_RST_MASK 0x00000100
++#define RESET_CONTROL_COLD_RST_GET(x) (((x) & RESET_CONTROL_COLD_RST_MASK) >> RESET_CONTROL_COLD_RST_LSB)
++#define RESET_CONTROL_COLD_RST_SET(x) (((x) << RESET_CONTROL_COLD_RST_LSB) & RESET_CONTROL_COLD_RST_MASK)
++
++#define RESET_CAUSE_LAST_MSB 2
++#define RESET_CAUSE_LAST_LSB 0
++#define RESET_CAUSE_LAST_MASK 0x00000007
++#define RESET_CAUSE_LAST_GET(x) (((x) & RESET_CAUSE_LAST_MASK) >> RESET_CAUSE_LAST_LSB)
++#define RESET_CAUSE_LAST_SET(x) (((x) << RESET_CAUSE_LAST_LSB) & RESET_CAUSE_LAST_MASK)
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* __AR6KHWREG_H__ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6K_version.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6K_version.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,36 @@
++#define __VER_MAJOR_ 2
++#define __VER_MINOR_ 0
++#define __VER_PATCH_ 0
++
++
++/*
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ * The makear6ksdk script (used for release builds) modifies the following line.
++ */
++#define __BUILD_NUMBER_ 18
++
++
++/* Format of the version number. */
++#define VER_MAJOR_BIT_OFFSET 28
++#define VER_MINOR_BIT_OFFSET 24
++#define VER_PATCH_BIT_OFFSET 16
++#define VER_BUILD_NUM_BIT_OFFSET 0
++
++
++/*
++ * The version has the following format:
++ * Bits 28-31: Major version
++ * Bits 24-27: Minor version
++ * Bits 16-23: Patch version
++ * Bits 0-15: Build number (automatically generated during build process )
++ * E.g. Build 1.1.3.7 would be represented as 0x11030007.
++ *
++ * DO NOT split the following macro into multiple lines as this may confuse the build scripts.
++ */
++#define AR6K_SW_VERSION ( ( __VER_MAJOR_ << VER_MAJOR_BIT_OFFSET ) + ( __VER_MINOR_ << VER_MINOR_BIT_OFFSET ) + ( __VER_PATCH_ << VER_PATCH_BIT_OFFSET ) + ( __BUILD_NUMBER_ << VER_BUILD_NUM_BIT_OFFSET ) )
++
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6K_version.h.NEW
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6K_version.h.NEW 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,36 @@
++#define __VER_MAJOR_ 2
++#define __VER_MINOR_ 0
++#define __VER_PATCH_ 0
++
++
++/*
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ * The makear6ksdk script (used for release builds) modifies the following line.
++ */
++#define __BUILD_NUMBER_ 18
++
++
++/* Format of the version number. */
++#define VER_MAJOR_BIT_OFFSET 28
++#define VER_MINOR_BIT_OFFSET 24
++#define VER_PATCH_BIT_OFFSET 16
++#define VER_BUILD_NUM_BIT_OFFSET 0
++
++
++/*
++ * The version has the following format:
++ * Bits 28-31: Major version
++ * Bits 24-27: Minor version
++ * Bits 16-23: Patch version
++ * Bits 0-15: Build number (automatically generated during build process )
++ * E.g. Build 1.1.3.7 would be represented as 0x11030007.
++ *
++ * DO NOT split the following macro into multiple lines as this may confuse the build scripts.
++ */
++#define AR6K_SW_VERSION ( ( __VER_MAJOR_ << VER_MAJOR_BIT_OFFSET ) + ( __VER_MINOR_ << VER_MINOR_BIT_OFFSET ) + ( __VER_PATCH_ << VER_PATCH_BIT_OFFSET ) + ( __BUILD_NUMBER_ << VER_BUILD_NUM_BIT_OFFSET ) )
++
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athdefs.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athdefs.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,85 @@
++#ifndef __ATHDEFS_H__
++#define __ATHDEFS_H__
++
++/*
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ * This file contains definitions that may be used across both
++ * Host and Target software. Nothing here is module-dependent
++ * or platform-dependent.
++ */
++
++/*
++ * Generic error codes that can be used by hw, sta, ap, sim, dk
++ * and any other environments. Since these are enums, feel free to
++ * add any more codes that you need.
++ */
++
++typedef enum {
++ A_ERROR = -1, /* Generic error return */
++ A_OK = 0, /* success */
++ /* Following values start at 1 */
++ A_DEVICE_NOT_FOUND, /* not able to find PCI device */
++ A_NO_MEMORY, /* not able to allocate memory, not available */
++ A_MEMORY_NOT_AVAIL, /* memory region is not free for mapping */
++ A_NO_FREE_DESC, /* no free descriptors available */
++ A_BAD_ADDRESS, /* address does not match descriptor */
++ A_WIN_DRIVER_ERROR, /* used in NT_HW version, if problem at init */
++ A_REGS_NOT_MAPPED, /* registers not correctly mapped */
++ A_EPERM, /* Not superuser */
++ A_EACCES, /* Access denied */
++ A_ENOENT, /* No such entry, search failed, etc. */
++ A_EEXIST, /* The object already exists (can't create) */
++ A_EFAULT, /* Bad address fault */
++ A_EBUSY, /* Object is busy */
++ A_EINVAL, /* Invalid parameter */
++ A_EMSGSIZE, /* Inappropriate message buffer length */
++ A_ECANCELED, /* Operation canceled */
++ A_ENOTSUP, /* Operation not supported */
++ A_ECOMM, /* Communication error on send */
++ A_EPROTO, /* Protocol error */
++ A_ENODEV, /* No such device */
++ A_EDEVNOTUP, /* device is not UP */
++ A_NO_RESOURCE, /* No resources for requested operation */
++ A_HARDWARE, /* Hardware failure */
++ A_PENDING, /* Asynchronous routine; will send up results la
++ter (typically in callback) */
++ A_EBADCHANNEL, /* The channel cannot be used */
++ A_DECRYPT_ERROR, /* Decryption error */
++ A_PHY_ERROR, /* RX PHY error */
++ A_CONSUMED /* Object was consumed */
++} A_STATUS;
++
++#define A_SUCCESS(x) (x == A_OK)
++#define A_FAILED(x) (!A_SUCCESS(x))
++
++#ifndef TRUE
++#define TRUE 1
++#endif
++
++#ifndef FALSE
++#define FALSE 0
++#endif
++
++/*
++ * The following definition is WLAN specific definition
++ */
++typedef enum {
++ MODE_11A = 0, /* 11a Mode */
++ MODE_11G = 1, /* 11g + 11b Mode */
++ MODE_11B = 2, /* 11b Mode */
++ MODE_11GONLY = 3, /* 11g only Mode */
++ MODE_UNKNOWN = 4,
++ MODE_MAX = 4
++} WLAN_PHY_MODE;
++
++typedef enum {
++ WLAN_11A_CAPABILITY = 1,
++ WLAN_11G_CAPABILITY = 2,
++ WLAN_11AG_CAPABILITY = 3,
++}WLAN_CAPABILITY;
++
++#endif /* __ATHDEFS_H__ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athdrv.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athdrv.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,32 @@
++/*
++ * Copyright (c) 2004-2006 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifndef _ATHDRV_H_
++#define _ATHDRV_H_
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _ATHDRV_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athendpack.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athendpack.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,41 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ * @file: athendpack.h
++ *
++ * @abstract: end compiler-specific structure packing
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++#ifdef VXWORKS
++#endif /* VXWORKS */
++
++#ifdef LINUX
++#endif /* LINUX */
++
++#ifdef QNX
++#endif /* QNX */
++
++#ifdef INTEGRITY
++#include "integrity/athendpack_integrity.h"
++#endif /* INTEGRITY */
++
++#ifdef NUCLEUS
++#endif /* NUCLEUS */
++
++#ifdef UNDER_CE
++#include "../os/wince/include/athendpack_wince.h"
++#endif /* WINCE */
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athstartpack.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athstartpack.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,42 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ * @file: athstartpack.h
++ *
++ * @abstract: start compiler-specific structure packing
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifdef VXWORKS
++#endif /* VXWORKS */
++
++#ifdef LINUX
++#endif /* LINUX */
++
++#ifdef QNX
++#endif /* QNX */
++
++#ifdef INTEGRITY
++#include "integrity/athstartpack_integrity.h"
++#endif /* INTEGRITY */
++
++#ifdef NUCLEUS
++#endif /* NUCLEUS */
++
++#ifdef UNDER_CE
++#include "../os/wince/include/athstartpack_wince.h"
++#endif /* WINCE */
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_types.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_types.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,28 @@
++#ifndef _A_TYPES_H_
++#define _A_TYPES_H_
++/*
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/a_types.h#1 $
++ *
++ * This file contains the definitions of the basic atheros data types.
++ * It is used to map the data types in atheros files to a platform specific
++ * type.
++ *
++ * Copyright 2003-2005 Atheros Communications, Inc., All Rights Reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "../ar6000/athtypes_linux.h"
++
++#endif /* _ATHTYPES_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/bmi.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/bmi.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,100 @@
++#ifndef _BMI_H_
++#define _BMI_H_
++/*
++ * Copyright (c) 2004-2005 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ * BMI declarations and prototypes
++ */
++
++#ifdef __cplusplus
++extern "C" {
++#endif /* __cplusplus */
++
++/* Header files */
++#include "a_config.h"
++#include "athdefs.h"
++#include "a_types.h"
++#include "hif.h"
++#include "a_osapi.h"
++#include "bmi_msg.h"
++
++void
++BMIInit(void);
++
++A_STATUS
++BMIDone(HIF_DEVICE *device);
++
++A_STATUS
++BMIGetTargetInfo(HIF_DEVICE *device, struct bmi_target_info *targ_info);
++
++A_STATUS
++BMIReadMemory(HIF_DEVICE *device,
++ A_UINT32 address,
++ A_UCHAR *buffer,
++ A_UINT32 length);
++
++A_STATUS
++BMIWriteMemory(HIF_DEVICE *device,
++ A_UINT32 address,
++ A_UCHAR *buffer,
++ A_UINT32 length);
++
++A_STATUS
++BMIExecute(HIF_DEVICE *device,
++ A_UINT32 address,
++ A_UINT32 *param);
++
++A_STATUS
++BMISetAppStart(HIF_DEVICE *device,
++ A_UINT32 address);
++
++A_STATUS
++BMIReadSOCRegister(HIF_DEVICE *device,
++ A_UINT32 address,
++ A_UINT32 *param);
++
++A_STATUS
++BMIWriteSOCRegister(HIF_DEVICE *device,
++ A_UINT32 address,
++ A_UINT32 param);
++
++A_STATUS
++BMIrompatchInstall(HIF_DEVICE *device,
++ A_UINT32 ROM_addr,
++ A_UINT32 RAM_addr,
++ A_UINT32 nbytes,
++ A_UINT32 do_activate,
++ A_UINT32 *patch_id);
++
++A_STATUS
++BMIrompatchUninstall(HIF_DEVICE *device,
++ A_UINT32 rompatch_id);
++
++A_STATUS
++BMIrompatchActivate(HIF_DEVICE *device,
++ A_UINT32 rompatch_count,
++ A_UINT32 *rompatch_list);
++
++A_STATUS
++BMIrompatchDeactivate(HIF_DEVICE *device,
++ A_UINT32 rompatch_count,
++ A_UINT32 *rompatch_list);
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _BMI_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/bmi_msg.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/bmi_msg.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,199 @@
++#ifndef __BMI_MSG_H__
++#define __BMI_MSG_H__
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++/*
++ * Bootloader Messaging Interface (BMI)
++ *
++ * BMI is a very simple messaging interface used during initialization
++ * to read memory, write memory, execute code, and to define an
++ * application entry PC.
++ *
++ * It is used to download an application to AR6K, to provide
++ * patches to code that is already resident on AR6K, and generally
++ * to examine and modify state. The Host has an opportunity to use
++ * BMI only once during bootup. Once the Host issues a BMI_DONE
++ * command, this opportunity ends.
++ *
++ * The Host writes BMI requests to mailbox0, and reads BMI responses
++ * from mailbox0. BMI requests all begin with a command
++ * (see below for specific commands), and are followed by
++ * command-specific data.
++ *
++ * Flow control:
++ * The Host can only issue a command once the Target gives it a
++ * "BMI Command Credit", using AR6K Counter #4. As soon as the
++ * Target has completed a command, it issues another BMI Command
++ * Credit (so the Host can issue the next command).
++ *
++ * BMI handles all required Target-side cache flushing.
++ */
++
++
++/* Maximum data size used for BMI transfers */
++#define BMI_DATASZ_MAX 32
++
++/* BMI Commands */
++
++#define BMI_NO_COMMAND 0
++
++#define BMI_DONE 1
++ /*
++ * Semantics: Host is done using BMI
++ * Request format:
++ * A_UINT32 command (BMI_DONE)
++ * Response format: none
++ */
++
++#define BMI_READ_MEMORY 2
++ /*
++ * Semantics: Host reads AR6K memory
++ * Request format:
++ * A_UINT32 command (BMI_READ_MEMORY)
++ * A_UINT32 address
++ * A_UINT32 length, at most BMI_DATASZ_MAX
++ * Response format:
++ * A_UINT8 data[length]
++ */
++
++#define BMI_WRITE_MEMORY 3
++ /*
++ * Semantics: Host writes AR6K memory
++ * Request format:
++ * A_UINT32 command (BMI_WRITE_MEMORY)
++ * A_UINT32 address
++ * A_UINT32 length, at most BMI_DATASZ_MAX
++ * A_UINT8 data[length]
++ * Response format: none
++ */
++
++#define BMI_EXECUTE 4
++ /*
++ * Semantics: Causes AR6K to execute code
++ * Request format:
++ * A_UINT32 command (BMI_EXECUTE)
++ * A_UINT32 address
++ * A_UINT32 parameter
++ * Response format:
++ * A_UINT32 return value
++ */
++
++#define BMI_SET_APP_START 5
++ /*
++ * Semantics: Set Target application starting address
++ * Request format:
++ * A_UINT32 command (BMI_SET_APP_START)
++ * A_UINT32 address
++ * Response format: none
++ */
++
++#define BMI_READ_SOC_REGISTER 6
++ /*
++ * Semantics: Read a 32-bit Target SOC register.
++ * Request format:
++ * A_UINT32 command (BMI_READ_REGISTER)
++ * A_UINT32 address
++ * Response format:
++ * A_UINT32 value
++ */
++
++#define BMI_WRITE_SOC_REGISTER 7
++ /*
++ * Semantics: Write a 32-bit Target SOC register.
++ * Request format:
++ * A_UINT32 command (BMI_WRITE_REGISTER)
++ * A_UINT32 address
++ * A_UINT32 value
++ *
++ * Response format: none
++ */
++
++#define BMI_GET_TARGET_ID 8
++#define BMI_GET_TARGET_INFO 8
++ /*
++ * Semantics: Fetch the 4-byte Target information
++ * Request format:
++ * A_UINT32 command (BMI_GET_TARGET_ID/INFO)
++ * Response format1 (old firmware):
++ * A_UINT32 TargetVersionID
++ * Response format2 (newer firmware):
++ * A_UINT32 TARGET_VERSION_SENTINAL
++ * struct bmi_target_info;
++ */
++
++struct bmi_target_info {
++ A_UINT32 target_info_byte_count; /* size of this structure */
++ A_UINT32 target_ver; /* Target Version ID */
++ A_UINT32 target_type; /* Target type */
++};
++#define TARGET_VERSION_SENTINAL 0xffffffff
++#define TARGET_TYPE_AR6001 1
++#define TARGET_TYPE_AR6002 2
++
++
++#define BMI_ROMPATCH_INSTALL 9
++ /*
++ * Semantics: Install a ROM Patch.
++ * Request format:
++ * A_UINT32 command (BMI_ROMPATCH_INSTALL)
++ * A_UINT32 Target ROM Address
++ * A_UINT32 Target RAM Address
++ * A_UINT32 Size, in bytes
++ * A_UINT32 Activate? 1-->activate;
++ * 0-->install but do not activate
++ * Response format:
++ * A_UINT32 PatchID
++ */
++
++#define BMI_ROMPATCH_UNINSTALL 10
++ /*
++ * Semantics: Uninstall a previously-installed ROM Patch,
++ * automatically deactivating, if necessary.
++ * Request format:
++ * A_UINT32 command (BMI_ROMPATCH_UNINSTALL)
++ * A_UINT32 PatchID
++ *
++ * Response format: none
++ */
++
++#define BMI_ROMPATCH_ACTIVATE 11
++ /*
++ * Semantics: Activate a list of previously-installed ROM Patches.
++ * Request format:
++ * A_UINT32 command (BMI_ROMPATCH_ACTIVATE)
++ * A_UINT32 rompatch_count
++ * A_UINT32 PatchID[rompatch_count]
++ *
++ * Response format: none
++ */
++
++#define BMI_ROMPATCH_DEACTIVATE 12
++ /*
++ * Semantics: Deactivate a list of active ROM Patches.
++ * Request format:
++ * A_UINT32 command (BMI_ROMPATCH_DEACTIVATE)
++ * A_UINT32 rompatch_count
++ * A_UINT32 PatchID[rompatch_count]
++ *
++ * Response format: none
++ */
++
++
++#endif /* __BMI_MSG_H__ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/common_drv.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/common_drv.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,61 @@
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++
++#ifndef COMMON_DRV_H_
++#define COMMON_DRV_H_
++
++#include "hif.h"
++#include "htc_packet.h"
++
++
++
++/* structure that is the state information for the default credit distribution callback
++ * drivers should instantiate (zero-init as well) this structure in their driver instance
++ * and pass it as a context to the HTC credit distribution functions */
++typedef struct _COMMON_CREDIT_STATE_INFO {
++ int TotalAvailableCredits; /* total credits in the system at startup */
++ int CurrentFreeCredits; /* credits available in the pool that have not been
++ given out to endpoints */
++ HTC_ENDPOINT_CREDIT_DIST *pLowestPriEpDist; /* pointer to the lowest priority endpoint dist struct */
++} COMMON_CREDIT_STATE_INFO;
++
++
++/* HTC TX packet tagging definitions */
++#define AR6K_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED
++#define AR6K_DATA_PKT_TAG (AR6K_CONTROL_PKT_TAG + 1)
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++/* OS-independent APIs */
++A_STATUS ar6000_setup_credit_dist(HTC_HANDLE HTCHandle, COMMON_CREDIT_STATE_INFO *pCredInfo);
++A_STATUS ar6000_ReadRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data);
++A_STATUS ar6000_WriteRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data);
++A_STATUS ar6000_ReadDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address, A_UCHAR *data, A_UINT32 length);
++A_STATUS ar6000_reset_device(HIF_DEVICE *hifDevice, A_UINT32 TargetType);
++void ar6000_dump_target_assert_info(HIF_DEVICE *hifDevice, A_UINT32 TargetType);
++A_STATUS ar6000_reset_device_skipflash(HIF_DEVICE *hifDevice);
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /*COMMON_DRV_H_*/
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dbglog_api.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dbglog_api.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,46 @@
++#ifndef _DBGLOG_API_H_
++#define _DBGLOG_API_H_
++/*
++ * Copyright (c) 2004-2006 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ * This file contains host side debug primitives.
++ */
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++#include "dbglog.h"
++
++#define DBGLOG_HOST_LOG_BUFFER_SIZE DBGLOG_LOG_BUFFER_SIZE
++
++#define DBGLOG_GET_DBGID(arg) \
++ ((arg & DBGLOG_DBGID_MASK) >> DBGLOG_DBGID_OFFSET)
++
++#define DBGLOG_GET_MODULEID(arg) \
++ ((arg & DBGLOG_MODULEID_MASK) >> DBGLOG_MODULEID_OFFSET)
++
++#define DBGLOG_GET_NUMARGS(arg) \
++ ((arg & DBGLOG_NUM_ARGS_MASK) >> DBGLOG_NUM_ARGS_OFFSET)
++
++#define DBGLOG_GET_TIMESTAMP(arg) \
++ ((arg & DBGLOG_TIMESTAMP_MASK) >> DBGLOG_TIMESTAMP_OFFSET)
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _DBGLOG_API_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dbglog.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dbglog.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,107 @@
++/*
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ * This file contains the definitions and data structures associated with
++ * the log based debug mechanism.
++ *
++ */
++
++#ifndef _DBGLOG_H_
++#define _DBGLOG_H_
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++#define DBGLOG_TIMESTAMP_OFFSET 0
++#define DBGLOG_TIMESTAMP_MASK 0x0000FFFF /* Bit 0-15. Contains bit
++ 8-23 of the LF0 timer */
++#define DBGLOG_DBGID_OFFSET 16
++#define DBGLOG_DBGID_MASK 0x03FF0000 /* Bit 16-25 */
++#define DBGLOG_DBGID_NUM_MAX 256 /* Upper limit is width of mask */
++
++#define DBGLOG_MODULEID_OFFSET 26
++#define DBGLOG_MODULEID_MASK 0x3C000000 /* Bit 26-29 */
++#define DBGLOG_MODULEID_NUM_MAX 16 /* Upper limit is width of mask */
++
++/*
++ * Please ensure that the definition of any new module intrduced is captured
++ * between the DBGLOG_MODULEID_START and DBGLOG_MODULEID_END defines. The
++ * structure is required for the parser to correctly pick up the values for
++ * different modules.
++ */
++#define DBGLOG_MODULEID_START
++#define DBGLOG_MODULEID_INF 0
++#define DBGLOG_MODULEID_WMI 1
++#define DBGLOG_MODULEID_CSERV 2
++#define DBGLOG_MODULEID_PM 3
++#define DBGLOG_MODULEID_TXRX_MGMTBUF 4
++#define DBGLOG_MODULEID_TXRX_TXBUF 5
++#define DBGLOG_MODULEID_TXRX_RXBUF 6
++#define DBGLOG_MODULEID_WOW 7
++#define DBGLOG_MODULEID_WHAL 8
++#define DBGLOG_MODULEID_END
++
++#define DBGLOG_NUM_ARGS_OFFSET 30
++#define DBGLOG_NUM_ARGS_MASK 0xC0000000 /* Bit 30-31 */
++#define DBGLOG_NUM_ARGS_MAX 2 /* Upper limit is width of mask */
++
++#define DBGLOG_MODULE_LOG_ENABLE_OFFSET 0
++#define DBGLOG_MODULE_LOG_ENABLE_MASK 0x0000FFFF
++
++#define DBGLOG_REPORTING_ENABLED_OFFSET 16
++#define DBGLOG_REPORTING_ENABLED_MASK 0x00010000
++
++#define DBGLOG_TIMESTAMP_RESOLUTION_OFFSET 17
++#define DBGLOG_TIMESTAMP_RESOLUTION_MASK 0x000E0000
++
++#define DBGLOG_REPORT_SIZE_OFFSET 20
++#define DBGLOG_REPORT_SIZE_MASK 0x3FF00000
++
++#define DBGLOG_LOG_BUFFER_SIZE 1500
++#define DBGLOG_DBGID_DEFINITION_LEN_MAX 64
++
++struct dbglog_buf_s {
++ struct dbglog_buf_s *next;
++ A_INT8 *buffer;
++ A_UINT32 bufsize;
++ A_UINT32 length;
++ A_UINT32 count;
++ A_UINT32 free;
++};
++
++struct dbglog_hdr_s {
++ struct dbglog_buf_s *dbuf;
++ A_UINT32 dropped;
++};
++
++struct dbglog_config_s {
++ A_UINT32 cfgvalid; /* Mask with valid config bits */
++ union {
++ /* TODO: Take care of endianness */
++ struct {
++ A_UINT32 mmask:16; /* Mask of modules with logging on */
++ A_UINT32 rep:1; /* Reporting enabled or not */
++ A_UINT32 tsr:3; /* Time stamp resolution. Def: 1 ms */
++ A_UINT32 size:10; /* Report size in number of messages */
++ A_UINT32 reserved:2;
++ } dbglog_config;
++
++ A_UINT32 value;
++ } u;
++};
++
++#define cfgmmask u.dbglog_config.mmask
++#define cfgrep u.dbglog_config.rep
++#define cfgtsr u.dbglog_config.tsr
++#define cfgsize u.dbglog_config.size
++#define cfgvalue u.value
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _DBGLOG_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dbglog_id.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dbglog_id.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,307 @@
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ * This file contains the definitions of the debug identifiers for different
++ * modules.
++ *
++ */
++
++#ifndef _DBGLOG_ID_H_
++#define _DBGLOG_ID_H_
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++/*
++ * The nomenclature for the debug identifiers is MODULE_DESCRIPTION.
++ * Please ensure that the definition of any new debugid introduced is captured
++ * between the <MODULE>_DBGID_DEFINITION_START and
++ * <MODULE>_DBGID_DEFINITION_END defines. The structure is required for the
++ * parser to correctly pick up the values for different debug identifiers.
++ */
++
++/* INF debug identifier definitions */
++#define INF_DBGID_DEFINITION_START
++#define INF_ASSERTION_FAILED 1
++#define INF_TARGET_ID 2
++#define INF_DBGID_DEFINITION_END
++
++/* WMI debug identifier definitions */
++#define WMI_DBGID_DEFINITION_START
++#define WMI_CMD_RX_XTND_PKT_TOO_SHORT 1
++#define WMI_EXTENDED_CMD_NOT_HANDLED 2
++#define WMI_CMD_RX_PKT_TOO_SHORT 3
++#define WMI_CALLING_WMI_EXTENSION_FN 4
++#define WMI_CMD_NOT_HANDLED 5
++#define WMI_IN_SYNC 6
++#define WMI_TARGET_WMI_SYNC_CMD 7
++#define WMI_SET_SNR_THRESHOLD_PARAMS 8
++#define WMI_SET_RSSI_THRESHOLD_PARAMS 9
++#define WMI_SET_LQ_TRESHOLD_PARAMS 10
++#define WMI_TARGET_CREATE_PSTREAM_CMD 11
++#define WMI_WI_DTM_INUSE 12
++#define WMI_TARGET_DELETE_PSTREAM_CMD 13
++#define WMI_TARGET_IMPLICIT_DELETE_PSTREAM_CMD 14
++#define WMI_TARGET_GET_BIT_RATE_CMD 15
++#define WMI_GET_RATE_MASK_CMD_FIX_RATE_MASK_IS 16
++#define WMI_TARGET_GET_AVAILABLE_CHANNELS_CMD 17
++#define WMI_TARGET_GET_TX_PWR_CMD 18
++#define WMI_FREE_EVBUF_WMIBUF 19
++#define WMI_FREE_EVBUF_DATABUF 20
++#define WMI_FREE_EVBUF_BADFLAG 21
++#define WMI_HTC_RX_ERROR_DATA_PACKET 22
++#define WMI_HTC_RX_SYNC_PAUSING_FOR_MBOX 23
++#define WMI_INCORRECT_WMI_DATA_HDR_DROPPING_PKT 24
++#define WMI_SENDING_READY_EVENT 25
++#define WMI_SETPOWER_MDOE_TO_MAXPERF 26
++#define WMI_SETPOWER_MDOE_TO_REC 27
++#define WMI_BSSINFO_EVENT_FROM 28
++#define WMI_TARGET_GET_STATS_CMD 29
++#define WMI_SENDING_SCAN_COMPLETE_EVENT 30
++#define WMI_SENDING_RSSI_INDB_THRESHOLD_EVENT 31
++#define WMI_SENDING_RSSI_INDBM_THRESHOLD_EVENT 32
++#define WMI_SENDING_LINK_QUALITY_THRESHOLD_EVENT 33
++#define WMI_SENDING_ERROR_REPORT_EVENT 34
++#define WMI_SENDING_CAC_EVENT 35
++#define WMI_TARGET_GET_ROAM_TABLE_CMD 36
++#define WMI_TARGET_GET_ROAM_DATA_CMD 37
++#define WMI_SENDING_GPIO_INTR_EVENT 38
++#define WMI_SENDING_GPIO_ACK_EVENT 39
++#define WMI_SENDING_GPIO_DATA_EVENT 40
++#define WMI_CMD_RX 41
++#define WMI_CMD_RX_XTND 42
++#define WMI_EVENT_SEND 43
++#define WMI_EVENT_SEND_XTND 44
++#define WMI_DBGID_DEFINITION_END
++
++/* CSERV debug identifier definitions */
++#define CSERV_DBGID_DEFINITION_START
++#define CSERV_BEGIN_SCAN1 1
++#define CSERV_BEGIN_SCAN2 2
++#define CSERV_END_SCAN1 3
++#define CSERV_END_SCAN2 4
++#define CSERV_CHAN_SCAN_START 5
++#define CSERV_CHAN_SCAN_STOP 6
++#define CSERV_CHANNEL_OPPPORTUNITY 7
++#define CSERV_NC_TIMEOUT 8
++#define CSERV_BACK_HOME 10
++#define CSERV_CHMGR_CH_CALLBACK1 11
++#define CSERV_CHMGR_CH_CALLBACK2 12
++#define CSERV_CHMGR_CH_CALLBACK3 13
++#define CSERV_SET_SCAN_PARAMS1 14
++#define CSERV_SET_SCAN_PARAMS2 15
++#define CSERV_SET_SCAN_PARAMS3 16
++#define CSERV_SET_SCAN_PARAMS4 17
++#define CSERV_ABORT_SCAN 18
++#define CSERV_NEWSTATE 19
++#define CSERV_MINCHMGR_OP_END 20
++#define CSERV_CHMGR_OP_END 21
++#define CSERV_DISCONNECT_TIMEOUT 22
++#define CSERV_ROAM_TIMEOUT 23
++#define CSERV_FORCE_SCAN1 24
++#define CSERV_FORCE_SCAN2 25
++#define CSERV_FORCE_SCAN3 26
++#define CSERV_UTIL_TIMEOUT 27
++#define CSERV_RSSIPOLLER 28
++#define CSERV_RETRY_CONNECT_TIMEOUT 29
++#define CSERV_RSSIINDBMPOLLER 30
++#define CSERV_BGSCAN_ENABLE 31
++#define CSERV_BGSCAN_DISABLE 32
++#define CSERV_WLAN_START_SCAN_CMD1 33
++#define CSERV_WLAN_START_SCAN_CMD2 34
++#define CSERV_WLAN_START_SCAN_CMD3 35
++#define CSERV_START_SCAN_CMD 36
++#define CSERV_START_FORCE_SCAN 37
++#define CSERV_NEXT_CHAN 38
++#define CSERV_SET_REGCODE 39
++#define CSERV_START_ADHOC 40
++#define CSERV_ADHOC_AT_HOME 41
++#define CSERV_OPT_AT_HOME 42
++#define CSERV_WLAN_CONNECT_CMD 43
++#define CSERV_WLAN_RECONNECT_CMD 44
++#define CSERV_WLAN_DISCONNECT_CMD 45
++#define CSERV_BSS_CHANGE_CHANNEL 46
++#define CSERV_BEACON_RX 47
++#define CSERV_KEEPALIVE_CHECK 48
++#define CSERV_RC_BEGIN_SCAN 49
++#define CSERV_RC_SCAN_START 50
++#define CSERV_RC_SCAN_STOP 51
++#define CSERV_RC_NEXT 52
++#define CSERV_RC_SCAN_END 53
++#define CSERV_PROBE_CALLBACK 54
++#define CSERV_ROAM1 55
++#define CSERV_ROAM2 56
++#define CSERV_ROAM3 57
++#define CSERV_CONNECT_EVENT 58
++#define CSERV_DISCONNECT_EVENT 59
++#define CSERV_BMISS_HANDLER1 60
++#define CSERV_BMISS_HANDLER2 61
++#define CSERV_BMISS_HANDLER3 62
++#define CSERV_LOWRSSI_HANDLER 63
++#define CSERV_WLAN_SET_PMKID_CMD 64
++#define CSERV_RECONNECT_REQUEST 65
++#define CSERV_KEYSPLUMBED_EVENT 66
++#define CSERV_NEW_REG 67
++#define CSERV_SET_RSSI_THOLD 68
++#define CSERV_RSSITHRESHOLDCHECK 69
++#define CSERV_RSSIINDBMTHRESHOLDCHECK 70
++#define CSERV_WLAN_SET_OPT_CMD1 71
++#define CSERV_WLAN_SET_OPT_CMD2 72
++#define CSERV_WLAN_SET_OPT_CMD3 73
++#define CSERV_WLAN_SET_OPT_CMD4 74
++#define CSERV_SCAN_CONNECT_STOP 75
++#define CSERV_BMISS_HANDLER4 76
++#define CSERV_INITIALIZE_TIMER 77
++#define CSERV_ARM_TIMER 78
++#define CSERV_DISARM_TIMER 79
++#define CSERV_UNINITIALIZE_TIMER 80
++#define CSERV_DISCONNECT_EVENT2 81
++#define CSERV_SCAN_CONNECT_START 82
++#define CSERV_BSSINFO_MEMORY_ALLOC_FAILED 83
++#define CSERV_SET_SCAN_PARAMS5 84
++#define CSERV_DBGID_DEFINITION_END
++
++/* TXRX debug identifier definitions */
++#define TXRX_TXBUF_DBGID_DEFINITION_START
++#define TXRX_TXBUF_ALLOCATE_BUF 1
++#define TXRX_TXBUF_QUEUE_BUF_TO_MBOX 2
++#define TXRX_TXBUF_QUEUE_BUF_TO_TXQ 3
++#define TXRX_TXBUF_TXQ_DEPTH 4
++#define TXRX_TXBUF_IBSS_QUEUE_TO_SFQ 5
++#define TXRX_TXBUF_IBSS_QUEUE_TO_TXQ_FRM_SFQ 6
++#define TXRX_TXBUF_INITIALIZE_TIMER 7
++#define TXRX_TXBUF_ARM_TIMER 8
++#define TXRX_TXBUF_DISARM_TIMER 9
++#define TXRX_TXBUF_UNINITIALIZE_TIMER 10
++#define TXRX_TXBUF_DBGID_DEFINITION_END
++
++#define TXRX_RXBUF_DBGID_DEFINITION_START
++#define TXRX_RXBUF_ALLOCATE_BUF 1
++#define TXRX_RXBUF_QUEUE_TO_HOST 2
++#define TXRX_RXBUF_QUEUE_TO_WLAN 3
++#define TXRX_RXBUF_ZERO_LEN_BUF 4
++#define TXRX_RXBUF_QUEUE_TO_HOST_LASTBUF_IN_RXCHAIN 5
++#define TXRX_RXBUF_LASTBUF_IN_RXCHAIN_ZEROBUF 6
++#define TXRX_RXBUF_QUEUE_EMPTY_QUEUE_TO_WLAN 7
++#define TXRX_RXBUF_SEND_TO_RECV_MGMT 8
++#define TXRX_RXBUF_SEND_TO_IEEE_LAYER 9
++#define TXRX_RXBUF_DBGID_DEFINITION_END
++
++#define TXRX_MGMTBUF_DBGID_DEFINITION_START
++#define TXRX_MGMTBUF_ALLOCATE_BUF 1
++#define TXRX_MGMTBUF_ALLOCATE_SM_BUF 2
++#define TXRX_MGMTBUF_ALLOCATE_RMBUF 3
++#define TXRX_MGMTBUF_GET_BUF 4
++#define TXRX_MGMTBUF_GET_SM_BUF 5
++#define TXRX_MGMTBUF_QUEUE_BUF_TO_TXQ 6
++#define TXRX_MGMTBUF_REAPED_BUF 7
++#define TXRX_MGMTBUF_REAPED_SM_BUF 8
++#define TXRX_MGMTBUF_WAIT_FOR_TXQ_DRAIN 9
++#define TXRX_MGMTBUF_WAIT_FOR_TXQ_SFQ_DRAIN 10
++#define TXRX_MGMTBUF_ENQUEUE_INTO_SFQ 11
++#define TXRX_MGMTBUF_DEQUEUE_FROM_SFQ 12
++#define TXRX_MGMTBUF_PAUSE_TXQ 13
++#define TXRX_MGMTBUF_RESUME_TXQ 14
++#define TXRX_MGMTBUF_WAIT_FORTXQ_DRAIN_TIMEOUT 15
++#define TXRX_MGMTBUF_DRAINQ 16
++#define TXRX_MGMTBUF_INDICATE_Q_DRAINED 17
++#define TXRX_MGMTBUF_DBGID_DEFINITION_END
++
++/* PM (Power Module) debug identifier definitions */
++#define PM_DBGID_DEFINITION_START
++#define PM_INIT 1
++#define PM_ENABLE 2
++#define PM_SET_STATE 3
++#define PM_SET_POWERMODE 4
++#define PM_CONN_NOTIFY 5
++#define PM_REF_COUNT_NEGATIVE 6
++#define PM_APSD_ENABLE 7
++#define PM_UPDATE_APSD_STATE 8
++#define PM_CHAN_OP_REQ 9
++#define PM_SET_MY_BEACON_POLICY 10
++#define PM_SET_ALL_BEACON_POLICY 11
++#define PM_SET_PM_PARAMS1 12
++#define PM_SET_PM_PARAMS2 13
++#define PM_ADHOC_SET_PM_CAPS_FAIL 14
++#define PM_ADHOC_UNKNOWN_IBSS_ATTRIB_ID 15
++#define PM_DBGID_DEFINITION_END
++
++/* Wake on Wireless debug identifier definitions */
++#define WOW_DBGID_DEFINITION_START
++#define WOW_INIT 1
++#define WOW_GET_CONFIG_DSET 2
++#define WOW_NO_CONFIG_DSET 3
++#define WOW_INVALID_CONFIG_DSET 4
++#define WOW_USE_DEFAULT_CONFIG 5
++#define WOW_SETUP_GPIO 6
++#define WOW_INIT_DONE 7
++#define WOW_SET_GPIO_PIN 8
++#define WOW_CLEAR_GPIO_PIN 9
++#define WOW_SET_WOW_MODE_CMD 10
++#define WOW_SET_HOST_MODE_CMD 11
++#define WOW_ADD_WOW_PATTERN_CMD 12
++#define WOW_NEW_WOW_PATTERN_AT_INDEX 13
++#define WOW_DEL_WOW_PATTERN_CMD 14
++#define WOW_LIST_CONTAINS_PATTERNS 15
++#define WOW_GET_WOW_LIST_CMD 16
++#define WOW_INVALID_FILTER_ID 17
++#define WOW_INVALID_FILTER_LISTID 18
++#define WOW_NO_VALID_FILTER_AT_ID 19
++#define WOW_NO_VALID_LIST_AT_ID 20
++#define WOW_NUM_PATTERNS_EXCEEDED 21
++#define WOW_NUM_LISTS_EXCEEDED 22
++#define WOW_GET_WOW_STATS 23
++#define WOW_CLEAR_WOW_STATS 24
++#define WOW_WAKEUP_HOST 25
++#define WOW_EVENT_WAKEUP_HOST 26
++#define WOW_EVENT_DISCARD 27
++#define WOW_PATTERN_MATCH 28
++#define WOW_PATTERN_NOT_MATCH 29
++#define WOW_PATTERN_NOT_MATCH_OFFSET 30
++#define WOW_DISABLED_HOST_ASLEEP 31
++#define WOW_ENABLED_HOST_ASLEEP_NO_PATTERNS 32
++#define WOW_ENABLED_HOST_ASLEEP_NO_MATCH_FOUND 33
++#define WOW_DBGID_DEFINITION_END
++
++/* WHAL debug identifier definitions */
++#define WHAL_DBGID_DEFINITION_START
++#define WHAL_ERROR_ANI_CONTROL 1
++#define WHAL_ERROR_CHIP_TEST1 2
++#define WHAL_ERROR_CHIP_TEST2 3
++#define WHAL_ERROR_EEPROM_CHECKSUM 4
++#define WHAL_ERROR_EEPROM_MACADDR 5
++#define WHAL_ERROR_INTERRUPT_HIU 6
++#define WHAL_ERROR_KEYCACHE_RESET 7
++#define WHAL_ERROR_KEYCACHE_SET 8
++#define WHAL_ERROR_KEYCACHE_TYPE 9
++#define WHAL_ERROR_KEYCACHE_TKIPENTRY 10
++#define WHAL_ERROR_KEYCACHE_WEPLENGTH 11
++#define WHAL_ERROR_PHY_INVALID_CHANNEL 12
++#define WHAL_ERROR_POWER_AWAKE 13
++#define WHAL_ERROR_POWER_SET 14
++#define WHAL_ERROR_RECV_STOPDMA 15
++#define WHAL_ERROR_RECV_STOPPCU 16
++#define WHAL_ERROR_RESET_CHANNF1 17
++#define WHAL_ERROR_RESET_CHANNF2 18
++#define WHAL_ERROR_RESET_PM 19
++#define WHAL_ERROR_RESET_OFFSETCAL 20
++#define WHAL_ERROR_RESET_RFGRANT 21
++#define WHAL_ERROR_RESET_RXFRAME 22
++#define WHAL_ERROR_RESET_STOPDMA 23
++#define WHAL_ERROR_RESET_RECOVER 24
++#define WHAL_ERROR_XMIT_COMPUTE 25
++#define WHAL_ERROR_XMIT_NOQUEUE 26
++#define WHAL_ERROR_XMIT_ACTIVEQUEUE 27
++#define WHAL_ERROR_XMIT_BADTYPE 28
++#define WHAL_DBGID_DEFINITION_END
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _DBGLOG_ID_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dl_list.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dl_list.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,114 @@
++/*
++ *
++ * Double-link list definitions (adapted from Atheros SDIO stack)
++ *
++ * Copyright (c) 2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++#ifndef __DL_LIST_H___
++#define __DL_LIST_H___
++
++#define A_CONTAINING_STRUCT(address, struct_type, field_name)\
++ ((struct_type *)((A_UINT32)(address) - (A_UINT32)(&((struct_type *)0)->field_name)))
++
++/* list functions */
++/* pointers for the list */
++typedef struct _DL_LIST {
++ struct _DL_LIST *pPrev;
++ struct _DL_LIST *pNext;
++}DL_LIST, *PDL_LIST;
++/*
++ * DL_LIST_INIT , initialize doubly linked list
++*/
++#define DL_LIST_INIT(pList)\
++ {(pList)->pPrev = pList; (pList)->pNext = pList;}
++
++#define DL_LIST_IS_EMPTY(pList) (((pList)->pPrev == (pList)) && ((pList)->pNext == (pList)))
++#define DL_LIST_GET_ITEM_AT_HEAD(pList) (pList)->pNext
++#define DL_LIST_GET_ITEM_AT_TAIL(pList) (pList)->pPrev
++/*
++ * ITERATE_OVER_LIST pStart is the list, pTemp is a temp list member
++ * NOT: do not use this function if the items in the list are deleted inside the
++ * iteration loop
++*/
++#define ITERATE_OVER_LIST(pStart, pTemp) \
++ for((pTemp) =(pStart)->pNext; pTemp != (pStart); (pTemp) = (pTemp)->pNext)
++
++
++/* safe iterate macro that allows the item to be removed from the list
++ * the iteration continues to the next item in the list
++ */
++#define ITERATE_OVER_LIST_ALLOW_REMOVE(pStart,pItem,st,offset) \
++{ \
++ PDL_LIST pTemp; \
++ pTemp = (pStart)->pNext; \
++ while (pTemp != (pStart)) { \
++ (pItem) = A_CONTAINING_STRUCT(pTemp,st,offset); \
++ pTemp = pTemp->pNext; \
++
++#define ITERATE_END }}
++
++/*
++ * DL_ListInsertTail - insert pAdd to the end of the list
++*/
++static INLINE PDL_LIST DL_ListInsertTail(PDL_LIST pList, PDL_LIST pAdd) {
++ /* insert at tail */
++ pAdd->pPrev = pList->pPrev;
++ pAdd->pNext = pList;
++ pList->pPrev->pNext = pAdd;
++ pList->pPrev = pAdd;
++ return pAdd;
++}
++
++/*
++ * DL_ListInsertHead - insert pAdd into the head of the list
++*/
++static INLINE PDL_LIST DL_ListInsertHead(PDL_LIST pList, PDL_LIST pAdd) {
++ /* insert at head */
++ pAdd->pPrev = pList;
++ pAdd->pNext = pList->pNext;
++ pList->pNext->pPrev = pAdd;
++ pList->pNext = pAdd;
++ return pAdd;
++}
++
++#define DL_ListAdd(pList,pItem) DL_ListInsertHead((pList),(pItem))
++/*
++ * DL_ListRemove - remove pDel from list
++*/
++static INLINE PDL_LIST DL_ListRemove(PDL_LIST pDel) {
++ pDel->pNext->pPrev = pDel->pPrev;
++ pDel->pPrev->pNext = pDel->pNext;
++ /* point back to itself just to be safe, incase remove is called again */
++ pDel->pNext = pDel;
++ pDel->pPrev = pDel;
++ return pDel;
++}
++
++/*
++ * DL_ListRemoveItemFromHead - get a list item from the head
++*/
++static INLINE PDL_LIST DL_ListRemoveItemFromHead(PDL_LIST pList) {
++ PDL_LIST pItem = NULL;
++ if (pList->pNext != pList) {
++ pItem = pList->pNext;
++ /* remove the first item from head */
++ DL_ListRemove(pItem);
++ }
++ return pItem;
++}
++
++#endif /* __DL_LIST_H___ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dset_api.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dset_api.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,63 @@
++/*
++ * Copyright (c) 2004-2006 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/dset_api.h#1 $
++ *
++ * Host-side DataSet API.
++ *
++ */
++
++#ifndef _DSET_API_H_
++#define _DSET_API_H_
++
++#ifdef __cplusplus
++extern "C" {
++#endif /* __cplusplus */
++
++/*
++ * Host-side DataSet support is optional, and is not
++ * currently required for correct operation. To disable
++ * Host-side DataSet support, set this to 0.
++ */
++#ifndef CONFIG_HOST_DSET_SUPPORT
++#define CONFIG_HOST_DSET_SUPPORT 1
++#endif
++
++/* Called to send a DataSet Open Reply back to the Target. */
++A_STATUS wmi_dset_open_reply(struct wmi_t *wmip,
++ A_UINT32 status,
++ A_UINT32 access_cookie,
++ A_UINT32 size,
++ A_UINT32 version,
++ A_UINT32 targ_handle,
++ A_UINT32 targ_reply_fn,
++ A_UINT32 targ_reply_arg);
++
++/* Called to send a DataSet Data Reply back to the Target. */
++A_STATUS wmi_dset_data_reply(struct wmi_t *wmip,
++ A_UINT32 status,
++ A_UINT8 *host_buf,
++ A_UINT32 length,
++ A_UINT32 targ_buf,
++ A_UINT32 targ_reply_fn,
++ A_UINT32 targ_reply_arg);
++
++#ifdef __cplusplus
++}
++#endif /* __cplusplus */
++
++
++#endif /* _DSET_API_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dsetid.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dsetid.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,110 @@
++/*
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ */
++
++#ifndef __DSETID_H__
++#define __DSETID_H__
++
++/* Well-known DataSet IDs */
++#define DSETID_UNUSED 0x00000000
++#define DSETID_BOARD_DATA 0x00000001 /* Cal and board data */
++#define DSETID_REGDB 0x00000002 /* Regulatory Database */
++#define DSETID_POWER_CONTROL 0x00000003 /* TX Pwr Lim & Ant Gain */
++#define DSETID_USER_CONFIG 0x00000004 /* User Configuration */
++
++#define DSETID_ANALOG_CONTROL_DATA_START 0x00000005
++#define DSETID_ANALOG_CONTROL_DATA_END 0x00000025
++/*
++ * Get DSETID for various reference clock speeds.
++ * For each speed there are three DataSets that correspond
++ * to the three columns of bank6 data (addr, 11a, 11b/g).
++ * This macro returns the dsetid of the first of those
++ * three DataSets.
++ */
++#define ANALOG_CONTROL_DATA_DSETID(refclk) \
++ (DSETID_ANALOG_CONTROL_DATA_START + 3*refclk)
++
++/*
++ * There are TWO STARTUP_PATCH DataSets.
++ * DSETID_STARTUP_PATCH is historical, and was applied before BMI on
++ * earlier systems. On AR6002, it is applied after BMI, just like
++ * DSETID_STARTUP_PATCH2.
++ */
++#define DSETID_STARTUP_PATCH 0x00000026
++#define DSETID_GPIO_CONFIG_PATCH 0x00000027
++#define DSETID_WLANREGS 0x00000028 /* override wlan regs */
++#define DSETID_STARTUP_PATCH2 0x00000029
++
++#define DSETID_WOW_CONFIG 0x00000090 /* WoW Configuration */
++
++/* Add WHAL_INI_DATA_ID to DSETID_INI_DATA for a specific WHAL INI table. */
++#define DSETID_INI_DATA 0x00000100
++/* Reserved for WHAL INI Tables: 0x100..0x11f */
++#define DSETID_INI_DATA_END 0x0000011f
++
++#define DSETID_VENDOR_START 0x00010000 /* Vendor-defined DataSets */
++
++#define DSETID_INDEX_END 0xfffffffe /* Reserved to indicate the
++ end of a memory-based
++ DataSet Index */
++#define DSETID_INDEX_FREE 0xffffffff /* An unused index entry */
++
++/*
++ * PATCH DataSet format:
++ * A list of patches, terminated by a patch with
++ * address=PATCH_END.
++ *
++ * This allows for patches to be stored in flash.
++ */
++struct patch_s {
++ A_UINT32 *address;
++ A_UINT32 data;
++};
++
++/*
++ * Skip some patches. Can be used to erase a single patch in a
++ * patch DataSet without having to re-write the DataSet. May
++ * also be used to embed information for use by subsequent
++ * patch code. The "data" in a PATCH_SKIP tells how many
++ * bytes of length "patch_s" to skip.
++ */
++#define PATCH_SKIP ((A_UINT32 *)0x00000000)
++
++/*
++ * Execute code at the address specified by "data".
++ * The address of the patch structure is passed as
++ * the one parameter.
++ */
++#define PATCH_CODE_ABS ((A_UINT32 *)0x00000001)
++
++/*
++ * Same as PATCH_CODE_ABS, but treat "data" as an
++ * offset from the start of the patch word.
++ */
++#define PATCH_CODE_REL ((A_UINT32 *)0x00000002)
++
++/* Mark the end of this patch DataSet. */
++#define PATCH_END ((A_UINT32 *)0xffffffff)
++
++/*
++ * A DataSet which contains a Binary Patch to some other DataSet
++ * uses the original dsetid with the DSETID_BPATCH_FLAG bit set.
++ * Such a BPatch DataSet consists of BPatch metadata followed by
++ * the bdiff bytes. BPatch metadata consists of a single 32-bit
++ * word that contains the size of the BPatched final image.
++ *
++ * To create a suitable bdiff DataSet, use bdiff in host/tools/bdiff
++ * to create "diffs":
++ * bdiff -q -O -nooldmd5 -nonewmd5 -d ORIGfile NEWfile diffs
++ * Then add BPatch metadata to the start of "diffs".
++ *
++ * NB: There are some implementation-induced restrictions
++ * on which DataSets can be BPatched.
++ */
++#define DSETID_BPATCH_FLAG 0x80000000
++
++#endif /* __DSETID_H__ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dset_internal.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dset_internal.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,39 @@
++/*
++ * Copyright (c) 2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ */
++
++#ifndef __DSET_INTERNAL_H__
++#define __DSET_INTERNAL_H__
++
++/*
++ * Internal dset definitions, common for DataSet layer.
++ */
++
++#define DSET_TYPE_STANDARD 0
++#define DSET_TYPE_BPATCHED 1
++#define DSET_TYPE_COMPRESSED 2
++
++/* Dataset descriptor */
++
++typedef struct dset_descriptor_s {
++ struct dset_descriptor_s *next; /* List link. NULL only at the last
++ descriptor */
++ A_UINT16 id; /* Dset ID */
++ A_UINT16 size; /* Dset size. */
++ void *DataPtr; /* Pointer to raw data for standard
++ DataSet or pointer to original
++ dset_descriptor for patched
++ DataSet */
++ A_UINT32 data_type; /* DSET_TYPE_*, above */
++
++ void *AuxPtr; /* Additional data that might
++ needed for data_type. For
++ example, pointer to patch
++ Dataset descriptor for BPatch. */
++} dset_descriptor_t;
++
++#endif /* __DSET_INTERNAL_H__ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/gpio_api.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/gpio_api.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,57 @@
++#ifndef _GPIO_API_H_
++#define _GPIO_API_H_
++/*
++ * Copyright 2005 Atheros Communications, Inc., All Rights Reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++/*
++ * Host-side General Purpose I/O API.
++ *
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/gpio_api.h#1 $
++ */
++
++/*
++ * Send a command to the Target in order to change output on GPIO pins.
++ */
++A_STATUS wmi_gpio_output_set(struct wmi_t *wmip,
++ A_UINT32 set_mask,
++ A_UINT32 clear_mask,
++ A_UINT32 enable_mask,
++ A_UINT32 disable_mask);
++
++/*
++ * Send a command to the Target requesting input state of GPIO pins.
++ */
++A_STATUS wmi_gpio_input_get(struct wmi_t *wmip);
++
++/*
++ * Send a command to the Target to change the value of a GPIO register.
++ */
++A_STATUS wmi_gpio_register_set(struct wmi_t *wmip,
++ A_UINT32 gpioreg_id,
++ A_UINT32 value);
++
++/*
++ * Send a command to the Target to fetch the value of a GPIO register.
++ */
++A_STATUS wmi_gpio_register_get(struct wmi_t *wmip, A_UINT32 gpioreg_id);
++
++/*
++ * Send a command to the Target, acknowledging some GPIO interrupts.
++ */
++A_STATUS wmi_gpio_intr_ack(struct wmi_t *wmip, A_UINT32 ack_mask);
++
++#endif /* _GPIO_API_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/gpio.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/gpio.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,34 @@
++/*
++ * Copyright (c) 2005 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ */
++
++#if defined(AR6001)
++#define GPIO_PIN_COUNT 18
++#else
++#define GPIO_PIN_COUNT 18
++#endif
++
++/*
++ * Possible values for WMIX_GPIO_SET_REGISTER_CMDID.
++ * NB: These match hardware order, so that addresses can
++ * easily be computed.
++ */
++#define GPIO_ID_OUT 0x00000000
++#define GPIO_ID_OUT_W1TS 0x00000001
++#define GPIO_ID_OUT_W1TC 0x00000002
++#define GPIO_ID_ENABLE 0x00000003
++#define GPIO_ID_ENABLE_W1TS 0x00000004
++#define GPIO_ID_ENABLE_W1TC 0x00000005
++#define GPIO_ID_IN 0x00000006
++#define GPIO_ID_STATUS 0x00000007
++#define GPIO_ID_STATUS_W1TS 0x00000008
++#define GPIO_ID_STATUS_W1TC 0x00000009
++#define GPIO_ID_PIN0 0x0000000a
++#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n))
++
++#define GPIO_LAST_REGISTER_ID GPIO_ID_PIN(17)
++#define GPIO_ID_NONE 0xffffffff
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/hif.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/hif.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,296 @@
++/*
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ * HIF specific declarations and prototypes
++ */
++
++#ifndef _HIF_H_
++#define _HIF_H_
++
++#ifdef __cplusplus
++extern "C" {
++#endif /* __cplusplus */
++
++/* Header files */
++#include "a_config.h"
++#include "athdefs.h"
++#include "a_types.h"
++#include "a_osapi.h"
++
++typedef struct htc_callbacks HTC_CALLBACKS;
++typedef struct hif_device HIF_DEVICE;
++
++/*
++ * direction - Direction of transfer (HIF_READ/HIF_WRITE).
++ */
++#define HIF_READ 0x00000001
++#define HIF_WRITE 0x00000002
++#define HIF_DIR_MASK (HIF_READ | HIF_WRITE)
++
++/*
++ * type - An interface may support different kind of read/write commands.
++ * The command type is divided into a basic and an extended command
++ * and can be specified using HIF_BASIC_IO/HIF_EXTENDED_IO.
++ */
++#define HIF_BASIC_IO 0x00000004
++#define HIF_EXTENDED_IO 0x00000008
++#define HIF_TYPE_MASK (HIF_BASIC_IO | HIF_EXTENDED_IO)
++
++/*
++ * emode - This indicates the whether the command is to be executed in a
++ * blocking or non-blocking fashion (HIF_SYNCHRONOUS/
++ * HIF_ASYNCHRONOUS). The read/write data paths in HTC have been
++ * implemented using the asynchronous mode allowing the the bus
++ * driver to indicate the completion of operation through the
++ * registered callback routine. The requirement primarily comes
++ * from the contexts these operations get called from (a driver's
++ * transmit context or the ISR context in case of receive).
++ * Support for both of these modes is essential.
++ */
++#define HIF_SYNCHRONOUS 0x00000010
++#define HIF_ASYNCHRONOUS 0x00000020
++#define HIF_EMODE_MASK (HIF_SYNCHRONOUS | HIF_ASYNCHRONOUS)
++
++/*
++ * dmode - An interface may support different kinds of commands based on
++ * the tradeoff between the amount of data it can carry and the
++ * setup time. Byte and Block modes are supported (HIF_BYTE_BASIS/
++ * HIF_BLOCK_BASIS). In case of latter, the data is rounded off
++ * to the nearest block size by padding. The size of the block is
++ * configurable at compile time using the HIF_BLOCK_SIZE and is
++ * negotiated with the target during initialization after the
++ * dragon interrupts are enabled.
++ */
++#define HIF_BYTE_BASIS 0x00000040
++#define HIF_BLOCK_BASIS 0x00000080
++#define HIF_DMODE_MASK (HIF_BYTE_BASIS | HIF_BLOCK_BASIS)
++
++/*
++ * amode - This indicates if the address has to be incremented on dragon
++ * after every read/write operation (HIF?FIXED_ADDRESS/
++ * HIF_INCREMENTAL_ADDRESS).
++ */
++#define HIF_FIXED_ADDRESS 0x00000100
++#define HIF_INCREMENTAL_ADDRESS 0x00000200
++#define HIF_AMODE_MASK (HIF_FIXED_ADDRESS | HIF_INCREMENTAL_ADDRESS)
++
++#define HIF_WR_ASYNC_BYTE_FIX \
++ (HIF_WRITE | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_FIXED_ADDRESS)
++#define HIF_WR_ASYNC_BYTE_INC \
++ (HIF_WRITE | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS)
++#define HIF_WR_ASYNC_BLOCK_INC \
++ (HIF_WRITE | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS)
++#define HIF_WR_SYNC_BYTE_FIX \
++ (HIF_WRITE | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_FIXED_ADDRESS)
++#define HIF_WR_SYNC_BYTE_INC \
++ (HIF_WRITE | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS)
++#define HIF_WR_SYNC_BLOCK_INC \
++ (HIF_WRITE | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS)
++#define HIF_RD_SYNC_BYTE_INC \
++ (HIF_READ | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS)
++#define HIF_RD_SYNC_BYTE_FIX \
++ (HIF_READ | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_FIXED_ADDRESS)
++#define HIF_RD_ASYNC_BYTE_FIX \
++ (HIF_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_FIXED_ADDRESS)
++#define HIF_RD_ASYNC_BLOCK_FIX \
++ (HIF_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_FIXED_ADDRESS)
++#define HIF_RD_ASYNC_BYTE_INC \
++ (HIF_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS)
++#define HIF_RD_ASYNC_BLOCK_INC \
++ (HIF_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS)
++#define HIF_RD_SYNC_BLOCK_INC \
++ (HIF_READ | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS)
++
++
++typedef enum {
++ HIF_DEVICE_POWER_STATE = 0,
++ HIF_DEVICE_GET_MBOX_BLOCK_SIZE,
++ HIF_DEVICE_GET_MBOX_ADDR,
++ HIF_DEVICE_GET_PENDING_EVENTS_FUNC,
++ HIF_DEVICE_GET_IRQ_PROC_MODE,
++ HIF_DEVICE_GET_RECV_EVENT_MASK_UNMASK_FUNC,
++} HIF_DEVICE_CONFIG_OPCODE;
++
++/*
++ * HIF CONFIGURE definitions:
++ *
++ * HIF_DEVICE_GET_MBOX_BLOCK_SIZE
++ * input : none
++ * output : array of 4 A_UINT32s
++ * notes: block size is returned for each mailbox (4)
++ *
++ * HIF_DEVICE_GET_MBOX_ADDR
++ * input : none
++ * output : array of 4 A_UINT32
++ * notes: address is returned for each mailbox (4) in the array
++ *
++ * HIF_DEVICE_GET_PENDING_EVENTS_FUNC
++ * input : none
++ * output: HIF_PENDING_EVENTS_FUNC function pointer
++ * notes: this is optional for the HIF layer, if the request is
++ * not handled then it indicates that the upper layer can use
++ * the standard device methods to get pending events (IRQs, mailbox messages etc..)
++ * otherwise it can call the function pointer to check pending events.
++ *
++ * HIF_DEVICE_GET_IRQ_PROC_MODE
++ * input : none
++ * output : HIF_DEVICE_IRQ_PROCESSING_MODE (interrupt processing mode)
++ * note: the hif layer interfaces with the underlying OS-specific bus driver. The HIF
++ * layer can report whether IRQ processing is requires synchronous behavior or
++ * can be processed using asynchronous bus requests (typically faster).
++ *
++ * HIF_DEVICE_GET_RECV_EVENT_MASK_UNMASK_FUNC
++ * input :
++ * output : HIF_MASK_UNMASK_RECV_EVENT function pointer
++ * notes: this is optional for the HIF layer. The HIF layer may require a special mechanism
++ * to mask receive message events. The upper layer can call this pointer when it needs
++ * to mask/unmask receive events (in case it runs out of buffers).
++ *
++ *
++ */
++
++typedef enum {
++ HIF_DEVICE_IRQ_SYNC_ONLY, /* for HIF implementations that require the DSR to process all
++ interrupts before returning */
++ HIF_DEVICE_IRQ_ASYNC_SYNC, /* for HIF implementations that allow DSR to process interrupts
++ using ASYNC I/O (that is HIFAckInterrupt can be called at a
++ later time */
++} HIF_DEVICE_IRQ_PROCESSING_MODE;
++
++#define HIF_MAX_DEVICES 1
++
++struct htc_callbacks {
++ A_UCHAR *name;
++ A_UINT32 id;
++ A_STATUS (* deviceInsertedHandler)(void *hif_handle);
++ A_STATUS (* deviceRemovedHandler)(void *htc_handle, A_STATUS status);
++ A_STATUS (* deviceSuspendHandler)(void *htc_handle);
++ A_STATUS (* deviceResumeHandler)(void *htc_handle);
++ A_STATUS (* deviceWakeupHandler)(void *htc_handle);
++ A_STATUS (* rwCompletionHandler)(void *context, A_STATUS status);
++ A_STATUS (* dsrHandler)(void *htc_handle);
++};
++
++
++#define HIF_OTHER_EVENTS (1 << 0) /* other interrupts (non-Recv) are pending, host
++ needs to read the register table to figure out what */
++#define HIF_RECV_MSG_AVAIL (1 << 1) /* pending recv packet */
++
++typedef struct _HIF_PENDING_EVENTS_INFO {
++ A_UINT32 Events;
++ A_UINT32 LookAhead;
++} HIF_PENDING_EVENTS_INFO;
++
++ /* function to get pending events , some HIF modules use special mechanisms
++ * to detect packet available and other interrupts */
++typedef A_STATUS ( *HIF_PENDING_EVENTS_FUNC)(HIF_DEVICE *device,
++ HIF_PENDING_EVENTS_INFO *pEvents,
++ void *AsyncContext);
++
++#define HIF_MASK_RECV TRUE
++#define HIF_UNMASK_RECV FALSE
++ /* function to mask recv events */
++typedef A_STATUS ( *HIF_MASK_UNMASK_RECV_EVENT)(HIF_DEVICE *device,
++ A_BOOL Mask,
++ void *AsyncContext);
++
++
++/*
++ * This API is used by the HTC layer to initialize the HIF layer and to
++ * register different callback routines. Support for following events has
++ * been captured - DSR, Read/Write completion, Device insertion/removal,
++ * Device suspension/resumption/wakeup. In addition to this, the API is
++ * also used to register the name and the revision of the chip. The latter
++ * can be used to verify the revision of the chip read from the device
++ * before reporting it to HTC.
++ */
++int HIFInit(HTC_CALLBACKS *callbacks);
++
++/*
++ * This API is used to provide the read/write interface over the specific bus
++ * interface.
++ * address - Starting address in the dragon's address space. For mailbox
++ * writes, it refers to the start of the mbox boundary. It should
++ * be ensured that the last byte falls on the mailbox's EOM. For
++ * mailbox reads, it refers to the end of the mbox boundary.
++ * buffer - Pointer to the buffer containg the data to be transmitted or
++ * received.
++ * length - Amount of data to be transmitted or received.
++ * request - Characterizes the attributes of the command.
++ */
++A_STATUS
++HIFReadWrite(HIF_DEVICE *device,
++ A_UINT32 address,
++ A_UCHAR *buffer,
++ A_UINT32 length,
++ A_UINT32 request,
++ void *context);
++
++/*
++ * This can be initiated from the unload driver context ie when the HTCShutdown
++ * routine is called.
++ */
++void HIFShutDownDevice(HIF_DEVICE *device);
++
++/*
++ * This should translate to an acknowledgment to the bus driver indicating that
++ * the previous interrupt request has been serviced and the all the relevant
++ * sources have been cleared. HTC is ready to process more interrupts.
++ * This should prevent the bus driver from raising an interrupt unless the
++ * previous one has been serviced and acknowledged using the previous API.
++ */
++void HIFAckInterrupt(HIF_DEVICE *device);
++
++void HIFMaskInterrupt(HIF_DEVICE *device);
++
++void HIFUnMaskInterrupt(HIF_DEVICE *device);
++
++/*
++ * This set of functions are to be used by the bus driver to notify
++ * the HIF module about various events.
++ * These are not implemented if the bus driver provides an alternative
++ * way for this notification though callbacks for instance.
++ */
++int HIFInsertEventNotify(void);
++
++int HIFRemoveEventNotify(void);
++
++int HIFIRQEventNotify(void);
++
++int HIFRWCompleteEventNotify(void);
++
++/*
++ * This function associates a opaque handle with the HIF layer
++ * to be used in communication with upper layer i.e. HTC.
++ * This would normaly be a pointer to htc_target data structure.
++ */
++void HIFSetHandle(void *hif_handle, void *handle);
++
++A_STATUS
++HIFConfigureDevice(HIF_DEVICE *device, HIF_DEVICE_CONFIG_OPCODE opcode,
++ void *config, A_UINT32 configLen);
++
++
++struct device;
++struct device*
++HIFGetOSDevice(HIF_DEVICE *device);
++
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _HIF_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/host_version.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/host_version.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,49 @@
++#ifndef _HOST_VERSION_H_
++#define _HOST_VERSION_H_
++/*
++ * Copyright (c) 2004-2005 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * This file contains version information for the sample host driver for the
++ * AR6000 chip
++ *
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/host_version.h#2 $
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++#include <AR6K_version.h>
++
++/*
++ * The version number is made up of major, minor, patch and build
++ * numbers. These are 16 bit numbers. The build and release script will
++ * set the build number using a Perforce counter. Here the build number is
++ * set to 9999 so that builds done without the build-release script are easily
++ * identifiable.
++ */
++
++#define ATH_SW_VER_MAJOR __VER_MAJOR_
++#define ATH_SW_VER_MINOR __VER_MINOR_
++#define ATH_SW_VER_PATCH __VER_PATCH_
++#define ATH_SW_VER_BUILD 9999
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _HOST_VERSION_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc_api.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc_api.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,436 @@
++/*
++ *
++ * Copyright (c) 2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifndef _HTC_API_H_
++#define _HTC_API_H_
++
++#include <htc.h>
++#include <htc_services.h>
++#include "htc_packet.h"
++
++#ifdef __cplusplus
++extern "C" {
++#endif /* __cplusplus */
++
++/* TODO.. for BMI */
++#define ENDPOINT1 0
++// TODO -remove me, but we have to fix BMI first
++#define HTC_MAILBOX_NUM_MAX 4
++
++
++/* ------ Endpoint IDS ------ */
++typedef enum
++{
++ ENDPOINT_UNUSED = -1,
++ ENDPOINT_0 = 0,
++ ENDPOINT_1 = 1,
++ ENDPOINT_2 = 2,
++ ENDPOINT_3,
++ ENDPOINT_4,
++ ENDPOINT_5,
++ ENDPOINT_6,
++ ENDPOINT_7,
++ ENDPOINT_8,
++ ENDPOINT_MAX,
++} HTC_ENDPOINT_ID;
++
++/* this is the amount of header room required by users of HTC */
++#define HTC_HEADER_LEN HTC_HDR_LENGTH
++
++typedef void *HTC_HANDLE;
++
++typedef A_UINT16 HTC_SERVICE_ID;
++
++typedef struct _HTC_INIT_INFO {
++ void (*AddInstance)(HTC_HANDLE);
++ void (*DeleteInstance)(void *Instance);
++ void (*TargetFailure)(void *Instance, A_STATUS Status);
++} HTC_INIT_INFO;
++
++/* per service connection send completion */
++typedef void (*HTC_EP_SEND_PKT_COMPLETE)(void *,HTC_PACKET *);
++/* per service connection pkt received */
++typedef void (*HTC_EP_RECV_PKT)(void *,HTC_PACKET *);
++
++/* Optional per service connection receive buffer re-fill callback,
++ * On some OSes (like Linux) packets are allocated from a global pool and indicated up
++ * to the network stack. The driver never gets the packets back from the OS. For these OSes
++ * a refill callback can be used to allocate and re-queue buffers into HTC.
++ *
++ * On other OSes, the network stack can call into the driver's OS-specifc "return_packet" handler and
++ * the driver can re-queue these buffers into HTC. In this regard a refill callback is
++ * unnecessary */
++typedef void (*HTC_EP_RECV_REFILL)(void *, HTC_ENDPOINT_ID Endpoint);
++
++/* Optional per service connection callback when a send queue is full. This can occur if the
++ * host continues queueing up TX packets faster than credits can arrive
++ * To prevent the host (on some Oses like Linux) from continuously queueing packets
++ * and consuming resources, this callback is provided so that that the host
++ * can disable TX in the subsystem (i.e. network stack)
++ * Other OSes require a "per-packet" indication_RAW_STREAM_NUM_MAX for each completed TX packet, this
++ * closed loop mechanism will prevent the network stack from overunning the NIC */
++typedef void (*HTC_EP_SEND_QUEUE_FULL)(void *, HTC_ENDPOINT_ID Endpoint);
++
++typedef struct _HTC_EP_CALLBACKS {
++ void *pContext; /* context for each callback */
++ HTC_EP_SEND_PKT_COMPLETE EpTxComplete; /* tx completion callback for connected endpoint */
++ HTC_EP_RECV_PKT EpRecv; /* receive callback for connected endpoint */
++ HTC_EP_RECV_REFILL EpRecvRefill; /* OPTIONAL receive re-fill callback for connected endpoint */
++ HTC_EP_SEND_QUEUE_FULL EpSendFull; /* OPTIONAL send full callback */
++} HTC_EP_CALLBACKS;
++
++/* service connection information */
++typedef struct _HTC_SERVICE_CONNECT_REQ {
++ HTC_SERVICE_ID ServiceID; /* service ID to connect to */
++ A_UINT16 ConnectionFlags; /* connection flags, see htc protocol definition */
++ A_UINT8 *pMetaData; /* ptr to optional service-specific meta-data */
++ A_UINT8 MetaDataLength; /* optional meta data length */
++ HTC_EP_CALLBACKS EpCallbacks; /* endpoint callbacks */
++ int MaxSendQueueDepth; /* maximum depth of any send queue */
++} HTC_SERVICE_CONNECT_REQ;
++
++/* service connection response information */
++typedef struct _HTC_SERVICE_CONNECT_RESP {
++ A_UINT8 *pMetaData; /* caller supplied buffer to optional meta-data */
++ A_UINT8 BufferLength; /* length of caller supplied buffer */
++ A_UINT8 ActualLength; /* actual length of meta data */
++ HTC_ENDPOINT_ID Endpoint; /* endpoint to communicate over */
++ int MaxMsgLength; /* max length of all messages over this endpoint */
++ A_UINT8 ConnectRespCode; /* connect response code from target */
++} HTC_SERVICE_CONNECT_RESP;
++
++/* endpoint distribution structure */
++typedef struct _HTC_ENDPOINT_CREDIT_DIST {
++ struct _HTC_ENDPOINT_CREDIT_DIST *pNext;
++ struct _HTC_ENDPOINT_CREDIT_DIST *pPrev;
++ HTC_SERVICE_ID ServiceID; /* Service ID (set by HTC) */
++ HTC_ENDPOINT_ID Endpoint; /* endpoint for this distribution struct (set by HTC) */
++ A_UINT32 DistFlags; /* distribution flags, distribution function can
++ set default activity using SET_EP_ACTIVE() macro */
++ int TxCreditsNorm; /* credits for normal operation, anything above this
++ indicates the endpoint is over-subscribed, this field
++ is only relevant to the credit distribution function */
++ int TxCreditsMin; /* floor for credit distribution, this field is
++ only relevant to the credit distribution function */
++ int TxCreditsAssigned; /* number of credits assigned to this EP, this field
++ is only relevant to the credit dist function */
++ int TxCredits; /* current credits available, this field is used by
++ HTC to determine whether a message can be sent or
++ must be queued */
++ int TxCreditsToDist; /* pending credits to distribute on this endpoint, this
++ is set by HTC when credit reports arrive.
++ The credit distribution functions sets this to zero
++ when it distributes the credits */
++ int TxCreditsSeek; /* this is the number of credits that the current pending TX
++ packet needs to transmit. This is set by HTC when
++ and endpoint needs credits in order to transmit */
++ int TxCreditSize; /* size in bytes of each credit (set by HTC) */
++ int TxCreditsPerMaxMsg; /* credits required for a maximum sized messages (set by HTC) */
++ void *pHTCReserved; /* reserved for HTC use */
++} HTC_ENDPOINT_CREDIT_DIST;
++
++#define HTC_EP_ACTIVE (1 << 31)
++
++/* macro to check if an endpoint has gone active, useful for credit
++ * distributions */
++#define IS_EP_ACTIVE(epDist) ((epDist)->DistFlags & HTC_EP_ACTIVE)
++#define SET_EP_ACTIVE(epDist) (epDist)->DistFlags |= HTC_EP_ACTIVE
++
++ /* credit distibution code that is passed into the distrbution function,
++ * there are mandatory and optional codes that must be handled */
++typedef enum _HTC_CREDIT_DIST_REASON {
++ HTC_CREDIT_DIST_SEND_COMPLETE = 0, /* credits available as a result of completed
++ send operations (MANDATORY) resulting in credit reports */
++ HTC_CREDIT_DIST_ACTIVITY_CHANGE = 1, /* a change in endpoint activity occured (OPTIONAL) */
++ HTC_CREDIT_DIST_SEEK_CREDITS, /* an endpoint needs to "seek" credits (OPTIONAL) */
++ HTC_DUMP_CREDIT_STATE /* for debugging, dump any state information that is kept by
++ the distribution function */
++} HTC_CREDIT_DIST_REASON;
++
++typedef void (*HTC_CREDIT_DIST_CALLBACK)(void *Context,
++ HTC_ENDPOINT_CREDIT_DIST *pEPList,
++ HTC_CREDIT_DIST_REASON Reason);
++
++typedef void (*HTC_CREDIT_INIT_CALLBACK)(void *Context,
++ HTC_ENDPOINT_CREDIT_DIST *pEPList,
++ int TotalCredits);
++
++ /* endpoint statistics action */
++typedef enum _HTC_ENDPOINT_STAT_ACTION {
++ HTC_EP_STAT_SAMPLE = 0, /* only read statistics */
++ HTC_EP_STAT_SAMPLE_AND_CLEAR = 1, /* sample and immediately clear statistics */
++ HTC_EP_STAT_CLEAR /* clear only */
++} HTC_ENDPOINT_STAT_ACTION;
++
++ /* endpoint statistics */
++typedef struct _HTC_ENDPOINT_STATS {
++ A_UINT32 TxCreditLowIndications; /* number of times the host set the credit-low flag in a send message on
++ this endpoint */
++ A_UINT32 TxIssued; /* running count of TX packets issued */
++ A_UINT32 TxCreditRpts; /* running count of total credit reports received for this endpoint */
++ A_UINT32 TxCreditRptsFromRx;
++ A_UINT32 TxCreditRptsFromOther;
++ A_UINT32 TxCreditRptsFromEp0;
++ A_UINT32 TxCreditsFromRx; /* count of credits received via Rx packets on this endpoint */
++ A_UINT32 TxCreditsFromOther; /* count of credits received via another endpoint */
++ A_UINT32 TxCreditsFromEp0; /* count of credits received via another endpoint */
++ A_UINT32 TxCreditsConsummed; /* count of consummed credits */
++ A_UINT32 TxCreditsReturned; /* count of credits returned */
++ A_UINT32 RxReceived; /* count of RX packets received */
++ A_UINT32 RxLookAheads; /* count of lookahead records
++ found in messages received on this endpoint */
++} HTC_ENDPOINT_STATS;
++
++/* ------ Function Prototypes ------ */
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Initialize HTC
++ @function name: HTCInit
++ @input: pInfo - initialization information
++ @output:
++ @return: A_OK on success
++ @notes: The caller initializes global HTC state and registers various instance
++ notification callbacks (see HTC_INIT_INFO).
++
++ @example:
++ @see also: HTCShutdown
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++A_STATUS HTCInit(HTC_INIT_INFO *pInfo);
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Get the underlying HIF device handle
++ @function name: HTCGetHifDevice
++ @input: HTCHandle - handle passed into the AddInstance callback
++ @output:
++ @return: opaque HIF device handle usable in HIF API calls.
++ @notes:
++ @example:
++ @see also:
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void *HTCGetHifDevice(HTC_HANDLE HTCHandle);
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Set the associated instance for the HTC handle
++ @function name: HTCSetInstance
++ @input: HTCHandle - handle passed into the AddInstance callback
++ Instance - caller supplied instance object
++ @output:
++ @return:
++ @notes: Caller must set the instance information for the HTC handle in order to receive
++ notifications for instance deletion (DeleteInstance callback is called) and for target
++ failure notification.
++ @example:
++ @see also:
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void HTCSetInstance(HTC_HANDLE HTCHandle, void *Instance);
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Set credit distribution parameters
++ @function name: HTCSetCreditDistribution
++ @input: HTCHandle - HTC handle
++ pCreditDistCont - caller supplied context to pass into distribution functions
++ CreditDistFunc - Distribution function callback
++ CreditDistInit - Credit Distribution initialization callback
++ ServicePriorityOrder - Array containing list of service IDs, lowest index is highest
++ priority
++ ListLength - number of elements in ServicePriorityOrder
++ @output:
++ @return:
++ @notes: The user can set a custom credit distribution function to handle special requirements
++ for each endpoint. A default credit distribution routine can be used by setting
++ CreditInitFunc to NULL. The default credit distribution is only provided for simple
++ "fair" credit distribution without regard to any prioritization.
++
++ @example:
++ @see also:
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void HTCSetCreditDistribution(HTC_HANDLE HTCHandle,
++ void *pCreditDistContext,
++ HTC_CREDIT_DIST_CALLBACK CreditDistFunc,
++ HTC_CREDIT_INIT_CALLBACK CreditInitFunc,
++ HTC_SERVICE_ID ServicePriorityOrder[],
++ int ListLength);
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Wait for the target to indicate the HTC layer is ready
++ @function name: HTCWaitTarget
++ @input: HTCHandle - HTC handle
++ @output:
++ @return:
++ @notes: This API blocks until the target responds with an HTC ready message.
++ The caller should not connect services until the target has indicated it is
++ ready.
++ @example:
++ @see also: HTCConnectService
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++A_STATUS HTCWaitTarget(HTC_HANDLE HTCHandle);
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Start target service communications
++ @function name: HTCStart
++ @input: HTCHandle - HTC handle
++ @output:
++ @return:
++ @notes: This API indicates to the target that the service connection phase is complete
++ and the target can freely start all connected services. This API should only be
++ called AFTER all service connections have been made. TCStart will issue a
++ SETUP_COMPLETE message to the target to indicate that all service connections
++ have been made and the target can start communicating over the endpoints.
++ @example:
++ @see also: HTCConnectService
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++A_STATUS HTCStart(HTC_HANDLE HTCHandle);
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Add receive packet to HTC
++ @function name: HTCAddReceivePkt
++ @input: HTCHandle - HTC handle
++ pPacket - HTC receive packet to add
++ @output:
++ @return: A_OK on success
++ @notes: user must supply HTC packets for capturing incomming HTC frames. The caller
++ must initialize each HTC packet using the SET_HTC_PACKET_INFO_RX_REFILL()
++ macro.
++ @example:
++ @see also:
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++A_STATUS HTCAddReceivePkt(HTC_HANDLE HTCHandle, HTC_PACKET *pPacket);
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Connect to an HTC service
++ @function name: HTCConnectService
++ @input: HTCHandle - HTC handle
++ pReq - connection details
++ @output: pResp - connection response
++ @return:
++ @notes: Service connections must be performed before HTCStart. User provides callback handlers
++ for various endpoint events.
++ @example:
++ @see also: HTCStart
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++A_STATUS HTCConnectService(HTC_HANDLE HTCHandle,
++ HTC_SERVICE_CONNECT_REQ *pReq,
++ HTC_SERVICE_CONNECT_RESP *pResp);
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Send an HTC packet
++ @function name: HTCSendPkt
++ @input: HTCHandle - HTC handle
++ pPacket - packet to send
++ @output:
++ @return: A_OK
++ @notes: Caller must initialize packet using SET_HTC_PACKET_INFO_TX() macro.
++ This interface is fully asynchronous. On error, HTC SendPkt will
++ call the registered Endpoint callback to cleanup the packet.
++ @example:
++ @see also: HTCFlushEndpoint
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++A_STATUS HTCSendPkt(HTC_HANDLE HTCHandle, HTC_PACKET *pPacket);
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Stop HTC service communications
++ @function name: HTCStop
++ @input: HTCHandle - HTC handle
++ @output:
++ @return:
++ @notes: HTC communications is halted. All receive and pending TX packets will
++ be flushed.
++ @example:
++ @see also:
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void HTCStop(HTC_HANDLE HTCHandle);
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Shutdown HTC
++ @function name: HTCShutdown
++ @input:
++ @output:
++ @return:
++ @notes: This cleans up all resources allocated by HTCInit().
++ @example:
++ @see also: HTCInit
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void HTCShutDown(void);
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Flush pending TX packets
++ @function name: HTCFlushEndpoint
++ @input: HTCHandle - HTC handle
++ Endpoint - Endpoint to flush
++ Tag - flush tag
++ @output:
++ @return:
++ @notes: The Tag parameter is used to selectively flush packets with matching tags.
++ The value of 0 forces all packets to be flush regardless of tag.
++ @example:
++ @see also: HTCSendPkt
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void HTCFlushEndpoint(HTC_HANDLE HTCHandle, HTC_ENDPOINT_ID Endpoint, HTC_TX_TAG Tag);
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Dump credit distribution state
++ @function name: HTCDumpCreditStates
++ @input: HTCHandle - HTC handle
++ @output:
++ @return:
++ @notes: This dumps all credit distribution information to the debugger
++ @example:
++ @see also:
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void HTCDumpCreditStates(HTC_HANDLE HTCHandle);
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Indicate a traffic activity change on an endpoint
++ @function name: HTCIndicateActivityChange
++ @input: HTCHandle - HTC handle
++ Endpoint - endpoint in which activity has changed
++ Active - TRUE if active, FALSE if it has become inactive
++ @output:
++ @return:
++ @notes: This triggers the registered credit distribution function to
++ re-adjust credits for active/inactive endpoints.
++ @example:
++ @see also:
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void HTCIndicateActivityChange(HTC_HANDLE HTCHandle,
++ HTC_ENDPOINT_ID Endpoint,
++ A_BOOL Active);
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @desc: Get endpoint statistics
++ @function name: HTCGetEndpointStatistics
++ @input: HTCHandle - HTC handle
++ Endpoint - Endpoint identifier
++ Action - action to take with statistics
++ @output:
++ pStats - statistics that were sampled (can be NULL if Action is HTC_EP_STAT_CLEAR)
++
++ @return: TRUE if statistics profiling is enabled, otherwise FALSE.
++
++ @notes: Statistics is a compile-time option and this function may return FALSE
++ if HTC is not compiled with profiling.
++
++ The caller can specify the statistic "action" to take when sampling
++ the statistics. This includes:
++
++ HTC_EP_STAT_SAMPLE: The pStats structure is filled with the current values.
++ HTC_EP_STAT_SAMPLE_AND_CLEAR: The structure is filled and the current statistics
++ are cleared.
++ HTC_EP_STAT_CLEA : the statistics are cleared, the called can pass a NULL value for
++ pStats
++
++ @example:
++ @see also:
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++A_BOOL HTCGetEndpointStatistics(HTC_HANDLE HTCHandle,
++ HTC_ENDPOINT_ID Endpoint,
++ HTC_ENDPOINT_STAT_ACTION Action,
++ HTC_ENDPOINT_STATS *pStats);
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _HTC_API_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,190 @@
++/*
++ * Copyright (c) 2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ */
++
++
++#ifndef __HTC_H__
++#define __HTC_H__
++
++#ifndef ATH_TARGET
++#include "athstartpack.h"
++#endif
++
++#define A_OFFSETOF(type,field) (int)(&(((type *)NULL)->field))
++
++#define ASSEMBLE_UNALIGNED_UINT16(p,highbyte,lowbyte) \
++ (((A_UINT16)(((A_UINT8 *)(p))[(highbyte)])) << 8 | (A_UINT16)(((A_UINT8 *)(p))[(lowbyte)]))
++
++/* alignment independent macros (little-endian) to fetch UINT16s or UINT8s from a
++ * structure using only the type and field name.
++ * Use these macros if there is the potential for unaligned buffer accesses. */
++#define A_GET_UINT16_FIELD(p,type,field) \
++ ASSEMBLE_UNALIGNED_UINT16(p,\
++ A_OFFSETOF(type,field) + 1, \
++ A_OFFSETOF(type,field))
++
++#define A_SET_UINT16_FIELD(p,type,field,value) \
++{ \
++ ((A_UINT8 *)(p))[A_OFFSETOF(type,field)] = (A_UINT8)(value); \
++ ((A_UINT8 *)(p))[A_OFFSETOF(type,field) + 1] = (A_UINT8)((value) >> 8); \
++}
++
++#define A_GET_UINT8_FIELD(p,type,field) \
++ ((A_UINT8 *)(p))[A_OFFSETOF(type,field)]
++
++#define A_SET_UINT8_FIELD(p,type,field,value) \
++ ((A_UINT8 *)(p))[A_OFFSETOF(type,field)] = (value)
++
++/****** DANGER DANGER ***************
++ *
++ * The frame header length and message formats defined herein were
++ * selected to accommodate optimal alignment for target processing. This reduces code
++ * size and improves performance.
++ *
++ * Any changes to the header length may alter the alignment and cause exceptions
++ * on the target. When adding to the message structures insure that fields are
++ * properly aligned.
++ *
++ */
++
++/* HTC frame header */
++typedef PREPACK struct _HTC_FRAME_HDR{
++ /* do not remove or re-arrange these fields, these are minimally required
++ * to take advantage of 4-byte lookaheads in some hardware implementations */
++ A_UINT8 EndpointID;
++ A_UINT8 Flags;
++ A_UINT16 PayloadLen; /* length of data (including trailer) that follows the header */
++
++ /***** end of 4-byte lookahead ****/
++
++ A_UINT8 ControlBytes[2];
++
++ /* message payload starts after the header */
++
++} POSTPACK HTC_FRAME_HDR;
++
++/* frame header flags */
++#define HTC_FLAGS_NEED_CREDIT_UPDATE (1 << 0)
++#define HTC_FLAGS_RECV_TRAILER (1 << 1)
++
++
++#define HTC_HDR_LENGTH (sizeof(HTC_FRAME_HDR))
++#define HTC_MAX_TRAILER_LENGTH 255
++#define HTC_MAX_PAYLOAD_LENGTH (2048 - sizeof(HTC_FRAME_HDR))
++
++/* HTC control message IDs */
++typedef enum {
++ HTC_MSG_READY_ID = 1,
++ HTC_MSG_CONNECT_SERVICE_ID = 2,
++ HTC_MSG_CONNECT_SERVICE_RESPONSE_ID = 3,
++ HTC_MSG_SETUP_COMPLETE_ID = 4,
++} HTC_MSG_IDS;
++
++#define HTC_MAX_CONTROL_MESSAGE_LENGTH 256
++
++/* base message ID header */
++typedef PREPACK struct {
++ A_UINT16 MessageID;
++} POSTPACK HTC_UNKNOWN_MSG;
++
++/* HTC ready message
++ * direction : target-to-host */
++typedef PREPACK struct {
++ A_UINT16 MessageID; /* ID */
++ A_UINT16 CreditCount; /* number of credits the target can offer */
++ A_UINT16 CreditSize; /* size of each credit */
++ A_UINT8 MaxEndpoints; /* maximum number of endpoints the target has resources for */
++ A_UINT8 _Pad1;
++} POSTPACK HTC_READY_MSG;
++
++#define HTC_SERVICE_META_DATA_MAX_LENGTH 128
++
++/* connect service
++ * direction : host-to-target */
++typedef PREPACK struct {
++ A_UINT16 MessageID;
++ A_UINT16 ServiceID; /* service ID of the service to connect to */
++ A_UINT16 ConnectionFlags; /* connection flags */
++
++#define HTC_CONNECT_FLAGS_REDUCE_CREDIT_DRIBBLE (1 << 2) /* reduce credit dribbling when
++ the host needs credits */
++#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_MASK (0x3)
++#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_ONE_FOURTH 0x0
++#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_ONE_HALF 0x1
++#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_THREE_FOURTHS 0x2
++#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_UNITY 0x3
++
++ A_UINT8 ServiceMetaLength; /* length of meta data that follows */
++ A_UINT8 _Pad1;
++
++ /* service-specific meta data starts after the header */
++
++} POSTPACK HTC_CONNECT_SERVICE_MSG;
++
++/* connect response
++ * direction : target-to-host */
++typedef PREPACK struct {
++ A_UINT16 MessageID;
++ A_UINT16 ServiceID; /* service ID that the connection request was made */
++ A_UINT8 Status; /* service connection status */
++ A_UINT8 EndpointID; /* assigned endpoint ID */
++ A_UINT16 MaxMsgSize; /* maximum expected message size on this endpoint */
++ A_UINT8 ServiceMetaLength; /* length of meta data that follows */
++ A_UINT8 _Pad1;
++
++ /* service-specific meta data starts after the header */
++
++} POSTPACK HTC_CONNECT_SERVICE_RESPONSE_MSG;
++
++typedef PREPACK struct {
++ A_UINT16 MessageID;
++ /* currently, no other fields */
++} POSTPACK HTC_SETUP_COMPLETE_MSG;
++
++
++/* connect response status codes */
++#define HTC_SERVICE_SUCCESS 0 /* success */
++#define HTC_SERVICE_NOT_FOUND 1 /* service could not be found */
++#define HTC_SERVICE_FAILED 2 /* specific service failed the connect */
++#define HTC_SERVICE_NO_RESOURCES 3 /* no resources (i.e. no more endpoints) */
++#define HTC_SERVICE_NO_MORE_EP 4 /* specific service is not allowing any more
++ endpoints */
++
++/* report record IDs */
++typedef enum {
++ HTC_RECORD_NULL = 0,
++ HTC_RECORD_CREDITS = 1,
++ HTC_RECORD_LOOKAHEAD = 2,
++} HTC_RPT_IDS;
++
++typedef PREPACK struct {
++ A_UINT8 RecordID; /* Record ID */
++ A_UINT8 Length; /* Length of record */
++} POSTPACK HTC_RECORD_HDR;
++
++typedef PREPACK struct {
++ A_UINT8 EndpointID; /* Endpoint that owns these credits */
++ A_UINT8 Credits; /* credits to report since last report */
++} POSTPACK HTC_CREDIT_REPORT;
++
++typedef PREPACK struct {
++ A_UINT8 PreValid; /* pre valid guard */
++ A_UINT8 LookAhead[4]; /* 4 byte lookahead */
++ A_UINT8 PostValid; /* post valid guard */
++
++ /* NOTE: the LookAhead array is guarded by a PreValid and Post Valid guard bytes.
++ * The PreValid bytes must equal the inverse of the PostValid byte */
++
++} POSTPACK HTC_LOOKAHEAD_REPORT;
++
++#ifndef ATH_TARGET
++#include "athendpack.h"
++#endif
++
++
++#endif /* __HTC_H__ */
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc_packet.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc_packet.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,138 @@
++/*
++ *
++ * Copyright (c) 2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifndef HTC_PACKET_H_
++#define HTC_PACKET_H_
++
++
++#include "dl_list.h"
++
++struct _HTC_PACKET;
++
++typedef void (* HTC_PACKET_COMPLETION)(void *,struct _HTC_PACKET *);
++
++typedef A_UINT16 HTC_TX_TAG;
++
++typedef struct _HTC_TX_PACKET_INFO {
++ HTC_TX_TAG Tag; /* tag used to selective flush packets */
++} HTC_TX_PACKET_INFO;
++
++#define HTC_TX_PACKET_TAG_ALL 0 /* a tag of zero is reserved and used to flush ALL packets */
++#define HTC_TX_PACKET_TAG_INTERNAL 1 /* internal tags start here */
++#define HTC_TX_PACKET_TAG_USER_DEFINED (HTC_TX_PACKET_TAG_INTERNAL + 9) /* user-defined tags start here */
++
++typedef struct _HTC_RX_PACKET_INFO {
++ A_UINT32 Unused; /* for future use and to make compilers happy */
++} HTC_RX_PACKET_INFO;
++
++/* wrapper around endpoint-specific packets */
++typedef struct _HTC_PACKET {
++ DL_LIST ListLink; /* double link */
++ void *pPktContext; /* caller's per packet specific context */
++
++ A_UINT8 *pBufferStart; /* the true buffer start , the caller can
++ store the real buffer start here. In
++ receive callbacks, the HTC layer sets pBuffer
++ to the start of the payload past the header. This
++ field allows the caller to reset pBuffer when it
++ recycles receive packets back to HTC */
++ /*
++ * Pointer to the start of the buffer. In the transmit
++ * direction this points to the start of the payload. In the
++ * receive direction, however, the buffer when queued up
++ * points to the start of the HTC header but when returned
++ * to the caller points to the start of the payload
++ */
++ A_UINT8 *pBuffer; /* payload start (RX/TX) */
++ A_UINT32 BufferLength; /* length of buffer */
++ A_UINT32 ActualLength; /* actual length of payload */
++ int Endpoint; /* endpoint that this packet was sent/recv'd from */
++ A_STATUS Status; /* completion status */
++ union {
++ HTC_TX_PACKET_INFO AsTx; /* Tx Packet specific info */
++ HTC_RX_PACKET_INFO AsRx; /* Rx Packet specific info */
++ } PktInfo;
++
++ /* the following fields are for internal HTC use */
++ HTC_PACKET_COMPLETION Completion; /* completion */
++ void *pContext; /* HTC private completion context */
++ A_UINT32 HTCReserved; /* reserved */
++} HTC_PACKET;
++
++
++
++#define COMPLETE_HTC_PACKET(p,status) \
++{ \
++ (p)->Status = (status); \
++ (p)->Completion((p)->pContext,(p)); \
++}
++
++#define INIT_HTC_PACKET_INFO(p,b,len) \
++{ \
++ (p)->pBufferStart = (b); \
++ (p)->BufferLength = (len); \
++}
++
++/* macro to set an initial RX packet for refilling HTC */
++#define SET_HTC_PACKET_INFO_RX_REFILL(p,c,b,len,ep) \
++{ \
++ (p)->pPktContext = (c); \
++ (p)->pBuffer = (b); \
++ (p)->pBufferStart = (b); \
++ (p)->BufferLength = (len); \
++ (p)->Endpoint = (ep); \
++}
++
++/* fast macro to recycle an RX packet that will be re-queued to HTC */
++#define HTC_PACKET_RESET_RX(p) \
++ (p)->pBuffer = (p)->pBufferStart
++
++/* macro to set packet parameters for TX */
++#define SET_HTC_PACKET_INFO_TX(p,c,b,len,ep,tag) \
++{ \
++ (p)->pPktContext = (c); \
++ (p)->pBuffer = (b); \
++ (p)->ActualLength = (len); \
++ (p)->Endpoint = (ep); \
++ (p)->PktInfo.AsTx.Tag = (tag); \
++}
++
++/* HTC Packet Queueing Macros */
++typedef DL_LIST HTC_PACKET_QUEUE;
++/* initialize queue */
++#define INIT_HTC_PACKET_QUEUE(pQ) DL_LIST_INIT((pQ))
++/* enqueue HTC packet to the tail of the queue */
++#define HTC_PACKET_ENQUEUE(pQ,p) DL_ListInsertTail((pQ),&(p)->ListLink)
++/* test if a queue is empty */
++#define HTC_QUEUE_EMPTY(pQ) DL_LIST_IS_EMPTY((pQ))
++/* get packet at head without removing it */
++#define HTC_GET_PKT_AT_HEAD(pQ) A_CONTAINING_STRUCT((DL_LIST_GET_ITEM_AT_HEAD(pQ)),HTC_PACKET,ListLink);
++/* remove a packet from the current list it is linked to */
++#define HTC_PACKET_REMOVE(p) DL_ListRemove(&(p)->ListLink)
++
++/* dequeue an HTC packet from the head of the queue */
++static INLINE HTC_PACKET *HTC_PACKET_DEQUEUE(HTC_PACKET_QUEUE *queue) {
++ DL_LIST *pItem = DL_ListRemoveItemFromHead(queue);
++ if (pItem != NULL) {
++ return A_CONTAINING_STRUCT(pItem, HTC_PACKET, ListLink);
++ }
++ return NULL;
++}
++
++#endif /*HTC_PACKET_H_*/
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc_services.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc_services.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,37 @@
++/*
++ * Copyright (c) 2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ */
++
++#ifndef __HTC_SERVICES_H__
++#define __HTC_SERVICES_H__
++
++/* Current service IDs */
++
++typedef enum {
++ RSVD_SERVICE_GROUP = 0,
++ WMI_SERVICE_GROUP = 1,
++
++ HTC_TEST_GROUP = 254,
++ HTC_SERVICE_GROUP_LAST = 255
++}HTC_SERVICE_GROUP_IDS;
++
++#define MAKE_SERVICE_ID(group,index) \
++ (int)(((int)group << 8) | (int)(index))
++
++/* NOTE: service ID of 0x0000 is reserved and should never be used */
++#define HTC_CTRL_RSVD_SVC MAKE_SERVICE_ID(RSVD_SERVICE_GROUP,1)
++#define WMI_CONTROL_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,0)
++#define WMI_DATA_BE_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,1)
++#define WMI_DATA_BK_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,2)
++#define WMI_DATA_VI_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,3)
++#define WMI_DATA_VO_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,4)
++#define WMI_MAX_SERVICES 5
++
++/* raw stream service (i.e. flash, tcmd, calibration apps) */
++#define HTC_RAW_STREAMS_SVC MAKE_SERVICE_ID(HTC_TEST_GROUP,0)
++
++#endif /*HTC_SERVICES_H_*/
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ieee80211.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ieee80211.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,342 @@
++/*-
++ * Copyright (c) 2001 Atsushi Onoe
++ * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting
++ * Copyright (c) 2006 Atheros Communications, Inc.
++ *
++ * Wireless Network driver for Atheros AR6001
++ * All rights reserved.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
++ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
++ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ */
++#ifndef _NET80211_IEEE80211_H_
++#define _NET80211_IEEE80211_H_
++
++#include "athstartpack.h"
++
++/*
++ * 802.11 protocol definitions.
++ */
++
++#define IEEE80211_ADDR_LEN 6 /* size of 802.11 address */
++/* is 802.11 address multicast/broadcast? */
++#define IEEE80211_IS_MULTICAST(_a) (*(_a) & 0x01)
++#define IEEE80211_ADDR_EQ(addr1, addr2) \
++ (A_MEMCMP(addr1, addr2, IEEE80211_ADDR_LEN) == 0)
++
++#define IEEE80211_KEYBUF_SIZE 16
++#define IEEE80211_MICBUF_SIZE (8+8) /* space for both tx and rx */
++
++/*
++ * NB: these values are ordered carefully; there are lots of
++ * of implications in any reordering. In particular beware
++ * that 4 is not used to avoid conflicting with IEEE80211_F_PRIVACY.
++ */
++#define IEEE80211_CIPHER_WEP 0
++#define IEEE80211_CIPHER_TKIP 1
++#define IEEE80211_CIPHER_AES_OCB 2
++#define IEEE80211_CIPHER_AES_CCM 3
++#define IEEE80211_CIPHER_CKIP 5
++#define IEEE80211_CIPHER_CCKM_KRK 6
++#define IEEE80211_CIPHER_NONE 7 /* pseudo value */
++
++#define IEEE80211_CIPHER_MAX (IEEE80211_CIPHER_NONE+1)
++
++#define IEEE80211_IS_VALID_WEP_CIPHER_LEN(len) \
++ (((len) == 5) || ((len) == 13) || ((len) == 16))
++
++
++
++/*
++ * generic definitions for IEEE 802.11 frames
++ */
++PREPACK struct ieee80211_frame {
++ A_UINT8 i_fc[2];
++ A_UINT8 i_dur[2];
++ A_UINT8 i_addr1[IEEE80211_ADDR_LEN];
++ A_UINT8 i_addr2[IEEE80211_ADDR_LEN];
++ A_UINT8 i_addr3[IEEE80211_ADDR_LEN];
++ A_UINT8 i_seq[2];
++ /* possibly followed by addr4[IEEE80211_ADDR_LEN]; */
++ /* see below */
++} POSTPACK;
++
++#define IEEE80211_FC0_VERSION_MASK 0x03
++#define IEEE80211_FC0_VERSION_SHIFT 0
++#define IEEE80211_FC0_VERSION_0 0x00
++#define IEEE80211_FC0_TYPE_MASK 0x0c
++#define IEEE80211_FC0_TYPE_SHIFT 2
++#define IEEE80211_FC0_TYPE_MGT 0x00
++#define IEEE80211_FC0_TYPE_CTL 0x04
++#define IEEE80211_FC0_TYPE_DATA 0x08
++
++#define IEEE80211_FC0_SUBTYPE_MASK 0xf0
++#define IEEE80211_FC0_SUBTYPE_SHIFT 4
++/* for TYPE_MGT */
++#define IEEE80211_FC0_SUBTYPE_ASSOC_REQ 0x00
++#define IEEE80211_FC0_SUBTYPE_ASSOC_RESP 0x10
++#define IEEE80211_FC0_SUBTYPE_REASSOC_REQ 0x20
++#define IEEE80211_FC0_SUBTYPE_REASSOC_RESP 0x30
++#define IEEE80211_FC0_SUBTYPE_PROBE_REQ 0x40
++#define IEEE80211_FC0_SUBTYPE_PROBE_RESP 0x50
++#define IEEE80211_FC0_SUBTYPE_BEACON 0x80
++#define IEEE80211_FC0_SUBTYPE_ATIM 0x90
++#define IEEE80211_FC0_SUBTYPE_DISASSOC 0xa0
++#define IEEE80211_FC0_SUBTYPE_AUTH 0xb0
++#define IEEE80211_FC0_SUBTYPE_DEAUTH 0xc0
++/* for TYPE_CTL */
++#define IEEE80211_FC0_SUBTYPE_PS_POLL 0xa0
++#define IEEE80211_FC0_SUBTYPE_RTS 0xb0
++#define IEEE80211_FC0_SUBTYPE_CTS 0xc0
++#define IEEE80211_FC0_SUBTYPE_ACK 0xd0
++#define IEEE80211_FC0_SUBTYPE_CF_END 0xe0
++#define IEEE80211_FC0_SUBTYPE_CF_END_ACK 0xf0
++/* for TYPE_DATA (bit combination) */
++#define IEEE80211_FC0_SUBTYPE_DATA 0x00
++#define IEEE80211_FC0_SUBTYPE_CF_ACK 0x10
++#define IEEE80211_FC0_SUBTYPE_CF_POLL 0x20
++#define IEEE80211_FC0_SUBTYPE_CF_ACPL 0x30
++#define IEEE80211_FC0_SUBTYPE_NODATA 0x40
++#define IEEE80211_FC0_SUBTYPE_CFACK 0x50
++#define IEEE80211_FC0_SUBTYPE_CFPOLL 0x60
++#define IEEE80211_FC0_SUBTYPE_CF_ACK_CF_ACK 0x70
++#define IEEE80211_FC0_SUBTYPE_QOS 0x80
++#define IEEE80211_FC0_SUBTYPE_QOS_NULL 0xc0
++
++#define IEEE80211_FC1_DIR_MASK 0x03
++#define IEEE80211_FC1_DIR_NODS 0x00 /* STA->STA */
++#define IEEE80211_FC1_DIR_TODS 0x01 /* STA->AP */
++#define IEEE80211_FC1_DIR_FROMDS 0x02 /* AP ->STA */
++#define IEEE80211_FC1_DIR_DSTODS 0x03 /* AP ->AP */
++
++#define IEEE80211_FC1_MORE_FRAG 0x04
++#define IEEE80211_FC1_RETRY 0x08
++#define IEEE80211_FC1_PWR_MGT 0x10
++#define IEEE80211_FC1_MORE_DATA 0x20
++#define IEEE80211_FC1_WEP 0x40
++#define IEEE80211_FC1_ORDER 0x80
++
++#define IEEE80211_SEQ_FRAG_MASK 0x000f
++#define IEEE80211_SEQ_FRAG_SHIFT 0
++#define IEEE80211_SEQ_SEQ_MASK 0xfff0
++#define IEEE80211_SEQ_SEQ_SHIFT 4
++
++#define IEEE80211_NWID_LEN 32
++
++/*
++ * 802.11 rate set.
++ */
++#define IEEE80211_RATE_SIZE 8 /* 802.11 standard */
++#define IEEE80211_RATE_MAXSIZE 15 /* max rates we'll handle */
++
++#define WMM_NUM_AC 4 /* 4 AC categories */
++
++#define WMM_PARAM_ACI_M 0x60 /* Mask for ACI field */
++#define WMM_PARAM_ACI_S 5 /* Shift for ACI field */
++#define WMM_PARAM_ACM_M 0x10 /* Mask for ACM bit */
++#define WMM_PARAM_ACM_S 4 /* Shift for ACM bit */
++#define WMM_PARAM_AIFSN_M 0x0f /* Mask for aifsn field */
++#define WMM_PARAM_LOGCWMIN_M 0x0f /* Mask for CwMin field (in log) */
++#define WMM_PARAM_LOGCWMAX_M 0xf0 /* Mask for CwMax field (in log) */
++#define WMM_PARAM_LOGCWMAX_S 4 /* Shift for CwMax field */
++
++#define WMM_AC_TO_TID(_ac) ( \
++ ((_ac) == WMM_AC_VO) ? 6 : \
++ ((_ac) == WMM_AC_VI) ? 5 : \
++ ((_ac) == WMM_AC_BK) ? 1 : \
++ 0)
++
++#define TID_TO_WMM_AC(_tid) ( \
++ ((_tid) < 1) ? WMM_AC_BE : \
++ ((_tid) < 3) ? WMM_AC_BK : \
++ ((_tid) < 6) ? WMM_AC_VI : \
++ WMM_AC_VO)
++/*
++ * Management information element payloads.
++ */
++
++enum {
++ IEEE80211_ELEMID_SSID = 0,
++ IEEE80211_ELEMID_RATES = 1,
++ IEEE80211_ELEMID_FHPARMS = 2,
++ IEEE80211_ELEMID_DSPARMS = 3,
++ IEEE80211_ELEMID_CFPARMS = 4,
++ IEEE80211_ELEMID_TIM = 5,
++ IEEE80211_ELEMID_IBSSPARMS = 6,
++ IEEE80211_ELEMID_COUNTRY = 7,
++ IEEE80211_ELEMID_CHALLENGE = 16,
++ /* 17-31 reserved for challenge text extension */
++ IEEE80211_ELEMID_PWRCNSTR = 32,
++ IEEE80211_ELEMID_PWRCAP = 33,
++ IEEE80211_ELEMID_TPCREQ = 34,
++ IEEE80211_ELEMID_TPCREP = 35,
++ IEEE80211_ELEMID_SUPPCHAN = 36,
++ IEEE80211_ELEMID_CHANSWITCH = 37,
++ IEEE80211_ELEMID_MEASREQ = 38,
++ IEEE80211_ELEMID_MEASREP = 39,
++ IEEE80211_ELEMID_QUIET = 40,
++ IEEE80211_ELEMID_IBSSDFS = 41,
++ IEEE80211_ELEMID_ERP = 42,
++ IEEE80211_ELEMID_RSN = 48,
++ IEEE80211_ELEMID_XRATES = 50,
++ IEEE80211_ELEMID_TPC = 150,
++ IEEE80211_ELEMID_CCKM = 156,
++ IEEE80211_ELEMID_VENDOR = 221, /* vendor private */
++};
++
++#define ATH_OUI 0x7f0300 /* Atheros OUI */
++#define ATH_OUI_TYPE 0x01
++#define ATH_OUI_SUBTYPE 0x01
++#define ATH_OUI_VERSION 0x00
++
++#define WPA_OUI 0xf25000
++#define WPA_OUI_TYPE 0x01
++#define WPA_VERSION 1 /* current supported version */
++
++#define WPA_CSE_NULL 0x00
++#define WPA_CSE_WEP40 0x01
++#define WPA_CSE_TKIP 0x02
++#define WPA_CSE_CCMP 0x04
++#define WPA_CSE_WEP104 0x05
++
++#define WPA_ASE_NONE 0x00
++#define WPA_ASE_8021X_UNSPEC 0x01
++#define WPA_ASE_8021X_PSK 0x02
++
++#define RSN_OUI 0xac0f00
++#define RSN_VERSION 1 /* current supported version */
++
++#define RSN_CSE_NULL 0x00
++#define RSN_CSE_WEP40 0x01
++#define RSN_CSE_TKIP 0x02
++#define RSN_CSE_WRAP 0x03
++#define RSN_CSE_CCMP 0x04
++#define RSN_CSE_WEP104 0x05
++
++#define RSN_ASE_NONE 0x00
++#define RSN_ASE_8021X_UNSPEC 0x01
++#define RSN_ASE_8021X_PSK 0x02
++
++#define RSN_CAP_PREAUTH 0x01
++
++#define WMM_OUI 0xf25000
++#define WMM_OUI_TYPE 0x02
++#define WMM_INFO_OUI_SUBTYPE 0x00
++#define WMM_PARAM_OUI_SUBTYPE 0x01
++#define WMM_VERSION 1
++
++/* WMM stream classes */
++#define WMM_NUM_AC 4
++#define WMM_AC_BE 0 /* best effort */
++#define WMM_AC_BK 1 /* background */
++#define WMM_AC_VI 2 /* video */
++#define WMM_AC_VO 3 /* voice */
++
++/* TSPEC related */
++#define ACTION_CATEGORY_CODE_TSPEC 17
++#define ACTION_CODE_TSPEC_ADDTS 0
++#define ACTION_CODE_TSPEC_ADDTS_RESP 1
++#define ACTION_CODE_TSPEC_DELTS 2
++
++typedef enum {
++ TSPEC_STATUS_CODE_ADMISSION_ACCEPTED = 0,
++ TSPEC_STATUS_CODE_ADDTS_INVALID_PARAMS = 0x1,
++ TSPEC_STATUS_CODE_ADDTS_REQUEST_REFUSED = 0x3,
++ TSPEC_STATUS_CODE_UNSPECIFIED_QOS_RELATED_FAILURE = 0xC8,
++ TSPEC_STATUS_CODE_REQUESTED_REFUSED_POLICY_CONFIGURATION = 0xC9,
++ TSPEC_STATUS_CODE_INSUFFCIENT_BANDWIDTH = 0xCA,
++ TSPEC_STATUS_CODE_INVALID_PARAMS = 0xCB,
++ TSPEC_STATUS_CODE_DELTS_SENT = 0x30,
++ TSPEC_STATUS_CODE_DELTS_RECV = 0x31,
++} TSPEC_STATUS_CODE;
++
++/*
++ * WMM/802.11e Tspec Element
++ */
++typedef PREPACK struct wmm_tspec_ie_t {
++ A_UINT8 elementId;
++ A_UINT8 len;
++ A_UINT8 oui[3];
++ A_UINT8 ouiType;
++ A_UINT8 ouiSubType;
++ A_UINT8 version;
++ A_UINT16 tsInfo_info;
++ A_UINT8 tsInfo_reserved;
++ A_UINT16 nominalMSDU;
++ A_UINT16 maxMSDU;
++ A_UINT32 minServiceInt;
++ A_UINT32 maxServiceInt;
++ A_UINT32 inactivityInt;
++ A_UINT32 suspensionInt;
++ A_UINT32 serviceStartTime;
++ A_UINT32 minDataRate;
++ A_UINT32 meanDataRate;
++ A_UINT32 peakDataRate;
++ A_UINT32 maxBurstSize;
++ A_UINT32 delayBound;
++ A_UINT32 minPhyRate;
++ A_UINT16 sba;
++ A_UINT16 mediumTime;
++} POSTPACK WMM_TSPEC_IE;
++
++
++/*
++ * BEACON management packets
++ *
++ * octet timestamp[8]
++ * octet beacon interval[2]
++ * octet capability information[2]
++ * information element
++ * octet elemid
++ * octet length
++ * octet information[length]
++ */
++
++#define IEEE80211_BEACON_INTERVAL(beacon) \
++ ((beacon)[8] | ((beacon)[9] << 8))
++#define IEEE80211_BEACON_CAPABILITY(beacon) \
++ ((beacon)[10] | ((beacon)[11] << 8))
++
++#define IEEE80211_CAPINFO_ESS 0x0001
++#define IEEE80211_CAPINFO_IBSS 0x0002
++#define IEEE80211_CAPINFO_CF_POLLABLE 0x0004
++#define IEEE80211_CAPINFO_CF_POLLREQ 0x0008
++#define IEEE80211_CAPINFO_PRIVACY 0x0010
++#define IEEE80211_CAPINFO_SHORT_PREAMBLE 0x0020
++#define IEEE80211_CAPINFO_PBCC 0x0040
++#define IEEE80211_CAPINFO_CHNL_AGILITY 0x0080
++/* bits 8-9 are reserved */
++#define IEEE80211_CAPINFO_SHORT_SLOTTIME 0x0400
++#define IEEE80211_CAPINFO_APSD 0x0800
++/* bit 12 is reserved */
++#define IEEE80211_CAPINFO_DSSSOFDM 0x2000
++/* bits 14-15 are reserved */
++
++/*
++ * Authentication Modes
++ */
++
++enum ieee80211_authmode {
++ IEEE80211_AUTH_NONE = 0,
++ IEEE80211_AUTH_OPEN = 1,
++ IEEE80211_AUTH_SHARED = 2,
++ IEEE80211_AUTH_8021X = 3,
++ IEEE80211_AUTH_AUTO = 4, /* auto-select/accept */
++ /* NB: these are used only for ioctls */
++ IEEE80211_AUTH_WPA = 5, /* WPA/RSN w/ 802.1x */
++ IEEE80211_AUTH_WPA_PSK = 6, /* WPA/RSN w/ PSK */
++ IEEE80211_AUTH_WPA_CCKM = 7, /* WPA/RSN IE w/ CCKM */
++};
++
++#include "athendpack.h"
++
++#endif /* _NET80211_IEEE80211_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ieee80211_ioctl.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ieee80211_ioctl.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,163 @@
++/*
++ * Copyright (c) 2004-2005 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ *
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/os/linux/include/ieee80211_ioctl.h#1 $
++ */
++
++#ifndef _IEEE80211_IOCTL_H_
++#define _IEEE80211_IOCTL_H_
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++/*
++ * Extracted from the MADWIFI net80211/ieee80211_ioctl.h
++ */
++
++/*
++ * WPA/RSN get/set key request. Specify the key/cipher
++ * type and whether the key is to be used for sending and/or
++ * receiving. The key index should be set only when working
++ * with global keys (use IEEE80211_KEYIX_NONE for ``no index'').
++ * Otherwise a unicast/pairwise key is specified by the bssid
++ * (on a station) or mac address (on an ap). They key length
++ * must include any MIC key data; otherwise it should be no
++ more than IEEE80211_KEYBUF_SIZE.
++ */
++struct ieee80211req_key {
++ u_int8_t ik_type; /* key/cipher type */
++ u_int8_t ik_pad;
++ u_int16_t ik_keyix; /* key index */
++ u_int8_t ik_keylen; /* key length in bytes */
++ u_int8_t ik_flags;
++#define IEEE80211_KEY_XMIT 0x01
++#define IEEE80211_KEY_RECV 0x02
++#define IEEE80211_KEY_DEFAULT 0x80 /* default xmit key */
++ u_int8_t ik_macaddr[IEEE80211_ADDR_LEN];
++ u_int64_t ik_keyrsc; /* key receive sequence counter */
++ u_int64_t ik_keytsc; /* key transmit sequence counter */
++ u_int8_t ik_keydata[IEEE80211_KEYBUF_SIZE+IEEE80211_MICBUF_SIZE];
++};
++/*
++ * Delete a key either by index or address. Set the index
++ * to IEEE80211_KEYIX_NONE when deleting a unicast key.
++ */
++struct ieee80211req_del_key {
++ u_int8_t idk_keyix; /* key index */
++ u_int8_t idk_macaddr[IEEE80211_ADDR_LEN];
++};
++/*
++ * MLME state manipulation request. IEEE80211_MLME_ASSOC
++ * only makes sense when operating as a station. The other
++ * requests can be used when operating as a station or an
++ * ap (to effect a station).
++ */
++struct ieee80211req_mlme {
++ u_int8_t im_op; /* operation to perform */
++#define IEEE80211_MLME_ASSOC 1 /* associate station */
++#define IEEE80211_MLME_DISASSOC 2 /* disassociate station */
++#define IEEE80211_MLME_DEAUTH 3 /* deauthenticate station */
++#define IEEE80211_MLME_AUTHORIZE 4 /* authorize station */
++#define IEEE80211_MLME_UNAUTHORIZE 5 /* unauthorize station */
++ u_int16_t im_reason; /* 802.11 reason code */
++ u_int8_t im_macaddr[IEEE80211_ADDR_LEN];
++};
++
++struct ieee80211req_addpmkid {
++ u_int8_t pi_bssid[IEEE80211_ADDR_LEN];
++ u_int8_t pi_enable;
++ u_int8_t pi_pmkid[16];
++};
++
++#define AUTH_ALG_OPEN_SYSTEM 0x01
++#define AUTH_ALG_SHARED_KEY 0x02
++#define AUTH_ALG_LEAP 0x04
++
++struct ieee80211req_authalg {
++ u_int8_t auth_alg;
++};
++
++/*
++ * Request to add an IE to a Management Frame
++ */
++enum{
++ IEEE80211_APPIE_FRAME_BEACON = 0,
++ IEEE80211_APPIE_FRAME_PROBE_REQ = 1,
++ IEEE80211_APPIE_FRAME_PROBE_RESP = 2,
++ IEEE80211_APPIE_FRAME_ASSOC_REQ = 3,
++ IEEE80211_APPIE_FRAME_ASSOC_RESP = 4,
++ IEEE80211_APPIE_NUM_OF_FRAME = 5
++};
++
++/*
++ * The Maximum length of the IE that can be added to a Management frame
++ */
++#define IEEE80211_APPIE_FRAME_MAX_LEN 78
++
++struct ieee80211req_getset_appiebuf {
++ u_int32_t app_frmtype; /* management frame type for which buffer is added */
++ u_int32_t app_buflen; /*application supplied buffer length */
++ u_int8_t app_buf[];
++};
++
++/*
++ * The following definitions are used by an application to set filter
++ * for receiving management frames
++ */
++enum {
++ IEEE80211_FILTER_TYPE_BEACON = 0x1,
++ IEEE80211_FILTER_TYPE_PROBE_REQ = 0x2,
++ IEEE80211_FILTER_TYPE_PROBE_RESP = 0x4,
++ IEEE80211_FILTER_TYPE_ASSOC_REQ = 0x8,
++ IEEE80211_FILTER_TYPE_ASSOC_RESP = 0x10,
++ IEEE80211_FILTER_TYPE_AUTH = 0x20,
++ IEEE80211_FILTER_TYPE_DEAUTH = 0x40,
++ IEEE80211_FILTER_TYPE_DISASSOC = 0x80,
++ IEEE80211_FILTER_TYPE_ALL = 0xFF /* used to check the valid filter bits */
++};
++
++struct ieee80211req_set_filter {
++ u_int32_t app_filterype; /* management frame filter type */
++};
++
++enum {
++ IEEE80211_PARAM_AUTHMODE = 3, /* Authentication Mode */
++ IEEE80211_PARAM_MCASTCIPHER = 5,
++ IEEE80211_PARAM_MCASTKEYLEN = 6, /* multicast key length */
++ IEEE80211_PARAM_UCASTCIPHER = 8,
++ IEEE80211_PARAM_UCASTKEYLEN = 9, /* unicast key length */
++ IEEE80211_PARAM_WPA = 10, /* WPA mode (0,1,2) */
++ IEEE80211_PARAM_ROAMING = 12, /* roaming mode */
++ IEEE80211_PARAM_PRIVACY = 13, /* privacy invoked */
++ IEEE80211_PARAM_COUNTERMEASURES = 14, /* WPA/TKIP countermeasures */
++ IEEE80211_PARAM_DROPUNENCRYPTED = 15, /* discard unencrypted frames */
++};
++
++/*
++ * Values for IEEE80211_PARAM_WPA
++ */
++#define WPA_MODE_WPA1 1
++#define WPA_MODE_WPA2 2
++#define WPA_MODE_AUTO 3
++#define WPA_MODE_NONE 4
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _IEEE80211_IOCTL_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ieee80211_node.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ieee80211_node.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,77 @@
++/*-
++ * Copyright (c) 2001 Atsushi Onoe
++ * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting
++ * Copyright (c) 2006 Atheros Communications, Inc.
++ *
++ * Wireless Network driver for Atheros AR6001
++ * All rights reserved.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
++ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
++ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ */
++#ifndef _IEEE80211_NODE_H_
++#define _IEEE80211_NODE_H_
++
++/*
++ * Node locking definitions.
++ */
++#define IEEE80211_NODE_LOCK_INIT(_nt) A_MUTEX_INIT(&(_nt)->nt_nodelock)
++#define IEEE80211_NODE_LOCK_DESTROY(_nt)
++#define IEEE80211_NODE_LOCK(_nt) A_MUTEX_LOCK(&(_nt)->nt_nodelock)
++#define IEEE80211_NODE_UNLOCK(_nt) A_MUTEX_UNLOCK(&(_nt)->nt_nodelock)
++#define IEEE80211_NODE_LOCK_BH(_nt) A_MUTEX_LOCK(&(_nt)->nt_nodelock)
++#define IEEE80211_NODE_UNLOCK_BH(_nt) A_MUTEX_UNLOCK(&(_nt)->nt_nodelock)
++#define IEEE80211_NODE_LOCK_ASSERT(_nt)
++
++/*
++ * Node reference counting definitions.
++ *
++ * ieee80211_node_initref initialize the reference count to 1
++ * ieee80211_node_incref add a reference
++ * ieee80211_node_decref remove a reference
++ * ieee80211_node_dectestref remove a reference and return 1 if this
++ * is the last reference, otherwise 0
++ * ieee80211_node_refcnt reference count for printing (only)
++ */
++#define ieee80211_node_initref(_ni) ((_ni)->ni_refcnt = 1)
++#define ieee80211_node_incref(_ni) ((_ni)->ni_refcnt++)
++#define ieee80211_node_decref(_ni) ((_ni)->ni_refcnt--)
++#define ieee80211_node_dectestref(_ni) (((_ni)->ni_refcnt--) == 0)
++#define ieee80211_node_refcnt(_ni) ((_ni)->ni_refcnt)
++
++#define IEEE80211_NODE_HASHSIZE 32
++/* simple hash is enough for variation of macaddr */
++#define IEEE80211_NODE_HASH(addr) \
++ (((const A_UINT8 *)(addr))[IEEE80211_ADDR_LEN - 1] % \
++ IEEE80211_NODE_HASHSIZE)
++
++/*
++ * Table of ieee80211_node instances. Each ieee80211com
++ * has at least one for holding the scan candidates.
++ * When operating as an access point or in ibss mode there
++ * is a second table for associated stations or neighbors.
++ */
++struct ieee80211_node_table {
++ void *nt_wmip; /* back reference */
++ A_MUTEX_T nt_nodelock; /* on node table */
++ struct bss *nt_node_first; /* information of all nodes */
++ struct bss *nt_node_last; /* information of all nodes */
++ struct bss *nt_hash[IEEE80211_NODE_HASHSIZE];
++ const char *nt_name; /* for debugging */
++ A_UINT32 nt_scangen; /* gen# for timeout scan */
++ A_TIMER nt_inact_timer;
++ A_UINT8 isTimerArmed; /* is the node timer armed */
++};
++
++#define WLAN_NODE_INACT_TIMEOUT_MSEC 10000
++
++#endif /* _IEEE80211_NODE_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ini_dset.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ini_dset.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,40 @@
++/*
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ */
++#ifndef _INI_DSET_H_
++#define _INI_DSET_H_
++
++/*
++ * Each of these represents a WHAL INI table, which consists
++ * of an "address column" followed by 1 or more "value columns".
++ *
++ * Software uses the base WHAL_INI_DATA_ID+column to access a
++ * DataSet that holds a particular column of data.
++ */
++typedef enum {
++ WHAL_INI_DATA_ID_NULL =0,
++ WHAL_INI_DATA_ID_MODE_SPECIFIC =1, /* 2,3 */
++ WHAL_INI_DATA_ID_COMMON =4, /* 5 */
++ WHAL_INI_DATA_ID_BB_RFGAIN =6, /* 7,8 */
++ WHAL_INI_DATA_ID_ANALOG_BANK1 =9, /* 10 */
++ WHAL_INI_DATA_ID_ANALOG_BANK2 =11, /* 12 */
++ WHAL_INI_DATA_ID_ANALOG_BANK3 =13, /* 14, 15 */
++ WHAL_INI_DATA_ID_ANALOG_BANK6 =16, /* 17, 18 */
++ WHAL_INI_DATA_ID_ANALOG_BANK7 =19, /* 20 */
++ WHAL_INI_DATA_ID_MODE_OVERRIDES =21, /* 22,23 */
++ WHAL_INI_DATA_ID_COMMON_OVERRIDES =24, /* 25 */
++
++ WHAL_INI_DATA_ID_MAX =25
++} WHAL_INI_DATA_ID;
++
++typedef PREPACK struct {
++ A_UINT16 freqIndex; // 1 - A mode 2 - B or G mode 0 - common
++ A_UINT16 offset;
++ A_UINT32 newValue;
++} POSTPACK INI_DSET_REG_OVERRIDE;
++
++#endif
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/regDb.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/regDb.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,19 @@
++/*
++ * Copyright (c) 2005 Atheros Communications, Inc.
++ * All rights reserved.
++ *
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ * This module contains the header files for regulatory module,
++ * which include the DB schema and DB values.
++ * $Id:
++ */
++
++#ifndef __REG_DB_H__
++#define __REG_DB_H__
++
++#include "./regulatory/reg_dbschema.h"
++#include "./regulatory/reg_dbvalues.h"
++
++#endif /* __REG_DB_H__ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/regdump.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/regdump.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,33 @@
++#ifndef __REGDUMP_H__
++#define __REGDUMP_H__
++/*
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ */
++#if defined(AR6001)
++#include "AR6001/AR6001_regdump.h"
++#endif
++#if defined(AR6002)
++#include "AR6002/AR6002_regdump.h"
++#endif
++
++#if !defined(__ASSEMBLER__)
++/*
++ * Target CPU state at the time of failure is reflected
++ * in a register dump, which the Host can fetch through
++ * the diagnostic window.
++ */
++struct register_dump_s {
++ A_UINT32 target_id; /* Target ID */
++ A_UINT32 assline; /* Line number (if assertion failure) */
++ A_UINT32 pc; /* Program Counter at time of exception */
++ A_UINT32 badvaddr; /* Virtual address causing exception */
++ CPU_exception_frame_t exc_frame; /* CPU-specific exception info */
++
++ /* Could copy top of stack here, too.... */
++};
++#endif /* __ASSEMBLER__ */
++#endif /* __REGDUMP_H__ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/targaddrs.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/targaddrs.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,158 @@
++/*
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ */
++
++#ifndef __TARGADDRS_H__
++#define __TARGADDRS_H__
++#if defined(AR6001)
++#include "AR6001/addrs.h"
++#endif
++#if defined(AR6002)
++#include "AR6002/addrs.h"
++#endif
++
++/*
++ * AR6K option bits, to enable/disable various features.
++ * By default, all option bits are 0.
++ * These bits can be set in LOCAL_SCRATCH register 0.
++ */
++#define AR6K_OPTION_BMI_DISABLE 0x01 /* Disable BMI comm with Host */
++#define AR6K_OPTION_SERIAL_ENABLE 0x02 /* Enable serial port msgs */
++#define AR6K_OPTION_WDT_DISABLE 0x04 /* WatchDog Timer override */
++#define AR6K_OPTION_SLEEP_DISABLE 0x08 /* Disable system sleep */
++#define AR6K_OPTION_STOP_BOOT 0x10 /* Stop boot processes (for ATE) */
++#define AR6K_OPTION_ENABLE_NOANI 0x20 /* Operate without ANI */
++#define AR6K_OPTION_DSET_DISABLE 0x40 /* Ignore DataSets */
++#define AR6K_OPTION_IGNORE_FLASH 0x80 /* Ignore flash during bootup */
++
++/*
++ * xxx_HOST_INTEREST_ADDRESS is the address in Target RAM of the
++ * host_interest structure. It must match the address of the _host_interest
++ * symbol (see linker script).
++ *
++ * Host Interest is shared between Host and Target in order to coordinate
++ * between the two, and is intended to remain constant (with additions only
++ * at the end) across software releases.
++ */
++#define AR6001_HOST_INTEREST_ADDRESS 0x80000600
++#define AR6002_HOST_INTEREST_ADDRESS 0x00500400
++
++#define HOST_INTEREST_MAX_SIZE 0x100
++
++#if !defined(__ASSEMBLER__)
++struct register_dump_s;
++struct dbglog_hdr_s;
++
++/*
++ * These are items that the Host may need to access
++ * via BMI or via the Diagnostic Window. The position
++ * of items in this structure must remain constant
++ * across firmware revisions!
++ *
++ * Types for each item must be fixed size across
++ * target and host platforms.
++ *
++ * More items may be added at the end.
++ */
++struct host_interest_s {
++ /*
++ * Pointer to application-defined area, if any.
++ * Set by Target application during startup.
++ */
++ A_UINT32 hi_app_host_interest; /* 0x00 */
++
++ /* Pointer to register dump area, valid after Target crash. */
++ A_UINT32 hi_failure_state; /* 0x04 */
++
++ /* Pointer to debug logging header */
++ A_UINT32 hi_dbglog_hdr; /* 0x08 */
++
++ /* Indicates whether or not flash is present on Target.
++ * NB: flash_is_present indicator is here not just
++ * because it might be of interest to the Host; but
++ * also because it's set early on by Target's startup
++ * asm code and we need it to have a special RAM address
++ * so that it doesn't get reinitialized with the rest
++ * of data.
++ */
++ A_UINT32 hi_flash_is_present; /* 0x0c */
++
++ /*
++ * General-purpose flag bits, similar to AR6000_OPTION_* flags.
++ * Can be used by application rather than by OS.
++ */
++ A_UINT32 hi_option_flag; /* 0x10 */
++
++ /*
++ * Boolean that determines whether or not to
++ * display messages on the serial port.
++ */
++ A_UINT32 hi_serial_enable; /* 0x14 */
++
++ /* Start address of Flash DataSet index, if any */
++ A_UINT32 hi_dset_list_head; /* 0x18 */
++
++ /* Override Target application start address */
++ A_UINT32 hi_app_start; /* 0x1c */
++
++ /* Clock and voltage tuning */
++ A_UINT32 hi_skip_clock_init; /* 0x20 */
++ A_UINT32 hi_core_clock_setting; /* 0x24 */
++ A_UINT32 hi_cpu_clock_setting; /* 0x28 */
++ A_UINT32 hi_system_sleep_setting; /* 0x2c */
++ A_UINT32 hi_xtal_control_setting; /* 0x30 */
++ A_UINT32 hi_pll_ctrl_setting_24ghz; /* 0x34 */
++ A_UINT32 hi_pll_ctrl_setting_5ghz; /* 0x38 */
++ A_UINT32 hi_ref_voltage_trim_setting; /* 0x3c */
++ A_UINT32 hi_clock_info; /* 0x40 */
++
++ /*
++ * Flash configuration overrides, used only
++ * when firmware is not executing from flash.
++ * (When using flash, modify the global variables
++ * with equivalent names.)
++ */
++ A_UINT32 hi_bank0_addr_value; /* 0x44 */
++ A_UINT32 hi_bank0_read_value; /* 0x48 */
++ A_UINT32 hi_bank0_write_value; /* 0x4c */
++ A_UINT32 hi_bank0_config_value; /* 0x50 */
++
++ /* Pointer to Board Data */
++ A_UINT32 hi_board_data; /* 0x54 */
++ A_UINT32 hi_board_data_initialized; /* 0x58 */
++
++ A_UINT32 hi_dset_RAM_index_table; /* 0x5c */
++
++ A_UINT32 hi_desired_baud_rate; /* 0x60 */
++ A_UINT32 hi_dbglog_config; /* 0x64 */
++ A_UINT32 hi_end_RAM_reserve_sz; /* 0x68 */
++ A_UINT32 hi_mbox_io_block_sz; /* 0x6c */
++
++ A_UINT32 hi_num_bpatch_streams; /* 0x70 */
++ A_UINT32 hi_mbox_isr_yield_limit; /* 0x74 */
++
++ A_UINT32 hi_refclk_hz; /* 0x78 */
++};
++
++/* Bits defined in hi_option_flag */
++#define HI_OPTION_TIMER_WAR 1 /* not really used */
++
++/*
++ * Intended for use by Host software, this macro returns the Target RAM
++ * address of any item in the host_interest structure.
++ * Example: target_addr = AR6001_HOST_INTEREST_ITEM_ADDRESS(hi_board_data);
++ */
++#define AR6001_HOST_INTEREST_ITEM_ADDRESS(item) \
++ ((A_UINT32)&((((struct host_interest_s *)(AR6001_HOST_INTEREST_ADDRESS))->item)))
++
++#define AR6002_HOST_INTEREST_ITEM_ADDRESS(item) \
++ ((A_UINT32)&((((struct host_interest_s *)(AR6002_HOST_INTEREST_ADDRESS))->item)))
++
++
++#endif /* !__ASSEMBLER__ */
++
++#endif /* __TARGADDRS_H__ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/testcmd.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/testcmd.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,144 @@
++/*
++ * Copyright (c) 2004-2005 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ */
++
++#ifndef TESTCMD_H_
++#define TESTCMD_H_
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++typedef enum {
++ ZEROES_PATTERN = 0,
++ ONES_PATTERN,
++ REPEATING_10,
++ PN7_PATTERN,
++ PN9_PATTERN,
++ PN15_PATTERN
++}TX_DATA_PATTERN;
++
++/* Continous tx
++ mode : TCMD_CONT_TX_OFF - Disabling continous tx
++ TCMD_CONT_TX_SINE - Enable continuous unmodulated tx
++ TCMD_CONT_TX_FRAME- Enable continuous modulated tx
++ freq : Channel freq in Mhz. (e.g 2412 for channel 1 in 11 g)
++dataRate: 0 - 1 Mbps
++ 1 - 2 Mbps
++ 2 - 5.5 Mbps
++ 3 - 11 Mbps
++ 4 - 6 Mbps
++ 5 - 9 Mbps
++ 6 - 12 Mbps
++ 7 - 18 Mbps
++ 8 - 24 Mbps
++ 9 - 36 Mbps
++ 10 - 28 Mbps
++ 11 - 54 Mbps
++ txPwr: Tx power in dBm[5 -11] for unmod Tx, [5-14] for mod Tx
++antenna: 1 - one antenna
++ 2 - two antenna
++Note : Enable/disable continuous tx test cmd works only when target is awake.
++*/
++
++typedef enum {
++ TCMD_CONT_TX_OFF = 0,
++ TCMD_CONT_TX_SINE,
++ TCMD_CONT_TX_FRAME,
++ TCMD_CONT_TX_TX99,
++ TCMD_CONT_TX_TX100
++} TCMD_CONT_TX_MODE;
++
++typedef PREPACK struct {
++ A_UINT32 testCmdId;
++ A_UINT32 mode;
++ A_UINT32 freq;
++ A_UINT32 dataRate;
++ A_INT32 txPwr;
++ A_UINT32 antenna;
++ A_UINT32 enANI;
++ A_UINT32 scramblerOff;
++ A_UINT32 aifsn;
++ A_UINT16 pktSz;
++ A_UINT16 txPattern;
++} POSTPACK TCMD_CONT_TX;
++
++#define TCMD_TXPATTERN_ZERONE 0x1
++#define TCMD_TXPATTERN_ZERONE_DIS_SCRAMBLE 0x2
++
++/* Continuous Rx
++ act: TCMD_CONT_RX_PROMIS - promiscuous mode (accept all incoming frames)
++ TCMD_CONT_RX_FILTER - filter mode (accept only frames with dest
++ address equal specified
++ mac address (set via act =3)
++ TCMD_CONT_RX_REPORT off mode (disable cont rx mode and get the
++ report from the last cont
++ Rx test)
++
++ TCMD_CONT_RX_SETMAC - set MacAddr mode (sets the MAC address for the
++ target. This Overrides
++ the default MAC address.)
++
++*/
++typedef enum {
++ TCMD_CONT_RX_PROMIS =0,
++ TCMD_CONT_RX_FILTER,
++ TCMD_CONT_RX_REPORT,
++ TCMD_CONT_RX_SETMAC
++} TCMD_CONT_RX_ACT;
++
++typedef PREPACK struct {
++ A_UINT32 testCmdId;
++ A_UINT32 act;
++ A_UINT32 enANI;
++ PREPACK union {
++ struct PREPACK TCMD_CONT_RX_PARA {
++ A_UINT32 freq;
++ A_UINT32 antenna;
++ } POSTPACK para;
++ struct PREPACK TCMD_CONT_RX_REPORT {
++ A_UINT32 totalPkt;
++ A_INT32 rssiInDBm;
++ } POSTPACK report;
++ struct PREPACK TCMD_CONT_RX_MAC {
++ A_UCHAR addr[ATH_MAC_LEN];
++ } POSTPACK mac;
++ } POSTPACK u;
++} POSTPACK TCMD_CONT_RX;
++
++/* Force sleep/wake test cmd
++ mode: TCMD_PM_WAKEUP - Wakeup the target
++ TCMD_PM_SLEEP - Force the target to sleep.
++ */
++typedef enum {
++ TCMD_PM_WAKEUP = 1, /* be consistent with target */
++ TCMD_PM_SLEEP
++} TCMD_PM_MODE;
++
++typedef PREPACK struct {
++ A_UINT32 testCmdId;
++ A_UINT32 mode;
++} POSTPACK TCMD_PM;
++
++typedef enum{
++ TCMD_CONT_TX_ID,
++ TCMD_CONT_RX_ID,
++ TCMD_PM_ID
++ } TCMD_ID;
++
++typedef PREPACK union {
++ TCMD_CONT_TX contTx;
++ TCMD_CONT_RX contRx;
++ TCMD_PM pm ;
++} POSTPACK TEST_CMD;
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* TESTCMD_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wlan_api.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wlan_api.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,101 @@
++#ifndef _HOST_WLAN_API_H_
++#define _HOST_WLAN_API_H_
++/*
++ * Copyright (c) 2004-2005 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * This file contains the API for the host wlan module
++ *
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/wlan_api.h#1 $
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++struct ieee80211_node_table;
++struct ieee80211_frame;
++
++struct ieee80211_common_ie {
++ A_UINT16 ie_chan;
++ A_UINT8 *ie_tstamp;
++ A_UINT8 *ie_ssid;
++ A_UINT8 *ie_rates;
++ A_UINT8 *ie_xrates;
++ A_UINT8 *ie_country;
++ A_UINT8 *ie_wpa;
++ A_UINT8 *ie_rsn;
++ A_UINT8 *ie_wmm;
++ A_UINT8 *ie_ath;
++ A_UINT16 ie_capInfo;
++ A_UINT16 ie_beaconInt;
++ A_UINT8 *ie_tim;
++ A_UINT8 *ie_chswitch;
++ A_UINT8 ie_erp;
++ A_UINT8 *ie_wsc;
++};
++
++typedef struct bss {
++ A_UINT8 ni_macaddr[6];
++ A_UINT8 ni_snr;
++ A_INT16 ni_rssi;
++ struct bss *ni_list_next;
++ struct bss *ni_list_prev;
++ struct bss *ni_hash_next;
++ struct bss *ni_hash_prev;
++ struct ieee80211_common_ie ni_cie;
++ A_UINT8 *ni_buf;
++ struct ieee80211_node_table *ni_table;
++ A_UINT32 ni_refcnt;
++ int ni_scangen;
++ A_UINT32 ni_tstamp;
++} bss_t;
++
++typedef void wlan_node_iter_func(void *arg, bss_t *);
++
++bss_t *wlan_node_alloc(struct ieee80211_node_table *nt, int wh_size);
++void wlan_node_free(bss_t *ni);
++void wlan_setup_node(struct ieee80211_node_table *nt, bss_t *ni,
++ const A_UINT8 *macaddr);
++bss_t *wlan_find_node(struct ieee80211_node_table *nt, const A_UINT8 *macaddr);
++void wlan_node_reclaim(struct ieee80211_node_table *nt, bss_t *ni);
++void wlan_free_allnodes(struct ieee80211_node_table *nt);
++void wlan_iterate_nodes(struct ieee80211_node_table *nt, wlan_node_iter_func *f,
++ void *arg);
++
++void wlan_node_table_init(void *wmip, struct ieee80211_node_table *nt);
++void wlan_node_table_reset(struct ieee80211_node_table *nt);
++void wlan_node_table_cleanup(struct ieee80211_node_table *nt);
++
++A_STATUS wlan_parse_beacon(A_UINT8 *buf, int framelen,
++ struct ieee80211_common_ie *cie);
++
++A_UINT16 wlan_ieee2freq(int chan);
++A_UINT32 wlan_freq2ieee(A_UINT16 freq);
++
++
++bss_t *
++wlan_find_Ssidnode (struct ieee80211_node_table *nt, A_UCHAR *pSsid,
++ A_UINT32 ssidLength, A_BOOL bIsWPA2);
++
++void
++wlan_node_return (struct ieee80211_node_table *nt, bss_t *ni);
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _HOST_WLAN_API_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wlan_dset.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wlan_dset.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,20 @@
++/*
++ * Copyright (c) 2007 Atheros Communications, Inc.
++ * All rights reserved.
++ *
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ */
++
++#ifndef __WLAN_DSET_H__
++#define __WKAN_DSET_H__
++
++typedef PREPACK struct wow_config_dset {
++
++ A_UINT8 valid_dset;
++ A_UINT8 gpio_enable;
++ A_UINT16 gpio_pin;
++} POSTPACK WOW_CONFIG_DSET;
++
++#endif
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wmi_api.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wmi_api.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,260 @@
++#ifndef _WMI_API_H_
++#define _WMI_API_H_
++/*
++ * Copyright (c) 2004-2006 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * This file contains the definitions for the Wireless Module Interface (WMI).
++ *
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/wmi_api.h#2 $
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++/*
++ * IP QoS Field definitions according to 802.1p
++ */
++#define BEST_EFFORT_PRI 0
++#define BACKGROUND_PRI 1
++#define EXCELLENT_EFFORT_PRI 3
++#define CONTROLLED_LOAD_PRI 4
++#define VIDEO_PRI 5
++#define VOICE_PRI 6
++#define NETWORK_CONTROL_PRI 7
++#define MAX_NUM_PRI 8
++
++#define UNDEFINED_PRI (0xff)
++
++/* simple mapping of IP TOS field to a WMI priority stream
++ * this mapping was taken from the original linux driver implementation
++ * The operation maps the following
++ *
++ * */
++#define IP_TOS_TO_WMI_PRI(tos) \
++ ((WMI_PRI_STREAM_ID)(((tos) >> 1) & 0x03))
++
++#define WMI_IMPLICIT_PSTREAM_INACTIVITY_INT 5000 /* 5 seconds */
++
++
++struct wmi_t;
++
++void *wmi_init(void *devt);
++
++void wmi_qos_state_init(struct wmi_t *wmip);
++void wmi_shutdown(struct wmi_t *wmip);
++A_UINT16 wmi_get_mapped_qos_queue(struct wmi_t *, A_UINT8);
++A_STATUS wmi_dix_2_dot3(struct wmi_t *wmip, void *osbuf);
++A_STATUS wmi_data_hdr_add(struct wmi_t *wmip, void *osbuf, A_UINT8 msgType);
++A_STATUS wmi_dot3_2_dix(struct wmi_t *wmip, void *osbuf);
++A_STATUS wmi_data_hdr_remove(struct wmi_t *wmip, void *osbuf);
++A_STATUS wmi_syncpoint(struct wmi_t *wmip);
++A_STATUS wmi_syncpoint_reset(struct wmi_t *wmip);
++WMI_PRI_STREAM_ID wmi_get_stream_id(struct wmi_t *wmip, A_UINT8 trafficClass);
++A_UINT8 wmi_implicit_create_pstream(struct wmi_t *wmip, void *osbuf, A_UINT8 dir, A_UINT8 up);
++
++A_STATUS wmi_control_rx(struct wmi_t *wmip, void *osbuf);
++void wmi_iterate_nodes(struct wmi_t *wmip, wlan_node_iter_func *f, void *arg);
++void wmi_free_allnodes(struct wmi_t *wmip);
++bss_t *wmi_find_node(struct wmi_t *wmip, const A_UINT8 *macaddr);
++
++
++typedef enum {
++ NO_SYNC_WMIFLAG = 0,
++ SYNC_BEFORE_WMIFLAG, /* transmit all queued data before cmd */
++ SYNC_AFTER_WMIFLAG, /* any new data waits until cmd execs */
++ SYNC_BOTH_WMIFLAG,
++ END_WMIFLAG /* end marker */
++} WMI_SYNC_FLAG;
++
++A_STATUS wmi_cmd_send(struct wmi_t *wmip, void *osbuf, WMI_COMMAND_ID cmdId,
++ WMI_SYNC_FLAG flag);
++A_STATUS wmi_connect_cmd(struct wmi_t *wmip,
++ NETWORK_TYPE netType,
++ DOT11_AUTH_MODE dot11AuthMode,
++ AUTH_MODE authMode,
++ CRYPTO_TYPE pairwiseCrypto,
++ A_UINT8 pairwiseCryptoLen,
++ CRYPTO_TYPE groupCrypto,
++ A_UINT8 groupCryptoLen,
++ int ssidLength,
++ A_UCHAR *ssid,
++ A_UINT8 *bssid,
++ A_UINT16 channel,
++ A_UINT32 ctrl_flags);
++A_STATUS wmi_reconnect_cmd(struct wmi_t *wmip,
++ A_UINT8 *bssid,
++ A_UINT16 channel);
++A_STATUS wmi_disconnect_cmd(struct wmi_t *wmip);
++A_STATUS wmi_getrev_cmd(struct wmi_t *wmip);
++A_STATUS wmi_startscan_cmd(struct wmi_t *wmip, WMI_SCAN_TYPE scanType,
++ A_BOOL forceFgScan, A_BOOL isLegacy,
++ A_UINT32 homeDwellTime, A_UINT32 forceScanInterval);
++A_STATUS wmi_scanparams_cmd(struct wmi_t *wmip, A_UINT16 fg_start_sec,
++ A_UINT16 fg_end_sec, A_UINT16 bg_sec,
++ A_UINT16 minact_chdw_msec,
++ A_UINT16 maxact_chdw_msec, A_UINT16 pas_chdw_msec,
++ A_UINT8 shScanRatio, A_UINT8 scanCtrlFlags,
++ A_UINT32 max_dfsch_act_time);
++A_STATUS wmi_bssfilter_cmd(struct wmi_t *wmip, A_UINT8 filter, A_UINT32 ieMask);
++A_STATUS wmi_probedSsid_cmd(struct wmi_t *wmip, A_UINT8 index, A_UINT8 flag,
++ A_UINT8 ssidLength, A_UCHAR *ssid);
++A_STATUS wmi_listeninterval_cmd(struct wmi_t *wmip, A_UINT16 listenInterval, A_UINT16 listenBeacons);
++A_STATUS wmi_bmisstime_cmd(struct wmi_t *wmip, A_UINT16 bmisstime, A_UINT16 bmissbeacons);
++A_STATUS wmi_associnfo_cmd(struct wmi_t *wmip, A_UINT8 ieType,
++ A_UINT8 ieLen, A_UINT8 *ieInfo);
++A_STATUS wmi_powermode_cmd(struct wmi_t *wmip, A_UINT8 powerMode);
++A_STATUS wmi_ibsspmcaps_cmd(struct wmi_t *wmip, A_UINT8 pmEnable, A_UINT8 ttl,
++ A_UINT16 atim_windows, A_UINT16 timeout_value);
++A_STATUS wmi_pmparams_cmd(struct wmi_t *wmip, A_UINT16 idlePeriod,
++ A_UINT16 psPollNum, A_UINT16 dtimPolicy);
++A_STATUS wmi_disctimeout_cmd(struct wmi_t *wmip, A_UINT8 timeout);
++A_STATUS wmi_sync_cmd(struct wmi_t *wmip, A_UINT8 syncNumber);
++A_STATUS wmi_create_pstream_cmd(struct wmi_t *wmip, WMI_CREATE_PSTREAM_CMD *pstream);
++A_STATUS wmi_delete_pstream_cmd(struct wmi_t *wmip, A_UINT8 trafficClass, A_UINT8 streamID);
++A_STATUS wmi_set_bitrate_cmd(struct wmi_t *wmip, A_INT32 rate);
++A_STATUS wmi_get_bitrate_cmd(struct wmi_t *wmip);
++A_INT8 wmi_validate_bitrate(struct wmi_t *wmip, A_INT32 rate);
++A_STATUS wmi_get_regDomain_cmd(struct wmi_t *wmip);
++A_STATUS wmi_get_channelList_cmd(struct wmi_t *wmip);
++A_STATUS wmi_set_channelParams_cmd(struct wmi_t *wmip, A_UINT8 scanParam,
++ WMI_PHY_MODE mode, A_INT8 numChan,
++ A_UINT16 *channelList);
++
++A_STATUS wmi_set_snr_threshold_params(struct wmi_t *wmip,
++ WMI_SNR_THRESHOLD_PARAMS_CMD *snrCmd);
++A_STATUS wmi_set_rssi_threshold_params(struct wmi_t *wmip,
++ WMI_RSSI_THRESHOLD_PARAMS_CMD *rssiCmd);
++A_STATUS wmi_clr_rssi_snr(struct wmi_t *wmip);
++A_STATUS wmi_set_lq_threshold_params(struct wmi_t *wmip,
++ WMI_LQ_THRESHOLD_PARAMS_CMD *lqCmd);
++A_STATUS wmi_set_rts_cmd(struct wmi_t *wmip, A_UINT16 threshold);
++A_STATUS wmi_set_lpreamble_cmd(struct wmi_t *wmip, A_UINT8 status);
++
++A_STATUS wmi_set_error_report_bitmask(struct wmi_t *wmip, A_UINT32 bitmask);
++
++A_STATUS wmi_get_challenge_resp_cmd(struct wmi_t *wmip, A_UINT32 cookie,
++ A_UINT32 source);
++A_STATUS wmi_config_debug_module_cmd(struct wmi_t *wmip, A_UINT16 mmask,
++ A_UINT16 tsr, A_BOOL rep, A_UINT16 size,
++ A_UINT32 valid);
++A_STATUS wmi_get_stats_cmd(struct wmi_t *wmip);
++A_STATUS wmi_addKey_cmd(struct wmi_t *wmip, A_UINT8 keyIndex,
++ CRYPTO_TYPE keyType, A_UINT8 keyUsage,
++ A_UINT8 keyLength,A_UINT8 *keyRSC,
++ A_UINT8 *keyMaterial, A_UINT8 key_op_ctrl,
++ WMI_SYNC_FLAG sync_flag);
++A_STATUS wmi_add_krk_cmd(struct wmi_t *wmip, A_UINT8 *krk);
++A_STATUS wmi_delete_krk_cmd(struct wmi_t *wmip);
++A_STATUS wmi_deleteKey_cmd(struct wmi_t *wmip, A_UINT8 keyIndex);
++A_STATUS wmi_set_akmp_params_cmd(struct wmi_t *wmip,
++ WMI_SET_AKMP_PARAMS_CMD *akmpParams);
++A_STATUS wmi_get_pmkid_list_cmd(struct wmi_t *wmip);
++A_STATUS wmi_set_pmkid_list_cmd(struct wmi_t *wmip,
++ WMI_SET_PMKID_LIST_CMD *pmkInfo);
++A_STATUS wmi_set_txPwr_cmd(struct wmi_t *wmip, A_UINT8 dbM);
++A_STATUS wmi_get_txPwr_cmd(struct wmi_t *wmip);
++A_STATUS wmi_switch_radio(struct wmi_t *wmip, A_UINT8 on);
++A_STATUS wmi_addBadAp_cmd(struct wmi_t *wmip, A_UINT8 apIndex, A_UINT8 *bssid);
++A_STATUS wmi_deleteBadAp_cmd(struct wmi_t *wmip, A_UINT8 apIndex);
++A_STATUS wmi_set_tkip_countermeasures_cmd(struct wmi_t *wmip, A_BOOL en);
++A_STATUS wmi_setPmkid_cmd(struct wmi_t *wmip, A_UINT8 *bssid, A_UINT8 *pmkId,
++ A_BOOL set);
++A_STATUS wmi_set_access_params_cmd(struct wmi_t *wmip, A_UINT16 txop,
++ A_UINT8 eCWmin, A_UINT8 eCWmax,
++ A_UINT8 aifsn);
++A_STATUS wmi_set_retry_limits_cmd(struct wmi_t *wmip, A_UINT8 frameType,
++ A_UINT8 trafficClass, A_UINT8 maxRetries,
++ A_UINT8 enableNotify);
++
++void wmi_get_current_bssid(struct wmi_t *wmip, A_UINT8 *bssid);
++
++A_STATUS wmi_get_roam_tbl_cmd(struct wmi_t *wmip);
++A_STATUS wmi_get_roam_data_cmd(struct wmi_t *wmip, A_UINT8 roamDataType);
++A_STATUS wmi_set_roam_ctrl_cmd(struct wmi_t *wmip, WMI_SET_ROAM_CTRL_CMD *p,
++ A_UINT8 size);
++A_STATUS wmi_set_powersave_timers_cmd(struct wmi_t *wmip,
++ WMI_POWERSAVE_TIMERS_POLICY_CMD *pCmd,
++ A_UINT8 size);
++
++A_STATUS wmi_set_opt_mode_cmd(struct wmi_t *wmip, A_UINT8 optMode);
++A_STATUS wmi_opt_tx_frame_cmd(struct wmi_t *wmip,
++ A_UINT8 frmType,
++ A_UINT8 *dstMacAddr,
++ A_UINT8 *bssid,
++ A_UINT16 optIEDataLen,
++ A_UINT8 *optIEData);
++
++A_STATUS wmi_set_adhoc_bconIntvl_cmd(struct wmi_t *wmip, A_UINT16 intvl);
++A_STATUS wmi_set_voice_pkt_size_cmd(struct wmi_t *wmip, A_UINT16 voicePktSize);
++A_STATUS wmi_set_max_sp_len_cmd(struct wmi_t *wmip, A_UINT8 maxSpLen);
++A_UINT8 convert_userPriority_to_trafficClass(A_UINT8 userPriority);
++A_UINT8 wmi_get_power_mode_cmd(struct wmi_t *wmip);
++A_STATUS wmi_verify_tspec_params(WMI_CREATE_PSTREAM_CMD *pCmd, A_BOOL tspecCompliance);
++
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++A_STATUS wmi_test_cmd(struct wmi_t *wmip, A_UINT8 *buf, A_UINT32 len);
++#endif
++
++A_STATUS wmi_set_bt_status_cmd(struct wmi_t *wmip, A_UINT8 streamType, A_UINT8 status);
++A_STATUS wmi_set_bt_params_cmd(struct wmi_t *wmip, WMI_SET_BT_PARAMS_CMD* cmd);
++
++
++/*
++ * This function is used to configure the fix rates mask to the target.
++ */
++A_STATUS wmi_set_fixrates_cmd(struct wmi_t *wmip, A_INT16 fixRatesMask);
++A_STATUS wmi_get_ratemask_cmd(struct wmi_t *wmip);
++
++A_STATUS wmi_set_authmode_cmd(struct wmi_t *wmip, A_UINT8 mode);
++
++A_STATUS wmi_set_reassocmode_cmd(struct wmi_t *wmip, A_UINT8 mode);
++
++A_STATUS wmi_set_wmm_cmd(struct wmi_t *wmip, WMI_WMM_STATUS status);
++A_STATUS wmi_set_wmm_txop(struct wmi_t *wmip, WMI_TXOP_CFG txEnable);
++
++A_STATUS wmi_get_keepalive_configured(struct wmi_t *wmip);
++A_UINT8 wmi_get_keepalive_cmd(struct wmi_t *wmip);
++A_STATUS wmi_set_keepalive_cmd(struct wmi_t *wmip, A_UINT8 keepaliveInterval);
++
++A_STATUS wmi_set_appie_cmd(struct wmi_t *wmip, A_UINT8 mgmtFrmType,
++ A_UINT8 ieLen,A_UINT8 *ieInfo);
++
++A_STATUS wmi_set_halparam_cmd(struct wmi_t *wmip, A_UINT8 *cmd, A_UINT16 dataLen);
++A_INT32 wmi_get_rate(A_INT8 rateindex);
++
++/*Wake on Wireless WMI commands*/
++A_STATUS wmi_set_host_sleep_mode_cmd(struct wmi_t *wmip, WMI_SET_HOST_SLEEP_MODE_CMD *cmd);
++A_STATUS wmi_set_wow_mode_cmd(struct wmi_t *wmip, WMI_SET_WOW_MODE_CMD *cmd);
++A_STATUS wmi_get_wow_list_cmd(struct wmi_t *wmip, WMI_GET_WOW_LIST_CMD *cmd);
++A_STATUS wmi_add_wow_pattern_cmd(struct wmi_t *wmip,
++ WMI_ADD_WOW_PATTERN_CMD *cmd, A_UINT8* pattern, A_UINT8* mask, A_UINT8 pattern_size);
++A_STATUS wmi_del_wow_pattern_cmd(struct wmi_t *wmip,
++ WMI_DEL_WOW_PATTERN_CMD *cmd);
++A_STATUS wmi_set_wsc_status_cmd(struct wmi_t *wmip, A_UINT32 status);
++
++bss_t *
++wmi_find_Ssidnode (struct wmi_t *wmip, A_UCHAR *pSsid,
++ A_UINT32 ssidLength, A_BOOL bIsWPA2);
++
++void
++wmi_node_return (struct wmi_t *wmip, bss_t *bss);
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _WMI_API_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wmi.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wmi.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,1743 @@
++/*
++ * Copyright (c) 2004-2006 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ * This file contains the definitions of the WMI protocol specified in the
++ * Wireless Module Interface (WMI). It includes definitions of all the
++ * commands and events. Commands are messages from the host to the WM.
++ * Events and Replies are messages from the WM to the host.
++ *
++ * Ownership of correctness in regards to WMI commands
++ * belongs to the host driver and the WM is not required to validate
++ * parameters for value, proper range, or any other checking.
++ *
++ */
++
++#ifndef _WMI_H_
++#define _WMI_H_
++
++#ifndef ATH_TARGET
++#include "athstartpack.h"
++#endif
++
++#include "wmix.h"
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++#define WMI_PROTOCOL_VERSION 0x0002
++#define WMI_PROTOCOL_REVISION 0x0000
++
++#define ATH_MAC_LEN 6 /* length of mac in bytes */
++#define WMI_CMD_MAX_LEN 100
++#define WMI_CONTROL_MSG_MAX_LEN 256
++#define WMI_OPT_CONTROL_MSG_MAX_LEN 1536
++#define IS_ETHERTYPE(_typeOrLen) ((_typeOrLen) >= 0x0600)
++#define RFC1042OUI {0x00, 0x00, 0x00}
++
++#define IP_ETHERTYPE 0x0800
++
++#define WMI_IMPLICIT_PSTREAM 0xFF
++#define WMI_MAX_THINSTREAM 15
++
++struct host_app_area_s {
++ A_UINT32 wmi_protocol_ver;
++};
++
++/*
++ * Data Path
++ */
++typedef PREPACK struct {
++ A_UINT8 dstMac[ATH_MAC_LEN];
++ A_UINT8 srcMac[ATH_MAC_LEN];
++ A_UINT16 typeOrLen;
++} POSTPACK ATH_MAC_HDR;
++
++typedef PREPACK struct {
++ A_UINT8 dsap;
++ A_UINT8 ssap;
++ A_UINT8 cntl;
++ A_UINT8 orgCode[3];
++ A_UINT16 etherType;
++} POSTPACK ATH_LLC_SNAP_HDR;
++
++typedef enum {
++ DATA_MSGTYPE = 0x0,
++ CNTL_MSGTYPE,
++ SYNC_MSGTYPE
++} WMI_MSG_TYPE;
++
++
++typedef PREPACK struct {
++ A_INT8 rssi;
++ A_UINT8 info; /* WMI_MSG_TYPE in lower 2 bits - b1b0 */
++ /* UP in next 3 bits - b4b3b2 */
++#define WMI_DATA_HDR_MSG_TYPE_MASK 0x03
++#define WMI_DATA_HDR_MSG_TYPE_SHIFT 0
++#define WMI_DATA_HDR_UP_MASK 0x07
++#define WMI_DATA_HDR_UP_SHIFT 2
++#define WMI_DATA_HDR_IS_MSG_TYPE(h, t) (((h)->info & (WMI_DATA_HDR_MSG_TYPE_MASK)) == (t))
++} POSTPACK WMI_DATA_HDR;
++
++
++#define WMI_DATA_HDR_SET_MSG_TYPE(h, t) (h)->info = (((h)->info & ~(WMI_DATA_HDR_MSG_TYPE_MASK << WMI_DATA_HDR_MSG_TYPE_SHIFT)) | (t << WMI_DATA_HDR_MSG_TYPE_SHIFT))
++#define WMI_DATA_HDR_SET_UP(h, p) (h)->info = (((h)->info & ~(WMI_DATA_HDR_UP_MASK << WMI_DATA_HDR_UP_SHIFT)) | (p << WMI_DATA_HDR_UP_SHIFT))
++
++/*
++ * Control Path
++ */
++typedef PREPACK struct {
++ A_UINT16 commandId;
++} POSTPACK WMI_CMD_HDR; /* used for commands and events */
++
++/*
++ * List of Commnands
++ */
++typedef enum {
++ WMI_CONNECT_CMDID = 0x0001,
++ WMI_RECONNECT_CMDID,
++ WMI_DISCONNECT_CMDID,
++ WMI_SYNCHRONIZE_CMDID,
++ WMI_CREATE_PSTREAM_CMDID,
++ WMI_DELETE_PSTREAM_CMDID,
++ WMI_START_SCAN_CMDID,
++ WMI_SET_SCAN_PARAMS_CMDID,
++ WMI_SET_BSS_FILTER_CMDID,
++ WMI_SET_PROBED_SSID_CMDID,
++ WMI_SET_LISTEN_INT_CMDID,
++ WMI_SET_BMISS_TIME_CMDID,
++ WMI_SET_DISC_TIMEOUT_CMDID,
++ WMI_GET_CHANNEL_LIST_CMDID,
++ WMI_SET_BEACON_INT_CMDID,
++ WMI_GET_STATISTICS_CMDID,
++ WMI_SET_CHANNEL_PARAMS_CMDID,
++ WMI_SET_POWER_MODE_CMDID,
++ WMI_SET_IBSS_PM_CAPS_CMDID,
++ WMI_SET_POWER_PARAMS_CMDID,
++ WMI_SET_POWERSAVE_TIMERS_POLICY_CMDID,
++ WMI_ADD_CIPHER_KEY_CMDID,
++ WMI_DELETE_CIPHER_KEY_CMDID,
++ WMI_ADD_KRK_CMDID,
++ WMI_DELETE_KRK_CMDID,
++ WMI_SET_PMKID_CMDID,
++ WMI_SET_TX_PWR_CMDID,
++ WMI_GET_TX_PWR_CMDID,
++ WMI_SET_ASSOC_INFO_CMDID,
++ WMI_ADD_BAD_AP_CMDID,
++ WMI_DELETE_BAD_AP_CMDID,
++ WMI_SET_TKIP_COUNTERMEASURES_CMDID,
++ WMI_RSSI_THRESHOLD_PARAMS_CMDID,
++ WMI_TARGET_ERROR_REPORT_BITMASK_CMDID,
++ WMI_SET_ACCESS_PARAMS_CMDID,
++ WMI_SET_RETRY_LIMITS_CMDID,
++ WMI_SET_OPT_MODE_CMDID,
++ WMI_OPT_TX_FRAME_CMDID,
++ WMI_SET_VOICE_PKT_SIZE_CMDID,
++ WMI_SET_MAX_SP_LEN_CMDID,
++ WMI_SET_ROAM_CTRL_CMDID,
++ WMI_GET_ROAM_TBL_CMDID,
++ WMI_GET_ROAM_DATA_CMDID,
++ WMI_ENABLE_RM_CMDID,
++ WMI_SET_MAX_OFFHOME_DURATION_CMDID,
++ WMI_EXTENSION_CMDID, /* Non-wireless extensions */
++ WMI_SNR_THRESHOLD_PARAMS_CMDID,
++ WMI_LQ_THRESHOLD_PARAMS_CMDID,
++ WMI_SET_LPREAMBLE_CMDID,
++ WMI_SET_RTS_CMDID,
++ WMI_CLR_RSSI_SNR_CMDID,
++ WMI_SET_FIXRATES_CMDID,
++ WMI_GET_FIXRATES_CMDID,
++ WMI_SET_AUTH_MODE_CMDID,
++ WMI_SET_REASSOC_MODE_CMDID,
++ WMI_SET_WMM_CMDID,
++ WMI_SET_WMM_TXOP_CMDID,
++ WMI_TEST_CMDID,
++ WMI_SET_BT_STATUS_CMDID,
++ WMI_SET_BT_PARAMS_CMDID,
++
++ WMI_SET_KEEPALIVE_CMDID,
++ WMI_GET_KEEPALIVE_CMDID,
++ WMI_SET_APPIE_CMDID,
++ WMI_GET_APPIE_CMDID,
++ WMI_SET_WSC_STATUS_CMDID,
++
++ /* Wake on Wireless */
++ WMI_SET_HOST_SLEEP_MODE_CMDID,
++ WMI_SET_WOW_MODE_CMDID,
++ WMI_GET_WOW_LIST_CMDID,
++ WMI_ADD_WOW_PATTERN_CMDID,
++ WMI_DEL_WOW_PATTERN_CMDID,
++ WMI_SET_MAC_ADDRESS_CMDID,
++ WMI_SET_AKMP_PARAMS_CMDID,
++ WMI_SET_PMKID_LIST_CMDID,
++ WMI_GET_PMKID_LIST_CMDID,
++
++ /*
++ * Developer commands starts at 0xF000
++ */
++ WMI_SET_BITRATE_CMDID = 0xF000,
++ WMI_GET_BITRATE_CMDID,
++ WMI_SET_WHALPARAM_CMDID,
++
++} WMI_COMMAND_ID;
++
++/*
++ * Frame Types
++ */
++typedef enum {
++ WMI_FRAME_BEACON = 0,
++ WMI_FRAME_PROBE_REQ,
++ WMI_FRAME_PROBE_RESP,
++ WMI_FRAME_ASSOC_REQ,
++ WMI_FRAME_ASSOC_RESP,
++ WMI_NUM_MGMT_FRAME
++} WMI_MGMT_FRAME_TYPE;
++
++/*
++ * Connect Command
++ */
++typedef enum {
++ INFRA_NETWORK = 0x01,
++ ADHOC_NETWORK = 0x02,
++ ADHOC_CREATOR = 0x04,
++} NETWORK_TYPE;
++
++typedef enum {
++ OPEN_AUTH = 0x01,
++ SHARED_AUTH = 0x02,
++ LEAP_AUTH = 0x04, /* different from IEEE_AUTH_MODE definitions */
++} DOT11_AUTH_MODE;
++
++typedef enum {
++ NONE_AUTH = 0x01,
++ WPA_AUTH = 0x02,
++ WPA_PSK_AUTH = 0x03,
++ WPA2_AUTH = 0x04,
++ WPA2_PSK_AUTH = 0x05,
++ WPA_AUTH_CCKM = 0x06,
++ WPA2_AUTH_CCKM = 0x07,
++} AUTH_MODE;
++
++typedef enum {
++ NONE_CRYPT = 0x01,
++ WEP_CRYPT = 0x02,
++ TKIP_CRYPT = 0x03,
++ AES_CRYPT = 0x04,
++} CRYPTO_TYPE;
++
++#define WMI_MIN_CRYPTO_TYPE NONE_CRYPT
++#define WMI_MAX_CRYPTO_TYPE (AES_CRYPT + 1)
++
++#define WMI_MIN_KEY_INDEX 0
++#define WMI_MAX_KEY_INDEX 3
++
++#define WMI_MAX_KEY_LEN 32
++
++#define WMI_MAX_SSID_LEN 32
++
++typedef enum {
++ CONNECT_ASSOC_POLICY_USER = 0x0001,
++ CONNECT_SEND_REASSOC = 0x0002,
++ CONNECT_IGNORE_WPAx_GROUP_CIPHER = 0x0004,
++ CONNECT_PROFILE_MATCH_DONE = 0x0008,
++ CONNECT_IGNORE_AAC_BEACON = 0x0010,
++ CONNECT_CSA_FOLLOW_BSS = 0x0020,
++} WMI_CONNECT_CTRL_FLAGS_BITS;
++
++#define DEFAULT_CONNECT_CTRL_FLAGS (CONNECT_CSA_FOLLOW_BSS)
++
++typedef PREPACK struct {
++ A_UINT8 networkType;
++ A_UINT8 dot11AuthMode;
++ A_UINT8 authMode;
++ A_UINT8 pairwiseCryptoType;
++ A_UINT8 pairwiseCryptoLen;
++ A_UINT8 groupCryptoType;
++ A_UINT8 groupCryptoLen;
++ A_UINT8 ssidLength;
++ A_UCHAR ssid[WMI_MAX_SSID_LEN];
++ A_UINT16 channel;
++ A_UINT8 bssid[ATH_MAC_LEN];
++ A_UINT32 ctrl_flags;
++} POSTPACK WMI_CONNECT_CMD;
++
++/*
++ * WMI_RECONNECT_CMDID
++ */
++typedef PREPACK struct {
++ A_UINT16 channel; /* hint */
++ A_UINT8 bssid[ATH_MAC_LEN]; /* mandatory if set */
++} POSTPACK WMI_RECONNECT_CMD;
++
++/*
++ * WMI_ADD_CIPHER_KEY_CMDID
++ */
++typedef enum {
++ PAIRWISE_USAGE = 0x00,
++ GROUP_USAGE = 0x01,
++ TX_USAGE = 0x02, /* default Tx Key - Static WEP only */
++} KEY_USAGE;
++
++/*
++ * Bit Flag
++ * Bit 0 - Initialise TSC - default is Initialize
++ */
++#define KEY_OP_INIT_TSC 0x01
++#define KEY_OP_INIT_RSC 0x02
++
++#define KEY_OP_INIT_VAL 0x03 /* Default Initialise the TSC & RSC */
++#define KEY_OP_VALID_MASK 0x03
++
++typedef PREPACK struct {
++ A_UINT8 keyIndex;
++ A_UINT8 keyType;
++ A_UINT8 keyUsage; /* KEY_USAGE */
++ A_UINT8 keyLength;
++ A_UINT8 keyRSC[8]; /* key replay sequence counter */
++ A_UINT8 key[WMI_MAX_KEY_LEN];
++ A_UINT8 key_op_ctrl; /* Additional Key Control information */
++} POSTPACK WMI_ADD_CIPHER_KEY_CMD;
++
++/*
++ * WMI_DELETE_CIPHER_KEY_CMDID
++ */
++typedef PREPACK struct {
++ A_UINT8 keyIndex;
++} POSTPACK WMI_DELETE_CIPHER_KEY_CMD;
++
++#define WMI_KRK_LEN 16
++/*
++ * WMI_ADD_KRK_CMDID
++ */
++typedef PREPACK struct {
++ A_UINT8 krk[WMI_KRK_LEN];
++} POSTPACK WMI_ADD_KRK_CMD;
++
++/*
++ * WMI_SET_TKIP_COUNTERMEASURES_CMDID
++ */
++typedef enum {
++ WMI_TKIP_CM_DISABLE = 0x0,
++ WMI_TKIP_CM_ENABLE = 0x1,
++} WMI_TKIP_CM_CONTROL;
++
++typedef PREPACK struct {
++ A_UINT8 cm_en; /* WMI_TKIP_CM_CONTROL */
++} POSTPACK WMI_SET_TKIP_COUNTERMEASURES_CMD;
++
++/*
++ * WMI_SET_PMKID_CMDID
++ */
++
++#define WMI_PMKID_LEN 16
++
++typedef enum {
++ PMKID_DISABLE = 0,
++ PMKID_ENABLE = 1,
++} PMKID_ENABLE_FLG;
++
++typedef PREPACK struct {
++ A_UINT8 bssid[ATH_MAC_LEN];
++ A_UINT8 enable; /* PMKID_ENABLE_FLG */
++ A_UINT8 pmkid[WMI_PMKID_LEN];
++} POSTPACK WMI_SET_PMKID_CMD;
++
++/*
++ * WMI_START_SCAN_CMD
++ */
++typedef enum {
++ WMI_LONG_SCAN = 0,
++ WMI_SHORT_SCAN = 1,
++} WMI_SCAN_TYPE;
++
++typedef PREPACK struct {
++ A_BOOL forceFgScan;
++ A_BOOL isLegacy; /* For Legacy Cisco AP compatibility */
++ A_UINT32 homeDwellTime; /* Maximum duration in the home channel(milliseconds) */
++ A_UINT32 forceScanInterval; /* Time interval between scans (milliseconds)*/
++ A_UINT8 scanType; /* WMI_SCAN_TYPE */
++} POSTPACK WMI_START_SCAN_CMD;
++
++/*
++ * WMI_SET_SCAN_PARAMS_CMDID
++ */
++#define WMI_SHORTSCANRATIO_DEFAULT 3
++typedef enum {
++ CONNECT_SCAN_CTRL_FLAGS = 0x01, /* set if can scan in the Connect cmd */
++ SCAN_CONNECTED_CTRL_FLAGS = 0x02, /* set if scan for the SSID it is */
++ /* already connected to */
++ ACTIVE_SCAN_CTRL_FLAGS = 0x04, /* set if enable active scan */
++ ROAM_SCAN_CTRL_FLAGS = 0x08, /* set if enable roam scan when bmiss and lowrssi */
++ REPORT_BSSINFO_CTRL_FLAGS = 0x10, /* set if follows customer BSSINFO reporting rule */
++ ENABLE_AUTO_CTRL_FLAGS = 0x20, /* if disabled, target doesn't
++ scan after a disconnect event */
++ ENABLE_SCAN_ABORT_EVENT = 0x40 /* Scan complete event with canceled status will be generated when a scan is prempted before it gets completed */
++
++} WMI_SCAN_CTRL_FLAGS_BITS;
++
++#define CAN_SCAN_IN_CONNECT(flags) (flags & CONNECT_SCAN_CTRL_FLAGS)
++#define CAN_SCAN_CONNECTED(flags) (flags & SCAN_CONNECTED_CTRL_FLAGS)
++#define ENABLE_ACTIVE_SCAN(flags) (flags & ACTIVE_SCAN_CTRL_FLAGS)
++#define ENABLE_ROAM_SCAN(flags) (flags & ROAM_SCAN_CTRL_FLAGS)
++#define CONFIG_REPORT_BSSINFO(flags) (flags & REPORT_BSSINFO_CTRL_FLAGS)
++#define IS_AUTO_SCAN_ENABLED(flags) (flags & ENABLE_AUTO_CTRL_FLAGS)
++#define SCAN_ABORT_EVENT_ENABLED(flags) (flags & ENABLE_SCAN_ABORT_EVENT)
++
++#define DEFAULT_SCAN_CTRL_FLAGS (CONNECT_SCAN_CTRL_FLAGS| SCAN_CONNECTED_CTRL_FLAGS| ACTIVE_SCAN_CTRL_FLAGS| ROAM_SCAN_CTRL_FLAGS | ENABLE_AUTO_CTRL_FLAGS)
++
++
++typedef PREPACK struct {
++ A_UINT16 fg_start_period; /* seconds */
++ A_UINT16 fg_end_period; /* seconds */
++ A_UINT16 bg_period; /* seconds */
++ A_UINT16 maxact_chdwell_time; /* msec */
++ A_UINT16 pas_chdwell_time; /* msec */
++ A_UINT8 shortScanRatio; /* how many shorts scan for one long */
++ A_UINT8 scanCtrlFlags;
++ A_UINT16 minact_chdwell_time; /* msec */
++ A_UINT32 max_dfsch_act_time; /* msecs */
++} POSTPACK WMI_SCAN_PARAMS_CMD;
++
++/*
++ * WMI_SET_BSS_FILTER_CMDID
++ */
++typedef enum {
++ NONE_BSS_FILTER = 0x0, /* no beacons forwarded */
++ ALL_BSS_FILTER, /* all beacons forwarded */
++ PROFILE_FILTER, /* only beacons matching profile */
++ ALL_BUT_PROFILE_FILTER, /* all but beacons matching profile */
++ CURRENT_BSS_FILTER, /* only beacons matching current BSS */
++ ALL_BUT_BSS_FILTER, /* all but beacons matching BSS */
++ PROBED_SSID_FILTER, /* beacons matching probed ssid */
++ LAST_BSS_FILTER, /* marker only */
++} WMI_BSS_FILTER;
++
++typedef PREPACK struct {
++ A_UINT8 bssFilter; /* see WMI_BSS_FILTER */
++ A_UINT32 ieMask;
++} POSTPACK WMI_BSS_FILTER_CMD;
++
++/*
++ * WMI_SET_PROBED_SSID_CMDID
++ */
++#define MAX_PROBED_SSID_INDEX 5
++
++typedef enum {
++ DISABLE_SSID_FLAG = 0, /* disables entry */
++ SPECIFIC_SSID_FLAG = 0x01, /* probes specified ssid */
++ ANY_SSID_FLAG = 0x02, /* probes for any ssid */
++} WMI_SSID_FLAG;
++
++typedef PREPACK struct {
++ A_UINT8 entryIndex; /* 0 to MAX_PROBED_SSID_INDEX */
++ A_UINT8 flag; /* WMI_SSID_FLG */
++ A_UINT8 ssidLength;
++ A_UINT8 ssid[32];
++} POSTPACK WMI_PROBED_SSID_CMD;
++
++/*
++ * WMI_SET_LISTEN_INT_CMDID
++ * The Listen interval is between 15 and 3000 TUs
++ */
++#define MIN_LISTEN_INTERVAL 15
++#define MAX_LISTEN_INTERVAL 5000
++#define MIN_LISTEN_BEACONS 1
++#define MAX_LISTEN_BEACONS 50
++
++typedef PREPACK struct {
++ A_UINT16 listenInterval;
++ A_UINT16 numBeacons;
++} POSTPACK WMI_LISTEN_INT_CMD;
++
++/*
++ * WMI_SET_BEACON_INT_CMDID
++ */
++typedef PREPACK struct {
++ A_UINT16 beaconInterval;
++} POSTPACK WMI_BEACON_INT_CMD;
++
++/*
++ * WMI_SET_BMISS_TIME_CMDID
++ * valid values are between 1000 and 5000 TUs
++ */
++
++#define MIN_BMISS_TIME 1000
++#define MAX_BMISS_TIME 5000
++#define MIN_BMISS_BEACONS 1
++#define MAX_BMISS_BEACONS 50
++
++typedef PREPACK struct {
++ A_UINT16 bmissTime;
++ A_UINT16 numBeacons;
++} POSTPACK WMI_BMISS_TIME_CMD;
++
++/*
++ * WMI_SET_POWER_MODE_CMDID
++ */
++typedef enum {
++ REC_POWER = 0x01,
++ MAX_PERF_POWER,
++} WMI_POWER_MODE;
++
++typedef PREPACK struct {
++ A_UINT8 powerMode; /* WMI_POWER_MODE */
++} POSTPACK WMI_POWER_MODE_CMD;
++
++/*
++ * WMI_SET_POWER_PARAMS_CMDID
++ */
++typedef enum {
++ IGNORE_DTIM = 0x01,
++ NORMAL_DTIM = 0x02,
++ STICK_DTIM = 0x03,
++} WMI_DTIM_POLICY;
++
++typedef PREPACK struct {
++ A_UINT16 idle_period; /* msec */
++ A_UINT16 pspoll_number;
++ A_UINT16 dtim_policy;
++} POSTPACK WMI_POWER_PARAMS_CMD;
++
++typedef PREPACK struct {
++ A_UINT8 power_saving;
++ A_UINT8 ttl; /* number of beacon periods */
++ A_UINT16 atim_windows; /* msec */
++ A_UINT16 timeout_value; /* msec */
++} POSTPACK WMI_IBSS_PM_CAPS_CMD;
++
++/*
++ * WMI_SET_POWERSAVE_TIMERS_POLICY_CMDID
++ */
++typedef enum {
++ IGNORE_TIM_ALL_QUEUES_APSD = 0,
++ PROCESS_TIM_ALL_QUEUES_APSD = 1,
++ IGNORE_TIM_SIMULATED_APSD = 2,
++ PROCESS_TIM_SIMULATED_APSD = 3,
++} APSD_TIM_POLICY;
++
++typedef PREPACK struct {
++ A_UINT16 psPollTimeout; /* msec */
++ A_UINT16 triggerTimeout; /* msec */
++ A_UINT32 apsdTimPolicy; /* TIM behavior with ques APSD enabled. Default is IGNORE_TIM_ALL_QUEUES_APSD */
++ A_UINT32 simulatedAPSDTimPolicy; /* TIM behavior with simulated APSD enabled. Default is PROCESS_TIM_SIMULATED_APSD */
++} POSTPACK WMI_POWERSAVE_TIMERS_POLICY_CMD;
++
++/*
++ * WMI_SET_VOICE_PKT_SIZE_CMDID
++ */
++typedef PREPACK struct {
++ A_UINT16 voicePktSize;
++} POSTPACK WMI_SET_VOICE_PKT_SIZE_CMD;
++
++/*
++ * WMI_SET_MAX_SP_LEN_CMDID
++ */
++typedef enum {
++ DELIVER_ALL_PKT = 0x0,
++ DELIVER_2_PKT = 0x1,
++ DELIVER_4_PKT = 0x2,
++ DELIVER_6_PKT = 0x3,
++} APSD_SP_LEN_TYPE;
++
++typedef PREPACK struct {
++ A_UINT8 maxSPLen;
++} POSTPACK WMI_SET_MAX_SP_LEN_CMD;
++
++/*
++ * WMI_SET_DISC_TIMEOUT_CMDID
++ */
++typedef PREPACK struct {
++ A_UINT8 disconnectTimeout; /* seconds */
++} POSTPACK WMI_DISC_TIMEOUT_CMD;
++
++typedef enum {
++ UPLINK_TRAFFIC = 0,
++ DNLINK_TRAFFIC = 1,
++ BIDIR_TRAFFIC = 2,
++} DIR_TYPE;
++
++typedef enum {
++ DISABLE_FOR_THIS_AC = 0,
++ ENABLE_FOR_THIS_AC = 1,
++ ENABLE_FOR_ALL_AC = 2,
++} VOICEPS_CAP_TYPE;
++
++typedef enum {
++ TRAFFIC_TYPE_APERIODIC = 0,
++ TRAFFIC_TYPE_PERIODIC = 1,
++}TRAFFIC_TYPE;
++
++/*
++ * WMI_CREATE_PSTREAM_CMDID
++ */
++typedef PREPACK struct {
++ A_UINT32 minServiceInt; /* in milli-sec */
++ A_UINT32 maxServiceInt; /* in milli-sec */
++ A_UINT32 inactivityInt; /* in milli-sec */
++ A_UINT32 suspensionInt; /* in milli-sec */
++ A_UINT32 serviceStartTime;
++ A_UINT32 minDataRate; /* in bps */
++ A_UINT32 meanDataRate; /* in bps */
++ A_UINT32 peakDataRate; /* in bps */
++ A_UINT32 maxBurstSize;
++ A_UINT32 delayBound;
++ A_UINT32 minPhyRate; /* in bps */
++ A_UINT32 sba;
++ A_UINT32 mediumTime;
++ A_UINT16 nominalMSDU; /* in octects */
++ A_UINT16 maxMSDU; /* in octects */
++ A_UINT8 trafficClass;
++ A_UINT8 trafficType; /* TRAFFIC_TYPE */
++ A_UINT8 trafficDirection; /* TRAFFIC_DIR */
++ A_UINT8 voicePSCapability; /* VOICEPS_CAP_TYPE */
++ A_UINT8 tsid;
++ A_UINT8 userPriority; /* 802.1D user priority */
++} POSTPACK WMI_CREATE_PSTREAM_CMD;
++
++/*
++ * WMI_DELETE_PSTREAM_CMDID
++ */
++typedef PREPACK struct {
++ A_UINT8 trafficClass;
++ A_UINT8 tsid;
++} POSTPACK WMI_DELETE_PSTREAM_CMD;
++
++/*
++ * WMI_SET_CHANNEL_PARAMS_CMDID
++ */
++typedef enum {
++ WMI_11A_MODE = 0x1,
++ WMI_11G_MODE = 0x2,
++ WMI_11AG_MODE = 0x3,
++ WMI_11B_MODE = 0x4,
++ WMI_11GONLY_MODE = 0x5,
++} WMI_PHY_MODE;
++
++#define WMI_MAX_CHANNELS 32
++
++typedef PREPACK struct {
++ A_UINT8 reserved1;
++ A_UINT8 scanParam; /* set if enable scan */
++ A_UINT8 phyMode; /* see WMI_PHY_MODE */
++ A_UINT8 numChannels; /* how many channels follow */
++ A_UINT16 channelList[1]; /* channels in Mhz */
++} POSTPACK WMI_CHANNEL_PARAMS_CMD;
++
++
++/*
++ * WMI_RSSI_THRESHOLD_PARAMS_CMDID
++ * Setting the polltime to 0 would disable polling.
++ * Threshold values are in the ascending order, and should agree to:
++ * (lowThreshold_lowerVal < lowThreshold_upperVal < highThreshold_lowerVal
++ * < highThreshold_upperVal)
++ */
++
++typedef PREPACK struct WMI_RSSI_THRESHOLD_PARAMS{
++ A_UINT32 pollTime; /* Polling time as a factor of LI */
++ A_INT16 thresholdAbove1_Val; /* lowest of upper */
++ A_INT16 thresholdAbove2_Val;
++ A_INT16 thresholdAbove3_Val;
++ A_INT16 thresholdAbove4_Val;
++ A_INT16 thresholdAbove5_Val;
++ A_INT16 thresholdAbove6_Val; /* highest of upper */
++ A_INT16 thresholdBelow1_Val; /* lowest of bellow */
++ A_INT16 thresholdBelow2_Val;
++ A_INT16 thresholdBelow3_Val;
++ A_INT16 thresholdBelow4_Val;
++ A_INT16 thresholdBelow5_Val;
++ A_INT16 thresholdBelow6_Val; /* highest of bellow */
++ A_UINT8 weight; /* "alpha" */
++ A_UINT8 reserved[3];
++} POSTPACK WMI_RSSI_THRESHOLD_PARAMS_CMD;
++
++/*
++ * WMI_SNR_THRESHOLD_PARAMS_CMDID
++ * Setting the polltime to 0 would disable polling.
++ */
++
++typedef PREPACK struct WMI_SNR_THRESHOLD_PARAMS{
++ A_UINT32 pollTime; /* Polling time as a factor of LI */
++ A_UINT8 weight; /* "alpha" */
++ A_UINT8 thresholdAbove1_Val; /* lowest of uppper*/
++ A_UINT8 thresholdAbove2_Val;
++ A_UINT8 thresholdAbove3_Val;
++ A_UINT8 thresholdAbove4_Val; /* highest of upper */
++ A_UINT8 thresholdBelow1_Val; /* lowest of bellow */
++ A_UINT8 thresholdBelow2_Val;
++ A_UINT8 thresholdBelow3_Val;
++ A_UINT8 thresholdBelow4_Val; /* highest of bellow */
++ A_UINT8 reserved[3];
++} POSTPACK WMI_SNR_THRESHOLD_PARAMS_CMD;
++
++/*
++ * WMI_LQ_THRESHOLD_PARAMS_CMDID
++ */
++typedef PREPACK struct WMI_LQ_THRESHOLD_PARAMS {
++ A_UINT8 enable;
++ A_UINT8 thresholdAbove1_Val;
++ A_UINT8 thresholdAbove2_Val;
++ A_UINT8 thresholdAbove3_Val;
++ A_UINT8 thresholdAbove4_Val;
++ A_UINT8 thresholdBelow1_Val;
++ A_UINT8 thresholdBelow2_Val;
++ A_UINT8 thresholdBelow3_Val;
++ A_UINT8 thresholdBelow4_Val;
++ A_UINT8 reserved[3];
++} POSTPACK WMI_LQ_THRESHOLD_PARAMS_CMD;
++
++typedef enum {
++ WMI_LPREAMBLE_DISABLED = 0,
++ WMI_LPREAMBLE_ENABLED
++} WMI_LPREAMBLE_STATUS;
++
++typedef PREPACK struct {
++ A_UINT8 status;
++}POSTPACK WMI_SET_LPREAMBLE_CMD;
++
++typedef PREPACK struct {
++ A_UINT16 threshold;
++}POSTPACK WMI_SET_RTS_CMD;
++
++/*
++ * WMI_TARGET_ERROR_REPORT_BITMASK_CMDID
++ * Sets the error reporting event bitmask in target. Target clears it
++ * upon an error. Subsequent errors are counted, but not reported
++ * via event, unless the bitmask is set again.
++ */
++typedef PREPACK struct {
++ A_UINT32 bitmask;
++} POSTPACK WMI_TARGET_ERROR_REPORT_BITMASK;
++
++/*
++ * WMI_SET_TX_PWR_CMDID
++ */
++typedef PREPACK struct {
++ A_UINT8 dbM; /* in dbM units */
++} POSTPACK WMI_SET_TX_PWR_CMD, WMI_TX_PWR_REPLY;
++
++/*
++ * WMI_SET_ASSOC_INFO_CMDID
++ *
++ * A maximum of 2 private IEs can be sent in the [Re]Assoc request.
++ * A 3rd one, the CCX version IE can also be set from the host.
++ */
++#define WMI_MAX_ASSOC_INFO_TYPE 2
++#define WMI_CCX_VER_IE 2 /* ieType to set CCX Version IE */
++
++#define WMI_MAX_ASSOC_INFO_LEN 240
++
++typedef PREPACK struct {
++ A_UINT8 ieType;
++ A_UINT8 bufferSize;
++ A_UINT8 assocInfo[1]; /* up to WMI_MAX_ASSOC_INFO_LEN */
++} POSTPACK WMI_SET_ASSOC_INFO_CMD;
++
++
++/*
++ * WMI_GET_TX_PWR_CMDID does not take any parameters
++ */
++
++/*
++ * WMI_ADD_BAD_AP_CMDID
++ */
++#define WMI_MAX_BAD_AP_INDEX 1
++
++typedef PREPACK struct {
++ A_UINT8 badApIndex; /* 0 to WMI_MAX_BAD_AP_INDEX */
++ A_UINT8 bssid[ATH_MAC_LEN];
++} POSTPACK WMI_ADD_BAD_AP_CMD;
++
++/*
++ * WMI_DELETE_BAD_AP_CMDID
++ */
++typedef PREPACK struct {
++ A_UINT8 badApIndex; /* 0 to WMI_MAX_BAD_AP_INDEX */
++} POSTPACK WMI_DELETE_BAD_AP_CMD;
++
++/*
++ * WMI_SET_ACCESS_PARAMS_CMDID
++ */
++#define WMI_DEFAULT_TXOP_ACPARAM 0 /* implies one MSDU */
++#define WMI_DEFAULT_ECWMIN_ACPARAM 4 /* corresponds to CWmin of 15 */
++#define WMI_DEFAULT_ECWMAX_ACPARAM 10 /* corresponds to CWmax of 1023 */
++#define WMI_MAX_CW_ACPARAM 15 /* maximum eCWmin or eCWmax */
++#define WMI_DEFAULT_AIFSN_ACPARAM 2
++#define WMI_MAX_AIFSN_ACPARAM 15
++typedef PREPACK struct {
++ A_UINT16 txop; /* in units of 32 usec */
++ A_UINT8 eCWmin;
++ A_UINT8 eCWmax;
++ A_UINT8 aifsn;
++} POSTPACK WMI_SET_ACCESS_PARAMS_CMD;
++
++
++/*
++ * WMI_SET_RETRY_LIMITS_CMDID
++ *
++ * This command is used to customize the number of retries the
++ * wlan device will perform on a given frame.
++ */
++#define WMI_MIN_RETRIES 2
++#define WMI_MAX_RETRIES 13
++typedef enum {
++ MGMT_FRAMETYPE = 0,
++ CONTROL_FRAMETYPE = 1,
++ DATA_FRAMETYPE = 2
++} WMI_FRAMETYPE;
++
++typedef PREPACK struct {
++ A_UINT8 frameType; /* WMI_FRAMETYPE */
++ A_UINT8 trafficClass; /* applies only to DATA_FRAMETYPE */
++ A_UINT8 maxRetries;
++ A_UINT8 enableNotify;
++} POSTPACK WMI_SET_RETRY_LIMITS_CMD;
++
++/*
++ * WMI_SET_ROAM_CTRL_CMDID
++ *
++ * This command is used to influence the Roaming behaviour
++ * Set the host biases of the BSSs before setting the roam mode as bias
++ * based.
++ */
++
++/*
++ * Different types of Roam Control
++ */
++
++typedef enum {
++ WMI_FORCE_ROAM = 1, /* Roam to the specified BSSID */
++ WMI_SET_ROAM_MODE = 2, /* default ,progd bias, no roam */
++ WMI_SET_HOST_BIAS = 3, /* Set the Host Bias */
++ WMI_SET_LOWRSSI_SCAN_PARAMS = 4, /* Set lowrssi Scan parameters */
++} WMI_ROAM_CTRL_TYPE;
++
++#define WMI_MIN_ROAM_CTRL_TYPE WMI_FORCE_ROAM
++#define WMI_MAX_ROAM_CTRL_TYPE WMI_SET_LOWRSSI_SCAN_PARAMS
++
++/*
++ * ROAM MODES
++ */
++
++typedef enum {
++ WMI_DEFAULT_ROAM_MODE = 1, /* RSSI based ROAM */
++ WMI_HOST_BIAS_ROAM_MODE = 2, /* HOST BIAS based ROAM */
++ WMI_LOCK_BSS_MODE = 3 /* Lock to the Current BSS - no Roam */
++} WMI_ROAM_MODE;
++
++/*
++ * BSS HOST BIAS INFO
++ */
++
++typedef PREPACK struct {
++ A_UINT8 bssid[ATH_MAC_LEN];
++ A_INT8 bias;
++} POSTPACK WMI_BSS_BIAS;
++
++typedef PREPACK struct {
++ A_UINT8 numBss;
++ WMI_BSS_BIAS bssBias[1];
++} POSTPACK WMI_BSS_BIAS_INFO;
++
++typedef PREPACK struct WMI_LOWRSSI_SCAN_PARAMS {
++ A_UINT16 lowrssi_scan_period;
++ A_INT16 lowrssi_scan_threshold;
++ A_INT16 lowrssi_roam_threshold;
++ A_UINT8 roam_rssi_floor;
++ A_UINT8 reserved[1]; /* For alignment */
++} POSTPACK WMI_LOWRSSI_SCAN_PARAMS;
++
++typedef PREPACK struct {
++ PREPACK union {
++ A_UINT8 bssid[ATH_MAC_LEN]; /* WMI_FORCE_ROAM */
++ A_UINT8 roamMode; /* WMI_SET_ROAM_MODE */
++ WMI_BSS_BIAS_INFO bssBiasInfo; /* WMI_SET_HOST_BIAS */
++ WMI_LOWRSSI_SCAN_PARAMS lrScanParams;
++ } POSTPACK info;
++ A_UINT8 roamCtrlType ;
++} POSTPACK WMI_SET_ROAM_CTRL_CMD;
++
++/*
++ * WMI_ENABLE_RM_CMDID
++ */
++typedef PREPACK struct {
++ A_BOOL enable_radio_measurements;
++} POSTPACK WMI_ENABLE_RM_CMD;
++
++/*
++ * WMI_SET_MAX_OFFHOME_DURATION_CMDID
++ */
++typedef PREPACK struct {
++ A_UINT8 max_offhome_duration;
++} POSTPACK WMI_SET_MAX_OFFHOME_DURATION_CMD;
++
++typedef PREPACK struct {
++ A_UINT32 frequency;
++ A_UINT8 threshold;
++} POSTPACK WMI_SET_HB_CHALLENGE_RESP_PARAMS_CMD;
++
++typedef enum {
++ BT_STREAM_UNDEF = 0,
++ BT_STREAM_SCO, /* SCO stream */
++ BT_STREAM_A2DP, /* A2DP stream */
++ BT_STREAM_MAX
++} BT_STREAM_TYPE;
++
++typedef enum {
++ BT_PARAM_SCO = 1, /* SCO stream parameters */
++ BT_PARAM_A2DP, /* A2DP stream parameters */
++ BT_PARAM_MISC, /* miscellaneous parameters */
++ BT_PARAM_REGS, /* co-existence register parameters */
++ BT_PARAM_MAX
++} BT_PARAM_TYPE;
++
++typedef enum {
++ BT_STATUS_UNDEF = 0,
++ BT_STATUS_START,
++ BT_STATUS_STOP,
++ BT_STATUS_RESUME,
++ BT_STATUS_SUSPEND,
++ BT_STATUS_MAX
++} BT_STREAM_STATUS;
++
++typedef PREPACK struct {
++ A_UINT8 streamType;
++ A_UINT8 status;
++} POSTPACK WMI_SET_BT_STATUS_CMD;
++
++typedef PREPACK struct {
++ A_UINT8 noSCOPkts;
++ A_UINT8 pspollTimeout;
++ A_UINT8 stompbt;
++} POSTPACK BT_PARAMS_SCO;
++
++typedef PREPACK struct {
++ A_UINT32 period;
++ A_UINT32 dutycycle;
++ A_UINT8 stompbt;
++} POSTPACK BT_PARAMS_A2DP;
++
++typedef PREPACK struct {
++ A_UINT32 mode;
++ A_UINT32 scoWghts;
++ A_UINT32 a2dpWghts;
++ A_UINT32 genWghts;
++ A_UINT32 mode2;
++ A_UINT8 setVal;
++} POSTPACK BT_COEX_REGS;
++
++typedef enum {
++ WLAN_PROTECT_POLICY = 1,
++ WLAN_COEX_CTRL_FLAGS
++} BT_PARAMS_MISC_TYPE;
++
++typedef enum {
++ WLAN_PROTECT_PER_STREAM = 0x01, /* default */
++ WLAN_PROTECT_ANY_TX = 0x02
++} WLAN_PROTECT_FLAGS;
++
++
++#define WLAN_DISABLE_COEX_IN_DISCONNECT 0x01 /* default */
++#define WLAN_KEEP_COEX_IN_DISCONNECT 0x02
++#define WLAN_STOMPBT_IN_DISCONNECT 0x04
++
++#define WLAN_DISABLE_COEX_IN_ROAM 0x10 /* default */
++#define WLAN_KEEP_COEX_IN_ROAM 0x20
++#define WLAN_STOMPBT_IN_ROAM 0x40
++
++#define WLAN_DISABLE_COEX_IN_SCAN 0x100 /* default */
++#define WLAN_KEEP_COEX_IN_SCAN 0x200
++#define WLAN_STOMPBT_IN_SCAN 0x400
++
++#define WLAN_DISABLE_COEX_BT_OFF 0x1000 /* default */
++#define WLAN_KEEP_COEX_BT_OFF 0x2000
++#define WLAN_STOMPBT_BT_OFF 0x4000
++
++typedef PREPACK struct {
++ A_UINT32 period;
++ A_UINT32 dutycycle;
++ A_UINT8 stompbt;
++ A_UINT8 policy;
++} POSTPACK WLAN_PROTECT_POLICY_TYPE;
++
++typedef PREPACK struct {
++ PREPACK union {
++ WLAN_PROTECT_POLICY_TYPE protectParams;
++ A_UINT16 wlanCtrlFlags;
++ } POSTPACK info;
++ A_UINT8 paramType;
++} POSTPACK BT_PARAMS_MISC;
++
++typedef PREPACK struct {
++ PREPACK union {
++ BT_PARAMS_SCO scoParams;
++ BT_PARAMS_A2DP a2dpParams;
++ BT_PARAMS_MISC miscParams;
++ BT_COEX_REGS regs;
++ } POSTPACK info;
++ A_UINT8 paramType;
++} POSTPACK WMI_SET_BT_PARAMS_CMD;
++
++/*
++ * Command Replies
++ */
++
++/*
++ * WMI_GET_CHANNEL_LIST_CMDID reply
++ */
++typedef PREPACK struct {
++ A_UINT8 reserved1;
++ A_UINT8 numChannels; /* number of channels in reply */
++ A_UINT16 channelList[1]; /* channel in Mhz */
++} POSTPACK WMI_CHANNEL_LIST_REPLY;
++
++typedef enum {
++ A_SUCCEEDED = A_OK,
++ A_FAILED_DELETE_STREAM_DOESNOT_EXIST=250,
++ A_SUCCEEDED_MODIFY_STREAM=251,
++ A_FAILED_INVALID_STREAM = 252,
++ A_FAILED_MAX_THINSTREAMS = 253,
++ A_FAILED_CREATE_REMOVE_PSTREAM_FIRST = 254,
++} PSTREAM_REPLY_STATUS;
++
++/*
++ * List of Events (target to host)
++ */
++typedef enum {
++ WMI_READY_EVENTID = 0x1001,
++ WMI_CONNECT_EVENTID,
++ WMI_DISCONNECT_EVENTID,
++ WMI_BSSINFO_EVENTID,
++ WMI_CMDERROR_EVENTID,
++ WMI_REGDOMAIN_EVENTID,
++ WMI_PSTREAM_TIMEOUT_EVENTID,
++ WMI_NEIGHBOR_REPORT_EVENTID,
++ WMI_TKIP_MICERR_EVENTID,
++ WMI_SCAN_COMPLETE_EVENTID,
++ WMI_REPORT_STATISTICS_EVENTID,
++ WMI_RSSI_THRESHOLD_EVENTID,
++ WMI_ERROR_REPORT_EVENTID,
++ WMI_OPT_RX_FRAME_EVENTID,
++ WMI_REPORT_ROAM_TBL_EVENTID,
++ WMI_EXTENSION_EVENTID,
++ WMI_CAC_EVENTID,
++ WMI_SNR_THRESHOLD_EVENTID,
++ WMI_LQ_THRESHOLD_EVENTID,
++ WMI_TX_RETRY_ERR_EVENTID,
++ WMI_REPORT_ROAM_DATA_EVENTID,
++ WMI_TEST_EVENTID,
++ WMI_APLIST_EVENTID,
++ WMI_GET_WOW_LIST_EVENTID,
++ WMI_GET_PMKID_LIST_EVENTID
++} WMI_EVENT_ID;
++
++typedef enum {
++ WMI_11A_CAPABILITY = 1,
++ WMI_11G_CAPABILITY = 2,
++ WMI_11AG_CAPABILITY = 3,
++} WMI_PHY_CAPABILITY;
++
++typedef PREPACK struct {
++ A_UINT8 macaddr[ATH_MAC_LEN];
++ A_UINT8 phyCapability; /* WMI_PHY_CAPABILITY */
++} POSTPACK WMI_READY_EVENT;
++
++/*
++ * Connect Event
++ */
++typedef PREPACK struct {
++ A_UINT16 channel;
++ A_UINT8 bssid[ATH_MAC_LEN];
++ A_UINT16 listenInterval;
++ A_UINT16 beaconInterval;
++ A_UINT32 networkType;
++ A_UINT8 beaconIeLen;
++ A_UINT8 assocReqLen;
++ A_UINT8 assocRespLen;
++ A_UINT8 assocInfo[1];
++} POSTPACK WMI_CONNECT_EVENT;
++
++/*
++ * Disconnect Event
++ */
++typedef enum {
++ NO_NETWORK_AVAIL = 0x01,
++ LOST_LINK = 0x02, /* bmiss */
++ DISCONNECT_CMD = 0x03,
++ BSS_DISCONNECTED = 0x04,
++ AUTH_FAILED = 0x05,
++ ASSOC_FAILED = 0x06,
++ NO_RESOURCES_AVAIL = 0x07,
++ CSERV_DISCONNECT = 0x08,
++ INVALID_PROFILE = 0x0a,
++ DOT11H_CHANNEL_SWITCH = 0x0b,
++} WMI_DISCONNECT_REASON;
++
++typedef PREPACK struct {
++ A_UINT16 protocolReasonStatus; /* reason code, see 802.11 spec. */
++ A_UINT8 bssid[ATH_MAC_LEN]; /* set if known */
++ A_UINT8 disconnectReason ; /* see WMI_DISCONNECT_REASON */
++ A_UINT8 assocRespLen;
++ A_UINT8 assocInfo[1];
++} POSTPACK WMI_DISCONNECT_EVENT;
++
++/*
++ * BSS Info Event.
++ * Mechanism used to inform host of the presence and characteristic of
++ * wireless networks present. Consists of bss info header followed by
++ * the beacon or probe-response frame body. The 802.11 header is not included.
++ */
++typedef enum {
++ BEACON_FTYPE = 0x1,
++ PROBERESP_FTYPE,
++ ACTION_MGMT_FTYPE,
++} WMI_BI_FTYPE;
++
++enum {
++ BSS_ELEMID_CHANSWITCH = 0x01,
++ BSS_ELEMID_ATHEROS = 0x02,
++};
++
++typedef PREPACK struct {
++ A_UINT16 channel;
++ A_UINT8 frameType; /* see WMI_BI_FTYPE */
++ A_UINT8 snr;
++ A_INT16 rssi;
++ A_UINT8 bssid[ATH_MAC_LEN];
++ A_UINT32 ieMask;
++} POSTPACK WMI_BSS_INFO_HDR;
++
++/*
++ * Command Error Event
++ */
++typedef enum {
++ INVALID_PARAM = 0x01,
++ ILLEGAL_STATE = 0x02,
++ INTERNAL_ERROR = 0x03,
++} WMI_ERROR_CODE;
++
++typedef PREPACK struct {
++ A_UINT16 commandId;
++ A_UINT8 errorCode;
++} POSTPACK WMI_CMD_ERROR_EVENT;
++
++/*
++ * New Regulatory Domain Event
++ */
++typedef PREPACK struct {
++ A_UINT32 regDomain;
++} POSTPACK WMI_REG_DOMAIN_EVENT;
++
++typedef PREPACK struct {
++ A_UINT8 trafficClass;
++} POSTPACK WMI_PSTREAM_TIMEOUT_EVENT;
++
++/*
++ * The WMI_NEIGHBOR_REPORT Event is generated by the target to inform
++ * the host of BSS's it has found that matches the current profile.
++ * It can be used by the host to cache PMKs and/to initiate pre-authentication
++ * if the BSS supports it. The first bssid is always the current associated
++ * BSS.
++ * The bssid and bssFlags information repeats according to the number
++ * or APs reported.
++ */
++typedef enum {
++ WMI_DEFAULT_BSS_FLAGS = 0x00,
++ WMI_PREAUTH_CAPABLE_BSS = 0x01,
++ WMI_PMKID_VALID_BSS = 0x02,
++} WMI_BSS_FLAGS;
++
++typedef PREPACK struct {
++ A_UINT8 bssid[ATH_MAC_LEN];
++ A_UINT8 bssFlags; /* see WMI_BSS_FLAGS */
++} POSTPACK WMI_NEIGHBOR_INFO;
++
++typedef PREPACK struct {
++ A_INT8 numberOfAps;
++ WMI_NEIGHBOR_INFO neighbor[1];
++} POSTPACK WMI_NEIGHBOR_REPORT_EVENT;
++
++/*
++ * TKIP MIC Error Event
++ */
++typedef PREPACK struct {
++ A_UINT8 keyid;
++ A_UINT8 ismcast;
++} POSTPACK WMI_TKIP_MICERR_EVENT;
++
++/*
++ * WMI_SCAN_COMPLETE_EVENTID - no parameters (old), staus parameter (new)
++ */
++typedef PREPACK struct {
++ A_STATUS status;
++} POSTPACK WMI_SCAN_COMPLETE_EVENT;
++
++#define MAX_OPT_DATA_LEN 1400
++
++/*
++ * WMI_SET_ADHOC_BSSID_CMDID
++ */
++typedef PREPACK struct {
++ A_UINT8 bssid[ATH_MAC_LEN];
++} POSTPACK WMI_SET_ADHOC_BSSID_CMD;
++
++/*
++ * WMI_SET_OPT_MODE_CMDID
++ */
++typedef enum {
++ SPECIAL_OFF,
++ SPECIAL_ON,
++} OPT_MODE_TYPE;
++
++typedef PREPACK struct {
++ A_UINT8 optMode;
++} POSTPACK WMI_SET_OPT_MODE_CMD;
++
++/*
++ * WMI_TX_OPT_FRAME_CMDID
++ */
++typedef enum {
++ OPT_PROBE_REQ = 0x01,
++ OPT_PROBE_RESP = 0x02,
++ OPT_CPPP_START = 0x03,
++ OPT_CPPP_STOP = 0x04,
++} WMI_OPT_FTYPE;
++
++typedef PREPACK struct {
++ A_UINT16 optIEDataLen;
++ A_UINT8 frmType;
++ A_UINT8 dstAddr[ATH_MAC_LEN];
++ A_UINT8 bssid[ATH_MAC_LEN];
++ A_UINT8 reserved; /* For alignment */
++ A_UINT8 optIEData[1];
++} POSTPACK WMI_OPT_TX_FRAME_CMD;
++
++/*
++ * Special frame receive Event.
++ * Mechanism used to inform host of the receiption of the special frames.
++ * Consists of special frame info header followed by special frame body.
++ * The 802.11 header is not included.
++ */
++typedef PREPACK struct {
++ A_UINT16 channel;
++ A_UINT8 frameType; /* see WMI_OPT_FTYPE */
++ A_INT8 snr;
++ A_UINT8 srcAddr[ATH_MAC_LEN];
++ A_UINT8 bssid[ATH_MAC_LEN];
++} POSTPACK WMI_OPT_RX_INFO_HDR;
++
++/*
++ * Reporting statistics.
++ */
++typedef PREPACK struct {
++ A_UINT32 tx_packets;
++ A_UINT32 tx_bytes;
++ A_UINT32 tx_unicast_pkts;
++ A_UINT32 tx_unicast_bytes;
++ A_UINT32 tx_multicast_pkts;
++ A_UINT32 tx_multicast_bytes;
++ A_UINT32 tx_broadcast_pkts;
++ A_UINT32 tx_broadcast_bytes;
++ A_UINT32 tx_rts_success_cnt;
++ A_UINT32 tx_packet_per_ac[4];
++ A_UINT32 tx_errors_per_ac[4];
++
++ A_UINT32 tx_errors;
++ A_UINT32 tx_failed_cnt;
++ A_UINT32 tx_retry_cnt;
++ A_UINT32 tx_rts_fail_cnt;
++ A_INT32 tx_unicast_rate;
++}POSTPACK tx_stats_t;
++
++typedef PREPACK struct {
++ A_UINT32 rx_packets;
++ A_UINT32 rx_bytes;
++ A_UINT32 rx_unicast_pkts;
++ A_UINT32 rx_unicast_bytes;
++ A_UINT32 rx_multicast_pkts;
++ A_UINT32 rx_multicast_bytes;
++ A_UINT32 rx_broadcast_pkts;
++ A_UINT32 rx_broadcast_bytes;
++ A_UINT32 rx_fragment_pkt;
++
++ A_UINT32 rx_errors;
++ A_UINT32 rx_crcerr;
++ A_UINT32 rx_key_cache_miss;
++ A_UINT32 rx_decrypt_err;
++ A_UINT32 rx_duplicate_frames;
++ A_INT32 rx_unicast_rate;
++}POSTPACK rx_stats_t;
++
++typedef PREPACK struct {
++ A_UINT32 tkip_local_mic_failure;
++ A_UINT32 tkip_counter_measures_invoked;
++ A_UINT32 tkip_replays;
++ A_UINT32 tkip_format_errors;
++ A_UINT32 ccmp_format_errors;
++ A_UINT32 ccmp_replays;
++}POSTPACK tkip_ccmp_stats_t;
++
++typedef PREPACK struct {
++ A_UINT32 power_save_failure_cnt;
++}POSTPACK pm_stats_t;
++
++typedef PREPACK struct {
++ A_UINT32 cs_bmiss_cnt;
++ A_UINT32 cs_lowRssi_cnt;
++ A_UINT16 cs_connect_cnt;
++ A_UINT16 cs_disconnect_cnt;
++ A_INT16 cs_aveBeacon_rssi;
++ A_UINT16 cs_roam_count;
++ A_UINT16 cs_rssi;
++ A_UINT8 cs_snr;
++ A_UINT8 cs_aveBeacon_snr;
++ A_UINT8 cs_lastRoam_msec;
++} POSTPACK cserv_stats_t;
++
++typedef PREPACK struct {
++ tx_stats_t tx_stats;
++ rx_stats_t rx_stats;
++ tkip_ccmp_stats_t tkipCcmpStats;
++}POSTPACK wlan_net_stats_t;
++
++typedef PREPACK struct {
++ A_UINT32 wow_num_pkts_dropped;
++ A_UINT16 wow_num_events_discarded;
++ A_UINT8 wow_num_host_pkt_wakeups;
++ A_UINT8 wow_num_host_event_wakeups;
++} POSTPACK wlan_wow_stats_t;
++
++typedef PREPACK struct {
++ A_UINT32 lqVal;
++ A_INT32 noise_floor_calibation;
++ pm_stats_t pmStats;
++ wlan_net_stats_t txrxStats;
++ wlan_wow_stats_t wowStats;
++ cserv_stats_t cservStats;
++} POSTPACK WMI_TARGET_STATS;
++
++/*
++ * WMI_RSSI_THRESHOLD_EVENTID.
++ * Indicate the RSSI events to host. Events are indicated when we breach a
++ * thresold value.
++ */
++typedef enum{
++ WMI_RSSI_THRESHOLD1_ABOVE = 0,
++ WMI_RSSI_THRESHOLD2_ABOVE,
++ WMI_RSSI_THRESHOLD3_ABOVE,
++ WMI_RSSI_THRESHOLD4_ABOVE,
++ WMI_RSSI_THRESHOLD5_ABOVE,
++ WMI_RSSI_THRESHOLD6_ABOVE,
++ WMI_RSSI_THRESHOLD1_BELOW,
++ WMI_RSSI_THRESHOLD2_BELOW,
++ WMI_RSSI_THRESHOLD3_BELOW,
++ WMI_RSSI_THRESHOLD4_BELOW,
++ WMI_RSSI_THRESHOLD5_BELOW,
++ WMI_RSSI_THRESHOLD6_BELOW
++}WMI_RSSI_THRESHOLD_VAL;
++
++typedef PREPACK struct {
++ A_INT16 rssi;
++ A_UINT8 range;
++}POSTPACK WMI_RSSI_THRESHOLD_EVENT;
++
++/*
++ * WMI_ERROR_REPORT_EVENTID
++ */
++typedef enum{
++ WMI_TARGET_PM_ERR_FAIL = 0x00000001,
++ WMI_TARGET_KEY_NOT_FOUND = 0x00000002,
++ WMI_TARGET_DECRYPTION_ERR = 0x00000004,
++ WMI_TARGET_BMISS = 0x00000008,
++ WMI_PSDISABLE_NODE_JOIN = 0x00000010,
++ WMI_TARGET_COM_ERR = 0x00000020,
++ WMI_TARGET_FATAL_ERR = 0x00000040
++} WMI_TARGET_ERROR_VAL;
++
++typedef PREPACK struct {
++ A_UINT32 errorVal;
++}POSTPACK WMI_TARGET_ERROR_REPORT_EVENT;
++
++typedef PREPACK struct {
++ A_UINT8 retrys;
++}POSTPACK WMI_TX_RETRY_ERR_EVENT;
++
++typedef enum{
++ WMI_SNR_THRESHOLD1_ABOVE = 1,
++ WMI_SNR_THRESHOLD1_BELOW,
++ WMI_SNR_THRESHOLD2_ABOVE,
++ WMI_SNR_THRESHOLD2_BELOW,
++ WMI_SNR_THRESHOLD3_ABOVE,
++ WMI_SNR_THRESHOLD3_BELOW,
++ WMI_SNR_THRESHOLD4_ABOVE,
++ WMI_SNR_THRESHOLD4_BELOW
++} WMI_SNR_THRESHOLD_VAL;
++
++typedef PREPACK struct {
++ A_UINT8 range; /* WMI_SNR_THRESHOLD_VAL */
++ A_UINT8 snr;
++}POSTPACK WMI_SNR_THRESHOLD_EVENT;
++
++typedef enum{
++ WMI_LQ_THRESHOLD1_ABOVE = 1,
++ WMI_LQ_THRESHOLD1_BELOW,
++ WMI_LQ_THRESHOLD2_ABOVE,
++ WMI_LQ_THRESHOLD2_BELOW,
++ WMI_LQ_THRESHOLD3_ABOVE,
++ WMI_LQ_THRESHOLD3_BELOW,
++ WMI_LQ_THRESHOLD4_ABOVE,
++ WMI_LQ_THRESHOLD4_BELOW
++} WMI_LQ_THRESHOLD_VAL;
++
++typedef PREPACK struct {
++ A_INT32 lq;
++ A_UINT8 range; /* WMI_LQ_THRESHOLD_VAL */
++}POSTPACK WMI_LQ_THRESHOLD_EVENT;
++/*
++ * WMI_REPORT_ROAM_TBL_EVENTID
++ */
++#define MAX_ROAM_TBL_CAND 5
++
++typedef PREPACK struct {
++ A_INT32 roam_util;
++ A_UINT8 bssid[ATH_MAC_LEN];
++ A_INT8 rssi;
++ A_INT8 rssidt;
++ A_INT8 last_rssi;
++ A_INT8 util;
++ A_INT8 bias;
++ A_UINT8 reserved; /* For alignment */
++} POSTPACK WMI_BSS_ROAM_INFO;
++
++
++typedef PREPACK struct {
++ A_UINT16 roamMode;
++ A_UINT16 numEntries;
++ WMI_BSS_ROAM_INFO bssRoamInfo[1];
++} POSTPACK WMI_TARGET_ROAM_TBL;
++
++/*
++ * WMI_CAC_EVENTID
++ */
++typedef enum {
++ CAC_INDICATION_ADMISSION = 0x00,
++ CAC_INDICATION_ADMISSION_RESP = 0x01,
++ CAC_INDICATION_DELETE = 0x02,
++ CAC_INDICATION_NO_RESP = 0x03,
++}CAC_INDICATION;
++
++#define WMM_TSPEC_IE_LEN 63
++
++typedef PREPACK struct {
++ A_UINT8 ac;
++ A_UINT8 cac_indication;
++ A_UINT8 statusCode;
++ A_UINT8 tspecSuggestion[WMM_TSPEC_IE_LEN];
++}POSTPACK WMI_CAC_EVENT;
++
++/*
++ * WMI_APLIST_EVENTID
++ */
++
++typedef enum {
++ APLIST_VER1 = 1,
++} APLIST_VER;
++
++typedef PREPACK struct {
++ A_UINT8 bssid[ATH_MAC_LEN];
++ A_UINT16 channel;
++} POSTPACK WMI_AP_INFO_V1;
++
++typedef PREPACK union {
++ WMI_AP_INFO_V1 apInfoV1;
++} POSTPACK WMI_AP_INFO;
++
++typedef PREPACK struct {
++ A_UINT8 apListVer;
++ A_UINT8 numAP;
++ WMI_AP_INFO apList[1];
++} POSTPACK WMI_APLIST_EVENT;
++
++/*
++ * developer commands
++ */
++
++/*
++ * WMI_SET_BITRATE_CMDID
++ *
++ * Get bit rate cmd uses same definition as set bit rate cmd
++ */
++typedef enum {
++ RATE_AUTO = -1,
++ RATE_1Mb = 0,
++ RATE_2Mb = 1,
++ RATE_5_5Mb = 2,
++ RATE_11Mb = 3,
++ RATE_6Mb = 4,
++ RATE_9Mb = 5,
++ RATE_12Mb = 6,
++ RATE_18Mb = 7,
++ RATE_24Mb = 8,
++ RATE_36Mb = 9,
++ RATE_48Mb = 10,
++ RATE_54Mb = 11,
++} WMI_BIT_RATE;
++
++typedef PREPACK struct {
++ A_INT8 rateIndex; /* see WMI_BIT_RATE */
++} POSTPACK WMI_BIT_RATE_CMD, WMI_BIT_RATE_REPLY;
++
++/*
++ * WMI_SET_FIXRATES_CMDID
++ *
++ * Get fix rates cmd uses same definition as set fix rates cmd
++ */
++typedef enum {
++ FIX_RATE_1Mb = 0x1,
++ FIX_RATE_2Mb = 0x2,
++ FIX_RATE_5_5Mb = 0x4,
++ FIX_RATE_11Mb = 0x8,
++ FIX_RATE_6Mb = 0x10,
++ FIX_RATE_9Mb = 0x20,
++ FIX_RATE_12Mb = 0x40,
++ FIX_RATE_18Mb = 0x80,
++ FIX_RATE_24Mb = 0x100,
++ FIX_RATE_36Mb = 0x200,
++ FIX_RATE_48Mb = 0x400,
++ FIX_RATE_54Mb = 0x800,
++} WMI_FIX_RATES_MASK;
++
++typedef PREPACK struct {
++ A_UINT16 fixRateMask; /* see WMI_BIT_RATE */
++} POSTPACK WMI_FIX_RATES_CMD, WMI_FIX_RATES_REPLY;
++
++/*
++ * WMI_SET_RECONNECT_AUTH_MODE_CMDID
++ *
++ * Set authentication mode
++ */
++typedef enum {
++ RECONN_DO_AUTH = 0x00,
++ RECONN_NOT_AUTH = 0x01
++} WMI_AUTH_MODE;
++
++typedef PREPACK struct {
++ A_UINT8 mode;
++} POSTPACK WMI_SET_AUTH_MODE_CMD;
++
++/*
++ * WMI_SET_REASSOC_MODE_CMDID
++ *
++ * Set authentication mode
++ */
++typedef enum {
++ REASSOC_DO_DISASSOC = 0x00,
++ REASSOC_DONOT_DISASSOC = 0x01
++} WMI_REASSOC_MODE;
++
++typedef PREPACK struct {
++ A_UINT8 mode;
++}POSTPACK WMI_SET_REASSOC_MODE_CMD;
++
++typedef enum {
++ ROAM_DATA_TIME = 1, /* Get The Roam Time Data */
++} ROAM_DATA_TYPE;
++
++typedef PREPACK struct {
++ A_UINT32 disassoc_time;
++ A_UINT32 no_txrx_time;
++ A_UINT32 assoc_time;
++ A_UINT32 allow_txrx_time;
++ A_UINT32 last_data_txrx_time;
++ A_UINT32 first_data_txrx_time;
++ A_UINT8 disassoc_bssid[ATH_MAC_LEN];
++ A_INT8 disassoc_bss_rssi;
++ A_UINT8 assoc_bssid[ATH_MAC_LEN];
++ A_INT8 assoc_bss_rssi;
++} POSTPACK WMI_TARGET_ROAM_TIME;
++
++typedef PREPACK struct {
++ PREPACK union {
++ WMI_TARGET_ROAM_TIME roamTime;
++ } POSTPACK u;
++ A_UINT8 roamDataType ;
++} POSTPACK WMI_TARGET_ROAM_DATA;
++
++typedef enum {
++ WMI_WMM_DISABLED = 0,
++ WMI_WMM_ENABLED
++} WMI_WMM_STATUS;
++
++typedef PREPACK struct {
++ A_UINT8 status;
++}POSTPACK WMI_SET_WMM_CMD;
++
++typedef enum {
++ WMI_TXOP_DISABLED = 0,
++ WMI_TXOP_ENABLED
++} WMI_TXOP_CFG;
++
++typedef PREPACK struct {
++ A_UINT8 txopEnable;
++}POSTPACK WMI_SET_WMM_TXOP_CMD;
++
++typedef PREPACK struct {
++ A_UINT8 keepaliveInterval;
++} POSTPACK WMI_SET_KEEPALIVE_CMD;
++
++typedef PREPACK struct {
++ A_BOOL configured;
++ A_UINT8 keepaliveInterval;
++} POSTPACK WMI_GET_KEEPALIVE_CMD;
++
++/*
++ * Add Application specified IE to a management frame
++ */
++#define WMI_MAX_IE_LEN 78
++
++typedef PREPACK struct {
++ A_UINT8 mgmtFrmType; /* one of WMI_MGMT_FRAME_TYPE */
++ A_UINT8 ieLen; /* Length of the IE that should be added to the MGMT frame */
++ A_UINT8 ieInfo[1];
++} POSTPACK WMI_SET_APPIE_CMD;
++
++/*
++ * Notify the WSC registration status to the target
++ */
++#define WSC_REG_ACTIVE 1
++#define WSC_REG_INACTIVE 0
++/* Generic Hal Interface for setting hal paramters. */
++/* Add new Set HAL Param cmdIds here for newer params */
++typedef enum {
++ WHAL_SETCABTO_CMDID = 1,
++}WHAL_CMDID;
++
++typedef PREPACK struct {
++ A_UINT8 cabTimeOut;
++} POSTPACK WHAL_SETCABTO_PARAM;
++
++typedef PREPACK struct {
++ A_UINT8 whalCmdId;
++ A_UINT8 data[1];
++} POSTPACK WHAL_PARAMCMD;
++
++
++#define WOW_MAX_FILTER_LISTS 1 /*4*/
++#define WOW_MAX_FILTERS_PER_LIST 4
++#define WOW_PATTERN_SIZE 64
++#define WOW_MASK_SIZE 64
++
++typedef PREPACK struct {
++ A_UINT8 wow_valid_filter;
++ A_UINT8 wow_filter_id;
++ A_UINT8 wow_filter_size;
++ A_UINT8 wow_filter_offset;
++ A_UINT8 wow_filter_mask[WOW_MASK_SIZE];
++ A_UINT8 wow_filter_pattern[WOW_PATTERN_SIZE];
++} POSTPACK WOW_FILTER;
++
++
++typedef PREPACK struct {
++ A_UINT8 wow_valid_list;
++ A_UINT8 wow_list_id;
++ A_UINT8 wow_num_filters;
++ A_UINT8 wow_total_list_size;
++ WOW_FILTER list[WOW_MAX_FILTERS_PER_LIST];
++} POSTPACK WOW_FILTER_LIST;
++
++typedef PREPACK struct {
++ A_BOOL awake;
++ A_BOOL asleep;
++} POSTPACK WMI_SET_HOST_SLEEP_MODE_CMD;
++
++typedef PREPACK struct {
++ A_BOOL enable_wow;
++} POSTPACK WMI_SET_WOW_MODE_CMD;
++
++typedef PREPACK struct {
++ A_UINT8 filter_list_id;
++} POSTPACK WMI_GET_WOW_LIST_CMD;
++
++/*
++ * WMI_GET_WOW_LIST_CMD reply
++ */
++typedef PREPACK struct {
++ A_UINT8 num_filters; /* number of patterns in reply */
++ A_UINT8 this_filter_num; /* this is filter # x of total num_filters */
++ A_UINT8 wow_mode;
++ A_UINT8 host_mode;
++ WOW_FILTER wow_filters[1];
++} POSTPACK WMI_GET_WOW_LIST_REPLY;
++
++typedef PREPACK struct {
++ A_UINT8 filter_list_id;
++ A_UINT8 filter_size;
++ A_UINT8 filter_offset;
++ A_UINT8 filter[1];
++} POSTPACK WMI_ADD_WOW_PATTERN_CMD;
++
++typedef PREPACK struct {
++ A_UINT16 filter_list_id;
++ A_UINT16 filter_id;
++} POSTPACK WMI_DEL_WOW_PATTERN_CMD;
++
++typedef PREPACK struct {
++ A_UINT8 macaddr[ATH_MAC_LEN];
++} POSTPACK WMI_SET_MAC_ADDRESS_CMD;
++
++/*
++ * WMI_SET_AKMP_PARAMS_CMD
++ */
++
++#define WMI_AKMP_MULTI_PMKID_EN 0x000001
++
++typedef PREPACK struct {
++ A_UINT32 akmpInfo;
++} POSTPACK WMI_SET_AKMP_PARAMS_CMD;
++
++typedef PREPACK struct {
++ A_UINT8 pmkid[WMI_PMKID_LEN];
++} POSTPACK WMI_PMKID;
++
++/*
++ * WMI_SET_PMKID_LIST_CMD
++ */
++#define WMI_MAX_PMKID_CACHE 8
++
++typedef PREPACK struct {
++ A_UINT32 numPMKID;
++ WMI_PMKID pmkidList[WMI_MAX_PMKID_CACHE];
++} POSTPACK WMI_SET_PMKID_LIST_CMD;
++
++/*
++ * WMI_GET_PMKID_LIST_CMD Reply
++ * Following the Number of PMKIDs is the list of PMKIDs
++ */
++typedef PREPACK struct {
++ A_UINT32 numPMKID;
++ WMI_PMKID pmkidList[1];
++} POSTPACK WMI_PMKID_LIST_REPLY;
++
++/* index used for priority streams */
++typedef enum {
++ WMI_NOT_MAPPED = -1,
++ WMI_CONTROL_PRI = 0,
++ WMI_BEST_EFFORT_PRI = 1,
++ WMI_LOW_PRI = 2,
++ WMI_HIGH_PRI = 3,
++ WMI_HIGHEST_PRI,
++ WMI_PRI_MAX_COUNT
++} WMI_PRI_STREAM_ID;
++
++#ifndef ATH_TARGET
++#include "athendpack.h"
++#endif
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _WMI_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wmix.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wmix.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,233 @@
++/*
++ * Copyright (c) 2004-2005 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * $ATH_LICENSE_HOSTSDK0_C$
++ *
++ * This file contains extensions of the WMI protocol specified in the
++ * Wireless Module Interface (WMI). It includes definitions of all
++ * extended commands and events. Extensions include useful commands
++ * that are not directly related to wireless activities. They may
++ * be hardware-specific, and they might not be supported on all
++ * implementations.
++ *
++ * Extended WMIX commands are encapsulated in a WMI message with
++ * cmd=WMI_EXTENSION_CMD.
++ *
++ */
++
++#ifndef _WMIX_H_
++#define _WMIX_H_
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++#ifndef ATH_TARGET
++#include "athstartpack.h"
++#endif
++
++#include "dbglog.h"
++
++/*
++ * Extended WMI commands are those that are needed during wireless
++ * operation, but which are not really wireless commands. This allows,
++ * for instance, platform-specific commands. Extended WMI commands are
++ * embedded in a WMI command message with WMI_COMMAND_ID=WMI_EXTENSION_CMDID.
++ * Extended WMI events are similarly embedded in a WMI event message with
++ * WMI_EVENT_ID=WMI_EXTENSION_EVENTID.
++ */
++typedef PREPACK struct {
++ A_UINT32 commandId;
++} POSTPACK WMIX_CMD_HDR;
++
++typedef enum {
++ WMIX_DSETOPEN_REPLY_CMDID = 0x2001,
++ WMIX_DSETDATA_REPLY_CMDID,
++ WMIX_GPIO_OUTPUT_SET_CMDID,
++ WMIX_GPIO_INPUT_GET_CMDID,
++ WMIX_GPIO_REGISTER_SET_CMDID,
++ WMIX_GPIO_REGISTER_GET_CMDID,
++ WMIX_GPIO_INTR_ACK_CMDID,
++ WMIX_HB_CHALLENGE_RESP_CMDID,
++ WMIX_DBGLOG_CFG_MODULE_CMDID,
++} WMIX_COMMAND_ID;
++
++typedef enum {
++ WMIX_DSETOPENREQ_EVENTID = 0x3001,
++ WMIX_DSETCLOSE_EVENTID,
++ WMIX_DSETDATAREQ_EVENTID,
++ WMIX_GPIO_INTR_EVENTID,
++ WMIX_GPIO_DATA_EVENTID,
++ WMIX_GPIO_ACK_EVENTID,
++ WMIX_HB_CHALLENGE_RESP_EVENTID,
++ WMIX_DBGLOG_EVENTID,
++} WMIX_EVENT_ID;
++
++/*
++ * =============DataSet support=================
++ */
++
++/*
++ * WMIX_DSETOPENREQ_EVENTID
++ * DataSet Open Request Event
++ */
++typedef PREPACK struct {
++ A_UINT32 dset_id;
++ A_UINT32 targ_dset_handle; /* echo'ed, not used by Host, */
++ A_UINT32 targ_reply_fn; /* echo'ed, not used by Host, */
++ A_UINT32 targ_reply_arg; /* echo'ed, not used by Host, */
++} POSTPACK WMIX_DSETOPENREQ_EVENT;
++
++/*
++ * WMIX_DSETCLOSE_EVENTID
++ * DataSet Close Event
++ */
++typedef PREPACK struct {
++ A_UINT32 access_cookie;
++} POSTPACK WMIX_DSETCLOSE_EVENT;
++
++/*
++ * WMIX_DSETDATAREQ_EVENTID
++ * DataSet Data Request Event
++ */
++typedef PREPACK struct {
++ A_UINT32 access_cookie;
++ A_UINT32 offset;
++ A_UINT32 length;
++ A_UINT32 targ_buf; /* echo'ed, not used by Host, */
++ A_UINT32 targ_reply_fn; /* echo'ed, not used by Host, */
++ A_UINT32 targ_reply_arg; /* echo'ed, not used by Host, */
++} POSTPACK WMIX_DSETDATAREQ_EVENT;
++
++typedef PREPACK struct {
++ A_UINT32 status;
++ A_UINT32 targ_dset_handle;
++ A_UINT32 targ_reply_fn;
++ A_UINT32 targ_reply_arg;
++ A_UINT32 access_cookie;
++ A_UINT32 size;
++ A_UINT32 version;
++} POSTPACK WMIX_DSETOPEN_REPLY_CMD;
++
++typedef PREPACK struct {
++ A_UINT32 status;
++ A_UINT32 targ_buf;
++ A_UINT32 targ_reply_fn;
++ A_UINT32 targ_reply_arg;
++ A_UINT32 length;
++ A_UINT8 buf[1];
++} POSTPACK WMIX_DSETDATA_REPLY_CMD;
++
++
++/*
++ * =============GPIO support=================
++ * All masks are 18-bit masks with bit N operating on GPIO pin N.
++ */
++
++#include "gpio.h"
++
++/*
++ * Set GPIO pin output state.
++ * In order for output to be driven, a pin must be enabled for output.
++ * This can be done during initialization through the GPIO Configuration
++ * DataSet, or during operation with the enable_mask.
++ *
++ * If a request is made to simultaneously set/clear or set/disable or
++ * clear/disable or disable/enable, results are undefined.
++ */
++typedef PREPACK struct {
++ A_UINT32 set_mask; /* pins to set */
++ A_UINT32 clear_mask; /* pins to clear */
++ A_UINT32 enable_mask; /* pins to enable for output */
++ A_UINT32 disable_mask; /* pins to disable/tristate */
++} POSTPACK WMIX_GPIO_OUTPUT_SET_CMD;
++
++/*
++ * Set a GPIO register. For debug/exceptional cases.
++ * Values for gpioreg_id are GPIO_REGISTER_IDs, defined in a
++ * platform-dependent header.
++ */
++typedef PREPACK struct {
++ A_UINT32 gpioreg_id; /* GPIO register ID */
++ A_UINT32 value; /* value to write */
++} POSTPACK WMIX_GPIO_REGISTER_SET_CMD;
++
++/* Get a GPIO register. For debug/exceptional cases. */
++typedef PREPACK struct {
++ A_UINT32 gpioreg_id; /* GPIO register to read */
++} POSTPACK WMIX_GPIO_REGISTER_GET_CMD;
++
++/*
++ * Host acknowledges and re-arms GPIO interrupts. A single
++ * message should be used to acknowledge all interrupts that
++ * were delivered in an earlier WMIX_GPIO_INTR_EVENT message.
++ */
++typedef PREPACK struct {
++ A_UINT32 ack_mask; /* interrupts to acknowledge */
++} POSTPACK WMIX_GPIO_INTR_ACK_CMD;
++
++/*
++ * Target informs Host of GPIO interrupts that have ocurred since the
++ * last WMIX_GIPO_INTR_ACK_CMD was received. Additional information --
++ * the current GPIO input values is provided -- in order to support
++ * use of a GPIO interrupt as a Data Valid signal for other GPIO pins.
++ */
++typedef PREPACK struct {
++ A_UINT32 intr_mask; /* pending GPIO interrupts */
++ A_UINT32 input_values; /* recent GPIO input values */
++} POSTPACK WMIX_GPIO_INTR_EVENT;
++
++/*
++ * Target responds to Host's earlier WMIX_GPIO_INPUT_GET_CMDID request
++ * using a GPIO_DATA_EVENT with
++ * value set to the mask of GPIO pin inputs and
++ * reg_id set to GPIO_ID_NONE
++ *
++ *
++ * Target responds to Hosts's earlier WMIX_GPIO_REGISTER_GET_CMDID request
++ * using a GPIO_DATA_EVENT with
++ * value set to the value of the requested register and
++ * reg_id identifying the register (reflects the original request)
++ * NB: reg_id supports the future possibility of unsolicited
++ * WMIX_GPIO_DATA_EVENTs (for polling GPIO input), and it may
++ * simplify Host GPIO support.
++ */
++typedef PREPACK struct {
++ A_UINT32 value;
++ A_UINT32 reg_id;
++} POSTPACK WMIX_GPIO_DATA_EVENT;
++
++/*
++ * =============Error Detection support=================
++ */
++
++/*
++ * WMIX_HB_CHALLENGE_RESP_CMDID
++ * Heartbeat Challenge Response command
++ */
++typedef PREPACK struct {
++ A_UINT32 cookie;
++ A_UINT32 source;
++} POSTPACK WMIX_HB_CHALLENGE_RESP_CMD;
++
++/*
++ * WMIX_HB_CHALLENGE_RESP_EVENTID
++ * Heartbeat Challenge Response Event
++ */
++#define WMIX_HB_CHALLENGE_RESP_EVENT WMIX_HB_CHALLENGE_RESP_CMD
++
++typedef PREPACK struct {
++ struct dbglog_config_s config;
++} POSTPACK WMIX_DBGLOG_CFG_MODULE_CMD;
++
++#ifndef ATH_TARGET
++#include "athendpack.h"
++#endif
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _WMIX_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,38 @@
++REV ?= 2
++
++PWD := $(shell pwd)
++
++EXTRA_CFLAGS += -I$(src)/include
++
++EXTRA_CFLAGS += -DLINUX -D__KERNEL__ -DHTC_RAW_INTERFACE\
++ -DTCMD -DUSER_KEYS \
++ -DNO_SYNC_FLUSH #\
++ -DMULTIPLE_FRAMES_PER_INTERRUPT -DAR6000REV$(REV) \
++ -DBLOCK_TX_PATH_FLAG \
++ -DSDIO \
++
++EXTRA_CFLAGS += -DKERNEL_2_6
++
++obj-$(CONFIG_SDIO_AR6000_WLAN) += ar6000.o
++
++ar6000-objs += htc/ar6k.o \
++ htc/ar6k_events.o \
++ htc/htc_send.o \
++ htc/htc_recv.o \
++ htc/htc_services.o \
++ htc/htc.o \
++ hif/hif.o \
++ bmi/bmi.o \
++ ar6000/ar6000_drv.o \
++ ar6000/ar6000_raw_if.o \
++ ar6000/netbuf.o \
++ ar6000/wireless_ext.o \
++ ar6000/ioctl.o \
++ miscdrv/common_drv.o \
++ miscdrv/credit_dist.o \
++ wmi/wmi.o \
++ wlan/wlan_node.o \
++ wlan/wlan_recv_beacon.o \
++ wlan/wlan_utils.o
++
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/miscdrv/common_drv.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/miscdrv/common_drv.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,467 @@
++
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "a_config.h"
++#include "athdefs.h"
++#include "a_types.h"
++#include "AR6Khwreg.h"
++#include "targaddrs.h"
++#include "a_osapi.h"
++#include "hif.h"
++#include "htc_api.h"
++#include "bmi.h"
++#include "bmi_msg.h"
++#include "common_drv.h"
++#include "a_debug.h"
++#include "targaddrs.h"
++
++#define HOST_INTEREST_ITEM_ADDRESS(target, item) \
++(((TargetType) == TARGET_TYPE_AR6001) ? \
++ AR6001_HOST_INTEREST_ITEM_ADDRESS(item) : \
++ AR6002_HOST_INTEREST_ITEM_ADDRESS(item))
++
++
++/* Compile the 4BYTE version of the window register setup routine,
++ * This mitigates host interconnect issues with non-4byte aligned bus requests, some
++ * interconnects use bus adapters that impose strict limitations.
++ * Since diag window access is not intended for performance critical operations, the 4byte mode should
++ * be satisfactory even though it generates 4X the bus activity. */
++
++#ifdef USE_4BYTE_REGISTER_ACCESS
++
++ /* set the window address register (using 4-byte register access ). */
++A_STATUS ar6000_SetAddressWindowRegister(HIF_DEVICE *hifDevice, A_UINT32 RegisterAddr, A_UINT32 Address)
++{
++ A_STATUS status;
++ A_UINT8 addrValue[4];
++ int i;
++
++ /* write bytes 1,2,3 of the register to set the upper address bytes, the LSB is written
++ * last to initiate the access cycle */
++
++ for (i = 1; i <= 3; i++) {
++ /* fill the buffer with the address byte value we want to hit 4 times*/
++ addrValue[0] = ((A_UINT8 *)&Address)[i];
++ addrValue[1] = addrValue[0];
++ addrValue[2] = addrValue[0];
++ addrValue[3] = addrValue[0];
++
++ /* hit each byte of the register address with a 4-byte write operation to the same address,
++ * this is a harmless operation */
++ status = HIFReadWrite(hifDevice,
++ RegisterAddr+i,
++ addrValue,
++ 4,
++ HIF_WR_SYNC_BYTE_FIX,
++ NULL);
++ if (status != A_OK) {
++ break;
++ }
++ }
++
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write initial bytes of 0x%x to window reg: 0x%X \n",
++ RegisterAddr, Address));
++ return status;
++ }
++
++ /* write the address register again, this time write the whole 4-byte value.
++ * The effect here is that the LSB write causes the cycle to start, the extra
++ * 3 byte write to bytes 1,2,3 has no effect since we are writing the same values again */
++ status = HIFReadWrite(hifDevice,
++ RegisterAddr,
++ (A_UCHAR *)(&Address),
++ 4,
++ HIF_WR_SYNC_BYTE_INC,
++ NULL);
++
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write 0x%x to window reg: 0x%X \n",
++ RegisterAddr, Address));
++ return status;
++ }
++
++ return A_OK;
++
++
++
++}
++
++
++#else
++
++ /* set the window address register */
++A_STATUS ar6000_SetAddressWindowRegister(HIF_DEVICE *hifDevice, A_UINT32 RegisterAddr, A_UINT32 Address)
++{
++ A_STATUS status;
++
++ /* write bytes 1,2,3 of the register to set the upper address bytes, the LSB is written
++ * last to initiate the access cycle */
++ status = HIFReadWrite(hifDevice,
++ RegisterAddr+1, /* write upper 3 bytes */
++ ((A_UCHAR *)(&Address))+1,
++ sizeof(A_UINT32)-1,
++ HIF_WR_SYNC_BYTE_INC,
++ NULL);
++
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write initial bytes of 0x%x to window reg: 0x%X \n",
++ RegisterAddr, Address));
++ return status;
++ }
++
++ /* write the LSB of the register, this initiates the operation */
++ status = HIFReadWrite(hifDevice,
++ RegisterAddr,
++ (A_UCHAR *)(&Address),
++ sizeof(A_UINT8),
++ HIF_WR_SYNC_BYTE_INC,
++ NULL);
++
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write 0x%x to window reg: 0x%X \n",
++ RegisterAddr, Address));
++ return status;
++ }
++
++ return A_OK;
++}
++
++#endif
++
++/*
++ * Read from the AR6000 through its diagnostic window.
++ * No cooperation from the Target is required for this.
++ */
++A_STATUS
++ar6000_ReadRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data)
++{
++ A_STATUS status;
++
++ /* set window register to start read cycle */
++ status = ar6000_SetAddressWindowRegister(hifDevice,
++ WINDOW_READ_ADDR_ADDRESS,
++ *address);
++
++ if (status != A_OK) {
++ return status;
++ }
++
++ /* read the data */
++ status = HIFReadWrite(hifDevice,
++ WINDOW_DATA_ADDRESS,
++ (A_UCHAR *)data,
++ sizeof(A_UINT32),
++ HIF_RD_SYNC_BYTE_INC,
++ NULL);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot read from WINDOW_DATA_ADDRESS\n"));
++ return status;
++ }
++
++ return status;
++}
++
++
++/*
++ * Write to the AR6000 through its diagnostic window.
++ * No cooperation from the Target is required for this.
++ */
++A_STATUS
++ar6000_WriteRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data)
++{
++ A_STATUS status;
++
++ /* set write data */
++ status = HIFReadWrite(hifDevice,
++ WINDOW_DATA_ADDRESS,
++ (A_UCHAR *)data,
++ sizeof(A_UINT32),
++ HIF_WR_SYNC_BYTE_INC,
++ NULL);
++ if (status != A_OK) {
++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write 0x%x to WINDOW_DATA_ADDRESS\n", *data));
++ return status;
++ }
++
++ /* set window register, which starts the write cycle */
++ return ar6000_SetAddressWindowRegister(hifDevice,
++ WINDOW_WRITE_ADDR_ADDRESS,
++ *address);
++}
++
++A_STATUS
++ar6000_ReadDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address,
++ A_UCHAR *data, A_UINT32 length)
++{
++ A_UINT32 count;
++ A_STATUS status = A_OK;
++
++ for (count = 0; count < length; count += 4, address += 4) {
++ if ((status = ar6000_ReadRegDiag(hifDevice, &address,
++ (A_UINT32 *)&data[count])) != A_OK)
++ {
++ break;
++ }
++ }
++
++ return status;
++}
++
++A_STATUS
++ar6000_WriteDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address,
++ A_UCHAR *data, A_UINT32 length)
++{
++ A_UINT32 count;
++ A_STATUS status = A_OK;
++
++ for (count = 0; count < length; count += 4, address += 4) {
++ if ((status = ar6000_WriteRegDiag(hifDevice, &address,
++ (A_UINT32 *)&data[count])) != A_OK)
++ {
++ break;
++ }
++ }
++
++ return status;
++}
++
++A_STATUS
++ar6000_reset_device_skipflash(HIF_DEVICE *hifDevice)
++{
++ int i;
++ struct forceROM_s {
++ A_UINT32 addr;
++ A_UINT32 data;
++ };
++ struct forceROM_s *ForceROM;
++ int szForceROM;
++ A_UINT32 instruction;
++
++ static struct forceROM_s ForceROM_REV2[] = {
++ /* NB: This works for old REV2 ROM (old). */
++ {0x00001ff0, 0x175b0027}, /* jump instruction at 0xa0001ff0 */
++ {0x00001ff4, 0x00000000}, /* nop instruction at 0xa0001ff4 */
++
++ {MC_REMAP_TARGET_ADDRESS, 0x00001ff0}, /* remap to 0xa0001ff0 */
++ {MC_REMAP_COMPARE_ADDRESS, 0x01000040},/* ...from 0xbfc00040 */
++ {MC_REMAP_SIZE_ADDRESS, 0x00000000}, /* ...1 cache line */
++ {MC_REMAP_VALID_ADDRESS, 0x00000001}, /* ...remap is valid */
++
++ {LOCAL_COUNT_ADDRESS+0x10, 0}, /* clear BMI credit counter */
++
++ {RESET_CONTROL_ADDRESS, RESET_CONTROL_WARM_RST_MASK},
++ };
++
++ static struct forceROM_s ForceROM_NEW[] = {
++ /* NB: This works for AR6000 ROM REV3 and beyond. */
++ {LOCAL_SCRATCH_ADDRESS, AR6K_OPTION_IGNORE_FLASH},
++ {LOCAL_COUNT_ADDRESS+0x10, 0}, /* clear BMI credit counter */
++ {RESET_CONTROL_ADDRESS, RESET_CONTROL_WARM_RST_MASK},
++ };
++
++ /*
++ * Examine a semi-arbitrary instruction that's different
++ * in REV2 and other revisions.
++ * NB: If a Host port does not require simultaneous support
++ * for multiple revisions of Target ROM, this code can be elided.
++ */
++ (void)ar6000_ReadDataDiag(hifDevice, 0x01000040,
++ (A_UCHAR *)&instruction, 4);
++
++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("instruction=0x%x\n", instruction));
++
++ if (instruction == 0x3c1aa200) {
++ /* It's an old ROM */
++ ForceROM = ForceROM_REV2;
++ szForceROM = sizeof(ForceROM_REV2)/sizeof(*ForceROM);
++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Using OLD method\n"));
++ } else {
++ ForceROM = ForceROM_NEW;
++ szForceROM = sizeof(ForceROM_NEW)/sizeof(*ForceROM);
++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Using NEW method\n"));
++ }
++
++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Force Target to execute from ROM....\n"));
++ for (i = 0; i < szForceROM; i++)
++ {
++ if (ar6000_WriteRegDiag(hifDevice,
++ &ForceROM[i].addr,
++ &ForceROM[i].data) != A_OK)
++ {
++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot force Target to execute ROM!\n"));
++ return A_ERROR;
++ }
++ }
++
++ A_MDELAY(50); /* delay to allow dragon to come to BMI phase */
++ return A_OK;
++}
++
++/* reset device */
++A_STATUS ar6000_reset_device(HIF_DEVICE *hifDevice, A_UINT32 TargetType)
++{
++
++#if !defined(DWSIM)
++ A_STATUS status = A_OK;
++ A_UINT32 address;
++ A_UINT32 data;
++
++ do {
++
++ // address = RESET_CONTROL_ADDRESS;
++ data = RESET_CONTROL_COLD_RST_MASK;
++
++ /* Hardcode the address of RESET_CONTROL_ADDRESS based on the target type */
++ if (TargetType == TARGET_TYPE_AR6001) {
++ address = 0x0C000000;
++ } else {
++ if (TargetType == TARGET_TYPE_AR6002) {
++ address = 0x00004000;
++ } else {
++ A_ASSERT(0);
++ }
++ }
++
++ status = ar6000_WriteRegDiag(hifDevice, &address, &data);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ /*
++ * Read back the RESET CAUSE register to ensure that the cold reset
++ * went through.
++ */
++ A_MDELAY(2000); /* 2 second delay to allow things to settle down */
++
++
++ // address = RESET_CAUSE_ADDRESS;
++ /* Hardcode the address of RESET_CAUSE_ADDRESS based on the target type */
++ if (TargetType == TARGET_TYPE_AR6001) {
++ address = 0x0C0000CC;
++ } else {
++ if (TargetType == TARGET_TYPE_AR6002) {
++ address = 0x000040C0;
++ } else {
++ A_ASSERT(0);
++ }
++ }
++
++ data = 0;
++ status = ar6000_ReadRegDiag(hifDevice, &address, &data);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++
++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Reset Cause readback: 0x%X \n",data));
++ data &= RESET_CAUSE_LAST_MASK;
++ if (data != 2) {
++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Unable to cold reset the target \n"));
++ }
++
++ } while (FALSE);
++
++ if (A_FAILED(status)) {
++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Failed to reset target \n"));
++ }
++#endif
++ return A_OK;
++}
++
++#define REG_DUMP_COUNT_AR6001 38 /* WORDs, derived from AR6001_regdump.h */
++#define REG_DUMP_COUNT_AR6002 32 /* WORDs, derived from AR6002_regdump.h */
++
++
++#if REG_DUMP_COUNT_AR6001 <= REG_DUMP_COUNT_AR6002
++#define REGISTER_DUMP_LEN_MAX REG_DUMP_COUNT_AR6002
++#else
++#define REGISTER_DUMP_LEN_MAX REG_DUMP_COUNT_AR6001
++#endif
++
++void ar6000_dump_target_assert_info(HIF_DEVICE *hifDevice, A_UINT32 TargetType)
++{
++ A_UINT32 address;
++ A_UINT32 regDumpArea = 0;
++ A_STATUS status;
++ A_UINT32 regDumpValues[REGISTER_DUMP_LEN_MAX];
++ A_UINT32 regDumpCount = 0;
++ A_UINT32 i;
++
++ do {
++
++ /* the reg dump pointer is copied to the host interest area */
++ address = HOST_INTEREST_ITEM_ADDRESS(TargetType, hi_failure_state);
++
++ if (TargetType == TARGET_TYPE_AR6001) {
++ /* for AR6001, this is a fixed location because the ptr is actually stuck in cache,
++ * this may be fixed in later firmware versions */
++ address = 0x18a0;
++ regDumpCount = REG_DUMP_COUNT_AR6001;
++
++ } else if (TargetType == TARGET_TYPE_AR6002) {
++
++ regDumpCount = REG_DUMP_COUNT_AR6002;
++
++ } else {
++ A_ASSERT(0);
++ }
++
++ /* read RAM location through diagnostic window */
++ status = ar6000_ReadRegDiag(hifDevice, &address, ®DumpArea);
++
++ if (A_FAILED(status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Failed to get ptr to register dump area \n"));
++ break;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Location of register dump data: 0x%X \n",regDumpArea));
++
++ if (regDumpArea == 0) {
++ /* no reg dump */
++ break;
++ }
++
++ if (TargetType == TARGET_TYPE_AR6001) {
++ regDumpArea &= 0x0FFFFFFF; /* convert to physical address in target memory */
++ }
++
++ /* fetch register dump data */
++ status = ar6000_ReadDataDiag(hifDevice,
++ regDumpArea,
++ (A_UCHAR *)®DumpValues[0],
++ regDumpCount * (sizeof(A_UINT32)));
++
++ if (A_FAILED(status)) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Failed to get register dump \n"));
++ break;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Register Dump: \n"));
++
++ for (i = 0; i < regDumpCount; i++) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" %d : 0x%8.8X \n",i, regDumpValues[i]));
++ }
++
++ } while (FALSE);
++
++}
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/miscdrv/credit_dist.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/miscdrv/credit_dist.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,346 @@
++
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include "a_config.h"
++#include "athdefs.h"
++#include "a_types.h"
++#include "a_osapi.h"
++#include "a_debug.h"
++#include "htc_api.h"
++#include "common_drv.h"
++
++/********* CREDIT DISTRIBUTION FUNCTIONS ******************************************/
++
++#define NO_VO_SERVICE 1 /* currently WMI only uses 3 data streams, so we leave VO service inactive */
++
++#ifdef NO_VO_SERVICE
++#define DATA_SVCS_USED 3
++#else
++#define DATA_SVCS_USED 4
++#endif
++
++static void RedistributeCredits(COMMON_CREDIT_STATE_INFO *pCredInfo,
++ HTC_ENDPOINT_CREDIT_DIST *pEPDistList);
++
++static void SeekCredits(COMMON_CREDIT_STATE_INFO *pCredInfo,
++ HTC_ENDPOINT_CREDIT_DIST *pEPDistList);
++
++/* reduce an ep's credits back to a set limit */
++static INLINE void ReduceCredits(COMMON_CREDIT_STATE_INFO *pCredInfo,
++ HTC_ENDPOINT_CREDIT_DIST *pEpDist,
++ int Limit)
++{
++ int credits;
++
++ /* set the new limit */
++ pEpDist->TxCreditsAssigned = Limit;
++
++ if (pEpDist->TxCredits <= Limit) {
++ return;
++ }
++
++ /* figure out how much to take away */
++ credits = pEpDist->TxCredits - Limit;
++ /* take them away */
++ pEpDist->TxCredits -= credits;
++ pCredInfo->CurrentFreeCredits += credits;
++}
++
++/* give an endpoint some credits from the free credit pool */
++#define GiveCredits(pCredInfo,pEpDist,credits) \
++{ \
++ (pEpDist)->TxCredits += (credits); \
++ (pEpDist)->TxCreditsAssigned += (credits); \
++ (pCredInfo)->CurrentFreeCredits -= (credits); \
++}
++
++
++/* default credit init callback.
++ * This function is called in the context of HTCStart() to setup initial (application-specific)
++ * credit distributions */
++static void ar6000_credit_init(void *Context,
++ HTC_ENDPOINT_CREDIT_DIST *pEPList,
++ int TotalCredits)
++{
++ HTC_ENDPOINT_CREDIT_DIST *pCurEpDist;
++ int count;
++ COMMON_CREDIT_STATE_INFO *pCredInfo = (COMMON_CREDIT_STATE_INFO *)Context;
++
++ pCredInfo->CurrentFreeCredits = TotalCredits;
++ pCredInfo->TotalAvailableCredits = TotalCredits;
++
++ pCurEpDist = pEPList;
++
++ /* run through the list and initialize */
++ while (pCurEpDist != NULL) {
++
++ /* set minimums for each endpoint */
++ pCurEpDist->TxCreditsMin = pCurEpDist->TxCreditsPerMaxMsg;
++
++ if (pCurEpDist->ServiceID == WMI_CONTROL_SVC) {
++ /* give control service some credits */
++ GiveCredits(pCredInfo,pCurEpDist,pCurEpDist->TxCreditsMin);
++ /* control service is always marked active, it never goes inactive EVER */
++ SET_EP_ACTIVE(pCurEpDist);
++ } else if (pCurEpDist->ServiceID == WMI_DATA_BK_SVC) {
++ /* this is the lowest priority data endpoint, save this off for easy access */
++ pCredInfo->pLowestPriEpDist = pCurEpDist;
++ }
++
++ /* Streams have to be created (explicit | implicit)for all kinds
++ * of traffic. BE endpoints are also inactive in the beginning.
++ * When BE traffic starts it creates implicit streams that
++ * redistributes credits.
++ */
++
++ /* note, all other endpoints have minimums set but are initially given NO credits.
++ * Credits will be distributed as traffic activity demands */
++ pCurEpDist = pCurEpDist->pNext;
++ }
++
++ if (pCredInfo->CurrentFreeCredits <= 0) {
++ AR_DEBUG_PRINTF(ATH_LOG_INF, ("Not enough credits (%d) to do credit distributions \n", TotalCredits));
++ A_ASSERT(FALSE);
++ return;
++ }
++
++ /* reset list */
++ pCurEpDist = pEPList;
++ /* now run through the list and set max operating credit limits for everyone */
++ while (pCurEpDist != NULL) {
++ if (pCurEpDist->ServiceID == WMI_CONTROL_SVC) {
++ /* control service max is just 1 max message */
++ pCurEpDist->TxCreditsNorm = pCurEpDist->TxCreditsPerMaxMsg;
++ } else {
++ /* for the remaining data endpoints, we assume that each TxCreditsPerMaxMsg are
++ * the same.
++ * We use a simple calculation here, we take the remaining credits and
++ * determine how many max messages this can cover and then set each endpoint's
++ * normal value equal to half this amount.
++ * */
++ count = (pCredInfo->CurrentFreeCredits/pCurEpDist->TxCreditsPerMaxMsg) * pCurEpDist->TxCreditsPerMaxMsg;
++ count = count >> 1;
++ count = max(count,pCurEpDist->TxCreditsPerMaxMsg);
++ /* set normal */
++ pCurEpDist->TxCreditsNorm = count;
++
++ }
++ pCurEpDist = pCurEpDist->pNext;
++ }
++
++}
++
++
++/* default credit distribution callback
++ * This callback is invoked whenever endpoints require credit distributions.
++ * A lock is held while this function is invoked, this function shall NOT block.
++ * The pEPDistList is a list of distribution structures in prioritized order as
++ * defined by the call to the HTCSetCreditDistribution() api.
++ *
++ */
++static void ar6000_credit_distribute(void *Context,
++ HTC_ENDPOINT_CREDIT_DIST *pEPDistList,
++ HTC_CREDIT_DIST_REASON Reason)
++{
++ HTC_ENDPOINT_CREDIT_DIST *pCurEpDist;
++ COMMON_CREDIT_STATE_INFO *pCredInfo = (COMMON_CREDIT_STATE_INFO *)Context;
++
++ switch (Reason) {
++ case HTC_CREDIT_DIST_SEND_COMPLETE :
++ pCurEpDist = pEPDistList;
++ /* we are given the start of the endpoint distribution list.
++ * There may be one or more endpoints to service.
++ * Run through the list and distribute credits */
++ while (pCurEpDist != NULL) {
++
++ if (pCurEpDist->TxCreditsToDist > 0) {
++ /* return the credits back to the endpoint */
++ pCurEpDist->TxCredits += pCurEpDist->TxCreditsToDist;
++ /* always zero out when we are done */
++ pCurEpDist->TxCreditsToDist = 0;
++
++ if (pCurEpDist->TxCredits > pCurEpDist->TxCreditsAssigned) {
++ /* reduce to the assigned limit, previous credit reductions
++ * could have caused the limit to change */
++ ReduceCredits(pCredInfo, pCurEpDist, pCurEpDist->TxCreditsAssigned);
++ }
++
++ if (pCurEpDist->TxCredits > pCurEpDist->TxCreditsNorm) {
++ /* oversubscribed endpoints need to reduce back to normal */
++ ReduceCredits(pCredInfo, pCurEpDist, pCurEpDist->TxCreditsNorm);
++ }
++ }
++
++ pCurEpDist = pCurEpDist->pNext;
++ }
++
++ A_ASSERT(pCredInfo->CurrentFreeCredits <= pCredInfo->TotalAvailableCredits);
++
++ break;
++
++ case HTC_CREDIT_DIST_ACTIVITY_CHANGE :
++ RedistributeCredits(pCredInfo,pEPDistList);
++ break;
++ case HTC_CREDIT_DIST_SEEK_CREDITS :
++ SeekCredits(pCredInfo,pEPDistList);
++ break;
++ case HTC_DUMP_CREDIT_STATE :
++ AR_DEBUG_PRINTF(ATH_LOG_INF, ("Credit Distribution, total : %d, free : %d\n",
++ pCredInfo->TotalAvailableCredits, pCredInfo->CurrentFreeCredits));
++ break;
++ default:
++ break;
++
++ }
++
++}
++
++/* redistribute credits based on activity change */
++static void RedistributeCredits(COMMON_CREDIT_STATE_INFO *pCredInfo,
++ HTC_ENDPOINT_CREDIT_DIST *pEPDistList)
++{
++ HTC_ENDPOINT_CREDIT_DIST *pCurEpDist = pEPDistList;
++
++ /* walk through the list and remove credits from inactive endpoints */
++ while (pCurEpDist != NULL) {
++
++ if (pCurEpDist->ServiceID != WMI_CONTROL_SVC) {
++ if (!IS_EP_ACTIVE(pCurEpDist)) {
++ /* EP is inactive, reduce credits back to zero */
++ ReduceCredits(pCredInfo, pCurEpDist, 0);
++ }
++ }
++
++ /* NOTE in the active case, we do not need to do anything further,
++ * when an EP goes active and needs credits, HTC will call into
++ * our distribution function using a reason code of HTC_CREDIT_DIST_SEEK_CREDITS */
++
++ pCurEpDist = pCurEpDist->pNext;
++ }
++
++ A_ASSERT(pCredInfo->CurrentFreeCredits <= pCredInfo->TotalAvailableCredits);
++
++}
++
++/* HTC has an endpoint that needs credits, pEPDist is the endpoint in question */
++static void SeekCredits(COMMON_CREDIT_STATE_INFO *pCredInfo,
++ HTC_ENDPOINT_CREDIT_DIST *pEPDist)
++{
++ HTC_ENDPOINT_CREDIT_DIST *pCurEpDist;
++ int credits = 0;
++ int need;
++
++ do {
++
++ if (pEPDist->ServiceID == WMI_CONTROL_SVC) {
++ /* we never oversubscribe on the control service, this is not
++ * a high performance path and the target never holds onto control
++ * credits for too long */
++ break;
++ }
++
++ /* for all other services, we follow a simple algorithm of
++ * 1. checking the free pool for credits
++ * 2. checking lower priority endpoints for credits to take */
++
++ if (pCredInfo->CurrentFreeCredits >= 2 * pEPDist->TxCreditsSeek) {
++ /* try to give more credits than it needs */
++ credits = 2 * pEPDist->TxCreditsSeek;
++ } else {
++ /* give what we can */
++ credits = min(pCredInfo->CurrentFreeCredits,pEPDist->TxCreditsSeek);
++ }
++
++ if (credits >= pEPDist->TxCreditsSeek) {
++ /* we found some to fullfill the seek request */
++ break;
++ }
++
++ /* we don't have enough in the free pool, try taking away from lower priority services
++ *
++ * The rule for taking away credits:
++ * 1. Only take from lower priority endpoints
++ * 2. Only take what is allocated above the minimum (never starve an endpoint completely)
++ * 3. Only take what you need.
++ *
++ * */
++
++ /* starting at the lowest priority */
++ pCurEpDist = pCredInfo->pLowestPriEpDist;
++
++ /* work backwards until we hit the endpoint again */
++ while (pCurEpDist != pEPDist) {
++ /* calculate how many we need so far */
++ need = pEPDist->TxCreditsSeek - pCredInfo->CurrentFreeCredits;
++
++ if ((pCurEpDist->TxCreditsAssigned - need) > pCurEpDist->TxCreditsMin) {
++ /* the current one has been allocated more than it's minimum and it
++ * has enough credits assigned above it's minimum to fullfill our need
++ * try to take away just enough to fullfill our need */
++ ReduceCredits(pCredInfo,
++ pCurEpDist,
++ pCurEpDist->TxCreditsAssigned - need);
++
++ if (pCredInfo->CurrentFreeCredits >= pEPDist->TxCreditsSeek) {
++ /* we have enough */
++ break;
++ }
++ }
++
++ pCurEpDist = pCurEpDist->pPrev;
++ }
++
++ /* return what we can get */
++ credits = min(pCredInfo->CurrentFreeCredits,pEPDist->TxCreditsSeek);
++
++ } while (FALSE);
++
++ /* did we find some credits? */
++ if (credits) {
++ /* give what we can */
++ GiveCredits(pCredInfo, pEPDist, credits);
++ }
++
++}
++
++/* initialize and setup credit distribution */
++A_STATUS ar6000_setup_credit_dist(HTC_HANDLE HTCHandle, COMMON_CREDIT_STATE_INFO *pCredInfo)
++{
++ HTC_SERVICE_ID servicepriority[5];
++
++ A_MEMZERO(pCredInfo,sizeof(COMMON_CREDIT_STATE_INFO));
++
++ servicepriority[0] = WMI_CONTROL_SVC; /* highest */
++ servicepriority[1] = WMI_DATA_VO_SVC;
++ servicepriority[2] = WMI_DATA_VI_SVC;
++ servicepriority[3] = WMI_DATA_BE_SVC;
++ servicepriority[4] = WMI_DATA_BK_SVC; /* lowest */
++
++ /* set callbacks and priority list */
++ HTCSetCreditDistribution(HTCHandle,
++ pCredInfo,
++ ar6000_credit_distribute,
++ ar6000_credit_init,
++ servicepriority,
++ 5);
++
++ return A_OK;
++}
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wlan/wlan_node.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wlan/wlan_node.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,371 @@
++/*-
++ * Copyright (c) 2001 Atsushi Onoe
++ * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting
++ * Copyright (c) 2004-2005 Atheros Communications
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions
++ * are met:
++ * 1. Redistributions of source code must retain the above copyright
++ * notice, this list of conditions and the following disclaimer.
++ * 2. Redistributions in binary form must reproduce the above copyright
++ * notice, this list of conditions and the following disclaimer in the
++ * documentation and/or other materials provided with the distribution.
++ * 3. The name of the author may not be used to endorse or promote products
++ * derived from this software without specific prior written permission.
++ *
++ * Alternatively, this software may be distributed under the terms of the
++ * GNU General Public License ("GPL") version 2 as published by the Free
++ * Software Foundation.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
++ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
++ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/wlan/src/wlan_node.c#1 $
++ */
++/*
++ * IEEE 802.11 node handling support.
++ */
++#include <a_config.h>
++#include <athdefs.h>
++#include <a_types.h>
++#include <a_osapi.h>
++#include <a_debug.h>
++#include <ieee80211.h>
++#include <wlan_api.h>
++#include <ieee80211_node.h>
++#include <htc_api.h>
++#include <wmi.h>
++#include <wmi_api.h>
++
++static void wlan_node_timeout(A_ATH_TIMER arg);
++static bss_t * _ieee80211_find_node(struct ieee80211_node_table *nt,
++ const A_UINT8 *macaddr);
++
++bss_t *
++wlan_node_alloc(struct ieee80211_node_table *nt, int wh_size)
++{
++ bss_t *ni;
++
++ ni = A_MALLOC_NOWAIT(sizeof(bss_t));
++
++ if (ni != NULL) {
++ ni->ni_buf = A_MALLOC_NOWAIT(wh_size);
++ if (ni->ni_buf == NULL) {
++ A_FREE(ni);
++ ni = NULL;
++ return ni;
++ }
++ } else {
++ return ni;
++ }
++
++ /* Make sure our lists are clean */
++ ni->ni_list_next = NULL;
++ ni->ni_list_prev = NULL;
++ ni->ni_hash_next = NULL;
++ ni->ni_hash_prev = NULL;
++
++ //
++ // ni_scangen never initialized before and during suspend/resume of winmobile, customer (LG/SEMCO) identified
++ // that some junk has been stored in this, due to this scan list didn't properly updated
++ //
++ ni->ni_scangen = 0;
++
++ return ni;
++}
++
++void
++wlan_node_free(bss_t *ni)
++{
++ if (ni->ni_buf != NULL) {
++ A_FREE(ni->ni_buf);
++ }
++ A_FREE(ni);
++}
++
++void
++wlan_setup_node(struct ieee80211_node_table *nt, bss_t *ni,
++ const A_UINT8 *macaddr)
++{
++ int hash;
++
++ A_MEMCPY(ni->ni_macaddr, macaddr, IEEE80211_ADDR_LEN);
++ hash = IEEE80211_NODE_HASH(macaddr);
++ ieee80211_node_initref(ni); /* mark referenced */
++
++ ni->ni_tstamp = A_GET_MS(WLAN_NODE_INACT_TIMEOUT_MSEC);
++ IEEE80211_NODE_LOCK_BH(nt);
++
++ /* Insert at the end of the node list */
++ ni->ni_list_next = NULL;
++ ni->ni_list_prev = nt->nt_node_last;
++ if(nt->nt_node_last != NULL)
++ {
++ nt->nt_node_last->ni_list_next = ni;
++ }
++ nt->nt_node_last = ni;
++ if(nt->nt_node_first == NULL)
++ {
++ nt->nt_node_first = ni;
++ }
++
++ /* Insert into the hash list i.e. the bucket */
++ if((ni->ni_hash_next = nt->nt_hash[hash]) != NULL)
++ {
++ nt->nt_hash[hash]->ni_hash_prev = ni;
++ }
++ ni->ni_hash_prev = NULL;
++ nt->nt_hash[hash] = ni;
++
++ if (!nt->isTimerArmed) {
++ A_TIMEOUT_MS(&nt->nt_inact_timer, WLAN_NODE_INACT_TIMEOUT_MSEC, 0);
++ nt->isTimerArmed = TRUE;
++ }
++
++ IEEE80211_NODE_UNLOCK_BH(nt);
++}
++
++static bss_t *
++_ieee80211_find_node(struct ieee80211_node_table *nt,
++ const A_UINT8 *macaddr)
++{
++ bss_t *ni;
++ int hash;
++
++ IEEE80211_NODE_LOCK_ASSERT(nt);
++
++ hash = IEEE80211_NODE_HASH(macaddr);
++ for(ni = nt->nt_hash[hash]; ni; ni = ni->ni_hash_next) {
++ if (IEEE80211_ADDR_EQ(ni->ni_macaddr, macaddr)) {
++ ieee80211_node_incref(ni); /* mark referenced */
++ return ni;
++ }
++ }
++ return NULL;
++}
++
++bss_t *
++wlan_find_node(struct ieee80211_node_table *nt, const A_UINT8 *macaddr)
++{
++ bss_t *ni;
++
++ IEEE80211_NODE_LOCK(nt);
++ ni = _ieee80211_find_node(nt, macaddr);
++ IEEE80211_NODE_UNLOCK(nt);
++ return ni;
++}
++
++/*
++ * Reclaim a node. If this is the last reference count then
++ * do the normal free work. Otherwise remove it from the node
++ * table and mark it gone by clearing the back-reference.
++ */
++void
++wlan_node_reclaim(struct ieee80211_node_table *nt, bss_t *ni)
++{
++ IEEE80211_NODE_LOCK(nt);
++
++ if(ni->ni_list_prev == NULL)
++ {
++ /* First in list so fix the list head */
++ nt->nt_node_first = ni->ni_list_next;
++ }
++ else
++ {
++ ni->ni_list_prev->ni_list_next = ni->ni_list_next;
++ }
++
++ if(ni->ni_list_next == NULL)
++ {
++ /* Last in list so fix list tail */
++ nt->nt_node_last = ni->ni_list_prev;
++ }
++ else
++ {
++ ni->ni_list_next->ni_list_prev = ni->ni_list_prev;
++ }
++
++ if(ni->ni_hash_prev == NULL)
++ {
++ /* First in list so fix the list head */
++ int hash;
++ hash = IEEE80211_NODE_HASH(ni->ni_macaddr);
++ nt->nt_hash[hash] = ni->ni_hash_next;
++ }
++ else
++ {
++ ni->ni_hash_prev->ni_hash_next = ni->ni_hash_next;
++ }
++
++ if(ni->ni_hash_next != NULL)
++ {
++ ni->ni_hash_next->ni_hash_prev = ni->ni_hash_prev;
++ }
++ wlan_node_free(ni);
++
++ IEEE80211_NODE_UNLOCK(nt);
++}
++
++static void
++wlan_node_dec_free(bss_t *ni)
++{
++ if (ieee80211_node_dectestref(ni)) {
++ wlan_node_free(ni);
++ }
++}
++
++void
++wlan_free_allnodes(struct ieee80211_node_table *nt)
++{
++ bss_t *ni;
++
++ while ((ni = nt->nt_node_first) != NULL) {
++ wlan_node_reclaim(nt, ni);
++ }
++}
++
++void
++wlan_iterate_nodes(struct ieee80211_node_table *nt, wlan_node_iter_func *f,
++ void *arg)
++{
++ bss_t *ni;
++ A_UINT32 gen;
++
++ gen = ++nt->nt_scangen;
++
++ IEEE80211_NODE_LOCK(nt);
++ for (ni = nt->nt_node_first; ni; ni = ni->ni_list_next) {
++ if (ni->ni_scangen != gen) {
++ ni->ni_scangen = gen;
++ (void) ieee80211_node_incref(ni);
++ (*f)(arg, ni);
++ wlan_node_dec_free(ni);
++ }
++ }
++ IEEE80211_NODE_UNLOCK(nt);
++}
++
++/*
++ * Node table support.
++ */
++void
++wlan_node_table_init(void *wmip, struct ieee80211_node_table *nt)
++{
++ int i;
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_WLAN, ("node table = 0x%x\n", (A_UINT32)nt));
++ IEEE80211_NODE_LOCK_INIT(nt);
++
++ nt->nt_node_first = nt->nt_node_last = NULL;
++ for(i = 0; i < IEEE80211_NODE_HASHSIZE; i++)
++ {
++ nt->nt_hash[i] = NULL;
++ }
++ A_INIT_TIMER(&nt->nt_inact_timer, wlan_node_timeout, nt);
++ nt->isTimerArmed = FALSE;
++ nt->nt_wmip = wmip;
++}
++
++static void
++wlan_node_timeout(A_ATH_TIMER arg)
++{
++ struct ieee80211_node_table *nt = (struct ieee80211_node_table *)arg;
++ bss_t *bss, *nextBss;
++ A_UINT8 myBssid[IEEE80211_ADDR_LEN], reArmTimer = FALSE;
++
++ wmi_get_current_bssid(nt->nt_wmip, myBssid);
++
++ bss = nt->nt_node_first;
++ while (bss != NULL)
++ {
++ nextBss = bss->ni_list_next;
++ if (A_MEMCMP(myBssid, bss->ni_macaddr, sizeof(myBssid)) != 0)
++ {
++
++ if (bss->ni_tstamp <= A_GET_MS(0))
++ {
++ /*
++ * free up all but the current bss - if set
++ */
++ wlan_node_reclaim(nt, bss);
++ }
++ else
++ {
++ /*
++ * Re-arm timer, only when we have a bss other than
++ * current bss AND it is not aged-out.
++ */
++ reArmTimer = TRUE;
++ }
++ }
++ bss = nextBss;
++ }
++
++ if(reArmTimer)
++ A_TIMEOUT_MS(&nt->nt_inact_timer, WLAN_NODE_INACT_TIMEOUT_MSEC, 0);
++
++ nt->isTimerArmed = reArmTimer;
++}
++
++void
++wlan_node_table_cleanup(struct ieee80211_node_table *nt)
++{
++ A_UNTIMEOUT(&nt->nt_inact_timer);
++ A_DELETE_TIMER(&nt->nt_inact_timer);
++ wlan_free_allnodes(nt);
++ IEEE80211_NODE_LOCK_DESTROY(nt);
++}
++
++bss_t *
++wlan_find_Ssidnode (struct ieee80211_node_table *nt, A_UCHAR *pSsid,
++ A_UINT32 ssidLength, A_BOOL bIsWPA2)
++{
++ bss_t *ni = NULL;
++ A_UCHAR *pIESsid = NULL;
++
++ IEEE80211_NODE_LOCK (nt);
++
++ for (ni = nt->nt_node_first; ni; ni = ni->ni_list_next) {
++ pIESsid = ni->ni_cie.ie_ssid;
++ if (pIESsid[1] <= 32) {
++
++ // Step 1 : Check SSID
++ if (0x00 == memcmp (pSsid, &pIESsid[2], ssidLength)) {
++
++ // Step 2 : if SSID matches, check WPA or WPA2
++ if (TRUE == bIsWPA2 && NULL != ni->ni_cie.ie_rsn) {
++ ieee80211_node_incref (ni); /* mark referenced */
++ IEEE80211_NODE_UNLOCK (nt);
++ return ni;
++ }
++ if (FALSE == bIsWPA2 && NULL != ni->ni_cie.ie_wpa) {
++ ieee80211_node_incref(ni); /* mark referenced */
++ IEEE80211_NODE_UNLOCK (nt);
++ return ni;
++ }
++ }
++ }
++ }
++
++ IEEE80211_NODE_UNLOCK (nt);
++
++ return NULL;
++}
++
++void
++wlan_node_return (struct ieee80211_node_table *nt, bss_t *ni)
++{
++ IEEE80211_NODE_LOCK (nt);
++ wlan_node_dec_free (ni);
++ IEEE80211_NODE_UNLOCK (nt);
++}
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wlan/wlan_recv_beacon.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wlan/wlan_recv_beacon.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,192 @@
++/*-
++ * Copyright (c) 2001 Atsushi Onoe
++ * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions
++ * are met:
++ * 1. Redistributions of source code must retain the above copyright
++ * notice, this list of conditions and the following disclaimer.
++ * 2. Redistributions in binary form must reproduce the above copyright
++ * notice, this list of conditions and the following disclaimer in the
++ * documentation and/or other materials provided with the distribution.
++ * 3. The name of the author may not be used to endorse or promote products
++ * derived from this software without specific prior written permission.
++ *
++ * Alternatively, this software may be distributed under the terms of the
++ * GNU General Public License ("GPL") version 2 as published by the Free
++ * Software Foundation.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
++ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
++ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ */
++/*
++ * IEEE 802.11 input handling.
++ */
++
++#include "a_config.h"
++#include "athdefs.h"
++#include "a_types.h"
++#include "a_osapi.h"
++#include <wmi.h>
++#include <ieee80211.h>
++#include <wlan_api.h>
++
++#define IEEE80211_VERIFY_LENGTH(_len, _minlen) do { \
++ if ((_len) < (_minlen)) { \
++ return A_EINVAL; \
++ } \
++} while (0)
++
++#define IEEE80211_VERIFY_ELEMENT(__elem, __maxlen) do { \
++ if ((__elem) == NULL) { \
++ return A_EINVAL; \
++ } \
++ if ((__elem)[1] > (__maxlen)) { \
++ return A_EINVAL; \
++ } \
++} while (0)
++
++
++/* unaligned little endian access */
++#define LE_READ_2(p) \
++ ((A_UINT16) \
++ ((((A_UINT8 *)(p))[0] ) | (((A_UINT8 *)(p))[1] << 8)))
++
++#define LE_READ_4(p) \
++ ((A_UINT32) \
++ ((((A_UINT8 *)(p))[0] ) | (((A_UINT8 *)(p))[1] << 8) | \
++ (((A_UINT8 *)(p))[2] << 16) | (((A_UINT8 *)(p))[3] << 24)))
++
++
++static int __inline
++iswpaoui(const A_UINT8 *frm)
++{
++ return frm[1] > 3 && LE_READ_4(frm+2) == ((WPA_OUI_TYPE<<24)|WPA_OUI);
++}
++
++static int __inline
++iswmmoui(const A_UINT8 *frm)
++{
++ return frm[1] > 3 && LE_READ_4(frm+2) == ((WMM_OUI_TYPE<<24)|WMM_OUI);
++}
++
++static int __inline
++iswmmparam(const A_UINT8 *frm)
++{
++ return frm[1] > 5 && frm[6] == WMM_PARAM_OUI_SUBTYPE;
++}
++
++static int __inline
++iswmminfo(const A_UINT8 *frm)
++{
++ return frm[1] > 5 && frm[6] == WMM_INFO_OUI_SUBTYPE;
++}
++
++static int __inline
++isatherosoui(const A_UINT8 *frm)
++{
++ return frm[1] > 3 && LE_READ_4(frm+2) == ((ATH_OUI_TYPE<<24)|ATH_OUI);
++}
++
++static int __inline
++iswscoui(const A_UINT8 *frm)
++{
++ return frm[1] > 3 && LE_READ_4(frm+2) == ((0x04<<24)|WPA_OUI);
++}
++
++A_STATUS
++wlan_parse_beacon(A_UINT8 *buf, int framelen, struct ieee80211_common_ie *cie)
++{
++ A_UINT8 *frm, *efrm;
++
++ frm = buf;
++ efrm = (A_UINT8 *) (frm + framelen);
++
++ /*
++ * beacon/probe response frame format
++ * [8] time stamp
++ * [2] beacon interval
++ * [2] capability information
++ * [tlv] ssid
++ * [tlv] supported rates
++ * [tlv] country information
++ * [tlv] parameter set (FH/DS)
++ * [tlv] erp information
++ * [tlv] extended supported rates
++ * [tlv] WMM
++ * [tlv] WPA or RSN
++ * [tlv] Atheros Advanced Capabilities
++ */
++ IEEE80211_VERIFY_LENGTH(efrm - frm, 12);
++ A_MEMZERO(cie, sizeof(*cie));
++
++ cie->ie_tstamp = frm; frm += 8;
++ cie->ie_beaconInt = A_LE2CPU16(*(A_UINT16 *)frm); frm += 2;
++ cie->ie_capInfo = A_LE2CPU16(*(A_UINT16 *)frm); frm += 2;
++ cie->ie_chan = 0;
++
++ while (frm < efrm) {
++ switch (*frm) {
++ case IEEE80211_ELEMID_SSID:
++ cie->ie_ssid = frm;
++ break;
++ case IEEE80211_ELEMID_RATES:
++ cie->ie_rates = frm;
++ break;
++ case IEEE80211_ELEMID_COUNTRY:
++ cie->ie_country = frm;
++ break;
++ case IEEE80211_ELEMID_FHPARMS:
++ break;
++ case IEEE80211_ELEMID_DSPARMS:
++ cie->ie_chan = frm[2];
++ break;
++ case IEEE80211_ELEMID_TIM:
++ cie->ie_tim = frm;
++ break;
++ case IEEE80211_ELEMID_IBSSPARMS:
++ break;
++ case IEEE80211_ELEMID_XRATES:
++ cie->ie_xrates = frm;
++ break;
++ case IEEE80211_ELEMID_ERP:
++ if (frm[1] != 1) {
++ //A_PRINTF("Discarding ERP Element - Bad Len\n");
++ return A_EINVAL;
++ }
++ cie->ie_erp = frm[2];
++ break;
++ case IEEE80211_ELEMID_RSN:
++ cie->ie_rsn = frm;
++ break;
++ case IEEE80211_ELEMID_VENDOR:
++ if (iswpaoui(frm)) {
++ cie->ie_wpa = frm;
++ } else if (iswmmoui(frm)) {
++ cie->ie_wmm = frm;
++ } else if (isatherosoui(frm)) {
++ cie->ie_ath = frm;
++ } else if(iswscoui(frm)) {
++ cie->ie_wsc = frm;
++ }
++ break;
++ default:
++ break;
++ }
++ frm += frm[1] + 2;
++ }
++ IEEE80211_VERIFY_ELEMENT(cie->ie_rates, IEEE80211_RATE_MAXSIZE);
++ IEEE80211_VERIFY_ELEMENT(cie->ie_ssid, IEEE80211_NWID_LEN);
++
++ return A_OK;
++}
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wlan/wlan_utils.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wlan/wlan_utils.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,59 @@
++/*
++ * Copyright (c) 2004-2005 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * This module implements frequently used wlan utilies
++ *
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/wlan/src/wlan_utils.c#1 $
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include <a_config.h>
++#include <athdefs.h>
++#include <a_types.h>
++#include <a_osapi.h>
++
++/*
++ * converts ieee channel number to frequency
++ */
++A_UINT16
++wlan_ieee2freq(int chan)
++{
++ if (chan == 14) {
++ return 2484;
++ }
++ if (chan < 14) { /* 0-13 */
++ return (2407 + (chan*5));
++ }
++ if (chan < 27) { /* 15-26 */
++ return (2512 + ((chan-15)*20));
++ }
++ return (5000 + (chan*5));
++}
++
++/*
++ * Converts MHz frequency to IEEE channel number.
++ */
++A_UINT32
++wlan_freq2ieee(A_UINT16 freq)
++{
++ if (freq == 2484)
++ return 14;
++ if (freq < 2484)
++ return (freq - 2407) / 5;
++ if (freq < 5000)
++ return 15 + ((freq - 2512) / 20);
++ return (freq - 5000) / 5;
++}
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wmi/wmi.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wmi/wmi.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,3954 @@
++/*
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * This module implements the hardware independent layer of the
++ * Wireless Module Interface (WMI) protocol.
++ *
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/wmi/wmi.c#3 $
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#include <a_config.h>
++#include <athdefs.h>
++#include <a_types.h>
++#include <a_osapi.h>
++#include "htc.h"
++#include "htc_api.h"
++#include "wmi.h"
++#include <ieee80211.h>
++#include <ieee80211_node.h>
++#include <wlan_api.h>
++#include <wmi_api.h>
++#include "dset_api.h"
++#include "gpio_api.h"
++#include "wmi_host.h"
++#include "a_drv.h"
++#include "a_drv_api.h"
++#include "a_debug.h"
++#include "dbglog_api.h"
++
++static A_STATUS wmi_ready_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++
++static A_STATUS wmi_connect_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++static A_STATUS wmi_disconnect_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++static A_STATUS wmi_tkip_micerr_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++static A_STATUS wmi_bssInfo_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++static A_STATUS wmi_opt_frame_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++static A_STATUS wmi_pstream_timeout_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++static A_STATUS wmi_sync_point(struct wmi_t *wmip);
++
++static A_STATUS wmi_bitrate_reply_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++static A_STATUS wmi_ratemask_reply_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++static A_STATUS wmi_channelList_reply_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++static A_STATUS wmi_regDomain_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++static A_STATUS wmi_txPwr_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++static A_STATUS wmi_neighborReport_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++
++static A_STATUS wmi_dset_open_req_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++#ifdef CONFIG_HOST_DSET_SUPPORT
++static A_STATUS wmi_dset_close_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++static A_STATUS wmi_dset_data_req_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++#endif /* CONFIG_HOST_DSET_SUPPORT */
++
++
++static A_STATUS wmi_scanComplete_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++static A_STATUS wmi_errorEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++static A_STATUS wmi_statsEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++static A_STATUS wmi_rssiThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++static A_STATUS wmi_hbChallengeResp_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++static A_STATUS wmi_reportErrorEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++static A_STATUS wmi_cac_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++static A_STATUS wmi_roam_tbl_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++static A_STATUS wmi_roam_data_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++static A_STATUS wmi_get_wow_list_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
++ int len);
++static A_STATUS
++wmi_get_pmkid_list_event_rx(struct wmi_t *wmip, A_UINT8 *datap, A_UINT32 len);
++
++#ifdef CONFIG_HOST_GPIO_SUPPORT
++static A_STATUS wmi_gpio_intr_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++static A_STATUS wmi_gpio_data_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++static A_STATUS wmi_gpio_ack_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++#endif /* CONFIG_HOST_GPIO_SUPPORT */
++
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++static A_STATUS
++wmi_tcmd_test_report_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++#endif
++
++static A_STATUS
++wmi_txRetryErrEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++
++static A_STATUS
++wmi_snrThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++
++static A_STATUS
++wmi_lqThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++
++static A_BOOL
++wmi_is_bitrate_index_valid(struct wmi_t *wmip, A_UINT32 rateIndex);
++
++static A_STATUS
++wmi_aplistEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++
++static A_STATUS
++wmi_dbglog_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++
++static A_STATUS wmi_keepalive_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
++
++int wps_enable;
++static const A_INT32 wmi_rateTable[] = {
++ 1000,
++ 2000,
++ 5500,
++ 11000,
++ 6000,
++ 9000,
++ 12000,
++ 18000,
++ 24000,
++ 36000,
++ 48000,
++ 54000,
++ 0};
++
++#define MODE_A_SUPPORT_RATE_START 4
++#define MODE_A_SUPPORT_RATE_STOP 11
++
++#define MODE_GONLY_SUPPORT_RATE_START MODE_A_SUPPORT_RATE_START
++#define MODE_GONLY_SUPPORT_RATE_STOP MODE_A_SUPPORT_RATE_STOP
++
++#define MODE_B_SUPPORT_RATE_START 0
++#define MODE_B_SUPPORT_RATE_STOP 3
++
++#define MODE_G_SUPPORT_RATE_START 0
++#define MODE_G_SUPPORT_RATE_STOP 11
++
++#define MAX_NUMBER_OF_SUPPORT_RATES (MODE_G_SUPPORT_RATE_STOP + 1)
++
++/* 802.1d to AC mapping. Refer pg 57 of WMM-test-plan-v1.2 */
++const A_UINT8 up_to_ac[]= {
++ WMM_AC_BE,
++ WMM_AC_BK,
++ WMM_AC_BK,
++ WMM_AC_BE,
++ WMM_AC_VI,
++ WMM_AC_VI,
++ WMM_AC_VO,
++ WMM_AC_VO,
++ };
++
++void *
++wmi_init(void *devt)
++{
++ struct wmi_t *wmip;
++
++ wmip = A_MALLOC(sizeof(struct wmi_t));
++ if (wmip == NULL) {
++ return (NULL);
++ }
++ A_MEMZERO(wmip, sizeof(*wmip));
++ A_MUTEX_INIT(&wmip->wmi_lock);
++ wmip->wmi_devt = devt;
++ wlan_node_table_init(wmip, &wmip->wmi_scan_table);
++ wmi_qos_state_init(wmip);
++ wmip->wmi_powerMode = REC_POWER;
++ wmip->wmi_phyMode = WMI_11G_MODE;
++
++ return (wmip);
++}
++
++void
++wmi_qos_state_init(struct wmi_t *wmip)
++{
++ A_UINT8 i;
++
++ if (wmip == NULL) {
++ return;
++ }
++ LOCK_WMI(wmip);
++
++ /* Initialize QoS States */
++ wmip->wmi_numQoSStream = 0;
++
++ wmip->wmi_fatPipeExists = 0;
++
++ for (i=0; i < WMM_NUM_AC; i++) {
++ wmip->wmi_streamExistsForAC[i]=0;
++ }
++
++ /* Initialize the static Wmi stream Pri to WMM AC mappings Arrays */
++ WMI_INIT_WMISTREAM_AC_MAP(wmip);
++
++ UNLOCK_WMI(wmip);
++
++ A_WMI_SET_NUMDATAENDPTS(wmip->wmi_devt, 1);
++}
++
++void
++wmi_shutdown(struct wmi_t *wmip)
++{
++ if (wmip != NULL) {
++ wlan_node_table_cleanup(&wmip->wmi_scan_table);
++ if (A_IS_MUTEX_VALID(&wmip->wmi_lock)) {
++ A_MUTEX_DELETE(&wmip->wmi_lock);
++ }
++ A_FREE(wmip);
++ }
++}
++
++/*
++ * performs DIX to 802.3 encapsulation for transmit packets.
++ * uses passed in buffer. Returns buffer or NULL if failed.
++ * Assumes the entire DIX header is contigous and that there is
++ * enough room in the buffer for a 802.3 mac header and LLC+SNAP headers.
++ */
++A_STATUS
++wmi_dix_2_dot3(struct wmi_t *wmip, void *osbuf)
++{
++ A_UINT8 *datap;
++ A_UINT16 typeorlen;
++ ATH_MAC_HDR macHdr;
++ ATH_LLC_SNAP_HDR *llcHdr;
++
++ A_ASSERT(osbuf != NULL);
++
++ if (A_NETBUF_HEADROOM(osbuf) <
++ (sizeof(ATH_LLC_SNAP_HDR) + sizeof(WMI_DATA_HDR)))
++ {
++ return A_NO_MEMORY;
++ }
++
++ datap = A_NETBUF_DATA(osbuf);
++
++ typeorlen = *(A_UINT16 *)(datap + ATH_MAC_LEN + ATH_MAC_LEN);
++
++ if (!IS_ETHERTYPE(A_BE2CPU16(typeorlen))) {
++ /*
++ * packet is already in 802.3 format - return success
++ */
++ A_DPRINTF(DBG_WMI, (DBGFMT "packet already 802.3\n", DBGARG));
++ return (A_OK);
++ }
++
++ /*
++ * Save mac fields and length to be inserted later
++ */
++ A_MEMCPY(macHdr.dstMac, datap, ATH_MAC_LEN);
++ A_MEMCPY(macHdr.srcMac, datap + ATH_MAC_LEN, ATH_MAC_LEN);
++ macHdr.typeOrLen = A_CPU2BE16(A_NETBUF_LEN(osbuf) - sizeof(ATH_MAC_HDR) +
++ sizeof(ATH_LLC_SNAP_HDR));
++
++ /*
++ * Make room for LLC+SNAP headers
++ */
++ if (A_NETBUF_PUSH(osbuf, sizeof(ATH_LLC_SNAP_HDR)) != A_OK) {
++ return A_NO_MEMORY;
++ }
++
++ datap = A_NETBUF_DATA(osbuf);
++
++ A_MEMCPY(datap, &macHdr, sizeof (ATH_MAC_HDR));
++
++ llcHdr = (ATH_LLC_SNAP_HDR *)(datap + sizeof(ATH_MAC_HDR));
++ llcHdr->dsap = 0xAA;
++ llcHdr->ssap = 0xAA;
++ llcHdr->cntl = 0x03;
++ llcHdr->orgCode[0] = 0x0;
++ llcHdr->orgCode[1] = 0x0;
++ llcHdr->orgCode[2] = 0x0;
++ llcHdr->etherType = typeorlen;
++
++ return (A_OK);
++}
++
++/*
++ * Adds a WMI data header
++ * Assumes there is enough room in the buffer to add header.
++ */
++A_STATUS
++wmi_data_hdr_add(struct wmi_t *wmip, void *osbuf, A_UINT8 msgType)
++{
++ WMI_DATA_HDR *dtHdr;
++
++ A_ASSERT(osbuf != NULL);
++
++ if (A_NETBUF_PUSH(osbuf, sizeof(WMI_DATA_HDR)) != A_OK) {
++ return A_NO_MEMORY;
++ }
++
++ dtHdr = (WMI_DATA_HDR *)A_NETBUF_DATA(osbuf);
++ dtHdr->info = msgType;
++ dtHdr->rssi = 0;
++
++ return (A_OK);
++}
++
++A_UINT8 wmi_implicit_create_pstream(struct wmi_t *wmip, void *osbuf, A_UINT8 dir, A_UINT8 up)
++{
++ A_UINT8 *datap;
++ A_UINT8 trafficClass = WMM_AC_BE, userPriority = up;
++ ATH_LLC_SNAP_HDR *llcHdr;
++ A_UINT16 ipType = IP_ETHERTYPE;
++ WMI_DATA_HDR *dtHdr;
++ WMI_CREATE_PSTREAM_CMD cmd;
++ A_BOOL streamExists = FALSE;
++
++ A_ASSERT(osbuf != NULL);
++
++ datap = A_NETBUF_DATA(osbuf);
++
++ if (up == UNDEFINED_PRI) {
++ llcHdr = (ATH_LLC_SNAP_HDR *)(datap + sizeof(WMI_DATA_HDR) +
++ sizeof(ATH_MAC_HDR));
++
++ if (llcHdr->etherType == A_CPU2BE16(ipType)) {
++ /* Extract the endpoint info from the TOS field in the IP header */
++ userPriority = A_WMI_IPTOS_TO_USERPRIORITY(((A_UINT8 *)llcHdr) + sizeof(ATH_LLC_SNAP_HDR));
++ }
++ }
++
++ if (userPriority < MAX_NUM_PRI) {
++ trafficClass = convert_userPriority_to_trafficClass(userPriority);
++ }
++
++ dtHdr = (WMI_DATA_HDR *)datap;
++ if(dir==UPLINK_TRAFFIC)
++ dtHdr->info |= (userPriority & WMI_DATA_HDR_UP_MASK) << WMI_DATA_HDR_UP_SHIFT; /* lower 3-bits are 802.1d priority */
++
++ LOCK_WMI(wmip);
++ streamExists = wmip->wmi_fatPipeExists;
++ UNLOCK_WMI(wmip);
++
++ if (!(streamExists & (1 << trafficClass))) {
++
++ A_MEMZERO(&cmd, sizeof(cmd));
++ cmd.trafficClass = trafficClass;
++ cmd.userPriority = userPriority;
++ cmd.inactivityInt = WMI_IMPLICIT_PSTREAM_INACTIVITY_INT;
++ /* Implicit streams are created with TSID 0xFF */
++ cmd.tsid = WMI_IMPLICIT_PSTREAM;
++ wmi_create_pstream_cmd(wmip, &cmd);
++ }
++
++ return trafficClass;
++}
++
++WMI_PRI_STREAM_ID
++wmi_get_stream_id(struct wmi_t *wmip, A_UINT8 trafficClass)
++{
++ return WMI_ACCESSCATEGORY_WMISTREAM(wmip, trafficClass);
++}
++
++/*
++ * performs 802.3 to DIX encapsulation for received packets.
++ * Assumes the entire 802.3 header is contigous.
++ */
++A_STATUS
++wmi_dot3_2_dix(struct wmi_t *wmip, void *osbuf)
++{
++ A_UINT8 *datap;
++ ATH_MAC_HDR macHdr;
++ ATH_LLC_SNAP_HDR *llcHdr;
++
++ A_ASSERT(osbuf != NULL);
++ datap = A_NETBUF_DATA(osbuf);
++
++ A_MEMCPY(&macHdr, datap, sizeof(ATH_MAC_HDR));
++ llcHdr = (ATH_LLC_SNAP_HDR *)(datap + sizeof(ATH_MAC_HDR));
++ macHdr.typeOrLen = llcHdr->etherType;
++
++ if (A_NETBUF_PULL(osbuf, sizeof(ATH_LLC_SNAP_HDR)) != A_OK) {
++ return A_NO_MEMORY;
++ }
++
++ datap = A_NETBUF_DATA(osbuf);
++
++ A_MEMCPY(datap, &macHdr, sizeof (ATH_MAC_HDR));
++
++ return (A_OK);
++}
++
++/*
++ * Removes a WMI data header
++ */
++A_STATUS
++wmi_data_hdr_remove(struct wmi_t *wmip, void *osbuf)
++{
++ A_ASSERT(osbuf != NULL);
++
++ return (A_NETBUF_PULL(osbuf, sizeof(WMI_DATA_HDR)));
++}
++
++void
++wmi_iterate_nodes(struct wmi_t *wmip, wlan_node_iter_func *f, void *arg)
++{
++ wlan_iterate_nodes(&wmip->wmi_scan_table, f, arg);
++}
++
++/*
++ * WMI Extended Event received from Target.
++ */
++A_STATUS
++wmi_control_rx_xtnd(struct wmi_t *wmip, void *osbuf)
++{
++ WMIX_CMD_HDR *cmd;
++ A_UINT16 id;
++ A_UINT8 *datap;
++ A_UINT32 len;
++ A_STATUS status = A_OK;
++
++ if (A_NETBUF_LEN(osbuf) < sizeof(WMIX_CMD_HDR)) {
++ A_DPRINTF(DBG_WMI, (DBGFMT "bad packet 1\n", DBGARG));
++ wmip->wmi_stats.cmd_len_err++;
++ A_NETBUF_FREE(osbuf);
++ return A_ERROR;
++ }
++
++ cmd = (WMIX_CMD_HDR *)A_NETBUF_DATA(osbuf);
++ id = cmd->commandId;
++
++ if (A_NETBUF_PULL(osbuf, sizeof(WMIX_CMD_HDR)) != A_OK) {
++ A_DPRINTF(DBG_WMI, (DBGFMT "bad packet 2\n", DBGARG));
++ wmip->wmi_stats.cmd_len_err++;
++ A_NETBUF_FREE(osbuf);
++ return A_ERROR;
++ }
++
++ datap = A_NETBUF_DATA(osbuf);
++ len = A_NETBUF_LEN(osbuf);
++
++ switch (id) {
++ case (WMIX_DSETOPENREQ_EVENTID):
++ status = wmi_dset_open_req_rx(wmip, datap, len);
++ break;
++#ifdef CONFIG_HOST_DSET_SUPPORT
++ case (WMIX_DSETCLOSE_EVENTID):
++ status = wmi_dset_close_rx(wmip, datap, len);
++ break;
++ case (WMIX_DSETDATAREQ_EVENTID):
++ status = wmi_dset_data_req_rx(wmip, datap, len);
++ break;
++#endif /* CONFIG_HOST_DSET_SUPPORT */
++#ifdef CONFIG_HOST_GPIO_SUPPORT
++ case (WMIX_GPIO_INTR_EVENTID):
++ wmi_gpio_intr_rx(wmip, datap, len);
++ break;
++ case (WMIX_GPIO_DATA_EVENTID):
++ wmi_gpio_data_rx(wmip, datap, len);
++ break;
++ case (WMIX_GPIO_ACK_EVENTID):
++ wmi_gpio_ack_rx(wmip, datap, len);
++ break;
++#endif /* CONFIG_HOST_GPIO_SUPPORT */
++ case (WMIX_HB_CHALLENGE_RESP_EVENTID):
++ wmi_hbChallengeResp_rx(wmip, datap, len);
++ break;
++ case (WMIX_DBGLOG_EVENTID):
++ wmi_dbglog_event_rx(wmip, datap, len);
++ break;
++ default:
++ A_DPRINTF(DBG_WMI|DBG_ERROR,
++ (DBGFMT "Unknown id 0x%x\n", DBGARG, id));
++ wmip->wmi_stats.cmd_id_err++;
++ status = A_ERROR;
++ break;
++ }
++
++ return status;
++}
++
++/*
++ * Control Path
++ */
++A_UINT32 cmdRecvNum;
++
++A_STATUS
++wmi_control_rx(struct wmi_t *wmip, void *osbuf)
++{
++ WMI_CMD_HDR *cmd;
++ A_UINT16 id;
++ A_UINT8 *datap;
++ A_UINT32 len, i, loggingReq;
++ A_STATUS status = A_OK;
++
++ A_ASSERT(osbuf != NULL);
++ if (A_NETBUF_LEN(osbuf) < sizeof(WMI_CMD_HDR)) {
++ A_DPRINTF(DBG_WMI, (DBGFMT "bad packet 1\n", DBGARG));
++ wmip->wmi_stats.cmd_len_err++;
++ A_NETBUF_FREE(osbuf);
++ return A_ERROR;
++ }
++
++ cmd = (WMI_CMD_HDR *)A_NETBUF_DATA(osbuf);
++ id = cmd->commandId;
++
++ if (A_NETBUF_PULL(osbuf, sizeof(WMI_CMD_HDR)) != A_OK) {
++ A_DPRINTF(DBG_WMI, (DBGFMT "bad packet 2\n", DBGARG));
++ wmip->wmi_stats.cmd_len_err++;
++ A_NETBUF_FREE(osbuf);
++ return A_ERROR;
++ }
++
++ datap = A_NETBUF_DATA(osbuf);
++ len = A_NETBUF_LEN(osbuf);
++
++ ar6000_get_driver_cfg(wmip->wmi_devt,
++ AR6000_DRIVER_CFG_LOG_RAW_WMI_MSGS,
++ &loggingReq);
++
++ if(loggingReq) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("WMI %d \n",id));
++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("WMI recv, MsgNo %d : ", cmdRecvNum));
++ for(i = 0; i < len; i++)
++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("%x ", datap[i]));
++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("\n"));
++ }
++
++ LOCK_WMI(wmip);
++ cmdRecvNum++;
++ UNLOCK_WMI(wmip);
++
++ switch (id) {
++ case (WMI_GET_BITRATE_CMDID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_BITRATE_CMDID\n", DBGARG));
++ status = wmi_bitrate_reply_rx(wmip, datap, len);
++ break;
++ case (WMI_GET_CHANNEL_LIST_CMDID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_CHANNEL_LIST_CMDID\n", DBGARG));
++ status = wmi_channelList_reply_rx(wmip, datap, len);
++ break;
++ case (WMI_GET_TX_PWR_CMDID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_TX_PWR_CMDID\n", DBGARG));
++ status = wmi_txPwr_reply_rx(wmip, datap, len);
++ break;
++ case (WMI_READY_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_READY_EVENTID\n", DBGARG));
++ status = wmi_ready_event_rx(wmip, datap, len);
++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
++ A_WMI_DBGLOG_INIT_DONE(wmip->wmi_devt);
++ break;
++ case (WMI_CONNECT_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_CONNECT_EVENTID\n", DBGARG));
++ status = wmi_connect_event_rx(wmip, datap, len);
++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
++ break;
++ case (WMI_DISCONNECT_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_DISCONNECT_EVENTID\n", DBGARG));
++ status = wmi_disconnect_event_rx(wmip, datap, len);
++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
++ break;
++ case (WMI_TKIP_MICERR_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_TKIP_MICERR_EVENTID\n", DBGARG));
++ status = wmi_tkip_micerr_event_rx(wmip, datap, len);
++ break;
++ case (WMI_BSSINFO_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_BSSINFO_EVENTID\n", DBGARG));
++ status = wmi_bssInfo_event_rx(wmip, datap, len);
++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
++ break;
++ case (WMI_REGDOMAIN_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_REGDOMAIN_EVENTID\n", DBGARG));
++ status = wmi_regDomain_event_rx(wmip, datap, len);
++ break;
++ case (WMI_PSTREAM_TIMEOUT_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_PSTREAM_TIMEOUT_EVENTID\n", DBGARG));
++ status = wmi_pstream_timeout_event_rx(wmip, datap, len);
++ /* pstreams are fatpipe abstractions that get implicitly created.
++ * User apps only deal with thinstreams. creation of a thinstream
++ * by the user or data traffic flow in an AC triggers implicit
++ * pstream creation. Do we need to send this event to App..?
++ * no harm in sending it.
++ */
++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
++ break;
++ case (WMI_NEIGHBOR_REPORT_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_NEIGHBOR_REPORT_EVENTID\n", DBGARG));
++ status = wmi_neighborReport_event_rx(wmip, datap, len);
++ break;
++ case (WMI_SCAN_COMPLETE_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_SCAN_COMPLETE_EVENTID\n", DBGARG));
++ status = wmi_scanComplete_rx(wmip, datap, len);
++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
++ break;
++ case (WMI_CMDERROR_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_CMDERROR_EVENTID\n", DBGARG));
++ status = wmi_errorEvent_rx(wmip, datap, len);
++ break;
++ case (WMI_REPORT_STATISTICS_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_REPORT_STATISTICS_EVENTID\n", DBGARG));
++ status = wmi_statsEvent_rx(wmip, datap, len);
++ break;
++ case (WMI_RSSI_THRESHOLD_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_RSSI_THRESHOLD_EVENTID\n", DBGARG));
++ status = wmi_rssiThresholdEvent_rx(wmip, datap, len);
++ break;
++ case (WMI_ERROR_REPORT_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_ERROR_REPORT_EVENTID\n", DBGARG));
++ status = wmi_reportErrorEvent_rx(wmip, datap, len);
++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
++ break;
++ case (WMI_OPT_RX_FRAME_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_OPT_RX_FRAME_EVENTID\n", DBGARG));
++ status = wmi_opt_frame_event_rx(wmip, datap, len);
++ break;
++ case (WMI_REPORT_ROAM_TBL_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_REPORT_ROAM_TBL_EVENTID\n", DBGARG));
++ status = wmi_roam_tbl_event_rx(wmip, datap, len);
++ break;
++ case (WMI_EXTENSION_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_EXTENSION_EVENTID\n", DBGARG));
++ status = wmi_control_rx_xtnd(wmip, osbuf);
++ break;
++ case (WMI_CAC_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_CAC_EVENTID\n", DBGARG));
++ status = wmi_cac_event_rx(wmip, datap, len);
++ break;
++ case (WMI_REPORT_ROAM_DATA_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_REPORT_ROAM_DATA_EVENTID\n", DBGARG));
++ status = wmi_roam_data_event_rx(wmip, datap, len);
++ break;
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++ case (WMI_TEST_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_TEST_EVENTID\n", DBGARG));
++ status = wmi_tcmd_test_report_rx(wmip, datap, len);
++ break;
++#endif
++ case (WMI_GET_FIXRATES_CMDID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_FIXRATES_CMDID\n", DBGARG));
++ status = wmi_ratemask_reply_rx(wmip, datap, len);
++ break;
++ case (WMI_TX_RETRY_ERR_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_TX_RETRY_ERR_EVENTID\n", DBGARG));
++ status = wmi_txRetryErrEvent_rx(wmip, datap, len);
++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
++ break;
++ case (WMI_SNR_THRESHOLD_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_SNR_THRESHOLD_EVENTID\n", DBGARG));
++ status = wmi_snrThresholdEvent_rx(wmip, datap, len);
++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
++ break;
++ case (WMI_LQ_THRESHOLD_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_LQ_THRESHOLD_EVENTID\n", DBGARG));
++ status = wmi_lqThresholdEvent_rx(wmip, datap, len);
++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
++ break;
++ case (WMI_APLIST_EVENTID):
++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Received APLIST Event\n"));
++ status = wmi_aplistEvent_rx(wmip, datap, len);
++ break;
++ case (WMI_GET_KEEPALIVE_CMDID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_KEEPALIVE_CMDID\n", DBGARG));
++ status = wmi_keepalive_reply_rx(wmip, datap, len);
++ break;
++ case (WMI_GET_WOW_LIST_EVENTID):
++ status = wmi_get_wow_list_event_rx(wmip, datap, len);
++ break;
++ case (WMI_GET_PMKID_LIST_EVENTID):
++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_PMKID_LIST Event\n", DBGARG));
++ status = wmi_get_pmkid_list_event_rx(wmip, datap, len);
++ break;
++ default:
++ A_DPRINTF(DBG_WMI|DBG_ERROR,
++ (DBGFMT "Unknown id 0x%x\n", DBGARG, id));
++ wmip->wmi_stats.cmd_id_err++;
++ status = A_ERROR;
++ break;
++ }
++
++ A_NETBUF_FREE(osbuf);
++
++ return status;
++}
++
++static A_STATUS
++wmi_ready_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_READY_EVENT *ev = (WMI_READY_EVENT *)datap;
++
++ if (len < sizeof(WMI_READY_EVENT)) {
++ return A_EINVAL;
++ }
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++ wmip->wmi_ready = TRUE;
++ A_WMI_READY_EVENT(wmip->wmi_devt, ev->macaddr, ev->phyCapability);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_connect_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_CONNECT_EVENT *ev;
++
++ if (len < sizeof(WMI_CONNECT_EVENT)) {
++ return A_EINVAL;
++ }
++ ev = (WMI_CONNECT_EVENT *)datap;
++ A_DPRINTF(DBG_WMI,
++ (DBGFMT "freq %d bssid %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
++ DBGARG, ev->channel,
++ ev->bssid[0], ev->bssid[1], ev->bssid[2],
++ ev->bssid[3], ev->bssid[4], ev->bssid[5]));
++
++ A_MEMCPY(wmip->wmi_bssid, ev->bssid, ATH_MAC_LEN);
++
++ A_WMI_CONNECT_EVENT(wmip->wmi_devt, ev->channel, ev->bssid,
++ ev->listenInterval, ev->beaconInterval,
++ ev->networkType, ev->beaconIeLen,
++ ev->assocReqLen, ev->assocRespLen,
++ ev->assocInfo);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_regDomain_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_REG_DOMAIN_EVENT *ev;
++
++ if (len < sizeof(*ev)) {
++ return A_EINVAL;
++ }
++ ev = (WMI_REG_DOMAIN_EVENT *)datap;
++
++ A_WMI_REGDOMAIN_EVENT(wmip->wmi_devt, ev->regDomain);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_neighborReport_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_NEIGHBOR_REPORT_EVENT *ev;
++ int numAps;
++
++ if (len < sizeof(*ev)) {
++ return A_EINVAL;
++ }
++ ev = (WMI_NEIGHBOR_REPORT_EVENT *)datap;
++ numAps = ev->numberOfAps;
++
++ if (len < (int)(sizeof(*ev) + ((numAps - 1) * sizeof(WMI_NEIGHBOR_INFO)))) {
++ return A_EINVAL;
++ }
++
++ A_WMI_NEIGHBORREPORT_EVENT(wmip->wmi_devt, numAps, ev->neighbor);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_disconnect_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_DISCONNECT_EVENT *ev;
++
++ if (len < sizeof(WMI_DISCONNECT_EVENT)) {
++ return A_EINVAL;
++ }
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ ev = (WMI_DISCONNECT_EVENT *)datap;
++
++ A_MEMZERO(wmip->wmi_bssid, sizeof(wmip->wmi_bssid));
++
++ A_WMI_DISCONNECT_EVENT(wmip->wmi_devt, ev->disconnectReason, ev->bssid,
++ ev->assocRespLen, ev->assocInfo, ev->protocolReasonStatus);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_tkip_micerr_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_TKIP_MICERR_EVENT *ev;
++
++ if (len < sizeof(*ev)) {
++ return A_EINVAL;
++ }
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ ev = (WMI_TKIP_MICERR_EVENT *)datap;
++ A_WMI_TKIP_MICERR_EVENT(wmip->wmi_devt, ev->keyid, ev->ismcast);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_bssInfo_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ bss_t *bss;
++ WMI_BSS_INFO_HDR *bih;
++ A_UINT8 *buf;
++ A_UINT32 nodeCachingAllowed;
++
++ if (len <= sizeof(WMI_BSS_INFO_HDR)) {
++ return A_EINVAL;
++ }
++
++ A_WMI_BSSINFO_EVENT_RX(wmip->wmi_devt, datap, len);
++ /* What is driver config for wlan node caching? */
++ if(ar6000_get_driver_cfg(wmip->wmi_devt,
++ AR6000_DRIVER_CFG_GET_WLANNODECACHING,
++ &nodeCachingAllowed) != A_OK) {
++ return A_EINVAL;
++ }
++
++ if(!nodeCachingAllowed) {
++ return A_OK;
++ }
++
++
++ bih = (WMI_BSS_INFO_HDR *)datap;
++ buf = datap + sizeof(WMI_BSS_INFO_HDR);
++ len -= sizeof(WMI_BSS_INFO_HDR);
++
++ A_DPRINTF(DBG_WMI2, (DBGFMT "bssInfo event - ch %u, rssi %02x, "
++ "bssid \"%02x:%02x:%02x:%02x:%02x:%02x\"\n", DBGARG,
++ bih->channel, (unsigned char) bih->rssi, bih->bssid[0],
++ bih->bssid[1], bih->bssid[2], bih->bssid[3], bih->bssid[4],
++ bih->bssid[5]));
++
++ if(wps_enable && (bih->frameType == PROBERESP_FTYPE) ) {
++ printk("%s() A_OK 2\n", __FUNCTION__);
++ return A_OK;
++ }
++
++ bss = wlan_find_node(&wmip->wmi_scan_table, bih->bssid);
++ if (bss != NULL) {
++ /*
++ * Free up the node. Not the most efficient process given
++ * we are about to allocate a new node but it is simple and should be
++ * adequate.
++ */
++ wlan_node_reclaim(&wmip->wmi_scan_table, bss);
++ }
++
++ bss = wlan_node_alloc(&wmip->wmi_scan_table, len);
++ if (bss == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ bss->ni_snr = bih->snr;
++ bss->ni_rssi = bih->rssi;
++ A_ASSERT(bss->ni_buf != NULL);
++ A_MEMCPY(bss->ni_buf, buf, len);
++
++ if (wlan_parse_beacon(bss->ni_buf, len, &bss->ni_cie) != A_OK) {
++ wlan_node_free(bss);
++ return A_EINVAL;
++ }
++
++ /*
++ * Update the frequency in ie_chan, overwriting of channel number
++ * which is done in wlan_parse_beacon
++ */
++ bss->ni_cie.ie_chan = bih->channel;
++ wlan_setup_node(&wmip->wmi_scan_table, bss, bih->bssid);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_opt_frame_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ bss_t *bss;
++ WMI_OPT_RX_INFO_HDR *bih;
++ A_UINT8 *buf;
++
++ if (len <= sizeof(WMI_OPT_RX_INFO_HDR)) {
++ return A_EINVAL;
++ }
++
++ bih = (WMI_OPT_RX_INFO_HDR *)datap;
++ buf = datap + sizeof(WMI_OPT_RX_INFO_HDR);
++ len -= sizeof(WMI_OPT_RX_INFO_HDR);
++
++ A_DPRINTF(DBG_WMI2, (DBGFMT "opt frame event %2.2x:%2.2x\n", DBGARG,
++ bih->bssid[4], bih->bssid[5]));
++
++ bss = wlan_find_node(&wmip->wmi_scan_table, bih->bssid);
++ if (bss != NULL) {
++ /*
++ * Free up the node. Not the most efficient process given
++ * we are about to allocate a new node but it is simple and should be
++ * adequate.
++ */
++ wlan_node_reclaim(&wmip->wmi_scan_table, bss);
++ }
++
++ bss = wlan_node_alloc(&wmip->wmi_scan_table, len);
++ if (bss == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ bss->ni_snr = bih->snr;
++ bss->ni_cie.ie_chan = bih->channel;
++ A_ASSERT(bss->ni_buf != NULL);
++ A_MEMCPY(bss->ni_buf, buf, len);
++ wlan_setup_node(&wmip->wmi_scan_table, bss, bih->bssid);
++
++ return A_OK;
++}
++
++ /* This event indicates inactivity timeout of a fatpipe(pstream)
++ * at the target
++ */
++static A_STATUS
++wmi_pstream_timeout_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_PSTREAM_TIMEOUT_EVENT *ev;
++
++ if (len < sizeof(WMI_PSTREAM_TIMEOUT_EVENT)) {
++ return A_EINVAL;
++ }
++
++ A_DPRINTF(DBG_WMI, (DBGFMT "wmi_pstream_timeout_event_rx\n", DBGARG));
++
++ ev = (WMI_PSTREAM_TIMEOUT_EVENT *)datap;
++
++ /* When the pstream (fat pipe == AC) timesout, it means there were no
++ * thinStreams within this pstream & it got implicitly created due to
++ * data flow on this AC. We start the inactivity timer only for
++ * implicitly created pstream. Just reset the host state.
++ */
++ /* Set the activeTsids for this AC to 0 */
++ LOCK_WMI(wmip);
++ wmip->wmi_streamExistsForAC[ev->trafficClass]=0;
++ wmip->wmi_fatPipeExists &= ~(1 << ev->trafficClass);
++ UNLOCK_WMI(wmip);
++
++ /*Indicate inactivity to driver layer for this fatpipe (pstream)*/
++ A_WMI_STREAM_TX_INACTIVE(wmip->wmi_devt, ev->trafficClass);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_bitrate_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_BIT_RATE_CMD *reply;
++ A_INT32 rate;
++
++ if (len < sizeof(WMI_BIT_RATE_CMD)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_BIT_RATE_CMD *)datap;
++ A_DPRINTF(DBG_WMI,
++ (DBGFMT "Enter - rateindex %d\n", DBGARG, reply->rateIndex));
++
++ if (reply->rateIndex == RATE_AUTO) {
++ rate = RATE_AUTO;
++ } else {
++ rate = wmi_rateTable[(A_UINT32) reply->rateIndex];
++ }
++
++ A_WMI_BITRATE_RX(wmip->wmi_devt, rate);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_ratemask_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_FIX_RATES_CMD *reply;
++
++ if (len < sizeof(WMI_BIT_RATE_CMD)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_FIX_RATES_CMD *)datap;
++ A_DPRINTF(DBG_WMI,
++ (DBGFMT "Enter - fixed rate mask %x\n", DBGARG, reply->fixRateMask));
++
++ A_WMI_RATEMASK_RX(wmip->wmi_devt, reply->fixRateMask);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_channelList_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_CHANNEL_LIST_REPLY *reply;
++
++ if (len < sizeof(WMI_CHANNEL_LIST_REPLY)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_CHANNEL_LIST_REPLY *)datap;
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ A_WMI_CHANNELLIST_RX(wmip->wmi_devt, reply->numChannels,
++ reply->channelList);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_txPwr_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_TX_PWR_REPLY *reply;
++
++ if (len < sizeof(*reply)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_TX_PWR_REPLY *)datap;
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ A_WMI_TXPWR_RX(wmip->wmi_devt, reply->dbM);
++
++ return A_OK;
++}
++static A_STATUS
++wmi_keepalive_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_GET_KEEPALIVE_CMD *reply;
++
++ if (len < sizeof(*reply)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_GET_KEEPALIVE_CMD *)datap;
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ A_WMI_KEEPALIVE_RX(wmip->wmi_devt, reply->configured);
++
++ return A_OK;
++}
++
++
++static A_STATUS
++wmi_dset_open_req_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMIX_DSETOPENREQ_EVENT *dsetopenreq;
++
++ if (len < sizeof(WMIX_DSETOPENREQ_EVENT)) {
++ return A_EINVAL;
++ }
++ dsetopenreq = (WMIX_DSETOPENREQ_EVENT *)datap;
++ A_DPRINTF(DBG_WMI,
++ (DBGFMT "Enter - dset_id=0x%x\n", DBGARG, dsetopenreq->dset_id));
++ A_WMI_DSET_OPEN_REQ(wmip->wmi_devt,
++ dsetopenreq->dset_id,
++ dsetopenreq->targ_dset_handle,
++ dsetopenreq->targ_reply_fn,
++ dsetopenreq->targ_reply_arg);
++
++ return A_OK;
++}
++
++#ifdef CONFIG_HOST_DSET_SUPPORT
++static A_STATUS
++wmi_dset_close_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMIX_DSETCLOSE_EVENT *dsetclose;
++
++ if (len < sizeof(WMIX_DSETCLOSE_EVENT)) {
++ return A_EINVAL;
++ }
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ dsetclose = (WMIX_DSETCLOSE_EVENT *)datap;
++ A_WMI_DSET_CLOSE(wmip->wmi_devt, dsetclose->access_cookie);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_dset_data_req_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMIX_DSETDATAREQ_EVENT *dsetdatareq;
++
++ if (len < sizeof(WMIX_DSETDATAREQ_EVENT)) {
++ return A_EINVAL;
++ }
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ dsetdatareq = (WMIX_DSETDATAREQ_EVENT *)datap;
++ A_WMI_DSET_DATA_REQ(wmip->wmi_devt,
++ dsetdatareq->access_cookie,
++ dsetdatareq->offset,
++ dsetdatareq->length,
++ dsetdatareq->targ_buf,
++ dsetdatareq->targ_reply_fn,
++ dsetdatareq->targ_reply_arg);
++
++ return A_OK;
++}
++#endif /* CONFIG_HOST_DSET_SUPPORT */
++
++static A_STATUS
++wmi_scanComplete_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_SCAN_COMPLETE_EVENT *ev;
++
++ ev = (WMI_SCAN_COMPLETE_EVENT *)datap;
++ A_WMI_SCANCOMPLETE_EVENT(wmip->wmi_devt, ev->status);
++
++ return A_OK;
++}
++
++/*
++ * Target is reporting a programming error. This is for
++ * developer aid only. Target only checks a few common violations
++ * and it is responsibility of host to do all error checking.
++ * Behavior of target after wmi error event is undefined.
++ * A reset is recommended.
++ */
++static A_STATUS
++wmi_errorEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_CMD_ERROR_EVENT *ev;
++
++ ev = (WMI_CMD_ERROR_EVENT *)datap;
++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Programming Error: cmd=%d ", ev->commandId));
++ switch (ev->errorCode) {
++ case (INVALID_PARAM):
++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Illegal Parameter\n"));
++ break;
++ case (ILLEGAL_STATE):
++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Illegal State\n"));
++ break;
++ case (INTERNAL_ERROR):
++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Internal Error\n"));
++ break;
++ }
++
++ return A_OK;
++}
++
++
++static A_STATUS
++wmi_statsEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_TARGET_STATS *reply;
++
++ if (len < sizeof(*reply)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_TARGET_STATS *)datap;
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ A_WMI_TARGETSTATS_EVENT(wmip->wmi_devt, reply);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_rssiThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_RSSI_THRESHOLD_EVENT *reply;
++
++ if (len < sizeof(*reply)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_RSSI_THRESHOLD_EVENT *)datap;
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ A_WMI_RSSI_THRESHOLD_EVENT(wmip->wmi_devt, reply->range, reply->rssi);
++
++ return A_OK;
++}
++
++
++static A_STATUS
++wmi_reportErrorEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_TARGET_ERROR_REPORT_EVENT *reply;
++
++ if (len < sizeof(*reply)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_TARGET_ERROR_REPORT_EVENT *)datap;
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ A_WMI_REPORT_ERROR_EVENT(wmip->wmi_devt, reply->errorVal);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_cac_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_CAC_EVENT *reply;
++
++ if (len < sizeof(*reply)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_CAC_EVENT *)datap;
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ A_WMI_CAC_EVENT(wmip->wmi_devt, reply->ac,
++ reply->cac_indication, reply->statusCode,
++ reply->tspecSuggestion);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_hbChallengeResp_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMIX_HB_CHALLENGE_RESP_EVENT *reply;
++
++ if (len < sizeof(*reply)) {
++ return A_EINVAL;
++ }
++ reply = (WMIX_HB_CHALLENGE_RESP_EVENT *)datap;
++ A_DPRINTF(DBG_WMI, (DBGFMT "wmi: challenge response event\n", DBGARG));
++
++ A_WMI_HBCHALLENGERESP_EVENT(wmip->wmi_devt, reply->cookie, reply->source);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_roam_tbl_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_TARGET_ROAM_TBL *reply;
++
++ if (len < sizeof(*reply)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_TARGET_ROAM_TBL *)datap;
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ A_WMI_ROAM_TABLE_EVENT(wmip->wmi_devt, reply);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_roam_data_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_TARGET_ROAM_DATA *reply;
++
++ if (len < sizeof(*reply)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_TARGET_ROAM_DATA *)datap;
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ A_WMI_ROAM_DATA_EVENT(wmip->wmi_devt, reply);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_txRetryErrEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_TX_RETRY_ERR_EVENT *reply;
++
++ if (len < sizeof(*reply)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_TX_RETRY_ERR_EVENT *)datap;
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ A_WMI_TX_RETRY_ERR_EVENT(wmip->wmi_devt);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_snrThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_SNR_THRESHOLD_EVENT *reply;
++
++ if (len < sizeof(*reply)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_SNR_THRESHOLD_EVENT *)datap;
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ A_WMI_SNR_THRESHOLD_EVENT_RX(wmip->wmi_devt, reply->range, reply->snr);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_lqThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_LQ_THRESHOLD_EVENT *reply;
++
++ if (len < sizeof(*reply)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_LQ_THRESHOLD_EVENT *)datap;
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ A_WMI_LQ_THRESHOLD_EVENT_RX(wmip->wmi_devt, reply->range, reply->lq);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_aplistEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ A_UINT16 ap_info_entry_size;
++ WMI_APLIST_EVENT *ev = (WMI_APLIST_EVENT *)datap;
++ WMI_AP_INFO_V1 *ap_info_v1;
++ A_UINT8 i;
++
++ if (len < sizeof(WMI_APLIST_EVENT)) {
++ return A_EINVAL;
++ }
++
++ if (ev->apListVer == APLIST_VER1) {
++ ap_info_entry_size = sizeof(WMI_AP_INFO_V1);
++ ap_info_v1 = (WMI_AP_INFO_V1 *)ev->apList;
++ } else {
++ return A_EINVAL;
++ }
++
++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Number of APs in APLIST Event is %d\n", ev->numAP));
++ if (len < (int)(sizeof(WMI_APLIST_EVENT) +
++ (ev->numAP - 1) * ap_info_entry_size))
++ {
++ return A_EINVAL;
++ }
++
++ /*
++ * AP List Ver1 Contents
++ */
++ for (i = 0; i < ev->numAP; i++) {
++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("AP#%d BSSID %2.2x %2.2x %2.2x %2.2x %2.2x %2.2x "\
++ "Channel %d\n", i,
++ ap_info_v1->bssid[0], ap_info_v1->bssid[1],
++ ap_info_v1->bssid[2], ap_info_v1->bssid[3],
++ ap_info_v1->bssid[4], ap_info_v1->bssid[5],
++ ap_info_v1->channel));
++ ap_info_v1++;
++ }
++ return A_OK;
++}
++
++static A_STATUS
++wmi_dbglog_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ A_UINT32 dropped;
++
++ dropped = *((A_UINT32 *)datap);
++ datap += sizeof(dropped);
++ len -= sizeof(dropped);
++ A_WMI_DBGLOG_EVENT(wmip->wmi_devt, dropped, datap, len);
++ return A_OK;
++}
++
++#ifdef CONFIG_HOST_GPIO_SUPPORT
++static A_STATUS
++wmi_gpio_intr_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMIX_GPIO_INTR_EVENT *gpio_intr = (WMIX_GPIO_INTR_EVENT *)datap;
++
++ A_DPRINTF(DBG_WMI,
++ (DBGFMT "Enter - intrmask=0x%x input=0x%x.\n", DBGARG,
++ gpio_intr->intr_mask, gpio_intr->input_values));
++
++ A_WMI_GPIO_INTR_RX(gpio_intr->intr_mask, gpio_intr->input_values);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_gpio_data_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMIX_GPIO_DATA_EVENT *gpio_data = (WMIX_GPIO_DATA_EVENT *)datap;
++
++ A_DPRINTF(DBG_WMI,
++ (DBGFMT "Enter - reg=%d value=0x%x\n", DBGARG,
++ gpio_data->reg_id, gpio_data->value));
++
++ A_WMI_GPIO_DATA_RX(gpio_data->reg_id, gpio_data->value);
++
++ return A_OK;
++}
++
++static A_STATUS
++wmi_gpio_ack_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ A_WMI_GPIO_ACK_RX();
++
++ return A_OK;
++}
++#endif /* CONFIG_HOST_GPIO_SUPPORT */
++
++/*
++ * Called to send a wmi command. Command specific data is already built
++ * on osbuf and current osbuf->data points to it.
++ */
++A_STATUS
++wmi_cmd_send(struct wmi_t *wmip, void *osbuf, WMI_COMMAND_ID cmdId,
++ WMI_SYNC_FLAG syncflag)
++{
++#define IS_LONG_CMD(cmdId) ((cmdId == WMI_OPT_TX_FRAME_CMDID) || (cmdId == WMI_ADD_WOW_PATTERN_CMDID))
++ WMI_CMD_HDR *cHdr;
++ WMI_PRI_STREAM_ID streamID = WMI_CONTROL_PRI;
++
++ A_ASSERT(osbuf != NULL);
++
++ if (syncflag >= END_WMIFLAG) {
++ return A_EINVAL;
++ }
++
++ if ((syncflag == SYNC_BEFORE_WMIFLAG) || (syncflag == SYNC_BOTH_WMIFLAG)) {
++ /*
++ * We want to make sure all data currently queued is transmitted before
++ * the cmd execution. Establish a new sync point.
++ */
++ wmi_sync_point(wmip);
++ }
++
++ if (A_NETBUF_PUSH(osbuf, sizeof(WMI_CMD_HDR)) != A_OK) {
++ return A_NO_MEMORY;
++ }
++
++ cHdr = (WMI_CMD_HDR *)A_NETBUF_DATA(osbuf);
++ cHdr->commandId = cmdId;
++
++ /*
++ * Send cmd, some via control pipe, others via data pipe
++ */
++ if (IS_LONG_CMD(cmdId)) {
++ wmi_data_hdr_add(wmip, osbuf, CNTL_MSGTYPE);
++ // TODO ... these can now go through the control endpoint via HTC 2.0
++ streamID = WMI_BEST_EFFORT_PRI;
++ }
++ A_WMI_CONTROL_TX(wmip->wmi_devt, osbuf, streamID);
++
++ if ((syncflag == SYNC_AFTER_WMIFLAG) || (syncflag == SYNC_BOTH_WMIFLAG)) {
++ /*
++ * We want to make sure all new data queued waits for the command to
++ * execute. Establish a new sync point.
++ */
++ wmi_sync_point(wmip);
++ }
++ return (A_OK);
++#undef IS_LONG_CMD
++}
++
++A_STATUS
++wmi_cmd_send_xtnd(struct wmi_t *wmip, void *osbuf, WMI_COMMAND_ID cmdId,
++ WMI_SYNC_FLAG syncflag)
++{
++ WMIX_CMD_HDR *cHdr;
++
++ if (A_NETBUF_PUSH(osbuf, sizeof(WMIX_CMD_HDR)) != A_OK) {
++ return A_NO_MEMORY;
++ }
++
++ cHdr = (WMIX_CMD_HDR *)A_NETBUF_DATA(osbuf);
++ cHdr->commandId = cmdId;
++
++ return wmi_cmd_send(wmip, osbuf, WMI_EXTENSION_CMDID, syncflag);
++}
++
++A_STATUS
++wmi_connect_cmd(struct wmi_t *wmip, NETWORK_TYPE netType,
++ DOT11_AUTH_MODE dot11AuthMode, AUTH_MODE authMode,
++ CRYPTO_TYPE pairwiseCrypto, A_UINT8 pairwiseCryptoLen,
++ CRYPTO_TYPE groupCrypto,A_UINT8 groupCryptoLen,
++ int ssidLength, A_UCHAR *ssid,
++ A_UINT8 *bssid, A_UINT16 channel, A_UINT32 ctrl_flags)
++{
++ void *osbuf;
++ WMI_CONNECT_CMD *cc;
++
++ if ((pairwiseCrypto == NONE_CRYPT) && (groupCrypto != NONE_CRYPT)) {
++ return A_EINVAL;
++ }
++ if ((pairwiseCrypto != NONE_CRYPT) && (groupCrypto == NONE_CRYPT)) {
++ return A_EINVAL;
++ }
++
++ osbuf = A_NETBUF_ALLOC(sizeof(WMI_CONNECT_CMD));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(WMI_CONNECT_CMD));
++
++ cc = (WMI_CONNECT_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cc, sizeof(*cc));
++
++ A_MEMCPY(cc->ssid, ssid, ssidLength);
++ cc->ssidLength = ssidLength;
++ cc->networkType = netType;
++ cc->dot11AuthMode = dot11AuthMode;
++ cc->authMode = authMode;
++ cc->pairwiseCryptoType = pairwiseCrypto;
++ cc->pairwiseCryptoLen = pairwiseCryptoLen;
++ cc->groupCryptoType = groupCrypto;
++ cc->groupCryptoLen = groupCryptoLen;
++ cc->channel = channel;
++ cc->ctrl_flags = ctrl_flags;
++
++ if (bssid != NULL) {
++ A_MEMCPY(cc->bssid, bssid, ATH_MAC_LEN);
++ }
++ if (wmi_set_keepalive_cmd(wmip, wmip->wmi_keepaliveInterval) != A_OK) {
++ return(A_ERROR);
++ }
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_CONNECT_CMDID, NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_reconnect_cmd(struct wmi_t *wmip, A_UINT8 *bssid, A_UINT16 channel)
++{
++ void *osbuf;
++ WMI_RECONNECT_CMD *cc;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(WMI_RECONNECT_CMD));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(WMI_RECONNECT_CMD));
++
++ cc = (WMI_RECONNECT_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cc, sizeof(*cc));
++
++ cc->channel = channel;
++
++ if (bssid != NULL) {
++ A_MEMCPY(cc->bssid, bssid, ATH_MAC_LEN);
++ }
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_RECONNECT_CMDID, NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_disconnect_cmd(struct wmi_t *wmip)
++{
++ void *osbuf;
++ A_STATUS status;
++
++ osbuf = A_NETBUF_ALLOC(0); /* no payload */
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ /* Bug fix for 24817(elevator bug) - the disconnect command does not
++ need to do a SYNC before.*/
++ status = (wmi_cmd_send(wmip, osbuf, WMI_DISCONNECT_CMDID,
++ NO_SYNC_WMIFLAG));
++
++ return status;
++}
++
++A_STATUS
++wmi_startscan_cmd(struct wmi_t *wmip, WMI_SCAN_TYPE scanType,
++ A_BOOL forceFgScan, A_BOOL isLegacy,
++ A_UINT32 homeDwellTime, A_UINT32 forceScanInterval)
++{
++ void *osbuf;
++ WMI_START_SCAN_CMD *sc;
++
++ if ((scanType != WMI_LONG_SCAN) && (scanType != WMI_SHORT_SCAN)) {
++ return A_EINVAL;
++ }
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*sc));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*sc));
++
++ sc = (WMI_START_SCAN_CMD *)(A_NETBUF_DATA(osbuf));
++ sc->scanType = scanType;
++ sc->forceFgScan = forceFgScan;
++ sc->isLegacy = isLegacy;
++ sc->homeDwellTime = homeDwellTime;
++ sc->forceScanInterval = forceScanInterval;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_START_SCAN_CMDID, NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_scanparams_cmd(struct wmi_t *wmip, A_UINT16 fg_start_sec,
++ A_UINT16 fg_end_sec, A_UINT16 bg_sec,
++ A_UINT16 minact_chdw_msec, A_UINT16 maxact_chdw_msec,
++ A_UINT16 pas_chdw_msec,
++ A_UINT8 shScanRatio, A_UINT8 scanCtrlFlags,
++ A_UINT32 max_dfsch_act_time)
++{
++ void *osbuf;
++ WMI_SCAN_PARAMS_CMD *sc;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*sc));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*sc));
++
++ sc = (WMI_SCAN_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(sc, sizeof(*sc));
++ sc->fg_start_period = fg_start_sec;
++ sc->fg_end_period = fg_end_sec;
++ sc->bg_period = bg_sec;
++ sc->minact_chdwell_time = minact_chdw_msec;
++ sc->maxact_chdwell_time = maxact_chdw_msec;
++ sc->pas_chdwell_time = pas_chdw_msec;
++ sc->shortScanRatio = shScanRatio;
++ sc->scanCtrlFlags = scanCtrlFlags;
++ sc->max_dfsch_act_time = max_dfsch_act_time;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_SCAN_PARAMS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_bssfilter_cmd(struct wmi_t *wmip, A_UINT8 filter, A_UINT32 ieMask)
++{
++ void *osbuf;
++ WMI_BSS_FILTER_CMD *cmd;
++
++ if (filter >= LAST_BSS_FILTER) {
++ return A_EINVAL;
++ }
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_BSS_FILTER_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->bssFilter = filter;
++ cmd->ieMask = ieMask;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_BSS_FILTER_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_probedSsid_cmd(struct wmi_t *wmip, A_UINT8 index, A_UINT8 flag,
++ A_UINT8 ssidLength, A_UCHAR *ssid)
++{
++ void *osbuf;
++ WMI_PROBED_SSID_CMD *cmd;
++
++ if (index > MAX_PROBED_SSID_INDEX) {
++ return A_EINVAL;
++ }
++ if (ssidLength > sizeof(cmd->ssid)) {
++ return A_EINVAL;
++ }
++ if ((flag & (DISABLE_SSID_FLAG | ANY_SSID_FLAG)) && (ssidLength > 0)) {
++ return A_EINVAL;
++ }
++ if ((flag & SPECIFIC_SSID_FLAG) && !ssidLength) {
++ return A_EINVAL;
++ }
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_PROBED_SSID_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->entryIndex = index;
++ cmd->flag = flag;
++ cmd->ssidLength = ssidLength;
++ A_MEMCPY(cmd->ssid, ssid, ssidLength);
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_PROBED_SSID_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_listeninterval_cmd(struct wmi_t *wmip, A_UINT16 listenInterval, A_UINT16 listenBeacons)
++{
++ void *osbuf;
++ WMI_LISTEN_INT_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_LISTEN_INT_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->listenInterval = listenInterval;
++ cmd->numBeacons = listenBeacons;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_LISTEN_INT_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_bmisstime_cmd(struct wmi_t *wmip, A_UINT16 bmissTime, A_UINT16 bmissBeacons)
++{
++ void *osbuf;
++ WMI_BMISS_TIME_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_BMISS_TIME_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->bmissTime = bmissTime;
++ cmd->numBeacons = bmissBeacons;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_BMISS_TIME_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_associnfo_cmd(struct wmi_t *wmip, A_UINT8 ieType,
++ A_UINT8 ieLen, A_UINT8 *ieInfo)
++{
++ void *osbuf;
++ WMI_SET_ASSOC_INFO_CMD *cmd;
++ A_UINT16 cmdLen;
++
++ cmdLen = sizeof(*cmd) + ieLen - 1;
++ osbuf = A_NETBUF_ALLOC(cmdLen);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, cmdLen);
++
++ cmd = (WMI_SET_ASSOC_INFO_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, cmdLen);
++ cmd->ieType = ieType;
++ cmd->bufferSize = ieLen;
++ A_MEMCPY(cmd->assocInfo, ieInfo, ieLen);
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_ASSOC_INFO_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_powermode_cmd(struct wmi_t *wmip, A_UINT8 powerMode)
++{
++ void *osbuf;
++ WMI_POWER_MODE_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_POWER_MODE_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->powerMode = powerMode;
++ wmip->wmi_powerMode = powerMode;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_POWER_MODE_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_ibsspmcaps_cmd(struct wmi_t *wmip, A_UINT8 pmEnable, A_UINT8 ttl,
++ A_UINT16 atim_windows, A_UINT16 timeout_value)
++{
++ void *osbuf;
++ WMI_IBSS_PM_CAPS_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_IBSS_PM_CAPS_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->power_saving = pmEnable;
++ cmd->ttl = ttl;
++ cmd->atim_windows = atim_windows;
++ cmd->timeout_value = timeout_value;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_IBSS_PM_CAPS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_pmparams_cmd(struct wmi_t *wmip, A_UINT16 idlePeriod,
++ A_UINT16 psPollNum, A_UINT16 dtimPolicy)
++{
++ void *osbuf;
++ WMI_POWER_PARAMS_CMD *pm;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*pm));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*pm));
++
++ pm = (WMI_POWER_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(pm, sizeof(*pm));
++ pm->idle_period = idlePeriod;
++ pm->pspoll_number = psPollNum;
++ pm->dtim_policy = dtimPolicy;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_POWER_PARAMS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_disctimeout_cmd(struct wmi_t *wmip, A_UINT8 timeout)
++{
++ void *osbuf;
++ WMI_DISC_TIMEOUT_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_DISC_TIMEOUT_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->disconnectTimeout = timeout;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_DISC_TIMEOUT_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_addKey_cmd(struct wmi_t *wmip, A_UINT8 keyIndex, CRYPTO_TYPE keyType,
++ A_UINT8 keyUsage, A_UINT8 keyLength, A_UINT8 *keyRSC,
++ A_UINT8 *keyMaterial, A_UINT8 key_op_ctrl,
++ WMI_SYNC_FLAG sync_flag)
++{
++ void *osbuf;
++ WMI_ADD_CIPHER_KEY_CMD *cmd;
++
++ if ((keyIndex > WMI_MAX_KEY_INDEX) || (keyLength > WMI_MAX_KEY_LEN) ||
++ (keyMaterial == NULL))
++ {
++ return A_EINVAL;
++ }
++
++ if ((WEP_CRYPT != keyType) && (NULL == keyRSC)) {
++ return A_EINVAL;
++ }
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_ADD_CIPHER_KEY_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->keyIndex = keyIndex;
++ cmd->keyType = keyType;
++ cmd->keyUsage = keyUsage;
++ cmd->keyLength = keyLength;
++ A_MEMCPY(cmd->key, keyMaterial, keyLength);
++ if (NULL != keyRSC) {
++ A_MEMCPY(cmd->keyRSC, keyRSC, sizeof(cmd->keyRSC));
++ }
++ cmd->key_op_ctrl = key_op_ctrl;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_ADD_CIPHER_KEY_CMDID, sync_flag));
++}
++
++A_STATUS
++wmi_add_krk_cmd(struct wmi_t *wmip, A_UINT8 *krk)
++{
++ void *osbuf;
++ WMI_ADD_KRK_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_ADD_KRK_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ A_MEMCPY(cmd->krk, krk, WMI_KRK_LEN);
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_ADD_KRK_CMDID, NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_delete_krk_cmd(struct wmi_t *wmip)
++{
++ void *osbuf;
++
++ osbuf = A_NETBUF_ALLOC(0);
++
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_DELETE_KRK_CMDID, NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_deleteKey_cmd(struct wmi_t *wmip, A_UINT8 keyIndex)
++{
++ void *osbuf;
++ WMI_DELETE_CIPHER_KEY_CMD *cmd;
++
++ if (keyIndex > WMI_MAX_KEY_INDEX) {
++ return A_EINVAL;
++ }
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_DELETE_CIPHER_KEY_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->keyIndex = keyIndex;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_DELETE_CIPHER_KEY_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_setPmkid_cmd(struct wmi_t *wmip, A_UINT8 *bssid, A_UINT8 *pmkId,
++ A_BOOL set)
++{
++ void *osbuf;
++ WMI_SET_PMKID_CMD *cmd;
++
++ if (bssid == NULL) {
++ return A_EINVAL;
++ }
++
++ if ((set == TRUE) && (pmkId == NULL)) {
++ return A_EINVAL;
++ }
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_PMKID_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMCPY(cmd->bssid, bssid, sizeof(cmd->bssid));
++ if (set == TRUE) {
++ A_MEMCPY(cmd->pmkid, pmkId, sizeof(cmd->pmkid));
++ cmd->enable = PMKID_ENABLE;
++ } else {
++ A_MEMZERO(cmd->pmkid, sizeof(cmd->pmkid));
++ cmd->enable = PMKID_DISABLE;
++ }
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_PMKID_CMDID, NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_tkip_countermeasures_cmd(struct wmi_t *wmip, A_BOOL en)
++{
++ void *osbuf;
++ WMI_SET_TKIP_COUNTERMEASURES_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_TKIP_COUNTERMEASURES_CMD *)(A_NETBUF_DATA(osbuf));
++ cmd->cm_en = (en == TRUE)? WMI_TKIP_CM_ENABLE : WMI_TKIP_CM_DISABLE;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_TKIP_COUNTERMEASURES_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_akmp_params_cmd(struct wmi_t *wmip,
++ WMI_SET_AKMP_PARAMS_CMD *akmpParams)
++{
++ void *osbuf;
++ WMI_SET_AKMP_PARAMS_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++ cmd = (WMI_SET_AKMP_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
++ cmd->akmpInfo = akmpParams->akmpInfo;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_AKMP_PARAMS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_pmkid_list_cmd(struct wmi_t *wmip,
++ WMI_SET_PMKID_LIST_CMD *pmkInfo)
++{
++ void *osbuf;
++ WMI_SET_PMKID_LIST_CMD *cmd;
++ A_UINT16 cmdLen;
++ A_UINT8 i;
++
++ cmdLen = sizeof(pmkInfo->numPMKID) +
++ pmkInfo->numPMKID * sizeof(WMI_PMKID);
++
++ osbuf = A_NETBUF_ALLOC(cmdLen);
++
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, cmdLen);
++ cmd = (WMI_SET_PMKID_LIST_CMD *)(A_NETBUF_DATA(osbuf));
++ cmd->numPMKID = pmkInfo->numPMKID;
++
++ for (i = 0; i < cmd->numPMKID; i++) {
++ A_MEMCPY(&cmd->pmkidList[i], &pmkInfo->pmkidList[i],
++ WMI_PMKID_LEN);
++ }
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_PMKID_LIST_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_get_pmkid_list_cmd(struct wmi_t *wmip)
++{
++ void *osbuf;
++
++ osbuf = A_NETBUF_ALLOC(0); /* no payload */
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_PMKID_LIST_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_dataSync_send(struct wmi_t *wmip, void *osbuf, WMI_PRI_STREAM_ID streamID)
++{
++ WMI_DATA_HDR *dtHdr;
++
++ A_ASSERT(streamID != WMI_CONTROL_PRI);
++ A_ASSERT(osbuf != NULL);
++
++ if (A_NETBUF_PUSH(osbuf, sizeof(WMI_DATA_HDR)) != A_OK) {
++ return A_NO_MEMORY;
++ }
++
++ dtHdr = (WMI_DATA_HDR *)A_NETBUF_DATA(osbuf);
++ dtHdr->info =
++ (SYNC_MSGTYPE & WMI_DATA_HDR_MSG_TYPE_MASK) << WMI_DATA_HDR_MSG_TYPE_SHIFT;
++
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter - streamID %d\n", DBGARG, streamID));
++
++ return (A_WMI_CONTROL_TX(wmip->wmi_devt, osbuf, streamID));
++}
++
++typedef struct _WMI_DATA_SYNC_BUFS {
++ A_UINT8 trafficClass;
++ void *osbuf;
++}WMI_DATA_SYNC_BUFS;
++
++static A_STATUS
++wmi_sync_point(struct wmi_t *wmip)
++{
++ void *cmd_osbuf;
++ WMI_DATA_SYNC_BUFS dataSyncBufs[WMM_NUM_AC];
++ A_UINT8 i,numPriStreams=0;
++ A_STATUS status;
++
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ memset(dataSyncBufs,0,sizeof(dataSyncBufs));
++
++ /* lock out while we walk through the priority list and assemble our local array */
++ LOCK_WMI(wmip);
++
++ for (i=0; i < WMM_NUM_AC ; i++) {
++ if (wmip->wmi_fatPipeExists & (1 << i)) {
++ numPriStreams++;
++ dataSyncBufs[numPriStreams-1].trafficClass = i;
++ }
++ }
++
++ UNLOCK_WMI(wmip);
++
++ /* dataSyncBufs is now filled with entries (starting at index 0) containing valid streamIDs */
++
++ do {
++ /*
++ * We allocate all network buffers needed so we will be able to
++ * send all required frames.
++ */
++ cmd_osbuf = A_NETBUF_ALLOC(0); /* no payload */
++ if (cmd_osbuf == NULL) {
++ status = A_NO_MEMORY;
++ break;
++ }
++
++ for (i=0; i < numPriStreams ; i++) {
++ dataSyncBufs[i].osbuf = A_NETBUF_ALLOC(0);
++ if (dataSyncBufs[i].osbuf == NULL) {
++ status = A_NO_MEMORY;
++ break;
++ }
++ } //end for
++
++ /*
++ * Send sync cmd followed by sync data messages on all endpoints being
++ * used
++ */
++ status = wmi_cmd_send(wmip, cmd_osbuf, WMI_SYNCHRONIZE_CMDID,
++ NO_SYNC_WMIFLAG);
++
++ if (A_FAILED(status)) {
++ break;
++ }
++ /* cmd buffer sent, we no longer own it */
++ cmd_osbuf = NULL;
++
++ for(i=0; i < numPriStreams; i++) {
++ A_ASSERT(dataSyncBufs[i].osbuf != NULL);
++
++ status = wmi_dataSync_send(wmip, dataSyncBufs[i].osbuf,
++ WMI_ACCESSCATEGORY_WMISTREAM(wmip,dataSyncBufs[i].trafficClass));
++
++ if (A_FAILED(status)) {
++ break;
++ }
++ /* we don't own this buffer anymore, NULL it out of the array so it
++ * won't get cleaned up */
++ dataSyncBufs[i].osbuf = NULL;
++ } //end for
++
++ } while(FALSE);
++
++ /* free up any resources left over (possibly due to an error) */
++
++ if (cmd_osbuf != NULL) {
++ A_NETBUF_FREE(cmd_osbuf);
++ }
++
++ for (i = 0; i < numPriStreams; i++) {
++ if (dataSyncBufs[i].osbuf != NULL) {
++ A_NETBUF_FREE(dataSyncBufs[i].osbuf);
++ }
++ }
++
++ return (status);
++}
++
++A_STATUS
++wmi_create_pstream_cmd(struct wmi_t *wmip, WMI_CREATE_PSTREAM_CMD *params)
++{
++ void *osbuf;
++ WMI_CREATE_PSTREAM_CMD *cmd;
++ A_UINT16 activeTsids=0;
++ A_UINT8 fatPipeExistsForAC=0;
++
++ /* Validate all the parameters. */
++ if( !((params->userPriority < 8) &&
++ (params->userPriority <= 0x7) &&
++ (convert_userPriority_to_trafficClass(params->userPriority) == params->trafficClass) &&
++ (params->trafficDirection == UPLINK_TRAFFIC ||
++ params->trafficDirection == DNLINK_TRAFFIC ||
++ params->trafficDirection == BIDIR_TRAFFIC) &&
++ (params->trafficType == TRAFFIC_TYPE_APERIODIC ||
++ params->trafficType == TRAFFIC_TYPE_PERIODIC ) &&
++ (params->voicePSCapability == DISABLE_FOR_THIS_AC ||
++ params->voicePSCapability == ENABLE_FOR_THIS_AC ||
++ params->voicePSCapability == ENABLE_FOR_ALL_AC) &&
++ (params->tsid == WMI_IMPLICIT_PSTREAM || params->tsid <= WMI_MAX_THINSTREAM)) )
++ {
++ return A_EINVAL;
++ }
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ A_DPRINTF(DBG_WMI,
++ (DBGFMT "Sending create_pstream_cmd: ac=%d tsid:%d\n", DBGARG,
++ params->trafficClass, params->tsid));
++
++ cmd = (WMI_CREATE_PSTREAM_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ A_MEMCPY(cmd, params, sizeof(*cmd));
++
++ /* this is an implicitly created Fat pipe */
++ if (params->tsid == WMI_IMPLICIT_PSTREAM) {
++ LOCK_WMI(wmip);
++ fatPipeExistsForAC = (wmip->wmi_fatPipeExists & (1 << params->trafficClass));
++ wmip->wmi_fatPipeExists |= (1<<params->trafficClass);
++ UNLOCK_WMI(wmip);
++ } else {
++ /* this is an explicitly created thin stream within a fat pipe */
++ LOCK_WMI(wmip);
++ fatPipeExistsForAC = (wmip->wmi_fatPipeExists & (1 << params->trafficClass));
++ activeTsids = wmip->wmi_streamExistsForAC[params->trafficClass];
++ wmip->wmi_streamExistsForAC[params->trafficClass] |= (1<<params->tsid);
++ /* if a thinstream becomes active, the fat pipe automatically
++ * becomes active
++ */
++ wmip->wmi_fatPipeExists |= (1<<params->trafficClass);
++ UNLOCK_WMI(wmip);
++ }
++
++ /* Indicate activty change to driver layer only if this is the
++ * first TSID to get created in this AC explicitly or an implicit
++ * fat pipe is getting created.
++ */
++ if (!fatPipeExistsForAC) {
++ A_WMI_STREAM_TX_ACTIVE(wmip->wmi_devt, params->trafficClass);
++ }
++
++ /* mike: should be SYNC_BEFORE_WMIFLAG */
++ return (wmi_cmd_send(wmip, osbuf, WMI_CREATE_PSTREAM_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_delete_pstream_cmd(struct wmi_t *wmip, A_UINT8 trafficClass, A_UINT8 tsid)
++{
++ void *osbuf;
++ WMI_DELETE_PSTREAM_CMD *cmd;
++ A_STATUS status;
++ A_UINT16 activeTsids=0;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_DELETE_PSTREAM_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++
++ cmd->trafficClass = trafficClass;
++ cmd->tsid = tsid;
++
++ LOCK_WMI(wmip);
++ activeTsids = wmip->wmi_streamExistsForAC[trafficClass];
++ UNLOCK_WMI(wmip);
++
++ /* Check if the tsid was created & exists */
++ if (!(activeTsids & (1<<tsid))) {
++
++ A_DPRINTF(DBG_WMI,
++ (DBGFMT "TSID %d does'nt exist for trafficClass: %d\n", DBGARG, tsid, trafficClass));
++ /* TODO: return a more appropriate err code */
++ return A_ERROR;
++ }
++
++ A_DPRINTF(DBG_WMI,
++ (DBGFMT "Sending delete_pstream_cmd: trafficClass: %d tsid=%d\n", DBGARG, trafficClass, tsid));
++
++ status = (wmi_cmd_send(wmip, osbuf, WMI_DELETE_PSTREAM_CMDID,
++ SYNC_BEFORE_WMIFLAG));
++
++ LOCK_WMI(wmip);
++ wmip->wmi_streamExistsForAC[trafficClass] &= ~(1<<tsid);
++ activeTsids = wmip->wmi_streamExistsForAC[trafficClass];
++ UNLOCK_WMI(wmip);
++
++
++ /* Indicate stream inactivity to driver layer only if all tsids
++ * within this AC are deleted.
++ */
++ if(!activeTsids) {
++ A_WMI_STREAM_TX_INACTIVE(wmip->wmi_devt, trafficClass);
++ wmip->wmi_fatPipeExists &= ~(1<<trafficClass);
++ }
++
++ return status;
++}
++
++/*
++ * used to set the bit rate. rate is in Kbps. If rate == -1
++ * then auto selection is used.
++ */
++A_STATUS
++wmi_set_bitrate_cmd(struct wmi_t *wmip, A_INT32 rate)
++{
++ void *osbuf;
++ WMI_BIT_RATE_CMD *cmd;
++ A_INT8 index;
++
++ if (rate != -1) {
++ index = wmi_validate_bitrate(wmip, rate);
++ if(index == A_EINVAL){
++ return A_EINVAL;
++ }
++ } else {
++ index = -1;
++ }
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_BIT_RATE_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++
++ cmd->rateIndex = index;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_BITRATE_CMDID, NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_get_bitrate_cmd(struct wmi_t *wmip)
++{
++ void *osbuf;
++
++ osbuf = A_NETBUF_ALLOC(0); /* no payload */
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_BITRATE_CMDID, NO_SYNC_WMIFLAG));
++}
++
++/*
++ * Returns TRUE iff the given rate index is legal in the current PHY mode.
++ */
++A_BOOL
++wmi_is_bitrate_index_valid(struct wmi_t *wmip, A_UINT32 rateIndex)
++{
++ WMI_PHY_MODE phyMode = wmip->wmi_phyMode;
++ A_BOOL isValid = TRUE;
++ switch(phyMode) {
++ case WMI_11A_MODE:
++ if ((rateIndex < MODE_A_SUPPORT_RATE_START) || (rateIndex > MODE_A_SUPPORT_RATE_STOP)) {
++ isValid = FALSE;
++ }
++ break;
++
++ case WMI_11B_MODE:
++ if ((rateIndex < MODE_B_SUPPORT_RATE_START) || (rateIndex > MODE_B_SUPPORT_RATE_STOP)) {
++ isValid = FALSE;
++ }
++ break;
++
++ case WMI_11GONLY_MODE:
++ if ((rateIndex < MODE_GONLY_SUPPORT_RATE_START) || (rateIndex > MODE_GONLY_SUPPORT_RATE_STOP)) {
++ isValid = FALSE;
++ }
++ break;
++
++ case WMI_11G_MODE:
++ case WMI_11AG_MODE:
++ if ((rateIndex < MODE_G_SUPPORT_RATE_START) || (rateIndex > MODE_G_SUPPORT_RATE_STOP)) {
++ isValid = FALSE;
++ }
++ break;
++
++ default:
++ A_ASSERT(FALSE);
++ break;
++ }
++
++ return isValid;
++}
++
++A_INT8
++wmi_validate_bitrate(struct wmi_t *wmip, A_INT32 rate)
++{
++ A_INT8 i;
++ if (rate != -1)
++ {
++ for (i=0;;i++)
++ {
++ if (wmi_rateTable[(A_UINT32) i] == 0) {
++ return A_EINVAL;
++ }
++ if (wmi_rateTable[(A_UINT32) i] == rate) {
++ break;
++ }
++ }
++ }
++ else{
++ i = -1;
++ }
++
++ if(wmi_is_bitrate_index_valid(wmip, i) != TRUE) {
++ return A_EINVAL;
++ }
++
++ return i;
++}
++
++A_STATUS
++wmi_set_fixrates_cmd(struct wmi_t *wmip, A_INT16 fixRatesMask)
++{
++ void *osbuf;
++ WMI_FIX_RATES_CMD *cmd;
++ A_UINT32 rateIndex;
++
++ /* Make sure all rates in the mask are valid in the current PHY mode */
++ for(rateIndex = 0; rateIndex < MAX_NUMBER_OF_SUPPORT_RATES; rateIndex++) {
++ if((1 << rateIndex) & (A_UINT32)fixRatesMask) {
++ if(wmi_is_bitrate_index_valid(wmip, rateIndex) != TRUE) {
++ A_DPRINTF(DBG_WMI, (DBGFMT "Set Fix Rates command failed: Given rate is illegal in current PHY mode\n", DBGARG));
++ return A_EINVAL;
++ }
++ }
++ }
++
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_FIX_RATES_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++
++ cmd->fixRateMask = fixRatesMask;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_FIXRATES_CMDID, NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_get_ratemask_cmd(struct wmi_t *wmip)
++{
++ void *osbuf;
++
++ osbuf = A_NETBUF_ALLOC(0); /* no payload */
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_FIXRATES_CMDID, NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_get_channelList_cmd(struct wmi_t *wmip)
++{
++ void *osbuf;
++
++ osbuf = A_NETBUF_ALLOC(0); /* no payload */
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_CHANNEL_LIST_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++/*
++ * used to generate a wmi sey channel Parameters cmd.
++ * mode should always be specified and corresponds to the phy mode of the
++ * wlan.
++ * numChan should alway sbe specified. If zero indicates that all available
++ * channels should be used.
++ * channelList is an array of channel frequencies (in Mhz) which the radio
++ * should limit its operation to. It should be NULL if numChan == 0. Size of
++ * array should correspond to numChan entries.
++ */
++A_STATUS
++wmi_set_channelParams_cmd(struct wmi_t *wmip, A_UINT8 scanParam,
++ WMI_PHY_MODE mode, A_INT8 numChan,
++ A_UINT16 *channelList)
++{
++ void *osbuf;
++ WMI_CHANNEL_PARAMS_CMD *cmd;
++ A_INT8 size;
++
++ size = sizeof (*cmd);
++
++ if (numChan) {
++ if (numChan > WMI_MAX_CHANNELS) {
++ return A_EINVAL;
++ }
++ size += sizeof(A_UINT16) * (numChan - 1);
++ }
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, size);
++
++ cmd = (WMI_CHANNEL_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, size);
++
++ wmip->wmi_phyMode = mode;
++ cmd->scanParam = scanParam;
++ cmd->phyMode = mode;
++ cmd->numChannels = numChan;
++ A_MEMCPY(cmd->channelList, channelList, numChan * sizeof(A_UINT16));
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_CHANNEL_PARAMS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_rssi_threshold_params(struct wmi_t *wmip,
++ WMI_RSSI_THRESHOLD_PARAMS_CMD *rssiCmd)
++{
++ void *osbuf;
++ A_INT8 size;
++ WMI_RSSI_THRESHOLD_PARAMS_CMD *cmd;
++ /* These values are in ascending order */
++ if( rssiCmd->thresholdAbove6_Val <= rssiCmd->thresholdAbove5_Val ||
++ rssiCmd->thresholdAbove5_Val <= rssiCmd->thresholdAbove4_Val ||
++ rssiCmd->thresholdAbove4_Val <= rssiCmd->thresholdAbove3_Val ||
++ rssiCmd->thresholdAbove3_Val <= rssiCmd->thresholdAbove2_Val ||
++ rssiCmd->thresholdAbove2_Val <= rssiCmd->thresholdAbove1_Val ||
++ rssiCmd->thresholdBelow6_Val <= rssiCmd->thresholdBelow5_Val ||
++ rssiCmd->thresholdBelow5_Val <= rssiCmd->thresholdBelow4_Val ||
++ rssiCmd->thresholdBelow4_Val <= rssiCmd->thresholdBelow3_Val ||
++ rssiCmd->thresholdBelow3_Val <= rssiCmd->thresholdBelow2_Val ||
++ rssiCmd->thresholdBelow2_Val <= rssiCmd->thresholdBelow1_Val) {
++
++ return A_EINVAL;
++ }
++
++ size = sizeof (*cmd);
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, size);
++
++ cmd = (WMI_RSSI_THRESHOLD_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, size);
++ A_MEMCPY(cmd, rssiCmd, sizeof(WMI_RSSI_THRESHOLD_PARAMS_CMD));
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_RSSI_THRESHOLD_PARAMS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_host_sleep_mode_cmd(struct wmi_t *wmip,
++ WMI_SET_HOST_SLEEP_MODE_CMD *hostModeCmd)
++{
++ void *osbuf;
++ A_INT8 size;
++ WMI_SET_HOST_SLEEP_MODE_CMD *cmd;
++
++ if( hostModeCmd->awake == hostModeCmd->asleep) {
++ return A_EINVAL;
++ }
++
++ size = sizeof (*cmd);
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, size);
++
++ cmd = (WMI_SET_HOST_SLEEP_MODE_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, size);
++ A_MEMCPY(cmd, hostModeCmd, sizeof(WMI_SET_HOST_SLEEP_MODE_CMD));
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_HOST_SLEEP_MODE_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_wow_mode_cmd(struct wmi_t *wmip,
++ WMI_SET_WOW_MODE_CMD *wowModeCmd)
++{
++ void *osbuf;
++ A_INT8 size;
++ WMI_SET_WOW_MODE_CMD *cmd;
++
++ size = sizeof (*cmd);
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, size);
++
++ cmd = (WMI_SET_WOW_MODE_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, size);
++ A_MEMCPY(cmd, wowModeCmd, sizeof(WMI_SET_WOW_MODE_CMD));
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_WOW_MODE_CMDID,
++ NO_SYNC_WMIFLAG));
++
++}
++
++A_STATUS
++wmi_get_wow_list_cmd(struct wmi_t *wmip,
++ WMI_GET_WOW_LIST_CMD *wowListCmd)
++{
++ void *osbuf;
++ A_INT8 size;
++ WMI_GET_WOW_LIST_CMD *cmd;
++
++ size = sizeof (*cmd);
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, size);
++
++ cmd = (WMI_GET_WOW_LIST_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, size);
++ A_MEMCPY(cmd, wowListCmd, sizeof(WMI_GET_WOW_LIST_CMD));
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_WOW_LIST_CMDID,
++ NO_SYNC_WMIFLAG));
++
++}
++
++static A_STATUS
++wmi_get_wow_list_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++ WMI_GET_WOW_LIST_REPLY *reply;
++
++ if (len < sizeof(WMI_GET_WOW_LIST_REPLY)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_GET_WOW_LIST_REPLY *)datap;
++
++ A_WMI_WOW_LIST_EVENT(wmip->wmi_devt, reply->num_filters,
++ reply);
++
++ return A_OK;
++}
++
++A_STATUS wmi_add_wow_pattern_cmd(struct wmi_t *wmip,
++ WMI_ADD_WOW_PATTERN_CMD *addWowCmd,
++ A_UINT8* pattern, A_UINT8* mask,
++ A_UINT8 pattern_size)
++{
++ void *osbuf;
++ A_INT8 size;
++ WMI_ADD_WOW_PATTERN_CMD *cmd;
++ A_UINT8 *filter_mask = NULL;
++
++ size = sizeof (*cmd);
++
++ size += ((2 * addWowCmd->filter_size)* sizeof(A_UINT8));
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, size);
++
++ cmd = (WMI_ADD_WOW_PATTERN_CMD *)(A_NETBUF_DATA(osbuf));
++ cmd->filter_list_id = addWowCmd->filter_list_id;
++ cmd->filter_offset = addWowCmd->filter_offset;
++ cmd->filter_size = addWowCmd->filter_size;
++
++ A_MEMCPY(cmd->filter, pattern, addWowCmd->filter_size);
++
++ filter_mask = (A_UINT8*)(cmd->filter + cmd->filter_size);
++ A_MEMCPY(filter_mask, mask, addWowCmd->filter_size);
++
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_ADD_WOW_PATTERN_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_del_wow_pattern_cmd(struct wmi_t *wmip,
++ WMI_DEL_WOW_PATTERN_CMD *delWowCmd)
++{
++ void *osbuf;
++ A_INT8 size;
++ WMI_DEL_WOW_PATTERN_CMD *cmd;
++
++ size = sizeof (*cmd);
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, size);
++
++ cmd = (WMI_DEL_WOW_PATTERN_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, size);
++ A_MEMCPY(cmd, delWowCmd, sizeof(WMI_DEL_WOW_PATTERN_CMD));
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_DEL_WOW_PATTERN_CMDID,
++ NO_SYNC_WMIFLAG));
++
++}
++
++A_STATUS
++wmi_set_snr_threshold_params(struct wmi_t *wmip,
++ WMI_SNR_THRESHOLD_PARAMS_CMD *snrCmd)
++{
++ void *osbuf;
++ A_INT8 size;
++ WMI_SNR_THRESHOLD_PARAMS_CMD *cmd;
++ /* These values are in ascending order */
++ if( snrCmd->thresholdAbove4_Val <= snrCmd->thresholdAbove3_Val ||
++ snrCmd->thresholdAbove3_Val <= snrCmd->thresholdAbove2_Val ||
++ snrCmd->thresholdAbove2_Val <= snrCmd->thresholdAbove1_Val ||
++ snrCmd->thresholdBelow4_Val <= snrCmd->thresholdBelow3_Val ||
++ snrCmd->thresholdBelow3_Val <= snrCmd->thresholdBelow2_Val ||
++ snrCmd->thresholdBelow2_Val <= snrCmd->thresholdBelow1_Val) {
++
++ return A_EINVAL;
++ }
++
++ size = sizeof (*cmd);
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, size);
++
++ cmd = (WMI_SNR_THRESHOLD_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, size);
++ A_MEMCPY(cmd, snrCmd, sizeof(WMI_SNR_THRESHOLD_PARAMS_CMD));
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SNR_THRESHOLD_PARAMS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_clr_rssi_snr(struct wmi_t *wmip)
++{
++ void *osbuf;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(int));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_CLR_RSSI_SNR_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_lq_threshold_params(struct wmi_t *wmip,
++ WMI_LQ_THRESHOLD_PARAMS_CMD *lqCmd)
++{
++ void *osbuf;
++ A_INT8 size;
++ WMI_LQ_THRESHOLD_PARAMS_CMD *cmd;
++ /* These values are in ascending order */
++ if( lqCmd->thresholdAbove4_Val <= lqCmd->thresholdAbove3_Val ||
++ lqCmd->thresholdAbove3_Val <= lqCmd->thresholdAbove2_Val ||
++ lqCmd->thresholdAbove2_Val <= lqCmd->thresholdAbove1_Val ||
++ lqCmd->thresholdBelow4_Val <= lqCmd->thresholdBelow3_Val ||
++ lqCmd->thresholdBelow3_Val <= lqCmd->thresholdBelow2_Val ||
++ lqCmd->thresholdBelow2_Val <= lqCmd->thresholdBelow1_Val ) {
++
++ return A_EINVAL;
++ }
++
++ size = sizeof (*cmd);
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, size);
++
++ cmd = (WMI_LQ_THRESHOLD_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, size);
++ A_MEMCPY(cmd, lqCmd, sizeof(WMI_LQ_THRESHOLD_PARAMS_CMD));
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_LQ_THRESHOLD_PARAMS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_error_report_bitmask(struct wmi_t *wmip, A_UINT32 mask)
++{
++ void *osbuf;
++ A_INT8 size;
++ WMI_TARGET_ERROR_REPORT_BITMASK *cmd;
++
++ size = sizeof (*cmd);
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, size);
++
++ cmd = (WMI_TARGET_ERROR_REPORT_BITMASK *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, size);
++
++ cmd->bitmask = mask;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_TARGET_ERROR_REPORT_BITMASK_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_get_challenge_resp_cmd(struct wmi_t *wmip, A_UINT32 cookie, A_UINT32 source)
++{
++ void *osbuf;
++ WMIX_HB_CHALLENGE_RESP_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMIX_HB_CHALLENGE_RESP_CMD *)(A_NETBUF_DATA(osbuf));
++ cmd->cookie = cookie;
++ cmd->source = source;
++
++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_HB_CHALLENGE_RESP_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_config_debug_module_cmd(struct wmi_t *wmip, A_UINT16 mmask,
++ A_UINT16 tsr, A_BOOL rep, A_UINT16 size,
++ A_UINT32 valid)
++{
++ void *osbuf;
++ WMIX_DBGLOG_CFG_MODULE_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMIX_DBGLOG_CFG_MODULE_CMD *)(A_NETBUF_DATA(osbuf));
++ cmd->config.cfgmmask = mmask;
++ cmd->config.cfgtsr = tsr;
++ cmd->config.cfgrep = rep;
++ cmd->config.cfgsize = size;
++ cmd->config.cfgvalid = valid;
++
++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_DBGLOG_CFG_MODULE_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_get_stats_cmd(struct wmi_t *wmip)
++{
++ void *osbuf;
++
++ osbuf = A_NETBUF_ALLOC(0); /* no payload */
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_STATISTICS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_addBadAp_cmd(struct wmi_t *wmip, A_UINT8 apIndex, A_UINT8 *bssid)
++{
++ void *osbuf;
++ WMI_ADD_BAD_AP_CMD *cmd;
++
++ if ((bssid == NULL) || (apIndex > WMI_MAX_BAD_AP_INDEX)) {
++ return A_EINVAL;
++ }
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_ADD_BAD_AP_CMD *)(A_NETBUF_DATA(osbuf));
++ cmd->badApIndex = apIndex;
++ A_MEMCPY(cmd->bssid, bssid, sizeof(cmd->bssid));
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_ADD_BAD_AP_CMDID, NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_deleteBadAp_cmd(struct wmi_t *wmip, A_UINT8 apIndex)
++{
++ void *osbuf;
++ WMI_DELETE_BAD_AP_CMD *cmd;
++
++ if (apIndex > WMI_MAX_BAD_AP_INDEX) {
++ return A_EINVAL;
++ }
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_DELETE_BAD_AP_CMD *)(A_NETBUF_DATA(osbuf));
++ cmd->badApIndex = apIndex;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_DELETE_BAD_AP_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_txPwr_cmd(struct wmi_t *wmip, A_UINT8 dbM)
++{
++ void *osbuf;
++ WMI_SET_TX_PWR_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_TX_PWR_CMD *)(A_NETBUF_DATA(osbuf));
++ cmd->dbM = dbM;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_TX_PWR_CMDID, NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_get_txPwr_cmd(struct wmi_t *wmip)
++{
++ void *osbuf;
++
++ osbuf = A_NETBUF_ALLOC(0); /* no payload */
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_TX_PWR_CMDID, NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_switch_radio(struct wmi_t *wmip, A_UINT8 on)
++{
++ WMI_SCAN_PARAMS_CMD scParams = {0, 0, 0, 0, 0,
++ WMI_SHORTSCANRATIO_DEFAULT,
++ DEFAULT_SCAN_CTRL_FLAGS,
++ 0};
++
++ if (on) {
++ /* Enable foreground scanning */
++ if (wmi_scanparams_cmd(wmip, scParams.fg_start_period,
++ scParams.fg_end_period,
++ scParams.bg_period,
++ scParams.minact_chdwell_time,
++ scParams.maxact_chdwell_time,
++ scParams.pas_chdwell_time,
++ scParams.shortScanRatio,
++ scParams.scanCtrlFlags,
++ scParams.max_dfsch_act_time) != A_OK) {
++ return -EIO;
++ }
++ } else {
++ wmi_disconnect_cmd(wmip);
++ if (wmi_scanparams_cmd(wmip, 0xFFFF, 0, 0, 0,
++ 0, 0, 0, 0xFF, 0) != A_OK) {
++ return -EIO;
++ }
++ }
++
++ return A_OK;
++}
++
++
++A_UINT16
++wmi_get_mapped_qos_queue(struct wmi_t *wmip, A_UINT8 trafficClass)
++{
++ A_UINT16 activeTsids=0;
++
++ LOCK_WMI(wmip);
++ activeTsids = wmip->wmi_streamExistsForAC[trafficClass];
++ UNLOCK_WMI(wmip);
++
++ return activeTsids;
++}
++
++A_STATUS
++wmi_get_roam_tbl_cmd(struct wmi_t *wmip)
++{
++ void *osbuf;
++
++ osbuf = A_NETBUF_ALLOC(0); /* no payload */
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_ROAM_TBL_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_get_roam_data_cmd(struct wmi_t *wmip, A_UINT8 roamDataType)
++{
++ void *osbuf;
++ A_UINT32 size = sizeof(A_UINT8);
++ WMI_TARGET_ROAM_DATA *cmd;
++
++ osbuf = A_NETBUF_ALLOC(size); /* no payload */
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, size);
++
++ cmd = (WMI_TARGET_ROAM_DATA *)(A_NETBUF_DATA(osbuf));
++ cmd->roamDataType = roamDataType;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_ROAM_DATA_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_roam_ctrl_cmd(struct wmi_t *wmip, WMI_SET_ROAM_CTRL_CMD *p,
++ A_UINT8 size)
++{
++ void *osbuf;
++ WMI_SET_ROAM_CTRL_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, size);
++
++ cmd = (WMI_SET_ROAM_CTRL_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, size);
++
++ A_MEMCPY(cmd, p, size);
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_ROAM_CTRL_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_powersave_timers_cmd(struct wmi_t *wmip,
++ WMI_POWERSAVE_TIMERS_POLICY_CMD *pCmd,
++ A_UINT8 size)
++{
++ void *osbuf;
++ WMI_POWERSAVE_TIMERS_POLICY_CMD *cmd;
++
++ /* These timers can't be zero */
++ if(!pCmd->psPollTimeout || !pCmd->triggerTimeout ||
++ !(pCmd->apsdTimPolicy == IGNORE_TIM_ALL_QUEUES_APSD ||
++ pCmd->apsdTimPolicy == PROCESS_TIM_ALL_QUEUES_APSD) ||
++ !(pCmd->simulatedAPSDTimPolicy == IGNORE_TIM_SIMULATED_APSD ||
++ pCmd->simulatedAPSDTimPolicy == PROCESS_TIM_SIMULATED_APSD))
++ return A_EINVAL;
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, size);
++
++ cmd = (WMI_POWERSAVE_TIMERS_POLICY_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, size);
++
++ A_MEMCPY(cmd, pCmd, size);
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_POWERSAVE_TIMERS_POLICY_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++#ifdef CONFIG_HOST_GPIO_SUPPORT
++/* Send a command to Target to change GPIO output pins. */
++A_STATUS
++wmi_gpio_output_set(struct wmi_t *wmip,
++ A_UINT32 set_mask,
++ A_UINT32 clear_mask,
++ A_UINT32 enable_mask,
++ A_UINT32 disable_mask)
++{
++ void *osbuf;
++ WMIX_GPIO_OUTPUT_SET_CMD *output_set;
++ int size;
++
++ size = sizeof(*output_set);
++
++ A_DPRINTF(DBG_WMI,
++ (DBGFMT "Enter - set=0x%x clear=0x%x enb=0x%x dis=0x%x\n", DBGARG,
++ set_mask, clear_mask, enable_mask, disable_mask));
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++ A_NETBUF_PUT(osbuf, size);
++ output_set = (WMIX_GPIO_OUTPUT_SET_CMD *)(A_NETBUF_DATA(osbuf));
++
++ output_set->set_mask = set_mask;
++ output_set->clear_mask = clear_mask;
++ output_set->enable_mask = enable_mask;
++ output_set->disable_mask = disable_mask;
++
++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_OUTPUT_SET_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++/* Send a command to the Target requesting state of the GPIO input pins */
++A_STATUS
++wmi_gpio_input_get(struct wmi_t *wmip)
++{
++ void *osbuf;
++
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ osbuf = A_NETBUF_ALLOC(0);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_INPUT_GET_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++/* Send a command to the Target that changes the value of a GPIO register. */
++A_STATUS
++wmi_gpio_register_set(struct wmi_t *wmip,
++ A_UINT32 gpioreg_id,
++ A_UINT32 value)
++{
++ void *osbuf;
++ WMIX_GPIO_REGISTER_SET_CMD *register_set;
++ int size;
++
++ size = sizeof(*register_set);
++
++ A_DPRINTF(DBG_WMI,
++ (DBGFMT "Enter - reg=%d value=0x%x\n", DBGARG, gpioreg_id, value));
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++ A_NETBUF_PUT(osbuf, size);
++ register_set = (WMIX_GPIO_REGISTER_SET_CMD *)(A_NETBUF_DATA(osbuf));
++
++ register_set->gpioreg_id = gpioreg_id;
++ register_set->value = value;
++
++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_REGISTER_SET_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++/* Send a command to the Target to fetch the value of a GPIO register. */
++A_STATUS
++wmi_gpio_register_get(struct wmi_t *wmip,
++ A_UINT32 gpioreg_id)
++{
++ void *osbuf;
++ WMIX_GPIO_REGISTER_GET_CMD *register_get;
++ int size;
++
++ size = sizeof(*register_get);
++
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter - reg=%d\n", DBGARG, gpioreg_id));
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++ A_NETBUF_PUT(osbuf, size);
++ register_get = (WMIX_GPIO_REGISTER_GET_CMD *)(A_NETBUF_DATA(osbuf));
++
++ register_get->gpioreg_id = gpioreg_id;
++
++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_REGISTER_GET_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++/* Send a command to the Target acknowledging some GPIO interrupts. */
++A_STATUS
++wmi_gpio_intr_ack(struct wmi_t *wmip,
++ A_UINT32 ack_mask)
++{
++ void *osbuf;
++ WMIX_GPIO_INTR_ACK_CMD *intr_ack;
++ int size;
++
++ size = sizeof(*intr_ack);
++
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter ack_mask=0x%x\n", DBGARG, ack_mask));
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++ A_NETBUF_PUT(osbuf, size);
++ intr_ack = (WMIX_GPIO_INTR_ACK_CMD *)(A_NETBUF_DATA(osbuf));
++
++ intr_ack->ack_mask = ack_mask;
++
++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_INTR_ACK_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++#endif /* CONFIG_HOST_GPIO_SUPPORT */
++
++A_STATUS
++wmi_set_access_params_cmd(struct wmi_t *wmip, A_UINT16 txop, A_UINT8 eCWmin,
++ A_UINT8 eCWmax, A_UINT8 aifsn)
++{
++ void *osbuf;
++ WMI_SET_ACCESS_PARAMS_CMD *cmd;
++
++ if ((eCWmin > WMI_MAX_CW_ACPARAM) || (eCWmax > WMI_MAX_CW_ACPARAM) ||
++ (aifsn > WMI_MAX_AIFSN_ACPARAM))
++ {
++ return A_EINVAL;
++ }
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_ACCESS_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
++ cmd->txop = txop;
++ cmd->eCWmin = eCWmin;
++ cmd->eCWmax = eCWmax;
++ cmd->aifsn = aifsn;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_ACCESS_PARAMS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_retry_limits_cmd(struct wmi_t *wmip, A_UINT8 frameType,
++ A_UINT8 trafficClass, A_UINT8 maxRetries,
++ A_UINT8 enableNotify)
++{
++ void *osbuf;
++ WMI_SET_RETRY_LIMITS_CMD *cmd;
++
++ if ((frameType != MGMT_FRAMETYPE) && (frameType != CONTROL_FRAMETYPE) &&
++ (frameType != DATA_FRAMETYPE))
++ {
++ return A_EINVAL;
++ }
++
++ if (maxRetries > WMI_MAX_RETRIES) {
++ return A_EINVAL;
++ }
++
++ if (frameType != DATA_FRAMETYPE) {
++ trafficClass = 0;
++ }
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_RETRY_LIMITS_CMD *)(A_NETBUF_DATA(osbuf));
++ cmd->frameType = frameType;
++ cmd->trafficClass = trafficClass;
++ cmd->maxRetries = maxRetries;
++ cmd->enableNotify = enableNotify;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_RETRY_LIMITS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++void
++wmi_get_current_bssid(struct wmi_t *wmip, A_UINT8 *bssid)
++{
++ if (bssid != NULL) {
++ A_MEMCPY(bssid, wmip->wmi_bssid, ATH_MAC_LEN);
++ }
++}
++
++A_STATUS
++wmi_set_opt_mode_cmd(struct wmi_t *wmip, A_UINT8 optMode)
++{
++ void *osbuf;
++ WMI_SET_OPT_MODE_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_OPT_MODE_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->optMode = optMode;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_OPT_MODE_CMDID,
++ SYNC_BOTH_WMIFLAG));
++}
++
++A_STATUS
++wmi_opt_tx_frame_cmd(struct wmi_t *wmip,
++ A_UINT8 frmType,
++ A_UINT8 *dstMacAddr,
++ A_UINT8 *bssid,
++ A_UINT16 optIEDataLen,
++ A_UINT8 *optIEData)
++{
++ void *osbuf;
++ WMI_OPT_TX_FRAME_CMD *cmd;
++ osbuf = A_NETBUF_ALLOC(optIEDataLen + sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, (optIEDataLen + sizeof(*cmd)));
++
++ cmd = (WMI_OPT_TX_FRAME_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, (optIEDataLen + sizeof(*cmd)-1));
++
++ cmd->frmType = frmType;
++ cmd->optIEDataLen = optIEDataLen;
++ //cmd->optIEData = (A_UINT8 *)((int)cmd + sizeof(*cmd));
++ A_MEMCPY(cmd->bssid, bssid, sizeof(cmd->bssid));
++ A_MEMCPY(cmd->dstAddr, dstMacAddr, sizeof(cmd->dstAddr));
++ A_MEMCPY(&cmd->optIEData[0], optIEData, optIEDataLen);
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_OPT_TX_FRAME_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_adhoc_bconIntvl_cmd(struct wmi_t *wmip, A_UINT16 intvl)
++{
++ void *osbuf;
++ WMI_BEACON_INT_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_BEACON_INT_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->beaconInterval = intvl;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_BEACON_INT_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++
++A_STATUS
++wmi_set_voice_pkt_size_cmd(struct wmi_t *wmip, A_UINT16 voicePktSize)
++{
++ void *osbuf;
++ WMI_SET_VOICE_PKT_SIZE_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_VOICE_PKT_SIZE_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->voicePktSize = voicePktSize;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_VOICE_PKT_SIZE_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++
++A_STATUS
++wmi_set_max_sp_len_cmd(struct wmi_t *wmip, A_UINT8 maxSPLen)
++{
++ void *osbuf;
++ WMI_SET_MAX_SP_LEN_CMD *cmd;
++
++ /* maxSPLen is a two-bit value. If user trys to set anything
++ * other than this, then its invalid
++ */
++ if(maxSPLen & ~0x03)
++ return A_EINVAL;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_MAX_SP_LEN_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->maxSPLen = maxSPLen;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_MAX_SP_LEN_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_UINT8
++convert_userPriority_to_trafficClass(A_UINT8 userPriority)
++{
++ return (up_to_ac[userPriority & 0x7]);
++}
++
++A_UINT8
++wmi_get_power_mode_cmd(struct wmi_t *wmip)
++{
++ return wmip->wmi_powerMode;
++}
++
++A_STATUS
++wmi_verify_tspec_params(WMI_CREATE_PSTREAM_CMD *pCmd, A_BOOL tspecCompliance)
++{
++ return A_OK;
++}
++
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++static A_STATUS
++wmi_tcmd_test_report_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
++{
++
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ A_WMI_TCMD_RX_REPORT_EVENT(wmip->wmi_devt, datap, len);
++
++ return A_OK;
++}
++
++#endif /* CONFIG_HOST_TCMD_SUPPORT*/
++
++A_STATUS
++wmi_set_authmode_cmd(struct wmi_t *wmip, A_UINT8 mode)
++{
++ void *osbuf;
++ WMI_SET_AUTH_MODE_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_AUTH_MODE_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->mode = mode;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_AUTH_MODE_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_reassocmode_cmd(struct wmi_t *wmip, A_UINT8 mode)
++{
++ void *osbuf;
++ WMI_SET_REASSOC_MODE_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_REASSOC_MODE_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->mode = mode;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_REASSOC_MODE_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_lpreamble_cmd(struct wmi_t *wmip, A_UINT8 status)
++{
++ void *osbuf;
++ WMI_SET_LPREAMBLE_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_LPREAMBLE_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->status = status;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_LPREAMBLE_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_rts_cmd(struct wmi_t *wmip, A_UINT16 threshold)
++{
++ void *osbuf;
++ WMI_SET_RTS_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_RTS_CMD*)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->threshold = threshold;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_RTS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_wmm_cmd(struct wmi_t *wmip, WMI_WMM_STATUS status)
++{
++ void *osbuf;
++ WMI_SET_WMM_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_WMM_CMD*)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->status = status;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_WMM_CMDID,
++ NO_SYNC_WMIFLAG));
++
++}
++
++A_STATUS
++wmi_set_wmm_txop(struct wmi_t *wmip, WMI_TXOP_CFG cfg)
++{
++ void *osbuf;
++ WMI_SET_WMM_TXOP_CMD *cmd;
++
++ if( !((cfg == WMI_TXOP_DISABLED) || (cfg == WMI_TXOP_ENABLED)) )
++ return A_EINVAL;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_WMM_TXOP_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->txopEnable = cfg;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_WMM_TXOP_CMDID,
++ NO_SYNC_WMIFLAG));
++
++}
++
++#ifdef CONFIG_HOST_TCMD_SUPPORT
++/* WMI layer doesn't need to know the data type of the test cmd.
++ This would be beneficial for customers like Qualcomm, who might
++ have different test command requirements from differnt manufacturers
++ */
++A_STATUS
++wmi_test_cmd(struct wmi_t *wmip, A_UINT8 *buf, A_UINT32 len)
++{
++ void *osbuf;
++ char *data;
++
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
++
++ osbuf= A_NETBUF_ALLOC(len);
++ if(osbuf == NULL)
++ {
++ return A_NO_MEMORY;
++ }
++ A_NETBUF_PUT(osbuf, len);
++ data = A_NETBUF_DATA(osbuf);
++ A_MEMCPY(data, buf, len);
++
++ return(wmi_cmd_send(wmip, osbuf, WMI_TEST_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++#endif
++
++A_STATUS
++wmi_set_bt_status_cmd(struct wmi_t *wmip, A_UINT8 streamType, A_UINT8 status)
++{
++ void *osbuf;
++ WMI_SET_BT_STATUS_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_BT_STATUS_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->streamType = streamType;
++ cmd->status = status;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_BT_STATUS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_bt_params_cmd(struct wmi_t *wmip, WMI_SET_BT_PARAMS_CMD* cmd)
++{
++ void *osbuf;
++ WMI_SET_BT_PARAMS_CMD* alloc_cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ alloc_cmd = (WMI_SET_BT_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(alloc_cmd, sizeof(*cmd));
++ A_MEMCPY(alloc_cmd, cmd, sizeof(*cmd));
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_BT_PARAMS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_get_keepalive_configured(struct wmi_t *wmip)
++{
++ void *osbuf;
++ WMI_GET_KEEPALIVE_CMD *cmd;
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++ cmd = (WMI_GET_KEEPALIVE_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_KEEPALIVE_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_UINT8
++wmi_get_keepalive_cmd(struct wmi_t *wmip)
++{
++ return wmip->wmi_keepaliveInterval;
++}
++
++A_STATUS
++wmi_set_keepalive_cmd(struct wmi_t *wmip, A_UINT8 keepaliveInterval)
++{
++ void *osbuf;
++ WMI_SET_KEEPALIVE_CMD *cmd;
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*cmd));
++
++ cmd = (WMI_SET_KEEPALIVE_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd->keepaliveInterval = keepaliveInterval;
++ wmip->wmi_keepaliveInterval = keepaliveInterval;
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_KEEPALIVE_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_appie_cmd(struct wmi_t *wmip, A_UINT8 mgmtFrmType, A_UINT8 ieLen,
++ A_UINT8 *ieInfo)
++{
++ void *osbuf;
++ WMI_SET_APPIE_CMD *cmd;
++ A_UINT16 cmdLen;
++
++ if (ieLen > WMI_MAX_IE_LEN) {
++ return A_ERROR;
++ }
++ cmdLen = sizeof(*cmd) + ieLen - 1;
++ osbuf = A_NETBUF_ALLOC(cmdLen);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, cmdLen);
++
++ cmd = (WMI_SET_APPIE_CMD *)(A_NETBUF_DATA(osbuf));
++ A_MEMZERO(cmd, cmdLen);
++
++ cmd->mgmtFrmType = mgmtFrmType;
++ cmd->ieLen = ieLen;
++ A_MEMCPY(cmd->ieInfo, ieInfo, ieLen);
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_APPIE_CMDID, NO_SYNC_WMIFLAG));
++}
++
++A_STATUS
++wmi_set_halparam_cmd(struct wmi_t *wmip, A_UINT8 *cmd, A_UINT16 dataLen)
++{
++ void *osbuf;
++ A_UINT8 *data;
++
++ osbuf = A_NETBUF_ALLOC(dataLen);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, dataLen);
++
++ data = A_NETBUF_DATA(osbuf);
++
++ A_MEMCPY(data, cmd, dataLen);
++
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_WHALPARAM_CMDID, NO_SYNC_WMIFLAG));
++}
++
++A_INT32
++wmi_get_rate(A_INT8 rateindex)
++{
++ if (rateindex == RATE_AUTO) {
++ return 0;
++ } else {
++ return(wmi_rateTable[(A_UINT32) rateindex]);
++ }
++}
++
++void
++wmi_node_return (struct wmi_t *wmip, bss_t *bss)
++{
++ if (NULL != bss)
++ {
++ wlan_node_return (&wmip->wmi_scan_table, bss);
++ }
++}
++
++bss_t *
++wmi_find_Ssidnode (struct wmi_t *wmip, A_UCHAR *pSsid,
++ A_UINT32 ssidLength, A_BOOL bIsWPA2)
++{
++ bss_t *node = NULL;
++ node = wlan_find_Ssidnode (&wmip->wmi_scan_table, pSsid,
++ ssidLength, bIsWPA2);
++ return node;
++}
++
++void
++wmi_free_allnodes(struct wmi_t *wmip)
++{
++ wlan_free_allnodes(&wmip->wmi_scan_table);
++}
++
++bss_t *
++wmi_find_node(struct wmi_t *wmip, const A_UINT8 *macaddr)
++{
++ bss_t *ni=NULL;
++ ni=wlan_find_node(&wmip->wmi_scan_table,macaddr);
++ return ni;
++}
++
++A_STATUS
++wmi_dset_open_reply(struct wmi_t *wmip,
++ A_UINT32 status,
++ A_UINT32 access_cookie,
++ A_UINT32 dset_size,
++ A_UINT32 dset_version,
++ A_UINT32 targ_handle,
++ A_UINT32 targ_reply_fn,
++ A_UINT32 targ_reply_arg)
++{
++ void *osbuf;
++ WMIX_DSETOPEN_REPLY_CMD *open_reply;
++
++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter - wmip=0x%x\n", DBGARG, (int)wmip));
++
++ osbuf = A_NETBUF_ALLOC(sizeof(*open_reply));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ A_NETBUF_PUT(osbuf, sizeof(*open_reply));
++ open_reply = (WMIX_DSETOPEN_REPLY_CMD *)(A_NETBUF_DATA(osbuf));
++
++ open_reply->status = status;
++ open_reply->targ_dset_handle = targ_handle;
++ open_reply->targ_reply_fn = targ_reply_fn;
++ open_reply->targ_reply_arg = targ_reply_arg;
++ open_reply->access_cookie = access_cookie;
++ open_reply->size = dset_size;
++ open_reply->version = dset_version;
++
++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_DSETOPEN_REPLY_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
++static A_STATUS
++wmi_get_pmkid_list_event_rx(struct wmi_t *wmip, A_UINT8 *datap, A_UINT32 len)
++{
++ WMI_PMKID_LIST_REPLY *reply;
++ A_UINT32 expected_len;
++
++ if (len < sizeof(WMI_PMKID_LIST_REPLY)) {
++ return A_EINVAL;
++ }
++ reply = (WMI_PMKID_LIST_REPLY *)datap;
++ expected_len = sizeof(reply->numPMKID) + reply->numPMKID * WMI_PMKID_LEN;
++
++ if (len < expected_len) {
++ return A_EINVAL;
++ }
++
++ A_WMI_PMKID_LIST_EVENT(wmip->wmi_devt, reply->numPMKID,
++ reply->pmkidList);
++
++ return A_OK;
++}
++
++#ifdef CONFIG_HOST_DSET_SUPPORT
++A_STATUS
++wmi_dset_data_reply(struct wmi_t *wmip,
++ A_UINT32 status,
++ A_UINT8 *user_buf,
++ A_UINT32 length,
++ A_UINT32 targ_buf,
++ A_UINT32 targ_reply_fn,
++ A_UINT32 targ_reply_arg)
++{
++ void *osbuf;
++ WMIX_DSETDATA_REPLY_CMD *data_reply;
++ int size;
++
++ size = sizeof(*data_reply) + length;
++
++ A_DPRINTF(DBG_WMI,
++ (DBGFMT "Enter - length=%d status=%d\n", DBGARG, length, status));
++
++ osbuf = A_NETBUF_ALLOC(size);
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++ A_NETBUF_PUT(osbuf, size);
++ data_reply = (WMIX_DSETDATA_REPLY_CMD *)(A_NETBUF_DATA(osbuf));
++
++ data_reply->status = status;
++ data_reply->targ_buf = targ_buf;
++ data_reply->targ_reply_fn = targ_reply_fn;
++ data_reply->targ_reply_arg = targ_reply_arg;
++ data_reply->length = length;
++
++ if (status == A_OK) {
++ if (a_copy_from_user(data_reply->buf, user_buf, length)) {
++ return A_ERROR;
++ }
++ }
++
++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_DSETDATA_REPLY_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++#endif /* CONFIG_HOST_DSET_SUPPORT */
++
++A_STATUS
++wmi_set_wsc_status_cmd(struct wmi_t *wmip, A_UINT32 status)
++{
++ void *osbuf;
++ char *cmd;
++
++ wps_enable = status;
++
++ osbuf = a_netbuf_alloc(sizeof(1));
++ if (osbuf == NULL) {
++ return A_NO_MEMORY;
++ }
++
++ a_netbuf_put(osbuf, sizeof(1));
++
++ cmd = (char *)(a_netbuf_to_data(osbuf));
++
++ A_MEMZERO(cmd, sizeof(*cmd));
++ cmd[0] = (status?1:0);
++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_WSC_STATUS_CMDID,
++ NO_SYNC_WMIFLAG));
++}
++
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wmi/wmi_doc.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wmi/wmi_doc.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,4421 @@
++/*
++ *
++ * Copyright (c) 2004-2007 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++
++#if 0
++Wireless Module Interface (WMI) Documentaion
++
++ This section describes the format and the usage model for WMI control and
++ data messages between the host and the AR6000-based targets. The header
++ file include/wmi.h contains all command and event manifest constants as
++ well as structure typedefs for each set of command and reply parameters.
++
++Data Frames
++
++ The data payload transmitted and received by the target follows RFC-1042
++ encapsulation and thus starts with an 802.2-style LLC-SNAP header. The
++ WLAN module completes 802.11 encapsulation of the payload, including the
++ MAC header, FCS, and WLAN security related fields. At the interface to the
++ message transport (HTC), a data frame is encapsulated in a WMI message.
++
++WMI Message Structure
++
++ The WMI protocol leverages an 802.3-style Ethernet header in communicating
++ the source and destination information between the host and the AR6000
++ modules using a 14-byte 802.3 header ahead of the 802.2-style payload. In
++ addition, the WMI protocol adds a header to all data messages:
++
++ {
++ INT8 rssi
++ The RSSI of the received packet and its units are shown in db above the
++ noise floor, and the noise floor is shown in dbm.
++ UINT8 info
++ Contains information on message type and user priority. Message type
++ differentiates between a data packet and a synchronization message.
++ } WMI_DATA_HDR
++
++ User priority contains the 802.1d user priority info from host to target. Host
++ software translates the host Ethernet format to 802.3 format prior to Tx and
++ 802.3 format to host format in the Rx direction. The host does not transmit the
++ FCS that follows the data. MsgType differentiates between a regular data
++ packet (msgType=0) and a synchronization message (msgType=1).
++
++Data Endpoints
++
++ The AR6000 chipset provides several data endpoints to support quality of
++ service (QoS) and maintains separate queues and separate DMA engines for
++ each data endpoint. A data endpoint can be bi-directional.
++
++ Best effort (BE) class traffic uses the default data endpoint (2). The host can
++ establish up to two additional data endpoints for other traffic classes. Once
++ such a data endpoint is established, it sends and receives corresponding QoS
++ traffic in a manner similar to the default data endpoint.
++
++ If QoS is desired over the interconnect, host software must classify each data
++ packet and place it on the appropriate data endpoint. The information
++ required to classify data is generally available in-band as an 802.1p/q style
++ tag or as the ToS field in the IP header. The information may also be available
++ out-of-band depending on the host DDI.
++
++Connection States
++
++ Table B-1 describes the AR6000 WLAN connection states:
++
++ Table B-1. AR6000 Connection States
++
++Connection State
++ Description
++
++ DISCONNECTED
++ In this state, the AR6000 device is not connected to a wireless
++ network. The device is in this state after reset when it sends the
++ WIRELESS MODULE \93READY\94 EVENT, after it processes a
++ DISCONNECT command, and when it loses its link with the
++ access point (AP) that it was connected to. The device signals a
++ transition to the DISCONNECTED state with a \93DISCONNECT\94
++ event.
++
++CONNECTED
++ In this state, the AR6000 device is connected to wireless networks.
++ The device enters this state after successfully processing a
++ CONNECT, which establishes a connection with a wireless
++ network. The device signals a transition to the CONNECTED state
++ with a \93CONNECT\94 event.
++
++
++Message Types
++
++ WMI uses commands, replies, and events for the control and configuration of
++ the AR6000 device. The control protocol is asynchronous. Table B-2 describes
++ AR6000 message types:
++
++Table B-2. AR6000 Message Types
++
++Message Type
++ Description
++
++Commands
++ Control messages that flow from the host to the device
++
++Replies/Events
++ Control messages that flow from the device to the host.
++
++ The device issues a reply to some WMI commands, but not to others.
++ The payload in a reply is command-specific, and some commands do
++ not trigger a reply message at all. Events are control messages issued
++ by the device to signal the occurrence of an asynchronous event.
++
++
++WMI Message Format
++
++ All WMI control commands, replies and events use the header format:
++
++ WMI_CMD_HDR Header Format
++ {
++ UINT16 id
++ This 16-bit constant identifies which WMI command the host is issuing,
++ which command the target is replying to, or which event has occurred.
++ WMI_CMD_HDR
++ }
++
++
++ A variable-size command-, reply-, or event-specific payload follows the
++ header. Over the interconnect, all fields in control messages (including
++ WMI_CMD_HDR and the command specific payload) use 32-bit little Endian
++ byte ordering and fields are packed. The AR6000 device always executes
++ commands in order, and the host may send multiple commands without
++ waiting for previous commands to complete. A majority of commands are
++ processed to completion once received. Other commands trigger a longer
++ duration activity whose completion is signaled to the host through an event.
++
++Command Restrictions
++
++ Some commands may only be issued when the AR6000 device is in a certain
++ state. The host is required to wait for an event signaling a state transition
++ before such a command can be issued. For example, if a command requires
++ the device to be in the CONNECTED state, then the host is required to wait
++ for a \93CONNECT\94 event before it issues that command.
++
++ The device ignores any commands inappropriate for its current state. If the
++ command triggers a reply, the device generates an error reply. Otherwise, the
++ device silently ignores the inappropriate command.
++
++Command and Data Synchronization
++
++ WMI provides a mechanism for a host to advise the device of necessary
++ synchronization between commands and data. The device implements
++ synchronization; no implicit synchronization exists between endpoints.
++
++ The host controls synchronization using the \93SYNCHRONIZE\94 command
++ over the control channel and synchronization messages over data channels.
++ The device stops each data channel upon receiving a synchronization message
++ on that channel, processing all data packets received prior to that message.
++ After the device receives synchronization messages for each data endpoint
++ and the \93SYNCHRONIZE\94 command, it resumes all channels.
++
++ When the host must guarantee a command executes before processing new
++ data packets, it first issues the command, then issues the \93SYNCHRONIZE\94
++ command and sends synchronization messages on data channels. When the
++ host must guarantee the device has processed all old data packets before a
++ processing a new command, it issues a \93SYNCHRONIZE\94 command and
++ synchronization messages on all data channels, then issues the desired
++ command.
++
++
++
++WMI Commands
++
++ ADD_BAD_AP
++ Cause the AR6000 device to avoid a particular AP
++ ADD_CIPHER_KEY
++ Add or replace any of the four AR6000 encryption keys
++ ADD_WOW_PATTERN
++ Used to add a pattern to the WoW pattern list
++ CLR_RSSI_SNR
++ Clear the current calculated RSSI and SNR value
++ CONNECT_CMD
++ Request that the AR6000 device establish a wireless connection
++ with the specified SSID
++ CREATE_PSTREAM
++ Create prioritized data endpoint between the host and device
++ DELETE_BAD_AP
++ Clear an entry in the bad AP table
++ DELETE_CIPHER_KEY
++ Delete a previously added cipher key
++ DELETE_PSTREAM
++ Delete a prioritized data endpoint
++ DELETE_WOW_PATTERN
++ Remove a pre-specified pattern from the WoW pattern list
++ EXTENSION
++ WMI message interface command
++ GET_BIT_RATE
++ Retrieve rate most recently used by the AR6000
++ GET_CHANNEL_LIST
++ Retrieve list of channels used by the AR6000
++ GET_FIXRATES
++ Retrieves the rate-mask set via the SET_FIXRATES command.
++ GET_PMKID_LIST_CMD
++ Retrieve the firmware list of PMKIDs
++ GET_ROAM_DATA
++ Internal use for data collection; available in special build only
++ GET_ROAM_TBL
++ Retrieve the roaming table maintained on the target
++ GET_TARGET_STATS
++ Request that the target send the statistics it maintains
++ GET_TX_PWR
++ Retrieve the current AR6000 device Tx power levels
++ GET_WOW_LIST
++ Retrieve the current list of WoW patterns
++ LQ_THRESHOLD_PARAMS
++ Set the link quality thresholds
++ OPT_TX_FRAME
++ Send a special frame (special feature)
++ RECONNECT
++ Request a reconnection to a BSS
++ RSSI_THRESHOLD_PARAMS
++ Configure how the AR6000 device monitors and reports signal
++ strength (RSSI) of the connected BSS
++ SCAN_PARAMS
++ Determine dwell time and changes scanned channels
++ SET_ACCESS_PARAMS
++ Set access parameters for the wireless network
++ SET_ADHOC_BSSID
++ Set the BSSID for an ad hoc network
++ SET_AKMP_PARAMS
++ Set multiPMKID mode
++ SET_APPIE
++ Add application-specified IE to a management frame
++ SET_ASSOC_INFO
++ Specify the IEs the device should add to association or
++ reassociation requests
++ SET_AUTH_MODE
++ Set 802.11 authentication mode of reconnection
++ SET_BEACON_INT
++ Set the beacon interval for an ad hoc network
++ SET_BIT_RATE
++ Set the AR6000 to a specific fixed bit rate
++ SET_BMISS_TIME
++ Set the beacon miss time
++ SET_BSS_FILTER
++ Inform the AR6000 of network types about which it wants to
++ receive information using a \93BSSINFO\94 event
++ SET_BT_PARAMS
++ Set the status of a Bluetooth stream (SCO or A2DP) or set
++ Bluetooth coexistence register parameters
++ SET_BT_STATUS
++ Set the status of a Bluetooth stream (SCO or A2DP)
++ SET_CHANNEL_PARAMETERS
++ Configure WLAN channel parameters
++ SET_DISC_TIMEOUT
++ Set the amount of time the AR6000 spends attempting to
++ reestablish a connection
++ SET_FIXRATES
++ Set the device to a specific fixed PHY rate (supported subset)
++ SET_HALPARAM
++ Internal AR6000 command to set certain hardware parameters
++ SET_HOST_SLEEP_MODE
++ Set the host mode to asleep or awake
++ SET_IBSS_PM_CAPS
++ Support a non-standard power management scheme for an
++ ad hoc network
++ SET_LISTEN_INT
++ Request a listen interval
++ SET_LPREAMBLE
++ Override the short preamble capability of the AR6000 device
++ SET_MAX_SP_LEN
++ Set the maximum service period
++ SET_OPT_MODE
++ Set the special mode on/off (special feature)
++ SET_PMKID
++ Set the pairwise master key ID (PMKID)
++ SET_PMKID_LIST_CMD
++ Configure the firmware list of PMKIDs
++ SET_POWER_MODE
++ Set guidelines on trade-off between power utilization
++ SET_POWER_PARAMS
++ Configure power parameters
++ SET_POWERSAVE_PARAMS
++ Set the two AR6000 power save timers
++ SET_PROBED_SSID
++ Provide list of SSIDs the device should seek
++ SET_REASSOC_MODE
++ Specify whether the disassociated frame should be sent upon
++ reassociation
++ SET_RETRY_LIMITS
++ Limit how many times the device tries to send a frame
++ SET_ROAM_CTRL
++ Control roaming behavior
++ SET_RTS
++ Determine when RTS should be sent
++ SET_SCAN_PARAMS
++ Set the AR6000 scan parameters
++ SET_TKIP_COUNTERMEASURES
++ Enable/disable reports of TKIP MIC errors
++ SET_TX_PWR
++ Specify the AR6000 device Tx power levels
++ SET_VOICE_PKT_SIZE
++ Set voice packet size
++ SET_WMM
++ Override the AR6000 WMM capability
++ SET_WMM_TXOP
++ Configure TxOP bursting when sending traffic to a WMM-
++ capable AP
++ SET_WOW_MODE
++ Enable/disable WoW mode
++ SET_WSC_STATUS
++ Enable/disable profile check in cserv when the WPS protocol
++ is in progress
++ SNR_THRESHOLD_PARAMS
++ Configure how the device monitors and reports SNR of BSS
++ START_SCAN
++ Start a long or short channel scan
++ SYNCHRONIZE
++ Force a synchronization point between command and data
++ paths
++ TARGET_REPORT_ERROR_BITMASK
++ Control \93ERROR_REPORT\94 events from the AR6000
++
++
++
++
++Name
++ ADD_BAD_AP
++
++Synopsis
++ The host uses this command to cause the AR6000 to avoid a particular AP. The
++ AR6000 maintain a table with up to two APs to avoid. An ADD_BAD_AP command
++ adds or replaces the specified entry in this bad AP table.
++
++ If the AR6000 are currently connected to the AP specified in this command, they
++ disassociate.
++
++Command
++ wmiconfig eth1 --badap <bssid> <badApIndex>
++
++Command Parameters
++ UINT8 badApIndex Index [0...1] that identifies which entry in the
++ bad AP table to use
++
++
++ UINT8 bssid[6] MAC address of the AP to avoid
++
++Command Values
++ badApIndex = 0, 1 Entry in the bad AP table to use
++
++Reset Value
++ The bad AP table is cleared
++
++Restrictions
++ None
++
++See Also
++ \93DELETE_BAD_AP\94 on page B-13
++
++=====================================================================
++Name
++ ADD_CIPHER_KEY
++
++Synopsis
++ The host uses this command to add/replace any of four encryption keys on the
++ AR6000. The ADD_CIPHER_KEY command is issued after the CONNECT event
++ has been received by the host for all dot11Auth modes except for SHARED_AUTH.
++ When the dot11AuthMode is SHARED_AUTH, then the ADD_CIPHER_KEY
++ command should be issued before the \93CONNECT\94 command.
++
++Command
++ wmiconfig eth1 --cipherkey <keyIndex> <keyType> <keyUsage>
++ <keyLength> <keyopctrl> <keyRSC> <key>
++
++Command Parameters
++ UINT8 keyIndex Index (0...3) of the key to add/replace;
++ uniquely identifies the key
++ UINT8 keyType CRYPTO_TYPE
++ UINT8 keyUsage Specifies usage parameters of the key when
++ keyType = WEP_CRYPT
++ UINT8 keyLength Length of the key in bytes
++ UINT8 keyOpCtrl bit[0] = Initialize TSC (default),
++ bit[1] = Initialize RSC
++ UINT8 keyRSC[8] Key replay sequence counter (RSC) initial
++ value the device should use
++ UINT8 key[32] Key material used for this connection
++ Command Values
++ {
++ NONE_CRYPT = 1
++ WEP_CRYPT = 2
++ TKIP_CRYPT = 3
++ AES_CRYPT = 4
++ KEY_OP_INIT_TSC 0x01
++ KEY_OP_INIT_RSC 0x02
++ KEY_OP_INIT_VAL 0x03
++ Default is to Initialize the TSC
++ KEY_OP_VALID_MASK 0x04
++ Two operations defined
++ } CRYPTO_TYPE
++
++ {
++ PAIRWISE_USAGE = 0 Set if the key is used for unicast traffic only
++ GROUP_USAGE = 1 Set if the key is used to receive multicast
++ traffic (also set for static WEP keys)
++ TX_USAGE = 2 Set for the GROUP key used to transmit frames
++ All others are reserved
++ } KEY_USAGE
++
++Reset Value
++ The four available keys are disabled.
++
++Restrictions
++ The cipher should correspond to the encryption mode specified in the \93CONNECT\94
++ command.
++
++See Also
++ \93DELETE_CIPHER_KEY\94
++
++=====================================================================
++
++
++Name
++ ADD_WOW_PATTERN
++
++Synopsis
++ The host uses this command to add a pattern to the WoW pattern list; used for
++ pattern-matching for host wakeups by the WoW module. If the host mode is asleep
++ and WoW is enabled, all packets are matched against the existing WoW patterns. If a
++ packet matches any of the patterns specified, the target will wake up the host. All
++ non-matching packets are discarded by the target without being sent up to the host.
++
++Command
++ wmiconfig \96addwowpattern <list-id> <filter-size> <filter-offset>
++ <pattern> <mask>
++
++Command Parameters
++ A_UINT8 filter_list_id ID of the list that is to include the new pattern
++ A_UINT8 filter_size Size of the new pattern
++ A_UINT8 filter_offset Offset at which the pattern matching for this
++ new pattern should begin at
++ A_UINT8 filter[1] Byte stream that contains both the pattern and
++ the mask of the new WoW wake-up pattern
++
++Reply Parameters
++ None
++
++Reset Value
++ None defined (default host mode is awake)
++
++Restrictions
++ None
++
++See Also
++ \93DELETE_WOW_PATTERN\94
++
++=====================================================================
++
++
++Name
++ CLR_RSSI_SNR
++
++Synopsis
++ Clears the current calculated RSSI and SNR value. RSSI and SNR are reported by
++ running-average value. This command will clear the history and have a fresh start
++ for the running-average mechanism.
++
++Command
++ wmiconfig eth1 --cleanRssiSnr
++
++Command Parameters
++ None
++
++Reply Parameters
++ None
++
++Reset Value
++ None defined
++
++Restrictions
++ None
++
++=====================================================================
++
++Name
++ CONNECT_CMD
++
++Synopsis
++ New connect control information (connectCtrl) is added, with 32 possible modifiers.
++
++ CONNECT_SEND_REASSOC
++ Valid only for a host-controlled connection to a
++ particular AP. If this bit is set, a reassociation frame is
++ sent. If this bit is clear, an association request frame is
++ sent to the AP.
++
++ CONNECT_IGNORE_WPAx_GROUP_CIPHER
++ No group key is issued in the CONNECT command,
++ so use the group key advertised by the AP. In a target-
++ initiated roaming situation this allows a STA to roam
++ between APs that support different multicast ciphers.
++
++ CONNECT_PROFILE_MATCH_DONE
++ In a host-controlled connection case, it is possible that
++ during connect, firmware may not have the
++ information for a profile match (e.g, when the AP
++ supports hidden SSIDs and the device may not
++ transmit probe requests during connect). By setting
++ this bit in the connection control information, the
++ firmware waits for a beacon from the AP with the
++ BSSID supplied in the CONNECT command. No
++ additional profile checks are done.
++
++ CONNECT_IGNORE_AAC_BEACON
++ Ignore the Admission Capacity information in the
++ beacon of the AP
++
++ CONNECT_ASSOC_POLICY_USER
++ When set, the CONNECT_SEND_REASSOC setting
++ determines if an Assoc or Reassoc is sent to an AP
++
++Command
++ wmiconfig --setconnectctrl <ctrl flags bitmask>
++
++Command Parameters
++ typedef struct{
++ A_UINT8 networktype;
++ A_UINT8 dot11authmode;
++ A_UINT8 authmode;
++ A_UINT8 pairwiseCryptoType; /*CRYPTO_TYPE*/
++ A_UINT8 pairwiseCryptoLen;
++ A_UINT8 groupCryptoType; /*CRYPTO_TYPE*/
++ A_UINT8 groupCryptoLen;
++ A_UINT8 ssidLength;
++ A_UCHAR ssid[WMI_MAX_SSID_LEN];
++ A_UINT16 channel;
++ A_UINT8 bssid[AUTH_MAC_LEN];
++ A_UINT8 ctrl_flags; /*WMI_CONNECT_CTRL_FLAGS_BITS*/
++ } WMI_CONNECT_CMD;
++
++ ctrl flags bitmask
++ = 0x0001 CONNECT_ASSOC_POLICY_USER
++ Assoc frames are sent using the policy specified by
++ the flag
++ = 0x0002 CONNECT_SEND_REASSOC
++ Send Reassoc frame while connecting, otherwise send
++ assoc frames
++ = 0x0004 CONNECT_IGNORE_WPAx_GROUP_CIPHER
++ Ignore WPAx group cipher for WPA/WPA2
++ = 0x0008 CONNECT_PROFILE_MATCH_DONE
++ Ignore any profile check
++ = 0x0010 CONNECT_IGNORE_AAC_BEACON
++ Ignore the admission control information in the
++ beacon
++ ... CONNECT_CMD, continued
++ Command Values
++ typedef enum {
++ INFRA_NETWORK = 0x01,
++ ADHOC_NETWORK = 0x02,
++ ADHOC_CREATOR = 0x04,
++ } NETWORK_TYPE;
++
++ typedef enum {
++ OPEN_AUTH = 0x01,
++ SHARED_AUTH = 0x02,
++ LEAP_AUTH = 0x04,
++ } DOT11_AUTH_MODE;
++ typedef enum {
++ NONE_AUTH = 0x01,
++ WPA_AUTH = 0x02,
++ WPA_PSK_AUTH = 0x03,
++ WPA2_AUTH = 0x04,
++ WPA2_PSK_AUTH = 0x05,
++ WPA_AUTH_CCKM = 0x06,
++ WPA2_AUTH_CCKM = 0x07,
++ } AUTH_MODE;
++ typedef enum {
++ NONE_CRYPT = 0x01,
++ WEP_CRYPT = 0x02,
++ TKIP_CRYPT = 0x03,
++ AES_CRYPT = 0x04,
++ } CRYPTO_TYPE;
++ typedef enum {
++ CONNECT_ASSOC_POLICY_USER = 0x0001,
++ CONNECT_SEND_REASSOC = 0x0002,
++ CONNECT_IGNORE_WPAx_GROUP_CIPHER = 0x0004,
++ CONNECT_PROFILE_MATCH_DONE = 0x0008,
++ CONNECT_IGNORE_AAC_BEACON = 0x0010,
++ } WMI_CONNECT_CTRL_FLAGS_BITS;
++
++ pairwiseCryptoLen and groupCryptoLen are valid when the respective
++ CryptoTypesis WEP_CRYPT, otherwise this value should be 0. This is the length in
++ bytes.
++
++Reset Value
++ None defined
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ CREATE_PSTREAM
++
++Synopsis
++ The host uses this command to create a new prioritized data endpoint between the
++ host and the AR6000 device that carries a prioritized stream of data. If the AP that the
++ device connects to requires TSPEC stream establishment, the device requests the
++ corresponding TSPEC with the AP. The maximum and minimum service interval
++ ranges from 0 \96 0x7FFFFFFF (ms), where 0 = disabled. The device does not send a
++ reply event for this command, as it is always assumed the command has succeeded.
++ An AP admission control response comes to the host via a WMI_CAC_INDICATION
++ event, once the response for the ADDTS frame comes.
++
++ Examples of cases where reassociation is generated (when WMM) and cases where
++ ADDTS is generated (when WMM and enabling ACM) are when:
++ Changing UAPSD flags in WMM mode, reassociation is generated
++ Changing the interval of sending auto QoS Null frame in WMM mode;
++ reassociation is not generated
++ Issuing a command with same previous parameters in WMM mode and enabling
++ ACM, an ADDTS request is generated
++ Changing the interval of a QoS null frame sending in WMM mode and enabling
++ ACM, an ADDTS request is generated
++ Issuing the command in disconnected state, reassociation or ADDTS is not
++ generated but the parameters are available after (re)association
++
++Command
++ --createqos <user priority> <direction> <traffic class>
++<trafficType> <voice PS capability> <min service interval> <max
++service interval> <inactivity interval> <suspension interval>
++<service start time> <tsid> <nominal MSDU> <max MSDU> <min data
++rate> <mean data rate> <peak data rate> <max burst size> <delay
++bound> <min phy rate> <sba> <medium time> where:
++
++ <user priority>
++ 802.1D user priority range (0\967)
++ <direction>
++ = 0 Tx (uplink) traffic
++ = 1 Rx (downlink) traffic
++ = 2 Bi-directional traffic
++ <traffic class>
++ = 1 BK
++ = 2 VI
++ = 3 VO
++ <trafficType>
++ = 0 Aperiodic
++ = 1 Periodic
++ <voice PS capability>
++ Specifies whether the voice power save mechanism
++ (APSD if AP supports it or legacy/simulated APSD
++ [using PS-Poll]) should be used
++ = 0 Disable voice power save for traffic class
++ = 1 Enable APSD voice power save for traffic class
++ = 2 Enable voice power save for all traffic classes
++ <min service interval>
++ (In ms)
++ <max service interval>
++ Inactivity interval (in ms) (0 = Infinite)
++ <suspension interval>
++ (In ms)
++ <service start time>
++ Service start time
++ <tsid>
++ TSID range (0\9615)
++ <nominal MSDU>
++ Nominal MAC SDU size
++ <max MSDU>
++ Maximum MAC SDU size
++ <min data rate>
++ Minimum data rate (in bps)
++ <mean data rate>
++ Mean data rate (in bps)
++ <peak data rate>
++ Peak data rate (in bps)
++ <max burst size>
++ Maximum burst size (in bps)
++ <delay bound>
++ Delay bound
++ <min phy rate>
++ Minimum PHY rate (in bps)
++ <sba>
++ Surplus bandwidth allowance
++ <medium time>
++ Medium time in TU of 32-ms periods per sec
++ ... CREATE_PSTREAM (continued)
++
++Command Parameters
++ UINT8 trafficClass TRAFFIC_CLASS value
++ UINT8 traffic
++ Direction
++ DIR_TYPE value
++ UINT8 rxQueueNum
++ AR6000 device mailbox index (2 or 3)
++ corresponding to the endpoint the host
++ wishes to use to receive packets for the
++ prioritized stream
++ UINT8 trafficType TRAFFIC_TYPE value
++ UINT8 voicePS
++Capability
++ VOICEPS_CAP_TYPE value
++ UINT8 tsid Traffic stream ID
++ UINT8 userPriority 802.1D user priority
++ UINT16 nominalMSDU Nominal MSDU in octets
++ UINT16 maxMSDU Maximum MSDU in octets
++ UINT32 minServiceInt Minimum service interval: the min.
++ period of traffic specified (in ms)
++ UINT32 maxServiceInt Maximum service interval: the max.
++ period of traffic specified (in ms)
++ UINT32 inactivityInt Indicates how many ms an established
++ stream is inactive before the prioritized
++ data endpoint is taken down and the
++ corresponding T-SPEC deleted
++ UINT32 suspensionInt Suspension interval (in ms)
++ UINT32 service StartTime Service start time
++ UINT32 minDataRate Minimum data rate (in bps)
++ UINT32 meanDataRate Mean data rate (in bps)
++ UINT32 peakDataRate Peak data rate (in bps)
++ UINT32 maxBurstSize
++ UINT32 delayBound
++ UINT32 minPhyRate Minimum PHY rate for TSPEC (in bps)
++ UINT32 sba Surplus bandwidth allowance
++ UINT32 mediumTime Medium TSPEC time (in units of 32 ms)
++Command Values
++ {
++ WMM_AC_BE = 0 Best Effort
++ WMM_AC_BK = 1 Background
++ WMM_AC_VI = 2 Video
++ WMM_AC_VO = 3 Voice
++ All other values reserved
++ } TRAFFIC_CLASS
++ {
++ UPLINK_TRAFFIC = 0 From the AR6000 device to the AP
++ DOWNLINK_TRAFFIC = 1 From the AP to the AR6000 device
++ BIDIR_TRAFFIC = 2 Bi-directional traffic
++ All other values reserved
++ } DIR_TYPE
++ {
++ DISABLE_FOR_THIS_AC = 0
++ ENABLE_FOR_THIS_AC = 1
++ ENABLE_FOR_ALL_AC = 2
++ All other values reserved
++ } VOICEPS_CAP_TYPE
++
++ ... CREATE_PSTREAM (continued)
++
++
++ VI BE BK Supported, Y/N?
++ 0 0 0 0 Y
++ 0 0 0 1 Y
++ 0 0 1 0 N
++ 0 0 1 1 N
++ 0 1 0 0 Y
++ 0 1 0 1 Y
++ 0 1 1 0 N
++ 0 1 1 1 N
++ 1 0 0 0 Y
++ 1 0 0 1 Y
++ 1 0 1 0 N
++ 1 1 0 0 N
++ 1 1 0 1 Y
++ 1 1 0 0 N
++ 1 1 1 0 N
++ 1 1 1 1 Y
++
++Reset Value
++ No pstream is present after reset; each of the BE, BK, VI,VO pstreams must be created
++ (either implicitly by data flow or explicitly by user)
++
++Restrictions
++ This command can only be issued when the device is in the CONNECTED state. If
++ the device receives the command while in DISCONNECTED state, it replies with a
++ failure indication. At most four prioritized data endpoints can be created, one for
++ each AC.
++
++See Also
++ \93DELETE_PSTREAM\94
++=====================================================================
++
++Name
++ DELETE_BAD_AP
++
++Synopsis
++ The host uses this command to clear a particular entry in the bad AP table
++
++Command
++ wmiconfig eth1 --rmAP [--num=<index>] // used to clear a badAP
++ entry. num is index from 0-3
++
++Command Parameters
++ UINT8 badApIndex Index [0...n] that identifies the entry in the bad
++ AP table to delete
++
++Command Values
++ badApIndex = 0, 1, 2, 3
++ Entry in the bad AP table
++
++Reset Value
++ None defined
++
++Restrictions
++ None
++
++See Also
++ \93ADD_BAD_AP\94
++
++=====================================================================
++
++
++Name
++ DELETE_CIPHER_KEY
++
++Synopsis
++ The host uses this command to delete a key that was previously added with the
++ \93ADD_CIPHER_KEY\94 command.
++
++Command
++ TBD
++
++Command Parameters
++ UINT8 keyIndex Index (0...3) of the key to be deleted
++
++Command Values
++ keyIndex = 0, 1,2, 3 Key to delete
++
++Reset Value
++ None
++
++Restrictions
++ The host should not delete a key that is currently in use by the AR6000.
++
++See Also
++ \93ADD_CIPHER_KEY\94
++
++=====================================================================
++
++Name
++ DELETE_PSTREAM
++
++Synopsis
++ The host uses this command to delete a prioritized data endpoint created by a
++ previous \93CREATE_PSTREAM\94 command
++
++Command
++ --deleteqos <trafficClass> <tsid>, where:
++
++ <traffic class>
++ = 0 BE
++ = 1 BK
++ = 2 VI
++ = 3 VO
++ <tsid>
++ The TSpec ID; use the -qosqueue option
++ to get the active TSpec IDs for each traffic class
++
++Command Parameters
++ A_UINT8 trafficClass Indicate the traffic class of the stream
++ being deleted
++
++Command Values
++ {
++ WMM_AC_BE = 0 Best effort
++ WMM_AC_BK = 1 Background
++ WMM_AC_VI = 2 Video
++ WMM_AC_VO = 3 Voice
++ } TRAFFIC CLASS
++
++ 0-15 for TSID
++
++Reply Values
++ N/A
++
++Restrictions
++ This command should only be issued after a \93CREATE_PSTREAM\94 command has
++ successfully created a prioritized stream
++
++See Also
++ \93CREATE_PSTREAM\94
++
++=====================================================================
++
++
++Name
++ DELETE_WOW_PATTERN
++
++Synopsis
++ The host uses this command to remove a pre-specified pattern from the
++ WoW pattern list.
++
++Command
++ wmiconfig \96delwowpattern <list-id> <pattern-id>
++
++Command Parameters
++ A_UINT8 filter_list_id ID of the list that contains the WoW filter
++ pattern to delete
++ A_UINT8 filter_id ID of the WoW filter pattern to delete
++
++Reply Parameters
++ None
++
++
++
++Reset Value
++ None defined
++
++Restrictions
++ None
++
++See Also
++ \93ADD_WOW_PATTERN\94
++
++=====================================================================
++
++
++Name
++ EXTENSION
++
++Synopsis
++ The WMI message interface is used mostly for wireless control messages to a wireless
++ module applicable to wireless module management regardless of the target platform
++ implementation. However, some commands only peripherally related to wireless
++ management are desired during operation. These wireless extension commands may
++ be platform-specific or implementation-dependent.
++
++Command
++ N/A
++
++Command Parameters
++ Command-specific
++
++Command Values
++ Command-specific
++
++Reply Parameters
++ Command-specific
++
++Reset Values
++ None defined
++
++Restrictions
++ None defined
++
++=====================================================================
++
++
++Name
++ GET_BIT_RATE
++
++Synopsis
++ Used by the host to obtain the rate most recently used by the AR6000 device
++
++Command
++ wmiconfig eth1 --getfixrates
++
++Command Parameters
++ None
++
++
++
++Reply Parameters
++ INT8
++ rateIndex
++ See the \93SET_BIT_RATE\94 command
++
++Reset Values
++ None
++
++Restrictions
++ This command should only be used during development/debug; it is not intended
++for use in production. It is only valid when the device is in the CONNECTED state
++
++See Also
++ \93SET_BIT_RATE\94
++
++=====================================================================
++
++
++Name
++ GET_CHANNEL_LIST
++
++Synopsis
++ Used by the host uses to retrieve the list of channels that can be used by the device
++ while in the current wireless mode and in the current regulatory domain.
++
++Command
++ TBD
++
++Command Parameters
++ None
++
++Reply Parameters
++ UINT8 reserved Reserved
++ UINT8 numberOfChannels Number of channels the reply contains
++ UINT16 channelList[numberOfChannels] Array of channel frequencies (in MHz)
++
++Reset Values
++ None defined
++
++Restrictions
++ The maximum number of channels that can be reported are 32
++
++=====================================================================
++
++
++Name
++ GET_FIXRATES
++
++Synopsis
++ Clears the current calculated RSSI and SNR value. RSSI and SNR are reported by
++ running-average value. This command will clear the history and have a fresh start for
++ the running-average mechanism.
++
++Synopsis
++ This returns rate-mask set via WMI_SET_FIXRATES to retrieve the current fixed rate
++ that the AR6001 or AR6001 is using. See \93SET_FIXRATES\94.
++
++Command
++ wmiconfig eth1 --getfixrates
++
++Command Parameters
++ A_UINT16 fixRateMask; Note: if this command is used prior to
++ using WMI_SET_FIXRATES, AR6000
++ returns 0xffff as fixRateMask, indicating
++ all the rates are enabled
++
++Reply Parameters
++ None
++
++Reset Value
++ None defined
++
++Restrictions
++ None
++
++See Also
++ \93SET_FIXRATES\94
++
++=====================================================================
++
++
++
++Name
++ GET_PMKID_LIST_CMD
++
++Synopsis
++ Retrieves the list of PMKIDs on the firmware. The
++ WMI_GET_PMKID_LIST_EVENT is generated by the firmware.
++
++Command
++ TBD
++
++Command Parameters
++
++Reset Values
++ None
++
++Restrictions
++ None
++
++See Also
++ SET_PMKID_LIST_CMD GET_PMKID_LIST_EVENT
++
++=====================================================================
++
++
++Name
++ GET_ROAM_TBL
++
++Synopsis
++ Retrieve the roaming table maintained on the target. The response is reported
++ asynchronously through the ROAM_TBL_EVENT.
++
++Command
++ wmiconfig --getroamtable <roamctrl> <info>
++
++Command Parameters
++ A_UINT8 roamCtrlType;
++ A_UINT16 roamMode
++ A_UINT16 numEntries
++ WMI_BSS_ROAM_INFO bssRoamInfo[1]
++
++Reply Value
++ Reported asynchronously through the ROAM_TBL_EVENT
++
++Reset Value
++ None defined
++
++Restrictions
++ None
++
++See Also
++ SET_KEEPALIVE
++
++=====================================================================
++
++
++Name
++ GET_TARGET_STATS
++
++Synopsis
++ The host uses this command to request that the target send the statistics that it
++ maintains. The statistics obtained from the target are accrued in the host every time
++ the GET_TARGET_STATS command is issued. The --clearStats option is added to
++ clear the target statistics maintained in the host.
++
++Command
++ wmiconfig --getTargetStats --clearStats
++
++Command Parameters
++ TARGET_STATS targetStats
++ WMI_TARGET_STATS
++ UINT8 clearStats
++
++
++Reply Value
++ RSSI return value (0\96100)
++
++Reset Values
++ All statistics are cleared (zeroed)
++
++Restrictions
++ The --getTargetStats option must be used; the --clearStats option is also available also
++
++
++=====================================================================
++
++Name
++ GET_TX_PWR
++
++Synopsis
++ The host uses this command to retrieve the current Tx power level
++
++Command
++ wmiconfig -i eth1 --getpower
++
++Command Parameters
++ None
++
++Reply Parameters
++ UINT16 dbM The current Tx power level specified in dbM
++
++Reset Values
++ The maximum permitted by the regulatory domain
++
++Restrictions
++ None
++
++See Also
++ \93SET_TX_PWR\94
++
++=====================================================================
++
++
++Name
++ GET_WOW_LIST
++
++Synopsis
++ The host uses this command to retrieve the current list of WoW patterns.
++
++Command
++ wmiconfig \96getwowlist <list-id>
++
++Command Parameters
++ A_UINT8 filter_list_id ID of the list of WoW patterns to retrieve
++
++Reply Value(s)
++ A_UINT16 num_filters Number of WoW patterns contained in the list
++ A_UINT8 wow_mode Current mode of WoW (enabled or disabled)
++ A_UINT8 host_mode Current host mode (asleep or awake)
++ WOW_FILTER wow_filters[1]
++ Contents of the WoW filter pattern list
++ (contains mask, pattern, offset and size
++ information for each of the patterns)
++
++Reset Value
++ None defined
++
++Restrictions
++ None
++
++See Also
++ \93SET_WSC_STATUS\94
++
++=====================================================================
++
++
++Name
++ LQ_THRESHOLD_PARAMS
++
++Synopsis
++ Sets Link Quality thresholds, the sampling will happen at every unicast data frame
++ Tx if a certain threshold is met, and the corresponding event will be sent to the host.
++
++Command
++ --lqThreshold <enable> <upper_threshold_1> ...
++ <upper_threshold_4> <lower_threshold_1> ... <lower_threshold_4>
++
++Command Parameters
++ <enable> = 0 Disable link quality sampling
++ = 1 Enable link quality sampling
++ <upper_threshold_x> Above thresholds (value in [0,100]), in
++ ascending order
++ <lower_threshold_x> Below thresholds (value in [0,100]), in
++ ascending order
++
++Command Values
++ See command parameters
++
++Reset Value
++ None defined
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ OPT_TX_FRAME
++
++Synopsis
++ Special feature, sends a special frame.
++
++Command
++ wmiconfig --sendframe <frmType> <dstaddr> <bssid> <optIEDatalen>
++ <optIEData>
++
++Command Parameters
++ {
++ A_UINT16 optIEDataLen;
++ A_UINT8 frmType;
++ A_UINT8 dstAddr[ATH_MAC_LEN];
++ A_UINT8 bssid[ATH_MAC_LEN];
++ A_UINT8 optIEData[1];
++ } WMI_OPT_TX_FRAME_CMD;
++
++Command Values
++ <frmtype> = 1 Probe request frame
++ = 2 Probe response frame
++ = 3 CPPP start
++ = 4 CPPP stop
++
++Reset Value
++ None defined
++
++Restrictions
++ Send a special frame only when special mode is on.
++
++=====================================================================
++
++
++Name
++ RECONNECT
++
++Synopsis
++ This command requests a reconnection to a BSS to which the AR6000 device was
++ formerly connected
++
++Command
++ TBD
++
++Command Parameters
++ UINT16 channel Provides a hint as to which channel was
++ used for a previous connection
++ UINT8 bssid[6] If set, indicates which BSSID to connect to
++
++Command Values
++ None
++
++Reset Values
++ None
++
++Restrictions
++ None
++
++See Also
++ \93CONNECT_CMD\94
++
++=====================================================================
++
++
++Name
++ RSSI_THRESHOLD_PARAMS
++
++Synopsis
++ Configures how the AR6000 device monitors and reports signal strength (RSSI) of the
++ connected BSS, which is used as a link quality metric. The four RSSI threshold sets (in
++ dbM) of the host specification divide the signal strength range into six segments.
++ When signal strength increases or decreases across one of the boundaries, an
++ RSSI_THRESHOLD event is signaled to the host. The host may then choose to take
++ action (such as influencing roaming).
++
++Command
++ wmiconfig eth1 --rssiThreshold <weight> <pollTime>
++ <above_threshold_val_1> ... <above_threshold_tag_6>
++ <above_threshold_val_6>
++ <below_threshold_tag_1> <below_threshold_val_1> ...
++ <below_threshold_tag_6> <below_threshold_val_6>
++
++Command Parameters
++ UINT8 weight Range in [1, 16] used to calculate average RSSI
++ UINT32 pollTime RSSI (signal strength) sampling frequency in
++ seconds (if pollTime = 0, single strength
++ sampling is disabled)
++ USER_RSS__THOLD tholds[12] Thresholds (6 x 2)
++
++Command Values
++ None defined
++
++Reset Values
++ pollTime is 0, and sampling is disabled
++
++Restrictions
++ Can only be issued if the AR6000 device is connected
++
++
++=====================================================================
++
++Name
++ SCAN_PARAMS
++
++Synopsis
++ The minact parameter determines the minimum active channel dwell time, within
++ which if the STA receives any beacon, it remains on that channel until the maxact
++ channel dwell time. If the STA does not receive a beacon within the minact dwell
++ time, it switches to scan the next channel.
++
++Command
++ wmiconfig -scan -minact=<ms> --maxact=<ms>
++
++Command Parameters
++ UINT16 maxact Channel dwell time (in ms), default = 0
++ UINT16 minact Channel dwell time (in ms), default = 105
++
++Command Values
++ See channel parameters
++
++Reset Values
++ None defined
++
++Restrictions
++ The minact value should be greater than 0; maxact should be between 5\9665535 ms
++ and greater than minact
++
++=====================================================================
++
++
++Name
++ SET_ACCESS_PARAMS
++
++Synopsis
++ Allows the host to set access parameters for the wireless network. A thorough
++ understanding of IEEE 802.11 is required to properly manipulate these parameters.
++
++Command
++ wmiconfig eth1 --acparams --txop <limit> --cwmin <0-15>
++ --cwmax <0-15> --aifsn<0-15>
++
++Command Parameters
++ UINT16 txop The maximum time (expressed in units of
++ 32 ms) the device can spend transmitting
++ after acquiring the right to transmit
++ UINT8 eCWmin Minimum contention window
++ UINT8 eCWmax Maximum contention window
++ UINT8 aifsn The arbitration inter-frame space number
++
++Command Values
++ None
++
++Reset Values
++ Reasonable defaults that vary, between endpoints (prioritized streams)
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_ADHOC_BSSID
++
++Synopsis
++ Allows the host to set the BSSID for an ad hoc network. If a network with this BSSID
++ is not found, the target creates an ad hoc network with this BSSID after the connect
++ WMI command is triggered (e.g., by the SIOCSIWESSID IOCTL).
++
++Command
++ wmiconfig eth1 --adhocbssid <bssid>
++
++Command Parameters
++ A_UINT8 bssid[ATH_MAC_LEN] BSSID is specified in xx:xx:xx:xx:xx:xx format
++
++Command Values
++ None
++
++Reset Values
++ None
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_AKMP_PARAMS
++
++Synopsis
++ Enables or disables multi PMKID mode.
++
++Command
++ wmiconfig eth1 --setakmp --multipmkid=<on/off>
++
++Command Parameters
++ typedef struct {
++ A_UINT32 akmpInfo;
++ } WMI_SET_AKMP_PARAMS_CMD;
++
++Command Values
++ akmpInfo;
++ bit[0] = 0
++ MultiPMKID mode is disabled and PMKIDs that
++ were set using the WMI_SET_PMKID_CMD are
++ used in the [Re]AssocRequest frame.
++ bit[0] = 1
++ MultiPMKID mode is enabled and PMKIDs issued
++ by the WMI_SET_PMKID_LIST_CMD are used in
++ the next [Re]AssocRequest sent to the AP.
++
++Reset Values
++ MultiPMKID mode is disabled
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_APPIE
++
++Synopsis
++ Add an application-specified IE to a management frame. The maximum length is
++ 76 bytes. Including the length and the element ID, this translates to 78 bytes.
++
++Command
++ wmiconfig --setappie <frame> <IE>, where:
++
++ frame
++ One of beacon, probe, respon, assoc
++
++ IE
++ A hex string beginning with DD (if = 0, no
++ IE is sent in the management frame)
++
++Command Parameters
++ mgmtFrmType;
++ A WMI_MGMT_FRAME_TYPE
++
++ ieLen;
++ Length of the IE to add to the GMT frame
++
++Command Values
++ None
++
++Reset Value
++ None defined
++
++Restrictions
++ Supported only for the probe request and association request management frame
++types. Also, only one IE can be added per management frame type.
++
++=====================================================================
++
++
++Name
++ SET_ASSOC_INFO
++
++Synopsis
++ The host uses this command to specify any information elements (IEs) it wishes the
++ AR6000 device to add to all future association and reassociation requests. IEs must be
++ correct and are used as is by the device. IEs specified through this command are
++ cleared with a DISCONNECT.
++
++Command
++ wmiconfig eth1 --setAssocIe <IE>
++
++Command Parameters
++ UINT8 ieType Used directly in 802.11 frames
++ UINT8 bufferSize Size of assocInfo (in bytes) ranging from
++ 0\96240. If = 0, previously set IEs are cleared.
++ UINT8 assocInfo[bufferSize] Used directly in 802.11 frames
++
++Command Values
++ None
++
++Reset Values
++ IEs are cleared
++
++Restrictions
++ This command can only be issued in the DISCONNECTED state
++
++=====================================================================
++
++
++Name
++ SET_AUTHMODE
++
++Synopsis
++ Sets the 802.11 authentication mode of reconnection
++
++Command
++ wmiconfig eth1 --setauthmode <mode>
++
++Command Parameters
++ UINT8 mode
++
++Command Values
++ mode = 0x00 Proceed with authentication during reconnect
++ = 0x01 Do not proceed with authentication during reconnect
++
++Reset Values
++ Authentication
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_BEACON_INT
++
++Synopsis
++ Sets the beacon interval for an ad hoc network. Beacon interval selection may have an
++ impact on power savings. To some degree, a longer interval reduces power
++ consumption but also decreases throughput. A thorough understanding of IEEE
++ 802.11 ad hoc networks is required to use this command effectively.
++
++Command
++ wmiconfig eth1 --ibssconintv
++
++Command Parameters
++ UINT16 beaconInterval Specifies the beacon interval in TU units (1024 ms)
++
++Command Values
++ None
++
++Reset Values
++ The default beacon interval is 100 TUs (102.4 ms)
++
++Restrictions
++ This command can only be issued before the AR6000 device starts an ad hoc network
++
++See Also
++ \93SET_IBSS_PM_CAPS\94
++
++=====================================================================
++
++
++Name
++ SET_BIT_RATE
++
++Synopsis
++ The host uses this command to set the AR6000 device to a specific fixed rate.
++
++Command
++ wmiconfig eth1 --setfixrates <rate_0> ... <rate_n>
++
++Command Parameters
++ INT8 rateIndex
++ A WMI_BIT_RATE value
++ {
++ RATE_AUTO = -1
++ RATE_1Mb = 0
++ RATE_2Mb = 1
++ RATE_5_5M = 2
++ RATE_11Mb = 3
++ RATE_6Mb = 4
++ RATE_9Mb = 5
++ RATE_12Mb = 6
++ RATE_18Mb = 7
++ RATE_24Mb = 8
++ RATE_36Mb = 9
++ RATE_48Mb = 10
++ RATE_54Mb = 11
++ } WMI_BIT_RATE
++
++
++Command Values
++ See command parameters
++
++Reset Values
++ The dynamic rate is determined by the AR6000 device
++
++Restrictions
++ This command is intended for use only during development/debug; it is not
++intended for use in production
++
++See Also
++ \93GET_BIT_RATE\94
++
++=====================================================================
++
++
++Name
++ SET_BMISS_TIME
++
++Synopsis
++ This command sets the beacon miss (BMISS) time, which the AR6000 hardware use
++ to recognize missed beacons. When an excessive number (15) of consecutive beacons
++ are missed, the AR6000 consider switching to a different BSS. The time can be
++ specified in number of beacons or in TUs.
++
++Command(s)
++ wmiconfig eth1 --setbmissbeacons=<val>
++ wmiconfig eth1 --setbmisstime=<val>
++
++Command Parameters
++ UINT16 bmissTime Specifies the beacon miss time
++ [1000...5000] in TUs (1024 ms)
++ UINT16 bmissbeacons Specifies the number of beacons [5...50]
++
++Command Values
++ None
++
++Reset Values
++ bmissTime is 1500 TUs (1536 ms)
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_BSS_FILTER
++
++Synopsis
++ The host uses this to inform the AR6000 device of the types of networks about which
++ it wants to receive information from the \93BSSINFO\94 event. As the device performs
++ either foreground or background scans, it applies the filter and sends \93BSSINFO\94
++ events only for the networks that pass the filter. If any of the bssFilter or the ieMask
++ filter matches, a BSS Info is sent to the host. The ieMask currently is used as a match
++ for the IEs in the beacons, probe reponses and channel switch action management
++ frame. See also \93Scan and Roam\94 on page C-1.
++
++ The BSS filter command has been enhanced to support IE based filtering. The IEs can
++ be specified as a bitmask through this command using this enum.
++
++Command
++ wmiconfig eth1 \96filter = <filter> --ieMask 0x<mask>
++
++Command Parameters
++ UINT8 BssFilter
++
++ Command Values
++ typedef struct {
++ A_UINT8 bssFilter; See WMI_BSS_FILTER
++ A_UINT32 ieMask;
++ } __ATTRIB_PACK WMI_BSS_FILTER_CMD;
++
++ The ieMask can take this combination of values:
++
++ enum {
++ BSS_ELEMID_CHANSWITCH = 0x01
++ BSS_ELEMID_ATHEROS = 0x02,
++ }
++
++Reply Value
++ None
++
++Reset Value
++ BssFilter = NONE_BSS_FILTER (0)
++
++Restrictions
++ None
++
++See Also
++ \93CONNECT_CMD\94
++
++=====================================================================
++
++
++Name
++ SET_BT_PARAMS
++
++Synopsis
++ This command is used to set the status of a Bluetooth stream or set Bluetooth
++ coexistence register parameters. The stream may be an SCO or an A2DP stream and
++ its status can be started/stopped/suspended/resumed.
++
++Command
++ wmiconfig \96setBTparams <paramType> <params>
++
++Command Parameters
++ struct {
++ union {
++ BT_PARAMS_SCO scoParams;
++ BT_PARAMS_A2DP a2dpParams;
++ BT_PARAMS_MISC miscParams;
++ BT_COEX_REGS regs;
++ } info;
++ A_UINT8 paramType;
++ struct {
++ A_UINT8 noSCOPkts; Number of SCO packets between consecutive PS-POLLs
++ A_UINT8 pspollTimeout;
++ A_UINT8 stompbt;
++ } BT_PARAMS_SCO;
++ struct {
++ A2DP BT stream parameters
++ A_UINT32 period;
++ A_UINT32 dutycycle;
++ A_UINT8 stompbt;
++ } BT_PARAMS_A2DP;
++ struct {
++ union {
++ WLAN_PROTECT_POLICY_TYPE protectParams;
++ A_UINT16 wlanCtrlFlags;
++ }info;
++ A_UINT8 paramType;
++ } BT_PARAMS_MISC;
++ struct {
++ BT coexistence registers values
++ A_UINT32 mode; Coexistence mode
++ A_UINT32 scoWghts; WLAN and BT weights
++ A_UINT32 a2dpWghts;
++ A_UINT32 genWghts;
++ A_UINT32 mode2; Coexistence mode2
++ A_UINT8 setVal;
++ } BT_COEX_REGS;
++
++Command Values
++ None defined
++
++Reset Value
++ None
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_BT_STATUS
++
++Synopsis
++ Sets the status of a Bluetooth stream. The stream may be a SCO or an A2DP stream
++ and its status can be started/stopped/suspended/resumed.
++
++Command
++ wmiconfig \96setBTstatus <streamType> <status>
++
++Command Parameters
++ {
++ A_UINT8 streamType; Stream type
++ A_UINT8 status; Stream status
++ }WMI_SET_BT_STATUS_CMD;
++
++Command Values
++ {
++ BT_STREAM_UNDEF = 0
++ BT_STREAM_SCO
++ SCO stream
++ BT_STREAM_A2DP
++ A2DP stream
++ BT_STREAM_MAX
++ } BT_STREAM_TYPE;
++
++ {
++ BT_STATUS_UNDEF = 0
++ BT_STATUS_START
++ BT_STATUS_STOP
++ BT_STATUS_RESUME
++ BT_STATUS_SUSPEND
++ BT_STATUS_MAX
++ } BT_STREAM_STATUS;
++
++Reset Value
++ None defined
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_CHANNEL_PARAMETERS
++
++Synopsis
++ Configures various WLAN parameters related to channels, sets the wireless mode,
++ and can restrict the AR6000 device to a subset of available channels. The list of
++ available channels varies depending on the wireless mode and the regulatory
++ domain. The device never operates on a channel outside of its regulatory domain. The
++ device starts to scan the list of channels right after this command.
++
++Command
++ wmiconfig eth1 --wmode <mode> <list>
++
++Command Parameters
++ UINT8 phyMode See Values below.
++ UINT8 numberOfChannels
++ Number of channels in the channel array that
++ follows. If = 0, then the device uses all of the
++ channels permitted by the regulatory domain
++ and by the specified phyMode.
++ UINT16 channel[numberOfChannels]
++ Array listing the subset of channels (expressed
++ as frequencies in MHz) the host wants the
++ device to use. Any channel not permitted by
++ the specified phyMode or by the specified
++ regulatory domain is ignored by the device.
++
++Command Values
++ phyMode = {
++ Wireless mode
++ 11a = 0x01
++ 11g = 0x02
++ 11ag = 0x03
++ 11b = 0x04
++ 11g only = 0x05
++ }
++
++Reset Values
++ phyMode
++ 11ag
++ 802.11a/g modules
++ 11g
++ 802.11g module
++ channels
++ Defaults to all channels permitted by the
++ current regulatory domain.
++
++Restrictions
++ This command, if issued, should be issued soon after reset and prior to the first
++ connection. This command should only be issued in the DISCONNECTED state.
++
++=====================================================================
++
++
++Name
++ SET_DISC_TIMEOUT
++
++Synopsis
++ The host uses this command to configure the amount of time that the AR6000 should
++ spend when it attempts to reestablish a connection after losing link with its current
++ BSS. If this time limit is exceeded, the AR6000 send a \93DISCONNECT\94 event. After
++ sending the \93DISCONNECT\94 event the AR6000 continues to attempt to reestablish a
++ connection, but they do so at the interval corresponding to a foreground scan as
++ established by the \93SET_SCAN_PARAMS\94 command.
++
++ A timeout value of 0 indicates that the AR6000 will disable all autonomous roaming,
++ so that the AR6000 will not perform any scans after sending a \93DISCONNECT\94
++ event to the host. The state is maintained until a shutdown or host sets different
++ timeout value from 0.
++
++Command
++ wmiconfig eth1 --disc=<timeout in seconds>
++
++Command Parameters
++ UINT8 disconnectTimeout
++ Specifies the time limit (in seconds) after
++ which a failure to reestablish a connection
++ results in a \93DISCONNECT\94 event
++
++Command Values
++ None
++
++Reset Values
++ disconnectTimeout is 10 seconds
++
++Restrictions
++ This command can only be issued while in a DISCONNECTED state
++
++=====================================================================
++
++
++Name
++ SET_FIXRATES
++
++Synopsis
++ By default, the AR6000 device uses all PHY rates based on mode of operation. If the
++ host application requires the device to use subset of supported rates, it can set those
++ rates with this command. In 802.11g mode, the AR6000 device takes the entire
++ 802.11g basic rate set and the rates specified with this command and uses it as the
++ supported rate set.
++
++ This rate set is advertised in the probe request and the assoc/re-assoc request as
++ supported rates. Upon successful association, the device modifies the rate set pool
++ using the: intersection of AP-supported rates with the union of the 802.11g basic rate
++ set and rates set using this command. The device picks transmission rates from this
++ pool based on a rate control algorithm.
++
++Command
++ TBD
++
++Command Parameters
++ A_UINT16 fixRateMask;
++ The individual bit is an index for rate table,
++ and setting the that index to 1 would set that
++ corresponding rate. E.g., fixRateMask = 9
++ (1001) sets 1 Mbps and 11 Mbps.
++
++Command Values
++ None
++
++Reset Value
++ None defined
++
++Restrictions
++ None
++
++See Also
++ \93GET_FIXRATES\94
++
++=====================================================================
++
++
++Name
++ SET_WHAL_PARAM
++
++Synopsis
++ An internal AR6000 command that is used to set certain hardware parameters. The
++ description of this command is in $WORKAREA/include/halapi.h.
++
++Command
++ TBD
++
++Command Parameters
++ ATH_HAL_SETCABTO_CMDID
++ Sets the timeout waiting for the multicast
++ traffic after a DTIM beacon (in TUs).
++
++Command Values
++ None
++
++Reset Value
++ Default = 10 TUs
++
++Restrictions
++ This command should be executed before issuing a connect command.
++
++=====================================================================
++
++
++Name
++ SET_HOST_SLEEP_MODE
++
++Synopsis
++ The host uses this command to set the host mode to asleep or awake. All packets are
++ delivered to the host when the host mode is awake. When host mode is asleep, only if
++ WoW is enabled and the incoming packet matches one of the specified WoW
++ patterns, will the packet be delivered to the host. The host will also be woken up by
++ the target for pattern-matching packets and important events.
++
++Command
++ wmiconfig \96sethostmode=<asleep/awake>
++
++Command Parameters
++ A_BOOL awake Set the host mode to awake
++ A_BOOL asleep Set the host mode to asleep
++
++Command Values
++ 1 = awake, 0 = asleep
++
++Reset Value
++ None defined (default host mode is awake)
++
++Restrictions
++ None
++
++
++=====================================================================
++
++Name
++ SET_IBSS_PM_CAPS
++
++Synopsis
++ Used to support a non-standard power management scheme for an ad hoc wireless
++ network consisting of up to eight stations (STAs) that support this form of power
++ saving (e.g., Atheros-based STAs). A thorough understanding of IEEE 802.11 ad hoc
++ networks is required to use this command effectively.
++
++Command
++ wmiconfig eth1 --ibsspmcaps --ps=<enable/disable>
++ --aw=<ATIM Windows in ms>
++ --ttl=<Time to live in number of beacon periods>
++ --to=<timeout in ms>
++
++Command Parameters
++ UINT8 power_saving
++ = 0
++ The non-standard power saving scheme is
++ disabled and maximum throughput (with no
++ power saving) is obtained.
++
++ = 1
++ Ad hoc power saving scheme is enabled (but
++ throughput may be decreased)
++
++ UINT16 atim_windows
++ Specifies the length (in ms) of the ad hoc traffic
++ indication message (ATIM) windows used in an ad
++ hoc network. All Atheros-based STAs that join the
++ network use this duration ATIM window.
++
++ The duration is communicated between wireless
++ STAs through an IE in beacons and probe responses.
++
++ The host sets atim_windows to control trade-offs
++ between power use and throughput. The value
++ chosen should be based on the beacon interval (see
++ the \93SET_BEACON_INT\94 command) on the
++ expected number of STAs in the IBSS, and on the
++ amount of traffic and traffic patterns between STAs.
++
++ UINT16 timeout_value
++ Specifies the timeout (in ms). The value is the same
++ for all ad hoc connections, but tracks separately for
++ each.
++
++ Applicable only for a beacon period and used to
++ derive actual timeout values on the Tx and Rx sides.
++ On the Tx side, the value defines a window during
++ which the STA accepts the frame(s) from the host for a
++ particular connection. Until closed, the window
++ restarts with every frame received from the host. On
++ the Rx side, indicates the time until which the STA
++ continues accepting frames from a particular
++ connection. The value resets with every frame
++ received. The value can be used to determine the
++ trade off between throughput and power.
++ Default = 10 ms
++
++ UINT8 ttl
++ Specifies the value in number of beacon periods. The
++ value is used to set a limit on the time until which a
++ frame is kept alive in the AR6001 before being
++ discarded. Default = 5
++
++Command Values
++ None
++
++Reset Values
++ By default, power_saving is enabled with atim_window = 20 ms
++
++Restrictions
++ Can only be issued before the AR6000 starts an ad hoc network
++
++See Also
++ \93SET_BEACON_INT\94
++
++=====================================================================
++
++
++
++Name
++ SET_LISTEN_INT
++
++Synopsis
++ The host uses this command to request a listen interval, which determines how often
++ the AR6000 device should wake up and listen for traffic. The listen interval can be set
++ by the TUs or by the number of beacons. The device may not be able to comply with
++ the request (e.g., if the beacon interval is greater than the requested listen interval, the
++ device sets the listen interval to the beacon interval). The actual listen interval used
++ by the device is available in the \93CONNECT\94 event.
++
++Command
++ wmiconfig eth1 --listen=<#of TUs, can range from 15 to 3000>
++
++ --listenbeacons=<#of beacons, can range from 1 to 50>
++
++Command Parameters
++ UINT16 listenInterval
++ Specifies the listen interval in Kms
++ (1024 ms), ranging from 100 to 1000
++
++ UINT16 listenbeacons
++ Specifies the listen interval in beacons,
++ ranging from 1 to 50
++
++Command Values
++ None
++
++Reset Values
++ The device sets the listen interval equal to the beacon interval of the AP it associates
++ to.
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_LPREAMBLE
++
++Synopsis
++ Overrides the short preamble capability of the AR6000 device
++
++Command
++ TBD
++
++Command Parameters
++ WMI_LPREAMBLE_DISABLED
++ The device is short-preamble capable
++
++ WMI_LPREAMBLE_ENABLED
++ The device supports only the long-
++ preamble mode
++
++Command Values
++ None
++
++Reset Value
++ None defined
++
++Restrictions
++ None
++
++
++=====================================================================
++
++Name
++ SET_MAX_SP_LEN
++
++Synopsis
++ Set the maximum service period; indicates the number of packets the AR6001 can
++ receive from the AP when triggered
++
++Command
++ wmiconfig eth1 --setMaxSPLength <maxSPLen>
++
++Command Parameters
++ UINT8 maxSPLen
++ An APSD_SP_LEN_TYPE value
++
++Command Values
++ {
++ DELIVER_ALL_PKT = 0x0
++ DELIVER_2_PKT = 0x1
++ DELIVER_4_PKT = 0x2
++ DELIVER_6_PKT = 0x3
++ }APSD_SP_LEN_TYPE
++
++
++Reset Values
++ maxSPLen is DELIVER_ALL_PKT
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_OPT_MODE
++
++Synopsis
++ Special feature, sets the special mode on/off
++
++Command
++ wmiconfig eth1 --mode <mode>
++ Set the optional mode, where mode is special or off
++
++Command Parameters
++ enum {
++ SPECIAL_OFF
++ SPECIAL_ON
++ } OPT_MODE_TYPE;
++
++Command Values
++
++Reset Value
++ Mode = Off
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_PMKID
++
++Synopsis
++ The host uses this command to enable or disable a pairwise master key ID (PMKID)
++ in the AR6000 PMKID cache. The AR6000 clears its PMKID cache on receipt of a
++ DISCONNECT command from the host. Individual entries in the cache might be
++ deleted as the AR6000 detect new APs and decides to remove old ones.
++
++Command
++ wmiconfig eth1 --setbsspmkid --bssid=<aabbccddeeff>
++ --bsspmkid=<pmkid>
++
++Command Parameters
++ UINT8 bssid[6]
++ The MAC address of the AP that the
++ PMKID corresponds to (6 bytes in hex
++ format)
++
++ UINT8 enable
++ Either PMKID_DISABLE (0) to disable
++ the PMKID or PMKID_ENABLE (1) to
++ enable it (16 bytes in hex format)
++
++ UINT8 pmkid[16]
++ Meaningful only if enable is
++ PMKID_ENABLE, when it is the PMKID
++ that the AR6000 should use on the next
++ reassociation with the specified AP
++
++Command Values
++ enable
++ = 0 (disable), 1 (enable)
++ PKMID enabled/disabled
++
++Reset Values
++ None defined
++
++Restrictions
++ Only supported in infrastructure networks
++
++=====================================================================
++
++
++Name
++ SET_PMKID_LIST_CMD
++
++Synopsis
++ Configures the list of PMKIDs on the firmware.
++
++Command
++ wmiconfig --setpmkidlist --numpmkid=<n> --pmkid=<pmkid_1>
++ ... --pmkid=<pmkid_n>
++
++ Where n is the number of pmkids (maximum = 8) and pmkid_i is the ith pmkid (16
++ bytes in hex format)
++
++Command Parameters
++ {
++ A_UINT8 pmkid[WMI_PMKID_LEN];
++ } __ATTRIB_PACK WMI_PMKID;
++
++ {
++ A_UINT32 numPMKID;
++ WMI_PMKID pmkidList[WMI_MAX_PMKID_CACHE];
++ } __ATTRIB_PACK WMI_SET_PMKID_LIST_CMD;
++
++Command Values
++ None
++
++Reset Values
++ None
++
++Restrictions
++ Supported only in infrastructure modes
++
++=====================================================================
++
++
++Name
++ SET_POWER_MODE
++
++Synopsis
++ The host uses this command to provide the AR6000 device with guidelines on the
++ desired trade-off between power utilization and performance.
++
++ In normal power mode, the device enters a sleep state if they have nothing to do,
++ which conserves power but may cost performance as it can take up to 2 ms to
++ resume operation after leaving sleep state.
++
++ In maximum performance mode, the device never enters sleep state, thus no time
++ is spent waking up, resulting in higher power consumption and better
++ performance.
++
++Command
++ TBD
++
++Command Parameters
++ UINT8 powerMode
++ WMI_POWER_MODE value
++ {
++ REC_POWER = 1
++ (Recommended setting) Tries to conserve
++ power without sacrificing performance
++ MAX_PERF_POWER = 2
++ Setting that maximizes performance at
++ the expense of power
++
++ All other values are reserved
++ } WMI_POWER_MODE
++
++Command Values
++ See command parameters
++
++Reset Values
++ powerMode is REC_POWER
++
++Restrictions
++ This command should only be issued in the DISCONNECTED state for the
++ infrastructure network.
++
++ For a PM-disabled ad hoc network, the power mode should remain in
++ MAX_PERF_POWER.
++
++ For a PM-enabled ad hoc network, the device can have REC_POWER or
++ MAX_PERF_POWER set, but either way it must follow the power save ad hoc
++ protocol. The host can change power modes in the CONNECTED state.
++
++ Host changes to the PS setting when the STA is off the home channel take no effect
++ and cause a TARGET_PM_FAIL event.
++
++=====================================================================
++
++
++Name
++ SET_POWER_PARAMS
++
++Synopsis
++ The host uses this command to configure power parameters
++
++Command
++ wmiconfig eth1 --pmparams --it=<ms> --np=<number of PS POLL>
++ --dp=<DTIM policy: ignore/normal/stick>
++
++Command Parameters
++ UINT16 idle_period
++ Length of time (in ms) the AR6000 device
++ remains awake after frame Rx/Tx before going
++ to SLEEP state
++
++ UINT16 pspoll_number
++ The number of PowerSavePoll (PS-poll)
++ messages the device should send before
++ notifying the AP it is awake
++
++ UINT16 dtim_policy
++ A WMI_POWER_PARAMS_CMD value
++
++ {
++ IGNORE_DTIM =1
++ The device does not listen to any content after
++ beacon (CAB) traffic
++ NORMAL_DTIM = 2
++ DTIM period follows the listen interval (e.g., if
++ the listen interval is 4 and the DTIM period is 2,
++ the device wakes up every fourth beacon)
++ STICK_DTIM = 3
++ Device attempt to receive all CAB traffic (e.g., if
++ the DTIM period is 2 and the listen interval is 4,
++ the device wakes up every second beacon)
++ } WMI_POWER_PARAMS_CMD
++
++Command Parameters
++ See command parameters
++
++Reset Values
++ idle_period
++ 200 ms
++
++ pspoll_number
++ = 1
++
++ dtim_policy
++ = NORMAL_DTIM
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_POWERSAVE_PARAMS
++
++Synopsis
++ Set the two AR6000 power save timers (PS-POLL timer and APSD trigger timer) and
++ the two ASPD TIM policies
++
++Command
++ wmiconfig eth1--psparams --psPollTimer=<psPollTimeout in ms>
++ --triggerTimer=<triggerTimeout in ms> --apsdTimPolicy=<ignore/
++ adhere> --simulatedAPSDTimPolicy=<ignore/adhere>
++
++Command Parameters
++ typedef struct {
++ A_UINT16 psPollTimeout;
++ Timeout (in ms) after sending PS-POLL; the
++ AR6000 device sleeps if it does not receive a
++ data packet from the AP
++
++ A_UINT16 triggerTimeout;
++ Timeout (in ms) after sending a trigger; the
++ device sleeps if it does not receive any data
++ or null frame from the AP
++
++ APSD_TIM_POLICY apsdTimPolicy;
++ TIM behavior with queue APSD enabled
++
++ APSD_TIM_POLICY simulatedAPSD
++
++ TimPolicy;
++ TIM behavior with simulated APSD
++ enabled
++
++ typedef enum {
++ IGNORE_TIM_ALL_QUEUES_APSD = 0,
++ PROCESS_TIM_ALL_QUEUES_APSD = 1,
++ IGNORE_TIM_SIMULATED_APSD = 2,
++ POWERSAVE_TIMERS_POLICY = 3,
++ } APSD_TIM_POLICY;
++
++Command Values
++ None
++
++Reset Values
++ psPollTimeout is 50 ms; triggerTimeout is 10 ms;
++ apsdTimPolicy = IGNORE_TIM_ALL_QUEUES_APSD;
++ simulatedAPSDTimPolicy = POWERSAVE_TIMERS_POLICY
++
++Restrictions
++ When this command is used, all parameters must be set; this command does not
++ allow setting only one parameter.
++
++=====================================================================
++
++
++Name
++ SET_PROBED_SSID
++
++Synopsis
++ The host uses this command to provide a list of up to MAX_PROBED_SSID_INDEX
++ (six) SSIDs that the AR6000 device should actively look for. It lists the active SSID
++ table. By default, the device actively looks for only the SSID specified in the
++ \93CONNECT_CMD\94 command, and only when the regulatory domain allows active
++ probing. With this command, specified SSIDs are probed for, even if they are hidden.
++
++Command
++ wmiconfig eth1 --ssid=<ssid> [--num=<index>]
++
++Command Parameters
++ {
++ A_UINT8 numSsids
++ A number from 0 to
++ MAX_PROBED_SSID_INDEX indicating
++ the active SSID table entry index for this
++ command (if the specified entry index
++ already has an SSID, the SSID specified in
++ this command replaces it)
++
++ WMI_PROBED_SSID_INFO probedSSID[1]
++ } WMI_PROBED_SSID_CMD
++
++ {
++ A_UINT8 flag
++ WMI_SSID_FLAG indicates the current
++ entry in the active SSID table
++ A_UINT8 ssidLength
++ Length of the specified SSID in bytes.
++ If = 0, the entry corresponding to the
++ index is erased
++ A_UINT8 ssid[32]
++ SSID string actively probed for when
++ permitted by the regulatory domain
++ } WMI_PROBED_SSID_INFO
++
++Command Values
++ WMI_SSID_FLAG
++ {
++ DISABLE_SSID_FLAG = 0
++ Disables entry
++ SPECIFIC_SSID_FLAG = 1
++ Probes specified SSID
++ ANY_SSID_FLAG = 2
++ Probes for any SSID
++ } WMI_SSID_FLAG
++
++Reset Value
++ The entries are unused.
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_REASSOC_MODE
++
++Synopsis
++ Specify whether the disassociated frame should be sent or not upon reassociation.
++
++Command
++ wmiconfig eth1 --setreassocmode <mode>
++
++Command Parameters
++ UINT8 mode
++
++Command Values
++ mode
++ = 0x00
++ Send disassoc to a previously connected AP
++ upon reassociation
++ = 0x01
++ Do not send disassoc to previously connected
++ AP upon reassociation
++
++Reset Values
++ None defined
++
++Restrictions
++ None
++
++
++=====================================================================
++
++Name
++ SET_RETRY_LIMITS
++
++Synopsis
++ Allows the host to influence the number of times that the AR6000 device should
++ attempt to send a frame before they give up.
++
++Command
++ wmiconfig --setretrylimits <frameType> <trafficClass> <maxRetries>
++ <enableNotify>
++
++Command Parameters
++ {
++ UINT8 frameType
++ A WMI_FRAMETYPE specifying
++ which type of frame is of interest.
++ UINT8 trafficClass
++ Specifies a traffic class (see
++ \93CREATE_PSTREAM\94). This
++ parameter is only significant when
++ frameType = DATA_FRAMETYPE.
++ UINT8 maxRetries
++ Maximum number of times the
++ device attempts to retry a frame Tx,
++ ranging from WMI_MIN_RETRIES
++ (2) to WMI_MAX_RETRIES (15). If
++ the special value 0 is used,
++ maxRetries is set to 15.
++ A_UINT8 enableNotify
++ Notify when enabled
++ } WMI_RETRY_LIMIT_INFO
++
++ {
++ A_UINT8 numEntries
++ WMI_RETRY_LIMIT_INFO retryLimitInfo[1]
++ } WMI_SET_RETRY_LIMITS_CMD
++
++Command Values
++ {
++ MGMT_FRAMETYPE = 0 Management frame
++ CONTROL_FRAMETYPE = 1 Control frame
++ DATA_FRAMETYPE = 2 Data frame
++ } WMI_FRAMETYPE
++
++Reset Values
++ Retries are set to 15
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_ROAM_CTRL
++
++Synopsis
++ Affects how the AR6000 device selects a BSS. The host uses this command to set and
++ enable low RSSI scan parameters. The time period of low RSSI background scan is
++ mentioned in scan period. Low RSSI scan is triggered when the current RSSI
++ threshold (75% of current RSSI) is equal to or less than scan threshold.
++
++ Low RSSI roam is triggered when the current RSSI threshold falls below the roam
++ threshold and roams to a better AP by the end of the scan cycle. During Low RSSI
++ roam, if the STA finds a new AP with an RSSI greater than roam RSSI to floor, during
++ scan, it roams immediately to it instead of waiting for the end of the scan cycle. See
++ also \93Scan and Roam\94 on page C-1.
++
++Command
++ wmiconfig --roam <roamctrl> <info>, where info is <scan period>
++ <scan threshold> <roam threshold> <roam rssi floor>
++
++Command Parameters
++ A_UINT8 roamCtrlType;
++
++Command Values
++ WMI_FORCE_ROAM = 1
++ Roam to the specified BSSID
++
++ WMI_SET_ROAM_MODE = 2
++ Default, progd bias, no roam
++
++ WMI_SET_HOST_BIAS = 3
++ Set the host bias
++
++ WMI_SET_LOWRSSI_SCAN_PARAMS = 4
++ Info parameters
++
++ A_UINT8 bssid[ATH_MAC_LEN];
++ WMI_FORCE_ROAM
++
++ A_UINT8 roamMode;
++ WMI_SET_ROAM_MODE
++
++ A_UINT8 bssBiasInfo;
++ WMI_SET_HOST_BIAS
++
++ A_UINT16 lowrssi_scan_period;
++ WMI_SET_LOWRSSI_SCAN_PARAMS
++
++ A_INT16
++ lowrssi_scan_threshold;
++ WMI_SET_LOWRSSI_SCAN_PARAMS
++
++ A_INT16 lowrssi_roam_threshold;
++ WMI_SET_LOWRSSI_SCAN_PARAMS
++
++ A_UINT8 roam_rssi_floor;
++ WMI_SET_LOWRSSI_SCAN_PARAMS
++
++Reset Value
++ None defined (default lowrssi scan is disabled. Enabled only when scan period is set.)
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_RTS
++
++Synopsis
++ Decides when RTS should be sent.
++
++Command
++ wmiconfig eth1 --setRTS <pkt length threshold>
++
++Command Parameters
++ A_UINT16
++ threshold;
++ Command parameter threshold in bytes. An RTS is
++ sent if the data length is more than this threshold.
++ The default is to NOT send RTS.
++
++Command Values
++ None
++
++Reset Value
++ Not to send RTS.
++
++Restrictions
++ None
++
++
++=====================================================================
++
++Name
++ SET_SCAN_PARAMS
++
++Synopsis
++ The host uses this command to set the AR6000 scan parameters, including the duty
++ cycle for both foreground and background scanning. Foreground scanning takes
++ place when the AR6000 device is not connected, and discovers all available wireless
++ networks to find the best BSS to join. Background scanning takes place when the
++ device is already connected to a network and scans for potential roaming candidates
++ and maintains them in order of best to worst. A second priority of background
++ scanning is to find new wireless networks.
++
++ The device initiates a scan when necessary. For example, a foreground scan is always
++ started on receipt of a \93CONNECT_CMD\94 command or when the device cannot find
++ a BSS to connect to. Foreground scanning is disabled by default until receipt of a
++ CONNECT command. Background scanning is enabled by default and occurs every
++ 60 seconds after the device is connected.
++
++ The device implements a binary backoff interval for foreground scanning when it
++ enters the DISCONNECTED state after losing connectivity with an AP or when a
++ CONNECT command is received. The first interval is ForegroundScanStartPeriod,
++ which doubles after each scan until the interval reaches ForegroundScanEndPeriod.
++ If the host terminates a connection with DISCONNECT, the foreground scan period
++ is ForegroundScanEndPeriod. All scan intervals are measured from the time a full
++ scan ends to the time the next full scan starts. The host starts a scan by issuing a
++ \93START_SCAN\94 command. See also \93Scan and Roam\94 on page C-1.
++
++Command
++ wmiconfig eth1 --scan --fgstart=<sec> --fgend=<sec> --bg=<sec> --
++ act=<msec> --pas=<msec> --sr=<short scan ratio> --scanctrlflags
++ <connScan> <scanConnected> <activeScan> <reportBSSINFO>
++
++Command Parameters
++ UINT16 fgStartPeriod
++ First interval used by the device when it
++ disconnects from an AP or receives a
++ CONNECT command, specified in seconds (0\96
++ 65535). If = 0, the device uses the reset value.
++ If = 65535, the device disables foreground
++ scanning.
++
++ UINT16 fgEndPeriod
++ The maximum interval the device waits between
++ foreground scans specified in seconds (from
++ ForegroundScanStartPeriod to 65535). If = 0, the
++ device uses the reset value.
++
++ UINT16 bgScanPeriod
++ The period of background scan specified in
++ seconds (0\9665535). By default, it is set to the reset
++ value of 60 seconds. If 0 or 65535 is specified, the
++ device disables background scanning.
++
++ UINT16 maxactChDwellTime
++ The period of time the device stays on a
++ particular channel while active scanning. It is
++ specified in ms (10\9665535). If the special value of
++ 0 is specified, the device uses the reset value.
++
++ UINT16 PasChDwellTime
++ The period of time the device remains on a
++ particular channel while passive scanning. It is
++ specified in ms (10\9665535). If the special value of
++ 0 is specified, the device uses the reset value.
++
++ UINT8 shortScanRatio
++ Number of short scans to perform for each
++ long scan.
++
++ UINT8 scanCtrlFlasgs
++
++ UINT16 minactChDwellTime
++ Specified in ms
++
++ UINT32 maxDFSchActTime
++ The maximum time a DFS channel can stay
++ active before being marked passive, specified in
++ ms.
++
++Command Values
++ None
++
++Reset Values
++ ForegroundScanStart
++Period
++ 1 sec
++
++ ForegroundScanEndPeriod
++ 60 sec
++
++ BackgroundScanPeriod
++ 60 sec
++
++ ActiveChannelDwellTime
++ 105 ms
++
++=====================================================================
++
++
++Name
++ SET_TKIP_COUNTERMEASURES
++
++Synopsis
++ The host issues this command to tell the target whether to enable or disable TKIP
++ countermeasures.
++
++Command
++ TBD
++
++Command Parameters
++ UINT8 WMI_TKIP_CM_ENABLE
++ Enables the countermeasures
++
++
++ UINT8 TKIP_CM_DISABLE
++ Disables the countermeasures
++
++Command Values
++ None
++
++Reset Values
++ By default, TKIP MIC reporting is disabled
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_TX_PWR
++
++Synopsis
++ The host uses this command to specify the Tx power level of the AR6000. Cannot be
++ used to exceed the power limit permitted by the regulatory domain. The maximum
++ output power is limited in the chip to 31.5 dBm; the range is 0 \96 31.5 dbm.
++
++Command
++ wmiconfig --power <dbM>
++
++Command Parameters
++ UINT8 dbM
++ The desired Tx power specified in dbM.
++ If = 0, the device chooses the maximum
++ permitted by the regulatory domain.
++
++Command Values
++ None
++
++Reset Values
++ The maximum permitted by the regulatory domain
++
++Restrictions
++ None
++
++See Also
++ \93GET_TX_PWR\94
++
++
++=====================================================================
++
++Name
++ SET_VOICE_PKT_SIZE
++
++Synopsis
++ If an AP does not support WMM, it has no way to differentiate voice from data.
++ Because the voice packet is typically small, packet in size less than voicePktSize are
++ assumed to be voice, otherwise it is treated as data.
++
++Command
++ wmiconfig eth1 --setVoicePktSize <size-in-bytes>
++
++Command Parameters
++ UINT16 voicePktSize
++ Packet size in octets
++
++Command Values
++ None
++
++Reset Values
++ voicePktSize default is 400 bytes
++
++Restrictions
++ No effect if WMM is unavailable
++
++
++=====================================================================
++
++Name
++ SET_WMM
++
++Synopsis
++ Overrides the AR6000 device WMM capability
++
++Command
++ wmiconfig eth1 --setwmm <enable>
++
++Command Parameters
++ WMI_WMM_ENABLED
++ Enables WMM
++
++ WMI_WMM_DISABLED
++ Disables WMM support
++
++Command Values
++ 0 = disabled
++ 1 = enabled
++
++Reset Value
++ WMM Disabled
++
++Restrictions
++ None
++
++
++=====================================================================
++
++Name
++ SET_WMM_TXOP
++
++Synopsis
++ Configures TxOP Bursting when sending traffic to a WMM capable AP
++
++Command
++ wmiconfig eth1 --txopbursting <burstEnable>
++
++ <burstEnable>
++ = 0
++ Disallow TxOp bursting
++
++ = 1
++ Allow TxOp bursting
++
++Command Parameters
++ txopEnable
++ = WMI_TXOP_DISABLED
++ Disabled
++
++ = WMI_TXOP_ENABLED
++ Enabled
++
++Command Values
++ txopEnable
++ = 0 Disabled
++
++ = 1 Enabled
++
++Reset Value
++ Bursting is off by default
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ SET_WOW_MODE
++
++Synopsis
++ The host uses this command to enable or disable the WoW mode. When WoW mode
++ is enabled and the host is asleep, pattern matching takes place at the target level.
++ Only packets that match any of the pre-specified WoW filter patterns, will be passed
++ up to the host. The host will also be woken up by the target. Packets which do not
++ match any of the WoW patterns are discarded.
++
++Command
++ wmiconfig \96setwowmode <enable/disable>
++
++Command Parameters
++ A_BOOL enable_wow
++ Enable or disable WoW:
++
++Command Values
++ = 0
++ Disable WoW
++
++ = 1
++ Enable WoW
++
++Reset Value
++ None defined (default WoW mode is disabled).
++
++Restrictions
++ None
++
++See Also
++ \93GET_WOW_LIST\94
++
++
++=====================================================================
++
++Name
++ SET_WSC_STATUS
++
++Synopsis
++ The supplicant uses this command to inform the target about the status of the WSC
++ registration protocol. During the WSC registration protocol, a flag is set so the target
++ bypasses some of the checks in the CSERV module. At the end of the registration, this
++ flag is reset.
++
++Command
++ N/A
++
++Command Parameters
++ A_BOOL status
++ = 1 WSC registration in progress
++ = 0 WSC protocol not running
++
++Reply Parameters
++ None
++
++Reset Value
++ None defined (default = 0)
++
++Restrictions
++ None
++
++
++=====================================================================
++
++Name
++ SNR_THRESHOLD_PARAMS
++
++Synopsis
++ Configures how the AR6000 device monitors and reports SNR of the connected BSS,
++ used as a link quality metric.
++
++Command
++ --snrThreshold <weight> <upper_threshold_1> ...
++ <upper_threshold_4> <lower_threshold_1> ... <lower_threshold_4>
++ <pollTimer>
++
++Command Parameters
++ <weight>
++ Share with rssiThreshold. Range in [1, 16], used
++ in the formula to calculate average RSSI
++
++ <upper_threshold_x>
++ Above thresholds expressed in db, in ascending
++ order
++
++ <lower_threshold_x>
++ Below thresholds expressed in db, in ascending
++ order
++
++ <pollTimer>
++ The signal strength sampling frequency in
++ seconds. If polltime = 0, signal strength
++ sampling is disabled
++
++Command Values
++ None
++
++Reset Value
++ None defined
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ START_SCAN
++
++Synopsis
++ The host uses this command to start a long or short channel scan. All future scans are
++ relative to the time the AR6000 device processes this command. The device performs
++ a channel scan on receipt of this command, even if a scan was already in progress.
++ The host uses this command when it wishes to refresh its cached database of wireless
++ networks. The isLegacy field will be removed (0 for now) because it is achieved by
++ setting CONNECT_PROFILE_MATCH_DONE in the CONNECT command. See also
++ \93Scan and Roam\94
++
++Command
++ wmiconfig eth1 --startscan <scan type> <forcefgscan> 0
++ <homeDwellTime> <forceScanInterval>
++
++Command Parameters
++ UINT8 scanType
++ WMI_SCAN_TYPE
++
++Command Values
++ {
++ WMI_LONG_SCAN =0x0
++ Requests a full scan
++ WMI_SHORT_SCAN =0x1
++ Requests a short scan
++ } WMI_SCAN_TYPE
++
++ A_BOOL forceFgScan
++ forceFgScan
++ = 0
++ Disable the foreground scan
++
++ forceFgScan
++ = 1
++ Forces a foreground scan
++
++ A_UINT32 homeDwellTime
++ Maximum duration in the home
++ channel (in ms)
++
++ A_UINT32 forceScanInterval
++ Time interval between scans (in ms)
++
++ A_UINT32 scanType
++ WMI_SCAN_TYPE
++
++Reset Value
++ Disable forcing foreground scan
++
++Restrictions
++ isLegacy field will no longer be supported (pass as 0 for now)
++
++
++=====================================================================
++
++Name
++ SYNCHRONIZE
++
++Synopsis
++ The host uses this command to force a synchronization point between the command
++ and data paths
++
++Command
++ TBD
++
++Command Parameters
++ None
++
++
++
++Command Values
++ None
++
++
++
++Reset Values
++ None
++
++
++
++Restrictions
++ None
++
++
++=====================================================================
++
++Name
++ TARGET_ERROR_REPORT_BITMASK
++
++Synopsis
++ Allows the host to control \93ERROR_REPORT\94 events from the AR6000 device.
++
++ If error reporting is disabled for an error type, a count of errors of that type is
++ maintained by the device.
++
++ If error reporting is enabled for an error type, an \93ERROR_REPORT\94 event is
++ sent when an error occurs and the error report bit is cleared.
++
++ Error counts for each error type are available through the \93GET_TARGET_STATS\94
++ command.
++
++Command
++ wmiconfig eth1 --setErrorReportingBitmask
++
++Command Parameters
++ UINT32 bitmask
++ Represents the set of
++ WMI_TARGET_ERROR_VAL error types
++ enabled for reporting
++
++Command Values
++ {
++ WMI_TARGET_PM_ERR_FAIL = 0x00000001
++ Power save fails (only two cases):
++ Retry out of null function/QoS null
++ function to associated AP for PS
++ indication'
++ Host changes the PS setting when
++ STA is off home channel
++
++ WMI_TARGET_KEY_NOT_FOUND = 0x00000002
++ No cipher key
++ WMI_TARGET_DECRYPTION_ERR = 0x00000004
++ Decryption error
++ WMI_TARGET_BMISS = 0x00000008
++ Beacon miss
++ WMI_PSDISABLE_NODE_JOIN = 0x00000010
++ A non-PS-enabled STA joined the
++ PS-enabled network
++ WMI_TARGET_COM_ERR = 0x00000020
++ Host/target communication error
++ WMI_TARGET_FATAL_ERR = 0x00000040
++ Fatal error
++ } WMI_TARGET_ERROR_VAL
++
++Reset Values
++ Bitmask is 0, and all error reporting is disabled
++
++Restrictions
++ None
++
++
++=====================================================================
++WMI Events
++
++Event
++ Description
++ Page
++
++
++BSSINFO
++ Contains information describing BSSs collected during a scan
++
++CAC_EVENTID
++ Indicates signalling events in admission control
++
++CMDERROR
++ The AR6000 device encounters an error while attempting to process
++ a command
++
++CONNECT
++ The device has connected to a wireless network
++
++DISCONNECT
++ The device lost connectivity with a wireless network
++
++ERROR_REPORT
++ An error has occurred for which the host previously requested
++ notification with the command
++ \93TARGET_ERROR_REPORT_BITMASK\94
++
++EXTENSION
++ WMI extension event
++
++GET_PMKID_LIST_EVENT
++ Created in response to a \93GET_PMKID_LIST_CMD\94 command
++
++GET_WOW_LIST_EVENT
++ Response to the wmiconfig \93GET_WOW_LIST\94 command to
++ retrieve the configured WoW patterns
++
++NEIGHBOR_REPORT
++ Neighbor APs that match the current profile were detected
++
++OPT_RX_FRAME_EVENT
++ (Special feature) informs the host of the reception of a special frame
++
++PSTREAM_TIMEOUT
++ A prioritized stream has been idle for a specified interval
++
++READY
++ The AR6000 device is ready to accept commands
++
++REGDOMAIN
++ The regulatory domain has changed
++
++REPORT_ROAM_DATA_EVENT
++ Reports the roam time calculations made by the device
++ (generated with a special build)
++ \97
++
++REPORT_STATISTICS
++ Reply to a \93GET_TARGET_STATS\94 command
++
++ROAM_TBL_EVENT
++ Reports the roam table
++
++RSSI_THRESHOLD
++ Signal strength from the connected AP has crossed the threshold
++ defined in the \93RSSI_THRESHOLD_PARAMS\94 command
++
++SCAN_COMPLETE_EVENT
++ A scan has completed (added status SCAN_ABORTED in release 2.0)
++
++TEST_EVENT
++ Event generated by the TCMD
++
++TKIP_MICERROR
++ TKIP MIC errors were detected
++
++=====================================================================
++
++Name
++ BSSINFO
++
++Synopsis
++ Contains information describing one or more BSSs as collected during a scan.
++ Information includes the BSSID, SSID, RSSI, network type, channel, supported rates,
++ and IEs. BSSINFO events are sent only after the device receives a beacon or probe-
++ response frame that pass the filter specified in the \93SET_BSS_FILTER\94 command.
++ BSSINFO events consist of a small header followed by a copy of the beacon or probe
++ response frame. The 802.11 header is not present. For formats of beacon and probe-
++ response frames please consult the IEEE 802.11 specification.
++
++ The beacons or probe responses containing the IE specified by the
++ WMI_BSS_FILTER_CMD are passed to the host through the
++ WMI_BSSINFO_EVENT. The event carries a 32-bit bitmask that indicates the IEs that
++ were detected in the management frame. The frame type field has been extended to
++ indicate action management frames. This would be helpful to route these frames
++ through the same event mechanism as used by the beacon processing function.
++
++ If the bssFilter in the SET_BSS_FILTER matches, then the ieMask is not relevant
++ because the BSSINFO event is sent to the host. If the bssFilter doesnot match in the
++ beacons/probe respones, then the ieMask match dictates whether the BSSINFO
++ event is sent to the host. In the case of action management frames, the ieMask is the
++ filter that is applied.
++
++Event ID
++ 0x1004
++
++Event Parameters
++ typedef struct {
++ A_UINT16 channel;
++ Specifies the frequency (in MHz) where the
++ frame was received
++ A_UINT8 frameType;
++ A WMI_BI_FTYPE value
++ A_UINT8 snr;
++ A_INT16 rssi;
++ Indicates signal strength
++ A_UINT8 bssid[ATH_MAC_LEN];
++ A_UINT32 ieMask;
++ } _ATTRIB_PACK_WMI_BSS_INFO_HDR;
++
++ Beacon or Probe Response Frame
++
++Event Values
++ {
++ BEACON_FTYPE = 0x1
++ Indicates a beacon frame
++ PROBERESP_FTYPE
++ Indicates a probe response frame
++ ACTION_MGMT_FTYPE
++ } WMI_BI_FTYPE
++
++=====================================================================
++
++Name
++ CAC_EVENTID
++
++Synopsis
++ Indicates signalling events in admission control. Events are generated when
++ admission is accepted, rejected, or deleted by either the host or the AP. If the AP does
++ not respond to an admission request within a timeout of 500 ms, an event is
++ generated to the host.
++
++Event ID
++ 0x1011
++
++Event Parameters
++ UINT8
++ ac
++ Access class pertaining to the
++signalling
++
++ UINT8 cac_indication
++ Type of indication; indications are
++ listed in WMI_CAC_INDICATION
++
++ UINT8 statusCode
++ AP response status code for a
++ request
++
++ UINT8 tspecSuggestion[63]
++ Suggested TSPEC from AP
++
++Event Values
++ {
++ CAC_INDICATION_ADMISSION = 0x00
++ CAC_INDICATION_ADMISSION_RESP = 0x01
++ CAC_INDICATION_DELETE = 0x02
++ CAC_INDICATION_NO_RESP = 0x03
++ } WMI_CAC_INDICATION
++
++
++=====================================================================
++
++
++Name
++ CMDERROR
++
++Synopsis
++ Indicates that the AR6000 device encountered an error while attempting to process a
++ command. This error is fatal and indicates that the device requires a reset.
++
++Event ID
++ 0x1005
++
++Event Parameters
++ UINT16 commandId
++ Corresponds to the command which generated
++ the error
++ UINT8 errorCode
++ A WMI_ERROR_CODE value
++
++Event Values
++ {
++ INVALID_PARAM = 1
++ Invalid parameter
++ ILLEGAL_STATE = 2
++ Illegal state
++ INTERNAL_ERROR = 3
++ Internal Error
++ All other values reserved
++ } WMI_ERROR_CODE
++
++
++=====================================================================
++
++
++Name
++ CONNECT
++
++Synopsis
++ Signals that the AR6000 connected to a wireless network. Connection occurs due to a
++ \93CONNECT\94 command or roaming to a new AP. For infrastructure networks, shows
++ that the AR6000 successfully performed 802.11 authentication and AP association.
++
++Event ID
++ 0x1002
++
++Event Parameters
++ UINT16 channel
++ Channel frequency (in MHz) of the network the
++ AR6000 are connected to
++
++ UINT8 bssid[6]
++ MAC address of the AP the AR6000 are
++ connected to or the BSSID of the ad hoc
++ network
++
++ UINT16 listenInterval
++ Listen interval (in Kms) that the AR6000 are
++ using
++
++ UINT 8 beaconIeLen
++ Length (in bytes) of the beacon IEs
++
++ UINT8 assocInfo
++ Pointer to an array containing beacon IEs,
++ followed first by association request IEs then by
++ association response IEs
++
++ UINT8 assocReqLen
++ Length (in bytes) of the assocReqIEs array
++
++ UINT8 assocRespLen
++ Length (in bytes) of the assocRespIEs array
++
++Event Values
++ None defined
++
++=====================================================================
++
++
++Name
++ DISCONNECT
++
++Synopsis
++ Signals that the AR6000 device lost connectivity with the wireless network.
++ DISCONENCT is generated when the device fails to complete a \93CONNECT\94
++ command or as a result of a transition from a connected state to disconnected state.
++
++ After sending the \93DISCONNECT\94 event the device continually tries to re-establish
++ a connection. A LOST_LINK occurs when STA cannot receive beacons within the
++ specified time for the SET_BMISS_TIME command.
++
++Event ID
++ 0x1003
++
++Event Parameters
++ UINT8 disconnect
++ Reason
++ A WMI_DISCONNECT_REASON value
++
++ UINT8 bssid[6]
++ Indicates which BSS the device was connected to
++
++ UINT8 assocRespLen
++ Length of the 802.11 association response frame
++ that triggered this event, or 0 if not applicable
++
++ UINT8 assocInfo[assocRespLen]
++ Copy of the 802.11 association response frame
++
++Event Values
++ {
++ NO_NETWORK_AVAIL =0x01
++ Indicates that the device was unable to
++ establish or find the desired network
++ LOST_LINK =0x02
++ Indicates the devices is no longer receiving
++ beacons from the BSS it was previously
++ connected to
++
++ DISCONNECT_CMD =0x03
++ Indicates a \93DISCONNECT\94 command was
++ processed
++ BSS_DISCONNECTED =0x04
++ Indicates the BSS explicitly disconnected the
++ device. Possible mechanisms include the AP
++ sending 802.11 management frames
++ (e.g., disassociate or deauthentication
++ messages).
++ AUTH_FAILED =0x05
++ Indicates that the device failed 802.11
++ authentication with the BSS
++ ASSOC_FAILED =0x06
++ Indicates that the device failed 802.11
++ association with the BSS
++ NO_RESOURCES_AVAIL =0x07
++ Indicates that a connection failed because the
++ AP had insufficient resources to complete the
++ connection
++ CSERV_DISCONNECT =0x08
++ Indicates that the device\92s connection services
++ module decided to disconnect from a BSS,
++ which can happen for a variety of reasons (e.g.,
++ the host marks the current connected AP as a
++ bad AP).
++ INVALID_PROFILE =0x0A
++ Indicates that an attempt was made to
++ reconnect to a BSS that no longer matches the
++ current profile
++ All other values are reserved
++ } WMI_DISCONNECT_REASON
++
++
++=====================================================================
++
++
++Name
++ ERROR_REPORT
++
++Synopsis
++ Signals that a type of error has occurred for which the host previously requested
++ notification through the \93TARGET_ERROR_REPORT_BITMASK\94 command.
++
++Event ID
++ 0x100D
++
++Event Parameters
++ UINT32 errorVal
++ WMI_TARGET_ERROR_VAL value. See
++ \93TARGET_ERROR_REPORT_BITMASK\94.
++
++Event Values
++ errorVal
++ = 0x00000001
++ Power save fails
++
++ = 0x00000002
++ No cipher key
++
++ = 0x00000004
++ Decryption error
++
++ = 0x00000008
++ Beacon miss
++
++ = 0x00000010
++ A non-power save disabled node has joined
++ the PS-enabled network
++
++
++=====================================================================
++
++
++Name
++ EXTENSION
++
++Synopsis
++ The WMI is used mostly for wireless control messages to a wireless module that
++ apply to wireless module management regardless of the target platform
++ implementation. However, some events peripherally related to wireless management
++ are desired during operation. These wireless extension events may be platform-
++ specific or implementation-dependent. See \93WMI Extension Commands\94
++
++
++Event ID
++ 0x1010
++
++
++=====================================================================
++
++
++Name
++ GET_PMKID_LIST_EVENT
++
++Synopsis
++ Generated by firmware in response to a \93GET_PMKID_LIST_CMD\94 command.
++
++Event Parameters
++ typedef struct {
++ A_UINT32 numPMKID;
++ Contains the number of PMKIDs in the reply
++ WMI_PMKID pmkidList[1];
++ } __ATTRIB_PACK WMI_PMKID_LIST_REPLY;
++
++Event Values
++ None
++
++
++=====================================================================
++
++
++Name
++ GET_WOW_LIST_EVENT
++
++Synopsis
++ Response to the wmiconfig \96getwowlist command to retrieve the configured Wake on
++ Wireless patterns
++
++Event ID
++ 0x10018
++
++Event Parameters
++ {
++
++ A_UINT8 num_filters
++ Total number of patterns in the list
++ A_UINT8 this_filter_num
++ The filter number
++ A_UINT8 wow_mode
++ Shows whether WoW is enabled or disabled
++ A_UINT8 host_mode
++ Shows whether the host is asleep or awake
++ WOW_FILTER wow_filters[1]
++ List of WoW filters (pattern and mask data bytes)
++ } WMI_GET_WOW_LIST_REPLY;
++
++ {
++ Each wow_filter_list element shows:
++ A_UINT8 wow_valid_filter
++ Whether the filter is valid
++ A_UINT8 wow_filter_list_id
++ Filter List ID (23 = default)
++ A_UINT8 wow_filter_size
++ Size in bytes of the filter
++ A_UINT8 wow_filter_offset
++ Offset of the pattern to search in the data packet
++ A_UINT8 wow_filter_mask[MASK_SIZE]
++ The mask to be applied to the pattern
++ A_UINT8 wow_filter_pattern[WOW_PATTERN_SIZE]
++ The pattern that to match to wake up the host
++ } WOW_FILTER
++
++Event Values
++ None
++
++=====================================================================
++
++
++
++Name
++ NEIGHBOR_REPORT
++
++Synopsis
++ Indicates the existence of neighbor APs that match the current profile. The host uses
++ this event to populate the PMKID cache on the AR6000 and/or to perform
++ preauthentication. This event is only generated in infrastructure mode.
++
++ A total of numberOfAps pairs of bssid/bssFlags exist, one pair for each AP.
++
++Event ID
++ 0x1008
++
++Event Parameters
++ UINT8 numberOfAps
++ The number of APs reported about in
++ this event
++ {
++ UINT8 bssid[6]
++ MAC address of a neighbor AP
++ UINT8 bssFlags
++ A WMI_BSS_FLAGS value
++ }[numberOfAps]
++
++
++Event Values
++ {
++ WMI_DEFAULT_BSS_FLAGS = 0
++ Logical OR of 1 or more
++ WMI_BSS_FLAGS
++ WMI_PREAUTH_CAPABLE_BSS
++ = 1
++ Indicates that this AP is capable of
++ preauthentication
++ WMI_PMKID_VALID_BSS
++ = 2
++ Indicates that the AR6000 have a
++ valid pairwise master key for this AP
++ } WMI_BSS_FLAGS
++
++
++=====================================================================
++
++
++
++Name
++ OPT_RX_FRAME_EVENT
++
++Synopsis
++ Special feature, informs host of the reception of a special frame.
++
++Event ID
++ 0x100E
++
++Event Parameters
++ {
++ A_UINT16 channel;
++ A_UINT8 frameType;
++ A_INT8 snr;
++ A_UINT8 srcAddr[ATH_MAC_LEN];
++ A_UINT8 bssid[ATH_MAC_LEN];
++ }WMI_OPT_RX_INFO_HDR
++
++Event Values
++ None
++
++=====================================================================
++
++
++
++Name
++ PSTREAM_TIMEOUT
++
++Synopsis
++ Indicates that a priority stream that got created as a result of priority-marked data
++ flow (priority marked in IP TOS) being idle for the default inactivity interval period
++ (specified in the \93CREATE_PSTREAM\94 command) used for priority streams created
++ implicitly by the driver. This event is not indicated for user-created priority streams.
++ User-created priority streams exist until the users delete them explicitly. They do not
++ timeout due to data inactivity.
++
++Event ID
++ 0x1007
++
++Event Parameters
++ A_UINT8
++ trafficClass
++ Indicated the traffic class of priority
++ stream that timed out
++
++Event Values
++ {
++ WMM_AC_BE = 0
++ Best effort
++ WMM_AC_BK = 1
++ Background
++ WMM_AC_VI = 2
++ Video
++ WMM_AC_VO = 3
++ Voice
++ } TRAFFIC CLASS
++
++
++=====================================================================
++
++Name
++ READY
++
++Synopsis
++ Indicates that the AR6000 device is prepared to accept commands. It is sent once after
++ power on or reset. It also indicates the MAC address of the device.
++
++Event ID
++ 0x1001
++
++Event Parameters
++ UINT8 macAddr[6]
++ Device MAC address
++ UINT8 phyCapability
++ A WMI_PHY_CAPABILITY value. Indicates the
++ capabilities of the device wireless module\92s radio
++
++Event Values
++ {
++ WMI_11A_CAPABILITY = 1
++ WMI_11G_CAPABILITY = 2
++ WMI_11AG_CAPABILITY = 3
++ } WMI_PHY_CAPABILITY
++
++
++=====================================================================
++
++Name
++ REGDOMAIN
++
++Synopsis
++ Indicates that the regulatory domain has changed. It initially occurs when the
++ AR6000 device reads the board data information. The regulatory domain can also
++ change when the device is a world-mode SKU. In this case, the regulatory domain is
++ based on the country advertised by APs per the IEEE 802.11d specification. A
++ potential side effect of a regulatory domain change is a change in the list of available
++ channels. Any channel restrictions that exist as a result of a previous
++ \93SET_CHANNEL_PARAMETERS\94 command are lifted.
++
++Event ID
++ 0x1006
++
++Event Parameters
++ UINT32 regDomain
++ The range of 0x0000 \96 0x00FF
++ corresponds to an ISO country code.
++
++ Other regCodes are reserved for world
++ mode settings and specific regulatory
++ domains.
++
++Event Values
++ None
++
++
++=====================================================================
++
++
++
++Name
++ REPORT_STATISTICS
++
++Synopsis
++ A reply to a \93GET_TARGET_STATS\94 command.
++
++Event ID
++ 0x100B
++
++Event Parameters
++ When the statistics are sent to the host, the AR6001 clear them so that a new set of
++ statistics are collected for the next report.
++
++ UINT32 tx_packets
++ UINT32 tx_bytes
++ UINT32 tx_unicast_pkts
++ UINT32 tx_unicast_bytes
++ UINT32 tx_multicast_pkts
++ UINT32 tx_multicast_bytes
++ UINT32 tx_broadcast_pkts
++ UINT32 tx_broadcast_bytes
++ UINT32 tx_rts_success_cnt
++ UINT32 tx_packet_per_ac[4]
++ Tx packets per AC: [0] = BE, [1] = BK,
++ [2] = VI, [3] = VO
++ UINT32 tx_errors
++ Number of packets which failed Tx, due
++ to all failures
++ ... REPORT_STATISTICS, continued
++ UINT32 tx_failed_cnt
++ Number of data packets that failed Tx
++ UINT32 tx_retry_cnt
++ Number of Tx retries for all packets
++ UINT32 tx_rts_fail_cnt
++ Number of RTS Tx failed count
++ UINT32 rx_packets
++ UINT32 rx_bytes
++ UINT32 rx_unicast_pkts
++ UINT32 rx_unicast_bytes
++ UINT32 rx_multicast_pkts
++ UINT32 rx_multicast_bytes
++ UINT32 rx_broadcast_pkts
++ UINT32 rx_broadcast_bytes
++ UINT32 rx_fragment_pkt
++ Number of fragmented packets received
++ UINT32 rx_errors
++ Number of Rx errors due to all failures
++ UINT32 rx_crcerr
++ Number of Rx errors due to CRC errors
++ UINT32 rx_key_cache_miss
++ Number of Rx errors due to a key not
++ being plumbed
++ UINT32 rx_decrypt_err
++ Number of Rx errors due to decryption
++ failure
++ UINT32 rx_duplicate_frames
++ Number of duplicate frames received
++ UINT32 tkip_local_mic_failure
++ Number of TKIP MIC errors detected
++ UINT32 tkip_counter_measures_invoked
++ Number of times TKIP countermeasures
++ were invoked
++ UINT32 tkip_replays
++ Number of frames that replayed a TKIP
++ encrypted frame received earlier
++ UINT32 tkip_format_errors
++ Number of frames that did not conform
++ to the TKIP frame format
++ UINT32 ccmp_format_errors
++ Number of frames that did not conform
++ to the CCMP frame format
++ UINT32 ccmp_replays
++ Number of frames that replayed a CCMP
++ encrypted frame received earlier
++ UINT32 power_save_failure_cnt
++ Number of failures that occurred when
++ the AR6001 could not go to sleep
++ UINT32 cs_bmiss_cnt
++ Number of BMISS interrupts since
++ connection
++ UINT32 cs_lowRssi_cnt
++ Number of the times the RSSI went below
++ the low RSSI threshold
++ UINT16 cs_connect_cnt
++ Number of connection times
++ UINT16 cs_disconnect_cnt
++ Number of disconnection times
++ UINT8 cs_aveBeacon_rssi
++ The current averaged value of the RSSI
++ from the beacons of the connected BSS
++ UINT8 cs_lastRoam_msec
++ Time that the last roaming took, in ms.
++ This time is the difference between
++ roaming start and actual connection.
++
++Event Values
++ None defined
++
++
++=====================================================================
++
++Name
++ ROAM_TBL_EVENT
++
++Synopsis
++ Reports the roam table, which contains the current roam mode and this information
++ for every BSS:
++
++Event ID
++ 0x100F
++
++Event Parameters
++ A_UINT8 bssid[ATH_MAC_LEN];
++ BSSID
++ A_UINT8 rssi
++ Averaged RSSI
++ A_UINT8 rssidt
++ Change in RSSI
++ A_UINT8 last_rssi
++ Last recorded RSSI
++ A_UINT8 roam_util
++ Utility value used in roaming decision
++ A_UINT8 util
++ Base utility with the BSS
++ A_UINT8 bias
++ Host configured for this BSS
++
++Event Values
++ roamMode
++ Current roam mode
++
++ = 1
++ RSSI based roam
++
++ = 2
++ Host bias-based roam
++
++ = 3
++ Lock to the current BSS
++
++ = 4
++ Autonomous roaming disabled
++
++
++=====================================================================
++
++Name
++ RSSI_THRESHOLD
++
++Synopsis
++ Alerts the host that the signal strength from the connected AP has crossed a
++ interesting threshold as defined in a previous \93RSSI_THRESHOLD_PARAMS\94
++ command.
++
++Event ID
++ 0x100C
++
++Event Parameters
++ UINT8 range
++ A WMI_RSSI_THRESHOLD_VAL
++ value, which indicates the range of
++ the average signal strength
++
++Event Values
++ {
++ WMI_RSSI_LOWTHRESHOLD_BELOW_LOWERVAL = 1
++ WMI_RSSI_LOWTHRESHOLD_LOWERVAL = 2
++ WMI_RSSI_LOWTHRESHOLD_UPPERVAL = 3
++ WMI_RSSI_HIGHTHRESHOLD_LOWERVAL = 4
++ WMI_RSSI_HIGHTHRESHOLD_HIGHERVAL = 5
++ } WMI_RSSI_THRESHOLD_VAL
++
++
++=====================================================================
++
++Name
++ SCAN_COMPLETE_EVENT
++
++Synopsis
++ Indicates the scan status. if the Scan was not completed, this event is generated with
++ the status A_ECANCELED.
++
++Event ID
++ 0x100A
++
++Event Parameters
++ A_UINT8 scanStatus
++
++Event Values
++ {
++ #define SCAN_ABORTED 16
++ #define SCAN_COMPLETED 0
++ A_UINT8 scanStatus
++ A_OK or A_ECANCELED
++ } WMI_SCAN_COMPLETE_EVENT;
++
++
++=====================================================================
++
++Name
++ TEST_EVENT
++
++Synopsis
++ The TCMD application uses a single WMI event (WMI_TEST_EVENTID) to
++ communicate events from target to host. The events are parsed by the TCMD
++ application and WMI layer is oblivious of it.
++
++Event ID
++ 0x1016
++
++Event Parameters
++ WMI_TEST_EVENTID
++
++
++Event Values
++ None
++
++
++=====================================================================
++
++
++
++Name
++ TKIP_MICERR
++
++Synopsis
++ Indicates that TKIP MIC errors were detected.
++
++Event ID
++ 0x1009
++
++Event Parameters
++ UINT8 keyid
++ Indicates the TKIP key ID
++
++ UINT8 ismcast
++ 0 = Unicast
++ 1 = Multicast
++
++Event Values
++ See event parameters
++
++=====================================================================
++
++WMI Extension Commands
++
++The WMI EXTENSION command is used to multiplex a collection of
++commands that:
++
++ Are not generic wireless commands
++ May be implementation-specific
++ May be target platform-specific
++ May be optional for a host implementation
++
++ An extension command is sent to the AR6000 targets like any other WMI
++command message and uses the WMI_EXTENSION. The first field of the
++payload for this EXTENSION command is another commandId, sometimes
++called the subcommandId, which indicates which extension command is
++being used. A subcommandId-specific payload follows the subcommandId.
++
++All extensions (subcommandIds) are listed in the header file include/wmix.h.
++See also \93WMI Extension Events\94 on page B-58.
++
++
++WMI Extension Commands
++
++
++GPIO_INPUT_GET
++ Read GPIO pins configured for input
++
++GPIO_INTR_ACK
++ Acknowledge and re-arm GPIO interrupts reported earlier
++
++GPIO_OUTPUT_SET
++ Manage output on GPIO pins configured for output
++
++GPIO_REGISTER_GET
++ Read an arbitrary GPIO register
++
++GPIO_REGISTER_SET
++ Dynamically change GPIO configuration
++
++SET_LQTHRESHOLD
++ Set link quality thresholds; the sampling happens at every unicast
++ data frame Tx, if certain thresholds are met, and corresponding
++ events are sent to the host
++
++
++=====================================================================
++
++Name
++ GPIO_INPUT_GET
++
++Synopsis
++ Allows the host to read GPIO pins that are configured for input. The values read are
++ returned through a \93GPIO_DATA\94 extension event.
++
++NOTE: Support for GPIO is optional.
++
++Command
++ N/A
++
++Command Parameters
++ None
++
++
++
++Reply Parameters
++ None
++
++
++Reset Value
++ None
++
++
++
++Restrictions
++ None
++
++=====================================================================
++
++
++Name
++ GPIO_INTR_ACK
++
++Synopsis
++ The host uses this command to acknowledge and to re-arm GPIO interrupts reported
++ through an earlier \93GPIO_INTR\94 extension event. A single \93GPIO_INTR_ACK\94
++ command should be used to acknowledge all GPIO interrupts that the host knows to
++ be outstanding (if pending interrupts are not acknowledged through
++ \93GPIO_INTR_ACK\94, another \93GPIO_INTR\94 extension event is raised).
++
++NOTE: Support for GPIO is optional.
++
++Command
++ N/A
++
++Command Parameters
++ UINT32 ack_mask
++ A mask of interrupting GPIO pins (e.g., ack_mask
++ bit [3] acknowledges an interrupt from the pin GPIO3).
++
++Command Values
++ None
++
++Reset Value
++ None
++
++Restrictions
++ The host should acknowledge only interrupts about which it was notified.
++
++
++=====================================================================
++
++Name
++ GPIO_OUTPUT_SET
++
++Synopsis
++ Manages output on GPIO pins configured for output.
++
++ Conflicts between set_mask and clear_mask or enable_mask and disable_mask result
++ in undefined behavior.
++
++NOTE: Support for GPIO is optional.
++
++Command
++ N/A
++
++Command Parameters
++ UINT32 set_mask
++ Specifies which pins should drive a 1 out
++ UINT32 clear_mask
++ Specifies which pins should drive a 0 out
++ UINT32 enable_mask
++ Specifies which pins should be enabled for output
++ UINT32 disable_mask
++ Specifies which pins should be disabled for output
++
++Command Values
++ None
++
++
++Reset Value
++ None
++
++
++Restrictions
++ None
++
++
++
++=====================================================================
++
++
++Name
++ GPIO_REGISTER_GET
++
++Synopsis
++ Allows the host to read an arbitrary GPIO register. It is intended for use during
++ bringup/debug. The target responds to this command with a \93GPIO_DATA\94 event.
++
++NOTE: Support for GPIO is optional.
++
++Command
++ N/A
++
++Command Parameters
++ UINT32
++ gpioreg_id
++ Specifies a GPIO register identifier, as defined
++in include/AR6000/AR6000_gpio.h
++
++Reply Parameters
++ None
++
++Reset Value
++ N/A
++
++Restrictions
++ None
++
++
++=====================================================================
++
++Name
++ GPIO_REGISTER_SET
++
++Synopsis
++ Allows the host to dynamically change GPIO configuration (usually handled
++ statically through the GPIO configuration DataSet).
++
++NOTE: Support for GPIO is optional.
++
++Command
++ N/A
++
++Command Parameters
++ UINT32 gpioreg_id
++ Specifies a GPIO register identifier, as defined in
++ include/AR6000/AR6000_gpio.h
++ UINT32 value
++ Specifies a value to write to the specified
++ GPIO register
++
++Command Values
++ None
++
++
++Reset Value
++ Initial hardware configuration is as defined in the AR6001 or AR6002 ROCmTM
++ Single-Chip MAC/BB/Radio for 2.4/5 GHz Embedded WLAN Applications data sheet. This
++ configuration is modified by the GPIO Configuration DataSet, if one exists.
++
++Restrictions
++ None
++
++
++=====================================================================
++
++
++Name
++ SET_LQTHRESHOLD
++
++Synopsis
++ Set link quality thresholds, the sampling happens at every unicast data frame Tx, if
++ certain threshold is met, corresponding event will be sent to host.
++
++Command
++ wmiconfig eth1 --lqThreshold <enable> <upper_threshold_1>...
++ <upper_threshold_4> <lower_threshold_1>... <lower_threshold_4>
++
++Command Parameters
++ A_UINT8 enable;
++ A_UINT8 thresholdAbove1_Val;
++ A_UINT8 thresholdAbove2_Val;
++ A_UINT8 thresholdAbove3_Val;
++ A_UINT8 thresholdAbove4_Val;
++ A_UINT8 thresholdBelow1_Val;
++ A_UINT8 thresholdBelow2_Val;
++ A_UINT8 thresholdBelow3_Val;
++ A_UINT8 thresholdBelow4_Val;
++
++Command Values
++ enable
++ = 0
++ Disable link quality sampling
++
++ = 1
++ Enable link quality sampling
++
++
++ thresholdAbove_Val
++ [1...4]
++ Above thresholds (value in [0,100]), in ascending
++ order threshold
++
++ Below_Val [1...4] = below thresholds (value
++ in [0,100]), in ascending order
++
++Reset Values
++ None
++
++Restrictions
++ None
++
++=====================================================================
++WMI Extension Events
++
++The WMI EXTENSION event is used for a collection of events that:
++
++ Are not generic wireless events
++ May be implementation-specific
++ May be target platform-specific
++ May be optional for a host implementation
++
++ An extension event is sent from the AR6000 device targets to the host just like
++any other WMI event message, using the WMI_EXTENSION_EVENTID. The
++first field of the payload for this \93EXTENSION\94 event is another commandId
++(sometimes called the subcommandId) that indicates which \93EXTENSION\94
++event is being used. A subcommandId-specific payload follows the
++subcommandId.
++
++All extensions (subcommandIds) are listed in the header file include/wmix.h.
++See also \93WMI Extension Commands\94 on page B-55.
++
++
++WMI Extension Events
++
++
++GPIO_ACK
++ Acknowledges a host set command has been processed by the device
++
++GPIO_DATA
++ Response to a host\92s request for data
++
++GPIO_INTR
++ Signals that GPIO interrupts are pending
++
++
++=====================================================================
++
++Name
++ GPIO_ACK
++
++Synopsis
++ Acknowledges that a host set command (either \93GPIO_OUTPUT_SET\94 or
++ \93GPIO_REGISTER_SET\94) has been processed by the AR6000 device.
++
++NOTE: Support for GPIO is optional.
++
++Event ID
++ N/A
++
++Event Parameters
++ None
++
++
++Event Values
++ None
++
++=====================================================================
++
++
++Name
++ GPIO_DATA
++
++Synopsis
++ The AR6000 device uses this event to respond to the host\92s earlier request for data
++ (through either a \93GPIO_REGISTER_GET\94 or a \93GPIO_INPUT_GET\94 command).
++
++NOTE: Support for GPIO is optional.
++
++Event ID
++ N/A
++
++Event Parameters
++ UINT32 value
++ Holds the data of interest, which is either a register value
++ (in the case of \93GPIO_REGISTER_GET\94) or a mask of
++ pin inputs (in the case of \93GPIO_INPUT_GET\94).
++ UINT32 reg_id
++ Indicates which register was read (in the case of
++ \93GPIO_REGISTER_GET\94) or is GPIO_ID_NONE (in the
++ case of \93GPIO_INPUT_GET\94)
++
++Event Values
++ None
++
++
++=====================================================================
++
++
++
++Name
++ GPIO_INTR
++
++Synopsis
++ The AR6000 device raises this event to signal that GPIO interrupts are pending.
++ These GPIOs may be interrupts that occurred after the last \93GPIO_INTR_ACK\94
++ command was issued, or may be GPIO interrupts that the host failed to acknowledge
++ in the last \93GPIO_INTR_ACK\94. The AR6000 will not raise another GPIO_INTR
++ event until this event is acknowledged through a \93GPIO_INTR_ACK\94 command.
++
++NOTE: Support for GPIO is optional.
++
++Event ID
++ N/A
++
++Event Parameters
++ UINT32 intr_mask
++ Indicates which GPIO interrupts are currently pending
++
++ UINT32 input_values
++ A recent copy of the GPIO input values, taken at the
++ time the most recent GPIO interrupt was processed
++
++Event Values
++ None
++
++
++
++=====================================================================
++#endif
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wmi/wmi_host.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wmi/wmi_host.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,71 @@
++#ifndef _WMI_HOST_H_
++#define _WMI_HOST_H_
++/*
++ * Copyright (c) 2004-2006 Atheros Communications Inc.
++ * All rights reserved.
++ *
++ * This file contains local definitios for the wmi host module.
++ *
++ * $Id: //depot/sw/releases/olca2.0-GPL/host/wmi/wmi_host.h#1 $
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ *
++ *
++ */
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++struct wmi_stats {
++ A_UINT32 cmd_len_err;
++ A_UINT32 cmd_id_err;
++};
++
++struct wmi_t {
++ A_BOOL wmi_ready;
++ A_BOOL wmi_numQoSStream;
++ A_UINT8 wmi_wmiStream2AcMapping[WMI_PRI_MAX_COUNT];
++ WMI_PRI_STREAM_ID wmi_ac2WmiStreamMapping[WMM_NUM_AC];
++ A_UINT16 wmi_streamExistsForAC[WMM_NUM_AC];
++ A_UINT8 wmi_fatPipeExists;
++ void *wmi_devt;
++ struct wmi_stats wmi_stats;
++ struct ieee80211_node_table wmi_scan_table;
++ A_UINT8 wmi_bssid[ATH_MAC_LEN];
++ A_UINT8 wmi_powerMode;
++ A_UINT8 wmi_phyMode;
++ A_UINT8 wmi_keepaliveInterval;
++ A_MUTEX_T wmi_lock;
++};
++
++#define WMI_INIT_WMISTREAM_AC_MAP(w) \
++{ (w)->wmi_wmiStream2AcMapping[WMI_BEST_EFFORT_PRI] = WMM_AC_BE; \
++ (w)->wmi_wmiStream2AcMapping[WMI_LOW_PRI] = WMM_AC_BK; \
++ (w)->wmi_wmiStream2AcMapping[WMI_HIGH_PRI] = WMM_AC_VI; \
++ (w)->wmi_wmiStream2AcMapping[WMI_HIGHEST_PRI] = WMM_AC_VO; \
++ (w)->wmi_ac2WmiStreamMapping[WMM_AC_BE] = WMI_BEST_EFFORT_PRI; \
++ (w)->wmi_ac2WmiStreamMapping[WMM_AC_BK] = WMI_LOW_PRI; \
++ (w)->wmi_ac2WmiStreamMapping[WMM_AC_VI] = WMI_HIGH_PRI; \
++ (w)->wmi_ac2WmiStreamMapping[WMM_AC_VO] = WMI_HIGHEST_PRI; }
++
++#define WMI_WMISTREAM_ACCESSCATEGORY(w,s) (w)->wmi_wmiStream2AcMapping[s]
++#define WMI_ACCESSCATEGORY_WMISTREAM(w,ac) (w)->wmi_ac2WmiStreamMapping[ac]
++
++#define LOCK_WMI(w) A_MUTEX_LOCK(&(w)->wmi_lock);
++#define UNLOCK_WMI(w) A_MUTEX_UNLOCK(&(w)->wmi_lock);
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _WMI_HOST_H_ */
+Index: linux-2.6.24.7/drivers/sdio/function/wlan/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/function/wlan/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,4 @@
++#
++# SDIO wlan ar600 card function driver
++#
++obj-$(CONFIG_SDIO_AR6000_WLAN) += ar6000/
+\ No newline at end of file
+Index: linux-2.6.24.7/drivers/sdio/hcd/Kconfig
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/hcd/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,14 @@
++config SDIO_S3C24XX
++ tristate "Samsung s3c24xx host controller"
++ depends on PLAT_S3C24XX && SDIO
++ default m
++ help
++ good luck.
++
++config SDIO_S3C24XX_DMA
++ bool "Samsung s3c24xx host controller DMA I/O"
++ depends on SDIO_S3C24XX
++ default n
++ help
++ good luck.
++
+Index: linux-2.6.24.7/drivers/sdio/hcd/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/hcd/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1 @@
++obj-$(CONFIG_PLAT_S3C24XX) += s3c24xx/
+Index: linux-2.6.24.7/drivers/sdio/hcd/s3c24xx/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/hcd/s3c24xx/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,2 @@
++obj-$(CONFIG_PLAT_S3C24XX) += sdio_s3c24xx_hcd.o
++sdio_s3c24xx_hcd-objs := s3c24xx_hcd.o
+Index: linux-2.6.24.7/drivers/sdio/hcd/s3c24xx/s3c24xx_hcd.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/hcd/s3c24xx/s3c24xx_hcd.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,1567 @@
++/*
++ * s3c24xx_hcd.c - Samsung S3C MCI driver, Atheros SDIO API compatible.
++ *
++ * Copyright (C) 2007 by Openmoko, Inc.
++ * Written by Samuel Ortiz <sameo@openedhand.com>
++ * All Rights Reserved
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
++ */
++
++#include <linux/kernel.h>
++#include <linux/interrupt.h>
++#include <linux/list.h>
++#include <linux/dma-mapping.h>
++#include <linux/errno.h>
++#include <linux/platform_device.h>
++#include <linux/device.h>
++#include <linux/clk.h>
++#include <linux/fs.h>
++#include <linux/ioport.h>
++#include <linux/workqueue.h>
++#include <linux/completion.h>
++#include <linux/delay.h>
++#include <linux/seq_file.h>
++#include <linux/debugfs.h>
++
++#include <linux/sdio/ctsystem.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/sdio_lib.h>
++
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/uaccess.h>
++#include <asm/dma.h>
++#include <asm/dma-mapping.h>
++
++#include <asm/arch/regs-sdi.h>
++#include <asm/arch/regs-gpio.h>
++#include <asm/arch/mci.h>
++#include <asm/arch/gta02.h>
++
++#include "s3c24xx_hcd.h"
++
++#define DESCRIPTION "S3c24xx SDIO host controller"
++#define AUTHOR "Samuel Ortiz <sameo@openedhand.com>"
++
++#define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1)
++
++static struct s3c2410_dma_client s3c24xx_hcd_dma_client = {
++ .name = "s3c24xx_hcd",
++};
++
++extern struct platform_device s3c_device_sdi;
++
++static void dump_request(struct s3c24xx_hcd_context * context)
++{
++ if (context->hcd.pCurrentRequest != NULL) {
++ DBG_PRINT(SDDBG_ERROR, ("Current Request Command:%d, ARG:0x%8.8X flags: 0x%04x\n",
++ context->hcd.pCurrentRequest->Command, context->hcd.pCurrentRequest->Argument,
++ context->hcd.pCurrentRequest->Flags));
++ if (IS_SDREQ_DATA_TRANS(context->hcd.pCurrentRequest->Flags)) {
++ DBG_PRINT(SDDBG_ERROR, ("Data %s, Blocks: %d, BlockLen:%d Remaining: %d \n",
++ IS_SDREQ_WRITE_DATA(context->hcd.pCurrentRequest->Flags) ? "WRITE":"READ",
++ context->hcd.pCurrentRequest->BlockCount,
++ context->hcd.pCurrentRequest->BlockLen,
++ context->hcd.pCurrentRequest->DataRemaining));
++ }
++ }
++}
++
++static void s3c24xx_dump_regs(struct s3c24xx_hcd_context * context)
++{
++ u32 con, pre, cmdarg, cmdcon, cmdsta, r0, r1, r2, r3, timer, bsize;
++ u32 datcon, datcnt, datsta, fsta, imask;
++
++ con = readl(context->base + S3C2410_SDICON);
++ pre = readl(context->base + S3C2410_SDIPRE);
++ cmdarg = readl(context->base + S3C2410_SDICMDARG);
++ cmdcon = readl(context->base + S3C2410_SDICMDCON);
++ cmdsta = readl(context->base + S3C2410_SDICMDSTAT);
++ r0 = readl(context->base + S3C2410_SDIRSP0);
++ r1 = readl(context->base + S3C2410_SDIRSP1);
++ r2 = readl(context->base + S3C2410_SDIRSP2);
++ r3 = readl(context->base + S3C2410_SDIRSP3);
++ timer = readl(context->base + S3C2410_SDITIMER);
++ bsize = readl(context->base + S3C2410_SDIBSIZE);
++ datcon = readl(context->base + S3C2410_SDIDCON);
++ datcnt = readl(context->base + S3C2410_SDIDCNT);
++ datsta = readl(context->base + S3C2410_SDIDSTA);
++ fsta = readl(context->base + S3C2410_SDIFSTA);
++ imask = readl(context->base + S3C2440_SDIIMSK);
++
++ printk("SDICON: 0x%08x\n", con);
++ printk("SDIPRE: 0x%08x\n", pre);
++ printk("SDICmdArg: 0x%08x\n", cmdarg);
++ printk("SDICmdCon: 0x%08x\n", cmdcon);
++ printk("SDICmdSta: 0x%08x\n", cmdsta);
++ printk("SDIRSP0: 0x%08x\n", r0);
++ printk("SDIRSP1: 0x%08x\n", r1);
++ printk("SDIRSP2: 0x%08x\n", r2);
++ printk("SDIRSP3: 0x%08x\n", r3);
++ printk("SDIDTimer: 0x%08x\n", timer);
++ printk("SDIBSize: 0x%08x\n", bsize);
++ printk("SDIDatCon: 0x%08x\n", datcon);
++ printk("SDIDatCnt: 0x%08x\n", datcnt);
++ printk("SDIDatSta: 0x%08x\n", datsta);
++ printk("SDIFSta: 0x%08x\n", fsta);
++ printk("SDIIntMsk: 0x%08x\n", imask);
++}
++
++static inline void s3c24xx_hcd_clear_imask(struct s3c24xx_hcd_context * context)
++{
++ if (context->int_sdio) {
++ writel(S3C2410_SDIIMSK_SDIOIRQ | S3C2410_SDIIMSK_READWAIT,
++ context->base + S3C2440_SDIIMSK);
++ } else {
++ writel(0, context->base + S3C2440_SDIIMSK);
++ }
++}
++
++static inline void s3c24xx_hcd_set_imask(struct s3c24xx_hcd_context * context)
++{
++ writel(context->int_mask, context->base + S3C2440_SDIIMSK);
++}
++
++
++static inline void s3c24xx_hcd_clear_dsta(struct s3c24xx_hcd_context * context)
++{
++ u32 dsta;
++
++ dsta = readl(context->base + S3C2410_SDIDSTA);
++ writel(dsta, context->base + S3C2410_SDIDSTA);
++}
++
++static inline void s3c24xx_hcd_clear_csta(struct s3c24xx_hcd_context * context)
++{
++ u32 csta, csta_clear = 0;
++
++ csta = readl(context->base + S3C2410_SDICMDSTAT);
++
++ if (csta & S3C2410_SDICMDSTAT_CRCFAIL)
++ csta_clear |= S3C2410_SDICMDSTAT_CRCFAIL;
++ if (csta & S3C2410_SDICMDSTAT_CMDSENT)
++ csta_clear |= S3C2410_SDICMDSTAT_CMDSENT;
++ if (csta & S3C2410_SDICMDSTAT_CMDTIMEOUT)
++ csta_clear |= S3C2410_SDICMDSTAT_CMDTIMEOUT;
++ if (csta & S3C2410_SDICMDSTAT_RSPFIN)
++ csta_clear |= S3C2410_SDICMDSTAT_RSPFIN;
++
++ writel(csta_clear, context->base + S3C2410_SDICMDSTAT);
++}
++
++static inline void s3c24xx_hcd_clear_sta(struct s3c24xx_hcd_context * context)
++{
++ u32 csta, dsta, csta_clear = 0, dsta_clear = 0;
++
++ csta = readl(context->base + S3C2410_SDICMDSTAT);
++ dsta = readl(context->base + S3C2410_SDIDSTA);
++
++ if (csta & S3C2410_SDICMDSTAT_CRCFAIL)
++ csta_clear |= S3C2410_SDICMDSTAT_CRCFAIL;
++ if (csta & S3C2410_SDICMDSTAT_CMDSENT)
++ csta_clear |= S3C2410_SDICMDSTAT_CMDSENT;
++ if (csta & S3C2410_SDICMDSTAT_CMDTIMEOUT)
++ csta_clear |= S3C2410_SDICMDSTAT_CMDTIMEOUT;
++ if (csta & S3C2410_SDICMDSTAT_RSPFIN)
++ csta_clear |= S3C2410_SDICMDSTAT_RSPFIN;
++
++
++ if (dsta & S3C2410_SDIDSTA_RDYWAITREQ)
++ dsta_clear |= S3C2410_SDIDSTA_RDYWAITREQ;
++ if (dsta & S3C2410_SDIDSTA_SDIOIRQDETECT)
++ dsta_clear |= S3C2410_SDIDSTA_SDIOIRQDETECT;
++ if (dsta & S3C2410_SDIDSTA_FIFOFAIL)
++ dsta_clear |= S3C2410_SDIDSTA_FIFOFAIL;
++ if (dsta & S3C2410_SDIDSTA_CRCFAIL)
++ dsta_clear |= S3C2410_SDIDSTA_CRCFAIL;
++ if (dsta & S3C2410_SDIDSTA_RXCRCFAIL)
++ dsta_clear |= S3C2410_SDIDSTA_RXCRCFAIL;
++ if (dsta & S3C2410_SDIDSTA_DATATIMEOUT)
++ dsta_clear |= S3C2410_SDIDSTA_DATATIMEOUT;
++ if (dsta & S3C2410_SDIDSTA_XFERFINISH)
++ dsta_clear |= S3C2410_SDIDSTA_XFERFINISH;
++ if (dsta & S3C2410_SDIDSTA_BUSYFINISH)
++ dsta_clear |= S3C2410_SDIDSTA_BUSYFINISH;
++ if (dsta & S3C2410_SDIDSTA_SBITERR)
++ dsta_clear |= S3C2410_SDIDSTA_SBITERR;
++
++ writel(csta_clear, context->base + S3C2410_SDICMDSTAT);
++ writel(dsta_clear, context->base + S3C2410_SDIDSTA);
++}
++
++static inline void s3c24xx_hcd_fifo_reset(struct s3c24xx_hcd_context * context)
++{
++ u32 fsta;
++
++ fsta = readl(context->base + S3C2410_SDIFSTA);
++ fsta |= S3C2440_SDIFSTA_FIFORESET;
++ writel(fsta, context->base + S3C2410_SDIFSTA);
++}
++
++#if 0
++static void s3c24xx_hcd_reset(struct s3c24xx_hcd_context * context)
++{
++ u32 con, counter;
++ unsigned long flags;
++
++ spin_lock_irqsave(&context->lock, flags);
++
++ con = readl(context->base + S3C2410_SDICON);
++
++ con |= S3C2440_SDICON_SDRESET;
++
++ writel(con, context->base + S3C2410_SDICON);
++
++ counter = 1000;
++ while(counter) {
++ con = readl(context->base + S3C2410_SDICON);
++ if (!(con & S3C2440_SDICON_SDRESET))
++ break;
++ counter--;
++ mdelay(1);
++ }
++
++ spin_unlock_irqrestore(&context->lock, flags);
++}
++#endif
++
++static SDIO_STATUS s3c24xx_hcd_clock_enable(struct s3c24xx_hcd_context * context,
++ unsigned int clock_rate,
++ unsigned char enable)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ unsigned long flags;
++ u32 con;
++
++ spin_lock_irqsave(&context->lock, flags);
++
++ con = readl(context->base + S3C2410_SDICON);
++
++ if (enable && clock_rate) {
++ con |= S3C2410_SDICON_CLOCKTYPE;
++ } else {
++ con &= ~S3C2410_SDICON_CLOCKTYPE;
++ }
++
++ if (clock_rate) {
++ int prescaler;
++
++ for (prescaler = 0; prescaler < 0xff; prescaler++) {
++ context->device.actual_clock_rate =
++ context->device.max_clock_rate / (prescaler + 1);
++
++ if (context->device.actual_clock_rate <= clock_rate &&
++ context->device.actual_clock_rate <= context->hcd.MaxClockRate)
++ break;
++ }
++
++ if (prescaler == 0xff)
++ DBG_PRINT(SDDBG_ERROR , ("Using lowest clock rate\n"));
++
++ writel(prescaler, context->base + S3C2410_SDIPRE);
++ }
++
++ writel(con, context->base + S3C2410_SDICON);
++
++ spin_unlock_irqrestore(&context->lock, flags);
++
++ return SDIOErrorToOSError(status);
++}
++
++static void s3c24xx_hcd_set_bus_mode(struct s3c24xx_hcd_context *context,
++ PSDCONFIG_BUS_MODE_DATA pMode)
++{
++ u32 datacon;
++ unsigned long flags;
++
++ DBG_PRINT(SDDBG_TRACE , ("SetBusMode\n"));
++
++ spin_lock_irqsave(&context->lock, flags);
++ datacon = readl(context->base + S3C2410_SDIDCON);
++
++ switch (SDCONFIG_GET_BUSWIDTH(pMode->BusModeFlags)) {
++ case SDCONFIG_BUS_WIDTH_1_BIT:
++ context->bus_width = 1;
++ datacon &= S3C2410_SDIDCON_WIDEBUS;
++ break;
++ case SDCONFIG_BUS_WIDTH_4_BIT:
++ context->bus_width = 4;
++ datacon |= S3C2410_SDIDCON_WIDEBUS;
++ break;
++ default:
++ DBG_PRINT(SDDBG_TRACE , ("Unknown bus width: %d\n", SDCONFIG_GET_BUSWIDTH(pMode->BusModeFlags)));
++ break;
++ }
++
++ writel(datacon, context->base + S3C2410_SDIDCON);
++ spin_unlock_irqrestore(&context->lock, flags);
++
++ /* Set clock rate and enable clock */
++ s3c24xx_hcd_clock_enable(context, pMode->ClockRate, 1);
++ pMode->ActualClockRate = context->device.actual_clock_rate;
++
++ DBG_PRINT(SDDBG_TRACE , ("BUS mode: %d bits wide, actual clock rate: %d kHz (requested %d kHz)\n",
++ context->bus_width, pMode->ActualClockRate / 1000, pMode->ClockRate / 1000));
++}
++
++
++static void s3c24xx_hcd_dma_complete(struct s3c24xx_hcd_context * context)
++{
++ u32 dsta, counter, i;
++ PSDREQUEST req;
++ SDIO_STATUS status = SDIO_STATUS_ERROR;
++
++ req = GET_CURRENT_REQUEST(&context->hcd);
++ if (req == NULL) {
++ DBG_PRINT(SDDBG_ERROR, ("%s(): No current request\n", __FUNCTION__));
++ return;
++ }
++
++ if (context->complete == S3C24XX_HCD_DATA_READ) {
++ /* DMA READ completion */
++ if (context->latest_xfer_size != req->DataRemaining) {
++ DBG_PRINT(SDDBG_ERROR, ("Unexpected read xfer size: %d <-> %d\n",
++ context->latest_xfer_size, req->DataRemaining));
++ status = SDIO_STATUS_BUS_WRITE_ERROR;
++ }
++
++ counter = 0;
++ dsta = readl(context->base + S3C2410_SDIDSTA);
++ while (!(dsta & S3C2410_SDIDSTA_XFERFINISH)) {
++ if (counter > 500) {
++ printk("read xfer timed out\n");
++ s3c24xx_dump_regs(context);
++ memcpy(req->pDataBuffer, context->io_buffer,
++ req->BlockCount * req->BlockLen);
++ printk("Transfer: %dx%d\n", req->BlockCount, req->BlockLen);
++ for (i = 0; i < req->DataRemaining; i++)
++ printk("0x%x ", *(((char *)context->io_buffer) + i));
++ printk("\n");
++ status = SDIO_STATUS_BUS_READ_TIMEOUT;
++ goto out;
++ }
++ dsta = readl(context->base + S3C2410_SDIDSTA);
++ counter++;
++ mdelay(1);
++ };
++
++ dma_sync_single(NULL, context->io_buffer_dma,
++ req->BlockCount * req->BlockLen, DMA_BIDIRECTIONAL);
++
++ writel(S3C2410_SDIDSTA_XFERFINISH, context->base + S3C2410_SDIDSTA);
++
++ memcpy(req->pDataBuffer, context->io_buffer,
++ req->BlockCount * req->BlockLen);
++
++ req->DataRemaining = 0;
++ status = SDIO_STATUS_SUCCESS;
++
++ } else if (context->complete == S3C24XX_HCD_DATA_WRITE) {
++ /* DMA WRITE completion */
++ if (context->latest_xfer_size != req->DataRemaining) {
++ DBG_PRINT(SDDBG_ERROR, ("Unexpected write xfer size: %d <-> %d\n",
++ context->latest_xfer_size, req->DataRemaining));
++ status = SDIO_STATUS_BUS_WRITE_ERROR;
++ }
++
++ dsta = readl(context->base + S3C2410_SDIDSTA);
++ counter = 0;
++ while (!(dsta & S3C2410_SDIDSTA_XFERFINISH)) {
++ if (counter > 500) {
++ printk("write xfer timed out\n");
++ status = SDIO_STATUS_BUS_WRITE_ERROR;
++ goto out;
++ }
++ dsta = readl(context->base + S3C2410_SDIDSTA);
++ counter++;
++ mdelay(1);
++ };
++
++ writel(S3C2410_SDIDSTA_XFERFINISH, context->base + S3C2410_SDIDSTA);
++ req->DataRemaining = 0;
++ status = SDIO_STATUS_SUCCESS;
++ }
++
++ out:
++ req->Status = status;
++}
++
++static void s3c24xx_hcd_pio_complete(struct s3c24xx_hcd_context * context)
++{
++ u32 fsta, counter;
++ u8 *ptr;
++ int fifo_count;
++ PSDREQUEST req;
++ SDIO_STATUS status = SDIO_STATUS_ERROR;
++
++ req = GET_CURRENT_REQUEST(&context->hcd);
++ if (req == NULL) {
++ DBG_PRINT(SDDBG_ERROR, ("%s(): No current request\n", __FUNCTION__));
++ return;
++ }
++
++ ptr = req->pDataBuffer;
++
++ if (context->complete == S3C24XX_HCD_DATA_READ) {
++ counter = 0;
++ DBG_PRINT(SDDBG_TRACE, ("Data read..."));
++ do {
++ counter++;
++ fsta = readl(context->base + S3C2410_SDIFSTA);
++ mdelay(1);
++ if (counter > 1000) {
++ DBG_PRINT(SDDBG_ERROR, ("DATA read timeout\n"));
++ status = SDIO_STATUS_BUS_READ_TIMEOUT;
++ s3c24xx_dump_regs(context);
++ goto out;
++ }
++ } while(!(fsta & S3C2410_SDIFSTA_RFDET));
++ DBG_PRINT(SDDBG_TRACE, ("RX detected\n"));
++
++ while (1) {
++ counter = 0;
++ fifo_count = (readl(context->base + S3C2410_SDIFSTA) & S3C2410_SDIFSTA_COUNTMASK);
++ while (!fifo_count) {
++ counter++;
++ mdelay(1);
++ if (counter > 500) {
++ s3c24xx_dump_regs(context);
++ DBG_PRINT(SDDBG_ERROR, ("No more bytes in FIFO\n"));
++ goto out;
++ }
++ fifo_count = (readl(context->base + S3C2410_SDIFSTA) & S3C2410_SDIFSTA_COUNTMASK);
++ }
++
++ if (fifo_count > req->DataRemaining) {
++ DBG_PRINT(SDDBG_ERROR, ("DATA read, fifo_count %d > expected %d\n", fifo_count, req->DataRemaining));
++ fifo_count = req->DataRemaining;
++ }
++
++ req->DataRemaining -= fifo_count;
++ while (fifo_count > 0) {
++ if (context->data_size == 4)
++ *(ptr) = readl(context->base + S3C2440_SDIDATA);
++ else if (context->data_size == 2)
++ *(ptr) = readw(context->base + S3C2440_SDIDATA);
++ else
++ *(ptr) = readb(context->base + S3C2440_SDIDATA);
++
++ ptr += context->data_size;
++ fifo_count -= context->data_size;
++
++ }
++
++ if (!req->DataRemaining) {
++ /* We poll for xfer finish */
++ counter = 0;
++ while (!(readl(context->base + S3C2410_SDIDSTA)
++ & S3C2410_SDIDSTA_XFERFINISH)) {
++ counter++;
++ mdelay(1);
++ if (counter > 500) {
++ DBG_PRINT(SDDBG_ERROR, ("RX XFERFINISH missing\n"));
++ s3c24xx_dump_regs(context);
++ break;
++ }
++ }
++
++ status = SDIO_STATUS_SUCCESS;
++ goto out;
++ }
++ }
++
++ } else if (context->complete == S3C24XX_HCD_DATA_WRITE) {
++ counter = 0;
++ DBG_PRINT(SDDBG_TRACE, ("Data write..."));
++ do {
++ counter++;
++ fsta = readl(context->base + S3C2410_SDIFSTA);
++ mdelay(1);
++ if (counter > 1000) {
++ DBG_PRINT(SDDBG_ERROR, ("DATA write timeout\n"));
++ status = SDIO_STATUS_BUS_WRITE_ERROR;
++ goto out;
++ break;
++ }
++
++ } while(!(fsta & S3C2410_SDIFSTA_TFDET));
++ DBG_PRINT(SDDBG_TRACE, ("TX detected\n"));
++
++ while (1) {
++ counter = 0;
++ fifo_count = 63 - (readl(context->base + S3C2410_SDIFSTA) & S3C2410_SDIFSTA_COUNTMASK);
++ while (!fifo_count) {
++ counter++;
++ mdelay(1);
++ if (counter > 500) {
++ s3c24xx_dump_regs(context);
++ DBG_PRINT(SDDBG_ERROR, ("No more space in FIFO\n"));
++ goto out;
++ }
++ fifo_count = 63 - (readl(context->base + S3C2410_SDIFSTA) & S3C2410_SDIFSTA_COUNTMASK);
++ }
++
++ if (fifo_count > req->DataRemaining)
++ fifo_count = req->DataRemaining;
++
++ req->DataRemaining -= fifo_count;
++
++ while (fifo_count > 0) {
++ if (context->data_size == 4)
++ writel(*(ptr), context->base + S3C2440_SDIDATA);
++ else if (context->data_size == 2)
++ writew(*(ptr), context->base + S3C2440_SDIDATA);
++ else
++ writeb(*(ptr), context->base + S3C2440_SDIDATA);
++
++ ptr += context->data_size;
++ fifo_count -= context->data_size;
++ }
++
++ if (!req->DataRemaining) {
++ /* We poll for xfer finish */
++ counter = 0;
++ while (!(readl(context->base + S3C2410_SDIDSTA)
++ & S3C2410_SDIDSTA_XFERFINISH)) {
++ counter++;
++ mdelay(1);
++ if (counter > 500) {
++ DBG_PRINT(SDDBG_ERROR, ("RX XFERFINISH missing\n"));
++ s3c24xx_dump_regs(context);
++ break;
++ }
++ }
++
++ status = SDIO_STATUS_SUCCESS;
++ goto out;
++ }
++ }
++
++ } else {
++ DBG_PRINT(SDDBG_ERROR, ("Wrong context: %d\n", context->complete));
++ }
++
++ out:
++ req->Status = status;
++}
++
++static void s3c24xx_hcd_io_work(struct work_struct *work)
++{
++ PSDREQUEST req;
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ struct s3c24xx_hcd_context * context =
++ container_of(work, struct s3c24xx_hcd_context, io_work);
++
++ req = GET_CURRENT_REQUEST(&context->hcd);
++ if (req == NULL) {
++ DBG_PRINT(SDDBG_ERROR, ("%s(): No current request\n", __FUNCTION__));
++ return;
++ }
++
++ if (req->Status == SDIO_STATUS_BUS_RESP_TIMEOUT) {
++ DBG_PRINT(SDDBG_ERROR, ("### TIMEOUT ###\n"));
++ s3c24xx_dump_regs(context);
++ goto out;
++ }
++
++ if (context->complete == S3C24XX_HCD_NO_RESPONSE &&
++ req->Status == SDIO_STATUS_SUCCESS) {
++ DBG_PRINT(SDDBG_TRACE, ("CMD done, Status: %d\n", req->Status));
++ printk("CMD done, Status: %d\n", req->Status);
++ goto out;
++ }
++
++ if ((context->complete == S3C24XX_HCD_RESPONSE_SHORT ||
++ context->complete == S3C24XX_HCD_RESPONSE_LONG ||
++ context->complete == S3C24XX_HCD_DATA_READ ||
++ context->complete == S3C24XX_HCD_DATA_WRITE) &&
++ req->Status == SDIO_STATUS_SUCCESS) {
++ u32 resp[4];
++
++ /* We need to copy the response data and send it over */
++ resp[0] = readl(context->base + S3C2410_SDIRSP0);
++ resp[1] = readl(context->base + S3C2410_SDIRSP1);
++ resp[2] = readl(context->base + S3C2410_SDIRSP2);
++ resp[3] = readl(context->base + S3C2410_SDIRSP3);
++
++ if (GET_SDREQ_RESP_TYPE(req->Flags) != SDREQ_FLAGS_RESP_R2) {
++ DBG_PRINT(SDDBG_TRACE, ("SHORT response: 0x%08x\n", resp[0]));
++ memcpy(&req->Response[1], (u8*)resp, 4);
++ req->Response[5] = (readl(context->base + S3C2410_SDICMDSTAT) & 0xff);
++ } else {
++ printk("LONG response: 0x%08x\n", resp[0]);
++ DBG_PRINT(SDDBG_TRACE, ("LONG response: 0x%08x\n", resp[0]));
++ memcpy(&req->Response[1], (u8*)resp, 16);
++ //req->Response[17] = (readl(context->base + S3C2410_SDICMDSTAT) & 0xff);
++ }
++
++ /* There is a data stage */
++ if (context->complete == S3C24XX_HCD_DATA_READ ||
++ context->complete == S3C24XX_HCD_DATA_WRITE) {
++ status = SDIO_CheckResponse(&context->hcd, req,
++ SDHCD_CHECK_DATA_TRANS_OK);
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR,
++ ("Target not ready for data xfer\n"));
++ return;
++ }
++
++ if (context->dma_en) {
++ dma_sync_single(NULL, context->io_buffer_dma,
++ req->BlockCount * req->BlockLen, DMA_BIDIRECTIONAL);
++
++ s3c2410_dma_ctrl(context->dma_channel, S3C2410_DMAOP_START);
++
++ wait_for_completion(&context->dma_complete);
++
++ s3c24xx_hcd_dma_complete(context);
++ } else {
++ s3c24xx_hcd_pio_complete(context);
++ }
++ }
++ }
++
++ out:
++ s3c24xx_hcd_clear_sta(context);
++ s3c24xx_hcd_clear_imask(context);
++
++ writel(0, context->base + S3C2410_SDICMDARG);
++ writel(0, context->base + S3C2410_SDICMDCON);
++
++ SDIO_HandleHcdEvent(&context->hcd, EVENT_HCD_TRANSFER_DONE);
++}
++
++static void s3c24xx_hcd_irq_work(struct work_struct *work)
++{
++ struct s3c24xx_hcd_context * context =
++ container_of(work, struct s3c24xx_hcd_context, irq_work);
++
++ disable_irq(context->io_irq);
++
++ writel(S3C2410_SDIDSTA_SDIOIRQDETECT, context->base + S3C2410_SDIDSTA);
++
++ SDIO_HandleHcdEvent(&context->hcd, EVENT_HCD_SDIO_IRQ_PENDING);
++
++ enable_irq(context->io_irq);
++}
++
++void s3c24xx_hcd_dma_done(struct s3c2410_dma_chan *dma_ch, void *buf_id,
++ int size, enum s3c2410_dma_buffresult result)
++{
++ struct s3c24xx_hcd_context * context =
++ (struct s3c24xx_hcd_context *) buf_id;
++
++ if (result != S3C2410_RES_OK) {
++ DBG_PRINT(SDDBG_ERROR, ("%s(): DMA xfer failed: %d\n", __FUNCTION__, result));
++ s3c24xx_dump_regs(context);
++ }
++
++ context->latest_xfer_size = size;
++ complete(&context->dma_complete);
++}
++
++static int s3c24xx_hcd_prepare_dma(struct s3c24xx_hcd_context * context)
++{
++ PSDREQUEST req;
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ int read = 0, hwcfg = S3C2410_DISRCC_INC | S3C2410_DISRCC_APB;
++ enum s3c2410_dmasrc source = S3C2410_DMASRC_MEM;
++
++ req = GET_CURRENT_REQUEST(&context->hcd);
++ if (req == NULL) {
++ DBG_PRINT(SDDBG_ERROR, ("%s(): No current request\n", __FUNCTION__));
++ status = SDIO_STATUS_ERROR;
++ }
++
++ if (!context->dma_en) {
++ DBG_PRINT(SDDBG_ERROR, ("%s(): DMA is disabled\n", __FUNCTION__));
++ status = SDIO_STATUS_ERROR;
++ }
++
++ if (!IS_SDREQ_DATA_TRANS(req->Flags)) {
++ DBG_PRINT(SDDBG_ERROR, ("%s(): No data to transfer\n", __FUNCTION__));
++ status = SDIO_STATUS_ERROR;
++ }
++
++ if(!IS_SDREQ_WRITE_DATA(req->Flags)) {
++ read = 1;
++ source = S3C2410_DMASRC_HW;
++ hwcfg = S3C2410_DISRCC_APB | 1;
++ } else {
++ memcpy(context->io_buffer, req->pDataBuffer, req->DataRemaining);
++ dma_sync_single(NULL, context->io_buffer_dma,
++ req->BlockCount * req->BlockLen, DMA_BIDIRECTIONAL);
++
++ }
++
++ s3c2410_dma_devconfig(context->dma_channel, source, hwcfg,
++ (unsigned long)context->mem->start + S3C2440_SDIDATA);
++
++ s3c2410_dma_config(context->dma_channel, context->data_size,
++ S3C2410_DCON_CH0_SDI);
++ //(S3C2410_DCON_HWTRIG | S3C2410_DCON_CH0_SDI));
++
++ s3c2410_dma_set_buffdone_fn(context->dma_channel, s3c24xx_hcd_dma_done);
++
++// s3c2410_dma_setflags(context->dma_channel, S3C2410_DMAF_AUTOSTART);
++
++ s3c2410_dma_ctrl(context->dma_channel, S3C2410_DMAOP_FLUSH);
++
++ s3c2410_dma_enqueue(context->dma_channel, context,
++ context->io_buffer_dma,
++ req->DataRemaining);
++
++ return 0;
++}
++
++
++static irqreturn_t s3c24xx_hcd_irq(int irq, void *dev_id)
++{
++ u32 cmdsta, dsta, fsta;
++ unsigned long flags, trace = 0;
++ PSDREQUEST req;
++ struct s3c24xx_hcd_context * context =
++ (struct s3c24xx_hcd_context *)dev_id;
++
++ spin_lock_irqsave(&context->lock, flags);
++
++ s3c24xx_hcd_clear_imask(context);
++
++ cmdsta = readl(context->base + S3C2410_SDICMDSTAT);
++ dsta = readl(context->base + S3C2410_SDIDSTA);
++ fsta = readl(context->base + S3C2410_SDIFSTA);
++
++ context->cmdsta = cmdsta;
++ context->dsta = dsta;
++ context->fsta = fsta;
++
++ s3c24xx_hcd_clear_csta(context);
++
++ if (dsta & S3C2410_SDIDSTA_SDIOIRQDETECT) {
++ writel(S3C2410_SDIDSTA_SDIOIRQDETECT, context->base + S3C2410_SDIDSTA);
++
++ if (context->int_sdio) {
++ u32 imask;
++
++ context->int_sdio = 0;
++
++ imask = readl(context->base + S3C2440_SDIIMSK);
++ imask &= ~S3C2410_SDIIMSK_SDIOIRQ;
++ writel(imask, context->base + S3C2440_SDIIMSK);
++ schedule_work(&context->irq_work);
++ }
++ }
++
++ req = GET_CURRENT_REQUEST(&context->hcd);
++ if (req == NULL) {
++ DBG_PRINT(SDDBG_TRACE, ("%s(): No current request\n", __FUNCTION__));
++ goto out;
++ }
++
++ if (cmdsta & S3C2410_SDICMDSTAT_CMDTIMEOUT) {
++ DBG_PRINT(SDDBG_ERROR, ("TIMEOUT\n"));
++ printk("TIMEOUT\n");
++ req->Status = SDIO_STATUS_BUS_RESP_TIMEOUT;
++ writel(S3C2410_SDICMDSTAT_CMDTIMEOUT, context->base + S3C2410_SDICMDSTAT);
++ schedule_work(&context->io_work);
++ }
++
++ if (cmdsta & S3C2410_SDICMDSTAT_CRCFAIL) {
++ DBG_PRINT(SDDBG_ERROR, ("CRCFAIL 0x%x\n", cmdsta));
++ printk("CRCFAIL 0x%x\n", cmdsta);
++ req->Status = SDIO_STATUS_BUS_RESP_CRC_ERR;
++ dump_request(context);
++ writel(S3C2410_SDICMDSTAT_CRCFAIL, context->base + S3C2410_SDICMDSTAT);
++ schedule_work(&context->io_work);
++ }
++
++
++ if (cmdsta & S3C2410_SDICMDSTAT_CMDSENT) {
++ writel(S3C2410_SDICMDSTAT_CMDSENT, context->base + S3C2410_SDICMDSTAT);
++
++ if (context->complete == S3C24XX_HCD_NO_RESPONSE) {
++ req->Status = SDIO_STATUS_SUCCESS;
++ trace = 1;
++ schedule_work(&context->io_work);
++ }
++ }
++
++ if (cmdsta & S3C2410_SDICMDSTAT_RSPFIN ||
++ (IS_SDREQ_WRITE_DATA(req->Flags) && (fsta & S3C2410_SDIFSTA_TFDET)) ||
++ (!IS_SDREQ_WRITE_DATA(req->Flags) && (fsta & S3C2410_SDIFSTA_RFDET))) {
++
++ writel(S3C2410_SDICMDSTAT_RSPFIN, context->base + S3C2410_SDICMDSTAT);
++
++ if (context->complete == S3C24XX_HCD_RESPONSE_SHORT ||
++ context->complete == S3C24XX_HCD_RESPONSE_LONG ||
++ context->complete == S3C24XX_HCD_DATA_READ ||
++ context->complete == S3C24XX_HCD_DATA_WRITE) {
++ req->Status = SDIO_STATUS_SUCCESS;
++ if (trace)
++ printk("IO work already scheduled, cmdsta: 0x%x\n", cmdsta);
++ schedule_work(&context->io_work);
++ }
++ }
++
++ out:
++ if (dsta & S3C2410_SDIDSTA_RDYWAITREQ) {
++ printk("S3C2410_SDIDSTA_RDYWAITREQ\n");
++ //writel(S3C2410_SDIDSTA_RDYWAITREQ, context->base + S3C2410_SDIDSTA);
++ }
++
++ if (dsta & S3C2410_SDIDSTA_FIFOFAIL) {
++ printk("S3C2410_SDIDSTA_FIFOFAIL\n");
++ writel(S3C2410_SDIDSTA_FIFOFAIL, context->base + S3C2410_SDIDSTA);
++ }
++
++ if (dsta & S3C2410_SDIDSTA_CRCFAIL) {
++ printk("S3C2410_SDIDSTA_CRCFAIL\n");
++ writel(S3C2410_SDIDSTA_CRCFAIL, context->base + S3C2410_SDIDSTA);
++ }
++
++ if (dsta & S3C2410_SDIDSTA_RXCRCFAIL) {
++ printk("S3C2410_SDIDSTA_RXCRCFAIL\n");
++ writel(S3C2410_SDIDSTA_RXCRCFAIL, context->base + S3C2410_SDIDSTA);
++ }
++
++ if (dsta & S3C2410_SDIDSTA_DATATIMEOUT) {
++ printk("S3C2410_SDIDSTA_DATATIMEOUT\n");
++ writel(S3C2410_SDIDSTA_DATATIMEOUT, context->base + S3C2410_SDIDSTA);
++ }
++
++ if (dsta & S3C2410_SDIDSTA_BUSYFINISH) {
++ printk("S3C2410_SDIDSTA_BUSYFINISH\n");
++ writel(S3C2410_SDIDSTA_BUSYFINISH, context->base + S3C2410_SDIDSTA);
++ }
++
++ if (dsta & S3C2410_SDIDSTA_SBITERR) {
++ printk("S3C2410_SDIDSTA_SBIERR\n");
++ writel(S3C2410_SDIDSTA_SBITERR, context->base + S3C2410_SDIDSTA);
++ }
++
++ spin_unlock_irqrestore(&context->lock, flags);
++ return IRQ_HANDLED;
++}
++
++
++SDIO_STATUS s3c24xx_hcd_config(PSDHCD hcd, PSDCONFIG config)
++{
++ u32 con, imsk;
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ PSDCONFIG_SDIO_INT_CTRL_DATA int_data;
++ struct s3c24xx_hcd_context * context = (struct s3c24xx_hcd_context *)hcd->pContext;
++
++ switch (GET_SDCONFIG_CMD(config)){
++ case SDCONFIG_GET_WP:
++ DBG_PRINT(SDDBG_TRACE, ("config GET_WP\n"));
++ *((SDCONFIG_WP_VALUE *)config->pData) = 0;
++ status = SDIO_STATUS_SUCCESS;
++ break;
++ case SDCONFIG_SEND_INIT_CLOCKS:
++ DBG_PRINT(SDDBG_TRACE, ("config SEND_INIT_CLOCKS\n"));
++
++ /* We stop/start the clock */
++ con = readl(context->base + S3C2410_SDICON);
++
++ con &= ~S3C2410_SDICON_CLOCKTYPE;
++ writel(con, context->base + S3C2410_SDICON);
++
++ mdelay(100);
++
++ con |= S3C2410_SDICON_CLOCKTYPE;
++ writel(con, context->base + S3C2410_SDICON);
++
++ mdelay(100);
++
++ status = SDIO_STATUS_SUCCESS;
++ break;
++ case SDCONFIG_SDIO_INT_CTRL:
++ DBG_PRINT(SDDBG_TRACE, ("config SDIO_INT_CTRL\n"));
++ int_data = GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA, config);
++
++ if (int_data->SlotIRQEnable &
++ (IRQ_DETECT_1_BIT | IRQ_DETECT_4_BIT | IRQ_DETECT_MULTI_BLK) ) {
++ imsk = readl(context->base + S3C2440_SDIIMSK);
++
++ if (int_data->SlotIRQEnable) {
++ printk("SDIO_INT_CTRL enable IRQ\n");
++ DBG_PRINT(SDDBG_TRACE, ("SDIO_INT_CTRL enable IRQ\n"));
++ context->int_sdio = 1;
++ imsk |= S3C2410_SDIIMSK_SDIOIRQ;
++ writel(imsk, context->base + S3C2440_SDIIMSK);
++ } else {
++ printk("SDIO_INT_CTRL disable IRQ\n");
++ DBG_PRINT(SDDBG_TRACE, ("SDIO_INT_CTRL disable IRQ\n"));
++ context->int_sdio = 0;
++ imsk &= ~S3C2410_SDIIMSK_SDIOIRQ;
++ writel(imsk, context->base + S3C2440_SDIIMSK);
++ }
++ }
++ status = SDIO_STATUS_SUCCESS;
++ break;
++ case SDCONFIG_SDIO_REARM_INT:
++ DBG_PRINT(SDDBG_TRACE, ("config SDIO_REARM_INT\n"));
++
++ context->int_sdio = 1;
++ imsk = readl(context->base + S3C2440_SDIIMSK);
++ imsk |= S3C2410_SDIIMSK_SDIOIRQ;
++ writel(imsk, context->base + S3C2440_SDIIMSK);
++
++ status = SDIO_STATUS_SUCCESS;
++ break;
++ case SDCONFIG_FUNC_CHANGE_BUS_MODE:
++ case SDCONFIG_BUS_MODE_CTRL:
++ s3c24xx_hcd_set_bus_mode(context, (PSDCONFIG_BUS_MODE_DATA)(config->pData));
++ DBG_PRINT(SDDBG_TRACE, ("config BUS_MODE_CTRL\n"));
++ status = SDIO_STATUS_SUCCESS;
++ break;
++ case SDCONFIG_POWER_CTRL:
++ DBG_PRINT(SDDBG_TRACE, ("config POWER_CTRL\n"));
++ status = SDIO_STATUS_SUCCESS;
++ break;
++ case SDCONFIG_GET_HCD_DEBUG:
++ DBG_PRINT(SDDBG_TRACE, ("config GET_HCD_DEBUG\n"));
++ status = SDIO_STATUS_SUCCESS;
++ break;
++ case SDCONFIG_SET_HCD_DEBUG:
++ DBG_PRINT(SDDBG_TRACE, ("config SET_HCD_DEBUG\n"));
++ status = SDIO_STATUS_SUCCESS;
++ break;
++ default:
++ /* invalid request */
++ DBG_PRINT(SDDBG_ERROR, ("%s() - unsupported command: 0x%X\n",
++ __FUNCTION__, GET_SDCONFIG_CMD(config)));
++ status = SDIO_STATUS_INVALID_PARAMETER;
++ }
++
++ return SDIOErrorToOSError(status);
++}
++
++
++SDIO_STATUS s3c24xx_hcd_request(PSDHCD hcd)
++{
++ SDIO_STATUS status = SDIO_STATUS_PENDING;
++ PSDREQUEST req;
++ u32 cmdcon, imask;
++ unsigned long flags;
++ struct s3c24xx_hcd_context * context =
++ (struct s3c24xx_hcd_context *)hcd->pContext;
++
++ req = GET_CURRENT_REQUEST(hcd);
++ DBG_ASSERT(req != NULL);
++
++ if (req->Flags & SDREQ_FLAGS_DATA_SHORT_TRANSFER)
++ printk("### SHORT TRANSFER ###\n");
++
++ spin_lock_irqsave(&context->lock, flags);
++
++ /* Clear command, data and fifo status registers */
++ writel(0xFFFFFFFF, context->base + S3C2410_SDICMDSTAT);
++ writel(0xFFFFFFFF, context->base + S3C2410_SDIDSTA);
++ writel(0xFFFFFFFF, context->base + S3C2410_SDIFSTA);
++
++ /* Enabling irqs */
++ imask = S3C2410_SDIIMSK_READWAIT;
++
++ cmdcon = readl(context->base + S3C2410_SDICMDCON);
++
++ switch (GET_SDREQ_RESP_TYPE(req->Flags)) {
++ case SDREQ_FLAGS_NO_RESP:
++ cmdcon &= ~S3C2410_SDICMDCON_WAITRSP;
++ context->complete = S3C24XX_HCD_NO_RESPONSE;
++ imask |= S3C2410_SDIIMSK_CMDSENT;
++ break;
++ case SDREQ_FLAGS_RESP_R1:
++ case SDREQ_FLAGS_RESP_R1B:
++ case SDREQ_FLAGS_RESP_R3:
++ case SDREQ_FLAGS_RESP_SDIO_R4:
++ case SDREQ_FLAGS_RESP_SDIO_R5:
++ case SDREQ_FLAGS_RESP_R6:
++ cmdcon &= ~S3C2410_SDICMDCON_LONGRSP;
++ cmdcon |= S3C2410_SDICMDCON_WAITRSP;
++ context->complete = S3C24XX_HCD_RESPONSE_SHORT;
++ imask |= S3C2410_SDIIMSK_CRCSTATUS | S3C2410_SDIIMSK_RESPONSEND
++ | S3C2410_SDIIMSK_CMDTIMEOUT | S3C2410_SDIIMSK_RESPONSECRC;
++ break;
++ case SDREQ_FLAGS_RESP_R2:
++ cmdcon |= S3C2410_SDICMDCON_LONGRSP;
++ cmdcon |= S3C2410_SDICMDCON_WAITRSP;
++ context->complete = S3C24XX_HCD_RESPONSE_LONG;
++ imask |= S3C2410_SDIIMSK_CRCSTATUS | S3C2410_SDIIMSK_RESPONSEND
++ | S3C2410_SDIIMSK_CMDTIMEOUT | S3C2410_SDIIMSK_RESPONSECRC;
++ break;
++
++ }
++
++ /* There is a data part */
++ if (IS_SDREQ_DATA_TRANS(req->Flags)) {
++ u32 dcon = 0;
++
++ if (readl(context->base + S3C2410_SDIDSTA) &
++ (S3C2410_SDIDSTA_TXDATAON | S3C2410_SDIDSTA_RXDATAON)) {
++ printk("##### DATA ON: 0x%x ######\n", readl(context->base + S3C2410_SDIDSTA));
++ }
++
++ /* Setting timer */
++ writel(0x7fffff, context->base + S3C2410_SDITIMER);
++
++ /* Block size */
++ writel(req->BlockLen, context->base + S3C2410_SDIBSIZE);
++ /* Number of blocks */
++ dcon |= (0xfff & req->BlockCount);
++
++ if (context->bus_width == 4)
++ dcon |= S3C2410_SDIDCON_WIDEBUS;
++
++ req->DataRemaining = req->BlockCount * req->BlockLen;
++
++ /* Set data size, and start the transfer */
++ dcon |= S3C2410_SDIDCON_IRQPERIOD;
++ if (!(req->DataRemaining % 4)) {
++ context->data_size = 4;
++ dcon |= S3C2440_SDIDCON_DS_WORD;
++ } else if (!(req->DataRemaining % 2)) {
++ context->data_size = 2;
++ dcon |= S3C2440_SDIDCON_DS_HALFWORD;
++ } else {
++ context->data_size = 1;
++ dcon |= S3C2440_SDIDCON_DS_BYTE;
++ }
++
++#ifdef CONFIG_SDIO_S3C24XX_DMA
++ if (req->DataRemaining > 16) {
++ context->dma_en = 1;
++ } else
++#endif
++ {
++ context->dma_en = 0;
++ context->data_size = 1;
++ dcon |= S3C2440_SDIDCON_DS_BYTE;
++ }
++
++ if (context->dma_en) {
++ dcon |= S3C2410_SDIDCON_DMAEN;
++ s3c24xx_hcd_prepare_dma(context);
++ }
++
++ if (IS_SDREQ_WRITE_DATA(req->Flags)) {
++ /* Data write */
++ DBG_PRINT(SDDBG_TRACE, ("Start data write, block count=%d, block size=%d\n",
++ req->BlockCount, req->BlockLen));
++
++ /* Data configuration: transmit after resp, block mode*/
++ dcon |= S3C2410_SDIDCON_TXAFTERRESP | S3C2410_SDIDCON_BLOCKMODE;
++
++ /* This is a write */
++ dcon |= S3C2410_SDIDCON_XFER_TXSTART;
++
++ imask |= S3C2410_SDIIMSK_TXFIFOHALF | S3C2410_SDIIMSK_TXFIFOEMPTY |
++ S3C2410_SDIIMSK_FIFOFAIL | S3C2410_SDIIMSK_DATACRC |
++ S3C2410_SDIIMSK_DATATIMEOUT | S3C2410_SDIIMSK_DATAFINISH;
++
++ context->complete = S3C24XX_HCD_DATA_WRITE;
++ } else {
++ /* Data read */
++ DBG_PRINT(SDDBG_TRACE, ("Start data read, block count=%d, block size=%d\n",
++ req->BlockCount, req->BlockLen));
++
++ /* Data configuration: receive after cmd, block mode*/
++ dcon |= S3C2410_SDIDCON_RXAFTERCMD | S3C2410_SDIDCON_BLOCKMODE;
++
++ /* This is a read */
++ dcon |= S3C2410_SDIDCON_XFER_RXSTART;
++
++ imask |= S3C2410_SDIIMSK_RXFIFOHALF | S3C2410_SDIIMSK_RXFIFOLAST |
++ S3C2410_SDIIMSK_FIFOFAIL | S3C2410_SDIIMSK_DATACRC |
++ S3C2410_SDIIMSK_DATATIMEOUT | S3C2410_SDIIMSK_DATAFINISH;
++
++ context->complete = S3C24XX_HCD_DATA_READ;
++ }
++
++ dcon |= S3C2440_SDIDCON_DATSTART;
++
++ writel(dcon, context->base + S3C2410_SDIDCON);
++
++ cmdcon |= S3C2410_SDICMDCON_WITHDATA;
++
++ } else {
++ cmdcon &= ~S3C2410_SDICMDCON_WITHDATA;
++ }
++
++ cmdcon |= req->Command & S3C2410_SDICMDCON_INDEX;
++ cmdcon |= S3C2410_SDICMDCON_SENDERHOST | S3C2410_SDICMDCON_CMDSTART;
++
++ req->Status = SDIO_STATUS_PENDING;
++
++ if (context->int_sdio)
++ imask |= S3C2410_SDIIMSK_SDIOIRQ;
++ context->int_mask = imask;
++ writel(imask, context->base + S3C2440_SDIIMSK);
++ writel(req->Argument, context->base + S3C2410_SDICMDARG);
++ writel(cmdcon, context->base + S3C2410_SDICMDCON);
++
++ spin_unlock_irqrestore(&context->lock, flags);
++
++ return status;
++}
++
++static int s3c24xx_hcd_hw_init(struct s3c24xx_hcd_context * context)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ u32 con, datacon;
++
++ /* Clock */
++ context->device.clock = clk_get(NULL, "sdi");
++ if (IS_ERR(context->device.clock)) {
++ DBG_PRINT(SDDBG_ERROR, ("Couldn't get clock\n"));
++ status = PTR_ERR(context->device.clock);
++ context->device.clock = NULL;
++ return status;
++ }
++
++ status = clk_enable(context->device.clock);
++ if (SDIO_IS_ERROR(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("Couldn't get clock\n"));
++ return SDIOErrorToOSError(status);
++ }
++
++ context->device.max_clock_rate = clk_get_rate(context->device.clock);
++ context->device.actual_clock_rate = context->device.max_clock_rate;
++
++ /* I/O */
++ context->mem = request_mem_region(context->mem->start,
++ RESSIZE(context->mem), context->description);
++
++ if (!context->mem) {
++ DBG_PRINT(SDDBG_ERROR, ("Failed to request io memory region\n"));
++ status = -ENOENT;
++ goto out_disable_clock;
++ }
++
++ context->base = ioremap(context->mem->start, RESSIZE(context->mem));
++ if (context->base == 0) {
++ DBG_PRINT(SDDBG_ERROR, ("failed to ioremap() io memory region.\n"));
++ status = -EINVAL;
++ goto out_free_mem_region;
++ }
++
++ /* IRQ */
++#if 0
++ context->cd_irq = s3c2410_gpio_getirq(GTA02v1_GPIO_nSD_DETECT);
++ s3c2410_gpio_cfgpin(GTA02v1_GPIO_nSD_DETECT, S3C2410_GPIO_IRQ);
++
++ if (request_irq(context->cd_irq, s3c24xx_hcd_cd_irq, 0, context->description, context)) {
++ DBG_PRINT(SDDBG_ERROR, ("failed to request card detect interrupt.\n"));
++ status = -ENOENT;
++ goto out_unmap_mem_region;
++ }
++#endif
++
++ if (request_irq(context->io_irq, s3c24xx_hcd_irq, 0, context->description, context)) {
++ DBG_PRINT(SDDBG_ERROR, ("failed to request mci interrupt.\n"));
++ status = -ENOENT;
++ goto out_unmap_mem_region;
++ }
++
++
++ /* DMA */
++ context->io_buffer_size = 4 * 4096;
++ context->io_buffer = dma_alloc_writecombine(&context->pdev->dev,
++ context->io_buffer_size,
++ &context->io_buffer_dma,
++ GFP_KERNEL | GFP_DMA);
++
++ if (context->io_buffer == NULL) {
++ DBG_PRINT(SDDBG_ERROR, ("failed to allocate DMA buffer\n"));
++ status = -ENOMEM;
++ goto out_free_irq;
++
++ }
++
++ if (s3c2410_dma_request(context->dma_channel, &s3c24xx_hcd_dma_client, NULL)) {
++ DBG_PRINT(SDDBG_ERROR, ("unable to get DMA channel.\n"));
++ status = -ENOENT;
++ goto out_free_dma;
++ }
++
++
++ /* Set multiplexing */
++ s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPE5_SDCLK);
++ s3c2410_gpio_cfgpin(S3C2410_GPE6, S3C2410_GPE6_SDCMD);
++ s3c2410_gpio_cfgpin(S3C2410_GPE7, S3C2410_GPE7_SDDAT0);
++ s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_SDDAT1);
++ s3c2410_gpio_cfgpin(S3C2410_GPE9, S3C2410_GPE9_SDDAT2);
++ s3c2410_gpio_cfgpin(S3C2410_GPE10, S3C2410_GPE10_SDDAT3);
++
++ con = readl(context->base + S3C2410_SDICON);
++ con |= S3C2410_SDICON_SDIOIRQ;
++ writel(con, context->base + S3C2410_SDICON);
++
++ datacon = readl(context->base + S3C2410_SDIDCON);
++ datacon |= S3C2410_SDIDCON_WIDEBUS;
++ writel(datacon, context->base + S3C2410_SDIDCON);
++
++ printk("S3c24xx SDIO: IRQ:%d Detect IRQ:%d DMA channel:%d base@0x%p PCLK@%ld kHz\n",
++ context->io_irq, context->cd_irq, context->dma_channel, context->base,
++ context->device.max_clock_rate/1000);
++
++ return SDIOErrorToOSError(status);
++
++ out_free_dma:
++ dma_free_writecombine(&context->pdev->dev,context->io_buffer_size,
++ context->io_buffer, context->io_buffer_dma);
++
++ out_free_irq:
++ free_irq(context->io_irq, context);
++
++ out_unmap_mem_region:
++ iounmap(context->base);
++
++ out_free_mem_region:
++ release_mem_region(context->mem->start, RESSIZE(context->mem));
++
++ out_disable_clock:
++ clk_disable(context->device.clock);
++
++ return SDIOErrorToOSError(status);
++}
++
++static void s3c24xx_hcd_hw_cleanup(struct s3c24xx_hcd_context * context)
++{
++ clk_disable(context->device.clock);
++ free_irq(context->io_irq, context);
++ iounmap(context->base);
++ release_mem_region(context->mem->start, RESSIZE(context->mem));
++ dma_free_writecombine(&context->pdev->dev,context->io_buffer_size,
++ context->io_buffer, context->io_buffer_dma);
++}
++
++static int s3c24xx_hcd_pnp_probe(struct pnp_dev *pBusDevice, const struct pnp_device_id *pId)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++ status = s3c24xx_hcd_hw_init(&hcd_context);
++ if (SDIO_IS_ERROR(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("HW Init failed\n"));
++ return SDIOErrorToOSError(status);
++ }
++
++ status = SDIO_RegisterHostController(&hcd_context.hcd);
++ if (SDIO_IS_ERROR(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("Host registration failed\n"));
++ s3c24xx_hcd_hw_cleanup(&hcd_context);
++ return SDIOErrorToOSError(status);
++ }
++
++ /* Our card is built-in, we force the attachement event */
++ SDIO_HandleHcdEvent(&hcd_context.hcd, EVENT_HCD_ATTACH);
++
++ return 0;
++}
++
++static void s3c24xx_hcd_pnp_remove(struct pnp_dev *pBusDevice)
++{
++}
++
++/* the driver context data */
++struct s3c24xx_hcd_context hcd_context = {
++ .description = DESCRIPTION,
++ .hcd.pName = "sdio_s3c24xx",
++ .hcd.Version = CT_SDIO_STACK_VERSION_CODE,
++ .hcd.pModule = THIS_MODULE,
++ /* builtin card, 4 bits bus */
++ .hcd.Attributes = SDHCD_ATTRIB_BUS_4BIT | SDHCD_ATTRIB_BUS_1BIT | SDHCD_ATTRIB_MULTI_BLK_IRQ,
++ .hcd.SlotNumber = 0,
++ .hcd.MaxSlotCurrent = 500, /* 1/2 amp */
++ .hcd.SlotVoltageCaps = SLOT_POWER_3_3V, /* 3.3V */
++ .hcd.SlotVoltagePreferred = SLOT_POWER_3_3V, /* 3.3V */
++ .hcd.MaxClockRate = 25000000,
++ .hcd.MaxBytesPerBlock = 0xfff, /* 0 - 4095 */
++ .hcd.MaxBlocksPerTrans = 0xfff, /* 0 - 4095 */
++ .hcd.pContext = &hcd_context,
++ .hcd.pRequest = s3c24xx_hcd_request,
++ .hcd.pConfigure = s3c24xx_hcd_config,
++ .device.pnp_device.name = "sdio_s3c24xx_hcd",
++ .device.pnp_driver.name = "sdio_s3c24xx_hcd",
++ .device.pnp_driver.probe = s3c24xx_hcd_pnp_probe,
++ .device.pnp_driver.remove = s3c24xx_hcd_pnp_remove,
++};
++
++static int s3c24xx_hcd_probe(struct platform_device * pdev)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ struct resource *r = NULL;
++
++ printk("S3c2440 SDIO Host controller\n");
++
++ hcd_context.pdev = pdev;
++
++ hcd_context.mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ if (hcd_context.mem == NULL) {
++ DBG_PRINT(SDDBG_ERROR, ("No memory region\n"));
++ status = SDIO_STATUS_NO_RESOURCES;
++ goto out;
++ }
++
++ hcd_context.io_irq = platform_get_irq(pdev, 0);
++ if (hcd_context.io_irq == 0) {
++ DBG_PRINT(SDDBG_ERROR, ("No IRQ\n"));
++ status = SDIO_STATUS_NO_RESOURCES;
++ goto out;
++ }
++
++ r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
++ if (r == NULL) {
++ DBG_PRINT(SDDBG_ERROR, ("No DMA channel\n"));
++ status = SDIO_STATUS_NO_RESOURCES;
++ goto out;
++ }
++ hcd_context.dma_channel = r->start;
++ hcd_context.dma_en = 0;
++
++ hcd_context.int_sdio = 0;
++
++ spin_lock_init(&hcd_context.lock);
++
++ init_completion(&hcd_context.dma_complete);
++ init_completion(&hcd_context.xfer_complete);
++
++ INIT_WORK(&hcd_context.io_work, s3c24xx_hcd_io_work);
++ INIT_WORK(&hcd_context.irq_work, s3c24xx_hcd_irq_work);
++
++ mdelay(100);
++
++ status = SDIO_BusAddOSDevice(&hcd_context.device.dma,
++ &hcd_context.device.pnp_driver,
++ &hcd_context.device.pnp_device);
++
++ out:
++
++ return SDIOErrorToOSError(status);
++}
++
++/*
++ * module cleanup
++ */
++static int s3c24xx_hcd_remove(struct platform_device * pdev) {
++ printk("S3C2440 SDIO host controller unloaded\n");
++ SDIO_BusRemoveOSDevice(&hcd_context.device.pnp_driver, &hcd_context.device.pnp_device);
++
++ return 0;
++}
++
++#ifdef CONFIG_PM
++
++static int s3c24xx_hcd_suspend(struct platform_device * pdev, pm_message_t state)
++{
++ struct s3c24xx_hcd_context * context = &hcd_context;
++ unsigned long flags;
++
++ spin_lock_irqsave(&context->lock, flags);
++
++ context->suspend_regs.con = readl(context->base + S3C2410_SDICON);
++ context->suspend_regs.pre = readl(context->base + S3C2410_SDIPRE);
++ context->suspend_regs.cmdarg = readl(context->base + S3C2410_SDICMDARG);
++ context->suspend_regs.cmdcon = readl(context->base + S3C2410_SDICMDCON);
++ context->suspend_regs.cmdsta = readl(context->base + S3C2410_SDICMDSTAT);
++ context->suspend_regs.r0 = readl(context->base + S3C2410_SDIRSP0);
++ context->suspend_regs.r1 = readl(context->base + S3C2410_SDIRSP1);
++ context->suspend_regs.r2 = readl(context->base + S3C2410_SDIRSP2);
++ context->suspend_regs.r3 = readl(context->base + S3C2410_SDIRSP3);
++ context->suspend_regs.timer = readl(context->base + S3C2410_SDITIMER);
++ context->suspend_regs.bsize = readl(context->base + S3C2410_SDIBSIZE);
++ context->suspend_regs.datcon = readl(context->base + S3C2410_SDIDCON);
++ context->suspend_regs.datcnt = readl(context->base + S3C2410_SDIDCNT);
++ context->suspend_regs.datsta = readl(context->base + S3C2410_SDIDSTA);
++ context->suspend_regs.fsta = readl(context->base + S3C2410_SDIFSTA);
++ context->suspend_regs.imask = readl(context->base + S3C2440_SDIIMSK);
++
++ spin_unlock_irqrestore(&context->lock, flags);
++ return 0;
++}
++
++static int s3c24xx_hcd_resume(struct platform_device * pdev)
++{
++ struct s3c24xx_hcd_context * context = &hcd_context;
++ unsigned long flags;
++
++ spin_lock_irqsave(&context->lock, flags);
++
++ writel(context->suspend_regs.con, context->base + S3C2410_SDICON);
++ writel(context->suspend_regs.pre, context->base + S3C2410_SDIPRE);
++ writel(context->suspend_regs.cmdarg, context->base + S3C2410_SDICMDARG);
++ writel(context->suspend_regs.cmdcon, context->base + S3C2410_SDICMDCON);
++ writel(context->suspend_regs.cmdsta, context->base + S3C2410_SDICMDSTAT);
++ writel(context->suspend_regs.r0, context->base + S3C2410_SDIRSP0);
++ writel(context->suspend_regs.r1, context->base + S3C2410_SDIRSP1);
++ writel(context->suspend_regs.r2, context->base + S3C2410_SDIRSP2);
++ writel(context->suspend_regs.r3, context->base + S3C2410_SDIRSP3);
++ writel(context->suspend_regs.timer, context->base + S3C2410_SDITIMER);
++ writel(context->suspend_regs.bsize, context->base + S3C2410_SDIBSIZE);
++ writel(context->suspend_regs.datcon, context->base + S3C2410_SDIDCON);
++ writel(context->suspend_regs.datcnt, context->base + S3C2410_SDIDCNT);
++ writel(context->suspend_regs.datsta, context->base + S3C2410_SDIDSTA);
++ writel(context->suspend_regs.fsta, context->base + S3C2410_SDIFSTA);
++ writel(context->suspend_regs.imask, context->base + S3C2440_SDIIMSK);
++
++ spin_unlock_irqrestore(&context->lock, flags);
++ return 0;
++}
++
++#else
++#define s3c24xx_hcd_suspend = NULL
++#define s3c24xx_hcd_resume = NULL
++#endif
++
++static struct platform_driver s3c24xx_hcd_sdio =
++{
++ .driver.name = "s3c24xx-sdio",
++ .probe = s3c24xx_hcd_probe,
++ .remove = s3c24xx_hcd_remove,
++ .suspend = s3c24xx_hcd_suspend,
++ .resume = s3c24xx_hcd_resume,
++};
++
++#ifdef CONFIG_DEBUG_FS
++static struct dentry *debugfs_dir;
++
++static int s3c24xx_hcd_debugfs_show(struct seq_file *s, void *data)
++{
++ PSDREQUEST req;
++ u32 con, pre, cmdarg, cmdcon, cmdsta, r0, r1, r2, r3, timer, bsize;
++ u32 datcon, datcnt, datsta, fsta, imask;
++ struct s3c24xx_hcd_context * context = &hcd_context;
++
++
++ con = readl(context->base + S3C2410_SDICON);
++ pre = readl(context->base + S3C2410_SDIPRE);
++ cmdarg = readl(context->base + S3C2410_SDICMDARG);
++ cmdcon = readl(context->base + S3C2410_SDICMDCON);
++ cmdsta = readl(context->base + S3C2410_SDICMDSTAT);
++ r0 = readl(context->base + S3C2410_SDIRSP0);
++ r1 = readl(context->base + S3C2410_SDIRSP1);
++ r2 = readl(context->base + S3C2410_SDIRSP2);
++ r3 = readl(context->base + S3C2410_SDIRSP3);
++ timer = readl(context->base + S3C2410_SDITIMER);
++ bsize = readl(context->base + S3C2410_SDIBSIZE);
++ datcon = readl(context->base + S3C2410_SDIDCON);
++ datcnt = readl(context->base + S3C2410_SDIDCNT);
++ datsta = readl(context->base + S3C2410_SDIDSTA);
++ fsta = readl(context->base + S3C2410_SDIFSTA);
++ imask = readl(context->base + S3C2440_SDIIMSK);
++
++ seq_printf(s, "SDICON: 0x%08x\n", con);
++ seq_printf(s, "SDIPRE: 0x%08x\n", pre);
++ seq_printf(s, "SDICmdArg: 0x%08x\n", cmdarg);
++ seq_printf(s, "SDICmdCon: 0x%08x\n", cmdcon);
++ seq_printf(s, "SDICmdSta: 0x%08x\n", cmdsta);
++ seq_printf(s, "SDIRSP0: 0x%08x\n", r0);
++ seq_printf(s, "SDIRSP1: 0x%08x\n", r1);
++ seq_printf(s, "SDIRSP2: 0x%08x\n", r2);
++ seq_printf(s, "SDIRSP3: 0x%08x\n", r3);
++ seq_printf(s, "SDIDTimer: 0x%08x\n", timer);
++ seq_printf(s, "SDIBSize: 0x%08x\n", bsize);
++ seq_printf(s, "SDIDatCon: 0x%08x\n", datcon);
++ seq_printf(s, "SDIDatCnt: 0x%08x\n", datcnt);
++ seq_printf(s, "SDIDatSta: 0x%08x\n", datsta);
++ seq_printf(s, "SDIFSta: 0x%08x\n", fsta);
++ seq_printf(s, "SDIIntMsk: 0x%08x\n", imask);
++ seq_printf(s, "\n");
++
++ seq_printf(s, "Current REQ: \n");
++ req = GET_CURRENT_REQUEST(&context->hcd);
++ if (req == NULL) {
++ seq_printf(s, " No current request\n");
++ } else {
++ seq_printf(s, " Command: %d\n", req->Command);
++ seq_printf(s, " Args: 0x%x\n", req->Argument);
++ seq_printf(s, " Flags: 0x%x\n", req->Flags);
++ seq_printf(s, " %d blocks x %d bytes\n", req->BlockCount, req->BlockLen);
++ seq_printf(s, " %d bytes remaining\n", req->DataRemaining);
++ }
++
++ seq_printf(s, "Context: \n");
++ seq_printf(s, " INT mask: 0x%x\n", context->int_mask);
++ seq_printf(s, " sdio INT: %d\n", context->int_sdio);
++ seq_printf(s, " cmdsta: 0x%x\n", context->cmdsta);
++ seq_printf(s, " dsta: 0x%x\n", context->dsta);
++ seq_printf(s, " fsta: 0x%x\n", context->fsta);
++
++ return 0;
++}
++
++static int s3c24xx_hcd_debugfs_open(struct inode *inode,
++ struct file *file)
++{
++ return single_open(file, s3c24xx_hcd_debugfs_show, NULL);
++}
++
++static const struct file_operations s3c24xx_hcd_debugfs_fops = {
++ .open = s3c24xx_hcd_debugfs_open,
++ .read = seq_read,
++ .llseek = seq_lseek,
++ .release = single_release,
++ .owner = THIS_MODULE,
++};
++
++
++static int s3c24xx_debugfs_init(struct s3c24xx_hcd_context * context)
++{
++ debugfs_dir = debugfs_create_dir("s3c24xx_sdio", NULL);
++
++ debugfs_create_file("registers", 0444, debugfs_dir,
++ (void *)context,
++ &s3c24xx_hcd_debugfs_fops);
++
++ return 0;
++}
++
++#else
++
++static int s3c24xx_debugfs_init(struct s3c24xx_hcd_context * context)
++{
++ return 0;
++}
++
++#endif
++
++static int __init s3c24xx_hcd_init(void)
++{
++ int ret;
++
++ ret = s3c24xx_debugfs_init(&hcd_context);
++ if (ret) {
++ printk("%s(): debugfs init failed\n", __FUNCTION__);
++ }
++
++ platform_driver_register(&s3c24xx_hcd_sdio);
++
++ return 0;
++}
++
++static void __exit s3c24xx_hcd_exit(void)
++{
++ platform_driver_unregister(&s3c24xx_hcd_sdio);
++}
++
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION(DESCRIPTION);
++MODULE_AUTHOR(AUTHOR);
++
++module_init(s3c24xx_hcd_init);
++module_exit(s3c24xx_hcd_exit);
+Index: linux-2.6.24.7/drivers/sdio/hcd/s3c24xx/s3c24xx_hcd.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/hcd/s3c24xx/s3c24xx_hcd.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,81 @@
++#ifndef __SDIO_S3C24XX_HCD_H___
++#define __SDIO_S3C24XX_HCD_H___
++
++#define S3C24XX_HCD_NO_RESPONSE 1
++#define S3C24XX_HCD_RESPONSE_SHORT 2
++#define S3C24XX_HCD_RESPONSE_LONG 3
++#define S3C24XX_HCD_DATA_READ 4
++#define S3C24XX_HCD_DATA_WRITE 5
++
++struct s3c24xx_hcd_device {
++ OS_PNPDEVICE pnp_device; /* the OS device for this HCD */
++ OS_PNPDRIVER pnp_driver; /* the OS driver for this HCD */
++ SDDMA_DESCRIPTION dma;
++ struct clk * clock;
++ unsigned long max_clock_rate;
++ unsigned long actual_clock_rate;
++};
++
++
++/* driver wide data, this driver only supports one device,
++ * so we include the per device data here also */
++struct s3c24xx_hcd_context {
++ PTEXT description; /* human readable device decsription */
++ SDHCD hcd; /* HCD description for bus driver */
++ struct s3c24xx_hcd_device device; /* the single device's info */
++ struct platform_device *pdev;
++ struct resource *mem;
++ void __iomem *base;
++ UINT32 io_irq;
++ UINT32 cd_irq;
++ BOOL card_inserted; /* card inserted flag */
++ BOOL cmd_processed; /* command phase was processed */
++ UINT32 fifo_depth; /* FIFO depth for the bus mode */
++ BOOL irq_masked;
++ UINT32 bus_width;
++ UINT32 data_size; /* Word, half word, or byte */
++ UINT32 latest_xfer_size;
++
++ void *io_buffer; /* Kernel address */
++ dma_addr_t io_buffer_dma; /* Bus address */
++ UINT32 io_buffer_size;
++ UINT32 dma_channel;
++ UINT32 dma_en;
++ struct completion dma_complete;
++ struct completion xfer_complete;
++
++ UINT32 int_mask;
++ UINT32 int_sdio; /* Do we have SDIO interrupt on ? */
++
++ UINT32 complete;
++
++ UINT32 cmdsta;
++ UINT32 dsta;
++ UINT32 fsta;
++
++ spinlock_t lock;
++
++ struct work_struct io_work;
++ struct work_struct irq_work;
++
++#ifdef CONFIG_PM
++ struct {
++ UINT32 con;
++ UINT32 pre;
++ UINT32 cmdarg, cmdcon, cmdsta;
++ UINT32 r0, r1, r2, r3;
++ UINT32 timer;
++ UINT32 bsize;
++ UINT32 datcon, datcnt, datsta;
++ UINT32 fsta;
++ UINT32 imask;
++ } suspend_regs;
++#endif
++};
++
++SDIO_STATUS s3c24xx_hcd_config(PSDHCD hcd, PSDCONFIG config);
++SDIO_STATUS s3c24xx_hcd_request(PSDHCD hcd);
++
++struct s3c24xx_hcd_context hcd_context;
++
++#endif
+Index: linux-2.6.24.7/drivers/sdio/Kconfig
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,17 @@
++#
++# SDIO driver and host controller support
++#
++
++menu "SDIO support"
++
++config SDIO
++ tristate "SDIO support"
++ default m
++ ---help---
++ good luck.
++
++source "drivers/sdio/hcd/Kconfig"
++
++source "drivers/sdio/function/Kconfig"
++
++endmenu
+Index: linux-2.6.24.7/drivers/sdio/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,4 @@
++#Makefile for SDIO stack
++obj-$(CONFIG_SDIO) += stack/
++obj-$(CONFIG_SDIO) += hcd/
++obj-$(CONFIG_SDIO) += function/
+Index: linux-2.6.24.7/drivers/sdio/stack/busdriver/_busdriver.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/stack/busdriver/_busdriver.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,466 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: _busdriver.h
++
++@abstract: internal include file for busdriver
++
++@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef ___BUSDRIVER_H___
++#define ___BUSDRIVER_H___
++#include <linux/sdio/sdio_lib.h>
++
++#define SDIODBG_FUNC_IRQ (SDDBG_TRACE + 1)
++#define SDIODBG_REQUESTS (SDDBG_TRACE + 2)
++#define SDIODBG_CD_TIMER (SDDBG_TRACE + 3)
++#define SDIODBG_HCD_EVENTS (SDDBG_TRACE + 4)
++
++#define SDIOBUS_CD_TIMER_ID 0
++
++#define SDBUS_MAX_RETRY 3
++
++/* Notes on list linkages:
++ * list heads are held in BDCONTEXT
++ * HcdList - SDHCD
++ * one per registered host controller
++ * Next - links of all HCDs
++ * DeviceList SDDEVICE
++ * one per inserted device
++ * Next - links of all devices
++ * DeviceListNext - links of all devices on a function
++ * pFunction - ptr to Function supportting this device
++ * pHcd - ptr to HCD with supporting this device
++ * FunctionList SDFUNCTION
++ * one per register function driver
++ * Next - links of all functions
++ * DeviceList - list of devices being support by this function
++ * uses DeviceListNext in SDDEVICE to link
++ *
++ *
++*/
++
++#define SDMMC_DEFAULT_CMD_RETRIES 1
++#define SDMMC_DEFAULT_CARD_READY_RETRIES 200
++#define OCR_READY_CHECK_DELAY_MS 10
++#define SDMMC_POWER_SETTLE_DELAY 400 /* in milliseconds */
++#define SDBUS_DEFAULT_REQ_LIST_SIZE 16
++#define SDBUS_DEFAULT_REQ_SIG_SIZE 8
++#define CARD_DETECT_PAUSE 100
++#define SDBUS_DEFAULT_CD_POLLING_INTERVAL 1000 /* in milliseconds */
++#define MAX_CARD_DETECT_MSGS 16
++#define SDMMC_DEFAULT_BYTES_PER_BLOCK 2048
++#define SDMMC_DEFAULT_BLOCKS_PER_TRANS 512
++#define SDMMC_CMD13_POLLING_MULTIPLIER 1000 /* per block multiplier */
++#define MAX_HCD_REQ_RECURSION 5
++#define MAX_HCD_RECURSION_RUNAWAY 100
++
++ /* internal signalling item */
++typedef struct _SIGNAL_ITEM{
++ SDLIST SDList; /* list link*/
++ OS_SIGNAL Signal; /* signal */
++}SIGNAL_ITEM, *PSIGNAL_ITEM;
++
++typedef struct _HCD_EVENT_MESSAGE {
++ HCD_EVENT Event; /* the event */
++ PSDHCD pHcd; /* hcd that generated the event */
++}HCD_EVENT_MESSAGE, *PHCD_EVENT_MESSAGE;
++
++/* internal data for bus driver */
++typedef struct _BDCONTEXT {
++
++ /* list of SD requests and signalling semaphores and a semaphore to protect it */
++ SDLIST RequestList;
++ SDLIST SignalList;
++ OS_CRITICALSECTION RequestListCritSection;
++ /* list of host controller bus drivers, sempahore to protect it */
++ SDLIST HcdList;
++ OS_SEMAPHORE HcdListSem;
++ /* list of inserted devices, semaphore to protect it */
++ SDLIST DeviceList;
++ OS_SEMAPHORE DeviceListSem;
++ /* list of function drivers, semaphore to protect it */
++ SDLIST FunctionList;
++ OS_SEMAPHORE FunctionListSem;
++ INT RequestListSize; /* default request list */
++ INT SignalSemListSize; /* default signalling semaphore size */
++ INT CurrentRequestAllocations; /*current count of allocated requests */
++ INT CurrentSignalAllocations; /* current count of signal allocations */
++ INT MaxRequestAllocations; /* max number of allocated requests to keep around*/
++ INT MaxSignalAllocations; /* max number of signal allocations to keep around*/
++ INT RequestRetries; /* cmd retries */
++ INT CardReadyPollingRetry; /* card ready polling retry count */
++ INT PowerSettleDelay; /* power settle delay */
++ INT CMD13PollingMultiplier; /* CMD13 (GET STATUS) multiplier */
++ SD_BUSCLOCK_RATE DefaultOperClock; /* default operation clock */
++ SD_BUSMODE_FLAGS DefaultBusMode; /* default bus mode */
++ UINT16 DefaultOperBlockLen; /* default operational block length per block */
++ UINT16 DefaultOperBlockCount; /* default operational block count per transaction */
++ UINT32 CDPollingInterval; /* card insert/removal polling interval */
++ UINT8 InitMask; /* bus driver init mask */
++#define BD_TIMER_INIT 0x01
++#define HELPER_INIT 0x02
++#define RESOURCE_INIT 0x04
++ BOOL CDTimerQueued; /* card detect timer queued */
++ OSKERNEL_HELPER CardDetectHelper; /* card detect helper */
++ PSDMESSAGE_QUEUE pCardDetectMsgQueue; /* card detect message queue */
++ ULONG HcdInUseField; /* bit field of in use HCD numbers*/
++ UINT32 ConfigFlags; /* bus driver configuration flags */
++#define BD_CONFIG_SDREQ_FORCE_ALL_ASYNC 0x00000001
++ INT MaxHcdRecursion; /* max HCD recurion level */
++}BDCONTEXT, *PBDCONTEXT;
++
++#define BD_DEFAULT_CONFIG_FLAGS 0x00000000
++#define IsQueueBusy(pRequestQueue) (pRequestQueue)->Busy
++#define MarkQueueBusy(pRequestQueue) (pRequestQueue)->Busy = TRUE
++#define MarkQueueNotBusy(pRequestQueue) (pRequestQueue)->Busy = FALSE
++
++#define CLEAR_INTERNAL_REQ_FLAGS(pReq) (pReq)->Flags &= ~(UINT)((SDREQ_FLAGS_RESP_SPI_CONVERTED | \
++ SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE))
++
++/* macros to insert request into the queue */
++#define QueueRequest(pReqQ,pReq) SDListInsertTail(&(pReqQ)->Queue,&(pReq)->SDList)
++#define QueueRequestToFront(pReqQ,pReq) SDListInsertHead(&(pReqQ)->Queue,&(pReq)->SDList)
++
++/* macros to remove an item from the head of the queue */
++static INLINE PSDREQUEST DequeueRequest(PSDREQUESTQUEUE pRequestQueue) {
++ PSDLIST pItem;
++ pItem = SDListRemoveItemFromHead(&pRequestQueue->Queue);
++ if (pItem != NULL) {
++ return CONTAINING_STRUCT(pItem, SDREQUEST, SDList);
++ }
++ return NULL;
++};
++
++static INLINE SDIO_STATUS InitializeRequestQueue(PSDREQUESTQUEUE pRequestQueue) {
++ SDLIST_INIT(&pRequestQueue->Queue);
++ MarkQueueNotBusy(pRequestQueue);
++ return SDIO_STATUS_SUCCESS;
++}
++
++static INLINE void CleanupRequestQueue(PSDREQUESTQUEUE pRequestQueue) {
++
++}
++
++/* for bus driver internal use only */
++SDIO_STATUS _SDIO_BusDriverInitialize(void);
++SDIO_STATUS _SDIO_BusGetDefaultSettings(PBDCONTEXT pBdc);
++void _SDIO_BusDriverCleanup(void);
++SDIO_STATUS RemoveAllFunctions(void);
++SDIO_STATUS RemoveHcdFunctions(PSDHCD pHcd);
++PSDDEVICE AllocateDevice(PSDHCD pHcd);
++BOOL AddDeviceToList(PSDDEVICE pDevice);
++SDIO_STATUS DeleteDevices(PSDHCD pHcd);
++SDIO_STATUS NotifyDeviceRemove(PSDDEVICE pDevice);
++extern PBDCONTEXT pBusContext;
++extern const CT_VERSION_CODE g_Version;
++SDIO_STATUS _SDIO_RegisterHostController(PSDHCD pHcd);
++SDIO_STATUS _SDIO_UnregisterHostController(PSDHCD pHcd);
++SDIO_STATUS _SDIO_HandleHcdEvent(PSDHCD pHcd, HCD_EVENT Event);
++SDIO_STATUS _SDIO_RegisterFunction(PSDFUNCTION pFunction);
++SDIO_STATUS _SDIO_UnregisterFunction(PSDFUNCTION pFunction);
++SDIO_STATUS _SDIO_CheckResponse(PSDHCD pHcd, PSDREQUEST pReq, SDHCD_RESPONSE_CHECK_MODE CheckMode);
++SDIO_STATUS ProbeForFunction(PSDDEVICE pDevice, PSDHCD pHcd);
++SDIO_STATUS SDInitializeCard(PSDHCD pHcd);
++SDIO_STATUS SDQuerySDMMCInfo(PSDDEVICE pDevice);
++SDIO_STATUS SDQuerySDIOInfo(PSDDEVICE pDevice);
++SDIO_STATUS SDEnableFunction(PSDDEVICE pDevice, PSDCONFIG_FUNC_ENABLE_DISABLE_DATA pEnData);
++SDIO_STATUS SDAllocFreeSlotCurrent(PSDDEVICE pDevice, BOOL Allocate, PSDCONFIG_FUNC_SLOT_CURRENT_DATA pData);
++SDIO_STATUS SDMaskUnmaskFunctionIRQ(PSDDEVICE pDevice, BOOL Mask);
++SDIO_STATUS SDFunctionAckInterrupt(PSDDEVICE pDevice);
++SDIO_STATUS SDSPIModeEnableDisableCRC(PSDDEVICE pDevice,BOOL Enable);
++SDIO_STATUS IssueBusConfig(PSDDEVICE pDev, PSDCONFIG pConfig);
++SDIO_STATUS IssueBusRequest(PSDDEVICE pDev, PSDREQUEST pReq);
++PSDREQUEST IssueAllocRequest(PSDDEVICE pDev);
++void IssueFreeRequest(PSDDEVICE pDev, PSDREQUEST pReq);
++PSDREQUEST AllocateRequest(void);
++void FreeRequest(PSDREQUEST pReq);
++PSIGNAL_ITEM AllocateSignal(void);
++void FreeSignal(PSIGNAL_ITEM pSignal);
++SDIO_STATUS InitializeTimers(void);
++SDIO_STATUS CleanupTimers(void);
++SDIO_STATUS QueueTimer(INT TimerID, UINT32 TimeOut);
++SDIO_STATUS DeviceAttach(PSDHCD pHcd);
++SDIO_STATUS DeviceDetach(PSDHCD pHcd);
++SDIO_STATUS DeviceInterrupt(PSDHCD pHcd);
++SDIO_STATUS CardInitSetup(PSDHCD pHcd);
++void RunCardDetect(void);
++void SDIO_NotifyTimerTriggered(INT TimerID);
++SDIO_STATUS TestPresence(PSDHCD pHcd,
++ CARD_INFO_FLAGS TestType,
++ PSDREQUEST pReq);
++#define _IssueSimpleBusRequest(pHcd,Cmd,Arg,Flags,pReqToUse) \
++ _IssueBusRequestBd((pHcd),(Cmd),(Arg),(Flags),(pReqToUse),NULL,0)
++
++SDIO_STATUS Do_OS_IncHcdReference(PSDHCD pHcd);
++SDIO_STATUS Do_OS_DecHcdReference(PSDHCD pHcd);
++SDIO_STATUS TryNoIrqPendingCheck(PSDDEVICE pDev);
++
++ /* check API version compatibility of an HCD or function driver to a stack major/minor version
++ if the driver version is greater than the major number, we are compatible
++ if the driver version is equal, then we check if the minor is greater than or equal
++ we don't have to check for the less than major, because the bus driver never loads
++ drivers with different major numbers ...
++ if the busdriver compiled version major is greater than the major version being checked this
++ macro will resolved to ALWAYS true thus optimizing the code to not check the HCD since
++ as a rule we never load an HCD with a lower major number */
++#define CHECK_API_VERSION_COMPAT(p,major,minor) \
++ ((CT_SDIO_STACK_VERSION_MAJOR(CT_SDIO_STACK_VERSION_CODE) > (major)) || \
++ (GET_SDIO_STACK_VERSION_MINOR((p)) >= (minor)))
++
++static INLINE SDIO_STATUS OS_IncHcdReference(PSDHCD pHcd) {
++ /* this API was added in version 2.3 which requires access to a field in the HCD structure */
++ if (CHECK_API_VERSION_COMPAT(pHcd,2,3)) {
++ /* we can safely call the OS-dependent function */
++ return Do_OS_IncHcdReference(pHcd);
++ }
++ return SDIO_STATUS_SUCCESS;
++}
++
++static INLINE SDIO_STATUS OS_DecHcdReference(PSDHCD pHcd) {
++ /* this API was added in version 2.3 which requires access to a field in the HCD structure */
++ if (CHECK_API_VERSION_COMPAT(pHcd,2,3)) {
++ /* we can safely call the OS-dependent function */
++ return Do_OS_DecHcdReference(pHcd);
++ }
++ return SDIO_STATUS_SUCCESS;
++}
++
++SDIO_STATUS _IssueBusRequestBd(PSDHCD pHcd,
++ UINT8 Cmd,
++ UINT32 Argument,
++ SDREQUEST_FLAGS Flags,
++ PSDREQUEST pReqToUse,
++ PVOID pData,
++ INT Length);
++
++SDIO_STATUS IssueRequestToHCD(PSDHCD pHcd,PSDREQUEST pReq);
++
++#define CALL_HCD_CONFIG(pHcd,pCfg) (pHcd)->pConfigure((pHcd),(pCfg))
++ /* macro to force all requests to be asynchronous in the HCD */
++static INLINE BOOL ForceAllRequestsAsync(void) {
++ return (pBusContext->ConfigFlags & BD_CONFIG_SDREQ_FORCE_ALL_ASYNC);
++}
++
++static INLINE SDIO_STATUS CallHcdRequest(PSDHCD pHcd) {
++
++ if (pHcd->pCurrentRequest->Flags & SDREQ_FLAGS_PSEUDO) {
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: PSEUDO Request 0x%X \n",
++ (INT)pHcd->pCurrentRequest));
++ /* return successful completion so that processing can finish */
++ return SDIO_STATUS_SUCCESS;
++ }
++
++ if (ForceAllRequestsAsync()) {
++ /* all requests must be completed(indicated) in a separate context */
++ pHcd->pCurrentRequest->Flags |= SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE;
++ } else {
++ /* otherwise perform a test on flags in the HCD */
++ if (!CHECK_API_VERSION_COMPAT(pHcd,2,6) &&
++ AtomicTest_Set(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT)) {
++
++ /* bit was already set, this is a recursive call,
++ * we need to tell the HCD to complete the
++ * request in a separate context */
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Recursive CallHcdRequest \n"));
++ pHcd->pCurrentRequest->Flags |= SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE;
++ }
++ }
++ #ifdef DEBUG
++ {
++ SDIO_STATUS status;
++ BOOL forceDeferred;
++ forceDeferred = pHcd->pCurrentRequest->Flags & SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE;
++ status = pHcd->pRequest(pHcd);
++ if (forceDeferred) {
++ /* status better be pending... */
++ DBG_ASSERT(status == SDIO_STATUS_PENDING);
++ }
++ return status;
++ }
++ #else
++ return pHcd->pRequest(pHcd);
++ #endif
++
++}
++
++/* note the caller of this macro must take the HCD lock to protect the count */
++#define CHECK_HCD_RECURSE(pHcd,pReq) \
++{ \
++ (pHcd)->Recursion++; \
++ DBG_ASSERT((pHcd)->Recursion < MAX_HCD_RECURSION_RUNAWAY); \
++ if ((pHcd)->Recursion > pBusContext->MaxHcdRecursion) { \
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Recursive Request Count Exceeded (%d) \n",(pHcd)->Recursion)); \
++ (pReq)->Flags |= SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE; \
++ } \
++}
++
++/* InternalFlags bit number settings */
++#define SDBD_INIT 1
++#define SDBD_PENDING 15
++#define SDBD_ALLOC_IRQ_SAFE 2
++
++#define SDBD_ALLOC_IRQ_SAFE_MASK (1 << SDBD_ALLOC_IRQ_SAFE)
++
++static void INLINE DoRequestCompletion(PSDREQUEST pReq, PSDHCD pHcd) {
++ CLEAR_INTERNAL_REQ_FLAGS(pReq);
++ if (pReq->pCompletion != NULL) {
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Calling completion on request:0x%X, CMD:%d \n",
++ (INT)pReq, pReq->Command));
++ /* call completion routine, mark request reusable */
++ AtomicTest_Clear(&pReq->InternalFlags, SDBD_PENDING);
++ pReq->pCompletion(pReq);
++ } else {
++ /* mark request reusable */
++ AtomicTest_Clear(&pReq->InternalFlags, SDBD_PENDING);
++ }
++}
++
++THREAD_RETURN CardDetectHelperFunction(POSKERNEL_HELPER pHelper);
++THREAD_RETURN SDIOIrqHelperFunction(POSKERNEL_HELPER pHelper);
++
++void ConvertSPI_Response(PSDREQUEST pReq, UINT8 *pRespBuffer);
++
++static INLINE SDIO_STATUS PostCardDetectEvent(PBDCONTEXT pSDB, HCD_EVENT Event, PSDHCD pHcd) {
++ HCD_EVENT_MESSAGE message;
++ SDIO_STATUS status;
++ message.Event = Event;
++ message.pHcd = pHcd;
++
++ if (pHcd != NULL) {
++ /* increment HCD reference count to process this HCD message */
++ status = OS_IncHcdReference(pHcd);
++ if (!SDIO_SUCCESS(status)) {
++ return status;
++ }
++ }
++ /* post card detect message */
++ status = SDLIB_PostMessage(pSDB->pCardDetectMsgQueue, &message, sizeof(message));
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: PostCardDetectEvent error status %d\n",status));
++ if (pHcd != NULL) {
++ /* decrement count */
++ OS_DecHcdReference(pHcd);
++ }
++ return status;
++ }
++ /* wake card detect helper */
++ DBG_PRINT(SDIODBG_HCD_EVENTS, ("SDIO Bus Driver: PostCardDetectEvent waking\n"));
++ return SD_WAKE_OS_HELPER(&pSDB->CardDetectHelper);
++};
++
++/* initialize device fields */
++static INLINE void InitDeviceData(PSDHCD pHcd, PSDDEVICE pDevice) {
++ ZERO_POBJECT(pDevice);
++ SDLIST_INIT(&pDevice->SDList);
++ SDLIST_INIT(&pDevice->FuncListLink);
++ pDevice->pRequest = IssueBusRequest;
++ pDevice->pConfigure = IssueBusConfig;
++ pDevice->AllocRequest = IssueAllocRequest;
++ pDevice->FreeRequest = IssueFreeRequest;
++ /* set card flags in the ID */
++ pDevice->pId[0].CardFlags = pHcd->CardProperties.Flags;
++ pDevice->pFunction = NULL;
++ pDevice->pHcd = pHcd;
++ SET_SDIO_STACK_VERSION(pDevice);
++}
++
++/* de-initialize device fields */
++static INLINE void DeinitDeviceData(PSDDEVICE pDevice) {
++}
++
++/* reset hcd state */
++static INLINE void ResetHcdState(PSDHCD pHcd) {
++ ZERO_POBJECT(&pHcd->CardProperties);
++ pHcd->PendingHelperIrqs = 0;
++ pHcd->PendingIrqAcks = 0;
++ pHcd->IrqsEnabled = 0;
++ pHcd->pCurrentRequest = NULL;
++ pHcd->IrqProcState = SDHCD_IDLE;
++ /* mark this device as special */
++ pHcd->pPseudoDev->pId[0].CardFlags = CARD_PSEUDO;
++ pHcd->SlotCurrentAllocated = 0;
++}
++
++static INLINE SDIO_STATUS _IssueConfig(PSDHCD pHcd,
++ SDCONFIG_COMMAND Command,
++ PVOID pData,
++ INT Length){
++ SDCONFIG configHdr;
++ SET_SDCONFIG_CMD_INFO(&configHdr,Command,pData,Length);
++ return CALL_HCD_CONFIG(pHcd,&configHdr);
++}
++
++/* prototypes */
++#define _AcquireHcdLock(pHcd)CriticalSectionAcquireSyncIrq(&(pHcd)->HcdCritSection)
++#define _ReleaseHcdLock(pHcd)CriticalSectionReleaseSyncIrq(&(pHcd)->HcdCritSection)
++
++#define AcquireHcdLock(pDev) CriticalSectionAcquireSyncIrq(&(pDev)->pHcd->HcdCritSection)
++#define ReleaseHcdLock(pDev) CriticalSectionReleaseSyncIrq(&(pDev)->pHcd->HcdCritSection)
++
++SDIO_STATUS OS_AddDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction);
++void OS_RemoveDevice(PSDDEVICE pDevice);
++SDIO_STATUS OS_InitializeDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction);
++SDIO_STATUS SetOperationalBusMode(PSDDEVICE pDevice,
++ PSDCONFIG_BUS_MODE_DATA pBusMode);
++void FreeDevice(PSDDEVICE pDevice);
++BOOL IsPotentialIdMatch(PSD_PNP_INFO pIdsDev, PSD_PNP_INFO pIdsFuncList);
++
++
++#define CHECK_FUNCTION_DRIVER_VERSION(pF) \
++ (GET_SDIO_STACK_VERSION_MAJOR((pF)) == CT_SDIO_STACK_VERSION_MAJOR(g_Version))
++#define CHECK_HCD_DRIVER_VERSION(pH) \
++ (GET_SDIO_STACK_VERSION_MAJOR((pH)) == CT_SDIO_STACK_VERSION_MAJOR(g_Version))
++
++/* CLARIFICATION on SDREQ_FLAGS_PSEUDO and SDREQ_FLAGS_BARRIER flags :
++ *
++ * A request marked as PSEUDO is synchronized with bus requests and is not a true request
++ * that is issued to an HCD.
++ *
++ * A request marked with a BARRIER flag requires that the completion routine be called
++ * before the next bus request starts. This is required for HCD requests that can change
++ * bus or clock modes. Changing the clock or bus mode while a bus request is pending
++ * can cause problems.
++ *
++ *
++ *
++ * */
++#define SD_PSEUDO_REQ_FLAGS \
++ (SDREQ_FLAGS_PSEUDO | SDREQ_FLAGS_BARRIER | SDREQ_FLAGS_TRANS_ASYNC)
++
++#endif /*___BUSDRIVER_H___*/
+Index: linux-2.6.24.7/drivers/sdio/stack/busdriver/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/stack/busdriver/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,2 @@
++obj-$(CONFIG_SDIO) += sdio_busdriver.o
++sdio_busdriver-objs := sdio_bus.o sdio_function.o sdio_bus_misc.o sdio_bus_events.o sdio_bus_os.o
+Index: linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,2120 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: sdio_bus.c
++
++@abstract: OS independent bus driver support
++@category abstract: HD_Reference Host Controller Driver Interfaces.
++@category abstract: PD_Reference
++ Peripheral Driver Interfaces.
++
++#notes: this file supports the HCD's and generic functions
++
++@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define MODULE_NAME SDBUSDRIVER
++#include <linux/sdio/ctsystem.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/_sdio_defs.h>
++#include <linux/sdio/sdio_lib.h>
++#include <linux/sdio/mmc_defs.h>
++#include "_busdriver.h"
++
++/* list of host controller bus drivers */
++PBDCONTEXT pBusContext = NULL;
++static void CleanUpBusResources(void);
++static SDIO_STATUS AllocateBusResources(void);
++static PSIGNAL_ITEM BuildSignal(void);
++static void DestroySignal(PSIGNAL_ITEM pSignal);
++
++const CT_VERSION_CODE g_Version = CT_SDIO_STACK_VERSION_CODE;
++/*
++ * _SDIO_BusDriverInitialize - call once on driver loading
++ *
++*/
++SDIO_STATUS _SDIO_BusDriverInitialize(void)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Version: %d.%d\n",
++ CT_SDIO_STACK_VERSION_MAJOR(g_Version),CT_SDIO_STACK_VERSION_MINOR(g_Version)));
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: enter _SDIO_BusDriverInitialize\n"));
++
++ do {
++ /* allocate our internal data initialize it */
++ pBusContext = KernelAlloc(sizeof(BDCONTEXT));
++ if (pBusContext == NULL) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't allocate memory.\n"));
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++ memset(pBusContext,0,sizeof(BDCONTEXT));
++ SDLIST_INIT(&pBusContext->RequestList);
++ SDLIST_INIT(&pBusContext->HcdList);
++ SDLIST_INIT(&pBusContext->DeviceList);
++ SDLIST_INIT(&pBusContext->FunctionList);
++ SDLIST_INIT(&pBusContext->SignalList);
++
++ /* setup defaults */
++ pBusContext->RequestRetries = SDMMC_DEFAULT_CMD_RETRIES;
++ pBusContext->CardReadyPollingRetry = SDMMC_DEFAULT_CARD_READY_RETRIES;
++ pBusContext->PowerSettleDelay = SDMMC_POWER_SETTLE_DELAY;
++ pBusContext->DefaultOperClock = MMC_HS_MAX_BUS_CLOCK;
++ pBusContext->DefaultBusMode = SDCONFIG_BUS_WIDTH_4_BIT;
++ pBusContext->RequestListSize = SDBUS_DEFAULT_REQ_LIST_SIZE;
++ pBusContext->SignalSemListSize = SDBUS_DEFAULT_REQ_SIG_SIZE;
++ pBusContext->CDPollingInterval = SDBUS_DEFAULT_CD_POLLING_INTERVAL;
++ pBusContext->DefaultOperBlockLen = SDMMC_DEFAULT_BYTES_PER_BLOCK;
++ pBusContext->DefaultOperBlockCount = SDMMC_DEFAULT_BLOCKS_PER_TRANS;
++ pBusContext->ConfigFlags = BD_DEFAULT_CONFIG_FLAGS;
++ pBusContext->CMD13PollingMultiplier = SDMMC_CMD13_POLLING_MULTIPLIER;
++ pBusContext->MaxHcdRecursion = MAX_HCD_REQ_RECURSION;
++
++ /* get overrides for the defaults */
++ status = _SDIO_BusGetDefaultSettings(pBusContext);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++
++ pBusContext->MaxRequestAllocations = pBusContext->RequestListSize << 1;
++ pBusContext->MaxSignalAllocations = pBusContext->SignalSemListSize << 1;
++
++ status = CriticalSectionInit(&pBusContext->RequestListCritSection);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't CriticalSectionInit.\n"));
++ break;
++ }
++ status = SemaphoreInitialize(&pBusContext->HcdListSem, 1);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't SemaphoreInitialize HcdListSem.\n"));
++ break;
++ }
++ status = SemaphoreInitialize(&pBusContext->DeviceListSem, 1);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't SemaphoreInitialize DeviceListSem.\n"));
++ break;
++ }
++ status = SemaphoreInitialize(&pBusContext->FunctionListSem, 1);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't SemaphoreInitialize FunctionListSem.\n"));
++ break;
++ }
++ status = AllocateBusResources();
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't AllocateBusResources.\n"));
++ break;
++ }
++
++ pBusContext->InitMask |= RESOURCE_INIT;
++
++ pBusContext->pCardDetectMsgQueue = SDLIB_CreateMessageQueue(MAX_CARD_DETECT_MSGS,
++ sizeof(HCD_EVENT_MESSAGE));
++
++ if (NULL == pBusContext->pCardDetectMsgQueue) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't CreateMessageQueue.\n"));
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++
++ status = SDLIB_OSCreateHelper(&pBusContext->CardDetectHelper,
++ CardDetectHelperFunction,
++ NULL);
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't OSCreateHelper.\n"));
++ break;
++ }
++
++ pBusContext->InitMask |= HELPER_INIT;
++
++ status = InitializeTimers();
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't InitializeTimers.\n"));
++ break;
++ }
++ pBusContext->InitMask |= BD_TIMER_INIT;
++ } while(FALSE);
++
++ if (!SDIO_SUCCESS(status)) {
++ _SDIO_BusDriverCleanup();
++ }
++
++ return status;
++}
++
++
++/*
++ * _SDIO_BusDriverBusDriverCleanup - call once on driver unloading
++ *
++*/
++void _SDIO_BusDriverCleanup(void) {
++ DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: _SDIO_BusDriverCleanup\n"));
++
++ if (pBusContext->InitMask & BD_TIMER_INIT) {
++ CleanupTimers();
++ }
++
++ if (pBusContext->InitMask & HELPER_INIT) {
++ SDLIB_OSDeleteHelper(&pBusContext->CardDetectHelper);
++ }
++
++ if (pBusContext->pCardDetectMsgQueue != NULL) {
++ SDLIB_DeleteMessageQueue(pBusContext->pCardDetectMsgQueue);
++ pBusContext->pCardDetectMsgQueue = NULL;
++ }
++ /* remove functions */
++ RemoveAllFunctions();
++ /* cleanup all devices */
++ DeleteDevices(NULL);
++ CleanUpBusResources();
++ CriticalSectionDelete(&pBusContext->RequestListCritSection);
++ SemaphoreDelete(&pBusContext->HcdListSem);
++ SemaphoreDelete(&pBusContext->DeviceListSem);
++ SemaphoreDelete(&pBusContext->FunctionListSem);
++ KernelFree(pBusContext);
++ pBusContext = NULL;
++ DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: _SDIO_BusDriverCleanup\n"));
++}
++
++
++/* cleanup hcd */
++static void CleanupHcd(PSDHCD pHcd)
++{
++ SDLIB_OSDeleteHelper(&pHcd->SDIOIrqHelper);
++ CleanupRequestQueue(&pHcd->CompletedRequestQueue);
++ CleanupRequestQueue(&pHcd->RequestQueue);
++ CriticalSectionDelete(&pHcd->HcdCritSection);
++ SemaphoreDelete(&pHcd->ConfigureOpsSem);
++ pHcd->pCurrentRequest = NULL;
++ if (pHcd->pPseudoDev != NULL) {
++ FreeDevice(pHcd->pPseudoDev);
++ pHcd->pPseudoDev = NULL;
++ }
++}
++
++/* set up the hcd */
++static SDIO_STATUS SetupHcd(PSDHCD pHcd)
++{
++ SDIO_STATUS status;
++
++ ZERO_POBJECT(&pHcd->SDIOIrqHelper);
++ ZERO_POBJECT(&pHcd->ConfigureOpsSem);
++ ZERO_POBJECT(&pHcd->HcdCritSection);
++ ZERO_POBJECT(&pHcd->RequestQueue);
++ ZERO_POBJECT(&pHcd->CompletedRequestQueue);
++ pHcd->pPseudoDev = NULL;
++ pHcd->Recursion = 0;
++
++ do {
++
++ pHcd->pPseudoDev = AllocateDevice(pHcd);
++
++ if (NULL == pHcd->pPseudoDev) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++
++ ResetHcdState(pHcd);
++
++ status = SemaphoreInitialize(&pHcd->ConfigureOpsSem,1);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ status = CriticalSectionInit(&pHcd->HcdCritSection);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ status = InitializeRequestQueue(&pHcd->RequestQueue);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ status = InitializeRequestQueue(&pHcd->CompletedRequestQueue);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ /* create SDIO Irq helper */
++ status = SDLIB_OSCreateHelper(&pHcd->SDIOIrqHelper,
++ SDIOIrqHelperFunction,
++ (PVOID)pHcd);
++ } while(FALSE);
++
++ if (!SDIO_SUCCESS(status)) {
++ /* undo what we did */
++ CleanupHcd(pHcd);
++ }
++ return status;
++}
++
++
++/*
++ * _SDIO_RegisterHostController - register a host controller bus driver
++ *
++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Register a host controller driver with the bus driver.
++
++ @function name: SDIO_RegisterHostController
++ @prototype: SDIO_STATUS SDIO_RegisterHostController (PSDHCD pHcd)
++ @category: HD_Reference
++
++ @input: pHcd - the host controller definition structure.
++
++ @output: none
++
++ @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when successful.
++
++ @notes: Each host controller driver must register with the bus driver when loaded.
++ The driver registers an SDHCD structure initialized with hardware properties
++ and callback functions for bus requests and configuration. On multi-slot
++ hardware ,each slot should be registered with a separate SDHCD structure.
++ The bus driver views each slot as a seperate host controller object.
++ The driver should be prepared to receive configuration requests before
++ this call returns. The host controller driver must unregister itself when
++ shutting down.
++
++ @example: Registering a host controller driver:
++ static SDHCD Hcd = {
++ .pName = "sdio_custom_hcd",
++ .Version = CT_SDIO_STACK_VERSION_CODE, // set stack version code
++ .SlotNumber = 0, // bus driver internal use
++ .Attributes = SDHCD_ATTRIB_BUS_1BIT | SDHCD_ATTRIB_BUS_4BIT | SDHCD_ATTRIB_MULTI_BLK_IRQ
++ SDHCD_ATTRIB_AUTO_CMD12 ,
++ .MaxBytesPerBlock = 2048 // each data block can be up to 2048 bytes
++ .MaxBlocksPerTrans = 1024, // each data transaction can consist of 1024 blocks
++ .MaxSlotCurrent = 500, // max FET switch current rating
++ .SlotVoltageCaps = SLOT_POWER_3_3V, // only 3.3V operation
++ .SlotVoltagePreferred = SLOT_POWER_3_3V,
++ .MaxClockRate = 24000000, // 24 Mhz max operation
++ .pContext = &HcdContext, // set our driver context
++ .pRequest = HcdRequest, // set SDIO bus request callback
++ .pConfigure = HcdConfig, // set SDIO bus configuration callback
++ };
++ if (!SDIO_SUCCESS((status = SDIO_RegisterHostController(&Hcd)))) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO HCD - failed to register with host, status =%d\n",
++ status));
++ }
++
++ @see also: SDIO_UnregisterHostController
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDIO_RegisterHostController(PSDHCD pHcd) {
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++ DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: _SDIO_RegisterHostController - %s\n",pHcd->pName));
++ DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: Host Controller Stack Version: %d.%d \n",
++ GET_SDIO_STACK_VERSION_MAJOR(pHcd),GET_SDIO_STACK_VERSION_MINOR(pHcd)));
++
++ if (!CHECK_HCD_DRIVER_VERSION(pHcd)) {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: HCD Major Version Mismatch (hcd = %d, bus driver = %d)\n",
++ GET_SDIO_STACK_VERSION_MAJOR(pHcd), CT_SDIO_STACK_VERSION_MAJOR(g_Version)));
++ return SDIO_STATUS_INVALID_PARAMETER;
++ }
++ /* setup hcd */
++ status = SetupHcd(pHcd);
++ if (!SDIO_SUCCESS(status)) {
++ return status;
++ }
++
++ do {
++ INT slotNumber;
++
++ /* protect the HCD list */
++ if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->HcdListSem)))) {
++ break; /* wait interrupted */
++ }
++ /* find a unique number for this HCD, must be done under semaphore protection */
++ slotNumber = FirstClearBit(&pBusContext->HcdInUseField);
++ if (slotNumber < 0) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_RegisterHostController, error, slotNumber exceeded\n"));
++ /* fake something */
++ slotNumber = 31;
++ }
++ SetBit(&pBusContext->HcdInUseField, slotNumber);
++ pHcd->SlotNumber = slotNumber;
++ /* add HCD to the end of the internal list */
++ SDListAdd(&pBusContext->HcdList , &pHcd->SDList);
++ if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->HcdListSem)))) {
++ break; /* wait interrupted */
++ }
++ if (pHcd->Attributes & SDHCD_ATTRIB_SLOT_POLLING) {
++ /* post message to card detect helper to do polling */
++ PostCardDetectEvent(pBusContext, EVENT_HCD_CD_POLLING, NULL);
++ }
++ } while (FALSE);
++
++ if (!SDIO_SUCCESS(status)) {
++ CleanupHcd(pHcd);
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_RegisterHostController, error 0x%X.\n", status));
++ }
++ DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: _SDIO_RegisterHostController\n"));
++ return status;
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Unregister a host controller driver with the bus driver.
++
++ @function name: SDIO_UnregisterHostController
++ @prototype: SDIO_STATUS SDIO_UnregisterHostController (PSDHCD pHcd)
++ @category: HD_Reference
++
++ @input: pHcd - the host controller definition structure that was registered.
++
++ @output: none
++
++ @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when successful.
++
++ @notes: Each host controller driver must unregister with the bus driver when
++ unloading. The driver is responsible for halting any outstanding I/O
++ operations. The bus driver will automatically unload function drivers
++ that may be attached assigned to cards inserted into slots.
++
++ @example: Unregistering a host controller driver:
++ if (!SDIO_SUCCESS((status = SDIO_UnregisterHostController(&Hcd)))) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO HCD - failed to unregister with host, status =%d\n",
++ status));
++ }
++
++ @see also: SDIO_RegisterHostController
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDIO_UnregisterHostController(PSDHCD pHcd) {
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++ DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: _SDIO_UnregisterHostController\n"));
++
++ /* remove functions associated with the HCD */
++ RemoveHcdFunctions(pHcd);
++ /* remove any devices associated with the HCD */
++ DeleteDevices(pHcd);
++ /* wait for the message queue to be empty, so we don't have any delayed requests going
++ to this device */
++ while(!SDLIB_IsQueueEmpty(pBusContext->pCardDetectMsgQueue)) {
++ /* wait for the messages to be handled */
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: _SDIO_UnregisterHostController, waiting on messages\n"));
++ OSSleep(250);
++ }
++
++ /* protect the HCD list */
++ if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->HcdListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++ ClearBit(&pBusContext->HcdInUseField, pHcd->SlotNumber);
++ /* delete HCD from list */
++ SDListRemove(&pHcd->SDList);
++ if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->HcdListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++ /* cleanup anything we allocated */
++ CleanupHcd(pHcd);
++ DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: _SDIO_UnregisterHostController\n"));
++ return status;
++cleanup:
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_UnregisterHostController, error 0x%X.\n", status));
++ return status;
++}
++
++/* documentation headers only for Request and Configure */
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: The bus driver calls the request callback to start an SDIO bus transaction.
++ @function name: Request
++ @prototype: SDIO_STATUS (*pRequest) (struct _SDHCD *pHcd)
++ @category: HD_Reference
++
++ @input: pHcd - the host controller structure that was registered
++
++ @output: none
++
++ @return: SDIO_STATUS
++
++ @notes:
++ The bus driver maintains an internal queue of SDREQUEST structures submited by function
++ drivers. The driver should use request macros to obtain a pointer to the current SDREQUEST
++ at the head of the queue. The driver can access the fields of the current request in order
++ to program hardware appropriately. Once the request completes, the driver should update
++ the current request information (final status, response bytes and/or data) and call
++ SDIO_HandleHcdEvent() with the event type of EVENT_HCD_TRANSFER_DONE.
++ The bus driver will remove the current request from the head of the queue and start the next
++ request.
++
++ @example: Example of a typical Request callback:
++ SDIO_STATUS HcdRequest(PSDHCD pHcd)
++ {
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ PSDHCD_DRIVER_CONTEXT pHct = (PSDHCD_DRIVER_CONTEXT)pHcd->pContext;
++ UINT32 temp = 0;
++ PSDREQUEST pReq;
++ // get the current request
++ pReq = GET_CURRENT_REQUEST(pHcd);
++ DBG_ASSERT(pReq != NULL);
++ // get controller settings based on response type
++ switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++ case SDREQ_FLAGS_NO_RESP:
++ break;
++ case SDREQ_FLAGS_RESP_R1:
++ case SDREQ_FLAGS_RESP_MMC_R4:
++ case SDREQ_FLAGS_RESP_MMC_R5:
++ case SDREQ_FLAGS_RESP_R6:
++ case SDREQ_FLAGS_RESP_SDIO_R5:
++ temp |= CMDDAT_RES_R1_R4_R5;
++ break;
++ case SDREQ_FLAGS_RESP_R1B:
++ temp |= (CMDDAT_RES_R1_R4_R5 | CMDAT_RES_BUSY);
++ break;
++ case SDREQ_FLAGS_RESP_R2:
++ temp |= CMDDAT_RES_R2;
++ break;
++ case SDREQ_FLAGS_RESP_R3:
++ case SDREQ_FLAGS_RESP_SDIO_R4:
++ temp |= CMDDAT_RES_R3;
++ break;
++ }
++ // check for data
++ if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS){
++ temp |= CMDDAT_DATA_EN;
++ // set data remaining count
++ pReq->DataRemaining = pReq->BlockLen * pReq->BlockCount;
++ DBG_PRINT(TRACE_DATA, ("SDIO %s Data Transfer, Blocks:%d, BlockLen:%d, Total:%d \n",
++ IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++ pReq->BlockCount, pReq->BlockLen, pReq->DataRemaining));
++ if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++ // write operation
++ }
++ }
++ // .... program hardware, interrupt handler will complete request
++ return SDIO_STATUS_PENDING;
++ }
++
++ @see also: SDIO_HandleHcdEvent
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: The bus driver calls the configure callback to set various options
++ and modes in the host controller hardware.
++
++ @function name: Configure
++ @prototype: SDIO_STATUS (*pConfigure) (struct _SDHCD *pHcd, PSDCONFIG pConfig)
++ @category: HD_Reference
++
++ @input: pHcd - the host controller structure that was registered
++ @input: pConfig - configuration request structure
++
++ @output: none
++
++ @return: SDIO_STATUS
++
++ @notes:
++ The host controller driver recieves configuration requests for options
++ such as slot voltage, bus width, clock rates and interrupt detection.
++ The bus driver guarantees that only one configuration option request
++ can be issued at a time.
++
++ @example: Example of a typical configure callback:
++ SDIO_STATUS HcdConfig(PSDHCD pHcd, PSDCONFIG pConfig)
++ {
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ PSDHCD_DRIVER_CONTEXT pHct = (PSDHCD_DRIVER_CONTEXT)pHcd->pContext;
++ UINT16 command;
++ // get command
++ command = GET_SDCONFIG_CMD(pConfig);
++ // decode command
++ switch (command){
++ case SDCONFIG_GET_WP:
++ if (GetGpioPinLevel(pHct,SDIO_CARD_WP_GPIO) == WP_POLARITY) {
++ *((SDCONFIG_WP_VALUE *)pConfig->pData) = 1;
++ } else {
++ *((SDCONFIG_WP_VALUE *)pConfig->pData) = 0;
++ }
++ break;
++ case SDCONFIG_SEND_INIT_CLOCKS:
++ ClockStartStop(pHct,CLOCK_ON);
++ // sleep a little, should be at least 80 clocks at our lowest clock setting
++ status = OSSleep(100);
++ ClockStartStop(pHct,CLOCK_OFF);
++ break;
++ case SDCONFIG_SDIO_INT_CTRL:
++ if (GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig)->SlotIRQEnable) {
++ // request to enable IRQ detection
++ } else {
++ // request to disable IRQ detectioon
++ }
++ break;
++ case SDCONFIG_SDIO_REARM_INT:
++ // request to re-arm the card IRQ detection logic
++ break;
++ case SDCONFIG_BUS_MODE_CTRL:
++ // request to set bus mode
++ {
++ // get bus mode data structure
++ PSDCONFIG_BUS_MODE_DATA pBusMode =
++ GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig);
++ // set bus mode based on settings in bus mode structure
++ // bus mode : pBusMode->BusModeFlags
++ // clock rate : pBusMode->ClockRate
++ }
++ break;
++ case SDCONFIG_POWER_CTRL:
++ // request to set power/voltage
++ {
++ PSDCONFIG_POWER_CTRL_DATA pPowerSetting =
++ GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig);
++ if (pPowerSetting->SlotPowerEnable) {
++ // turn on slot power
++ //
++ } else {
++ // turn off slot power
++ }
++ DBG_PRINT(PXA_TRACE_CONFIG, ("SDIO PXA255 PwrControl: En:%d, VCC:0x%X \n",
++ pPowerSetting->SlotPowerEnable,
++ pPowerSetting->SlotPowerVoltageMask));
++ }
++ break;
++ default:
++ // unsupported
++ status = SDIO_STATUS_INVALID_PARAMETER;
++ }
++ return status;
++ }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++
++/*
++ * Allocate a Device instance
++ */
++PSDDEVICE AllocateDevice(PSDHCD pHcd)
++{
++ PSDDEVICE pDevice;
++
++ pDevice = KernelAlloc(sizeof(SDDEVICE));
++ if (pDevice != NULL) {
++ InitDeviceData(pHcd,pDevice);
++ }
++ return pDevice;
++}
++
++
++/*
++ * Free a Device instance
++ */
++void FreeDevice(PSDDEVICE pDevice)
++{
++ DeinitDeviceData(pDevice);
++ KernelFree(pDevice);
++}
++/*
++ * add this device to the list
++ */
++BOOL AddDeviceToList(PSDDEVICE pDevice)
++{
++ BOOL success = FALSE;
++
++ do {
++ /* protect the driver list */
++ if (!SDIO_SUCCESS(SemaphorePendInterruptable(&pBusContext->DeviceListSem))) {
++ break; /* wait interrupted */
++ }
++
++ /* add new device to the internal list */
++ SDListAdd(&pBusContext->DeviceList , &pDevice->SDList);
++
++ if (!SDIO_SUCCESS(SemaphorePost(&pBusContext->DeviceListSem))) {
++ break;
++ }
++
++ success = TRUE;
++ } while (FALSE);
++
++ return success;
++}
++
++/*
++ * Delete device associated with the HCD
++ * if pHCD is NULL this function cleans up all devices, the caller
++ * better have cleaned up functions first!
++ */
++SDIO_STATUS DeleteDevices(PSDHCD pHcd)
++{
++ SDIO_STATUS status;
++ PSDDEVICE pDevice;
++ DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: DeleteDevices hcd:0x%X \n", (INT)pHcd));
++ /* protect the device list */
++ if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->DeviceListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++ SDITERATE_OVER_LIST_ALLOW_REMOVE(&pBusContext->DeviceList,pDevice,SDDEVICE,SDList) {
++ /* only remove devices for the hcd or if we are cleaning up all */
++ if ((NULL == pHcd) || (pDevice->pHcd == pHcd)) {
++ SDListRemove(&pDevice->SDList);
++ DeinitDeviceData(pDevice);
++ FreeDevice(pDevice);
++ }
++ }SDITERATE_END;
++ if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->DeviceListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++ DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: DeleteDevices \n"));
++ return status;
++cleanup:
++ DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: DeleteDevice, error exit 0x%X\n", status));
++ return status;
++}
++
++
++static SDIO_STATUS AllocateBusResources(void)
++{
++ INT ii;
++ PSDREQUEST pReq;
++ PSIGNAL_ITEM pSignal;
++
++ DBG_PRINT(SDDBG_TRACE,
++ ("+SDIO Bus Driver: AllocateBusResources (R:%d,S:%d) (CR:%d,MR:%d)(CS:%d,MS:%d) \n",
++ pBusContext->RequestListSize,
++ pBusContext->SignalSemListSize,
++ pBusContext->CurrentRequestAllocations,pBusContext->MaxRequestAllocations,
++ pBusContext->CurrentSignalAllocations,pBusContext->MaxSignalAllocations));
++
++ /* allocate some initial requests */
++ for (ii = 0; ii < pBusContext->RequestListSize; ii++) {
++ pReq = AllocateRequest();
++ if (pReq == NULL) {
++ break;
++ }
++ /* free requests adds the request to the list */
++ FreeRequest(pReq);
++ }
++
++ for (ii = 0; ii < pBusContext->SignalSemListSize; ii++) {
++ pSignal = AllocateSignal();
++ if (pSignal == NULL) {
++ break;
++ }
++ /* freeing it adds it to the list */
++ FreeSignal(pSignal);
++ }
++
++ DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: AllocateBusResources\n"));
++ return SDIO_STATUS_SUCCESS;
++}
++
++
++/* cleanup bus resources */
++static void CleanUpBusResources(void)
++{
++ PSDLIST pItem;
++ PSDREQUEST pReq;
++ PSIGNAL_ITEM pSignal;
++
++ DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: CleanUpBusResources (CR:%d,MR:%d)(CS:%d,MS:%d) \n",
++ pBusContext->CurrentRequestAllocations,pBusContext->MaxRequestAllocations,
++ pBusContext->CurrentSignalAllocations,pBusContext->MaxSignalAllocations));
++
++ while(1) {
++ pItem = SDListRemoveItemFromHead(&pBusContext->RequestList);
++ if (NULL == pItem) {
++ break;
++ }
++ /* free the request */
++ pReq = CONTAINING_STRUCT(pItem, SDREQUEST, SDList);
++ if (pReq->InternalFlags & SDBD_ALLOC_IRQ_SAFE_MASK) {
++ KernelFreeIrqSafe(pReq);
++ } else {
++ KernelFree(pReq);
++ }
++ pBusContext->CurrentRequestAllocations--;
++ }
++
++ if (pBusContext->CurrentRequestAllocations != 0) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Request allocations are not ZERO! (CR:%d)\n",
++ pBusContext->CurrentRequestAllocations));
++ }
++
++ while(1) {
++ pItem = SDListRemoveItemFromHead(&pBusContext->SignalList);
++ if (NULL == pItem) {
++ break;
++ }
++ pSignal = CONTAINING_STRUCT(pItem, SIGNAL_ITEM, SDList);
++ DestroySignal(pSignal);
++ pBusContext->CurrentSignalAllocations--;
++ }
++
++ if (pBusContext->CurrentSignalAllocations != 0) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Signal allocations are not ZERO! (CR:%d)\n",
++ pBusContext->CurrentRequestAllocations));
++ }
++
++ DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: CleanUpBusResources\n"));
++}
++
++
++/* free a request to the lookaside list */
++void FreeRequest(PSDREQUEST pReq)
++{
++ SDIO_STATUS status;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
++ /* protect request list */
++ if (!SDIO_SUCCESS(status)) {
++ return;
++ }
++
++ if ((pBusContext->CurrentRequestAllocations <= pBusContext->MaxRequestAllocations) ||
++ !(pReq->InternalFlags & SDBD_ALLOC_IRQ_SAFE_MASK)) {
++ /* add it to the list */
++ SDListAdd(&pBusContext->RequestList, &pReq->SDList);
++ /* we will hold onto this one */
++ pReq = NULL;
++ } else {
++ /* decrement count */
++ pBusContext->CurrentRequestAllocations--;
++ }
++
++ status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
++
++ if (pReq != NULL) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Free Request allocation (CR:%d,MR:%d)\n",
++ pBusContext->CurrentRequestAllocations,pBusContext->MaxRequestAllocations));
++ if (pReq->InternalFlags & SDBD_ALLOC_IRQ_SAFE_MASK) {
++ KernelFreeIrqSafe(pReq);
++ } else {
++ /* we should never free the ones that were normally allocated */
++ DBG_ASSERT(FALSE);
++ }
++ }
++}
++
++/* allocate a request from the lookaside list */
++PSDREQUEST AllocateRequest(void)
++{
++ PSDLIST pItem;
++ SDIO_STATUS status;
++ PSDREQUEST pReq = NULL;
++ ATOMIC_FLAGS internalflags;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++
++ status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
++
++ if (!SDIO_SUCCESS(status)) {
++ return NULL;
++ }
++
++ if (pBusContext->InitMask & RESOURCE_INIT) {
++ /* check the list, we are now running... */
++ pItem = SDListRemoveItemFromHead(&pBusContext->RequestList);
++ } else {
++ /* we are loading the list with requests at initialization */
++ pItem = NULL;
++ }
++ status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
++
++ if (pItem != NULL) {
++ pReq = CONTAINING_STRUCT(pItem, SDREQUEST, SDList);
++ } else {
++ if (pBusContext->InitMask & RESOURCE_INIT) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Request List empty..allocating new one (irq-safe) (CR:%d,MR:%d)\n",
++ pBusContext->CurrentRequestAllocations,pBusContext->MaxRequestAllocations));
++ /* the resource list was already allocated, we must be running now.
++ * at run-time, we allocate using the safe IRQ */
++ pReq = (PSDREQUEST)KernelAllocIrqSafe(sizeof(SDREQUEST));
++ /* mark that this one was created using IRQ safe allocation */
++ internalflags = SDBD_ALLOC_IRQ_SAFE_MASK;
++ } else {
++ /* use the normal allocation since we are called at initialization */
++ pReq = (PSDREQUEST)KernelAlloc(sizeof(SDREQUEST));
++ internalflags = 0;
++ }
++
++ if (pReq != NULL) {
++ pReq->InternalFlags = internalflags;
++ /* keep track of allocations */
++ status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
++ pBusContext->CurrentRequestAllocations++;
++ status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
++ }
++ }
++
++
++ if (pReq != NULL) {
++ /* preserve internal flags */
++ internalflags = pReq->InternalFlags;
++ ZERO_POBJECT(pReq);
++ pReq->InternalFlags = internalflags;
++ }
++
++ return pReq;
++}
++
++void DestroySignal(PSIGNAL_ITEM pSignal)
++{
++ SignalDelete(&pSignal->Signal);
++ KernelFree(pSignal);
++}
++
++PSIGNAL_ITEM BuildSignal(void)
++{
++ PSIGNAL_ITEM pSignal;
++
++ pSignal = (PSIGNAL_ITEM)KernelAlloc(sizeof(SIGNAL_ITEM));
++ if (pSignal != NULL) {
++ /* initialize signal */
++ if (!SDIO_SUCCESS(SignalInitialize(&pSignal->Signal))) {
++ KernelFree(pSignal);
++ pSignal = NULL;
++ }
++ }
++ return pSignal;
++}
++/* free a signal*/
++void FreeSignal(PSIGNAL_ITEM pSignal)
++{
++ SDIO_STATUS status;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
++
++ if (!SDIO_SUCCESS(status)) {
++ return;
++ }
++
++ if (pBusContext->CurrentSignalAllocations <= pBusContext->MaxSignalAllocations) {
++ /* add it to the list */
++ SDListAdd(&pBusContext->SignalList, &pSignal->SDList);
++ /* flag that we are holding onto it */
++ pSignal = NULL;
++ } else {
++ /* decrement count */
++ pBusContext->CurrentSignalAllocations--;
++ }
++
++ status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
++
++ if (pSignal != NULL) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Free signal allocation (CS:%d,MS:%d)\n",
++ pBusContext->CurrentSignalAllocations,pBusContext->MaxSignalAllocations));
++ DestroySignal(pSignal);
++ }
++}
++
++/* allocate a signal from the list */
++PSIGNAL_ITEM AllocateSignal(void)
++{
++ PSDLIST pItem;
++ PSIGNAL_ITEM pSignal;
++ SDIO_STATUS status;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
++
++ if (!SDIO_SUCCESS(status)) {
++ return NULL;
++ }
++
++ if (pBusContext->InitMask & RESOURCE_INIT) {
++ /* check the list */
++ pItem = SDListRemoveItemFromHead(&pBusContext->SignalList);
++ } else {
++ /* we are loading the list */
++ pItem = NULL;
++ }
++
++ status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
++ if (pItem != NULL) {
++ /* return the one from the list */
++ pSignal = CONTAINING_STRUCT(pItem, SIGNAL_ITEM, SDList);
++ } else {
++ if (pBusContext->InitMask & RESOURCE_INIT) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Signal List empty..allocating new one (CS:%d,MS:%d)\n",
++ pBusContext->CurrentSignalAllocations,pBusContext->MaxSignalAllocations));
++ }
++ /* just allocate one */
++ pSignal = BuildSignal();
++ status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
++ if (pSignal != NULL) {
++ pBusContext->CurrentSignalAllocations++;
++ }
++ status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
++ }
++
++
++ return pSignal;
++}
++
++/*
++ * Issus Bus Request (exposed to function drivers)
++*/
++PSDREQUEST IssueAllocRequest(PSDDEVICE pDev)
++{
++ return AllocateRequest();
++}
++
++/*
++ * Free Request (exposed to function drivers)
++*/
++void IssueFreeRequest(PSDDEVICE pDev, PSDREQUEST pReq)
++{
++ FreeRequest(pReq);
++}
++
++/*
++ * Issus Bus Request (exposed to function drivers)
++*/
++SDIO_STATUS IssueBusRequest(PSDDEVICE pDev, PSDREQUEST pReq)
++{
++ pReq->pFunction = pDev->pFunction;
++ return IssueRequestToHCD(pDev->pHcd,pReq);
++}
++
++
++ /* completion routine for HCD configs, this is synchronized with normal bus requests */
++static void HcdConfigComplete(PSDREQUEST pReq)
++{
++
++ pReq->Status = CALL_HCD_CONFIG((PSDHCD)pReq->pDataBuffer, (PSDCONFIG)pReq->pCompleteContext);
++
++ SignalSet(&((PSIGNAL_ITEM)pReq->pHcdContext)->Signal);
++}
++
++SDIO_STATUS SendSyncedHcdBusConfig(PSDDEVICE pDevice, PSDCONFIG pConfig)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ PSDREQUEST pReq = NULL;
++ PSIGNAL_ITEM pSignal = NULL;
++
++ do {
++
++ pSignal = AllocateSignal();
++ if (NULL == pSignal) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++
++ pReq = AllocateRequest();
++ if (NULL == pReq) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++
++ /* issue pseudo request to sync this with bus requests */
++ pReq->pCompletion = HcdConfigComplete;
++ pReq->pCompleteContext = pConfig;
++ /* re-use hcd context to store the signal since this request
++ * never actually goes to an HCD */
++ pReq->pHcdContext = pSignal;
++ pReq->pDataBuffer = pDevice->pHcd;
++ /* flag this as barrier in case it may change the bus mode of the HCD */
++ pReq->Flags = SDREQ_FLAGS_PSEUDO | SDREQ_FLAGS_BARRIER | SDREQ_FLAGS_TRANS_ASYNC;
++ pReq->Status = SDIO_STATUS_SUCCESS;
++
++ /* issue request */
++ status = IssueRequestToHCD(pDevice->pHcd,pReq);
++
++ } while (FALSE);
++
++ if (SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Config Request Sync-Op waiting....\n"));
++ status = SignalWait(&pSignal->Signal);
++
++ if (SDIO_SUCCESS(status)) {
++ /* return the result of the configuration request */
++ status = pReq->Status;
++ }
++ }
++
++ /* cleanup */
++ if (pReq != NULL) {
++ FreeRequest(pReq);
++ }
++
++ if (pSignal != NULL) {
++ FreeSignal(pSignal);
++ }
++
++ return status;
++}
++
++/*
++ * Issus bus Configuration (exposed to function drivers)
++*/
++SDIO_STATUS IssueBusConfig(PSDDEVICE pDev, PSDCONFIG pConfig)
++{
++ SDIO_STATUS status;
++ INT cmdLength;
++ UINT8 debugLevel = SDDBG_ERROR;
++
++ cmdLength = GET_SDCONFIG_CMD_LEN(pConfig);
++ status = SDIO_STATUS_INVALID_PARAMETER;
++
++ do {
++ /* check buffers and length */
++ if (IS_SDCONFIG_CMD_GET(pConfig) || IS_SDCONFIG_CMD_PUT(pConfig)) {
++ if ((GET_SDCONFIG_CMD_DATA(PVOID,pConfig) == NULL) || (0 == cmdLength)) {
++ break;
++ }
++ }
++
++ switch (GET_SDCONFIG_CMD(pConfig)) {
++ case SDCONFIG_FUNC_ACK_IRQ:
++ status = SDFunctionAckInterrupt(pDev);
++ break;
++ case SDCONFIG_FUNC_ENABLE_DISABLE:
++ if (cmdLength < sizeof(SDCONFIG_FUNC_ENABLE_DISABLE_DATA)) {
++ break;
++ }
++ status = SDEnableFunction(pDev,
++ GET_SDCONFIG_CMD_DATA(PSDCONFIG_FUNC_ENABLE_DISABLE_DATA,pConfig));
++ break;
++ case SDCONFIG_FUNC_UNMASK_IRQ:
++ status = SDMaskUnmaskFunctionIRQ(pDev,FALSE);
++ break;
++ case SDCONFIG_FUNC_MASK_IRQ:
++ status = SDMaskUnmaskFunctionIRQ(pDev,TRUE);
++ break;
++ case SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC:
++ status = SDSPIModeEnableDisableCRC(pDev,FALSE);
++ break;
++ case SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC:
++ status = SDSPIModeEnableDisableCRC(pDev,TRUE);
++ break;
++ case SDCONFIG_FUNC_ALLOC_SLOT_CURRENT:
++ status = SDAllocFreeSlotCurrent(pDev,
++ TRUE,
++ GET_SDCONFIG_CMD_DATA(PSDCONFIG_FUNC_SLOT_CURRENT_DATA,pConfig));
++ break;
++ case SDCONFIG_FUNC_FREE_SLOT_CURRENT:
++ status = SDAllocFreeSlotCurrent(pDev, FALSE, NULL);
++ break;
++ case SDCONFIG_FUNC_CHANGE_BUS_MODE:
++
++ status = SetOperationalBusMode(pDev,
++ GET_SDCONFIG_CMD_DATA(PSDCONFIG_BUS_MODE_DATA,
++ pConfig));
++ break;
++ case SDCONFIG_FUNC_NO_IRQ_PEND_CHECK:
++ status = TryNoIrqPendingCheck(pDev);
++ break;
++ default:
++
++ if (GET_SDCONFIG_CMD(pConfig) & SDCONFIG_FLAGS_HC_CONFIG) {
++ /* synchronize config requests with busrequests */
++ status = SendSyncedHcdBusConfig(pDev,pConfig);
++ } else {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: IssueBusConfig - unknown command:0x%X \n",
++ GET_SDCONFIG_CMD(pConfig)));
++ status = SDIO_STATUS_INVALID_PARAMETER;
++ }
++ break;
++ }
++ } while(FALSE);
++
++ if (!SDIO_SUCCESS(status)) {
++
++ if(status == SDIO_STATUS_FUNC_ENABLE_TIMEOUT ){ /* reduce debug level to avoid timeout error messages */
++ debugLevel = SDDBG_TRACE;
++ }
++
++
++ DBG_PRINT(debugLevel,
++ ("SDIO Bus Driver: IssueBusConfig - Error in command:0x%X, Buffer:0x%X, Length:%d Err:%d\n",
++ GET_SDCONFIG_CMD(pConfig),
++ GET_SDCONFIG_CMD_DATA(INT,pConfig),
++ cmdLength, status));
++ }
++ return status;
++}
++
++/* start a request */
++static INLINE SDIO_STATUS StartHcdRequest(PSDHCD pHcd, PSDREQUEST pReq)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ if ((pReq->pFunction != NULL) && (pReq->pFunction->Flags & SDFUNCTION_FLAG_REMOVING)) {
++ /* this device or function is going away, fail any new requests */
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: StartHcdRequest, fail request 0x%X, device is removing\n", (UINT)pReq));
++ pReq->Status = SDIO_STATUS_CANCELED;
++ return SDIO_STATUS_SDREQ_QUEUE_FAILED;
++ }
++
++ status = _AcquireHcdLock(pHcd);
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to acquire HCD request lock: Err:%d\n", status));
++ pReq->Status = SDIO_STATUS_SDREQ_QUEUE_FAILED;
++ return SDIO_STATUS_SDREQ_QUEUE_FAILED;
++ }
++
++ if (pReq->Flags & SDREQ_FLAGS_QUEUE_HEAD) {
++ /* caller wants this request queued to the head */
++
++ /* a completion routine for a barrier request is called
++ * while the queue is busy. A barrier request can
++ * insert a new request at the head of the queue */
++ DBG_ASSERT(IsQueueBusy(&pHcd->RequestQueue));
++ QueueRequestToFront(&pHcd->RequestQueue,pReq);
++ } else {
++ /* insert in queue at tail */
++ QueueRequest(&pHcd->RequestQueue,pReq);
++
++ /* is queue busy ? */
++ if (IsQueueBusy(&pHcd->RequestQueue)) {
++ /* release lock */
++ status = _ReleaseHcdLock(pHcd);
++ /* controller is busy already, no need to call the hcd */
++ return SDIO_STATUS_PENDING;
++ }
++ /* mark it as busy */
++ MarkQueueBusy(&pHcd->RequestQueue);
++ }
++
++ /* remove item from head and set current request */
++ SET_CURRENT_REQUEST(pHcd, DequeueRequest(&pHcd->RequestQueue));
++ if (CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
++ CHECK_HCD_RECURSE(pHcd, pHcd->pCurrentRequest);
++ }
++ /* release lock */
++ status = _ReleaseHcdLock(pHcd);
++ /* controller was not busy, call into HCD to process current request */
++ status = CallHcdRequest(pHcd);
++ return status;
++}
++
++
++/* used by CMD12,CMD13 to save the original completion routine */
++#define GET_BD_RSV_REQUEST_COMPLETION(pR) (PSDEQUEST_COMPLETION)(pR)->pBdRsv1
++#define SET_BD_RSV_REQUEST_COMPLETION(pR,c) (pR)->pBdRsv1 = (PVOID)(c)
++
++/* used by CMD12 processing to save/restore the original data transfer status */
++#define GET_BD_RSV_ORIG_STATUS(pR) (SDIO_STATUS)(pR)->pBdRsv2
++#define SET_BD_RSV_ORIG_STATUS(pR,s) (pR)->pBdRsv2 = (PVOID)(s)
++
++/* used by CMD13 processing to get/set polling count */
++#define GET_BD_RSV_STATUS_POLL_COUNT(pR) (INT)(pR)->pBdRsv2
++#define SET_BD_RSV_STATUS_POLL_COUNT(pR,s) (pR)->pBdRsv2 = (PVOID)(s)
++
++/* used by CMD55 processing to save the second part of the request */
++#define GET_BD_RSV_ORIG_REQ(pR) (PSDREQUEST)(pR)->pBdRsv1
++#define SET_BD_RSV_ORIG_REQ(pR,r) (pR)->pBdRsv1 = (PVOID)(r)
++
++/* used by all to save HCD */
++#define GET_BD_RSV_HCD(pR) (PSDHCD)(pR)->pBdRsv3
++#define SET_BD_RSV_HCD(pR,h) (pR)->pBdRsv3 = (PVOID)(h)
++
++static void CMD13CompletionBarrier(PSDREQUEST pReq);
++
++static INLINE void SetupCMD13(PSDHCD pHcd, PSDREQUEST pReq)
++{
++ pReq->Command = CMD13;
++ /* sequence must be atomic, queue it to the head and flag as a barrier */
++ pReq->Flags = SDREQ_FLAGS_QUEUE_HEAD | SDREQ_FLAGS_BARRIER | SDREQ_FLAGS_TRANS_ASYNC;
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ pReq->Argument = 0;
++ pReq->Flags |= SDREQ_FLAGS_RESP_R2;
++ } else {
++ pReq->Flags |= SDREQ_FLAGS_RESP_R1;
++ pReq->Argument |= pHcd->CardProperties.RCA << 16;
++ }
++ /* insert completion */
++ pReq->pCompletion = CMD13CompletionBarrier;
++}
++
++/* CMD13 (GET STATUS) completion */
++static void CMD13CompletionBarrier(PSDREQUEST pReq)
++{
++ PSDEQUEST_COMPLETION pOrigCompletion = GET_BD_RSV_REQUEST_COMPLETION(pReq);
++ PSDHCD pHcd = GET_BD_RSV_HCD(pReq);
++ INT pollingCount = GET_BD_RSV_STATUS_POLL_COUNT(pReq);
++ BOOL doCompletion = TRUE;
++ UINT32 cardStatus;
++
++ DBG_ASSERT(pOrigCompletion != NULL);
++ DBG_ASSERT(pHcd != NULL);
++ DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: CMD13CompletionBarrier (cnt:%d) \n",pollingCount));
++
++ do {
++ if (!SDIO_SUCCESS(pReq->Status)) {
++ break;
++ }
++
++ cardStatus = SD_R1_GET_CARD_STATUS(pReq->Response);
++
++ if (cardStatus & SD_CS_TRANSFER_ERRORS) {
++ DBG_PRINT(SDIODBG_REQUESTS,("SDIO Bus Driver: Card transfer errors : 0x%X \n",cardStatus));
++ pReq->Status = SDIO_STATUS_PROGRAM_STATUS_ERROR;
++ break;
++ }
++
++ if (SD_CS_GET_STATE(cardStatus) != SD_CS_STATE_PRG) {
++ DBG_PRINT(SDIODBG_REQUESTS,("SDIO Bus Driver: Card programming done \n"));
++ break;
++ }
++
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Card still programming.. \n"));
++ pollingCount--;
++
++ if (pollingCount < 0) {
++ pReq->Status = SDIO_STATUS_PROGRAM_TIMEOUT;
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: card programming timeout!\n"));
++ break;
++ }
++
++ doCompletion = FALSE;
++ /* keep trying */
++ SET_BD_RSV_STATUS_POLL_COUNT(pReq, pollingCount);
++ SetupCMD13(pHcd,pReq);
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: re-issuing CMD13 \n"));
++ /* re-issue */
++ IssueRequestToHCD(pHcd, pReq);
++
++ } while (FALSE);
++
++
++ if (doCompletion) {
++ /* restore original completion routine */
++ pReq->pCompletion = pOrigCompletion;
++ /* call original completion routine */
++ pOrigCompletion(pReq);
++ }
++
++ DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: CMD13CompletionBarrier \n"));
++}
++
++/* command 13 (GET STATUS) preparation */
++static void PrepCMD13Barrier(PSDREQUEST pReq)
++{
++ SDIO_STATUS status = pReq->Status;
++ PSDHCD pHcd = GET_BD_RSV_HCD(pReq);
++ INT pollingCount;
++ PSDEQUEST_COMPLETION pOrigCompletion = GET_BD_RSV_REQUEST_COMPLETION(pReq);
++
++ DBG_ASSERT(pHcd != NULL);
++ DBG_ASSERT(pOrigCompletion != NULL);
++
++ DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: PrepCMD13Barrier \n"));
++
++ if (SDIO_SUCCESS(status)) {
++ /* re-use the request for CMD13 */
++ SetupCMD13(pHcd,pReq);
++ /* set polling count to a multiple of the Block count, if the BlockCount was
++ * zeroed by the HCD, then set it to 1X multiplier */
++ pollingCount = max(pBusContext->CMD13PollingMultiplier,
++ pBusContext->CMD13PollingMultiplier * (INT)pReq->BlockCount);
++ /* initialize count */
++ SET_BD_RSV_STATUS_POLL_COUNT(pReq, pollingCount);
++ /* re-issue it, we can call IssueRequest here since we are re-using the request */
++ IssueRequestToHCD(pHcd, pReq);
++ } else {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Request Failure (%d) , CMD13 bypassed.\n",status));
++ /* call the original completion routine */
++ pOrigCompletion(pReq);
++ }
++
++ DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: PrepCMD13Barrier (%d) \n",status));
++}
++
++/* CMD12 completion */
++static void CMD12Completion(PSDREQUEST pReq)
++{
++ PSDEQUEST_COMPLETION pOrigCompletion = GET_BD_RSV_REQUEST_COMPLETION(pReq);
++
++ DBG_ASSERT(pOrigCompletion != NULL);
++
++ DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: CMD12Completion \n"));
++
++ /* restore original completion routine */
++ pReq->pCompletion = pOrigCompletion;
++
++ if (SDIO_SUCCESS(pReq->Status)) {
++ /* if CMD12 succeeds, we want to return the result of the original
++ * request */
++ pReq->Status = GET_BD_RSV_ORIG_STATUS(pReq);
++ DBG_PRINT(SDIODBG_REQUESTS,
++ ("SDIO Bus Driver: PrepCMD12Completion original status %d \n",pReq->Status));
++ }
++ /* call original completion routine */
++ pOrigCompletion(pReq);
++
++ DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: CMD12Completion \n"));
++}
++
++/* CMD12 preparation */
++static void PrepCMD12Barrier(PSDREQUEST pReq)
++{
++
++ SDIO_STATUS status = pReq->Status;
++ PSDHCD pHcd = GET_BD_RSV_HCD(pReq);
++ PSDEQUEST_COMPLETION pOrigCompletion = GET_BD_RSV_REQUEST_COMPLETION(pReq);
++
++ DBG_ASSERT(pHcd != NULL);
++ DBG_ASSERT(pOrigCompletion != NULL);
++
++ DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: PrepCMD12Barrier \n"));
++
++ if (SDIO_SUCCESS(status) || /* only issue CMD12 on success or specific bus errors */
++ (SDIO_STATUS_BUS_READ_TIMEOUT == status) ||
++ (SDIO_STATUS_BUS_READ_CRC_ERR == status) ||
++ (SDIO_STATUS_BUS_WRITE_ERROR == status)) {
++ if (!CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
++ if (!ForceAllRequestsAsync()) {
++ /* clear the call bit as an optimization, note clearing it wholesale here will
++ * allow request processing to recurse one more level */
++ AtomicTest_Clear(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT);
++ }
++ }
++ /* re-use the request for CMD12 */
++ pReq->Command = CMD12;
++ pReq->Argument = 0;
++
++ /* if the data transfer was successful, check for transfer check */
++ if (SDIO_SUCCESS(status) &&
++ (pReq->Flags & SDREQ_FLAGS_AUTO_TRANSFER_STATUS)) {
++ /* original data request requires a transfer status check, which is another
++ * barrier request */
++ pReq->Flags = SDREQ_FLAGS_RESP_R1B | SDREQ_FLAGS_QUEUE_HEAD | SDREQ_FLAGS_BARRIER |
++ SDREQ_FLAGS_TRANS_ASYNC;
++ DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: PrepCMD12Barrier , chaining CMD13 \n"));
++ /* switch out completion to send the CMD13 next */
++ pReq->pCompletion = PrepCMD13Barrier;
++ } else {
++ pReq->Flags = SDREQ_FLAGS_RESP_R1B | SDREQ_FLAGS_QUEUE_HEAD | SDREQ_FLAGS_TRANS_ASYNC;
++ pReq->pCompletion = CMD12Completion;
++ }
++
++ /* save the original data transfer request status */
++ SET_BD_RSV_ORIG_STATUS(pReq,status);
++ /* re-issue it, we can call IssueRequest here since we are re-using the request */
++ IssueRequestToHCD(pHcd, pReq);
++ } else {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Request Failure (%d) , CMD12 bypassed.\n",status));
++ /* call the original completion routine */
++ pOrigCompletion(pReq);
++ }
++
++ DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: PrepCMD12Barrier (%d) \n",status));
++}
++
++
++/* CMD55 barrier - this is a special barrier completion routine, we have to submit the second
++ * part of the command command sequence atomically */
++static void CMD55CompletionBarrier(PSDREQUEST pReq)
++{
++ SDIO_STATUS status = pReq->Status;
++ PSDREQUEST pOrigReq = GET_BD_RSV_ORIG_REQ(pReq);
++ PSDHCD pHcd = GET_BD_RSV_HCD(pReq);
++ BOOL doCompletion = FALSE;
++
++ DBG_ASSERT(pOrigReq != NULL);
++ DBG_ASSERT(pHcd != NULL);
++
++ DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: CMD55Completion \n"));
++
++ do {
++
++ if (!SDIO_SUCCESS(status)) {
++ /* command 55 failed */
++ pOrigReq->Status = status;
++ doCompletion = TRUE;
++ break;
++ }
++
++ if (!(SD_R1_GET_CARD_STATUS(pReq->Response) & SD_CS_APP_CMD)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Card is not accepting CMD55, status:0x%X \n",
++ SD_R1_GET_CARD_STATUS(pReq->Response)));
++ pOrigReq->Status = SDIO_STATUS_INVALID_COMMAND;
++ doCompletion = TRUE;
++ break;
++ }
++
++ if (!CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
++ if (!ForceAllRequestsAsync()) {
++ AtomicTest_Clear(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT);
++ }
++ }
++
++ /* flag the original request to queue to the head */
++ pOrigReq->Flags |= SDREQ_FLAGS_QUEUE_HEAD;
++ /* submit original request, we cannot call IssueRequestHCD() here because the
++ * original request has already gone through IssueRequestHCD() already */
++ status = StartHcdRequest(pHcd, pOrigReq);
++
++ if (SDIO_STATUS_PENDING == status) {
++ break;
++ }
++
++ pOrigReq->Status = status;
++
++ if (SDIO_STATUS_SDREQ_QUEUE_FAILED == status) {
++ /* never made it to the queue */
++ doCompletion = TRUE;
++ break;
++ }
++
++ /* request completed in-line */
++ _SDIO_HandleHcdEvent(pHcd, EVENT_HCD_TRANSFER_DONE);
++
++ } while (FALSE);
++
++ if (doCompletion) {
++ DoRequestCompletion(pOrigReq, pHcd);
++ }
++
++ /* free the CMD55 request */
++ FreeRequest(pReq);
++
++ DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: CMD55Completion \n"));
++}
++
++
++/* synch completion routine */
++static void SynchCompletion(PSDREQUEST pRequest)
++{
++ PSIGNAL_ITEM pSignal;
++
++ pSignal = (PSIGNAL_ITEM)pRequest->pCompleteContext;
++ DBG_ASSERT(pSignal != NULL);
++ if (!SDIO_SUCCESS(SignalSet(&pSignal->Signal))) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: SynchCompletion - signal failed \n"));
++ }
++
++}
++
++/*
++ * Issue a request to the host controller
++ *
++ *
++ * The following flags are handled internally by the bus driver to guarantee atomicity.
++ *
++ * SDREQ_FLAGS_APP_CMD - SD Extended commands requiring CMD55 to precede the actual command
++ * SDREQ_FLAGS_AUTO_CMD12 - Memory Card Data transfer needs CMD12 to stop transfer
++ * (multi-block reads/writes)
++ * SDREQ_FLAGS_AUTO_TRANSFER_STATUS - Memory card data transfer needs transfer status polling
++ * using CMD13
++ *
++ * These request flags require additional commands prepended or appended to the original command
++ *
++ * The order of command execution :
++ *
++ * Order Condition Command Issued
++ * -------------------------------------------------------------
++ * 1. If APP_CMD CMD55 issued.
++ * 2. Always Caller command issued.
++ * 3. If AUTO_CMD12 CMD12 issued.
++ * 4. If AUTO_TRANSFER_STATUS CMD13 issued until card programming is complete
++*/
++SDIO_STATUS IssueRequestToHCD(PSDHCD pHcd, PSDREQUEST pReq)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ PSIGNAL_ITEM pSignal = NULL;
++ BOOL handleFailedReqSubmit = FALSE;
++
++ CLEAR_INTERNAL_REQ_FLAGS(pReq);
++
++ do {
++ /* mark request in-use */
++ ATOMIC_FLAGS internal = AtomicTest_Set(&pReq->InternalFlags, SDBD_PENDING);
++ if (internal & (1<<SDBD_PENDING)) {
++ DBG_ASSERT_WITH_MSG(FALSE,
++ "SDIO Bus Driver: IssueRequestToHCD - request already in use \n");
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Request already in use: 0x%X",(INT)pReq));
++ }
++
++ if (!(pReq->Flags & SDREQ_FLAGS_TRANS_ASYNC)) {
++ /* caller wants synchronous operation, insert our completion routine */
++ pReq->pCompletion = SynchCompletion;
++ pSignal = AllocateSignal();
++ if (NULL == pSignal) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ pReq->Status = SDIO_STATUS_NO_RESOURCES;
++ handleFailedReqSubmit = TRUE;
++ /* no need to continue */
++ break;
++ }
++ pReq->pCompleteContext = (PVOID)pSignal;
++ }
++
++ if ((pReq->Flags & SDREQ_FLAGS_AUTO_CMD12) &&
++ !(pHcd->Attributes & SDHCD_ATTRIB_AUTO_CMD12) &&
++ !(IS_HCD_BUS_MODE_SPI(pHcd) && IS_SDREQ_WRITE_DATA(pReq->Flags))) {
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Auto CMD12 on Request:0x%08X \n",(INT)pReq));
++ /* caller wants CMD12 auto-issued and the HCD does not support it */
++ /* setup caller's request as a barrier and replace their completion routine */
++ pReq->Flags |= SDREQ_FLAGS_BARRIER;
++ /* take off the flag, since the BD will be issuing it */
++ pReq->Flags &= ~SDREQ_FLAGS_AUTO_CMD12;
++ /* save original completion */
++ SET_BD_RSV_REQUEST_COMPLETION(pReq,pReq->pCompletion);
++ /* save the HCD we are on */
++ SET_BD_RSV_HCD(pReq,pHcd);
++ /* use completion for preping CMD12 */
++ pReq->pCompletion = PrepCMD12Barrier;
++ }
++
++ if (pReq->Flags & SDREQ_FLAGS_AUTO_TRANSFER_STATUS) {
++ /* caller wants transfer status checked. If a CMD12
++ * barrier request has been setup we let the CMD12 completion take care
++ * of setting up the transfer check */
++ if (pReq->pCompletion != PrepCMD12Barrier) {
++ /* make CMD13 prep a barrier */
++ pReq->Flags |= SDREQ_FLAGS_BARRIER;
++ /* save original completion */
++ SET_BD_RSV_REQUEST_COMPLETION(pReq,pReq->pCompletion);
++ /* save the HCD we are on */
++ SET_BD_RSV_HCD(pReq,pHcd);
++ /* use completion for preping CMD13 */
++ pReq->pCompletion = PrepCMD13Barrier;
++ }
++ }
++
++ /* check app command, the two command sequence must be handled atomically */
++ if (pReq->Flags & SDREQ_FLAGS_APP_CMD) {
++ PSDREQUEST pCmd55;
++ /* allocate request to handle initial CMD55 command */
++ pCmd55 = AllocateRequest();
++ if (NULL == pCmd55) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ pReq->Status = SDIO_STATUS_NO_RESOURCES;
++ /* complete the caller's request with error */
++ handleFailedReqSubmit = TRUE;
++ /* no need to continue */
++ break;
++ }
++ /* first submit CMD55 */
++ /* set RCA */
++ pCmd55->Argument = pHcd->CardProperties.RCA << 16;
++ /* mark as a barrier request */
++ pCmd55->Flags = SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_BARRIER | SDREQ_FLAGS_TRANS_ASYNC;
++ pCmd55->Command = CMD55;
++ /* call our barrier completion routine when done */
++ pCmd55->pCompletion = CMD55CompletionBarrier;
++ /* save request and target HCD */
++ SET_BD_RSV_ORIG_REQ(pCmd55,pReq);
++ SET_BD_RSV_HCD(pCmd55,pHcd);
++ /* recursively start the CMD55 request, since the CMD55 is a barrier
++ * request, it's completion routine will submit the actual request
++ * atomically */
++ status = IssueRequestToHCD(pHcd, pCmd55);
++
++ } else {
++ /* start the normal request */
++ status = StartHcdRequest(pHcd,pReq);
++ }
++
++
++ if (SDIO_STATUS_SDREQ_QUEUE_FAILED == status) {
++ handleFailedReqSubmit = TRUE;
++ /* no need to continue, clean up at the end */
++ break;
++ }
++
++ /* at this point, the request was either queued or was processed by the
++ * HCD */
++
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: HCD returned status:%d on request: 0x%X, (CMD:%d) \n",
++ status, (INT)pReq, pReq->Command));
++
++ if (status != SDIO_STATUS_PENDING) {
++ /* the HCD completed the request within the HCD request callback,
++ * check and see if this is a synchronous request */
++ if (pSignal != NULL) {
++ /* it was synchronous */
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Sync-Op signal wait bypassed \n"));
++ /* NULL out completion info, there's no need to
++ * signal the semaphore */
++ pReq->pCompletion = NULL;
++
++ } else {
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Async operation completed in-line \n"));
++ /* this was an async call, always return pending */
++ status = SDIO_STATUS_PENDING;
++ }
++ /* process this completed transfer on behalf of the HCD */
++ _SDIO_HandleHcdEvent(pHcd, EVENT_HCD_TRANSFER_DONE);
++
++ /* done processing */
++ break;
++ }
++ /* I/O is now pending, could be sync or async */
++ /* check for synch op */
++ if (pSignal != NULL) {
++ /* wait for completion */
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Sync-Op signal waiting....\n"));
++ /* this is not interruptable, as the HCD must complete it. */
++ status = SignalWait(&pSignal->Signal);
++ /* don't need the signal anymore */
++ FreeSignal(pSignal);
++ pSignal = NULL;
++
++ /* note: it is safe to touch pReq since we own
++ * the completion routine for synch transfers */
++
++ /* check signal wait status */
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO Bus Driver - IssueRequestToHCD: Synch transfer - signal wait failed, cancelling req 0X%X\n",
++ (UINT)pReq));
++ pReq->Status = SDIO_STATUS_CANCELED;
++ status = SDIO_STATUS_CANCELED;
++ break;
++ }
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Sync-Op woke up\n"));
++ /* return the completion status of the request */
++ status = pReq->Status;
++ } else {
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Async operation Pending \n"));
++ }
++
++ } while (FALSE);
++
++ /* see if we need to clean up failed submissions */
++ if (handleFailedReqSubmit) {
++ /* make sure this is cleared */
++ AtomicTest_Clear(&pReq->InternalFlags, SDBD_PENDING);
++ /* the request processing failed before it was submitted to the HCD */
++ /* note: since it never made it to the queue we can touch pReq */
++ if (pReq->Flags & SDREQ_FLAGS_TRANS_ASYNC) {
++ /* for ASYNC requests, we need to call the completion routine */
++ DoRequestCompletion(pReq, pHcd);
++ /* return pending for all ASYNC requests */
++ status = SDIO_STATUS_PENDING;
++ }
++ }
++
++ /* check if we need to clean up the signal */
++ if (pSignal != NULL) {
++ /* make sure this is freed */
++ FreeSignal(pSignal);
++ }
++ /* return status */
++ return status;
++}
++
++/* documentation for configuration requests */
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Enable or Disable the SDIO Function
++
++ @function name: SDCONFIG_FUNC_ENABLE_DISABLE
++ @prototype: SDCONFIG_FUNC_ENABLE_DISABLE
++ @category: PD_Reference
++
++ @input: SDCONFIG_FUNC_ENABLE_DISABLE_DATA - Enable Data structure
++
++ @output: none
++
++ @return: SDIO Status
++
++ @notes: This command code is used in the SDLIB_IssueConfig() API. The command
++ uses the SDCONFIG_FUNC_ENABLE_DISABLE_DATA structure. The caller must set the
++ EnableFlags and specify the TimeOut value in milliseconds. The TimeOut
++ value is used for polling the I/O ready bit. This command returns a status
++ of SDIO_STATUS_FUNC_ENABLE_TIMEOUT if the ready bit was not set/cleared
++ by the card within the timeout period.
++
++ @example: Example of enabling an I/O function:
++ fData.EnableFlags = SDCONFIG_ENABLE_FUNC;
++ fData.TimeOut = 500;
++ status = SDLIB_IssueConfig(pInstance->pDevice,
++ SDCONFIG_FUNC_ENABLE_DISABLE,
++ &fData,
++ sizeof(fData));
++
++ @see also: SDLIB_IssueConfig
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Unmask the function's IRQ
++
++ @function name: SDCONFIG_FUNC_UNMASK_IRQ
++ @prototype: SDCONFIG_FUNC_UNMASK_IRQ
++ @category: PD_Reference
++
++ @input: none
++
++ @output: none
++
++ @return: SDIO Status
++
++ @notes: This command code is used in the SDLIB_IssueConfig() API. The command
++ unmasks the IRQ for the I/O function. This request sets the function's
++ interrupt enable bit in the INTENABLE register in the
++ common register space.
++
++ @example: Example of unmasking interrupt :
++ status = SDLIB_IssueConfig(pInstance->pDevice,
++ SDCONFIG_FUNC_UNMASK_IRQ,
++ NULL,
++ 0);
++
++ @see also: SDCONFIG_FUNC_MASK_IRQ
++ @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Mask the function's IRQ
++
++ @function name: SDCONFIG_FUNC_MASK_IRQ
++ @prototype: SDCONFIG_FUNC_MASK_IRQ
++ @category: PD_Reference
++
++ @input: none
++
++ @output: none
++
++ @return: SDIO Status
++
++ @notes: This command code is used in the SDLIB_IssueConfig() API. The command
++ masks the IRQ for the I/O function.
++
++ @example: Example of unmasking interrupt :
++ status = SDLIB_IssueConfig(pInstance->pDevice,
++ SDCONFIG_FUNC_MASK_IRQ,
++ NULL,
++ 0);
++
++ @see also: SDCONFIG_FUNC_UNMASK_IRQ
++ @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Acknowledge that the function's IRQ has been handled
++
++ @function name: SDCONFIG_FUNC_ACK_IRQ
++ @prototype: SDCONFIG_FUNC_ACK_IRQ
++ @category: PD_Reference
++
++ @input: none
++
++ @output: none
++
++ @return: SDIO Status
++
++ @notes: This command code is used in the SDLIB_IssueConfig() API. The command
++ indicates to the bus driver that the function driver has handled the
++ interrupt. The bus driver will notify the host controller to unmask the
++ interrupt source. SDIO interrupts are level triggered and are masked at the
++ host controller level until all function drivers have indicated that they
++ have handled their respective interrupt. This command can be issued in either
++ the IRQ handler or asynchronous IRQ handler.
++
++ @example: Example of acknowledging an interrupt :
++ status = SDLIB_IssueConfig(pInstance->pDevice,
++ SDCONFIG_FUNC_ACK_IRQ,
++ NULL,
++ 0);
++
++ @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Disable SD/MMC/SDIO card CRC checking.
++
++ @function name: SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC
++ @prototype: SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC
++ @category: PD_Reference
++
++ @input: none
++
++ @output: none
++
++ @return: SDIO Status
++
++ @notes: This command code is used in the SDLIB_IssueConfig() API. The command
++ issues CMD59 to disable SPI-CRC checking and requests the host controller
++ driver to stop checking the CRC. This is typically used in systems where
++ CRC checking is not required and performance is improved if the CRC checking
++ is ommitted (i.e. SPI implementations without hardware CRC support).
++
++ @example: Example of disabling SPI CRC checking:
++ status = SDLIB_IssueConfig(pInstance->pDevice,
++ SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC,
++ NULL,
++ 0);
++
++ @see also: SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC
++ @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Enable SD/MMC/SDIO card CRC checking.
++
++ @function name: SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC
++ @prototype: SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC
++ @category: PD_Reference
++
++ @input: none
++
++ @output: none
++
++ @return: SDIO Status
++
++ @notes: This command code is used in the SDLIB_IssueConfig() API. The command
++ issues CMD59 to enable SPI-CRC checking and requests the host controller
++ driver to generate valid CRCs for commands and data as well as
++ check the CRC in responses and incomming data blocks.
++
++ @example: Example of enabling SPI CRC checking:
++ status = SDLIB_IssueConfig(pInstance->pDevice,
++ SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC,
++ NULL,
++ 0);
++
++ @see also: SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC
++ @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Allocate slot current for a card function.
++
++ @function name: SDCONFIG_FUNC_ALLOC_SLOT_CURRENT
++ @prototype: SDCONFIG_FUNC_ALLOC_SLOT_CURRENT
++ @category: PD_Reference
++
++ @input: SDCONFIG_FUNC_SLOT_CURRENT_DATA
++
++ @output: SDCONFIG_FUNC_SLOT_CURRENT_DATA
++
++ @return: SDIO Status
++
++ @notes: This command code is used in the SDLIB_IssueConfig() API. The command
++ requests an allocation of slot current to satisfy the power requirements
++ of the function. The command uses the SDCONFIG_FUNC_SLOT_CURRENT_DATA
++ data structure to pass the required current in mA. Slot current allocation
++ is not cummulative and this command should only be issued once by each function
++ driver with the worse case slot current usage.
++ The command returns SDIO_STATUS_NO_RESOURCES if the
++ requirement cannot be met by the host hardware. The SlotCurrent field will
++ contain the remaining current available to the slot. The slot current should
++ be allocated before the function is enabled using SDCONFIG_FUNC_ENABLE_DISABLE.
++ When a function driver is unloaded it should free the slot current allocation
++ by using the SDCONFIG_FUNC_FREE_SLOT_CURRENT command.
++
++ @example: Example of allocating slot current:
++ slotCurrent.SlotCurrent = 150; // 150 mA
++ status = SDLIB_IssueConfig(pInstance->pDevice,
++ SDCONFIG_FUNC_ALLOC_SLOT_CURRENT,
++ &slotCurrent,
++ sizeof(slotCurrent));
++
++
++ @see also: SDCONFIG_FUNC_FREE_SLOT_CURRENT
++ @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Free slot current for a card function.
++
++ @function name: SDCONFIG_FUNC_FREE_SLOT_CURRENT
++ @prototype: SDCONFIG_FUNC_FREE_SLOT_CURRENT
++ @category: PD_Reference
++
++ @input: none
++
++ @output: none
++
++ @return: SDIO Status
++
++ @notes: This command code is used in the SDLIB_IssueConfig() API. The command
++ frees the allocated current for a card function. This command should be
++ issued only once (per function) and only after an allocation was successfully made.
++
++ @example: Example of freeing slot current:
++ status = SDLIB_IssueConfig(pInstance->pDevice,
++ SDCONFIG_FUNC_FREE_SLOT_CURRENT,
++ NULL,
++ 0);
++
++ @see also: SDCONFIG_FUNC_ALLOC_SLOT_CURRENT
++ @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Set the bus mode for the SD/SDIO card.
++
++ @function name: SDCONFIG_FUNC_CHANGE_BUS_MODE
++ @prototype: SDCONFIG_FUNC_CHANGE_BUS_MODE
++ @category: PD_Reference
++
++ @input: none
++
++ @output: none
++
++ @return: SDIO Status
++
++ @notes: This command code is used in the SDLIB_IssueConfig() API. The command
++ alters the card's bus mode (width and clock rate) to a driver specified
++ value. The driver must read the current bus mode flags, modify if necessary
++ and pass the value in the SDCONFIG_BUS_MODE_DATA structure.
++ If the bus width is changed (1 or 4 bit) the caller must adjust the mode flags
++ for the new width. Cards cannot be switched between 1/4 bit and SPI mode.
++ Switching to or from SPI mode requires a power cycle. Adjustments to the clock
++ rate is immediate on the next bus transaction. The actual clock rate value is
++ limited by the host controller and is reported in the ClockRate field when the
++ command completes successfully.
++ The bus mode change is card wide and may affect other SDIO functions on
++ multi-function cards. Use this feature with caution. This feature should NOT be
++ used to dynamically control clock rates during runtime and should only be used
++ at card initialization. Changing the bus mode must be done with SDIO function
++ interrupts masked.
++ This request can block and must only be called from a schedulable context.
++
++ @example: Example of changing the clock rate:
++ SDCONFIG_BUS_MODE_DATA busSettings;
++ ZERO_OBJECT(busSettings);
++ // get current bus flags and keep the same bus width
++ busSettings.BusModeFlags = SDDEVICE_GET_BUSMODE_FLAGS(pInstance->pDevice);
++ busSettings.ClockRate = 8000000; // adjust clock to 8 Mhz
++ // issue config request to override clock rate
++ status = SDLIB_IssueConfig(pInstance->pDevice,
++ SDCONFIG_FUNC_CHANGE_BUS_MODE,
++ &busSettings,
++ sizeof(SDCONFIG_BUS_MODE_DATA));
++
++ @see also: SDDEVICE_GET_BUSMODE_FLAGS
++ @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the debug level of the underlying host controller driver.
++
++ @function name: SDCONFIG_GET_HCD_DEBUG
++ @prototype: SDCONFIG_GET_HCD_DEBUG
++ @category: PD_Reference
++
++ @input: none
++
++ @output: CT_DEBUG_LEVEL
++
++ @return: SDIO Status
++
++ @notes: This command code is used in the SDLIB_IssueConfig() API. The command
++ requests the current debug level of the HCD driver. This API is useful for
++ saving the current debug level of the HCD prior to issuing SDCONFIG_SET_HCD_DEBUG
++ in order to increase the verbosity of the HCD. This API should be used only for
++ debugging purposes. If multiple functions attempt to save and set the HCD debug
++ level simultanously, the final debug level will be unknown. Not all HCDs support
++ this command.
++
++ @example: Example of saving the debug level:
++ CT_DEBUG_LEVEL savedDebug;
++ status = SDLIB_IssueConfig(pInstance->pDevice,
++ SDCONFIG_GET_HCD_DEBUG,
++ &savedDebug,
++ sizeof(savedDebug));
++
++ @see also: SDCONFIG_SET_HCD_DEBUG
++ @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Set the debug level of the underlying host controller driver.
++
++ @function name: SDCONFIG_SET_HCD_DEBUG
++ @prototype: SDCONFIG_SET_HCD_DEBUG
++ @category: PD_Reference
++
++ @input: CT_DEBUG_LEVEL
++
++ @output: none
++
++ @return: SDIO Status
++
++ @notes: This command code is used in the SDLIB_IssueConfig() API. The command
++ sets the current debug level of the HCD driver. This API is useful for
++ setting the debug level of the HCD programatically for debugging purposes.
++ If multiple functions attempt to save and set the HCD debug
++ level simultanously, the final debug level will be unknown. Not all HCDs support
++ this request.
++
++ @example: Example of setting the debug level:
++ CT_DEBUG_LEVEL setDebug = 15;
++ status = SDLIB_IssueConfig(pInstance->pDevice,
++ SDCONFIG_GET_HCD_DEBUG,
++ &setDebug,
++ sizeof(setDebug));
++
++ @see also: SDCONFIG_GET_HCD_DEBUG
++ @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Instruct the bus driver to not check the SDIO card interrupt pending
++ register on card interrupts, if possible.
++
++ @function name: SDCONFIG_FUNC_NO_IRQ_PEND_CHECK
++ @prototype: SDCONFIG_FUNC_NO_IRQ_PEND_CHECK
++ @category: PD_Reference
++
++ @input: none
++
++ @output: none
++
++ @return: SDIO Status
++
++ @notes: This command code is used in the SDLIB_IssueConfig() API. The command instructs the
++ bus driver to skip checking the card interrupt pending register on each card
++ interrupt. The bus driver will assume the function is interrupting and immediately start
++ the interrupt processing stage. This option is only valid for single function cards.
++ The bus driver will reject the command for a card with more than 1 function.
++ For single function cards, this can improve interrupt response time.
++
++ @example: Example of skipping IRQ pending checks:
++
++ status = SDLIB_IssueConfig(pInstance->pDevice,
++ SDCONFIG_FUNC_NO_IRQ_PEND_CHECK,
++ NULL,
++ 0);
++
++ @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
+Index: linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus_events.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus_events.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,1040 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: sdio_bus_events.c
++
++@abstract: OS independent bus driver support
++
++#notes: this file contains various event handlers and helpers
++
++@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define MODULE_NAME SDBUSDRIVER
++#include <linux/sdio/ctsystem.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/sdio_lib.h>
++#include "_busdriver.h"
++#include <linux/sdio/_sdio_defs.h>
++#include <linux/sdio/mmc_defs.h>
++
++static SDIO_STATUS ScanSlotForCard(PSDHCD pHcd,
++ PBOOL pCardPresent);
++static void GetPendingIrqComplete(PSDREQUEST pReq);
++static void ProcessPendingIrqs(PSDHCD pHcd, UINT8 IntPendingMsk);
++
++/*
++ * DeviceDetach - tell core a device was removed from a slot
++*/
++SDIO_STATUS DeviceDetach(PSDHCD pHcd)
++{
++ SDCONFIG_SDIO_INT_CTRL_DATA irqData;
++
++ ZERO_OBJECT(irqData);
++
++ DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: DeviceDetach\n"));
++ /* tell any function drivers we are gone */
++ RemoveHcdFunctions(pHcd);
++ /* delete the devices associated with this HCD */
++ DeleteDevices(pHcd);
++ /* check and see if there are any IRQs that were left enabled */
++ if (pHcd->IrqsEnabled) {
++ irqData.SlotIRQEnable = FALSE;
++ /* turn off IRQ detection in HCD */
++ _IssueConfig(pHcd,SDCONFIG_SDIO_INT_CTRL,(PVOID)&irqData, sizeof(irqData));
++ }
++
++ /* reset hcd state */
++ ResetHcdState(pHcd);
++
++ DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: DeviceDetach\n"));
++ return SDIO_STATUS_SUCCESS;
++}
++
++/*
++ * DeviceAttach - tell core a device was inserted into a slot
++*/
++SDIO_STATUS DeviceAttach(PSDHCD pHcd)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ PSDDEVICE pDevice = NULL;
++ UINT ii;
++
++
++ if (IS_CARD_PRESENT(pHcd)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: DeviceAttach called on occupied slot!\n"));
++ return SDIO_STATUS_ERROR;
++ }
++
++ DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: DeviceAttach bdctxt:0x%X \n", (UINT32)pBusContext));
++
++ if (IS_HCD_RAW(pHcd)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: RAW HCD (%s) device attach \n",pHcd->pName));
++ /* this is a raw HCD */
++ memset(&pHcd->CardProperties,0,sizeof(pHcd->CardProperties));
++ pHcd->CardProperties.Flags = CARD_RAW;
++ pHcd->CardProperties.IOFnCount = 0;
++ /* for raw HCD, set up minimum parameters
++ * since we cannot determine these values using any standard, use values
++ * reported by the HCD */
++ /* the operational rate is just the max clock rate reported */
++ pHcd->CardProperties.OperBusClock = pHcd->MaxClockRate;
++ /* the max bytes per data transfer is just the max bytes per block */
++ pHcd->CardProperties.OperBlockLenLimit = pHcd->MaxBytesPerBlock;
++ /* if the raw HCD uses blocks to transfer, report the operational size
++ * from the HCD max value */
++ pHcd->CardProperties.OperBlockCountLimit = pHcd->MaxBlocksPerTrans;
++ /* set the slot preferred voltage */
++ pHcd->CardProperties.CardVoltage = pHcd->SlotVoltagePreferred;
++ } else {
++ /* initialize this card and get card properties */
++ if (!SDIO_SUCCESS((status = SDInitializeCard(pHcd)))) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: DeviceAttach, failed to initialize card, %d\n",
++ status));
++ return status;
++ }
++ }
++
++ /* check for SD or MMC, this must be done first as the query may involve
++ * de-selecting the card */
++ do {
++ if (!(pHcd->CardProperties.Flags & (CARD_MMC | CARD_SD | CARD_RAW))) {
++ /* none of these were discovered */
++ break;
++ }
++ pDevice = AllocateDevice(pHcd);
++ if (NULL == pDevice) {
++ break;
++ }
++ if (pHcd->CardProperties.Flags & CARD_RAW) {
++ /* set function number to 1 for IRQ processing */
++ SDDEVICE_SET_SDIO_FUNCNO(pDevice,1);
++ } else {
++ /* get the ID info for the SD/MMC Card */
++ if (!SDIO_SUCCESS((status = SDQuerySDMMCInfo(pDevice)))) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: DeviceAttach, query SDMMC Info failed \n"));
++ FreeDevice(pDevice);
++ break;
++ }
++ }
++ AddDeviceToList(pDevice);
++ /* look for a function driver to handle this card */
++ ProbeForFunction(pDevice, pHcd);
++ } while (FALSE);
++
++ /* create a device for each I/O function */
++ for(ii= 1; ii <= pHcd->CardProperties.IOFnCount; ii++) {
++ pDevice = AllocateDevice(pHcd);
++ if (NULL == pDevice) {
++ break;
++ }
++ /* set the function number */
++ SDDEVICE_SET_SDIO_FUNCNO(pDevice,ii);
++ /* get the ID info for each I/O function */
++ if (!SDIO_SUCCESS((status = SDQuerySDIOInfo(pDevice)))) {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: DeviceAttach, could not query SDIO Info, funcNo:%d status:%d \n",
++ ii, status));
++ FreeDevice(pDevice);
++ /* keep loading other functions */
++ continue;
++ }
++ AddDeviceToList(pDevice);
++ /* look for a function driver to handle this card */
++ ProbeForFunction(pDevice, pHcd);
++ }
++
++
++ DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: DeviceAttach \n"));
++ return status;
++}
++
++static INLINE void CompleteRequestCheckCancel(PSDHCD pHcd, PSDREQUEST pReqToComplete)
++{
++ BOOL cancel = FALSE;
++ PSDFUNCTION pFunc = NULL;
++
++ /* handle cancel of current request */
++ if (pReqToComplete->Flags & SDREQ_FLAGS_CANCELED) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - _SDIO_HandleHcdEvent: cancelling req 0X%X\n", (UINT)pReqToComplete));
++ cancel = TRUE;
++ pReqToComplete->Status = SDIO_STATUS_CANCELED;
++ pFunc = pReqToComplete->pFunction;
++ DBG_ASSERT(pFunc != NULL);
++ }
++
++ DoRequestCompletion(pReqToComplete, pHcd);
++
++ if (cancel) {
++ SignalSet(&pFunc->CleanupReqSig);
++ }
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Indicate to the SDIO bus driver (core) of an event in the host controller
++ driver.
++
++ @function name: SDIO_HandleHcdEvent
++ @prototype: SDIO_STATUS SDIO_HandleHcdEvent(PSDHCD pHcd, HCD_EVENT Event)
++ @category: HD_Reference
++
++ @input: pHcd - the host controller structure that was registered
++ HCD_EVENT - event code
++
++ @output: none
++
++ @return: SDIO_STATUS
++
++ @notes:
++ The host controller driver can indicate asynchronous events by calling this
++ function with an appropriate event code. Refer to the HDK help manual for
++ more information on the event types
++
++ @example: Example of indicating a card insertion event:
++ SDIO_HandleHcdEvent(&Hcd, EVENT_HCD_ATTACH);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDIO_HandleHcdEvent(PSDHCD pHcd, HCD_EVENT Event)
++{
++ PSDREQUEST pReq;
++ PSDREQUEST pReqToComplete = NULL;
++ PSDREQUEST pNextReq = NULL;
++ SDIO_STATUS status;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ DBG_PRINT(SDIODBG_HCD_EVENTS, ("SDIO Bus Driver: _SDIO_HandleHcdEvent, event type 0x%X, HCD:0x%X\n",
++ Event, (UINT)pHcd));
++
++ if (Event == EVENT_HCD_TRANSFER_DONE) {
++ pReq = GET_CURRENT_REQUEST(pHcd);
++ if (NULL == pReq) {
++ DBG_ASSERT(FALSE);
++ return SDIO_STATUS_ERROR;
++ }
++
++ status = _AcquireHcdLock(pHcd);
++ if (SDIO_SUCCESS(status)) {
++ /* null out the current request */
++ SET_CURRENT_REQUEST(pHcd, NULL);
++ status = _ReleaseHcdLock(pHcd);
++ } else {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: SDIO_HandleHcdEvent Failed to acquire HCD lock \n"));
++ return SDIO_STATUS_ERROR;
++ }
++
++ /* note: the queue is still marked busy to prevent other threads/tasks from starting
++ * new requests while we are handling completion , some completed requests are
++ * marked as barrier requests which must be handled atomically */
++
++ status = pReq->Status;
++ DBG_PRINT(SDIODBG_REQUESTS,
++ ("+SDIO Bus Driver: Handling Transfer Done (CMD:%d, Status:%d) from HCD:0x%08X \n",
++ pReq->Command, status, (INT)pHcd));
++ /* check SPI mode conversion */
++ if (IS_HCD_BUS_MODE_SPI(pHcd) && SDIO_SUCCESS(status)) {
++ if (!(pReq->Flags & SDREQ_FLAGS_RESP_SKIP_SPI_FILT) && !(pReq->Flags & SDREQ_FLAGS_PSEUDO) &&
++ (GET_SDREQ_RESP_TYPE(pReq->Flags) != SDREQ_FLAGS_NO_RESP)) {
++ ConvertSPI_Response(pReq, NULL);
++ }
++ }
++
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Completing Request:0x%08X \n",(INT)pReq));
++
++ if (!SDIO_SUCCESS(status) &&
++ (status != SDIO_STATUS_CANCELED) &&
++ !(pReq->Flags & SDREQ_FLAGS_CANCELED) &&
++ (pReq->RetryCount > 0)) {
++ /* retry the request if it failed, was NOT cancelled and the retry count
++ * is greater than zero */
++ pReq->RetryCount--;
++ pReqToComplete = NULL;
++ /* clear SPI converted flag */
++ pReq->Flags &= ~SDREQ_FLAGS_RESP_SPI_CONVERTED;
++ pNextReq = pReq;
++ } else {
++ /* complete the request */
++ if (pReq->Flags & SDREQ_FLAGS_BARRIER) {
++ /* a barrier request must be completed before the next bus request is
++ * started */
++ CompleteRequestCheckCancel(pHcd, pReq);
++ if (!ForceAllRequestsAsync()) {
++ if (CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
++ /* the request was completed, decrement recursion count */
++ status = _AcquireHcdLock(pHcd);
++ if (!SDIO_SUCCESS(status)) {
++ return status;
++ }
++ pHcd->Recursion--;
++ DBG_ASSERT(pHcd->Recursion >= 0);
++ status = _ReleaseHcdLock(pHcd);
++ } else {
++ /* reset bit */
++ AtomicTest_Clear(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT);
++ }
++ }
++ pReqToComplete = NULL;
++ } else {
++ /* complete this after the next request has
++ * been started */
++ pReqToComplete = pReq;
++ }
++ }
++
++ /* acquire the hcd lock to look at the queues */
++ status = _AcquireHcdLock(pHcd);
++ if (SDIO_SUCCESS(status)) {
++ if (pReqToComplete != NULL) {
++ /* queue the request that was completed */
++ QueueRequest(&pHcd->CompletedRequestQueue, pReqToComplete);
++ }
++ if (NULL == pNextReq) {
++ /* check the queue for the next request */
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Checking queue.. \n"));
++ /* check to see if the HCD was already working on one. This occurs if
++ * the current request being completed was a barrier request and the
++ * barrier completion routine submitted a new request to the head of the
++ * queue */
++ if (GET_CURRENT_REQUEST(pHcd) == NULL) {
++ pNextReq = DequeueRequest(&pHcd->RequestQueue);
++ if (NULL == pNextReq) {
++ /* nothing in the queue, mark it not busy */
++ MarkQueueNotBusy(&pHcd->RequestQueue);
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Queue idle \n"));
++ } else {
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Next request in queue: 0x%X \n",
++ (INT)pNextReq));
++ }
++ } else {
++ DBG_PRINT(SDIODBG_REQUESTS,
++ ("SDIO Bus Driver: Busy Queue from barrier request \n"));
++ }
++ }
++
++ if (pNextReq != NULL) {
++ /* a new request will be submitted to the HCD below,
++ * check recursion while we have the lock */
++ if (CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
++ CHECK_HCD_RECURSE(pHcd,pNextReq);
++ }
++ }
++ status = _ReleaseHcdLock(pHcd);
++ } else {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: SDIO_HandleHcdEvent Failed to acquire HCD lock \n"));
++ return SDIO_STATUS_ERROR;
++ }
++ /* check for the next request to issue */
++ if (pNextReq != NULL) {
++ DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Starting Next Request: 0x%X \n",
++ (INT)pNextReq));
++ SET_CURRENT_REQUEST(pHcd,pNextReq);
++ status = CallHcdRequest(pHcd);
++ /* check and see if the HCD completed the request in the callback */
++ if (status != SDIO_STATUS_PENDING) {
++ /* recurse and process the request */
++ _SDIO_HandleHcdEvent(pHcd, EVENT_HCD_TRANSFER_DONE);
++ }
++ }
++
++ /* now empty the completed request queue
++ * - this guarantees in-order completion even during recursion */
++ status = _AcquireHcdLock(pHcd);
++ if (SDIO_SUCCESS(status)) {
++ while (1) {
++ pReqToComplete = DequeueRequest(&pHcd->CompletedRequestQueue);
++ status = _ReleaseHcdLock(pHcd);
++ if (pReqToComplete != NULL) {
++ CompleteRequestCheckCancel(pHcd, pReqToComplete);
++ if (!CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
++ if (!ForceAllRequestsAsync()) {
++ /* reset bit */
++ AtomicTest_Clear(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT);
++ }
++ }
++ /* re-acquire lock */
++ status = _AcquireHcdLock(pHcd);
++ if (!SDIO_SUCCESS(status)) {
++ return SDIO_STATUS_ERROR;
++ }
++ if (CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
++ if (!ForceAllRequestsAsync()) {
++ /* while we have the lock, decrement recursion count each time
++ * we complete a request */
++ pHcd->Recursion--;
++ DBG_ASSERT(pHcd->Recursion >= 0);
++ }
++ }
++ } else {
++ /* we're done */
++ break;
++ }
++ }
++ } else {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: SDIO_HandleHcdEvent Failed to acquire HCD lock \n"));
++ return SDIO_STATUS_ERROR;
++ }
++ DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: Transfer Done Handled \n"));
++ return SDIO_STATUS_SUCCESS;
++ }
++
++ switch(Event) {
++ case EVENT_HCD_ATTACH:
++ case EVENT_HCD_DETACH:
++ /* card detect helper does the actual attach detach */
++ return PostCardDetectEvent(pBusContext,Event,pHcd);
++ case EVENT_HCD_SDIO_IRQ_PENDING:
++ return DeviceInterrupt(pHcd);
++ default:
++ DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: SDIO_HandleHcdEvent, invalid event type 0x%X, HCD:0x%X\n",
++ Event, (UINT)pHcd));
++ return SDIO_STATUS_INVALID_PARAMETER;
++ }
++
++}
++
++/* card detect helper function */
++THREAD_RETURN CardDetectHelperFunction(POSKERNEL_HELPER pHelper)
++{
++ SDIO_STATUS status;
++ HCD_EVENT_MESSAGE message;
++ INT length;
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - CardDetectHelperFunction starting up: 0x%X \n", (INT)pHelper));
++
++ while (1) {
++
++ /* wait for wake up event */
++ status = SD_WAIT_FOR_WAKEUP(pHelper);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver - Card Detect Helper Semaphore Pend Error:%d \n",
++ status));
++ break;
++ }
++
++ if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
++ /* cleanup message queue on shutdown */
++ while (1) {
++ length = sizeof(message);
++ /* get a message */
++ status = SDLIB_GetMessage(pBusContext->pCardDetectMsgQueue,
++ &message, &length);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ if (message.pHcd != NULL) {
++ /* decrement HCD reference count */
++ OS_DecHcdReference(message.pHcd);
++ }
++ }
++
++ break;
++ }
++
++ while (1) {
++ length = sizeof(message);
++ /* get a message */
++ status = SDLIB_GetMessage(pBusContext->pCardDetectMsgQueue,
++ &message, &length);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++
++ switch (message.Event) {
++ case EVENT_HCD_ATTACH:
++ DeviceAttach(message.pHcd);
++ break;
++ case EVENT_HCD_DETACH:
++ DeviceDetach(message.pHcd);
++ break;
++ case EVENT_HCD_CD_POLLING:
++ /* run detector */
++ RunCardDetect();
++ break;
++ default:
++ DBG_ASSERT(FALSE);
++ break;
++ }
++
++ if (message.pHcd != NULL) {
++ /* message was processed, decrement reference count */
++ OS_DecHcdReference(message.pHcd);
++ }
++ }
++ }
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - Card Detect Helper Exiting.. \n"));
++ return 0;
++}
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ RunCardDetect - run card detect on host controller slots that require polling
++ Input:
++ Output:
++ Return:
++ Notes: This function is called from the card detect timer thread
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void RunCardDetect(void)
++{
++ BOOL CDPollingRequired = FALSE;
++ PSDLIST pListItem;
++ PSDHCD pHcd;
++ BOOL cardPresent;
++
++ DBG_PRINT(SDIODBG_CD_TIMER, ("+SDIO Bus Driver: RunCardDetect\n"));
++
++ /* protect the HCD list */
++ if (!SDIO_SUCCESS(SemaphorePendInterruptable(&pBusContext->HcdListSem))) {
++ DBG_ASSERT(FALSE);
++ return; /* wait interrupted */
++ }
++ /* while we are running the detector we are blocking HCD removal*/
++ SDITERATE_OVER_LIST(&pBusContext->HcdList, pListItem) {
++ pHcd = CONTAINING_STRUCT(pListItem, SDHCD, SDList);
++ /* does the HCD require polling ? */
++ if (pHcd->Attributes & SDHCD_ATTRIB_SLOT_POLLING) {
++ DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO Bus Driver: Found HCD requiring polling \n"));
++ /* set flag to queue the timer */
++ CDPollingRequired = TRUE;
++ if (IS_CARD_PRESENT(pHcd)) {
++ /* there is a device in the slot */
++ cardPresent = TRUE;
++ if (SDIO_SUCCESS(ScanSlotForCard(pHcd,&cardPresent))) {
++ if (!cardPresent) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver CD Polling.. Card Removal Detected\n"));
++ DeviceDetach(pHcd);
++ }
++ }
++ } else {
++ cardPresent = FALSE;
++ if (SDIO_SUCCESS(ScanSlotForCard(pHcd,&cardPresent))) {
++ if (cardPresent) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver CD Polling.. Card Detected\n"));
++ DeviceAttach(pHcd);
++ }
++ }
++ }
++ }
++
++ DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO Bus Driver: moving to next hcd:0x%X \n",
++ (INT)pListItem->pNext));
++ }
++
++ /* check if we need to queue the timer */
++ if (CDPollingRequired && !pBusContext->CDTimerQueued) {
++ pBusContext->CDTimerQueued = TRUE;
++ DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO Bus Driver: Queuing Card detect timer \n"));
++ if (!SDIO_SUCCESS(
++ QueueTimer(SDIOBUS_CD_TIMER_ID, pBusContext->CDPollingInterval))) {
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: failed to queue CD timer \n"));
++ pBusContext->CDTimerQueued = FALSE;
++ }
++ }
++ /* release HCD list lock */
++ SemaphorePost(&pBusContext->HcdListSem);
++ DBG_PRINT(SDIODBG_CD_TIMER, ("-SDIO Bus Driver: RunCardDetect\n"));
++}
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ ScanSlotForCard - scan slot for a card
++ Input: pHcd - the hcd
++ Output: pCardPresent - card present flag (set/cleared on return)
++ Return:
++ Notes:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static SDIO_STATUS ScanSlotForCard(PSDHCD pHcd,PBOOL pCardPresent)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ UINT8 temp;
++
++ DBG_PRINT(SDIODBG_CD_TIMER, ("+SDIO Bus Driver: ScanSlotForCard\n"));
++
++ do {
++ if (!IS_CARD_PRESENT(pHcd)) {
++ INT dbgLvl;
++ dbgLvl = DBG_GET_DEBUG_LEVEL();
++ DBG_SET_DEBUG_LEVEL(SDDBG_WARN);
++ status = CardInitSetup(pHcd);
++ DBG_SET_DEBUG_LEVEL(dbgLvl);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ /* issue go-idle */
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,NULL);
++ } else {
++ _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,NULL);
++ }
++ /* try SDIO */
++ status = TestPresence(pHcd,CARD_SDIO,NULL);
++ if (SDIO_SUCCESS(status)) {
++ *pCardPresent = TRUE;
++ break;
++ }
++ /* issue go-idle */
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,NULL);
++ } else {
++ _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,NULL);
++ }
++ /* try SD */
++ status = TestPresence(pHcd,CARD_SD,NULL);
++ if (SDIO_SUCCESS(status)) {
++ *pCardPresent = TRUE;
++ break;
++ }
++ /* issue go-idle */
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,NULL);
++ } else {
++ _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,NULL);
++ }
++ /* try MMC */
++ status = TestPresence(pHcd,CARD_MMC,NULL);
++ if (SDIO_SUCCESS(status)) {
++ *pCardPresent = TRUE;
++ break;
++ }
++ } else {
++ if (pHcd->CardProperties.Flags & CARD_SDIO) {
++#ifdef DUMP_INT_PENDING
++ temp = 0;
++ /* handy debug prints to check interrupt status and print pending register */
++ status = Cmd52ReadByteCommon(pHcd->pPseudoDev, SDIO_INT_ENABLE_REG, &temp);
++ if (SDIO_SUCCESS(status) && (temp != 0)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: INT Enable Reg: 0x%2.2X\n", temp));
++ status = Cmd52ReadByteCommon(pHcd->pPseudoDev, SDIO_INT_PENDING_REG, &temp);
++ if (SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: INT Pend Reg: 0x%2.2X\n", temp));
++ }
++ }
++#endif
++ /* for SDIO cards, read the revision register */
++ status = Cmd52ReadByteCommon(pHcd->pPseudoDev, CCCR_SDIO_REVISION_REG, &temp);
++ } else if (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC)) {
++ /* for SD/MMC cards, issue SEND_STATUS */
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ /* SPI uses the SPI R2 response */
++ status = _IssueSimpleBusRequest(pHcd,
++ CMD13,
++ 0,
++ SDREQ_FLAGS_RESP_R2,
++ NULL);
++ } else {
++ status = _IssueSimpleBusRequest(pHcd,
++ CMD13,
++ (pHcd->CardProperties.RCA << 16),
++ SDREQ_FLAGS_RESP_R1,NULL);
++ }
++ } else {
++ DBG_ASSERT(FALSE);
++ }
++ if (!SDIO_SUCCESS(status)) {
++ /* card is gone */
++ *pCardPresent = FALSE;
++ }
++ }
++ } while (FALSE);
++
++ if (status == SDIO_STATUS_BUS_RESP_TIMEOUT) {
++ status = SDIO_STATUS_SUCCESS;
++ }
++
++ DBG_PRINT(SDIODBG_CD_TIMER, ("-SDIO Bus Driver: ScanSlotForCard status:%d\n",
++ status));
++
++ return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ DeviceInterrupt - handle device interrupt
++ Input: pHcd - host controller
++ Output:
++ Return:
++ Notes:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS DeviceInterrupt(PSDHCD pHcd)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ SDIO_STATUS status2;
++ PSDREQUEST pReq = NULL;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("+SDIO Bus Driver: DeviceInterrupt\n"));
++
++ if (!IS_CARD_PRESENT(pHcd)) {
++ DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: Device interrupt asserted on empty slot!\n"));
++ return SDIO_STATUS_ERROR;
++ }
++
++ do {
++ /* for RAW HCDs or HCDs flagged for single-function IRQ optimization */
++ if (IS_HCD_RAW(pHcd) || (pHcd->HcdFlags & (1 << HCD_IRQ_NO_PEND_CHECK))) {
++ status = _AcquireHcdLock(pHcd);
++ if (!SDIO_SUCCESS(status)) {
++ return status;
++ }
++ if (pHcd->IrqProcState != SDHCD_IDLE) {
++ status = SDIO_STATUS_ERROR;
++ status2 = _ReleaseHcdLock(pHcd);
++ } else {
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver : Device Interrupt \n"));
++ /* mark that we are processing */
++ pHcd->IrqProcState = SDHCD_IRQ_PENDING;
++ status2 = _ReleaseHcdLock(pHcd);
++ /* process Irqs for raw hcds or HCDs with the single function optimization */
++ /* force processing of function 1 interrupt */
++ ProcessPendingIrqs(pHcd, (1 << 1));
++ }
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("-SDIO Bus Driver: DeviceInterrupt: %d\n", status));
++ /* done with RAW irqs */
++ return status;
++ }
++
++ /* pre-allocate a request to get the pending bits, we have to do this outside the
++ * hcd lock acquisition */
++ pReq = AllocateRequest();
++
++ if (NULL == pReq) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++
++ status = _AcquireHcdLock(pHcd);
++
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++
++ if (pHcd->IrqProcState != SDHCD_IDLE) {
++ status = SDIO_STATUS_ERROR;
++ } else {
++ /* mark that we are processing */
++ pHcd->IrqProcState = SDHCD_IRQ_PENDING;
++ /* build argument to read IRQ pending register */
++ SDIO_SET_CMD52_READ_ARG(pReq->Argument,0,SDIO_INT_PENDING_REG);
++ pReq->Command = CMD52;
++ pReq->Flags = SDREQ_FLAGS_TRANS_ASYNC | SDREQ_FLAGS_RESP_SDIO_R5;
++ pReq->pCompleteContext = (PVOID)pHcd;
++ pReq->pCompletion = GetPendingIrqComplete;
++ pReq->RetryCount = SDBUS_MAX_RETRY;
++ }
++
++ status2 = _ReleaseHcdLock(pHcd);
++
++ if (!SDIO_SUCCESS(status2)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: lock release error: %d\n", status2));
++ }
++
++ } while (FALSE);
++
++ if (SDIO_SUCCESS(status)) {
++ DBG_ASSERT(pReq != NULL);
++ IssueRequestToHCD(pHcd,pReq);
++ status = SDIO_STATUS_PENDING;
++ } else {
++ if (pReq != NULL) {
++ FreeRequest(pReq);
++ }
++ }
++
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("-SDIO Bus Driver: DeviceInterrupt: %d\n", status));
++ return status;
++}
++
++
++/* SDIO IRQ helper */
++THREAD_RETURN SDIOIrqHelperFunction(POSKERNEL_HELPER pHelper)
++{
++ PSDHCD pHcd;
++ SDIO_STATUS status;
++ PSDLIST pListItem;
++ PSDDEVICE pDevice;
++ UINT8 funcMask;
++ PSDDEVICE pDeviceIRQ[7];
++ UINT deviceIrqCount = 0;
++ UINT ii;
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - SDIOIrqHelperFunction starting up \n"));
++
++ pHcd = (PSDHCD)pHelper->pContext;
++ DBG_ASSERT(pHcd != NULL);
++
++ while (1) {
++
++ /* wait for wake up event */
++ status = SD_WAIT_FOR_WAKEUP(pHelper);
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver - SDIOIrqHelperFunction Pend Error:%d \n",
++ status));
++ break;
++ }
++
++ if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
++ break;
++ }
++
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver - Pending IRQs:0x%X \n",
++ pHcd->PendingHelperIrqs));
++
++ /* take the device list lock as we iterate through the list, this blocks
++ * device removals */
++ status = SemaphorePendInterruptable(&pBusContext->DeviceListSem);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ /* walk through the device list matching HCD and interrupting function */
++ SDITERATE_OVER_LIST(&pBusContext->DeviceList, pListItem) {
++ pDevice = CONTAINING_STRUCT(pListItem, SDDEVICE, SDList);
++ /* check if device belongs to the HCD */
++ if (pDevice->pHcd != pHcd){
++ /* not on this hcd */
++ continue;
++ }
++ funcMask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
++ /* check device function against the pending mask */
++ if (!(funcMask & pHcd->PendingHelperIrqs)) {
++ /* this one is not scheduled for the helper */
++ continue;
++ }
++ /* clear bit */
++ pHcd->PendingHelperIrqs &= ~funcMask;
++ /* check for sync IRQ and call handler */
++ if (pDevice->pIrqFunction != NULL) {
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: Calling IRQ Handler. Fn:%d\n",
++ SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
++ /* save the device so we can process it without holding any locks */
++ pDeviceIRQ[deviceIrqCount++] = pDevice;
++ } else {
++ /* this is actually okay if the device is removing, the callback
++ * is NULLed out */
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: No IRQ handler Fn:%d\n",
++ SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
++ }
++ }
++ /* should have handled all these */
++ DBG_ASSERT(pHcd->PendingHelperIrqs == 0);
++ pHcd->PendingHelperIrqs = 0;
++ SemaphorePost(&pBusContext->DeviceListSem);
++ for (ii = 0; ii < deviceIrqCount; ii++) {
++ /* now call the function */
++ SDDEVICE_CALL_IRQ_HANDLER(pDeviceIRQ[ii]);
++ }
++ deviceIrqCount = 0;
++ }
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - SDIOIrqHelperFunction Exiting.. \n"));
++ return 0;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ GetPendingIrqComplete - completion routine for getting pending IRQs
++ Input: pRequest - completed request
++ Output:
++ Return:
++ Notes:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static void GetPendingIrqComplete(PSDREQUEST pReq)
++{
++ UINT8 intPendingMsk;
++ PSDHCD pHcd;
++
++ do {
++ pHcd = (PSDHCD)pReq->pCompleteContext;
++ DBG_ASSERT(pHcd != NULL);
++
++ if (!SDIO_SUCCESS(pReq->Status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get Interrupt pending register Err:%d\n",
++ pReq->Status));
++ break;
++ }
++
++ if (SD_R5_GET_RESP_FLAGS(pReq->Response) & SD_R5_ERRORS) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: CMD52 resp error: 0x%X \n",
++ SD_R5_GET_RESP_FLAGS(pReq->Response)));
++ break;
++ }
++ /* extract the pending mask */
++ intPendingMsk = SD_R5_GET_READ_DATA(pReq->Response) & SDIO_INT_PEND_MASK;
++ /* process them */
++ ProcessPendingIrqs(pHcd, intPendingMsk);
++
++ } while (FALSE);
++
++ FreeRequest(pReq);
++
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("-SDIO Bus Driver: GetPendingIrqComplete \n"));
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ ProcessPendingIrqs - processing pending Irqs
++ Input: pHcd - host controller
++ Input: IntPendingMsk - pending irq bit mask
++ Output:
++ Return:
++ Notes:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static void ProcessPendingIrqs(PSDHCD pHcd, UINT8 IntPendingMsk)
++{
++ PSDLIST pListItem;
++ PSDDEVICE pDevice;
++ UINT8 funcMask;
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("+SDIO Bus Driver: ProcessPendingIrqs \n"));
++ do {
++ /* acquire lock to protect configuration and irq enables */
++ status = _AcquireHcdLock(pHcd);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++
++ /* sanity check */
++ if ((IntPendingMsk & pHcd->IrqsEnabled) != IntPendingMsk) {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: IRQs asserting when not enabled : curr:0x%X , card reports: 0x%X\n",
++ pHcd->IrqsEnabled, IntPendingMsk));
++ /* remove the pending IRQs that are not enabled */
++ IntPendingMsk &= pHcd->IrqsEnabled;
++ /* fall through */
++ }
++
++ if (!IntPendingMsk) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: No interrupts on HCD:0x%X \n", (INT)pHcd));
++ pHcd->IrqProcState = SDHCD_IDLE;
++ if (pHcd->IrqsEnabled) {
++ /* only re-arm if there are IRQs enabled */
++ _IssueConfig(pHcd,SDCONFIG_SDIO_REARM_INT,NULL,0);
++ }
++ status = _ReleaseHcdLock(pHcd);
++ break;
++ }
++ /* reset helper IRQ bits */
++ pHcd->PendingHelperIrqs = 0;
++ /* save pending IRQ acks */
++ pHcd->PendingIrqAcks = IntPendingMsk;
++ status = _ReleaseHcdLock(pHcd);
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: INTs Pending - 0x%2.2X \n", IntPendingMsk));
++ /* take the device list lock as we iterate through the list, this blocks
++ * device removals */
++ status = SemaphorePendInterruptable(&pBusContext->DeviceListSem);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ /* walk through the device list matching HCD and interrupting function */
++ SDITERATE_OVER_LIST(&pBusContext->DeviceList, pListItem) {
++ pDevice = CONTAINING_STRUCT(pListItem, SDDEVICE, SDList);
++ /* check if device belongs to the HCD */
++ if (pDevice->pHcd != pHcd){
++ /* not on this hcd */
++ continue;
++ }
++ funcMask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
++ /* check device function against the pending mask */
++ if (!(funcMask & IntPendingMsk)) {
++ /* this one is not interrupting */
++ continue;
++ }
++ /* check for async IRQ and call handler */
++ if (pDevice->pIrqAsyncFunction != NULL) {
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: Calling Async IRQ Handler. Fn:%d\n",
++ SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
++ SDDEVICE_CALL_IRQ_ASYNC_HANDLER(pDevice);
++ } else {
++ /* this one needs the helper */
++ pHcd->PendingHelperIrqs |= funcMask;
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: No Async IRQ, Pending Helper Fn:%d\n",
++ SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
++ }
++ }
++ /* release HCD list lock */
++ SemaphorePost(&pBusContext->DeviceListSem);
++ /* check for helper IRQs */
++ if (pHcd->PendingHelperIrqs) {
++ pHcd->IrqProcState = SDHCD_IRQ_HELPER;
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: Waking IRQ Helper \n"));
++ if (!SDIO_SUCCESS(SD_WAKE_OS_HELPER(&pHcd->SDIOIrqHelper))) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to wake helper! \n"));
++ }
++ }
++ } while (FALSE);
++
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("-SDIO Bus Driver: ProcessPendingIrqs \n"));
++}
++
++SDIO_STATUS TryNoIrqPendingCheck(PSDDEVICE pDevice)
++{
++ if (pDevice->pHcd->CardProperties.IOFnCount > 1) {
++ /* not supported on multi-function cards */
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: IRQ Pending Check cannot be bypassed, (Funcs:%d)\n",
++ pDevice->pHcd->CardProperties.IOFnCount));
++ return SDIO_STATUS_UNSUPPORTED;
++ }
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: pending IRQ check bypassed \n"));
++ /* set flag to optimize this */
++ AtomicTest_Set(&pDevice->pHcd->HcdFlags, HCD_IRQ_NO_PEND_CHECK);
++ return SDIO_STATUS_SUCCESS;
++}
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ SDIO_NotifyTimerTriggered - notification handler that a timer expired
++ Input: TimerID - ID of timer that expired
++ Output:
++ Return:
++ Notes:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void SDIO_NotifyTimerTriggered(INT TimerID)
++{
++
++ switch (TimerID) {
++ case SDIOBUS_CD_TIMER_ID:
++ pBusContext->CDTimerQueued = FALSE;
++ /* post an HCD polling event to the helper thread */
++ PostCardDetectEvent(pBusContext, EVENT_HCD_CD_POLLING, NULL);
++ break;
++ default:
++ DBG_ASSERT(FALSE);
++ }
++
++}
+Index: linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus_misc.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus_misc.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,3122 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: sdio_bus_misc.c
++
++@abstract: OS independent bus driver support
++
++#notes: this file contains miscellaneous control functions
++
++@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define MODULE_NAME SDBUSDRIVER
++#include <linux/sdio/ctsystem.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/sdio_lib.h>
++#include "_busdriver.h"
++#include <linux/sdio/_sdio_defs.h>
++#include <linux/sdio/mmc_defs.h>
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ IssueBusRequestBd - issue a bus request
++ Input: pHcd - HCD object
++ Cmd - command to issue
++ Argument - command argument
++ Flags - request flags
++
++ Output: pReqToUse - request to use (if caller wants response data)
++ Return: SDIO Status
++ Notes: This function only issues 1 block data transfers
++ This function issues the request synchronously
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _IssueBusRequestBd(PSDHCD pHcd,
++ UINT8 Cmd,
++ UINT32 Argument,
++ SDREQUEST_FLAGS Flags,
++ PSDREQUEST pReqToUse,
++ PVOID pData,
++ INT Length)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ PSDREQUEST pReq;
++
++ if (NULL == pReqToUse) {
++ /* caller doesn't care about the response data, allocate locally */
++ pReq = AllocateRequest();
++ if (NULL == pReq) {
++ return SDIO_STATUS_NO_RESOURCES;
++ }
++ } else {
++ /* use the caller's request buffer */
++ pReq = pReqToUse;
++ }
++
++ pReq->Argument = Argument;
++ pReq->Flags = Flags;
++ pReq->Command = Cmd;
++ if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS) {
++ pReq->pDataBuffer = pData;
++ pReq->BlockCount = 1;
++ pReq->BlockLen = Length;
++ }
++
++ status = IssueRequestToHCD(pHcd,pReq);
++
++ if (NULL == pReqToUse) {
++ DBG_ASSERT(pReq != NULL);
++ FreeRequest(pReq);
++ }
++ return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ ConvertVoltageCapsToOCRMask - initialize card
++ Input: VoltageCaps - voltage cap to look up
++ Return: 32 bit OCR mask
++ Notes: this function sets voltage for +- 10%
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static UINT32 ConvertVoltageCapsToOCRMask(SLOT_VOLTAGE_MASK VoltageCaps)
++{
++ UINT32 ocrMask;
++
++ ocrMask = 0;
++
++ if (VoltageCaps & SLOT_POWER_3_3V) {
++ ocrMask |= SD_OCR_3_2_TO_3_3_VDD | SD_OCR_3_3_TO_3_4_VDD;
++ }
++ if (VoltageCaps & SLOT_POWER_3_0V) {
++ ocrMask |= SD_OCR_2_9_TO_3_0_VDD | SD_OCR_3_0_TO_3_1_VDD;
++ }
++ if (VoltageCaps & SLOT_POWER_2_8V) {
++ ocrMask |= SD_OCR_2_7_TO_2_8_VDD | SD_OCR_2_8_TO_2_9_VDD;
++ }
++ if (VoltageCaps & SLOT_POWER_2_0V) {
++ ocrMask |= SD_OCR_1_9_TO_2_0_VDD | SD_OCR_2_0_TO_2_1_VDD;
++ }
++ if (VoltageCaps & SLOT_POWER_1_8V) {
++ ocrMask |= SD_OCR_1_7_TO_1_8_VDD | SD_OCR_1_8_TO_1_9_VDD;
++ }
++ if (VoltageCaps & SLOT_POWER_1_6V) {
++ ocrMask |= SD_OCR_1_6_TO_1_7_VDD;
++ }
++
++ return ocrMask;
++}
++
++static UINT32 GetUsableOCRValue(UINT32 CardOCR, UINT32 SlotOCRMask)
++{
++ INT i;
++ UINT32 mask = 0;
++
++ for (i = 0; i < 32; i++) {
++ mask = 1 << i;
++ if ((SlotOCRMask & mask) && (CardOCR & mask)) {
++ return mask;
++ }
++ }
++
++ return mask;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ GetPowerSetting - power up the SDIO card
++ Input: pHcd - HCD object
++ pOCRvalue - OCR value of the card
++ Output: pOCRvalue - OCR to actually use
++ Return: power setting for HCD based on card's OCR, zero indicates unsupported
++ Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static SLOT_VOLTAGE_MASK GetPowerSetting(PSDHCD pHcd, UINT32 *pOCRvalue)
++{
++ UINT32 ocrMask;
++ SLOT_VOLTAGE_MASK hcdVoltage = 0;
++ SLOT_VOLTAGE_MASK hcdVMask;
++ INT i;
++
++ /* check preferred value */
++ ocrMask = ConvertVoltageCapsToOCRMask(pHcd->SlotVoltagePreferred);
++ if (ocrMask & *pOCRvalue) {
++ /* using preferred voltage */
++ *pOCRvalue = GetUsableOCRValue(*pOCRvalue, ocrMask);
++ hcdVoltage = pHcd->SlotVoltagePreferred;
++ } else {
++ /* walk through the slot voltage caps and find a match */
++ for (i = 0; i < 8; i++) {
++ hcdVMask = (1 << i);
++ if (hcdVMask & pHcd->SlotVoltageCaps) {
++ ocrMask = ConvertVoltageCapsToOCRMask((SLOT_VOLTAGE_MASK)(pHcd->SlotVoltageCaps & hcdVMask));
++ if (ocrMask & *pOCRvalue) {
++ /* found a match */
++ *pOCRvalue = GetUsableOCRValue(*pOCRvalue, ocrMask);
++ hcdVoltage = pHcd->SlotVoltageCaps & hcdVMask;
++ break;
++ }
++ }
++ }
++ }
++
++ return hcdVoltage;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ TestPresence - test the presence of a card/function
++ Input: pHcd - HCD object
++ TestType - type of test to perform
++ Output: pReq - Request to use (optional)
++ Return:
++ Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS TestPresence(PSDHCD pHcd,
++ CARD_INFO_FLAGS TestType,
++ PSDREQUEST pReq)
++{
++ SDIO_STATUS status = SDIO_STATUS_ERROR;
++
++ switch (TestType) {
++ case CARD_SDIO:
++ /* issue CMD5 */
++ status = _IssueSimpleBusRequest(pHcd,CMD5,0,
++ SDREQ_FLAGS_RESP_SDIO_R4 | SDREQ_FLAGS_RESP_SKIP_SPI_FILT,pReq);
++ break;
++ case CARD_SD:
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ /* ACMD41 just starts initialization when in SPI mode, argument is ignored
++ * Note: In SPI mode ACMD41 uses an R1 response */
++ status = _IssueSimpleBusRequest(pHcd,ACMD41,0,
++ SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R1,pReq);
++
++ } else {
++ /* issue ACMD41 with OCR value of zero */
++ /* ACMD41 on SD uses an R3 response */
++ status = _IssueSimpleBusRequest(pHcd,ACMD41,0,
++ SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R3,pReq);
++ }
++ break;
++ case CARD_MMC:
++ /* issue CMD1 */
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ /* note: in SPI mode an R1 response is used */
++ status = _IssueSimpleBusRequest(pHcd,CMD1,0,SDREQ_FLAGS_RESP_R1,pReq);
++ } else {
++ status = _IssueSimpleBusRequest(pHcd,CMD1,0,SDREQ_FLAGS_RESP_R3,pReq);
++ }
++ break;
++ default:
++ DBG_ASSERT(FALSE);
++ break;
++ }
++
++ return status;
++}
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ ReadOCR - read the OCR
++ Input: pHcd - HCD object
++ ReadType - type of read to perform
++ OCRValue - OCR value to use as an argument
++ Output: pReq - Request to use
++ pOCRValueRd - OCR value read back (can be NULL)
++ Return:
++ Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static SDIO_STATUS ReadOCR(PSDHCD pHcd,
++ CARD_INFO_FLAGS ReadType,
++ PSDREQUEST pReq,
++ UINT32 OCRValue,
++ UINT32 *pOCRValueRd)
++{
++ SDIO_STATUS status = SDIO_STATUS_ERROR;
++
++ switch (ReadType) {
++ case CARD_SDIO:
++ /* CMD5 for SDIO cards */
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ /* skip the SPI filter, we will decode the response here */
++ status = _IssueSimpleBusRequest(pHcd,CMD5,
++ OCRValue,
++ SDREQ_FLAGS_RESP_SDIO_R4 |
++ SDREQ_FLAGS_RESP_SKIP_SPI_FILT,
++ pReq);
++ } else {
++ /* native SD */
++ status = _IssueSimpleBusRequest(pHcd,CMD5,
++ OCRValue,
++ SDREQ_FLAGS_RESP_SDIO_R4,
++ pReq);
++ }
++ break;
++ case CARD_SD:
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ /* CMD58 is used to read the OCR */
++ status = _IssueSimpleBusRequest(pHcd,CMD58,
++ 0, /* argument ignored */
++ (SDREQ_FLAGS_RESP_R3 | SDREQ_FLAGS_RESP_SKIP_SPI_FILT),
++ pReq);
++ } else {
++ /* SD Native uses ACMD41 */
++ status = _IssueSimpleBusRequest(pHcd,ACMD41,
++ OCRValue,
++ SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R3,
++ pReq);
++ }
++ break;
++ case CARD_MMC:
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ /* CMD58 is used to read the OCR */
++ status = _IssueSimpleBusRequest(pHcd,CMD58,
++ 0, /* argument ignored */
++ (SDREQ_FLAGS_RESP_R3 | SDREQ_FLAGS_RESP_SKIP_SPI_FILT),
++ pReq);
++ } else {
++ /* MMC Native uses CMD1 */
++ status = _IssueSimpleBusRequest(pHcd,CMD1,
++ OCRValue, SDREQ_FLAGS_RESP_R3,
++ pReq);
++ }
++ break;
++ default:
++ DBG_ASSERT(FALSE);
++ break;
++ }
++
++ if (SDIO_SUCCESS(status) && (pOCRValueRd != NULL)) {
++ *pOCRValueRd = 0;
++ /* someone wants the OCR read back */
++ switch (ReadType) {
++ case CARD_SDIO:
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ *pOCRValueRd = SPI_SDIO_R4_GET_OCR(pReq->Response);
++ } else {
++ *pOCRValueRd = SD_SDIO_R4_GET_OCR(pReq->Response);
++ }
++ break;
++ case CARD_SD:
++ case CARD_MMC:
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ *pOCRValueRd = SPI_R3_GET_OCR(pReq->Response);
++ } else {
++ *pOCRValueRd = SD_R3_GET_OCR(pReq->Response);
++ }
++ break;
++ default:
++ DBG_ASSERT(FALSE);
++ break;
++ }
++ }
++ return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ PollCardReady - poll card till it's ready
++ Input: pHcd - HCD object
++ OCRValue - OCR value to poll with
++ PollType - polling type (based on card type)
++ Output:
++ Return:
++ Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS PollCardReady(PSDHCD pHcd, UINT32 OCRValue, CARD_INFO_FLAGS PollType)
++{
++ INT cardReadyRetry;
++ SDIO_STATUS status;
++ PSDREQUEST pReq;
++
++ if (!((PollType == CARD_SDIO) || (PollType == CARD_SD) || (PollType == CARD_MMC))) {
++ DBG_ASSERT(FALSE);
++ return SDIO_STATUS_INVALID_PARAMETER;
++ }
++
++ pReq = AllocateRequest();
++ if (NULL == pReq) {
++ return SDIO_STATUS_NO_RESOURCES;
++ }
++
++ status = SDIO_STATUS_SUCCESS;
++ cardReadyRetry = pBusContext->CardReadyPollingRetry;
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Polling card ready, Using OCR:0x%8.8X, Poll Type:0x%X\n",
++ OCRValue,PollType));
++
++ /* now issue CMD with the actual OCR as an argument until the card is ready */
++ while (cardReadyRetry) {
++ if (IS_HCD_BUS_MODE_SPI(pHcd) && !(PollType == CARD_SDIO)) {
++ if (PollType == CARD_MMC) {
++ /* under SPI mode for MMC cards, we need to issue CMD1 and
++ * check the response for the "in-idle" bit */
++ status = _IssueSimpleBusRequest(pHcd,
++ CMD1,
++ 0,
++ SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_RESP_SKIP_SPI_FILT,
++ pReq);
++ } else if (PollType == CARD_SD) {
++ /* under SPI mode for SD cards, we need to issue ACMD41 and
++ * check the response for the "in-idle" bit */
++ status = _IssueSimpleBusRequest(pHcd,
++ ACMD41,
++ 0,
++ SDREQ_FLAGS_RESP_R1 |
++ SDREQ_FLAGS_APP_CMD |
++ SDREQ_FLAGS_RESP_SKIP_SPI_FILT,
++ pReq);
++ } else {
++ DBG_ASSERT(FALSE);
++ }
++ } else {
++ /* for SD/MMC in native mode and SDIO (all modes) we need to read the OCR register */
++ /* read the OCR using the supplied OCR value as an argument, we don't care about the
++ * actual OCR read-back, but we are interested in the response */
++ status = ReadOCR(pHcd,PollType,pReq,OCRValue,NULL);
++ }
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to issue CMD to poll ready \n"));
++ break;
++ }
++ if (PollType == CARD_SDIO) {
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ if (SPI_SDIO_R4_IS_CARD_READY(pReq->Response)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SDIO Card Ready! (SPI) \n"));
++ break;
++ }
++ } else {
++ if (SD_SDIO_R4_IS_CARD_READY(pReq->Response)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SDIO Card Ready! \n"));
++ break;
++ }
++ }
++ } else if ((PollType == CARD_SD) || (PollType == CARD_MMC)) {
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ /* check response when MMC or SD cards operate in SPI mode */
++ if (!(GET_SPI_R1_RESP_TOKEN(pReq->Response) & SPI_CS_STATE_IDLE)) {
++ /* card is no longer in idle */
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD/MMC Card (SPI mode) is ready! \n"));
++ break;
++ }
++ } else {
++ /* check the OCR busy bit */
++ if (SD_R3_IS_CARD_READY(pReq->Response)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD/MMC (Native Mode) Card Ready! \n"));
++ break;
++ }
++ }
++ } else {
++ DBG_ASSERT(FALSE);
++ }
++ cardReadyRetry--;
++ /* delay */
++ status = OSSleep(OCR_READY_CHECK_DELAY_MS);
++ if (!SDIO_SUCCESS(status)){
++ break;
++ }
++ }
++
++ if (0 == cardReadyRetry) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Card Ready timeout! \n"));
++ status = SDIO_STATUS_DEVICE_ERROR;
++ }
++
++ FreeRequest(pReq);
++
++ return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ AdjustSlotPower - adjust slot power
++ Input: pHcd - HCD object
++ Output: pOCRvalue - ocr value to use
++ Return:
++ Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static SDIO_STATUS AdjustSlotPower(PSDHCD pHcd, UINT32 *pOCRvalue)
++{
++ SDCONFIG_POWER_CTRL_DATA pwrSetting;
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++ ZERO_OBJECT(pwrSetting);
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO Bus Driver: Adjusting Slot Power, Requesting adjustment for OCR:0x%8.8X \n",
++ *pOCRvalue));
++
++ do {
++ pwrSetting.SlotPowerEnable = TRUE;
++ /* get optimal power setting */
++ pwrSetting.SlotPowerVoltageMask = GetPowerSetting(pHcd, pOCRvalue);
++ if (0 == pwrSetting.SlotPowerVoltageMask) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: No matching voltage for OCR \n"));
++ status = SDIO_STATUS_DEVICE_ERROR;
++ break;
++ }
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Slot Pwr Mask 0x%X for OCR:0x%8.8X \n",
++ pwrSetting.SlotPowerVoltageMask,*pOCRvalue));
++ status = _IssueConfig(pHcd,SDCONFIG_POWER_CTRL,&pwrSetting,sizeof(pwrSetting));
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set power in hcd \n"));
++ break;
++ }
++ /* delay for power to settle */
++ OSSleep(pBusContext->PowerSettleDelay);
++ /* save off for drivers */
++ pHcd->CardProperties.CardVoltage = pwrSetting.SlotPowerVoltageMask;
++
++ } while (FALSE);
++
++ return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ ConvertEncodedTransSpeed - convert encoded TRANS_SPEED value to a clock rate
++ Input: TransSpeedValue - encoded transfer speed value
++ Output:
++ Return: appropriate SD clock rate
++ Notes: This function returns a rate of 0, if it could not be determined.
++ This function can check tran speed values for SD,SDIO and MMC cards
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static SD_BUSCLOCK_RATE ConvertEncodedTransSpeed(UINT8 TransSpeedValue)
++{
++ SD_BUSCLOCK_RATE transfMul = 0;
++ UINT8 timeVal = 0;
++
++ switch (TransSpeedValue & TRANSFER_UNIT_MULTIPIER_MASK) {
++ case 0:
++ transfMul = 10000;
++ break;
++ case 1:
++ transfMul = 100000;
++ break;
++ case 2:
++ transfMul = 1000000;
++ break;
++ case 3:
++ transfMul = 10000000;
++ break;
++ default:
++ transfMul = 0;
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Card transfer multipler is wrong (val=0x%X)! \n",
++ TransSpeedValue));
++ break;
++ }
++
++ switch ((TransSpeedValue & TIME_VALUE_MASK) >> TIME_VALUE_SHIFT) {
++ case 1: timeVal = 10; break;
++ case 2: timeVal = 12; break;
++ case 3: timeVal = 13; break;
++ case 4: timeVal = 15; break;
++ case 5: timeVal = 20; break;
++ case 6: timeVal = 25; break;
++ case 7: timeVal = 30; break;
++ case 8: timeVal = 35; break;
++ case 9: timeVal = 40; break;
++ case 10: timeVal = 45; break;
++ case 11: timeVal = 50; break;
++ case 12: timeVal = 55; break;
++ case 13: timeVal = 60; break;
++ case 14: timeVal = 70; break;
++ case 15: timeVal = 80; break;
++ default: timeVal = 0;
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Card time value is wrong (val=0x%X)! \n",
++ TransSpeedValue));
++ break;
++ }
++
++ if ((transfMul != 0) && (timeVal != 0)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Card Reported Max: %d Hz (0x%X) \n",
++ (timeVal*transfMul), TransSpeedValue));
++ return timeVal*transfMul;
++ }
++
++ return 0;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ SelectDeselectCard - Select or deselect a card
++ Input: pHcd - HCD object
++ Select - select the card
++ Output:
++ Return: status
++ Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static SDIO_STATUS SelectDeselectCard(PSDHCD pHcd, BOOL Select)
++{
++ SDIO_STATUS status;
++
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ /* SPI mode cards do not support selection */
++ status = SDIO_STATUS_SUCCESS;
++ } else {
++ if (!Select) {
++ /* deselect, note that deselecting a card does not return a response */
++ status = _IssueSimpleBusRequest(pHcd,
++ CMD7,0,
++ SDREQ_FLAGS_NO_RESP,NULL);
++ } else {
++ /* select */
++ status = _IssueSimpleBusRequest(pHcd,
++ CMD7,(pHcd->CardProperties.RCA << 16),
++ SDREQ_FLAGS_RESP_R1B,NULL);
++ }
++ }
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Failed to %s card, RCA:0x%X Err:%d \n",
++ (Select ? "Select":"Deselect"), pHcd->CardProperties.RCA, status));
++ }
++ return status;
++}
++
++/* reorder a buffer by swapping MSB with LSB */
++static void ReorderBuffer(UINT8 *pBuffer, INT Bytes)
++{
++ UINT8 *pEnd;
++ UINT8 temp;
++
++ DBG_ASSERT(!(Bytes & 1));
++ /* point to the end */
++ pEnd = &pBuffer[Bytes - 1];
++ /* divide in half */
++ Bytes = Bytes >> 1;
++
++ while (Bytes) {
++ temp = *pBuffer;
++ /* swap bytes */
++ *pBuffer = *pEnd;
++ *pEnd = temp;
++ pBuffer++;
++ pEnd--;
++ Bytes--;
++ }
++}
++
++#define ADJUST_OPER_CLOCK(pBusMode,Clock) \
++ (pBusMode)->ClockRate = min((SD_BUSCLOCK_RATE)(Clock),(pBusMode)->ClockRate)
++#define ADJUST_OPER_BLOCK_LEN(pCaps,Length) \
++ (pCaps)->OperBlockLenLimit = min((UINT16)(Length),(pCaps)->OperBlockLenLimit)
++#define ADJUST_OPER_BLOCK_COUNT(pCaps,Count) \
++ (pCaps)->OperBlockCountLimit = min((UINT16)(Count),(pCaps)->OperBlockCountLimit)
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ GetBusParameters - Get bus parameters for a card
++ Input: pHcd - HCD object
++ pBusMode - current bus mode on entry
++ Output: pBusMode - new adjusted bus mode
++ Return: status
++ Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static SDIO_STATUS GetBusParameters(PSDHCD pHcd, PSDCONFIG_BUS_MODE_DATA pBusMode)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ UINT8 temp;
++ UINT32 tplAddr;
++ struct SDIO_FUNC_EXT_COMMON_TPL func0ext;
++ UINT8 scrRegister[SD_SCR_BYTES];
++ SD_BUSCLOCK_RATE cardReportedRate = 0;
++ PSDREQUEST pReq = NULL;
++ BOOL spiMode = FALSE;
++
++
++ if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_SPI) {
++ spiMode = TRUE;
++ }
++
++ if (!spiMode) {
++ /* set highest bus mode bus driver is allowing (non-SPI), the code below will
++ * adjust to lower or equal settings */
++ pBusMode->BusModeFlags = pBusContext->DefaultBusMode;
++ }
++ /* set operational parameters */
++ pBusMode->ClockRate = pBusContext->DefaultOperClock;
++ pHcd->CardProperties.OperBlockLenLimit = pBusContext->DefaultOperBlockLen;
++ pHcd->CardProperties.OperBlockCountLimit = pBusContext->DefaultOperBlockCount;
++
++ /* adjust operational block counts and length to match HCD */
++ ADJUST_OPER_BLOCK_LEN(&pHcd->CardProperties,pHcd->MaxBytesPerBlock);
++ ADJUST_OPER_BLOCK_COUNT(&pHcd->CardProperties,pHcd->MaxBlocksPerTrans);
++ /* limit operational clock to the max clock rate */
++ ADJUST_OPER_CLOCK(pBusMode,pHcd->MaxClockRate);
++
++ if (!spiMode) {
++ /* check HCD bus mode */
++ if (!(pHcd->Attributes & SDHCD_ATTRIB_BUS_4BIT) ||
++ ((pHcd->CardProperties.Flags & CARD_SDIO) &&
++ (pHcd->Attributes & SDHCD_ATTRIB_NO_4BIT_IRQ)) ) {
++
++ if (pHcd->Attributes & SDHCD_ATTRIB_BUS_4BIT) {
++ DBG_PRINT(SDDBG_WARN,
++ ("SDIO Card Detected, but host does not support IRQs in 4 bit mode - dropping to 1 bit. \n"));
++ }
++ /* force to 1 bit mode */
++ SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_1_BIT);
++ }
++ }
++
++ /* now do various card inquiries to drop the bus mode or clock
++ * none of these checks can raise the bus mode or clock higher that what
++ * was initialized above */
++ do {
++ if (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC)) {
++ /* allocate a request for response data we'll need */
++ pReq = AllocateRequest();
++ if (NULL == pReq) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++ }
++
++ if (!spiMode && (pHcd->CardProperties.Flags & CARD_MMC)) {
++ /* MMC cards all run in 1 bit mode */
++ SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_1_BIT);
++ }
++
++ if (pHcd->CardProperties.Flags & CARD_SD) {
++ DBG_ASSERT(pReq != NULL);
++ DBG_PRINT(SDDBG_TRACE, ("Getting SCR from SD Card..\n"));
++ /* read SCR (requires data transfer) to get supported modes */
++ status = _IssueBusRequestBd(pHcd,ACMD51,0,
++ SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_APP_CMD |
++ SDREQ_FLAGS_DATA_TRANS,
++ pReq,&scrRegister,SD_SCR_BYTES);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_WARN, ("SD card does not have SCR. \n"));
++ if (!spiMode) {
++ /* switch it to 1 bit mode */
++ SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_1_BIT);
++ }
++ status = SDIO_STATUS_SUCCESS;
++ } else {
++ /* we have to reorder this buffer since the SCR is sent MSB first on the data
++ * data bus */
++ ReorderBuffer(scrRegister,SD_SCR_BYTES);
++ /* got the SCR */
++ DBG_PRINT(SDDBG_TRACE, ("SD SCR StructRev:0x%X, Flags:0x%X \n",
++ GET_SD_SCR_STRUCT_VER(scrRegister),
++ GET_SD_SCR_BUSWIDTHS_FLAGS(scrRegister)));
++ /* set the revision */
++ switch (GET_SD_SCR_SDSPEC_VER(scrRegister)) {
++ case SCR_SD_SPEC_1_00:
++ DBG_PRINT(SDDBG_TRACE, ("SD Spec Revision 1.01 \n"));
++ pHcd->CardProperties.SD_MMC_Revision = SD_REVISION_1_01;
++ break;
++ case SCR_SD_SPEC_1_10:
++ DBG_PRINT(SDDBG_TRACE, ("SD Spec Revision 1.10 \n"));
++ pHcd->CardProperties.SD_MMC_Revision = SD_REVISION_1_10;
++ break;
++ default:
++ DBG_PRINT(SDDBG_WARN, ("SD Spec Revision is greater than 1.10 \n"));
++ pHcd->CardProperties.SD_MMC_Revision = SD_REVISION_1_10;
++ break;
++ }
++
++ if (!(GET_SD_SCR_BUSWIDTHS(scrRegister) & SCR_BUS_SUPPORTS_4_BIT)) {
++ if (!spiMode) {
++ DBG_PRINT(SDDBG_WARN, ("SD SCR reports 1bit only Mode \n"));
++ /* switch it to 1 bit mode */
++ SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_1_BIT);
++ }
++ }
++ }
++ }
++
++ if (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC)) {
++ DBG_ASSERT(pReq != NULL);
++ /* de-select the card in order to get the CSD */
++ status = SelectDeselectCard(pHcd,FALSE);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to deselect card before getting CSD \n"));
++ break;
++ }
++ /* Get CSD for SD or MMC cards */
++ if (spiMode) {
++ /* in SPI mode, getting the CSD requires a read data transfer */
++ status = _IssueBusRequestBd(pHcd,CMD9,0,
++ SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
++ pReq,
++ pHcd->CardProperties.CardCSD,
++ MAX_CSD_CID_BYTES);
++ if (SDIO_SUCCESS(status)) {
++ /* when the CSD is sent over in SPI data mode, it comes to us in MSB first
++ * and thus is not ordered correctly as defined in the SD spec */
++ ReorderBuffer(pHcd->CardProperties.CardCSD,MAX_CSD_CID_BYTES);
++ }
++ } else {
++ status = _IssueSimpleBusRequest(pHcd,
++ CMD9,
++ (pHcd->CardProperties.RCA << 16),
++ SDREQ_FLAGS_RESP_R2,
++ pReq);
++ if (SDIO_SUCCESS(status)) {
++ /* save the CSD */
++ memcpy(pHcd->CardProperties.CardCSD,pReq->Response,MAX_CARD_RESPONSE_BYTES);
++ }
++ }
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get CSD, Err:%d \n",
++ status));
++ break;
++ }
++ /* for MMC cards, the spec version is in the CSD */
++ if (pHcd->CardProperties.Flags & CARD_MMC) {
++ DBG_PRINT(SDDBG_TRACE, ("MMC Spec version : (0x%2.2X) \n",
++ GET_MMC_SPEC_VERSION(pHcd->CardProperties.CardCSD)));
++ switch (GET_MMC_SPEC_VERSION(pHcd->CardProperties.CardCSD)) {
++ case MMC_SPEC_1_0_TO_1_2:
++ case MMC_SPEC_1_4:
++ case MMC_SPEC_2_0_TO_2_2:
++ DBG_PRINT(SDDBG_WARN, ("MMC Spec version less than 3.1 \n"));
++ pHcd->CardProperties.SD_MMC_Revision = MMC_REVISION_1_0_2_2;
++ break;
++ case MMC_SPEC_3_1:
++ DBG_PRINT(SDDBG_TRACE, ("MMC Spec version 3.1 \n"));
++ pHcd->CardProperties.SD_MMC_Revision = MMC_REVISION_3_1;
++ break;
++ case MMC_SPEC_4_0_TO_4_1:
++ DBG_PRINT(SDDBG_TRACE, ("MMC Spec version 4.0-4.1 \n"));
++ pHcd->CardProperties.SD_MMC_Revision = MMC_REVISION_4_0;
++ break;
++ default:
++ pHcd->CardProperties.SD_MMC_Revision = MMC_REVISION_3_1;
++ DBG_PRINT(SDDBG_WARN, ("MMC Spec version greater than 4.1\n"));
++ break;
++ }
++ }
++ /* re-select the card */
++ status = SelectDeselectCard(pHcd,TRUE);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to re-select card after getting CSD \n"));
++ break;
++ }
++ }
++
++ if ((pHcd->CardProperties.Flags & CARD_SD) &&
++ !(pHcd->CardProperties.Flags & CARD_SDIO) &&
++ SDDEVICE_IS_SD_REV_GTEQ_1_10(pHcd->pPseudoDev) &&
++ (pHcd->Attributes & SDHCD_ATTRIB_SD_HIGH_SPEED) &&
++ !spiMode) {
++ UINT32 arg;
++ PUINT8 pSwitchStatusBlock = KernelAlloc(SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
++
++ if (NULL == pSwitchStatusBlock) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++
++ arg = SD_SWITCH_FUNC_ARG_GROUP_CHECK(SD_SWITCH_HIGH_SPEED_GROUP,
++ SD_SWITCH_HIGH_SPEED_FUNC_NO);
++
++ /* for 1.10 SD cards, check if high speed mode is supported */
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Checking SD Card for switchable functions (CMD6 arg:0x%X)\n",arg));
++
++ /* issue simple data transfer request to read the switch status */
++ status = _IssueBusRequestBd(pHcd,
++ CMD6,
++ arg,
++ SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
++ pReq,
++ pSwitchStatusBlock,
++ SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
++
++ if (SDIO_SUCCESS(status)) {
++ UINT16 switchGroupMask;
++ /* need to reorder this since cards send this MSB first */
++ ReorderBuffer(pSwitchStatusBlock,SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
++ switchGroupMask = SD_SWITCH_FUNC_STATUS_GET_GRP_BIT_MASK(pSwitchStatusBlock,SD_SWITCH_HIGH_SPEED_GROUP);
++ DBG_PRINT(SDDBG_TRACE, ("SD Card Switch Status Group1 Mask:0x%X Max Current:%d\n",
++ switchGroupMask, SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pSwitchStatusBlock) ));
++ if (SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pSwitchStatusBlock) == 0) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: SD Switch Status block has zero max current \n"));
++ SDLIB_PrintBuffer(pSwitchStatusBlock,
++ SD_SWITCH_FUNC_STATUS_BLOCK_BYTES,
++ "SDIO Bus Driver: SD Switch Status Block Error");
++ } else {
++ /* check HS support */
++ if (switchGroupMask & (1 << SD_SWITCH_HIGH_SPEED_FUNC_NO)) {
++ DBG_PRINT(SDDBG_TRACE, ("SD Card Supports High Speed Mode\n"));
++ /* set the rate, this will override the CSD value */
++ cardReportedRate = SD_HS_MAX_BUS_CLOCK;
++ pBusMode->BusModeFlags |= SDCONFIG_BUS_MODE_SD_HS;
++ }
++ }
++ } else {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get SD Switch Status block (%d)\n", status));
++ /* just fall through, we'll handle this like a normal SD card */
++ status = SDIO_STATUS_SUCCESS;
++ }
++
++ KernelFree(pSwitchStatusBlock);
++ }
++
++ if ((pHcd->CardProperties.Flags & CARD_MMC) &&
++ SDDEVICE_IS_MMC_REV_GTEQ_4_0(pHcd->pPseudoDev) &&
++ (pHcd->Attributes & SDHCD_ATTRIB_MMC_HIGH_SPEED) &&
++ !spiMode) {
++ /* for MMC cards, get the Extended CSD to get the High speed and
++ * wide bus paramaters */
++
++ PUINT8 pExtData = KernelAlloc(MMC_EXT_CSD_SIZE);
++
++ if (NULL == pExtData) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++ /* issue simple data transfer request to read the extended CSD */
++ status = _IssueBusRequestBd(pHcd,MMC_CMD8,0,
++ SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
++ pReq,
++ pExtData,
++ MMC_EXT_CSD_SIZE);
++ if (SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_TRACE, ("MMC Ext CSD Version: 0x%X Card Type: 0x%X\n",
++ pExtData[MMC_EXT_VER_OFFSET],pExtData[MMC_EXT_CARD_TYPE_OFFSET]));
++ /* check HS support */
++ if (pExtData[MMC_EXT_CARD_TYPE_OFFSET] & MMC_EXT_CARD_TYPE_HS_52) {
++ /* try 52 Mhz */
++ cardReportedRate = 52000000;
++ pBusMode->BusModeFlags |= SDCONFIG_BUS_MODE_MMC_HS;
++ } else if (pExtData[MMC_EXT_CARD_TYPE_OFFSET] & MMC_EXT_CARD_TYPE_HS_26) {
++ /* try 26MHZ */
++ cardReportedRate = 26000000;
++ pBusMode->BusModeFlags |= SDCONFIG_BUS_MODE_MMC_HS;
++ } else {
++ /* doesn't report high speed capable */
++ cardReportedRate = 0;
++ }
++
++ if (cardReportedRate && !spiMode) {
++ /* figure out the bus mode */
++ if (pHcd->Attributes & SDHCD_ATTRIB_BUS_MMC8BIT) {
++ SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_MMC8_BIT);
++ } else if (pHcd->Attributes & SDHCD_ATTRIB_BUS_4BIT) {
++ SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_4_BIT);
++ } else {
++ /* we leave it to default to 1 bit mode */
++ }
++ }
++ } else {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get MMC Extended CSD \n"));
++ /* just fall through, we'll do without the extended information
++ * and run it like a legacy MMC card */
++ status = SDIO_STATUS_SUCCESS;
++ }
++
++ KernelFree(pExtData);
++ }
++
++ if (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC)) {
++
++ if (0 == cardReportedRate) {
++ /* extract rate from CSD only if it was not set by earlier tests */
++ cardReportedRate = ConvertEncodedTransSpeed(
++ GET_SD_CSD_TRANS_SPEED(pHcd->CardProperties.CardCSD));
++ /* fall through and test for zero again */
++ }
++
++ if (cardReportedRate != 0) {
++ /* adjust clock based on what the card can handle */
++ ADJUST_OPER_CLOCK(pBusMode,cardReportedRate);
++ } else {
++ /* something is wrong with the CSD */
++ if (DBG_GET_DEBUG_LEVEL() >= SDDBG_TRACE) {
++ SDLIB_PrintBuffer(pHcd->CardProperties.CardCSD,
++ MAX_CARD_RESPONSE_BYTES,
++ "SDIO Bus Driver: CSD Dump");
++ }
++ /* can't figure out the card rate, so set reasonable defaults */
++ if (pHcd->CardProperties.Flags & CARD_SD) {
++ ADJUST_OPER_CLOCK(pBusMode,SD_MAX_BUS_CLOCK);
++ } else {
++ ADJUST_OPER_CLOCK(pBusMode,MMC_MAX_BUS_CLOCK);
++ }
++ }
++ }
++
++ /* note, we do SDIO card "after" SD in case this is a combo card */
++ if (pHcd->CardProperties.Flags & CARD_SDIO) {
++ /* read card capabilities */
++ status = Cmd52ReadByteCommon(pHcd->pPseudoDev,
++ SDIO_CARD_CAPS_REG,
++ &pHcd->CardProperties.SDIOCaps);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Card Caps: 0x%X \n",pHcd->CardProperties.SDIOCaps));
++ if (pHcd->CardProperties.SDIOCaps & SDIO_CAPS_LOW_SPEED) {
++ /* adjust max clock for LS device */
++ ADJUST_OPER_CLOCK(pBusMode,SDIO_LOW_SPEED_MAX_BUS_CLOCK);
++ /* adjust bus if LS device does not support 4 bit mode */
++ if (!(pHcd->CardProperties.SDIOCaps & SDIO_CAPS_4BIT_LS)) {
++ if (!spiMode) {
++ /* low speed device does not support 4 bit mode, force us to 1 bit */
++ SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags,
++ SDCONFIG_BUS_WIDTH_1_BIT);
++ }
++ }
++ }
++
++ /* check if 1.2 card supports high speed mode, checking HCD as well*/
++ if (SDDEVICE_IS_SDIO_REV_GTEQ_1_20(pHcd->pPseudoDev) &&
++ (pHcd->Attributes & SDHCD_ATTRIB_SD_HIGH_SPEED) &&
++ !spiMode) {
++ UCHAR hsControl = 0;
++
++ status = Cmd52ReadByteCommon(pHcd->pPseudoDev,
++ SDIO_HS_CONTROL_REG,
++ &hsControl);
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO Failed to read high speed control (%d) \n",status));
++ /* reset status and continue */
++ status = SDIO_STATUS_SUCCESS;
++ } else {
++ if (hsControl & SDIO_HS_CONTROL_SHS) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Card Supports High Speed Mode\n"));
++ pBusMode->BusModeFlags |= SDCONFIG_BUS_MODE_SD_HS;
++ }
++ }
++
++ }
++
++ cardReportedRate = 0;
++ temp = sizeof(func0ext);
++ tplAddr = pHcd->CardProperties.CommonCISPtr;
++ /* get the FUNCE tuple */
++ status = SDLIB_FindTuple(pHcd->pPseudoDev,
++ CISTPL_FUNCE,
++ &tplAddr,
++ (PUINT8)&func0ext,
++ &temp);
++ if (!SDIO_SUCCESS(status) || (temp < sizeof(func0ext))) {
++ DBG_PRINT(SDDBG_WARN, ("SDIO Function 0 Ext. Tuple Missing (Got size:%d) \n", temp));
++ /* reset status */
++ status = SDIO_STATUS_SUCCESS;
++ } else {
++ /* convert encoded value to rate */
++ cardReportedRate = ConvertEncodedTransSpeed(func0ext.MaxTransSpeed);
++ }
++
++ if (cardReportedRate != 0) {
++ if (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) {
++ if (cardReportedRate <= SD_MAX_BUS_CLOCK) {
++ DBG_PRINT(SDDBG_WARN,
++ ("SDIO Function tuple reports clock:%d Hz, with advertised High Speed support \n", cardReportedRate));
++ /* back off high speed support */
++ pBusMode->BusModeFlags &= ~SDCONFIG_BUS_MODE_SD_HS;
++ }
++ } else {
++ if (cardReportedRate > SD_MAX_BUS_CLOCK) {
++ DBG_PRINT(SDDBG_WARN,
++ ("SDIO Function tuple reports clock:%d Hz, without advertising High Speed support..using 25Mhz \n", cardReportedRate));
++ cardReportedRate = SD_MAX_BUS_CLOCK;
++ }
++ }
++ /* adjust clock based on what the card can handle */
++ ADJUST_OPER_CLOCK(pBusMode,cardReportedRate);
++
++ } else {
++ /* set a reasonable default */
++ ADJUST_OPER_CLOCK(pBusMode,SD_MAX_BUS_CLOCK);
++ }
++ }
++ } while (FALSE);
++
++ if (pReq != NULL) {
++ FreeRequest(pReq);
++ }
++ return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ SetOperationalBusMode - set operational bus mode
++ Input: pDevice - pDevice that is requesting the change
++ pBusMode - operational bus mode
++ Output: pBusMode - on return will have the actual clock rate set
++ Return: status
++ Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SetOperationalBusMode(PSDDEVICE pDevice,
++ PSDCONFIG_BUS_MODE_DATA pBusMode)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ UCHAR regData;
++ UINT32 arg;
++ UINT32 switcharg;
++ PSDHCD pHcd = pDevice->pHcd;
++
++ /* synchronize access for updating bus mode settings */
++ status = SemaphorePendInterruptable(&pDevice->pHcd->ConfigureOpsSem);
++ if (!SDIO_SUCCESS(status)) {
++ return status;
++ }
++
++ do {
++
++ if (!IS_CARD_PRESENT(pHcd)) {
++ /* for an empty slot (a Pseudo dev was passed in) we still allow the
++ * bus mode to be set for the card detect
++ * polling */
++ status = _IssueConfig(pHcd,SDCONFIG_BUS_MODE_CTRL,pBusMode,sizeof(SDCONFIG_BUS_MODE_DATA));
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus mode in hcd : Err:%d \n",
++ status));
++ }
++ /* nothing more to do */
++ break;
++ }
++
++
++ if ((pBusMode->BusModeFlags == SDDEVICE_GET_BUSMODE_FLAGS(pDevice)) &&
++ (pBusMode->ClockRate == SDDEVICE_GET_OPER_CLOCK(pDevice))) {
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO Bus Driver: Bus mode already set, nothing to do\n"));
++ pBusMode->ActualClockRate = SDDEVICE_GET_OPER_CLOCK(pDevice);
++ break;
++ }
++
++ if (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_MMC_HS) {
++ if (!(pHcd->Attributes & SDHCD_ATTRIB_MMC_HIGH_SPEED)) {
++ status = SDIO_STATUS_INVALID_PARAMETER;
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: HCD does not support MMC High Speed\n"));
++ break;
++ }
++ }
++
++ if (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) {
++ if (!(pHcd->Attributes & SDHCD_ATTRIB_SD_HIGH_SPEED)) {
++ status = SDIO_STATUS_INVALID_PARAMETER;
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: HCD does not support SD High Speed\n"));
++ break;
++ }
++ }
++
++ /* before we set the operational clock and mode, configure the clock for high
++ * speed mode on the card , if necessary */
++ if ((pHcd->CardProperties.Flags & CARD_MMC) &&
++ (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_MMC_HS) &&
++ !(SDDEVICE_GET_BUSMODE_FLAGS(pDevice) & SDCONFIG_BUS_MODE_MMC_HS)) {
++
++ switcharg = MMC_SWITCH_BUILD_ARG(MMC_SWITCH_CMD_SET0,
++ MMC_SWITCH_WRITE_BYTE,
++ MMC_EXT_HS_TIMING_OFFSET,
++ MMC_EXT_HS_TIMING_ENABLE);
++ status = _IssueSimpleBusRequest(pHcd,
++ MMC_CMD_SWITCH,
++ switcharg,
++ SDREQ_FLAGS_RESP_R1B,
++ NULL);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: Failed to switch MMC High Speed Mode (arg:0x%X): %d \n",
++ switcharg, status));
++ break;
++ }
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: High Speed MMC enabled (arg:0x%X)\n",
++ switcharg));
++ }
++
++ /* before setting bus mode and clock in the HCD, switch card to high speed mode
++ * if necessary */
++ if ((pHcd->CardProperties.Flags & CARD_SD) &&
++ (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) &&
++ !(SDDEVICE_GET_BUSMODE_FLAGS(pDevice) & SDCONFIG_BUS_MODE_SD_HS)) {
++ UINT32 arg;
++ PUINT8 pSwitchStatusBlock;
++
++ pSwitchStatusBlock = KernelAlloc(SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
++
++ if (NULL == pSwitchStatusBlock) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++
++ /* set high speed group */
++ arg = SD_SWITCH_FUNC_ARG_GROUP_SET(SD_SWITCH_HIGH_SPEED_GROUP,
++ SD_SWITCH_HIGH_SPEED_FUNC_NO);
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Setting SD Card for High Speed mode (CMD6 arg:0x%X)\n",arg));
++
++ /* issue simple data transfer request to switch modes */
++ status = _IssueBusRequestBd(pHcd,
++ CMD6,
++ arg,
++ SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
++ NULL,
++ pSwitchStatusBlock,
++ SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
++
++ if (SDIO_SUCCESS(status)) {
++ ReorderBuffer(pSwitchStatusBlock,SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD High Speed Result, Got Max Current:%d mA, SwitchResult:0x%X \n",
++ SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pSwitchStatusBlock),
++ SDSwitchGetSwitchResult(pSwitchStatusBlock, SD_SWITCH_HIGH_SPEED_GROUP)));
++ if (SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pSwitchStatusBlock) == 0) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Error in Status Block after High Speed Switch (current==0) \n"));
++ status = SDIO_STATUS_DEVICE_ERROR;
++ }
++ if (SDSwitchGetSwitchResult(pSwitchStatusBlock, SD_SWITCH_HIGH_SPEED_GROUP) !=
++ SD_SWITCH_HIGH_SPEED_FUNC_NO) {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: Error in Status Block after High Speed Switch (Group1 did not switch) \n"));
++ status = SDIO_STATUS_DEVICE_ERROR;
++ }
++ if (SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD High Speed Mode Enabled \n"));
++ } else {
++ SDLIB_PrintBuffer(pSwitchStatusBlock,
++ SD_SWITCH_FUNC_STATUS_BLOCK_BYTES,
++ "SDIO Bus Driver: SD Switch Status Block Error");
++ }
++ } else {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to Set SD High Speed Mode (%d) \n",status));
++ }
++ KernelFree(pSwitchStatusBlock);
++
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ }
++
++ /* enable/disable high speed mode for SDIO card */
++ if (pHcd->CardProperties.Flags & CARD_SDIO) {
++ BOOL doSet = TRUE;
++
++ if ((pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) &&
++ !(SDDEVICE_GET_BUSMODE_FLAGS(pDevice) & SDCONFIG_BUS_MODE_SD_HS)) {
++ /* enable */
++ regData = SDIO_HS_CONTROL_EHS;
++ } else if (!(pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) &&
++ (SDDEVICE_GET_BUSMODE_FLAGS(pDevice) & SDCONFIG_BUS_MODE_SD_HS)) {
++ /* disable */
++ regData = 0;
++ } else {
++ /* do nothing */
++ doSet = FALSE;
++ }
++
++ if (doSet) {
++ status = Cmd52WriteByteCommon(pDevice,
++ SDIO_HS_CONTROL_REG,
++ ®Data);
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to %s HS mode in SDIO card : Err:%d\n",
++ (SDIO_HS_CONTROL_EHS == regData) ? "enable":"disable" , status));
++ break;
++ } else {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver:SDIO Card %s for High Speed mode \n",
++ (SDIO_HS_CONTROL_EHS == regData) ? "enabled":"disabled" ));
++ }
++ }
++ }
++
++ /* use synchronize-with-bus request version, this may have been requested by a
++ * function driver */
++ status = SDLIB_IssueConfig(pDevice,
++ SDCONFIG_BUS_MODE_CTRL,
++ pBusMode,
++ sizeof(SDCONFIG_BUS_MODE_DATA));
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus mode in hcd : Err:%d \n",
++ status));
++ break;
++ }
++
++ /* check requested bus width against the current mode */
++ if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) ==
++ SDCONFIG_GET_BUSWIDTH(pHcd->CardProperties.BusMode)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Bus mode set, no width change\n"));
++ break;
++ }
++
++ if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_SPI) {
++ /* nothing more to do for SPI */
++ break;
++ }
++
++ /* set the bus width for SD and combo cards */
++ if (pHcd->CardProperties.Flags & CARD_SD) {
++ if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) {
++ /* turn off card detect resistor */
++ status = _IssueSimpleBusRequest(pHcd,
++ ACMD42,
++ 0, /* disable CD */
++ SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R1,
++ NULL);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Failed to disable CD Res: %d \n",
++ status)); /* this should be okay */
++ }
++ arg = SD_ACMD6_BUS_WIDTH_4_BIT;
++ } else {
++ /* don't need to turn off CD in 1 bit mode, just set mode */
++ arg = SD_ACMD6_BUS_WIDTH_1_BIT;
++
++ }
++ /* set the bus width */
++ status = _IssueSimpleBusRequest(pHcd,
++ ACMD6,
++ arg, /* set bus mode */
++ SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R1,
++ NULL);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus width: %d \n",
++ status));
++ break;
++ }
++ }
++ /* set bus width for SDIO cards */
++ if (pHcd->CardProperties.Flags & CARD_SDIO) {
++ /* default */
++ regData = CARD_DETECT_DISABLE | SDIO_BUS_WIDTH_1_BIT;
++
++ if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) {
++ /* turn off card detect resistor and set buswidth */
++ regData = CARD_DETECT_DISABLE | SDIO_BUS_WIDTH_4_BIT;
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Enabling 4 bit mode on card \n"));
++ } else {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Enabling 1 bit mode on card \n"));
++ }
++ status = Cmd52WriteByteCommon(pDevice,
++ SDIO_BUS_IF_REG,
++ ®Data);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus mode in Card : Err:%d\n",
++ status));
++ break;
++ }
++
++ /* check for 4-bit interrupt detect mode */
++ if ((SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) &&
++ (pHcd->CardProperties.SDIOCaps & SDIO_CAPS_INT_MULTI_BLK) &&
++ (pHcd->Attributes & SDHCD_ATTRIB_MULTI_BLK_IRQ)) {
++ /* enable interrupts between blocks, this doesn't actually turn on interrupts
++ * it merely allows interrupts to be asserted in the inter-block gap */
++ pHcd->CardProperties.SDIOCaps |= SDIO_CAPS_ENB_INT_MULTI_BLK;
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: 4-Bit Multi-blk Interrupt support enabled\n"));
++ } else {
++ /* make sure this is disabled */
++ pHcd->CardProperties.SDIOCaps &= ~SDIO_CAPS_ENB_INT_MULTI_BLK;
++ }
++
++ status = Cmd52WriteByteCommon(pDevice,
++ SDIO_CARD_CAPS_REG,
++ &pHcd->CardProperties.SDIOCaps);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to update Card Caps register Err:%d\n",
++ status));
++ break;
++ }
++ }
++
++ /* set data bus width for MMC */
++ if (pHcd->CardProperties.Flags & CARD_MMC) {
++ UINT8 buswidth = 0;
++
++ if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) {
++ buswidth = MMC_EXT_BUS_WIDTH_4_BIT;
++ } else if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_MMC8_BIT) {
++ buswidth = MMC_EXT_BUS_WIDTH_8_BIT;
++ } else {
++ /* normal 1 bit mode .. nothing to do */
++ break;
++ }
++ /* now set the bus mode on the card */
++ switcharg = MMC_SWITCH_BUILD_ARG(MMC_SWITCH_CMD_SET0,
++ MMC_SWITCH_WRITE_BYTE,
++ MMC_EXT_BUS_WIDTH_OFFSET,
++ buswidth);
++
++ status = _IssueSimpleBusRequest(pHcd,
++ MMC_CMD_SWITCH,
++ switcharg,
++ SDREQ_FLAGS_RESP_R1B,
++ NULL);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set MMC bus width (arg:0x%X): %d \n",
++ switcharg, status));
++ break;
++ }
++
++ if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: 4 bit MMC mode enabled (arg:0x%X) \n",
++ switcharg));
++ } else if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_MMC8_BIT) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: 8-Bit MMC mode enabled (arg:0x%X) \n",
++ switcharg));
++ }
++ }
++
++ } while (FALSE);
++
++ if (SDIO_SUCCESS(status)) {
++ /* set the operating mode */
++ pHcd->CardProperties.BusMode = pBusMode->BusModeFlags;
++ /* set the actual clock rate */
++ pHcd->CardProperties.OperBusClock = pBusMode->ActualClockRate;
++ }
++
++ SemaphorePost(&pDevice->pHcd->ConfigureOpsSem);
++
++ return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ CardInitSetup - setup host for card initialization
++ Input: pHcd - HCD object
++ Output:
++ Return:
++ Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS CardInitSetup(PSDHCD pHcd)
++{
++ SDCONFIG_INIT_CLOCKS_DATA initClocks;
++ SDCONFIG_BUS_MODE_DATA busMode;
++ UINT32 OCRvalue;
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++ ZERO_OBJECT(initClocks);
++ ZERO_OBJECT(busMode);
++ /* setup defaults */
++ initClocks.NumberOfClocks = SDMMC_MIN_INIT_CLOCKS;
++ busMode.ClockRate = SD_INIT_BUS_CLOCK;
++
++ /* check for SPI only */
++ if (pHcd->Attributes & SDHCD_ATTRIB_BUS_SPI) {
++ /* SPI cards startup in non-CRC mode with the exception of CMD0, the
++ * HCDs must issue CMD0 with the correct CRC , the spec shows that a
++ * CMD 0 sequence is 0x40,0x00,0x00,0x00,0x00,0x95 */
++ busMode.BusModeFlags = SDCONFIG_BUS_WIDTH_SPI | SDCONFIG_BUS_MODE_SPI_NO_CRC;
++ }
++ /* check if host supports 1 bit mode */
++ /* TODO : if host supports power switching, we can
++ * could initialize cards in SPI mode first */
++ if (pHcd->Attributes & SDHCD_ATTRIB_BUS_1BIT) {
++ busMode.BusModeFlags = SDCONFIG_BUS_WIDTH_1_BIT;
++ }
++
++ /* set initial VDD, starting at the highest allowable voltage and working
++ * our way down */
++ if (pHcd->SlotVoltageCaps & SLOT_POWER_3_3V) {
++ OCRvalue = SD_OCR_3_2_TO_3_3_VDD;
++ } else if (pHcd->SlotVoltageCaps & SLOT_POWER_3_0V) {
++ OCRvalue = SD_OCR_2_9_TO_3_0_VDD;
++ } else if (pHcd->SlotVoltageCaps & SLOT_POWER_2_8V) {
++ OCRvalue = SD_OCR_2_7_TO_2_8_VDD;
++ } else if (pHcd->SlotVoltageCaps & SLOT_POWER_2_0V) {
++ OCRvalue = SD_OCR_1_9_TO_2_0_VDD;
++ } else if (pHcd->SlotVoltageCaps & SLOT_POWER_1_8V) {
++ OCRvalue = SD_OCR_1_7_TO_1_8_VDD;
++ } else if (pHcd->SlotVoltageCaps & SLOT_POWER_1_6V) {
++ OCRvalue = SD_OCR_1_6_TO_1_7_VDD;
++ } else {
++ DBG_ASSERT(FALSE);
++ OCRvalue = 0;
++ }
++
++ do {
++ /* power up the card */
++ status = AdjustSlotPower(pHcd, &OCRvalue);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to adjust slot power \n"));
++ break;
++ }
++ status = SetOperationalBusMode(pHcd->pPseudoDev,&busMode);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus mode \n"));
++ break;
++ }
++ status = _IssueConfig(pHcd,SDCONFIG_SEND_INIT_CLOCKS,&initClocks,sizeof(initClocks));
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to send init clocks in hcd \n"));
++ break;
++ }
++
++ } while(FALSE);
++
++ return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ SDInitializeCard - initialize card
++ Input: pHcd - HCD object
++ Output: pProperties - card properties
++ Return:
++ Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDInitializeCard(PSDHCD pHcd)
++{
++ SDCONFIG_BUS_MODE_DATA busMode;
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ PSDREQUEST pReq = NULL;
++ UINT32 OCRvalue;
++ UINT32 tplAddr;
++ UINT8 temp;
++ struct SDIO_MANFID_TPL manfid;
++ SDCONFIG_WP_VALUE wpValue;
++ UINT8 cisBuffer[3];
++
++ OCRvalue = 0;
++
++ do {
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Initializing card in SPI mode \n"));
++ } else {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Initializing card in MMC/SD mode \n"));
++ }
++
++ pReq = AllocateRequest();
++ if (NULL == pReq) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to allocate bus request \n"));
++ break;
++ }
++ memset(pReq, 0, sizeof(SDREQUEST));
++
++ status = CardInitSetup(pHcd);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to setup card \n"));
++ break;
++ }
++ status = _IssueConfig(pHcd,SDCONFIG_GET_WP,&wpValue,sizeof(wpValue));
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: host doesn't support Write Protect \n"));
++ } else {
++ if (wpValue) {
++ pHcd->CardProperties.Flags |= CARD_SD_WP;
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: SD WP switch is on \n"));
++ }
++ }
++
++ if (!(pHcd->Attributes & SDHCD_ATTRIB_SLOT_POLLING) &&
++ IS_HCD_BUS_MODE_SPI(pHcd)) {
++ /* for non-slot polling HCDs operating in SPI mode
++ * issue CMD0 to reset card state and to place the card
++ * in SPI mode. If slot polling is used, the polling thread
++ * will have already issued a CMD0 to place the card in SPI mode*/
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ INT ii = 256;
++ status = SDIO_STATUS_ERROR;
++ /* if the CMD0 fails, retry it. Some cards have a hard time getting into SPI mode.*/
++ while ((!SDIO_SUCCESS(status)) && (ii-- >= 0)) {
++ status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,pReq);
++ OSSleep(20);
++ }
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: cmd0 go SPI retries:(256) %d\n", ii));
++
++ } else {
++ status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,pReq);
++ }
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: go-idle failed! \n"));
++ break;
++ }
++ }
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Looking for SDIO.. \n"));
++ /* check for SDIO card by trying to read it's OCR */
++ status = ReadOCR(pHcd,CARD_SDIO,pReq,0,&OCRvalue);
++ if (SDIO_SUCCESS(status)) {
++ /* we got a response, this is an SDIO card */
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ /* handle SPI */
++ pHcd->CardProperties.IOFnCount = SPI_SDIO_R4_GET_IO_FUNC_COUNT(pReq->Response);
++ if (SPI_SDIO_R4_IS_MEMORY_PRESENT(pReq->Response)) {
++ /* flag an SD function exists */
++ pHcd->CardProperties.Flags |= CARD_SD;
++ }
++ } else {
++ /* handle native SD */
++ pHcd->CardProperties.IOFnCount = SD_SDIO_R4_GET_IO_FUNC_COUNT(pReq->Response);
++ if (SD_SDIO_R4_IS_MEMORY_PRESENT(pReq->Response)) {
++ /* flag an SD function exists */
++ pHcd->CardProperties.Flags |= CARD_SD;
++ }
++
++ }
++ if (0 == pHcd->CardProperties.IOFnCount) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SDIO Card reports no functions \n"));
++ status = SDIO_STATUS_DEVICE_ERROR;
++ pHcd->CardProperties.Flags = 0;
++ break;
++ }
++ pHcd->CardProperties.Flags |= CARD_SDIO;
++
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO Bus Driver: SDIO Card, Functions: %d Card Info Flags:0x%X OCR:0x%8.8X\n",
++ pHcd->CardProperties.IOFnCount, pHcd->CardProperties.Flags, OCRvalue));
++ /* adjust slot power for this SDIO card */
++ status = AdjustSlotPower(pHcd, &OCRvalue);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set power in hcd \n"));
++ break;
++ }
++ /* poll for SDIO card ready */
++ status = PollCardReady(pHcd,OCRvalue,CARD_SDIO);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ } else if (status != SDIO_STATUS_BUS_RESP_TIMEOUT){
++ /* major error in hcd, bail */
++ break;
++ }
++
++ /* check if this is an SDIO-only card before continuing */
++ if (!(pHcd->CardProperties.Flags & CARD_SD) && (pHcd->CardProperties.Flags & CARD_SDIO)) {
++ /* this is an SDIO card with no memory function */
++ goto prepareCard;
++ }
++
++ if (!(pHcd->CardProperties.Flags & CARD_SDIO)) {
++ /* issue go idle only if we did not find an SDIO function in our earlier test */
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,pReq);
++ } else {
++ status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,pReq);
++ }
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: go-idle failed! \n"));
++ break;
++ }
++ }
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Looking for SD Memory.. \n"));
++ /* SD Memory Card checking */
++ /* test for present of SD card (stand-alone or combo card) */
++ status = TestPresence(pHcd, CARD_SD, pReq);
++ if (SDIO_SUCCESS(status)) {
++ /* there is an SD Card present, could be part of a combo system */
++ pHcd->CardProperties.Flags |= CARD_SD;
++ if (0 == OCRvalue) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD Memory card detected. \n"));
++ /* no OCR value on entry this is a stand-alone card, go and get it*/
++ status = ReadOCR(pHcd,CARD_SD,pReq,0,&OCRvalue);
++ if (!SDIO_SUCCESS(status) || (OCRvalue == 0)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get OCR (status:%d) \n",
++ status));
++ break;
++ }
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD Card Reports OCR:0x%8.8X \n", OCRvalue));
++ status = AdjustSlotPower(pHcd, &OCRvalue);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to adjust power \n"));
++ break;
++ }
++ } else {
++ DBG_ASSERT((pHcd->CardProperties.Flags & (CARD_SD | CARD_SDIO)));
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SDIO Combo Card detected \n"));
++ }
++ /* poll for SD card ready */
++ status = PollCardReady(pHcd,OCRvalue,CARD_SD);
++ if (!SDIO_SUCCESS(status)) {
++ /* check if this card has an SDIO function */
++ if (pHcd->CardProperties.Flags & CARD_SDIO) {
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Combo Detected but SD memory function failed \n"));
++ /* allow SDIO functions to load normally */
++ status = SDIO_STATUS_SUCCESS;
++ /* remove SD flag */
++ pHcd->CardProperties.Flags &= ~CARD_SD;
++ } else {
++ break;
++ }
++ } else {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD Memory ready. \n"));
++ }
++ /* we're done, no need to check for MMC */
++ goto prepareCard;
++ } else if (status != SDIO_STATUS_BUS_RESP_TIMEOUT){
++ /* major error in hcd, bail */
++ break;
++ }
++
++ /* MMC card checking */
++ /* if we get here, these better not be set */
++ DBG_ASSERT(!(pHcd->CardProperties.Flags & (CARD_SD | CARD_SDIO)));
++ /* issue go idle */
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,pReq);
++ } else {
++ status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,pReq);
++ }
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: go-idle failed! \n"));
++ break;
++ }
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Looking for MMC.. \n"));
++ status = TestPresence(pHcd, CARD_MMC, pReq);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: unknown card detected \n"));
++ break;
++ }
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: MMC Card Detected \n"));
++ pHcd->CardProperties.Flags |= CARD_MMC;
++ /* read the OCR value */
++ status = ReadOCR(pHcd,CARD_MMC,pReq,0,&OCRvalue);
++ if (!SDIO_SUCCESS(status) || (OCRvalue == 0)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Failed to get OCR (status:%d)",
++ status));
++ break;
++ }
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: MMC Card Reports OCR:0x%8.8X \n", OCRvalue));
++ /* adjust power */
++ status = AdjustSlotPower(pHcd, &OCRvalue);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to adjust power \n"));
++ break;
++ }
++ /* poll for MMC card ready */
++ status = PollCardReady(pHcd,OCRvalue,CARD_MMC);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ /* fall through and prepare MMC card */
++
++prepareCard:
++ /* we're done figuring out what was inserted, and setting up
++ * optimal slot voltage, now we need to prepare the card */
++ if (!IS_HCD_BUS_MODE_SPI(pHcd) &&
++ (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC))) {
++ /* non-SPI SD or MMC cards need to be moved to the "ident" state before we can get the
++ * RCA or select the card using the new RCA */
++ status = _IssueSimpleBusRequest(pHcd,CMD2,0,SDREQ_FLAGS_RESP_R2,pReq);
++ if (!SDIO_SUCCESS(status)){
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to move SD/MMC card into ident state \n"));
++ break;
++ }
++ }
++
++ if (!IS_HCD_BUS_MODE_SPI(pHcd)) {
++ /* non-SPI mode cards need their RCA's setup */
++ if (pHcd->CardProperties.Flags & (CARD_SD | CARD_SDIO)) {
++ /* issue CMD3 to get RCA on SD/SDIO cards */
++ status = _IssueSimpleBusRequest(pHcd,CMD3,0,SDREQ_FLAGS_RESP_R6,pReq);
++ if (!SDIO_SUCCESS(status)){
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to get RCA for SD/SDIO card \n"));
++ break;
++ }
++ pHcd->CardProperties.RCA = SD_R6_GET_RCA(pReq->Response);
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD/SDIO RCA:0x%X \n",
++ pHcd->CardProperties.RCA));
++ } else if (pHcd->CardProperties.Flags & CARD_MMC) {
++ /* for MMC cards, we have to assign a relative card address */
++ /* just a non-zero number */
++ pHcd->CardProperties.RCA = 1;
++ /* issue CMD3 to set the RCA for MMC cards */
++ status = _IssueSimpleBusRequest(pHcd,
++ CMD3,(pHcd->CardProperties.RCA << 16),
++ SDREQ_FLAGS_RESP_R1,pReq);
++ if (!SDIO_SUCCESS(status)){
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: failed to set RCA for MMC card! (err=%d) \n",status));
++ break;
++ }
++ } else {
++ DBG_ASSERT(FALSE);
++ }
++ }
++ /* select the card in order to get the rest of the card info, applies
++ * to SDIO/SD/MMC cards*/
++ status = SelectDeselectCard(pHcd, TRUE);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to select card! \n"));
++ break;
++ }
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver, Card now Selected.. \n"));
++
++ if (pHcd->CardProperties.Flags & CARD_SDIO) {
++ /* read SDIO revision register */
++ status = Cmd52ReadByteCommon(pHcd->pPseudoDev, CCCR_SDIO_REVISION_REG, &temp);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Revision Reg: 0x%X \n", temp));
++ switch (temp & SDIO_REV_MASK) {
++ case SDIO_REV_1_00:
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Spec Revision 1.00 \n"));
++ pHcd->CardProperties.SDIORevision = SDIO_REVISION_1_00;
++ break;
++ case SDIO_REV_1_10:
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Spec Revision 1.10 \n"));
++ pHcd->CardProperties.SDIORevision = SDIO_REVISION_1_10;
++ break;
++ case SDIO_REV_1_20:
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Spec Revision 1.20 \n"));
++ pHcd->CardProperties.SDIORevision = SDIO_REVISION_1_20;
++ break;
++ default:
++ DBG_PRINT(SDDBG_WARN, ("SDIO Warning: unknown SDIO revision, treating like 1.0 device \n"));
++ pHcd->CardProperties.SDIORevision = SDIO_REVISION_1_00;
++ break;
++ }
++ /* get the common CIS ptr */
++ status = Cmd52ReadMultipleCommon(pHcd->pPseudoDev,
++ SDIO_CMN_CIS_PTR_LOW_REG,
++ cisBuffer,
++ 3);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get CIS ptr, Err:%d", status));
++ break;
++ }
++ /* this is endian-safe*/
++ pHcd->CardProperties.CommonCISPtr = ((UINT32)cisBuffer[0]) |
++ (((UINT32)cisBuffer[1]) << 8) |
++ (((UINT32)cisBuffer[2]) << 16);
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Card CIS Ptr: 0x%X \n", pHcd->CardProperties.CommonCISPtr));
++ temp = sizeof(manfid);
++ tplAddr = pHcd->CardProperties.CommonCISPtr;
++ /* get the MANFID tuple */
++ status = SDLIB_FindTuple(pHcd->pPseudoDev,
++ CISTPL_MANFID,
++ &tplAddr,
++ (PUINT8)&manfid,
++ &temp);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Failed to get MANFID tuple err:%d \n", status));
++ status = SDIO_STATUS_SUCCESS;
++ } else {
++ /* save this off so that it can be copied into each SDIO Func's SDDEVICE structure */
++ pHcd->CardProperties.SDIO_ManufacturerCode =
++ CT_LE16_TO_CPU_ENDIAN(manfid.ManufacturerCode);
++ pHcd->CardProperties.SDIO_ManufacturerID =
++ CT_LE16_TO_CPU_ENDIAN(manfid.ManufacturerInfo);
++ DBG_PRINT(SDDBG_TRACE, ("SDIO MANFID:0x%X, MANFINFO:0x%X \n",
++ pHcd->CardProperties.SDIO_ManufacturerID,
++ pHcd->CardProperties.SDIO_ManufacturerCode));
++ }
++
++ if (pHcd->CardProperties.SDIORevision >= SDIO_REVISION_1_10) {
++ /* read power control */
++ status = Cmd52ReadByteCommon(pHcd->pPseudoDev, SDIO_POWER_CONTROL_REG, &temp);
++ if (SDIO_SUCCESS(status)) {
++ /* check for power control support which indicates the card may use more
++ * than 200 mA */
++ if (temp & SDIO_POWER_CONTROL_SMPC) {
++ /* check that the host can support this. */
++ if (pHcd->MaxSlotCurrent >= SDIO_EMPC_CURRENT_THRESHOLD) {
++ temp = SDIO_POWER_CONTROL_EMPC;
++ /* enable power control on the card */
++ status = Cmd52WriteByteCommon(pHcd->pPseudoDev, SDIO_POWER_CONTROL_REG, &temp);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Busdriver: failed to enable power control (%d) \n",status));
++ break;
++ }
++ /* mark that the card is high power */
++ pHcd->CardProperties.Flags |= CARD_HIPWR;
++
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO Busdriver: Power Control Enabled on SDIO (1.10 or greater) card \n"));
++ } else {
++ DBG_PRINT(SDDBG_WARN,
++ ("SDIO Busdriver: Card can operate higher than 200mA, host cannot (max:%d) \n",
++ pHcd->MaxSlotCurrent));
++ /* this is not fatal, the card should operate at a reduced rate */
++ }
++ } else {
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO Busdriver: SDIO 1.10 (or greater) card draws less than 200mA \n"));
++ }
++ } else {
++ DBG_PRINT(SDDBG_WARN,
++ ("SDIO Busdriver: failed to get POWER CONTROL REG (%d) \n",status));
++ /* fall through and continue on at reduced mode */
++ }
++ }
++ }
++ /* get the current bus parameters */
++ busMode.BusModeFlags = pHcd->CardProperties.BusMode;
++ busMode.ClockRate = pHcd->CardProperties.OperBusClock;
++ /* get the rest of the bus parameters like clock and supported bus width */
++ status = GetBusParameters(pHcd,&busMode);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ /* check HCD if it wants to run without SPI CRC */
++ if (pHcd->Attributes & SDHCD_ATTRIB_NO_SPI_CRC) {
++ /* hcd would rather not run with CRC we don't need to tell the card since SPI mode
++ * cards power up with CRC initially disabled */
++ busMode.BusModeFlags |= SDCONFIG_BUS_MODE_SPI_NO_CRC;
++ } else {
++ /* first enable SPI CRC checking if the HCD can handle it */
++ status = SDSPIModeEnableDisableCRC(pHcd->pPseudoDev, TRUE);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: Failed to set Enable SPI CRC on card \n"));
++ break;
++ }
++ }
++ }
++
++ status = SetOperationalBusMode(pHcd->pPseudoDev, &busMode);
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set operational bus mode\n"));
++ break;
++ }
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Oper. Mode: Clock:%d, Bus:0x%X \n",
++ pHcd->CardProperties.OperBusClock,pHcd->CardProperties.BusMode));
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Card in TRANS state, Ready: CardInfo Flags 0x%X \n",
++ pHcd->CardProperties.Flags));
++
++ } while (FALSE);
++
++ if (pReq != NULL) {
++ FreeRequest(pReq);
++ }
++
++ return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ SDQuerySDMMCInfo - query MMC card info
++ Input: pDevice - device
++ Output:
++ Return:
++ Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDQuerySDMMCInfo(PSDDEVICE pDevice)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ PSDREQUEST pReq = NULL;
++ UINT8 CID[MAX_CSD_CID_BYTES];
++
++ do {
++ pReq = AllocateRequest();
++ if (NULL == pReq) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++ /* de-select the card */
++ status = SelectDeselectCard(pDevice->pHcd,FALSE);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to deselect card before getting CID \n"));
++ break;
++ }
++
++ if (SDDEVICE_IS_BUSMODE_SPI(pDevice)) {
++ /* in SPI mode, getting the CSD requires a data transfer */
++ status = _IssueBusRequestBd(pDevice->pHcd,CMD10,0,
++ SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
++ pReq,
++ CID,
++ MAX_CSD_CID_BYTES);
++ if (SDIO_SUCCESS(status)) {
++ /* in SPI mode we need to reorder to the CID since SPI data comes in MSB first*/
++ ReorderBuffer(CID,MAX_CSD_CID_BYTES);
++ }
++ } else {
++ /* get the CID */
++ status = _IssueSimpleBusRequest(pDevice->pHcd,
++ CMD10,
++ (SDDEVICE_GET_CARD_RCA(pDevice) << 16),
++ SDREQ_FLAGS_RESP_R2,
++ pReq);
++ if (SDIO_SUCCESS(status)) {
++ /* extract it from the reponse */
++ memcpy(CID,pReq->Response,MAX_CSD_CID_BYTES);
++ }
++ }
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_WARN, ("SDQuerySDMMCInfo: failed to get CID. \n"));
++ status = SDIO_STATUS_SUCCESS;
++ } else {
++ pDevice->pId[0].SDMMC_ManfacturerID = GET_SD_CID_MANFID(CID);
++ pDevice->pId[0].SDMMC_OEMApplicationID = GET_SD_CID_OEMID(CID);
++#ifdef DEBUG
++ {
++ char pBuf[7];
++
++ pBuf[0] = GET_SD_CID_PN_1(CID);
++ pBuf[1] = GET_SD_CID_PN_2(CID);
++ pBuf[2] = GET_SD_CID_PN_3(CID);
++ pBuf[3] = GET_SD_CID_PN_4(CID);
++ pBuf[4] = GET_SD_CID_PN_5(CID);
++ if (pDevice->pHcd->CardProperties.Flags & CARD_MMC) {
++ pBuf[5] = GET_SD_CID_PN_6(CID);
++ pBuf[6] = 0;
++ } else {
++ pBuf[5] = 0;
++ }
++ DBG_PRINT(SDDBG_TRACE, ("SDQuerySDMMCInfo: Product String: %s\n", pBuf));
++ }
++#endif
++ DBG_PRINT(SDDBG_TRACE, ("SDQuerySDMMCInfo: ManfID: 0x%X, OEMID:0x%X \n",
++ pDevice->pId[0].SDMMC_ManfacturerID, pDevice->pId[0].SDMMC_OEMApplicationID));
++ }
++ /* re-select card */
++ status = SelectDeselectCard(pDevice->pHcd,TRUE);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to re-select card after getting CID \n"));
++ break;
++ }
++ } while (FALSE);
++
++ if (pReq != NULL) {
++ FreeRequest(pReq);
++ }
++
++ return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ SDQuerySDIOInfo - query SDIO card info
++ Input: pDevice - the device
++ Output:
++ Return:
++ Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDQuerySDIOInfo(PSDDEVICE pDevice)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ UINT32 faddress;
++ UINT8 fInfo;
++ UINT32 nextTpl;
++ UINT8 tplLength;
++ UINT8 cisPtrBuffer[3];
++ struct SDIO_FUNC_EXT_FUNCTION_TPL_1_1 funcTuple;
++
++ /* use the card-wide SDIO manufacturer code and ID previously read.*/
++ pDevice->pId[0].SDIO_ManufacturerCode = pDevice->pHcd->CardProperties.SDIO_ManufacturerCode;
++ pDevice->pId[0].SDIO_ManufacturerID = pDevice->pHcd->CardProperties.SDIO_ManufacturerID;
++
++ /* calculate function base address */
++ faddress = CalculateFBROffset(SDDEVICE_GET_SDIO_FUNCNO(pDevice));
++ DBG_ASSERT(faddress != 0);
++
++ do {
++ status = Cmd52ReadByteCommon(pDevice,
++ FBR_FUNC_INFO_REG_OFFSET(faddress),
++ &fInfo);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get function info, Err:%d , using Class:UNKNOWN\n", status));
++ fInfo = 0;
++ pDevice->pId[0].SDIO_FunctionClass = 0;
++ status = SDIO_STATUS_SUCCESS;
++ } else {
++ pDevice->pId[0].SDIO_FunctionClass = fInfo & FUNC_INFO_DEVICE_CODE_MASK;
++ }
++
++ if ((FUNC_INFO_DEVICE_CODE_LAST == pDevice->pId[0].SDIO_FunctionClass) &&
++ SDDEVICE_IS_SDIO_REV_GTEQ_1_10(pDevice)) {
++ /* if the device code is the last one, check for 1.1 revision and get the
++ * extended code */
++ status = Cmd52ReadByteCommon(pDevice,
++ FBR_FUNC_EXT_DEVICE_CODE_OFFSET(faddress),
++ &(pDevice->pId[0].SDIO_FunctionClass));
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get 1.1 extended DC, Err:%d\n",
++ status));
++ break;
++ }
++ }
++
++ /* get the function CIS ptr */
++ status = Cmd52ReadMultipleCommon(pDevice,
++ FBR_FUNC_CIS_LOW_OFFSET(faddress),
++ cisPtrBuffer,
++ 3);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get FN CIS ptr, Err:%d\n", status));
++ break;
++ }
++ /* endian safe */
++ pDevice->DeviceInfo.AsSDIOInfo.FunctionCISPtr = ((UINT32)cisPtrBuffer[0]) |
++ (((UINT32)cisPtrBuffer[1]) << 8) |
++ (((UINT32)cisPtrBuffer[2]) << 16);
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Function:%d, Class:%d FnCISPtr:0x%X \n",
++ SDDEVICE_GET_SDIO_FUNCNO(pDevice),
++ pDevice->pId[0].SDIO_FunctionClass,pDevice->DeviceInfo.AsSDIOInfo.FunctionCISPtr));
++
++ if (fInfo & FUNC_INFO_SUPPORTS_CSA_MASK) {
++ /* get the function CSA ptr */
++ status = Cmd52ReadMultipleCommon(pDevice,
++ FBR_FUNC_CSA_LOW_OFFSET(faddress),
++ cisPtrBuffer,
++ 3);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get FN CSA ptr, Err:%d \n", status));
++ break;
++ }
++ /* endian safe */
++ pDevice->DeviceInfo.AsSDIOInfo.FunctionCSAPtr = ((UINT32)cisPtrBuffer[0]) |
++ (((UINT32)cisPtrBuffer[1]) << 8) |
++ (((UINT32)cisPtrBuffer[2]) << 16);
++
++ }
++
++ nextTpl = SDDEVICE_GET_SDIO_FUNC_CISPTR(pDevice);
++ /* look for the funce TPL */
++ tplLength = sizeof(funcTuple);
++ /* go get the func CE tuple */
++ status = SDLIB_FindTuple(pDevice,
++ CISTPL_FUNCE,
++ &nextTpl,
++ (PUINT8)&funcTuple,
++ &tplLength);
++
++ if (!SDIO_SUCCESS(status)){
++ /* handles case of bad CIS or missing tupple, allow function driver to handle */
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Failed to get FuncCE Tuple: %d \n", status));
++ status = SDIO_STATUS_SUCCESS;
++ break;
++ }
++ /* set the max block size */
++ pDevice->DeviceInfo.AsSDIOInfo.FunctionMaxBlockSize =
++ CT_LE16_TO_CPU_ENDIAN(funcTuple.CommonInfo.MaxBlockSize);
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Function:%d, MaxBlocks:%d \n",
++ SDDEVICE_GET_SDIO_FUNCNO(pDevice),
++ pDevice->DeviceInfo.AsSDIOInfo.FunctionMaxBlockSize));
++
++ /* check for MANFID function tuple (SDIO 1.1 or greater) */
++ if (SDDEVICE_IS_SDIO_REV_GTEQ_1_10(pDevice)) {
++ struct SDIO_MANFID_TPL manfid;
++ nextTpl = SDDEVICE_GET_SDIO_FUNC_CISPTR(pDevice);
++ tplLength = sizeof(manfid);
++ /* get the MANFID tuple */
++ status = SDLIB_FindTuple(pDevice,
++ CISTPL_MANFID,
++ &nextTpl,
++ (PUINT8)&manfid,
++ &tplLength);
++ if (SDIO_SUCCESS(status)) {
++ /* this function has a MANFID tuple */
++ pDevice->pId[0].SDIO_ManufacturerCode =
++ CT_LE16_TO_CPU_ENDIAN(manfid.ManufacturerCode);
++ pDevice->pId[0].SDIO_ManufacturerID =
++ CT_LE16_TO_CPU_ENDIAN(manfid.ManufacturerInfo);
++ DBG_PRINT(SDDBG_TRACE, ("SDIO 1.1 (Function Specific) MANFID:0x%X, MANFINFO:0x%X \n",
++ pDevice->pId[0].SDIO_ManufacturerID,
++ pDevice->pId[0].SDIO_ManufacturerCode));
++ } else {
++ DBG_PRINT(SDDBG_WARN, ("SDIO 1.1, No CISTPL_MANFID Tuple in FUNC CIS \n"));
++ status = SDIO_STATUS_SUCCESS;
++ }
++ }
++ } while (FALSE);
++
++ return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ SDEnableFunction - enable function
++ Input: pDevice - the device/function
++ pEnData - enable data;
++ Output:
++ Return: status
++ Notes: Note, this performs synchronous calls
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDEnableFunction(PSDDEVICE pDevice, PSDCONFIG_FUNC_ENABLE_DISABLE_DATA pEnData)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ UINT8 registerValue;
++ UINT8 mask;
++ FUNC_ENABLE_TIMEOUT retry;
++
++ /* take the configure op lock to make this atomic */
++ status = SemaphorePendInterruptable(&pDevice->pHcd->ConfigureOpsSem);
++ if (!SDIO_SUCCESS(status)) {
++ return status;
++ }
++
++ status = SDIO_STATUS_INVALID_PARAMETER;
++ do {
++ if (!(pDevice->pHcd->CardProperties.Flags & CARD_SDIO)){
++ /* nothing to do if it's not an SDIO card */
++ break;
++ }
++
++ if (!((SDDEVICE_GET_SDIO_FUNCNO(pDevice) >= SDIO_FIRST_FUNCTION_NUMBER) &&
++ (SDDEVICE_GET_SDIO_FUNCNO(pDevice) <= SDIO_LAST_FUNCTION_NUMBER))){
++ DBG_ASSERT(FALSE);
++ break;
++ }
++ /* make sure there is a timeout value */
++ if (0 == pEnData->TimeOut) {
++ break;
++ }
++
++ mask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
++ /* read the enable register */
++ status = Cmd52ReadByteCommon(pDevice, SDIO_ENABLE_REG, ®isterValue);
++ if (!SDIO_SUCCESS(status)){
++ break;
++ }
++ if (pEnData->EnableFlags & SDCONFIG_ENABLE_FUNC) {
++ /* set the enable register bit */
++ registerValue |= mask;
++ } else {
++ /* clear the bit */
++ registerValue &= ~mask;
++ }
++
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO Bus Driver %s Function, Mask:0x%X Enable Reg Value:0x%2.2X\n",
++ (pEnData->EnableFlags & SDCONFIG_ENABLE_FUNC) ? "Enabling":"Disabling",
++ mask,
++ registerValue));
++
++ /* write it back out */
++ status = Cmd52WriteByteCommon(pDevice, SDIO_ENABLE_REG, ®isterValue);
++ if (!SDIO_SUCCESS(status)){
++ break;
++ }
++ /* now poll the ready bit until it sets or clears */
++ retry = pEnData->TimeOut;
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Function Enable/Disable Polling: %d retries \n",
++ retry));
++ while (retry) {
++ status = Cmd52ReadByteCommon(pDevice, SDIO_READY_REG, ®isterValue);
++ if (!SDIO_SUCCESS(status)){
++ break;
++ }
++ if (pEnData->EnableFlags & SDCONFIG_ENABLE_FUNC) {
++ /* if the bit is set, the device is ready */
++ if (registerValue & mask) {
++ /* device ready */
++ break;
++ }
++ } else {
++ if (!(registerValue & mask)) {
++ /* device is no longer ready */
++ break;
++ }
++ }
++ /* sleep before trying again */
++ status = OSSleep(1);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("OSSleep Failed! \n"));
++ break;
++ }
++ retry--;
++ }
++
++ if (0 == retry) {
++ status = SDIO_STATUS_FUNC_ENABLE_TIMEOUT;
++ break;
++ }
++
++ } while (FALSE);
++
++ SemaphorePost(&pDevice->pHcd->ConfigureOpsSem);
++ return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ SDAllocFreeSlotCurrent - allocate or free slot current
++ Input: pDevice - the device/function
++ Allocate - Allocate current, else free
++ pData - slotcurrent data (non-NULL if Allocate is TRUE)
++ Output:
++ Return: status
++ Notes: if the function returns SDIO_STATUS_NO_RESOURCES, the pData->SlotCurrent field is
++ updated with the available current
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDAllocFreeSlotCurrent(PSDDEVICE pDevice, BOOL Allocate, PSDCONFIG_FUNC_SLOT_CURRENT_DATA pData)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++ DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: SDAllocFreeSlotCurrent\n"));
++
++ /* take the configure op lock to make this atomic */
++ status = SemaphorePendInterruptable(&pDevice->pHcd->ConfigureOpsSem);
++ if (!SDIO_SUCCESS(status)) {
++ return status;
++ }
++
++ status = SDIO_STATUS_INVALID_PARAMETER;
++ do {
++ /* check the current budget and allocate */
++ if (Allocate) {
++ if (0 == pData->SlotCurrent) {
++ /* caller must specify current requirement for the power mode */
++ break;
++ }
++ if (pDevice->SlotCurrentAlloc != 0) {
++ /* slot current has already been allocated, caller needs to free
++ * first */
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Slot Current Already allocated! \n"));
++ break;
++ }
++ if (((UINT32)pDevice->pHcd->SlotCurrentAllocated + (UINT32)pData->SlotCurrent) >
++ (UINT32)pDevice->pHcd->MaxSlotCurrent) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Slot Current Budget exceeded, Requesting: %d, Allocated already: %d, Max: %d \n",
++ pData->SlotCurrent, pDevice->pHcd->SlotCurrentAllocated,
++ pDevice->pHcd->MaxSlotCurrent));
++ status = SDIO_STATUS_NO_RESOURCES;
++ /* return remaining */
++ pData->SlotCurrent = pDevice->pHcd->MaxSlotCurrent -
++ pDevice->pHcd->SlotCurrentAllocated;
++ break;
++ }
++ /* bump up allocation */
++ pDevice->pHcd->SlotCurrentAllocated += pData->SlotCurrent;
++ /* save this off for the call to free slot current */
++ pDevice->SlotCurrentAlloc = pData->SlotCurrent;
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Slot Current Requested: %d, New Total: %d, Max: %d \n",
++ pData->SlotCurrent, pDevice->pHcd->SlotCurrentAllocated,
++ pDevice->pHcd->MaxSlotCurrent));
++
++ } else {
++ if (0 == pDevice->SlotCurrentAlloc) {
++ /* no allocation */
++ break;
++ }
++ /* return the allocation back */
++ if (pDevice->SlotCurrentAlloc <= pDevice->pHcd->SlotCurrentAllocated) {
++ pDevice->pHcd->SlotCurrentAllocated -= pDevice->SlotCurrentAlloc;
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Slot Current Freed: %d, New Total: %d, Max: %d \n",
++ pDevice->SlotCurrentAlloc, pDevice->pHcd->SlotCurrentAllocated,
++ pDevice->pHcd->MaxSlotCurrent));
++ } else {
++ DBG_ASSERT(FALSE);
++ }
++
++ /* make sure this is zeroed */
++ pDevice->SlotCurrentAlloc = 0;
++ }
++
++ status = SDIO_STATUS_SUCCESS;
++
++ } while (FALSE);
++
++ SemaphorePost(&pDevice->pHcd->ConfigureOpsSem);
++ DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: SDAllocFreeSlotCurrent, %d\n", status));
++ return status;
++}
++
++static void RawHcdIrqControl(PSDHCD pHcd, BOOL Enable)
++{
++ SDIO_STATUS status;
++ SDCONFIG_SDIO_INT_CTRL_DATA irqData;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ ZERO_OBJECT(irqData);
++
++ status = _AcquireHcdLock(pHcd);
++ if (!SDIO_SUCCESS(status)) {
++ return;
++ }
++
++ do {
++ /* for raw devices, we simply enable/disable in the HCD only */
++ if (Enable) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver (RAW) Unmasking Int \n"));
++ irqData.IRQDetectMode = IRQ_DETECT_RAW;
++ irqData.SlotIRQEnable = TRUE;
++ } else {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver (RAW) Masking Int \n"));
++ irqData.SlotIRQEnable = FALSE;
++ }
++
++ status = _IssueConfig(pHcd,SDCONFIG_SDIO_INT_CTRL,
++ (PVOID)&irqData, sizeof(irqData));
++
++ if (!SDIO_SUCCESS(status)){
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver failed to enable/disable IRQ in (RAW) hcd :%d\n",
++ status));
++ }
++
++ } while (FALSE);
++
++ status = _ReleaseHcdLock(pHcd);
++}
++
++static void RawHcdEnableIrqPseudoComplete(PSDREQUEST pReq)
++{
++ if (SDIO_SUCCESS(pReq->Status)) {
++ RawHcdIrqControl((PSDHCD)pReq->pCompleteContext, TRUE);
++ }
++ FreeRequest(pReq);
++}
++
++static void RawHcdDisableIrqPseudoComplete(PSDREQUEST pReq)
++{
++ RawHcdIrqControl((PSDHCD)pReq->pCompleteContext, FALSE);
++ FreeRequest(pReq);
++}
++
++static void HcdIrqControl(PSDHCD pHcd, BOOL Enable)
++{
++ SDIO_STATUS status;
++ SDCONFIG_SDIO_INT_CTRL_DATA irqData;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ ZERO_OBJECT(irqData);
++
++ status = _AcquireHcdLock(pHcd);
++ if (!SDIO_SUCCESS(status)) {
++ return;
++ }
++
++ do {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: HcdIrqControl (%s), IrqsEnabled:0x%X \n",
++ Enable ? "Enable":"Disable",pHcd->IrqsEnabled ));
++
++ if (Enable) {
++ irqData.SlotIRQEnable = TRUE;
++ } else {
++ irqData.SlotIRQEnable = FALSE;
++ }
++ /* setup HCD to enable/disable it's detection hardware */
++ if (irqData.SlotIRQEnable) {
++ /* set the IRQ detection mode */
++ switch (SDCONFIG_GET_BUSWIDTH(pHcd->CardProperties.BusMode)) {
++ case SDCONFIG_BUS_WIDTH_SPI:
++ irqData.IRQDetectMode = IRQ_DETECT_SPI;
++ break;
++ case SDCONFIG_BUS_WIDTH_1_BIT:
++ irqData.IRQDetectMode = IRQ_DETECT_1_BIT;
++ break;
++ case SDCONFIG_BUS_WIDTH_4_BIT:
++ irqData.IRQDetectMode = IRQ_DETECT_4_BIT;
++ /* check card and HCD for 4bit multi-block interrupt support */
++ if ((pHcd->CardProperties.SDIOCaps & SDIO_CAPS_INT_MULTI_BLK) &&
++ (pHcd->Attributes & SDHCD_ATTRIB_MULTI_BLK_IRQ)) {
++ /* note: during initialization of the card, the mult-blk IRQ support
++ * is enabled in card caps register */
++ irqData.IRQDetectMode |= IRQ_DETECT_MULTI_BLK;
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver enabling IRQ in multi-block mode:\n"));
++ }
++ break;
++ default:
++ DBG_ASSERT(FALSE);
++ break;
++ }
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver enabling IRQ in HCD Mode:0x%X\n",
++ irqData.IRQDetectMode));
++ }
++
++ status = _IssueConfig(pHcd,SDCONFIG_SDIO_INT_CTRL,
++ (PVOID)&irqData, sizeof(irqData));
++ if (!SDIO_SUCCESS(status)){
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver failed to enable/disable IRQ in hcd %d\n",
++ status));
++ }
++
++ } while (FALSE);
++
++ status = _ReleaseHcdLock(pHcd);
++}
++
++static BOOL CheckWriteIntEnableSuccess(PSDREQUEST pReq)
++{
++ if (!SDIO_SUCCESS(pReq->Status)){
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get write INT Enable register Err:%d\n",
++ pReq->Status));
++ return FALSE;
++ }
++
++ if (SD_R5_GET_RESP_FLAGS(pReq->Response) & SD_R5_ERRORS) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: WriteIntEnableComplete CMD52 resp error: 0x%X \n",
++ SD_R5_GET_RESP_FLAGS(pReq->Response)));
++ return FALSE;
++ }
++
++ return TRUE;
++}
++
++static void HcdIrqEnableComplete(PSDREQUEST pReq)
++{
++ if (CheckWriteIntEnableSuccess(pReq)) {
++ /* configure HCD */
++ HcdIrqControl((PSDHCD)pReq->pCompleteContext, TRUE);
++ }
++ FreeRequest(pReq);
++}
++
++static void HcdIrqDisableComplete(PSDREQUEST pReq)
++{
++ CheckWriteIntEnableSuccess(pReq);
++ HcdIrqControl((PSDHCD)pReq->pCompleteContext, FALSE);
++ FreeRequest(pReq);
++}
++
++static void WriteIntEnableComplete(PSDREQUEST pReq)
++{
++ if (CheckWriteIntEnableSuccess(pReq)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Wrote INT Enable value:0x%X \n",
++ (INT)pReq->pCompleteContext));
++ }
++ FreeRequest(pReq);
++}
++
++static void HcdAckComplete(PSDREQUEST pReq)
++{
++ SDIO_STATUS status;
++ DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: Hcd (0x%X) Irq Ack \n",
++ (INT)pReq->pCompleteContext));
++ /* re-arm the HCD */
++ status = _IssueConfig((PSDHCD)pReq->pCompleteContext,SDCONFIG_SDIO_REARM_INT,NULL,0);
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: HCD Re-Arm failed : %d\n",
++ status));
++ }
++ FreeRequest(pReq);
++}
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ SDFunctionAckInterrupt - handle device interrupt acknowledgement
++ Input: pDevice - the device
++ Output:
++ Return:
++ Notes:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDFunctionAckInterrupt(PSDDEVICE pDevice)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ UCHAR mask;
++ PSDREQUEST pReq = NULL;
++ BOOL setHcd = FALSE;
++ SDIO_STATUS status2;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ pReq = AllocateRequest();
++ if (NULL == pReq) {
++ return SDIO_STATUS_NO_RESOURCES;
++ }
++
++ status = _AcquireHcdLock(pDevice->pHcd);
++
++ if (!SDIO_SUCCESS(status)) {
++ FreeRequest(pReq);
++ return status;
++ }
++
++ do {
++ if (!((SDDEVICE_GET_SDIO_FUNCNO(pDevice) >= SDIO_FIRST_FUNCTION_NUMBER) &&
++ (SDDEVICE_GET_SDIO_FUNCNO(pDevice) <= SDIO_LAST_FUNCTION_NUMBER))){
++ status = SDIO_STATUS_INVALID_PARAMETER;
++ DBG_ASSERT(FALSE);
++ break;
++ }
++ mask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
++ if (pDevice->pHcd->PendingIrqAcks & mask) {
++ /* clear the ack bit in question */
++ pDevice->pHcd->PendingIrqAcks &= ~mask;
++ if (0 == pDevice->pHcd->PendingIrqAcks) {
++ pDevice->pHcd->IrqProcState = SDHCD_IDLE;
++ /* no pending acks, so re-arm if irqs are stilled enabled */
++ if (pDevice->pHcd->IrqsEnabled) {
++ setHcd = TRUE;
++ /* issue pseudo request to sync this with bus requests */
++ pReq->Status = SDIO_STATUS_SUCCESS;
++ pReq->pCompletion = HcdAckComplete;
++ pReq->pCompleteContext = pDevice->pHcd;
++ pReq->Flags = SD_PSEUDO_REQ_FLAGS;
++ }
++ }
++ } else {
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: AckInterrupt: no IRQ pending on Function :%d, \n",
++ SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
++ }
++ } while (FALSE);
++
++ status2 = ReleaseHcdLock(pDevice);
++
++ if (pReq != NULL) {
++ if (SDIO_SUCCESS(status) && (setHcd)) {
++ /* issue request */
++ IssueRequestToHCD(pDevice->pHcd,pReq);
++ } else {
++ FreeRequest(pReq);
++ }
++ }
++
++ return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ SDMaskUnmaskFunctionIRQ - mask/unmask function IRQ
++ Input: pDevice - the device/function
++ MaskInt - mask interrupt
++ Output:
++ Return: status
++ Notes: Note, this function can be called from an ISR or completion context
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDMaskUnmaskFunctionIRQ(PSDDEVICE pDevice, BOOL MaskInt)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ UINT8 mask;
++ UINT8 controlVal;
++ BOOL setHcd;
++ PSDREQUEST pReq = NULL;
++ SDIO_STATUS status2;
++
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ setHcd = FALSE;
++
++ pReq = AllocateRequest();
++ if (NULL == pReq) {
++ return SDIO_STATUS_NO_RESOURCES;
++ }
++
++ status = _AcquireHcdLock(pDevice->pHcd);
++
++ if (!SDIO_SUCCESS(status)) {
++ FreeRequest(pReq);
++ return status;
++ }
++
++ do {
++
++ if (pDevice->pHcd->CardProperties.Flags & CARD_RAW) {
++ if (!MaskInt) {
++ if (!pDevice->pHcd->IrqsEnabled) {
++ pReq->pCompletion = RawHcdEnableIrqPseudoComplete;
++ setHcd = TRUE;
++ pDevice->pHcd->IrqsEnabled = 1 << 1;
++ }
++ } else {
++ if (pDevice->pHcd->IrqsEnabled) {
++ pReq->pCompletion = RawHcdDisableIrqPseudoComplete;
++ setHcd = TRUE;
++ pDevice->pHcd->IrqsEnabled = 0;
++ }
++ }
++
++ if (setHcd) {
++ /* hcd IRQ control requests must be synched with outstanding
++ * bus requests so we issue a pseudo bus request */
++ pReq->pCompleteContext = pDevice->pHcd;
++ pReq->Flags = SD_PSEUDO_REQ_FLAGS;
++ pReq->Status = SDIO_STATUS_SUCCESS;
++ } else {
++ /* no request to submit, just free it */
++ FreeRequest(pReq);
++ pReq = NULL;
++ }
++ /* we're done, submit the bus request if any */
++ break;
++ }
++
++ if (!(pDevice->pHcd->CardProperties.Flags & CARD_SDIO)){
++ /* nothing to do if it's not an SDIO card */
++ DBG_ASSERT(FALSE);
++ status = SDIO_STATUS_INVALID_PARAMETER;
++ break;
++ }
++
++ if (!((SDDEVICE_GET_SDIO_FUNCNO(pDevice) >= SDIO_FIRST_FUNCTION_NUMBER) &&
++ (SDDEVICE_GET_SDIO_FUNCNO(pDevice) <= SDIO_LAST_FUNCTION_NUMBER))){
++ status = SDIO_STATUS_INVALID_PARAMETER;
++ DBG_ASSERT(FALSE);
++ break;
++ }
++
++ mask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
++ if (!MaskInt) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver Unmasking Int, Mask:0x%X\n", mask));
++ /* check interrupts that were enabled on entry */
++ if (0 == pDevice->pHcd->IrqsEnabled) {
++ /* need to turn on interrupts in HCD */
++ setHcd = TRUE;
++ /* use this completion routine */
++ pReq->pCompletion = HcdIrqEnableComplete;
++ }
++ /* set the enable bit, in the shadow register */
++ pDevice->pHcd->IrqsEnabled |= mask;
++ /* make sure control value includes the master enable */
++ controlVal = pDevice->pHcd->IrqsEnabled | SDIO_INT_MASTER_ENABLE;
++ } else {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver Masking Int, Mask:0x%X\n", mask));
++ /* clear the bit */
++ pDevice->pHcd->IrqsEnabled &= ~mask;
++ /* check and see if this clears all the bits */
++ if (0 == pDevice->pHcd->IrqsEnabled){
++ /* if none of the functions are enabled, clear this register */
++ controlVal = 0;
++ /* disable in host */
++ setHcd = TRUE;
++ /* use this completion routine */
++ pReq->pCompletion = HcdIrqDisableComplete;
++ } else {
++ /* set control value making sure master enable is left on */
++ controlVal = pDevice->pHcd->IrqsEnabled | SDIO_INT_MASTER_ENABLE;
++ }
++ }
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver INT_ENABLE_REG value:0x%X\n", controlVal));
++ /* setup bus request to update the mask register */
++ SDIO_SET_CMD52_WRITE_ARG(pReq->Argument,0,SDIO_INT_ENABLE_REG,controlVal);
++ pReq->Command = CMD52;
++ pReq->Flags = SDREQ_FLAGS_TRANS_ASYNC | SDREQ_FLAGS_RESP_SDIO_R5;
++
++ if (setHcd) {
++ /* make this a barrier request and set context*/
++ pReq->Flags |= SDREQ_FLAGS_BARRIER;
++ pReq->pCompleteContext = pDevice->pHcd;
++ } else {
++ /* does not require an update to the HCD */
++ pReq->pCompleteContext = (PVOID)(UINT32)controlVal;
++ pReq->pCompletion = WriteIntEnableComplete;
++ }
++
++ } while (FALSE);
++
++ status2 = _ReleaseHcdLock(pDevice->pHcd);
++
++ if (pReq != NULL) {
++ if (SDIO_SUCCESS(status)) {
++ /* issue request */
++ IssueRequestToHCD(pDevice->pHcd,pReq);
++ } else {
++ FreeRequest(pReq);
++ }
++ }
++
++ return status;
++}
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ SDSPIModeEnableDisableCRC - Enable/Disable SPI Mode CRC checking
++ Input: pDevice - the device/function
++ Enable - Enable CRC
++ Output:
++ Return: status
++ Notes: Note, this function can be called from an ISR or completion context
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDSPIModeEnableDisableCRC(PSDDEVICE pDevice,BOOL Enable)
++{
++ SDCONFIG_BUS_MODE_DATA busMode;
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ UINT32 cmdARG = 0;
++
++ if (!SDDEVICE_IS_BUSMODE_SPI(pDevice)) {
++ return SDIO_STATUS_INVALID_PARAMETER;
++ }
++ //??we should make these atomic using a barrier
++
++ /* get the current mode and clock */
++ busMode.BusModeFlags = pDevice->pHcd->CardProperties.BusMode;
++ busMode.ClockRate = pDevice->pHcd->CardProperties.OperBusClock;
++
++ if (Enable) {
++ /* clear the no-CRC flag */
++ busMode.BusModeFlags &= ~SDCONFIG_BUS_MODE_SPI_NO_CRC;
++ cmdARG = SD_CMD59_CRC_ON;
++ } else {
++ busMode.BusModeFlags |= SDCONFIG_BUS_MODE_SPI_NO_CRC;
++ cmdARG = SD_CMD59_CRC_OFF;
++ }
++
++ do {
++ /* issue CMD59 to turn on/off CRC */
++ status = _IssueSimpleBusRequest(pDevice->pHcd,
++ CMD59,
++ cmdARG,
++ SDREQ_FLAGS_RESP_R1,
++ NULL);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed issue CMD59 (arg=0x%X) Err:%d \n",
++ cmdARG, status));
++ break;
++ }
++ if (Enable) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: CRC Enabled in SPI mode \n"));
++ } else {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: CRC Disabled in SPI mode \n"));
++ }
++ status = SetOperationalBusMode(pDevice,&busMode);
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set SPI NO CRC mode in hcd : Err:%d \n",
++ status));
++ break;
++ }
++ } while (FALSE);
++
++ return status;
++}
++
++
++static UINT32 ConvertSPIStatusToSDCardStatus(UINT8 SpiR1, UINT8 SpiR2)
++{
++ UINT32 cardStatus = 0;
++
++ if (SpiR1 != 0) {
++ /* convert the error */
++ if (SpiR1 & SPI_CS_ERASE_RESET) {
++ cardStatus |= SD_CS_ERASE_RESET;
++ }
++ if (SpiR1 & SPI_CS_ILLEGAL_CMD) {
++ cardStatus |= SD_CS_ILLEGAL_CMD_ERR;
++ }
++ if (SpiR1 & SPI_CS_CMD_CRC_ERR) {
++ cardStatus |= SD_CS_PREV_CMD_CRC_ERR;
++ }
++ if (SpiR1 & SPI_CS_ERASE_SEQ_ERR) {
++ cardStatus |= SD_CS_ERASE_SEQ_ERR;
++ }
++ if (SpiR1 & SPI_CS_ADDRESS_ERR) {
++ cardStatus |= SD_CS_ADDRESS_ERR;
++ }
++ if (SpiR1 & SPI_CS_PARAM_ERR) {
++ cardStatus |= SD_CS_CMD_OUT_OF_RANGE;
++ }
++ }
++
++ if (SpiR2 != 0) {
++ /* convert the error */
++ if (SpiR2 & SPI_CS_CARD_IS_LOCKED) {
++ cardStatus |= SD_CS_CARD_LOCKED;
++ }
++ if (SpiR2 & SPI_CS_LOCK_UNLOCK_FAILED) {
++ /* this bit is shared, just set both */
++ cardStatus |= (SD_CS_LK_UNLK_FAILED | SD_CS_WP_ERASE_SKIP);
++ }
++ if (SpiR2 & SPI_CS_ERROR) {
++ cardStatus |= SD_CS_GENERAL_ERR;
++ }
++ if (SpiR2 & SPI_CS_INTERNAL_ERROR) {
++ cardStatus |= SD_CS_CARD_INTERNAL_ERR;
++ }
++ if (SpiR2 & SPI_CS_ECC_FAILED) {
++ cardStatus |= SD_CS_ECC_FAILED;
++ }
++ if (SpiR2 & SPI_CS_WP_VIOLATION) {
++ cardStatus |= SD_CS_WP_ERR;
++ }
++ if (SpiR2 & SPI_CS_ERASE_PARAM_ERR) {
++ cardStatus |= SD_CS_ERASE_PARAM_ERR;
++ }
++ if (SpiR2 & SPI_CS_OUT_OF_RANGE) {
++ cardStatus |= SD_CS_CMD_OUT_OF_RANGE;
++ }
++ }
++
++ return cardStatus;
++}
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ ConvertSPI_Response - filter the SPI response and convert it to an SD Response
++ Input: pReq - request
++ Output: pReq - modified response, if pRespBuffer is not NULL
++ pRespBuffer - converted response (optional)
++ Return:
++ Notes: This function converts a SPI response into an SD response. A caller
++ can supply a buffer instead.
++ For SPI bus operation the HCD must send the SPI response as
++ a stream of bytes, the highest byte contains the first received byte from the
++ card. This function only filters simple responses (R1 primarily).
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void ConvertSPI_Response(PSDREQUEST pReq, UINT8 *pRespBuffer)
++{
++
++ UINT32 cardStatus;
++
++ if (pReq->Flags & SDREQ_FLAGS_RESP_SPI_CONVERTED) {
++ /* already converted */
++ return;
++ }
++ if (NULL == pRespBuffer) {
++ pRespBuffer = pReq->Response;
++ }
++
++ switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++ case SDREQ_FLAGS_RESP_R1:
++ case SDREQ_FLAGS_RESP_R1B:
++ cardStatus = ConvertSPIStatusToSDCardStatus(GET_SPI_R1_RESP_TOKEN(pReq->Response),
++ 0);
++ if (CMD55 == pReq->Command) {
++ /* we emulate this since SPI does not have such a bit */
++ cardStatus |= SD_CS_APP_CMD;
++ }
++ /* stuff the SD card status */
++ SD_R1_SET_CMD_STATUS(pRespBuffer,cardStatus);
++ /* stuff the command */
++ SD_R1_SET_CMD(pRespBuffer,pReq->Command);
++ pReq->Flags |= SDREQ_FLAGS_RESP_SPI_CONVERTED;
++ break;
++ case SDREQ_FLAGS_RESP_SDIO_R5:
++ {
++ UINT8 respFlags;
++ UINT8 readData;
++
++ readData = GET_SPI_SDIO_R5_RESPONSE_RDATA(pReq->Response);
++ respFlags = GET_SPI_SDIO_R5_RESP_TOKEN(pReq->Response);
++
++ pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] = 0;
++ if (respFlags != 0) {
++ if (respFlags & SPI_R5_ILLEGAL_CMD) {
++ pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] |= SD_R5_ILLEGAL_CMD;
++ }
++ if (respFlags & SPI_R5_CMD_CRC) {
++ pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] |= SD_R5_RESP_CMD_ERR;
++ }
++ if (respFlags & SPI_R5_FUNC_ERR) {
++ pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] |= SD_R5_INVALID_FUNC;
++ }
++ if (respFlags & SPI_R5_PARAM_ERR) {
++ pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] |= SD_R5_ARG_RANGE_ERR;
++ }
++ }
++ /* stuff read data */
++ pRespBuffer[SD_SDIO_R5_READ_DATA_OFFSET] = readData;
++ /* stuff the command */
++ SD_R5_SET_CMD(pRespBuffer,pReq->Command);
++ }
++ pReq->Flags |= SDREQ_FLAGS_RESP_SPI_CONVERTED;
++ break;
++ case SDREQ_FLAGS_RESP_R2:
++ /* for CMD13 and ACMD13 , SPI uses it's own R2 response format (2 bytes) */
++ /* the issue of CMD13 needs to change the response flag to R2 */
++ if (CMD13 == pReq->Command) {
++ cardStatus = ConvertSPIStatusToSDCardStatus(
++ GET_SPI_R2_RESP_TOKEN(pReq->Response),
++ GET_SPI_R2_STATUS_TOKEN(pReq->Response));
++ /* stuff the SD card status */
++ SD_R1_SET_CMD_STATUS(pRespBuffer,cardStatus);
++ /* stuff the command */
++ SD_R1_SET_CMD(pRespBuffer,pReq->Command);
++ pReq->Flags |= SDREQ_FLAGS_RESP_SPI_CONVERTED;
++ break;
++ }
++ /* no other commands should be using R2 when using SPI, if they are
++ * they should be bypassing the filter */
++ DBG_ASSERT(FALSE);
++ break;
++ default:
++ /* for all others:
++ *
++ * SDREQ_FLAGS_RESP_R6 - SPI mode does not use RCA
++ * SDREQ_FLAGS_RESP_R3 - bus driver handles this internally
++ * SDREQ_FLAGS_RESP_SDIO_R4 - bus driver handles this internally
++ *
++ */
++ DBG_PRINT(SDDBG_ERROR, ("ConvertSPI_Response - invalid response type:0x%2.2X",
++ GET_SDREQ_RESP_TYPE(pReq->Flags)));
++ DBG_ASSERT(FALSE);
++ break;
++ }
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Check an SD/MMC/SDIO response.
++
++ @function name: SDIO_CheckResponse
++ @prototype: SDIO_STATUS SDIO_CheckResponse(PSDHCD pHcd, PSDREQUEST pReq, SDHCD_RESPONSE_CHECK_MODE CheckMode)
++ @category: HD_Reference
++
++ @input: pHcd - the host controller definition structure.
++ @input: pReq - request containing the response
++ @input: CheckMode - mode
++
++ @return: SDIO_STATUS
++
++ @notes: Host controller drivers must call into this function to validate various command
++ responses before continuing with data transfers or for decoding received SPI tokens.
++ The CheckMode option determines the type of validation to perform.
++ if (CheckMode == SDHCD_CHECK_DATA_TRANS_OK) :
++ The host controller must check the card response to determine whether it
++ is safe to perform a data transfer. This API only checks commands that
++ involve data transfers and checks various status fields in the command response.
++ If the card cannot accept data, this function will return a non-successful status that
++ should be treated as a request failure. The host driver should complete the request with the
++ returned status. Host controller should only call this function in preparation for a
++ data transfer.
++ if (CheckMode == SDHCD_CHECK_SPI_TOKEN) :
++ This API checks the SPI token and returns a timeout status if the illegal command bit is
++ set. This simulates the behavior of SD 1/4 bit operation where illegal commands result in
++ a command timeout. A driver that supports SPI mode should pass every response to this
++ function to determine the appropriate error status to complete the request with. If the
++ API returns success, the response indicates that the card accepted the command.
++
++ @example: Checking the response before starting the data transfer :
++ if (SDIO_SUCCESS(status) && (pReq->Flags & SDREQ_FLAGS_DATA_TRANS)) {
++ // check the response to see if we should continue with data
++ status = SDIO_CheckResponse(pHcd, pReq, SDHCD_CHECK_DATA_TRANS_OK);
++ if (SDIO_SUCCESS(status)) {
++ .... start data transfer phase
++ } else {
++ ... card response indicates that the card cannot handle data
++ // set completion status
++ pRequest->Status = status;
++ }
++ }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ _SDIO_CheckResponse - check response on behalf of the host controller
++ Input: pHcd - host controller
++ pReq - request containing the response
++ CheckMode - mode
++ Output:
++ Return: status
++ Notes:
++
++ CheckMode == SDHCD_CHECK_DATA_TRANS_OK :
++ The host controller requests a check on the response to determine whether it
++ is okay to perform a data transfer. This function only filters on commands that
++ involve data. Host controller should only call this function in preparation for a
++ data transfer.
++
++ CheckMode == SDHCD_CHECK_SPI_TOKEN :
++ The bus driver checks the SPI token and returns a timeout status if the illegal command bit is
++ set. This simulates the behavior of SD native operation.
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDIO_CheckResponse(PSDHCD pHcd, PSDREQUEST pReq, SDHCD_RESPONSE_CHECK_MODE CheckMode)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++ if (CheckMode == SDHCD_CHECK_DATA_TRANS_OK) {
++ UINT32 cardStatus;
++ UINT8 *pResponse;
++ UINT8 convertedResponse[MAX_CARD_RESPONSE_BYTES];
++
++ if (!(pReq->Flags & SDREQ_FLAGS_DATA_TRANS) ||
++ (pReq->Flags & SDREQ_FLAGS_DATA_SKIP_RESP_CHK) ||
++ (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_NO_RESP)) {
++ return SDIO_STATUS_SUCCESS;
++ }
++ pResponse = pReq->Response;
++ /* check SPI mode */
++ if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++ if (!(pReq->Flags & SDREQ_FLAGS_RESP_SKIP_SPI_FILT)) {
++ /* apply conversion */
++ ConvertSPI_Response(pReq, NULL);
++ } else {
++ /* temporarily convert the response, without altering the original */
++ ConvertSPI_Response(pReq, convertedResponse);
++ /* point to the converted one */
++ pResponse = convertedResponse;
++ }
++ }
++
++ switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++ case SDREQ_FLAGS_RESP_R1:
++ case SDREQ_FLAGS_RESP_R1B:
++ cardStatus = SD_R1_GET_CARD_STATUS(pResponse);
++ if (!(cardStatus &
++ (SD_CS_ILLEGAL_CMD_ERR | SD_CS_CARD_INTERNAL_ERR | SD_CS_GENERAL_ERR))) {
++ /* okay for data */
++ break;
++ }
++ /* figure out what it was */
++ if (cardStatus & SD_CS_ILLEGAL_CMD_ERR) {
++ status = SDIO_STATUS_DATA_STATE_INVALID;
++ } else {
++ status = SDIO_STATUS_DATA_ERROR_UNKNOWN;
++ }
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Check Response Error. R1 CardStatus:0x%X \n",
++ cardStatus));
++ break;
++ case SDREQ_FLAGS_RESP_SDIO_R5:
++ cardStatus = SD_R5_GET_RESP_FLAGS(pResponse);
++ if (!(cardStatus & SD_R5_CURRENT_CMD_ERRORS)){
++ /* all okay */
++ break;
++ }
++
++ status = ConvertCMD52ResponseToSDIOStatus((UINT8)cardStatus);
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Check Response Error. R5 CardStatus:0x%X \n",
++ cardStatus));
++ break;
++ default:
++ break;
++ }
++
++ return status;
++ }
++
++ {
++ UINT8 spiToken;
++
++ /* handle SPI token validation */
++ switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++ case SDREQ_FLAGS_RESP_R2:
++ spiToken = GET_SPI_R2_RESP_TOKEN(pReq->Response);
++ break;
++ case SDREQ_FLAGS_RESP_SDIO_R5:
++ spiToken = GET_SPI_SDIO_R5_RESP_TOKEN(pReq->Response);
++ break;
++ case SDREQ_FLAGS_RESP_R3:
++ spiToken = GET_SPI_R3_RESP_TOKEN(pReq->Response);
++ break;
++ case SDREQ_FLAGS_RESP_SDIO_R4:
++ spiToken = GET_SPI_SDIO_R4_RESP_TOKEN(pReq->Response);
++ break;
++ default:
++ /* all other tokesn are SPI R1 type */
++ spiToken = GET_SPI_R1_RESP_TOKEN(pReq->Response);
++ break;
++ }
++
++ if ((GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_SDIO_R5) ||
++ (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_SDIO_R4)) {
++ /* handle SDIO status tokens */
++ if ((spiToken & SPI_R5_ILLEGAL_CMD) ||
++ (spiToken & SPI_R5_CMD_CRC)) {
++ status = SDIO_STATUS_BUS_RESP_TIMEOUT;
++ }
++ } else {
++ /* handle all other status tokens */
++ if ((spiToken & SPI_CS_ILLEGAL_CMD) ||
++ (spiToken & SPI_CS_CMD_CRC_ERR)) {
++ status = SDIO_STATUS_BUS_RESP_TIMEOUT;
++ }
++ }
++ }
++
++ return status;
++}
++
+Index: linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus_os.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus_os.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,832 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: sdio_bus_os.c
++
++@abstract: Linux implementation module
++
++#notes: includes module load and unload functions
++
++@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++/* debug level for this module*/
++#define DBG_DECLARE 3;
++
++#include <linux/sdio/ctsystem.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/version.h>
++#include <linux/init.h>
++#include <linux/workqueue.h>
++#include <linux/delay.h>
++#include <linux/kthread.h>
++#include <linux/pnp.h>
++void pnp_remove_card_device(struct pnp_dev *dev);
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/sdio_lib.h>
++#include "_busdriver.h"
++
++#define DESCRIPTION "SDIO Bus Driver"
++#define AUTHOR "Atheros Communications, Inc."
++
++/* debug print parameter */
++/* configuration and default parameters */
++static int RequestRetries = SDMMC_DEFAULT_CMD_RETRIES;
++module_param(RequestRetries, int, 0644);
++MODULE_PARM_DESC(RequestRetries, "number of command retries");
++static int CardReadyPollingRetry = SDMMC_DEFAULT_CARD_READY_RETRIES;
++module_param(CardReadyPollingRetry, int, 0644);
++MODULE_PARM_DESC(CardReadyPollingRetry, "number of card ready retries");
++static int PowerSettleDelay = SDMMC_POWER_SETTLE_DELAY;
++module_param(PowerSettleDelay, int, 0644);
++MODULE_PARM_DESC(PowerSettleDelay, "delay in ms for power to settle after power changes");
++static int DefaultOperClock = 52000000;
++module_param(DefaultOperClock, int, 0644);
++MODULE_PARM_DESC(DefaultOperClock, "maximum operational clock limit");
++static int DefaultBusMode = SDCONFIG_BUS_WIDTH_4_BIT;
++module_param(DefaultBusMode, int, 0644);
++MODULE_PARM_DESC(DefaultBusMode, "default bus mode: see SDCONFIG_BUS_WIDTH_xxx");
++static int RequestListSize = SDBUS_DEFAULT_REQ_LIST_SIZE;
++module_param(RequestListSize, int, 0644);
++MODULE_PARM_DESC(RequestListSize, "");
++static int SignalSemListSize = SDBUS_DEFAULT_REQ_SIG_SIZE;
++module_param(SignalSemListSize, int, 0644);
++MODULE_PARM_DESC(SignalSemListSize, "");
++static int CDPollingInterval = SDBUS_DEFAULT_CD_POLLING_INTERVAL;
++module_param(CDPollingInterval, int, 0644);
++MODULE_PARM_DESC(CDPollingInterval, "");
++static int DefaultOperBlockLen = SDMMC_DEFAULT_BYTES_PER_BLOCK;
++module_param(DefaultOperBlockLen, int, 0644);
++MODULE_PARM_DESC(DefaultOperBlockLen, "operational block length");
++static int DefaultOperBlockCount = SDMMC_DEFAULT_BLOCKS_PER_TRANS;
++module_param(DefaultOperBlockCount, int, 0644);
++MODULE_PARM_DESC(DefaultOperBlockCount, "operational block count");
++static int ConfigFlags = BD_DEFAULT_CONFIG_FLAGS;
++module_param(ConfigFlags, int, 0644);
++MODULE_PARM_DESC(ConfigFlags, "config flags");
++
++static int HcdRCount = MAX_HCD_REQ_RECURSION;
++module_param(HcdRCount, int, 0644);
++MODULE_PARM_DESC(HcdRCount, "HCD request recursion count");
++
++static void CardDetect_WorkItem(
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
++void *context);
++#else
++struct work_struct *ignored);
++#endif
++static void CardDetect_TimerFunc(unsigned long Context);
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++static DECLARE_WORK(CardDetectPollWork, CardDetect_WorkItem
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
++, 0);
++#else
++);
++#endif
++#endif
++static int RegisterDriver(PSDFUNCTION pFunction);
++static int UnregisterDriver(PSDFUNCTION pFunction);
++
++static struct timer_list CardDetectTimer;
++
++#define SDDEVICE_FROM_OSDEVICE(pOSDevice) container_of(pOSDevice, SDDEVICE, Device)
++#define SDFUNCTION_FROM_OSDRIVER(pOSDriver) container_of(pOSDriver, SDFUNCTION, Driver)
++
++
++/*
++ * SDIO_RegisterHostController - register a host controller bus driver
++*/
++SDIO_STATUS SDIO_RegisterHostController(PSDHCD pHcd) {
++ /* we are the exported verison, call the internal verison */
++ return _SDIO_RegisterHostController(pHcd);
++}
++
++/*
++ * SDIO_UnregisterHostController - unregister a host controller bus driver
++*/
++SDIO_STATUS SDIO_UnregisterHostController(PSDHCD pHcd) {
++ /* we are the exported verison, call the internal verison */
++ return _SDIO_UnregisterHostController(pHcd);
++}
++
++/*
++ * SDIO_RegisterFunction - register a function driver
++*/
++SDIO_STATUS SDIO_RegisterFunction(PSDFUNCTION pFunction) {
++ int error;
++ SDIO_STATUS status;
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - SDIO_RegisterFunction\n"));
++
++ /* since we do PnP registration first, we need to check the version */
++ if (!CHECK_FUNCTION_DRIVER_VERSION(pFunction)) {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: Function Major Version Mismatch (hcd = %d, bus driver = %d)\n",
++ GET_SDIO_STACK_VERSION_MAJOR(pFunction), CT_SDIO_STACK_VERSION_MAJOR(g_Version)));
++ return SDIO_STATUS_INVALID_PARAMETER;
++ }
++
++ /* we are the exported verison, call the internal verison after registering with the bus
++ we handle probes internally to the bus driver */
++ if ((error = RegisterDriver(pFunction)) < 0) {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO BusDriver - SDIO_RegisterFunction, failed to register with system bus driver: %d\n",
++ error));
++ status = OSErrorToSDIOError(error);
++ } else {
++ status = _SDIO_RegisterFunction(pFunction);
++ if (!SDIO_SUCCESS(status)) {
++ UnregisterDriver(pFunction);
++ }
++ }
++
++ return status;
++}
++
++/*
++ * SDIO_UnregisterFunction - unregister a function driver
++*/
++SDIO_STATUS SDIO_UnregisterFunction(PSDFUNCTION pFunction) {
++ SDIO_STATUS status;
++ /* we are the exported verison, call the internal verison */
++ status = _SDIO_UnregisterFunction(pFunction);
++ UnregisterDriver(pFunction);
++ return status;
++}
++
++/*
++ * SDIO_HandleHcdEvent - tell core an event occurred
++*/
++SDIO_STATUS SDIO_HandleHcdEvent(PSDHCD pHcd, HCD_EVENT Event) {
++ /* we are the exported verison, call the internal verison */
++ DBG_PRINT(SDIODBG_HCD_EVENTS, ("SDIO Bus Driver: SDIO_HandleHcdEvent, event type 0x%X, HCD:0x%X\n",
++ Event, (UINT)pHcd));
++ return _SDIO_HandleHcdEvent(pHcd, Event);
++}
++
++/* get default settings */
++SDIO_STATUS _SDIO_BusGetDefaultSettings(PBDCONTEXT pBdc)
++{
++ /* these defaults are module params */
++ pBdc->RequestRetries = RequestRetries;
++ pBdc->CardReadyPollingRetry = CardReadyPollingRetry;
++ pBdc->PowerSettleDelay = PowerSettleDelay;
++ pBdc->DefaultOperClock = DefaultOperClock;
++ pBdc->DefaultBusMode = DefaultBusMode;
++ pBdc->RequestListSize = RequestListSize;
++ pBdc->SignalSemListSize = SignalSemListSize;
++ pBdc->CDPollingInterval = CDPollingInterval;
++ pBdc->DefaultOperBlockLen = DefaultOperBlockLen;
++ pBdc->DefaultOperBlockCount = DefaultOperBlockCount;
++ pBdc->ConfigFlags = ConfigFlags;
++ pBdc->MaxHcdRecursion = HcdRCount;
++ return SDIO_STATUS_SUCCESS;
++}
++
++static void CardDetect_TimerFunc(unsigned long Context)
++{
++ DBG_PRINT(SDIODBG_CD_TIMER, ("+ SDIO BusDriver Card Detect Timer\n"));
++
++ /* timers run in an ISR context and cannot block or sleep, so we need
++ * to queue a work item to call the bus driver timer notification */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ if (schedule_work(&CardDetectPollWork) <= 0) {
++ DBG_PRINT(SDDBG_ERROR, ("Failed to queue Card Detect timer!\n"));
++ }
++#else
++ CardDetect_WorkItem(NULL);
++#endif
++ DBG_PRINT(SDIODBG_CD_TIMER, ("- SDIO BusDriver Card Detect Timer\n"));
++}
++
++/*
++ * Initialize any timers we are using
++*/
++SDIO_STATUS InitializeTimers(void)
++{
++ init_timer(&CardDetectTimer);
++ CardDetectTimer.function = CardDetect_TimerFunc;
++ CardDetectTimer.data = 0;
++ return SDIO_STATUS_SUCCESS;
++}
++
++/*
++ * cleanup timers
++*/
++SDIO_STATUS CleanupTimers(void)
++{
++ del_timer(&CardDetectTimer);
++ return SDIO_STATUS_SUCCESS;
++}
++
++
++/*
++ * Queue a timer, Timeout is in milliseconds
++*/
++SDIO_STATUS QueueTimer(INT TimerID, UINT32 TimeOut)
++{
++ UINT32 delta;
++
++ /* convert timeout to ticks */
++ delta = (TimeOut * HZ)/1000;
++ if (delta == 0) {
++ delta = 1;
++ }
++ DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO BusDriver - SDIO_QueueTimer System Ticks Per Sec:%d \n",HZ));
++ DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO BusDriver - SDIO_QueueTimer TimerID: %d TimeOut:%d MS, requires %d Ticks\n",
++ TimerID,TimeOut,delta));
++ switch (TimerID) {
++ case SDIOBUS_CD_TIMER_ID:
++ CardDetectTimer.expires = jiffies + delta;
++ add_timer(&CardDetectTimer);
++ break;
++ default:
++ return SDIO_STATUS_INVALID_PARAMETER;
++ }
++
++ return SDIO_STATUS_SUCCESS;
++}
++
++/* check a response on behalf of the host controller, to allow it to proceed with a
++ * data transfer */
++SDIO_STATUS SDIO_CheckResponse(PSDHCD pHcd, PSDREQUEST pReq, SDHCD_RESPONSE_CHECK_MODE CheckMode)
++{
++ return _SDIO_CheckResponse(pHcd,pReq,CheckMode);
++}
++
++/*
++ * CardDetect_WorkItem - the work item for handling card detect polling interrupt
++*/
++static void CardDetect_WorkItem(
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
++void *context)
++#else
++struct work_struct *ignored)
++#endif
++{
++ /* call bus driver function */
++ SDIO_NotifyTimerTriggered(SDIOBUS_CD_TIMER_ID);
++}
++
++/*
++ * OS_IncHcdReference - increment host controller driver reference count
++*/
++SDIO_STATUS Do_OS_IncHcdReference(PSDHCD pHcd)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++ do {
++ if (NULL == pHcd->pModule) {
++ /* hcds that are 2.3 or higher should set this */
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: HCD:%s should set module ptr!\n",
++ (pHcd->pName != NULL) ? pHcd->pName : "Unknown"));
++ break;
++ }
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ if (!try_module_get(pHcd->pModule)) {
++ status = SDIO_STATUS_ERROR;
++ }
++#else
++ if (!try_inc_mod_count(pHcd->pModule)) {
++ status = SDIO_STATUS_ERROR;
++ }
++#endif
++
++ } while (FALSE);
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: HCD:%s failed to get module\n",
++ (pHcd->pName != NULL) ? pHcd->pName : "Unknown"));
++ }
++
++ return status;
++}
++
++/*
++ * OS_DecHcdReference - decrement host controller driver reference count
++*/
++SDIO_STATUS Do_OS_DecHcdReference(PSDHCD pHcd)
++{
++ if (pHcd->pModule != NULL) {
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ module_put(pHcd->pModule);
++#else
++ /* 2.4 or lower */
++ __MOD_DEC_USE_COUNT(pHcd->pModule);
++#endif
++ }
++ return SDIO_STATUS_SUCCESS;
++}
++
++/****************************************************************************************/
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++#include <linux/pnp.h>
++
++#if !defined(CONFIG_PNP)
++#error "CONFIG_PNP not defined"
++#endif
++
++static ULONG InUseDevices = 0;
++static spinlock_t InUseDevicesLock = SPIN_LOCK_UNLOCKED;
++
++static const struct pnp_device_id pnp_idtable[] = {
++ {"SD_XXXX", 0}
++};
++static int sdio_get_resources(struct pnp_dev * pDev, struct pnp_resource_table * res)
++{
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO BusDriver - sdio_get_resources: %s\n",
++ pDev->dev.bus_id));
++ return 0;
++}
++static int sdio_set_resources(struct pnp_dev * pDev, struct pnp_resource_table * res)
++{
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO BusDriver - sdio_set_resources: %s\n",
++ pDev->dev.bus_id));
++ return 0;
++}
++
++static int sdio_disable_resources(struct pnp_dev *pDev)
++{
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO BusDriver - sdio_disable_resources: %s\n",
++ pDev->dev.bus_id));
++ if (pDev != NULL) {
++ pDev->active = 0;
++ }
++ return 0;
++}
++void release(struct device * pDev) {
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO BusDriver - release: %s\n",
++ pDev->bus_id));
++ return;
++}
++struct pnp_protocol sdio_protocol = {
++ .name = "SDIO",
++ .get = sdio_get_resources,
++ .set = sdio_set_resources,
++ .disable = sdio_disable_resources,
++ .dev.release = release,
++};
++
++/*
++ * driver_probe - probe for OS based driver
++*/
++static int driver_probe(struct pnp_dev* pOSDevice, const struct pnp_device_id *pId)
++{
++ PSDDEVICE pDevice = SDDEVICE_FROM_OSDEVICE(pOSDevice);
++ PSDFUNCTION pFunction = pDevice->Device.dev.driver_data;
++
++ if (pFunction == NULL) {
++ return -1;
++ }
++
++ if (strcmp(pFunction->pName, pOSDevice->dev.driver->name) == 0) {
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO BusDriver - driver_probe, match: %s/%s driver: %s\n",
++ pOSDevice->dev.bus_id, pFunction->pName, pOSDevice->dev.driver->name));
++ return 1;
++ } else {
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO BusDriver - driver_probe, no match: %s/%s driver: %s\n",
++ pOSDevice->dev.bus_id, pFunction->pName, pOSDevice->dev.driver->name));
++ return -1;
++ }
++/* if (pOSDevice->id != NULL) {
++ if (strcmp(pOSDevice->id->id, pId->id) == 0) {
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO BusDriver - driver_probe, match: %s/%s\n",
++ pOSDevice->dev.bus_id, pId->id));
++ return 1;
++ }
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO BusDriver - driver_probe, did not match: %s/%s/%s\n",
++ pOSDevice->dev.bus_id, pId->id, pOSDevice->id->id));
++ } else {
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO BusDriver - driver_probe, did not match: %s/%s\n",
++ pOSDevice->dev.bus_id, pId->id));
++ }
++ return -1;
++*/
++//?? if (pDevice->Device.dev.driver_data != NULL) {
++//?? if (pDevice->Device.dev.driver_data == pFunction) {
++//?? if (pDevice->Device.data != NULL) {
++//?? if (pDevice->Device.data == pFunction) {
++//?? DBG_PRINT(SDDBG_TRACE,
++//?? ("SDIO BusDriver - driver_probe, match: %s\n",
++//?? pOSDevice->dev.bus_id));
++//?? return 1;
++//?? }
++//?? }
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO BusDriver - driver_probe, match: %s\n",
++ pOSDevice->dev.bus_id));
++ return 1;
++}
++
++static int RegisterDriver(PSDFUNCTION pFunction)
++{
++ memset(&pFunction->Driver, 0, sizeof(pFunction->Driver));
++ pFunction->Driver.name = pFunction->pName;
++ pFunction->Driver.probe = driver_probe;
++ pFunction->Driver.id_table = pnp_idtable;
++ pFunction->Driver.flags = PNP_DRIVER_RES_DO_NOT_CHANGE;
++
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO BusDriver - SDIO_RegisterFunction, registering driver: %s\n",
++ pFunction->Driver.name));
++ return pnp_register_driver(&pFunction->Driver);
++}
++
++static int UnregisterDriver(PSDFUNCTION pFunction)
++{
++ DBG_PRINT(SDDBG_TRACE,
++ ("+SDIO BusDriver - UnregisterDriver, driver: %s\n",
++ pFunction->Driver.name));
++ pnp_unregister_driver(&pFunction->Driver);
++ DBG_PRINT(SDDBG_TRACE,
++ ("-SDIO BusDriver - UnregisterDriver\n"));
++ return 0;
++}
++
++/*
++ * OS_InitializeDevice - initialize device that will be registered
++*/
++SDIO_STATUS OS_InitializeDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction)
++{
++ struct pnp_id *pFdname;
++ memset(&pDevice->Device, 0, sizeof(pDevice->Device));
++ pDevice->Device.dev.driver_data = (PVOID)pFunction;
++//?? pDevice->Device.data = (PVOID)pFunction;
++//?? pDevice->Device.dev.driver = &pFunction->Driver.driver;
++//?? pDevice->Device.driver = &pFunction->Driver;
++//?? pDevice->Device.dev.release = release;
++ /* get a unique device number, must be done with locks held */
++ spin_lock(&InUseDevicesLock);
++ pDevice->Device.number = FirstClearBit(&InUseDevices);
++ SetBit(&InUseDevices, pDevice->Device.number);
++ spin_unlock(&InUseDevicesLock);
++ pDevice->Device.capabilities = PNP_REMOVABLE | PNP_DISABLE;
++ pDevice->Device.protocol = &sdio_protocol;
++ pDevice->Device.active = 1;
++
++ pnp_init_resource_table(&pDevice->Device.res);
++
++ pFdname = KernelAlloc(sizeof(struct pnp_id));
++
++ if (NULL == pFdname) {
++ return SDIO_STATUS_NO_RESOURCES;
++ }
++ /* set the id as slot number/function number */
++ snprintf(pFdname->id, sizeof(pFdname->id), "SD_%02X%02X",
++ pDevice->pHcd->SlotNumber, (UINT)SDDEVICE_GET_SDIO_FUNCNO(pDevice));
++ pFdname->next = NULL;
++ DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_InitializeDevice adding id: %s\n",
++ pFdname->id));
++ pnp_add_id(pFdname, &pDevice->Device);
++
++ /* deal with DMA settings */
++ if (pDevice->pHcd->pDmaDescription != NULL) {
++ pDevice->Device.dev.dma_mask = &pDevice->pHcd->pDmaDescription->Mask;
++ pDevice->Device.dev.coherent_dma_mask = pDevice->pHcd->pDmaDescription->Mask;
++ }
++
++ return SDIO_STATUS_SUCCESS;
++}
++
++/*
++ * OS_AddDevice - must be pre-initialized with OS_InitializeDevice
++*/
++SDIO_STATUS OS_AddDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction)
++{
++ int error;
++ DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_AddDevice adding function: %s\n",
++ pFunction->pName));
++ error = pnp_add_device(&pDevice->Device);
++ if (error < 0) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO BusDriver - OS_AddDevice failed pnp_add_device: %d\n",
++ error));
++ }
++ /* replace the buggy pnp's release */
++ pDevice->Device.dev.release = release;
++
++ return OSErrorToSDIOError(error);
++}
++
++/*
++ * OS_RemoveDevice - unregister device with driver and bus
++*/
++void OS_RemoveDevice(PSDDEVICE pDevice)
++{
++ DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_RemoveDevice \n"));
++ pnp_remove_card_device(&pDevice->Device);
++ spin_lock(&InUseDevicesLock);
++ ClearBit(&InUseDevices, pDevice->Device.number);
++ spin_unlock(&InUseDevicesLock);
++
++ if (pDevice->Device.id != NULL) {
++ KernelFree(pDevice->Device.id);
++ pDevice->Device.id = NULL;
++ }
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Add OS device to bus driver.
++
++ @function name: SDIO_BusAddOSDevice
++ @category: HD_Reference
++
++ @output: pDma - descrip[tion of support DMA or NULL
++ @output: pDriver - assigned driver object
++ @output: pDevice - assigned device object
++
++ @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when successful.
++
++ @notes: If the HCD does not register with the driver sub-system directly (like in the PCI case),
++ then it should register with the bus driver to obtain OS dependent device objects.
++ All input structures should be maintained throughout the life of the driver.
++
++ @example: getting device objects:
++ typedef struct _SDHCD_DRIVER {
++ OS_PNPDEVICE HcdDevice; / * the OS device for this HCD * /
++ OS_PNPDRIVER HcdDriver; / * the OS driver for this HCD * /
++ SDDMA_DESCRIPTION Dma; / * driver DMA description * /
++ }SDHCD_DRIVER, *PSDHCD_DRIVER;
++
++ typedef struct _SDHCD_DRIVER_CONTEXT {
++ PTEXT pDescription; / * human readable device decsription * /
++ SDLIST DeviceList; / * the list of current devices handled by this driver * /
++ OS_SEMAPHORE DeviceListSem; / * protection for the DeviceList * /
++ UINT DeviceCount; / * number of devices currently installed * /
++ SDHCD_DRIVER Driver; / * OS dependent driver specific info * /
++ }SDHCD_DRIVER_CONTEXT, *PSDHCD_DRIVER_CONTEXT;
++
++ static SDHCD_DRIVER_CONTEXT HcdContext = {
++ .pDescription = DESCRIPTION,
++ .DeviceCount = 0,
++ .Driver.HcdDevice.name = "sdio_xxx_hcd",
++ .Driver.HcdDriver.name = "sdio_xxx_hcd",
++ }
++ .....
++ status = SDIO_BusAddOSDevice(NULL, &HcdContext.Driver, &HcdContext.Device);
++ if (SDIO_SUCCESS(status) {
++ return Probe(&HcdContext.Device);
++ }
++ return SDIOErrorToOSError(status);
++
++ @see also: SDIO_BusRemoveOSDevice
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDIO_BusAddOSDevice(PSDDMA_DESCRIPTION pDma, POS_PNPDRIVER pDriver, POS_PNPDEVICE pDevice)
++{
++ int err;
++ struct pnp_id *pFdname;
++ struct pnp_device_id *pFdid;
++ static int slotNumber = 0; /* we just use an increasing count for the slots number */
++
++ if (pDma != NULL) {
++ pDevice->dev.dma_mask = &pDma->Mask;
++ pDevice->dev.coherent_dma_mask = pDma->Mask;
++ }
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO BusDriver - SDIO_GetBusOSDevice, registering driver: %s DMAmask: 0x%x\n",
++ pDriver->name, (UINT)*pDevice->dev.dma_mask));
++ pFdid = KernelAlloc(sizeof(struct pnp_device_id)*2);
++ /* set the id as slot number/function number */
++ snprintf(pFdid[0].id, sizeof(pFdid[0].id), "SD_%02X08",
++ slotNumber++);
++ pFdid[0].driver_data = 0;
++ pFdid[1].id[0] = '\0';
++ pFdid[1].driver_data = 0;
++
++ pDriver->id_table = pFdid;
++ pDriver->flags = PNP_DRIVER_RES_DO_NOT_CHANGE;
++ err = pnp_register_driver(pDriver);
++ if (err < 0) {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO BusDriver - SDIO_GetBusOSDevice, failed registering driver: %s, err: %d\n",
++ pDriver->name, err));
++ return OSErrorToSDIOError(err);
++ }
++
++ pDevice->protocol = &sdio_protocol;
++ pDevice->capabilities = PNP_REMOVABLE | PNP_DISABLE;
++ pDevice->active = 1;
++
++ pFdname = KernelAlloc(sizeof(struct pnp_id));
++ /* set the id as slot number/function number */
++ snprintf(pFdname->id, sizeof(pFdname->id), "SD_%02X08",
++ 0); //??pDevice->pHcd->SlotNumber);//?????fix this, slotnumber isn't vaialble yet
++ pFdname->next = NULL;
++ pnp_add_id(pFdname, pDevice);
++
++ /* get a unique device number */
++ spin_lock(&InUseDevicesLock);
++ pDevice->number = FirstClearBit(&InUseDevices);
++ SetBit(&InUseDevices, pDevice->number);
++ spin_unlock(&InUseDevicesLock);
++ pnp_init_resource_table(&pDevice->res);
++ err = pnp_add_device(pDevice);
++ if (err < 0) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO BusDriver - SDIO_GetBusOSDevice failed pnp_device_add: %d\n",
++ err));
++ pnp_unregister_driver(pDriver);
++ }
++ /* replace the buggy pnp's release */
++ pDevice->dev.release = release;
++ return OSErrorToSDIOError(err);
++}
++
++/**+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Return OS device from bus driver.
++
++ @function name: SDIO_BusRemoveOSDevice
++ @category: HD_Reference
++
++ @input: pDriver - setup PNP driver object
++ @input: pDevice - setup PNP device object
++
++ @return: none
++
++
++ @example: returning device objects:
++ SDIO_BusRemoveOSDevice(&HcdContext.Driver, &HcdContext.Device);
++
++
++ @see also: SDIO_BusAddOSDevice
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void SDIO_BusRemoveOSDevice(POS_PNPDRIVER pDriver, POS_PNPDEVICE pDevice)
++{
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO BusDriver - SDIO_PutBusOSDevice, unregistering driver: %s\n",
++ pDriver->name));
++
++ pnp_remove_card_device(pDevice);
++ if (pDevice->id != NULL) {
++ KernelFree(pDevice->id);
++ pDevice->id = NULL;
++ }
++
++ spin_lock(&InUseDevicesLock);
++ ClearBit(&InUseDevices, pDevice->number);
++ spin_unlock(&InUseDevicesLock);
++
++ pnp_unregister_driver(pDriver);
++ if (pDriver->id_table != NULL) {
++ KernelFree((void *)pDriver->id_table);
++ pDriver->id_table = NULL;
++ }
++
++}
++
++
++/*
++ * module init
++*/
++static int __init sdio_busdriver_init(void) {
++ SDIO_STATUS status;
++ int error;
++ REL_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: loaded\n"));
++ if (!SDIO_SUCCESS((status = _SDIO_BusDriverInitialize()))) {
++ return SDIOErrorToOSError(status);
++ }
++ /* register the sdio bus */
++ error = pnp_register_protocol(&sdio_protocol);
++ if (error < 0) {
++ REL_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: failed to register bus device, %d\n", error));
++ _SDIO_BusDriverCleanup();
++ return error;
++ }
++ return 0;
++}
++
++/*
++ * module cleanup
++*/
++static void __exit sdio_busdriver_cleanup(void) {
++ REL_PRINT(SDDBG_TRACE, ("SDIO unloaded\n"));
++ _SDIO_BusDriverCleanup();
++ pnp_unregister_protocol(&sdio_protocol);
++DBG_PRINT(SDDBG_TRACE,
++ ("SDIO BusDriver - unloaded 1\n"));
++}
++EXPORT_SYMBOL(SDIO_BusAddOSDevice);
++EXPORT_SYMBOL(SDIO_BusRemoveOSDevice);
++
++#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ /* 2.4 */
++static int RegisterDriver(PSDFUNCTION pFunction)
++{
++ return 0;
++}
++
++static int UnregisterDriver(PSDFUNCTION pFunction)
++{
++ DBG_PRINT(SDDBG_TRACE,
++ ("+-SDIO BusDriver - UnregisterDriver, driver: \n"));
++ return 0;
++}
++
++/*
++ * OS_InitializeDevice - initialize device that will be registered
++*/
++SDIO_STATUS OS_InitializeDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction)
++{
++ return SDIO_STATUS_SUCCESS;
++}
++
++/*
++ * OS_AddDevice - must be pre-initialized with OS_InitializeDevice
++*/
++SDIO_STATUS OS_AddDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction)
++{
++ DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_AddDevice adding function: %s\n",
++ pFunction->pName));
++ return SDIO_STATUS_SUCCESS;
++
++}
++
++/*
++ * OS_RemoveDevice - unregister device with driver and bus
++*/
++void OS_RemoveDevice(PSDDEVICE pDevice)
++{
++ DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_RemoveDevice \n"));
++}
++
++/*
++ * module init
++*/
++static int __init sdio_busdriver_init(void) {
++ SDIO_STATUS status;
++ REL_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: loaded\n"));
++ if (!SDIO_SUCCESS((status = _SDIO_BusDriverInitialize()))) {
++ return SDIOErrorToOSError(status);
++ }
++ return 0;
++}
++
++/*
++ * module cleanup
++*/
++static void __exit sdio_busdriver_cleanup(void) {
++ REL_PRINT(SDDBG_TRACE, ("SDIO unloaded\n"));
++ _SDIO_BusDriverCleanup();
++}
++#else ////KERNEL_VERSION
++#error "unsupported kernel version: "UTS_RELEASE
++#endif //KERNEL_VERSION
++
++MODULE_LICENSE("GPL and additional rights");
++MODULE_DESCRIPTION(DESCRIPTION);
++MODULE_AUTHOR(AUTHOR);
++
++module_init(sdio_busdriver_init);
++module_exit(sdio_busdriver_cleanup);
++EXPORT_SYMBOL(SDIO_RegisterHostController);
++EXPORT_SYMBOL(SDIO_UnregisterHostController);
++EXPORT_SYMBOL(SDIO_HandleHcdEvent);
++EXPORT_SYMBOL(SDIO_CheckResponse);
++EXPORT_SYMBOL(SDIO_RegisterFunction);
++EXPORT_SYMBOL(SDIO_UnregisterFunction);
+Index: linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_function.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_function.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,715 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: sdio_function.c
++
++@abstract: OS independent bus driver support for function drivers
++
++@notes: This file supports the interface between SDIO function drivers and the bus driver.
++
++@notice: Copyright (c), 2004-2005 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define MODULE_NAME SDBUSDRIVER
++#include <linux/sdio/ctsystem.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/sdio_lib.h>
++#include "_busdriver.h"
++
++static SDIO_STATUS ProbeForDevice(PSDFUNCTION pFunction);
++
++#ifdef CT_MAN_CODE_CHECK
++static UINT16 ManCodeCheck = CT_MAN_CODE_CHECK;
++#endif
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Register a function driver with the bus driver.
++
++ @function name: SDIO_RegisterFunction
++ @prototype: SDIO_STATUS SDIO_RegisterFunction(PSDFUNCTION pFunction)
++ @category: PD_Reference
++ @input: pFunction - the function definition structure.
++
++ @output: none
++
++ @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when succesful.
++
++ @notes: Each function driver must register with the bus driver once upon loading.
++ The calling function must be prepared to receive a Probe callback before
++ this function returns. This will occur when an perpheral device is already
++ pluugged in that is supported by this function.
++ The function driver should unregister itself when exiting.
++ The bus driver checks for possible function drivers to support a device
++ in reverse registration order.
++
++ @example: Registering a function driver:
++ //list of devices supported by this function driver
++ static SD_PNP_INFO Ids[] = {
++ {.SDIO_ManufacturerID = 0xaa55,
++ .SDIO_ManufacturerCode = 0x5555,
++ .SDIO_FunctionNo = 1},
++ {} //list is null termintaed
++ };
++ static GENERIC_FUNCTION_CONTEXT FunctionContext = {
++ .Function.pName = "sdio_generic", //name of the device
++ .Function.Version = CT_SDIO_STACK_VERSION_CODE, // set stack version
++ .Function.MaxDevices = 1, //maximum number of devices supported by this driver
++ .Function.NumDevices = 0, //current number of devices, always zero to start
++ .Function.pIds = Ids, //the list of devices supported by this device
++ .Function.pProbe = Probe, //pointer to the function drivers Probe function
++ // that will be called when a possibly supported device
++ // is inserted.
++ .Function.pRemove = Remove, //pointer to the function drivers Remove function
++ / that will be called when a device is removed.
++ .Function.pContext = &FunctionContext, //data value that will be passed into Probe and
++ // Remove callbacks.
++ };
++ SDIO_STATUS status;
++ status = SDIO_RegisterFunction(&FunctionContext.Function)
++ if (!SDIO_SUCCESS(status)) {
++ ...failed to register
++ }
++
++ @see also: SDIO_UnregisterFunction
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDIO_RegisterFunction(PSDFUNCTION pFunction)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++#ifdef CT_MAN_CODE_CHECK
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO Bus Driver: _SDIO_RegisterFunction: WARNING, this version is locked to Memory cards and SDIO cards with JEDEC IDs of: 0x%X\n",
++ ManCodeCheck));
++#else
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: _SDIO_RegisterFunction\n"));
++#endif
++
++ DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: Function Driver Stack Version: %d.%d \n",
++ GET_SDIO_STACK_VERSION_MAJOR(pFunction),GET_SDIO_STACK_VERSION_MINOR(pFunction)));
++
++ if (!CHECK_FUNCTION_DRIVER_VERSION(pFunction)) {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Bus Driver: Function Major Version Mismatch (hcd = %d, bus driver = %d)\n",
++ GET_SDIO_STACK_VERSION_MAJOR(pFunction), CT_SDIO_STACK_VERSION_MAJOR(g_Version)));
++ return SDIO_STATUS_INVALID_PARAMETER;
++ }
++
++
++ /* sanity check the driver */
++ if ((pFunction == NULL) ||
++ (pFunction->pProbe == NULL) ||
++ (pFunction->pIds == NULL)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_RegisterFunction, invalid registration data\n"));
++ return SDIO_STATUS_INVALID_PARAMETER;
++ }
++ /* protect the function list and add the function */
++ if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->FunctionListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++ SignalInitialize(&pFunction->CleanupReqSig);
++ SDLIST_INIT(&pFunction->DeviceList);
++ SDListAdd(&pBusContext->FunctionList, &pFunction->SDList);
++ if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->FunctionListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++
++ /* see if we have devices for this new function driver */
++ ProbeForDevice(pFunction);
++
++ return status;
++cleanup:
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_RegisterFunction, error exit 0x%X\n", status));
++ return status;
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Unregister a function driver with the bus driver.
++
++ @function name: SDIO_UnregisterFunction
++ @prototype: SDIO_STATUS SDIO_UnregisterFunction(PSDFUNCTION pFunction)
++ @category: PD_Reference
++
++ @input: pFunction - the function definition structure.
++
++ @output: none
++
++ @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when succesful.
++
++ @notes: Each function driver must unregister from the bus driver when the function driver
++ exits.
++ A function driver must disconnect from any interrupts before calling this function.
++
++ @example: Unregistering a function driver:
++ SDIO_UnregisterFunction(&FunctionContext.Function);
++
++ @see also: SDIO_RegisterFunction
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDIO_UnregisterFunction(PSDFUNCTION pFunction)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ PSDDEVICE pDevice;
++
++ DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: _SDIO_UnregisterFunction\n"));
++
++ /* protect the function list and synchronize with Probe() and Remove()*/
++ if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->FunctionListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++ /* remove this function from the function list */
++ SDListRemove(&pFunction->SDList);
++ /* now remove this function as the handler for any of its devices */
++ SDITERATE_OVER_LIST_ALLOW_REMOVE(&pFunction->DeviceList, pDevice, SDDEVICE,FuncListLink) {
++ if (pDevice->pFunction == pFunction) {
++ /* notify removal */
++ NotifyDeviceRemove(pDevice);
++ }
++ }SDITERATE_END;
++
++ SignalDelete(&pFunction->CleanupReqSig);
++
++ if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->FunctionListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++ DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: _SDIO_UnregisterFunction\n"));
++ return status;
++
++cleanup:
++ DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: _SDIO_UnregisterFunction, error exit 0x%X\n", status));
++ return status;
++}
++
++/* documentation headers only for Probe and Remove */
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: This function is called by the Busdriver when a device is inserted that can be supported by this function driver.
++
++ @function name: Probe
++ @prototype: BOOL (*pProbe)(struct _SDFUNCTION *pFunction, struct _SDDEVICE *pDevice)
++ @category: PD_Reference
++
++ @input: pFunction - the function definition structure that was passed to Busdriver
++ via the SDIO_RegisterFunction.
++ @input: pDevice - the description of the newly inserted device.
++
++ @output: none
++
++ @return: TRUE - this function driver will suport this device
++ FALSE - this function driver will not support this device
++
++ @notes: The Busdriver calls the Probe function of a function driver to inform it that device is
++ available for the function driver to control. The function driver should initialize the
++ device and be pepared to acceopt any interrupts from the device before returning.
++
++ @example: Example of typical Probe function callback:
++ static BOOL Probe(PSDFUNCTION pFunction, PSDDEVICE pDevice) {
++ ...get the our context info passed into the SDIO_RegisterFunction
++ PSDXXX_DRIVER_CONTEXT pFunctionContext =
++ (PSDXXX_DRIVER_CONTEXT)pFunction->pContext;
++ SDIO_STATUS status;
++ //test the identification of this device and ensure we want to support it
++ // we can test based on class, or use more specific tests on SDIO_ManufacturerID, etc.
++ if (pDevice->pId[0].SDIO_FunctionClass == XXX) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO XXX Function: Probe - card matched (0x%X/0x%X/0x%X)\n",
++ pDevice->pId[0].SDIO_ManufacturerID,
++ pDevice->pId[0].SDIO_ManufacturerCode,
++ pDevice->pId[0].SDIO_FunctionNo));
++ ...
++
++ @see also: SDIO_RegisterFunction
++ @see also: Remove
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++BOOL FilterPnpInfo(PSDDEVICE pDevice)
++{
++#ifdef CT_MAN_CODE_CHECK
++ if (pDevice->pId[0].CardFlags & CARD_SDIO) {
++ if (pDevice->pId[0].SDIO_ManufacturerCode != ManCodeCheck) {
++ DBG_PRINT(SDDBG_ERROR,
++ ("SDIO Card with JEDEC ID:0x%X , not Allowed! Driver check halted. "
++ "Please Contact sales@codetelligence.com.\n",
++ pDevice->pId[0].SDIO_ManufacturerCode));
++ return FALSE;
++ }
++ }
++ return TRUE;
++#else
++ return TRUE;
++#endif
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: This function is called by the Busdriver when a device controlled by this function
++ function driver is removed.
++
++ @function name: Remove
++ @prototype: void (*pRemove)(struct _SDFUNCTION *pFunction, struct _SDDEVICE *pDevice)
++ @category: PD_Reference
++
++ @input: pFunction - the function definition structure that was passed to Busdriver
++ via the SDIO_RegisterFunction.
++ @input: pDevice - the description of the device being removed.
++
++ @output: none
++
++ @return: none
++
++ @notes: The Busdriver calls the Remove function of a function driver to inform it that device it
++ was supporting has been removed. The device has already been removed, so no further I/O
++ to the device can be performed.
++
++ @example: Example of typical Remove function callback:
++ void Remove(PSDFUNCTION pFunction, PSDDEVICE pDevice) {
++ // get the our context info passed into the SDIO_RegisterFunction
++ PSDXXX_DRIVER_CONTEXT pFunctionContext =
++ (PSDXXX_DRIVER_CONTEXT)pFunction->pContext;
++ ...free any acquired resources.
++
++ @see also: SDIO_RegisterFunction
++ @see also: Probe
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*
++ * ProbeForFunction - look for a function driver to handle this card
++ *
++*/
++SDIO_STATUS ProbeForFunction(PSDDEVICE pDevice, PSDHCD pHcd) {
++ SDIO_STATUS status;
++ PSDLIST pList;
++ PSDFUNCTION pFunction;
++
++ DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: ProbeForFunction\n"));
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForFunction - Dump of Device PNP Data: \n"));
++ DBG_PRINT(SDDBG_TRACE, (" Card Flags 0x%X \n", pDevice->pId[0].CardFlags));
++ if (pDevice->pId[0].CardFlags & CARD_SDIO) {
++ DBG_PRINT(SDDBG_TRACE, (" SDIO MANF: 0x%X \n", pDevice->pId[0].SDIO_ManufacturerID));
++ DBG_PRINT(SDDBG_TRACE, (" SDIO MANFCODE: 0x%X \n", pDevice->pId[0].SDIO_ManufacturerCode));
++ DBG_PRINT(SDDBG_TRACE, (" SDIO FuncNo: %d \n", pDevice->pId[0].SDIO_FunctionNo));
++ DBG_PRINT(SDDBG_TRACE, (" SDIO FuncClass: %d \n", pDevice->pId[0].SDIO_FunctionClass));
++ }
++ if (pDevice->pId[0].CardFlags & (CARD_MMC | CARD_SD)) {
++ DBG_PRINT(SDDBG_TRACE, (" SDMMC MANFID: 0x%X \n",pDevice->pId[0].SDMMC_ManfacturerID));
++ DBG_PRINT(SDDBG_TRACE, (" SDMMC OEMID: 0x%X \n",pDevice->pId[0].SDMMC_OEMApplicationID));
++ }
++
++ if (!FilterPnpInfo(pDevice)) {
++ status = SDIO_STATUS_SUCCESS;
++ goto cleanup;
++ }
++
++ /* protect the function list */
++ if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->FunctionListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++
++ /* protect against ProbeForDevice */
++ if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->DeviceListSem)))) {
++ /* release the function list semaphore we just took */
++ SemaphorePost(&pBusContext->FunctionListSem);
++ goto cleanup;
++ }
++
++ if (pDevice->pFunction != NULL) {
++ /* device already has a function driver handling it */
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForFunction, device already has function\n"));
++ /* release function list */
++ SemaphorePost(&pBusContext->DeviceListSem);
++ /* release function list */
++ SemaphorePost(&pBusContext->FunctionListSem);
++ /* just return success */
++ status = SDIO_STATUS_SUCCESS;
++ goto cleanup;
++ }
++
++ /* release device list */
++ SemaphorePost(&pBusContext->DeviceListSem);
++
++ /* walk functions looking for one that can handle this device */
++ SDITERATE_OVER_LIST(&pBusContext->FunctionList, pList) {
++ pFunction = CONTAINING_STRUCT(pList, SDFUNCTION, SDList);
++ if (pFunction->NumDevices >= pFunction->MaxDevices) {
++ /* function can't support any more devices */
++ continue;
++ }
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForFunction - checking: %s \n",
++ pFunction->pName));
++
++ /* see if this function handles this device */
++ if (IsPotentialIdMatch(pDevice->pId, pFunction->pIds)) {
++ if (!FilterPnpInfo(pDevice)) {
++ break;
++ }
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForFunction -Got Match, probing: %s \n",
++ pFunction->pName));
++ /* we need to setup with the OS bus driver before the probe, so probe can
++ do OS operations. */
++ OS_InitializeDevice(pDevice, pFunction);
++ if (!SDIO_SUCCESS(OS_AddDevice(pDevice, pFunction))) {
++ break;
++ }
++ /* close enough match, ask the function driver if it supports us */
++ if (pFunction->pProbe(pFunction, pDevice)) {
++ /* she accepted the device, add to list */
++ pDevice->pFunction = pFunction;
++ SDListAdd(&pFunction->DeviceList, &pDevice->FuncListLink);
++ pFunction->NumDevices++;
++ break;
++ } else {
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: %s did not claim the device \n",
++ pFunction->pName));
++ /* didn't take this device */
++ OS_RemoveDevice(pDevice);
++ }
++
++ }
++ }
++ if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->FunctionListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++ DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: ProbeForFunction\n"));
++ return status;
++cleanup:
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: ProbeForFunction, error exit 0x%X\n", status));
++ return status;
++}
++
++/*
++ * ProbeForDevice - look for a device that this function driver supports
++ *
++*/
++static SDIO_STATUS ProbeForDevice(PSDFUNCTION pFunction) {
++ SDIO_STATUS status;
++ PSDLIST pList;
++ PSDDEVICE pDevice;
++
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForDevice\n"));
++ if (pFunction->NumDevices >= pFunction->MaxDevices) {
++ /* function can't support any more devices */
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForDevice, too many devices in function\n"));
++ return SDIO_STATUS_SUCCESS;
++ }
++
++ /* protect the driver list */
++ if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->DeviceListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++ /* walk device list */
++ SDITERATE_OVER_LIST(&pBusContext->DeviceList, pList) {
++ pDevice = CONTAINING_STRUCT(pList, SDDEVICE, SDList);
++ if (pDevice->pFunction != NULL) {
++ /* device already has a function driver handling it */
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForDevice, device already has function\n"));
++ continue;
++ }
++ /* see if this function handles this device */
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForDevice, matching ID:%d %d class:%d\n",
++ pDevice->pId[0].SDIO_ManufacturerID,
++ pDevice->pId[0].SDIO_FunctionNo,
++ pDevice->pId[0].SDIO_FunctionClass));
++ if (IsPotentialIdMatch(pDevice->pId, pFunction->pIds)) {
++ if (!FilterPnpInfo(pDevice)) {
++ break;
++ }
++ /* we need to setup with the OS bus driver before the probe, so probe can
++ do OS operations. */
++ OS_InitializeDevice(pDevice, pFunction);
++ if (!SDIO_SUCCESS(OS_AddDevice(pDevice, pFunction))) {
++ break;
++ }
++ /* close enough match, ask the function driver if it supports us */
++ if (pFunction->pProbe(pFunction, pDevice)) {
++ /* she accepted the device, add to list */
++ pDevice->pFunction = pFunction;
++ SDListAdd(&pFunction->DeviceList, &pDevice->FuncListLink);
++ pFunction->NumDevices++;
++ break;
++ } else {
++ DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: %s did not claim the device \n",
++ pFunction->pName));
++ /* didn't take this device */
++ OS_RemoveDevice(pDevice);
++ }
++ }
++ }
++ if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->DeviceListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++
++ return status;
++cleanup:
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: ProbeForDevice, error exit 0x%X\n", status));
++ return status;
++}
++
++#if 0
++static void DumpPnpEntry(PSD_PNP_INFO pInfo)
++{
++ DBG_PRINT(SDDBG_TRACE, ("Function PnpInfo Dump: \n"));
++ DBG_PRINT(SDDBG_TRACE, (" Card Flags 0x%X \n", pInfo->CardFlags));
++ DBG_PRINT(SDDBG_TRACE, (" SDIO MANF: 0x%X \n", pInfo->SDIO_ManufacturerID));
++ DBG_PRINT(SDDBG_TRACE, (" SDIO MANFCODE: 0x%X \n", pInfo->SDIO_ManufacturerCode));
++ DBG_PRINT(SDDBG_TRACE, (" SDIO FuncNo: %d \n", pInfo->SDIO_FunctionNo));
++ DBG_PRINT(SDDBG_TRACE, (" SDIO FuncClass: %d \n", pInfo->SDIO_FunctionClass));
++ DBG_PRINT(SDDBG_TRACE, (" SDMMC MANFID: 0x%X \n", pInfo->SDMMC_ManfacturerID));
++ DBG_PRINT(SDDBG_TRACE, (" SDMMC OEMID: 0x%X \n", pInfo->SDMMC_OEMApplicationID));
++}
++#endif
++/*
++ * IsPotentialIdMatch - test for potential device match
++ *
++*/
++BOOL IsPotentialIdMatch(PSD_PNP_INFO pIdsDev, PSD_PNP_INFO pIdsFuncList) {
++ PSD_PNP_INFO pTFn;
++ BOOL match = FALSE;
++
++ for (pTFn = pIdsFuncList;!IS_LAST_SDPNPINFO_ENTRY(pTFn);pTFn++) {
++ //DumpPnpEntry(pTFn);
++ /* check specific SDIO Card manufacturer ID, Code and Function number */
++ if ((pIdsDev->SDIO_ManufacturerID != 0) &&
++ (pTFn->SDIO_ManufacturerID != 0) &&
++ (pIdsDev->SDIO_ManufacturerID == pTFn->SDIO_ManufacturerID) &&
++ (pIdsDev->SDIO_ManufacturerCode == pTFn->SDIO_ManufacturerCode) &&
++ ((pIdsDev->SDIO_FunctionNo == pTFn->SDIO_FunctionNo) ||
++ (pTFn->SDIO_FunctionNo == 0)) ) {
++ match = TRUE;
++ break;
++ }
++ /* check generic function class */
++ if ((pIdsDev->SDIO_FunctionClass != 0) &&
++ (pTFn->SDIO_FunctionClass != 0) &&
++ (pIdsDev->SDIO_FunctionClass == pTFn->SDIO_FunctionClass)) {
++ match = TRUE;
++ break;
++ }
++ /* check specific SDMMC MANFID and APPLICATION ID, NOTE SANDISK
++ * uses a MANFID of zero! */
++ if ((pTFn->SDMMC_OEMApplicationID != 0) &&
++ (pIdsDev->SDMMC_ManfacturerID == pTFn->SDMMC_ManfacturerID) &&
++ (pIdsDev->SDMMC_OEMApplicationID == pTFn->SDMMC_OEMApplicationID)) {
++ match = TRUE;
++ break;
++ }
++
++ /* check generic SD Card */
++ if ((pIdsDev->CardFlags & CARD_SD) &&
++ (pTFn->CardFlags & CARD_SD)){
++ match = TRUE;
++ break;
++ }
++
++ /* check generic MMC Card */
++ if ((pIdsDev->CardFlags & CARD_MMC) &&
++ (pTFn->CardFlags & CARD_MMC)){
++ match = TRUE;
++ break;
++ }
++
++ /* check raw Card */
++ if ((pIdsDev->CardFlags & CARD_RAW) &&
++ (pTFn->CardFlags & CARD_RAW)){
++ match = TRUE;
++ break;
++ }
++ }
++
++ return match;
++}
++
++/*
++ * NotifyDeviceRemove - tell function driver on this device that the device is being removed
++ *
++*/
++SDIO_STATUS NotifyDeviceRemove(PSDDEVICE pDevice) {
++ SDIO_STATUS status;
++ SDREQUESTQUEUE cancelQueue;
++ PSDREQUEST pReq;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ InitializeRequestQueue(&cancelQueue);
++
++ if ((pDevice->pFunction != NULL) &&
++ (pDevice->pFunction->pRemove != NULL)){
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: removing device 0x%X\n", (INT)pDevice));
++ /* fail any outstanding requests for this device */
++ /* acquire lock for request queue */
++ status = _AcquireHcdLock(pDevice->pHcd);
++ if (!SDIO_SUCCESS(status)) {
++ return status;
++ }
++ /* mark the function to block any more requests comming down */
++ pDevice->pFunction->Flags |= SDFUNCTION_FLAG_REMOVING;
++ /* walk through HCD queue and remove this function's requests */
++ SDITERATE_OVER_LIST_ALLOW_REMOVE(&pDevice->pHcd->RequestQueue.Queue, pReq, SDREQUEST, SDList) {
++ if (pReq->pFunction == pDevice->pFunction) {
++ /* cancel this request, as this device or function is being removed */
++ /* note that these request are getting completed out of order */
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - NotifyDeviceRemove: canceling req 0x%X\n", (UINT)pReq));
++ pReq->Status = SDIO_STATUS_CANCELED;
++ /* remove it from the HCD queue */
++ SDListRemove(&pReq->SDList);
++ /* add it to the cancel queue */
++ QueueRequest(&cancelQueue, pReq);
++ }
++ }SDITERATE_END;
++
++ status = _ReleaseHcdLock(pDevice->pHcd);
++
++ /* now empty the cancel queue if anything is in there */
++ while (TRUE) {
++ pReq = DequeueRequest(&cancelQueue);
++ if (NULL == pReq) {
++ break;
++ }
++ /* complete the request */
++ DoRequestCompletion(pReq, pDevice->pHcd);
++ }
++ /* re-acquire the lock to deal with the current request */
++ status = _AcquireHcdLock(pDevice->pHcd);
++ if (!SDIO_SUCCESS(status)) {
++ return status;
++ }
++ /* now deal with the current request */
++ pReq = GET_CURRENT_REQUEST(pDevice->pHcd);
++ if ((pReq !=NULL) && (pReq->pFunction == pDevice->pFunction) && (pReq->pFunction != NULL)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - NotifyDeviceRemove: Outstanding Req 0x%X on HCD: 0x%X.. waiting...\n",
++ (UINT)pReq, (UINT)pDevice->pHcd));
++ /* the outstanding request on this device is for the function being removed */
++ pReq->Flags |= SDREQ_FLAGS_CANCELED;
++ /* wait for this request to get completed normally */
++ status = _ReleaseHcdLock(pDevice->pHcd);
++ SignalWait(&pDevice->pFunction->CleanupReqSig);
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - NotifyDeviceRemove: Outstanding HCD Req 0x%X completed \n", (UINT)pReq));
++ } else {
++ /* release lock */
++ status = _ReleaseHcdLock(pDevice->pHcd);
++ }
++
++ /* synchronize with ISR SYNC Handlers */
++ status = SemaphorePendInterruptable(&pBusContext->DeviceListSem);
++ if (!SDIO_SUCCESS(status)) {
++ return status;
++ }
++ /* call this devices Remove function */
++ pDevice->pFunction->pRemove(pDevice->pFunction,pDevice);
++ pDevice->pFunction->NumDevices--;
++ /* make sure the sync handler is NULLed out */
++ pDevice->pIrqFunction = NULL;
++ SemaphorePost(&pBusContext->DeviceListSem);
++
++ OS_RemoveDevice(pDevice);
++ /* detach this device from the function list it belongs to */
++ SDListRemove(&pDevice->FuncListLink);
++ pDevice->pFunction->Flags &= ~SDFUNCTION_FLAG_REMOVING;
++ pDevice->pFunction = NULL;
++ }
++ return SDIO_STATUS_SUCCESS;
++}
++
++
++/*
++ * RemoveHcdFunctions - remove all functions attached to an HCD
++ *
++*/
++SDIO_STATUS RemoveHcdFunctions(PSDHCD pHcd) {
++ SDIO_STATUS status;
++ PSDLIST pList;
++ PSDFUNCTION pFunction;
++ PSDDEVICE pDevice;
++ DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: RemoveHcdFunctions\n"));
++
++ /* walk through the functions and remove the ones associated with this HCD */
++ /* protect the driver list */
++ if (!SDIO_SUCCESS((status = SemaphorePend(&pBusContext->FunctionListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++ /* mark that card is being removed */
++ pHcd->CardProperties.CardState |= CARD_STATE_REMOVED;
++ SDITERATE_OVER_LIST(&pBusContext->FunctionList, pList) {
++ pFunction = CONTAINING_STRUCT(pList, SDFUNCTION, SDList);
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: scanning function 0x%X, %s\n", (INT)pFunction,
++ (pFunction == NULL)?"NULL":pFunction->pName));
++
++ /* walk the devices on this function and look for a match */
++ SDITERATE_OVER_LIST_ALLOW_REMOVE(&pFunction->DeviceList, pDevice, SDDEVICE,FuncListLink) {
++ if (pDevice->pHcd == pHcd) {
++ /* match, remove it */
++ NotifyDeviceRemove(pDevice);
++ }
++ SDITERATE_END;
++ SDITERATE_END;
++ if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->FunctionListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++ DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: RemoveHcdFunctions\n"));
++ return SDIO_STATUS_SUCCESS;
++
++cleanup:
++ DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: RemoveHcdFunctions, error exit 0x%X\n", status));
++ return status;
++}
++
++/*
++ * RemoveAllFunctions - remove all functions attached
++ *
++*/
++SDIO_STATUS RemoveAllFunctions()
++{
++ SDIO_STATUS status;
++ PSDLIST pList;
++ PSDHCD pHcd;
++
++ /* walk through the HCDs */
++ /* protect the driver list */
++ if (!SDIO_SUCCESS((status = SemaphorePend(&pBusContext->HcdListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++ SDITERATE_OVER_LIST(&pBusContext->HcdList, pList) {
++ pHcd = CONTAINING_STRUCT(pList, SDHCD, SDList);
++ /* remove the functions */
++ RemoveHcdFunctions(pHcd);
++ }
++ if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->HcdListSem)))) {
++ goto cleanup; /* wait interrupted */
++ }
++ return SDIO_STATUS_SUCCESS;
++cleanup:
++ DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: RemoveAllFunctions, error exit 0x%X\n", status));
++ return status;
++}
++
+Index: linux-2.6.24.7/drivers/sdio/stack/lib/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/stack/lib/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,2 @@
++obj-$(CONFIG_SDIO) += sdio_lib.o
++sdio_lib-objs := sdio_lib_c.o sdio_lib_os.o
+Index: linux-2.6.24.7/drivers/sdio/stack/lib/sdio_lib_c.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/stack/lib/sdio_lib_c.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,908 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: sdio_lib_c.c
++
++@abstract: OS independent SDIO library functions
++@category abstract: Support_Reference Support Functions.
++
++@notes: Support functions for device I/O
++
++@notice: Copyright (c), 2004-2005 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define MODULE_NAME SDLIB_
++
++#include <linux/sdio/ctsystem.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/_sdio_defs.h>
++#include <linux/sdio/sdio_lib.h>
++#include "_sdio_lib.h"
++
++#define _Cmd52WriteByteCommon(pDev, Address, pValue) \
++ _SDLIB_IssueCMD52((pDev),0,(Address),(pValue),1,TRUE)
++#define _Cmd52ReadByteCommon(pDev, Address, pValue) \
++ _SDLIB_IssueCMD52((pDev),0,(Address),pValue,1,FALSE)
++#define _Cmd52ReadMultipleCommon(pDev, Address, pBuf,length) \
++ _SDLIB_IssueCMD52((pDev),0,(Address),(pBuf),(length),FALSE)
++
++/* inline version */
++static INLINE void _iSDLIB_SetupCMD52Request(UINT8 FuncNo,
++ UINT32 Address,
++ BOOL Write,
++ UINT8 WriteData,
++ PSDREQUEST pRequest) {
++ if (Write) {
++ SDIO_SET_CMD52_ARG(pRequest->Argument,CMD52_WRITE,
++ FuncNo,
++ CMD52_NORMAL_WRITE,Address,WriteData);
++ } else {
++ SDIO_SET_CMD52_ARG(pRequest->Argument,CMD52_READ,FuncNo,0,Address,0x00);
++ }
++
++ pRequest->Flags = SDREQ_FLAGS_RESP_SDIO_R5;
++ pRequest->Command = CMD52;
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Setup cmd52 requests
++
++ @function name: SDLIB_SetupCMD52Request
++ @prototype: void SDLIB_SetupCMD52Request(UINT8 FuncNo,
++ UINT32 Address,
++ BOOL Write,
++ UINT8 WriteData,
++ PSDREQUEST pRequest)
++ @category: PD_Reference
++
++ @input: FunctionNo - function number.
++ @input: Address - I/O address, 17-bit register address.
++ @input: Write - TRUE if a write operation, FALSE for reads.
++ @input: WriteData - write data, byte to write if write operation.
++
++ @output: pRequest - request is updated with cmd52 parameters
++
++ @return: none
++
++ @notes: This function does not perform any I/O. For register reads, the completion
++ routine can use the SD_R5_GET_READ_DATA() macro to extract the register value.
++ The routine should also extract the response flags using the SD_R5_GET_RESP_FLAGS()
++ macro and check the flags with the SD_R5_ERRORS mask.
++
++ @example: Getting the register value from the completion routine:
++ flags = SD_R5_GET_RESP_FLAGS(pRequest->Response);
++ if (flags & SD_R5_ERRORS) {
++ ... errors
++ } else {
++ registerValue = SD_R5_GET_READ_DATA(pRequest->Response);
++ }
++
++ @see also: SDLIB_IssueCMD52
++ @see also: SDDEVICE_CALL_REQUEST_FUNC
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void _SDLIB_SetupCMD52Request(UINT8 FuncNo,
++ UINT32 Address,
++ BOOL Write,
++ UINT8 WriteData,
++ PSDREQUEST pRequest)
++{
++ _iSDLIB_SetupCMD52Request(FuncNo,Address,Write,WriteData,pRequest);
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Issue a CMD52 to read or write a register
++
++ @function name: SDLIB_IssueCMD52
++ @prototype: SDIO_STATUS SDLIB_IssueCMD52(PSDDEVICE pDevice,
++ UINT8 FuncNo,
++ UINT32 Address,
++ PUINT8 pData,
++ INT ByteCount,
++ BOOL Write)
++ @category: PD_Reference
++ @input: pDevice - the device that is the target of the command.
++ @input: FunctionNo - function number of the target.
++ @input: Address - 17-bit register address.
++ @input: ByteCount - number of bytes to read or write,
++ @input: Write - TRUE if a write operation, FALSE for reads.
++ @input: pData - data buffer for writes.
++
++ @output: pData - data buffer for writes.
++
++ @return: SDIO Status
++
++ @notes: This function will allocate a request and issue multiple byte reads or writes
++ to satisfy the ByteCount requested. This function is fully synchronous and will block
++ the caller.
++
++ @see also: SDLIB_SetupCMD52Request
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDLIB_IssueCMD52(PSDDEVICE pDevice,
++ UINT8 FuncNo,
++ UINT32 Address,
++ PUINT8 pData,
++ INT ByteCount,
++ BOOL Write)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++ PSDREQUEST pReq = NULL;
++
++ pReq = SDDeviceAllocRequest(pDevice);
++
++ if (NULL == pReq) {
++ return SDIO_STATUS_NO_RESOURCES;
++ }
++
++ while (ByteCount) {
++ _iSDLIB_SetupCMD52Request(FuncNo,Address,Write,*pData,pReq);
++ status = SDDEVICE_CALL_REQUEST_FUNC(pDevice,pReq);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++
++ status = ConvertCMD52ResponseToSDIOStatus(SD_R5_GET_RESP_FLAGS(pReq->Response));
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Library: CMD52 resp error: 0x%X \n",
++ SD_R5_GET_RESP_FLAGS(pReq->Response)));
++ break;
++ }
++ if (!Write) {
++ /* store the byte */
++ *pData = SD_R5_GET_READ_DATA(pReq->Response);
++ }
++ pData++;
++ Address++;
++ ByteCount--;
++ }
++
++ SDDeviceFreeRequest(pDevice,pReq);
++ return status;
++}
++
++
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Find a device's tuple.
++
++ @function name: SDLIB_FindTuple
++ @prototype: SDIO_STATUS SDLIB_FindTuple(PSDDEVICE pDevice,
++ UINT8 Tuple,
++ UINT32 *pTupleScanAddress,
++ PUINT8 pBuffer,
++ UINT8 *pLength)
++
++ @category: PD_Reference
++ @input: pDevice - the device that is the target of the command.
++ @input: Tuple - 8-bit ID of tuple to find
++ @input: pTupleScanAddress - On entry pTupleScanAddress is the adddress to start scanning
++ @input: pLength - length of pBuffer
++
++ @output: pBuffer - storage for tuple
++ @output: pTupleScanAddress - address of the next tuple
++ @output: pLength - length of tuple read
++
++ @return: status
++
++ @notes: It is possible to have the same tuple ID multiple times with different lengths. This function
++ blocks and is fully synchronous.
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDLIB_FindTuple(PSDDEVICE pDevice,
++ UINT8 Tuple,
++ UINT32 *pTupleScanAddress,
++ PUINT8 pBuffer,
++ UINT8 *pLength)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ UINT32 scanStart = *pTupleScanAddress;
++ UINT8 tupleCode;
++ UINT8 tupleLink;
++
++ /* sanity check */
++ if (scanStart < SDIO_CIS_AREA_BEGIN) {
++ return SDIO_STATUS_CIS_OUT_OF_RANGE;
++ }
++
++ while (TRUE) {
++ /* check for end */
++ if (scanStart > SDIO_CIS_AREA_END) {
++ status = SDIO_STATUS_TUPLE_NOT_FOUND;
++ break;
++ }
++ /* get the code */
++ status = _Cmd52ReadByteCommon(pDevice, scanStart, &tupleCode);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ if (CISTPL_END == tupleCode) {
++ /* found the end */
++ status = SDIO_STATUS_TUPLE_NOT_FOUND;
++ break;
++ }
++ /* bump past tuple code */
++ scanStart++;
++ /* get the tuple link value */
++ status = _Cmd52ReadByteCommon(pDevice, scanStart, &tupleLink);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ /* bump past tuple link*/
++ scanStart++;
++ /* check tuple we just found */
++ if (tupleCode == Tuple) {
++ DBG_PRINT(SDDBG_TRACE, ("SDIO Library: Tuple:0x%2.2X Found at Address:0x%X, TupleLink:0x%X \n",
++ Tuple, (scanStart - 2), tupleLink));
++ if (tupleLink != CISTPL_LINK_END) {
++ /* return the next scan address to the caller */
++ *pTupleScanAddress = scanStart + tupleLink;
++ } else {
++ /* the tuple link is an end marker */
++ *pTupleScanAddress = 0xFFFFFFFF;
++ }
++ /* go get the tuple */
++ status = _Cmd52ReadMultipleCommon(pDevice, scanStart,pBuffer,min(*pLength,tupleLink));
++ if (SDIO_SUCCESS(status)) {
++ /* set the actual return length */
++ *pLength = min(*pLength,tupleLink);
++ }
++ /* break out of loop */
++ break;
++ }
++ /*increment past this entire tuple */
++ scanStart += tupleLink;
++ }
++
++ return status;
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Issue an SDIO configuration command.
++
++ @function name: SDLIB_IssueConfig
++ @prototype: SDIO_STATUS _SDLIB_IssueConfig(PSDDEVICE pDevice,
++ SDCONFIG_COMMAND Command,
++ PVOID pData,
++ INT Length)
++
++ @category: PD_Reference
++ @input: pDevice - the device that is the target of the command.
++ @input: Command - command to send, see example.
++ @input: pData - command's data
++ @input: Length length of pData
++
++ @output: pData - updated on commands that return data.
++
++ @return: SDIO Status
++
++ @example: Command and data pairs:
++ Type Data
++ SDCONFIG_GET_WP SDCONFIG_WP_VALUE
++ SDCONFIG_SEND_INIT_CLOCKS none
++ SDCONFIG_SDIO_INT_CTRL SDCONFIG_SDIO_INT_CTRL_DATA
++ SDCONFIG_SDIO_REARM_INT none
++ SDCONFIG_BUS_MODE_CTRL SDCONFIG_BUS_MODE_DATA
++ SDCONFIG_POWER_CTRL SDCONFIG_POWER_CTRL_DATA
++
++ @notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDLIB_IssueConfig(PSDDEVICE pDevice,
++ SDCONFIG_COMMAND Command,
++ PVOID pData,
++ INT Length)
++{
++ SDCONFIG configHdr;
++ SET_SDCONFIG_CMD_INFO(&configHdr,Command,pData,Length);
++ return SDDEVICE_CALL_CONFIG_FUNC(pDevice,&configHdr);
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Set function block size
++
++ @function name: SDLIB_SetFunctionBlockSize
++ @prototype: SDIO_STATUS SDLIB_SetFunctionBlockSize(PSDDEVICE pDevice,
++ UINT16 BlockSize)
++
++ @category: PD_Reference
++ @input: pDevice - the device that is the target of the command.
++ @input: BlockSize - block size to set in function
++
++ @output: none
++
++ @return: SDIO Status
++
++ @notes: Issues CMD52 to set the block size. This function is fully synchronous and may
++ block.
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDLIB_SetFunctionBlockSize(PSDDEVICE pDevice,
++ UINT16 BlockSize)
++{
++ UINT8 data[2];
++
++ /* endian safe */
++ data[0] = (UINT8)BlockSize;
++ data[1] = (UINT8)(BlockSize >> 8);
++ /* write the function blk size control register */
++ return _SDLIB_IssueCMD52(pDevice,
++ 0, /* function 0 register space */
++ FBR_FUNC_BLK_SIZE_LOW_OFFSET(CalculateFBROffset(
++ SDDEVICE_GET_SDIO_FUNCNO(pDevice))),
++ data,
++ 2,
++ TRUE);
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Print a buffer to the debug output
++
++ @function name: SDLIB_PrintBuffer
++ @prototype: void SDLIB_PrintBuffer(PUCHAR pBuffer, INT Length, PTEXT pDescription)
++ @category: Support_Reference
++
++ @input: pBuffer - Hex buffer to be printed.
++ @input: Length - length of pBuffer.
++ @input: pDescription - String title to be printed above the dump.
++
++ @output: none
++
++ @return: none
++
++ @notes: Prints the buffer by converting to ASCII and using REL_PRINT() with 16
++ bytes per line.
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void _SDLIB_PrintBuffer(PUCHAR pBuffer, INT Length, PTEXT pDescription)
++{
++ TEXT line[49];
++ TEXT address[5];
++ TEXT ascii[17];
++ TEXT temp[5];
++ INT i;
++ UCHAR num;
++ USHORT offset = 0;
++
++ REL_PRINT(0,
++ ("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"));
++ if (pDescription != NULL) {
++ REL_PRINT(0, ("Description: %s \n\n",pDescription));
++ } else {
++ REL_PRINT(0, ("Description: NONE \n\n"));
++ }
++ REL_PRINT(0,
++ ("Offset Data ASCII \n"));
++ REL_PRINT(0,
++ ("--------------------------------------------------------------------------\n"));
++
++ while (Length) {
++ line[0] = (TEXT)0;
++ ascii[0] = (TEXT)0;
++ address[0] = (TEXT)0;
++ sprintf(address,"%4.4X",offset);
++ for (i = 0; i < 16; i++) {
++ if (Length != 0) {
++ num = *pBuffer;
++ sprintf(temp,"%2.2X ",num);
++ strcat(line,temp);
++ if ((num >= 0x20) && (num <= 0x7E)) {
++ sprintf(temp,"%c",*pBuffer);
++ } else {
++ sprintf(temp,"%c",0x2e);
++ }
++ strcat(ascii,temp);
++ pBuffer++;
++ Length--;
++ } else {
++ /* pad partial line with spaces */
++ strcat(line," ");
++ strcat(ascii," ");
++ }
++ }
++ REL_PRINT(0,("%s %s %s\n", address, line, ascii));
++ offset += 16;
++ }
++ REL_PRINT(0,
++ ("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"));
++
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get default operational current
++
++ @function name: SDLIB_GetDefaultOpCurrent
++ @prototype: SDIO_STATUS SDLIB_GetDefaultOpCurrent(PSDDEVICE pDevice, SD_SLOT_CURRENT *pOpCurrent)
++ @category: PD_Reference
++
++ @input: pDevice - the device that is the target of the command.
++
++ @output: pOpCurrent - operational current in mA.
++
++ @return: SDIO_STATUS
++
++ @notes: This routine reads the function's CISTPL_FUNCE tuple for the default operational
++ current. For SDIO 1.0 devices this value is read from the 8-bit TPLFE_OP_MAX_PWR
++ field. For SDIO 1.1 devices, the HP MAX power field is used only if the device is
++ operating in HIPWR mode. Otherwise the 8-bit TPLFE_OP_MAX_PWR field is used.
++ Some systems may restrict high power/current mode and force cards to operate in a
++ legacy (< 200mA) mode. This function is fully synchronous and will block the caller.
++
++ @example: Getting the default operational current for this function:
++ // get default operational current
++ status = SDLIB_GetDefaultOpCurrent(pDevice, &slotCurrent);
++ if (!SDIO_SUCCESS(status)) {
++ .. failed
++ }
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDLIB_GetDefaultOpCurrent(PSDDEVICE pDevice, SD_SLOT_CURRENT *pOpCurrent)
++{
++ UINT32 nextTpl;
++ UINT8 tplLength;
++ struct SDIO_FUNC_EXT_FUNCTION_TPL_1_1 funcTuple;
++ SDIO_STATUS status;
++
++ /* get the FUNCE tuple */
++ nextTpl = SDDEVICE_GET_SDIO_FUNC_CISPTR(pDevice);
++ tplLength = sizeof(funcTuple);
++ /* go get the function Extension tuple */
++ status = _SDLIB_FindTuple(pDevice,
++ CISTPL_FUNCE,
++ &nextTpl,
++ (PUINT8)&funcTuple,
++ &tplLength);
++
++ if (!SDIO_SUCCESS(status)) {
++ DBG_PRINT(SDDBG_ERROR, ("SDLIB_GetDefaultOpCurrent: Failed to get FuncE Tuple: %d \n", status));
++ return status;
++ }
++ /* use the operational power (8-bit) value of current in mA as default*/
++ *pOpCurrent = funcTuple.CommonInfo.OpMaxPwr;
++ if ((tplLength >= sizeof(funcTuple)) && (SDDEVICE_IS_SDIO_REV_GTEQ_1_10(pDevice))) {
++ /* we have a 1.1 tuple */
++ /* check for HIPWR mode */
++ if (SDDEVICE_GET_CARD_FLAGS(pDevice) & CARD_HIPWR) {
++ /* use the maximum operational power (16 bit ) from the tuple */
++ *pOpCurrent = CT_LE16_TO_CPU_ENDIAN(funcTuple.HiPwrMaxPwr);
++ }
++ }
++ return SDIO_STATUS_SUCCESS;
++}
++
++
++static INLINE void FreeMessageBlock(PSDMESSAGE_QUEUE pQueue, PSDMESSAGE_BLOCK pMsg) {
++ SDListInsertHead(&pQueue->FreeMessageList, &pMsg->SDList);
++}
++static INLINE void QueueMessageBlock(PSDMESSAGE_QUEUE pQueue, PSDMESSAGE_BLOCK pMsg) {
++ SDListInsertTail(&pQueue->MessageList, &pMsg->SDList);
++}
++static INLINE void QueueMessageToHead(PSDMESSAGE_QUEUE pQueue, PSDMESSAGE_BLOCK pMsg) {
++ SDListInsertHead(&pQueue->MessageList, &pMsg->SDList);
++}
++
++static INLINE PSDMESSAGE_BLOCK GetFreeMessageBlock(PSDMESSAGE_QUEUE pQueue) {
++ PSDLIST pItem = SDListRemoveItemFromHead(&pQueue->FreeMessageList);
++ if (pItem != NULL) {
++ return CONTAINING_STRUCT(pItem, SDMESSAGE_BLOCK , SDList);
++ }
++ return NULL;
++}
++static INLINE PSDMESSAGE_BLOCK GetQueuedMessage(PSDMESSAGE_QUEUE pQueue) {
++ PSDLIST pItem = SDListRemoveItemFromHead(&pQueue->MessageList);
++ if (pItem != NULL) {
++ return CONTAINING_STRUCT(pItem, SDMESSAGE_BLOCK , SDList);
++ }
++ return NULL;
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Create a message queue
++
++ @function name: SDLIB_CreateMessageQueue
++ @prototype: PSDMESSAGE_QUEUE SDLIB_CreateMessageQueue(INT MaxMessages, INT MaxMessageLength)
++ @category: Support_Reference
++
++ @input: MaxMessages - Maximum number of messages this queue supports
++ @input: MaxMessageLength - Maximum size of each message
++
++ @return: Message queue object, NULL on failure
++
++ @notes: This function creates a simple first-in-first-out message queue. The caller must determine
++ the maximum number of messages the queue supports and the size of each message. This
++ function will pre-allocate memory for each message. A producer of data posts a message
++ using SDLIB_PostMessage with a user defined data structure. A consumer of this data
++ can retrieve the message (in FIFO order) using SDLIB_GetMessage. A message queue does not
++ provide a signaling mechanism for notifying a consumer of data. Notifying a consumer is
++ user defined.
++
++ @see also: SDLIB_DeleteMessageQueue, SDLIB_GetMessage, SDLIB_PostMessage.
++
++ @example: Creating a message queue:
++ typedef struct _MyMessage {
++ UINT8 Code;
++ PVOID pDataBuffer;
++ } MyMessage;
++ // create message queue, 16 messages max.
++ pMsgQueue = SDLIB_CreateMessageQueue(16,sizeof(MyMessage));
++ if (NULL == pMsgQueue) {
++ .. failed
++ }
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++PSDMESSAGE_QUEUE _CreateMessageQueue(INT MaxMessages, INT MaxMessageLength)
++{
++ PSDMESSAGE_QUEUE pQueue = NULL;
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ INT ii;
++ PSDMESSAGE_BLOCK pMsg;
++
++ do {
++ pQueue = (PSDMESSAGE_QUEUE)KernelAlloc(sizeof(SDMESSAGE_QUEUE));
++
++ if (NULL == pQueue) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++ SDLIST_INIT(&pQueue->MessageList);
++ SDLIST_INIT(&pQueue->FreeMessageList);
++ pQueue->MaxMessageLength = MaxMessageLength;
++ status = CriticalSectionInit(&pQueue->MessageCritSection);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ /* allocate message blocks */
++ for (ii = 0; ii < MaxMessages; ii++) {
++ pMsg = (PSDMESSAGE_BLOCK)KernelAlloc(sizeof(SDMESSAGE_BLOCK) + MaxMessageLength -1);
++ if (NULL == pMsg) {
++ break;
++ }
++ FreeMessageBlock(pQueue, pMsg);
++ }
++
++ if (0 == ii) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++
++ } while (FALSE);
++
++ if (!SDIO_SUCCESS(status)) {
++ if (pQueue != NULL) {
++ _DeleteMessageQueue(pQueue);
++ pQueue = NULL;
++ }
++ }
++ return pQueue;
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Delete a message queue
++
++ @function name: SDLIB_DeleteMessageQueue
++ @prototype: void SDLIB_DeleteMessageQueue(PSDMESSAGE_QUEUE pQueue)
++ @category: Support_Reference
++
++ @input: pQueue - message queue to delete
++
++ @notes: This function flushes the message queue and frees all memory allocated for
++ messages.
++
++ @see also: SDLIB_CreateMessageQueue
++
++ @example: Deleting a message queue:
++ if (pMsgQueue != NULL) {
++ SDLIB_DeleteMessageQueue(pMsgQueue);
++ }
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void _DeleteMessageQueue(PSDMESSAGE_QUEUE pQueue)
++{
++ PSDMESSAGE_BLOCK pMsg;
++ SDIO_STATUS status;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ status = CriticalSectionAcquireSyncIrq(&pQueue->MessageCritSection);
++
++ /* cleanup free list */
++ while (1) {
++ pMsg = GetFreeMessageBlock(pQueue);
++ if (pMsg != NULL) {
++ KernelFree(pMsg);
++ } else {
++ break;
++ }
++ }
++ /* cleanup any in the queue */
++ while (1) {
++ pMsg = GetQueuedMessage(pQueue);
++ if (pMsg != NULL) {
++ KernelFree(pMsg);
++ } else {
++ break;
++ }
++ }
++
++ status = CriticalSectionReleaseSyncIrq(&pQueue->MessageCritSection);
++ CriticalSectionDelete(&pQueue->MessageCritSection);
++ KernelFree(pQueue);
++
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Post a message queue
++
++ @function name: SDLIB_PostMessage
++ @prototype: SDIO_STATUS SDLIB_PostMessage(PSDMESSAGE_QUEUE pQueue, PVOID pMessage, INT MessageLength)
++ @category: Support_Reference
++
++ @input: pQueue - message queue to post to
++ @input: pMessage - message to post
++ @input: MessageLength - length of message (for validation)
++
++ @return: SDIO_STATUS
++
++ @notes: The message queue uses an internal list of user defined message structures. When
++ posting a message the message is copied into an allocated structure and queued. The memory
++ pointed to by pMessage does not need to be allocated and can reside on the stack.
++ The length of the message to post can be smaller that the maximum message size. This allows
++ for variable length messages up to the maximum message size. This
++ function returns SDIO_STATUS_NO_RESOURCES, if the message queue is full. This
++ function returns SDIO_STATUS_BUFFER_TOO_SMALL, if the message size exceeds the maximum
++ size of a message. Posting and getting messsages from a message queue is safe in any
++ driver context.
++
++ @see also: SDLIB_CreateMessageQueue , SDLIB_GetMessage
++
++ @example: Posting a message
++ MyMessage message;
++ // set up message
++ message.code = MESSAGE_DATA_READY;
++ message.pData = pInstance->pDataBuffers[currentIndex];
++ // post message
++ status = SDLIB_PostMessage(pInstance->pReadQueue,&message,sizeof(message));
++ if (!SDIO_SUCCESS(status)) {
++ // failed
++ }
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _PostMessage(PSDMESSAGE_QUEUE pQueue, PVOID pMessage, INT MessageLength)
++{
++ SDIO_STATUS status2;
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ PSDMESSAGE_BLOCK pMsg;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ if (MessageLength > pQueue->MaxMessageLength) {
++ return SDIO_STATUS_BUFFER_TOO_SMALL;
++ }
++
++ status = CriticalSectionAcquireSyncIrq(&pQueue->MessageCritSection);
++ if (!SDIO_SUCCESS(status)) {
++ return status;
++ }
++
++ do {
++ /* get a message block */
++ pMsg = GetFreeMessageBlock(pQueue);
++ if (NULL == pMsg) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++ /* copy the message */
++ memcpy(pMsg->MessageStart,pMessage,MessageLength);
++ /* set the length of the message */
++ pMsg->MessageLength = MessageLength;
++ /* queue the message to the list */
++ QueueMessageBlock(pQueue,pMsg);
++ } while (FALSE);
++
++ status2 = CriticalSectionReleaseSyncIrq(&pQueue->MessageCritSection);
++ return status;
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get a message from a message queue
++
++ @function name: SDLIB_GetMessage
++ @prototype: SDIO_STATUS SDLIB_GetMessage(PSDMESSAGE_QUEUE pQueue, PVOID pData, INT *pBufferLength)
++ @category: Support_Reference
++
++ @input: pQueue - message queue to retreive a message from
++ @input: pBufferLength - on entry, the length of the data buffer
++ @output: pData - buffer to hold the message
++ @output: pBufferLength - on return, contains the number of bytes copied
++
++ @return: SDIO_STATUS
++
++ @notes: The message queue uses an internal list of user defined message structures. The message is
++ dequeued (FIFO order) and copied to the callers buffer. The internal allocation for the message
++ is returned back to the message queue. This function returns SDIO_STATUS_NO_MORE_MESSAGES
++ if the message queue is empty. If the length of the buffer is smaller than the length of
++ the message at the head of the queue,this function returns SDIO_STATUS_BUFFER_TOO_SMALL and
++ returns the required length in pBufferLength.
++
++ @see also: SDLIB_CreateMessageQueue , SDLIB_PostMessage
++
++ @example: Getting a message
++ MyMessage message;
++ INT length;
++ // set length
++ length = sizeof(message);
++ // post message
++ status = SDLIB_GetMessage(pInstance->pReadQueue,&message,&length);
++ if (!SDIO_SUCCESS(status)) {
++ // failed
++ }
++
++ @example: Checking queue for a message and getting the size of the message
++ INT length;
++ // use zero length to get the size of the message
++ length = 0;
++ status = SDLIB_GetMessage(pInstance->pReadQueue,NULL,&length);
++ if (status == SDIO_STATUS_NO_MORE_MESSAGES) {
++ // no messages in queue
++ } else if (status == SDIO_STATUS_BUFFER_TOO_SMALL) {
++ // message exists in queue and length of message is returned
++ messageSizeInQueue = length;
++ } else {
++ // some other failure
++ }
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _GetMessage(PSDMESSAGE_QUEUE pQueue, PVOID pData, INT *pBufferLength)
++{
++ SDIO_STATUS status2;
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++ PSDMESSAGE_BLOCK pMsg;
++ CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++ status = CriticalSectionAcquireSyncIrq(&pQueue->MessageCritSection);
++ if (!SDIO_SUCCESS(status)) {
++ return status;
++ }
++
++ do {
++ pMsg = GetQueuedMessage(pQueue);
++ if (NULL == pMsg) {
++ status = SDIO_STATUS_NO_MORE_MESSAGES;
++ break;
++ }
++ if (*pBufferLength < pMsg->MessageLength) {
++ /* caller buffer is too small */
++ *pBufferLength = pMsg->MessageLength;
++ /* stick it back to the front */
++ QueueMessageToHead(pQueue, pMsg);
++ status = SDIO_STATUS_BUFFER_TOO_SMALL;
++ break;
++ }
++ /* copy the message to the callers buffer */
++ memcpy(pData,pMsg->MessageStart,pMsg->MessageLength);
++ /* return actual length */
++ *pBufferLength = pMsg->MessageLength;
++ /* return this message block back to the free list */
++ FreeMessageBlock(pQueue, pMsg);
++
++ } while (FALSE);
++
++ status2 = CriticalSectionReleaseSyncIrq(&pQueue->MessageCritSection);
++
++ return status;
++}
++
++/* the following documents the OS helper APIs */
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Create an OS-specific helper task/thread
++
++ @function name: SDLIB_OSCreateHelper
++ @prototype: SDIO_STATUS SDLIB_OSCreateHelper(POSKERNEL_HELPER pHelper,
++ PHELPER_FUNCTION pFunction,
++ PVOID pContext)
++ @category: Support_Reference
++
++ @input: pHelper - caller allocated helper object
++ @input: pFunction - helper function
++ @input: pContext - helper context
++
++ @return: SDIO_STATUS
++
++ @notes: This function creates a helper task/thread that runs in a new execution context. The newly
++ created task/thread invokes the helper function. The thread/task exits when the helper
++ function returns. The helper function has the prototype of:
++ THREAD_RETURN HelperFunction(POSKERNEL_HELPER pHelper)
++ The helper function usually implements a while loop and suspends execution using
++ SD_WAIT_FOR_WAKEUP(). On exit the helper function can return an OS-specific THREAD_RETURN
++ code (usually zero). The helper function executes in a fully schedule-able context and
++ can block on semaphores and sleep.
++
++ @see also: SDLIB_OSDeleteHelper , SD_WAIT_FOR_WAKEUP
++
++ @example: A thread helper function:
++ THREAD_RETURN HelperFunction(POSKERNEL_HELPER pHelper)
++ {
++ SDIO_STATUS status;
++ PMYCONTEXT pContext = (PMYCONTEXT)SD_GET_OS_HELPER_CONTEXT(pHelper);
++ // wait for wake up
++ while(1) {
++ status = SD_WAIT_FOR_WAKEUP(pHelper);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
++ //... shutting down
++ break;
++ }
++ // handle wakeup...
++ }
++ return 0;
++ }
++
++ @example: Creating a helper:
++ status = SDLIB_OSCreateHelper(&pInstance->OSHelper,HelperFunction,pInstance);
++ if (!SDIO_SUCCESS(status)) {
++ // failed
++ }
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Delete an OS helper task/thread
++
++ @function name: SDLIB_OSDeleteHelper
++ @prototype: void SDLIB_OSDeleteHelper(POSKERNEL_HELPER pHelper)
++ @category: Support_Reference
++
++ @input: pHelper - caller allocated helper object
++
++ @notes: This function wakes the helper and waits(blocks) until the helper exits. The caller can
++ only pass an OS helper structure that was initialized sucessfully by
++ SDLIB_OSCreateHelper. The caller must be in a schedulable context.
++
++ @see also: SDLIB_OSCreateHelper
++
++ @example: Deleting a helper:
++ if (pInstance->HelperCreated) {
++ // clean up the helper if we successfully created it
++ SDLIB_OSDeleteHelper(&pInstance->OSHelper);
++ }
++
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++
+Index: linux-2.6.24.7/drivers/sdio/stack/lib/_sdio_lib.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/stack/lib/_sdio_lib.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,50 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: _sdio_lib.h
++
++@abstract: SDIO Lib internal include
++
++#notes:
++
++@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef ___SDIO_LIB_H___
++#define ___SDIO_LIB_H___
++
++#endif /* ___SDIO_LIB_H___*/
+Index: linux-2.6.24.7/drivers/sdio/stack/lib/sdio_lib_os.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/stack/lib/sdio_lib_os.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,251 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: sdio_function_os.c
++
++@abstract: Linux implementation module for SDIO library
++
++#notes: includes module load and unload functions
++
++@notice: Copyright (c), 2004 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++/* debug level for this module*/
++#define DBG_DECLARE 4;
++#include <linux/sdio/ctsystem.h>
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kthread.h>
++
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/sdio_lib.h>
++#include "_sdio_lib.h"
++
++#define DESCRIPTION "SDIO Kernel Library"
++#define AUTHOR "Atheros Communications, Inc."
++
++/* proxies */
++SDIO_STATUS SDLIB_IssueCMD52(PSDDEVICE pDevice,
++ UINT8 FuncNo,
++ UINT32 Address,
++ PUINT8 pData,
++ INT ByteCount,
++ BOOL Write)
++{
++ return _SDLIB_IssueCMD52(pDevice,FuncNo,Address,pData,ByteCount,Write);
++}
++
++SDIO_STATUS SDLIB_FindTuple(PSDDEVICE pDevice,
++ UINT8 Tuple,
++ UINT32 *pTupleScanAddress,
++ PUINT8 pBuffer,
++ UINT8 *pLength)
++{
++ return _SDLIB_FindTuple(pDevice,Tuple,pTupleScanAddress,pBuffer,pLength);
++}
++
++SDIO_STATUS SDLIB_IssueConfig(PSDDEVICE pDevice,
++ SDCONFIG_COMMAND Command,
++ PVOID pData,
++ INT Length)
++{
++ return _SDLIB_IssueConfig(pDevice,Command,pData,Length);
++}
++
++void SDLIB_PrintBuffer(PUCHAR pBuffer,INT Length,PTEXT pDescription)
++{
++ _SDLIB_PrintBuffer(pBuffer,Length,pDescription);
++}
++
++SDIO_STATUS SDLIB_SetFunctionBlockSize(PSDDEVICE pDevice,
++ UINT16 BlockSize)
++{
++ return _SDLIB_SetFunctionBlockSize(pDevice,BlockSize);
++}
++
++void SDLIB_SetupCMD52Request(UINT8 FuncNo,
++ UINT32 Address,
++ BOOL Write,
++ UINT8 WriteData,
++ PSDREQUEST pRequest)
++{
++ _SDLIB_SetupCMD52Request(FuncNo,Address,Write,WriteData,pRequest);
++}
++
++SDIO_STATUS SDLIB_GetDefaultOpCurrent(PSDDEVICE pDevice, SD_SLOT_CURRENT *pOpCurrent)
++{
++ return _SDLIB_GetDefaultOpCurrent(pDevice,pOpCurrent);
++}
++
++/* helper function launcher */
++INT HelperLaunch(PVOID pContext)
++{
++ INT exit;
++ /* call function */
++ exit = ((POSKERNEL_HELPER)pContext)->pHelperFunc((POSKERNEL_HELPER)pContext);
++ complete_and_exit(&((POSKERNEL_HELPER)pContext)->Completion, exit);
++ return exit;
++}
++
++/*
++ * OSCreateHelper - create a worker kernel thread
++*/
++SDIO_STATUS SDLIB_OSCreateHelper(POSKERNEL_HELPER pHelper,
++ PHELPER_FUNCTION pFunction,
++ PVOID pContext)
++{
++ SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++ memset(pHelper,0,sizeof(OSKERNEL_HELPER));
++
++ do {
++ pHelper->pContext = pContext;
++ pHelper->pHelperFunc = pFunction;
++ status = SignalInitialize(&pHelper->WakeSignal);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ init_completion(&pHelper->Completion);
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ pHelper->pTask = kthread_create(HelperLaunch,
++ (PVOID)pHelper,
++ "SDIO Helper");
++ if (NULL == pHelper->pTask) {
++ status = SDIO_STATUS_NO_RESOURCES;
++ break;
++ }
++ wake_up_process(pHelper->pTask);
++#else
++ /* 2.4 */
++ pHelper->pTask = kernel_thread(HelperLaunch,
++ (PVOID)pHelper,
++ (CLONE_FS | CLONE_FILES | SIGCHLD));
++ if (pHelper->pTask < 0) {
++ DBG_PRINT(SDDBG_TRACE,
++ ("SDIO BusDriver - OSCreateHelper, failed to create thread\n"));
++ }
++#endif
++
++ } while (FALSE);
++
++ if (!SDIO_SUCCESS(status)) {
++ SDLIB_OSDeleteHelper(pHelper);
++ }
++ return status;
++}
++
++/*
++ * OSDeleteHelper - delete thread created with OSCreateHelper
++*/
++void SDLIB_OSDeleteHelper(POSKERNEL_HELPER pHelper)
++{
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ if (pHelper->pTask != NULL) {
++#else
++ /* 2.4 */
++ if (pHelper->pTask >= 0) {
++#endif
++ pHelper->ShutDown = TRUE;
++ SignalSet(&pHelper->WakeSignal);
++ /* wait for thread to exit */
++ wait_for_completion(&pHelper->Completion);
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ pHelper->pTask = NULL;
++#else
++ /* 2.4 */
++ pHelper->pTask = 0;
++#endif
++ }
++
++ SignalDelete(&pHelper->WakeSignal);
++}
++
++/*
++ * module init
++*/
++static int __init sdio_lib_init(void) {
++ REL_PRINT(SDDBG_TRACE, ("SDIO Library load\n"));
++ return 0;
++}
++
++/*
++ * module cleanup
++*/
++static void __exit sdio_lib_cleanup(void) {
++ REL_PRINT(SDDBG_TRACE, ("SDIO Library unload\n"));
++}
++
++PSDMESSAGE_QUEUE SDLIB_CreateMessageQueue(INT MaxMessages, INT MaxMessageLength)
++{
++ return _CreateMessageQueue(MaxMessages,MaxMessageLength);
++
++}
++void SDLIB_DeleteMessageQueue(PSDMESSAGE_QUEUE pQueue)
++{
++ _DeleteMessageQueue(pQueue);
++}
++
++SDIO_STATUS SDLIB_PostMessage(PSDMESSAGE_QUEUE pQueue, PVOID pMessage, INT MessageLength)
++{
++ return _PostMessage(pQueue,pMessage,MessageLength);
++}
++
++SDIO_STATUS SDLIB_GetMessage(PSDMESSAGE_QUEUE pQueue, PVOID pData, INT *pBufferLength)
++{
++ return _GetMessage(pQueue,pData,pBufferLength);
++}
++
++MODULE_LICENSE("GPL and additional rights");
++MODULE_DESCRIPTION(DESCRIPTION);
++MODULE_AUTHOR(AUTHOR);
++module_init(sdio_lib_init);
++module_exit(sdio_lib_cleanup);
++EXPORT_SYMBOL(SDLIB_IssueCMD52);
++EXPORT_SYMBOL(SDLIB_FindTuple);
++EXPORT_SYMBOL(SDLIB_IssueConfig);
++EXPORT_SYMBOL(SDLIB_PrintBuffer);
++EXPORT_SYMBOL(SDLIB_SetFunctionBlockSize);
++EXPORT_SYMBOL(SDLIB_SetupCMD52Request);
++EXPORT_SYMBOL(SDLIB_GetDefaultOpCurrent);
++EXPORT_SYMBOL(SDLIB_OSCreateHelper);
++EXPORT_SYMBOL(SDLIB_OSDeleteHelper);
++EXPORT_SYMBOL(SDLIB_CreateMessageQueue);
++EXPORT_SYMBOL(SDLIB_DeleteMessageQueue);
++EXPORT_SYMBOL(SDLIB_PostMessage);
++EXPORT_SYMBOL(SDLIB_GetMessage);
+Index: linux-2.6.24.7/drivers/sdio/stack/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/stack/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1 @@
++obj-$(CONFIG_SDIO) += busdriver/ lib/
+\ No newline at end of file
+Index: linux-2.6.24.7/drivers/sdio/stack/platform/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/stack/platform/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,2 @@
++obj-$(CONFIG_SDIO) += sdio_platform.o
++sdio_platform-objs := sdioplatformdriver.o
+\ No newline at end of file
+Index: linux-2.6.24.7/drivers/sdio/stack/platform/sdioplatformdriver.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/sdio/stack/platform/sdioplatformdriver.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,300 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: sdioplatformdriver.c
++
++@abstract: Linux implementation module for SDIO pltaform driver
++
++#notes:
++
++@notice: Copyright (c), 2006 Atheros Communications, Inc.
++
++@license: This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License version 2 as
++ published by the Free Software Foundation.
++
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++#define DESCRIPTION "SDIO Platform Driver"
++#define AUTHOR "Atheros Communications, Inc."
++
++//??for .h
++
++struct sdioplatform_peripheral {
++ struct list_head node;
++ struct sdioplatform_controller *controller;
++ struct device dev;
++};
++struct sdioplatform_driver {
++ struct device_driver drv;
++ int (*probe)(struct sdioplatform_peripheral *);
++ void (*remove)(struct sdioplatform_peripheral *);
++ int (*suspend)(struct sdioplatform_peripheral *, pm_message_t);
++ int (*resume)(struct sdioplatform_peripheral *);
++};
++
++
++struct sdioplatform_controller {
++ struct device *dev;
++};
++struct sdioplatform_controller_driver {
++ struct device_driver drv;
++ int (*probe)(struct sdioplatform_controller *);
++ void (*remove)(struct sdioplatform_controller *);
++ int (*suspend)(struct sdioplatform_controller *, pm_message_t);
++ int (*resume)(struct sdioplatform_controller *);
++};
++
++
++
++#define device_to_sdioplatform_peripheral(d) container_of(d, struct sdioplatform_peripheral, dev)
++#define driver_to_sdioplatform_driver(d) container_of(d, struct sdioplatform_driver, drv)
++
++#define device_to_sdioplatform_controller(d) container_of(d, struct sdioplatform_controller, dev)
++#define driver_to_sdioplatform_controller_driver(d) container_of(d, struct sdioplatform_controller_driver, drv)
++
++#define SDIOPLATFORM_ATTR(name, fmt, args...) \
++static ssize_t sdio_##name##_show (struct device *dev, struct device_attribute *attr, char *buf) \
++{ \
++ struct sdioplatform_peripheral *peripheral = device_to_sdioplatform_peripheral(dev); \
++ return sprintf(buf, fmt, args); \
++}
++
++SDIOPLATFORM_ATTR(bus_id, "%s\n", bus_id);
++#define SDIOPLATFORM_ATTR_RO(name) __ATTR(name, S_IRUGO, sdioplatform_##name##_show, NULL)
++
++static struct device_attribute sdioplatform_dev_attrs[] = {
++ SDIOPLATFORM_ATTR_RO(bus_id),
++ __ATTR_NULL
++};
++
++static struct bus_type sdioplatform_bus_type = {
++ .name = "sdioplatform",
++ .dev_attrs = sdioplatform_dev_attrs,
++ .match = sdioplatform_bus_match,
++ .hotplug = NULL,
++ .suspend = sdioplatform_bus_suspend,
++ .resume = sdioplatform_bus_resume,
++};
++
++
++/* controller functions */
++static int sdioplatform_controllerdrv_probe(struct device *dev)
++{
++ struct sdioplatform_controller_driver *drv = driver_to_sdioplatform_controller_driver(dev->driver);
++ struct sdioplatform_controller *controller = device_to_sdioplatform_controller(dev);
++
++ return drv->probe(controller);
++}
++
++static int sdioplatform_controllerdrv_remove(struct device *dev)
++{
++ struct sdioplatform_controller_driver *drv = driver_to_sdioplatform_controller_driver(dev->driver);
++ struct sdioplatform_controller *controller = device_to_sdioplatform_controller(dev);
++
++ return drv->remove(controller);
++}
++
++/*
++ * sdioplatform_register_controller_driver - register a controller driver
++ */
++int sdioplatform_register_controller_driver(struct sdioplatform_controller_driver *drv)
++{
++ drv->drv.bus = &sdioplatform_bus_type;
++ drv->drv.probe = sdioplatform_controllerdrv_probe;
++ drv->drv.remove = sdioplatform_controllerdrv_remove;
++ return driver_register(&drv->drv);
++}
++
++/*
++ * sdioplatform_unregister_controller_driver - unregister a controller driver
++ */
++void sdioplatform_unregister_controller_driver(struct sdioplatform_driver *drv)
++{
++ driver_unregister(&drv->drv);
++}
++
++/*
++ * sdioplatform_add_controller - register a controller device
++ */
++int sdioplatform_add_controller(char *name, struct sdioplatform_controller *dev)
++{
++ if (!dev) {
++ return -EINVAL;
++ }
++ strncpy(dev->dev.bus_id, BUS_ID_SIZE, name);
++ return device_register(&dev->dev);
++}
++
++/*
++ * sdioplatform_remove_controller - unregister a controller device
++ */
++int sdioplatform_remove_controller(char *name, struct sdioplatform_controller *dev)
++{
++ if (!dev) {
++ return -EINVAL;
++ }
++ return device_unregister(&dev->dev);
++}
++
++/* peripheral functions */
++static int sdioplatform_drv_probe(struct device *dev)
++{
++ struct sdioplatform_driver *drv = driver_to_sdioplatform_driver(dev->driver);
++ struct sdioplatform_peripheral *peripheral = device_to_sdioplatform_peripheral(dev);
++
++ return drv->probe(peripheral);
++}
++
++static int sdioplatform_controllerdrv_remove(struct device *dev)
++{
++ struct sdioplatform_controller_driver *drv = driver_to_sdioplatform_controller_driver(dev->driver);
++ struct sdioplatform_controller *controller = device_to_sdioplatform_controller(dev);
++
++ return drv->remove(controller);
++}
++
++/*
++ * sdioplatform_register_driver - register a driver
++ */
++int sdioplatform_register_driver(struct sdioplatform_driver *drv)
++{
++ drv->drv.bus = &sdioplatform_bus_type;
++ drv->drv.probe = sdioplatform_drv_probe;
++ drv->drv.remove = sdioplatform_drv_remove;
++ return driver_register(&drv->drv);
++}
++
++/*
++ * sdioplatform_unregister_driver - unregister a driver
++ */
++void sdioplatform_unregister_driver(struct sdioplatform_driver *drv)
++{
++ driver_unregister(&drv->drv);
++}
++
++/*
++ * sdioplatform_add_peripheral - register a peripheral device
++ */
++int sdioplatform_add_peripheral(char *name, struct sdioplatform_peripheral *dev)
++{
++ if (!dev) {
++ return -EINVAL;
++ }
++ strncpy(dev->dev.bus_id, BUS_ID_SIZE, name);
++ return device_register(&dev->dev);
++}
++
++/*
++ * sdioplatform_remove_peripheral - unregister a peripheral device
++ */
++int sdioplatform_remove_peripheral(char *name, struct sdioplatform_peripheral *dev)
++{
++ if (!dev) {
++ return -EINVAL;
++ }
++ return device_unregister(&dev->dev);
++}
++
++
++
++
++
++static int sdioplatform_bus_match(struct device *dev, struct device_driver *drv)
++{
++ /* probes handle the matching */
++ return 1;
++}
++
++static int sdioplatform_bus_suspend(struct device *dev, pm_message_t state)
++{
++ struct sdioplatform_driver *drv = driver_to_sdioplatform_driver(dev->driver);
++ struct sdioplatform_peripheral *peripheral = device_to_sdioplatform_peripheral(dev);
++ int ret = 0;
++
++ if (peripheral->driver && drv->suspend) {
++ ret = drv->suspend(peripheral, state);
++ }
++ return ret;
++}
++
++static int sdioplatform_bus_resume(struct device *dev)
++{
++ struct sdioplatform_driver *drv = driver_to_sdioplatform_driver(dev->driver);
++ struct sdioplatform_peripheral *peripheral = device_to_sdioplatform_peripheral(dev);
++ int ret = 0;
++
++ if (peripheral->driver && drv->resume) {
++ ret = drv->resume(card);
++ }
++ return ret;
++}
++
++/*
++ * module init
++*/
++static int __init sdio_platformdriver_init(void) {
++ int ret = bus_register(&sdioplatform_bus_type);
++ return ret;
++}
++
++/*
++ * module cleanup
++*/
++static void __exit sdio_platformdriver_cleanup(void) {
++ REL_PRINT(SDDBG_TRACE, ("SDIO unloaded\n"));
++ _SDIO_BusDriverCleanup();
++}
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION(DESCRIPTION);
++MODULE_AUTHOR(AUTHOR);
++
++module_init(sdio_platformdriver_init);
++module_exit(sdio_platformdriver_cleanup);
++EXPORT_SYMBOL(sdioplatform_register_controller_driver);
++EXPORT_SYMBOL(sdioplatform_unregister_controller_driver);
++EXPORT_SYMBOL(sdioplatform_add_controller);
++EXPORT_SYMBOL(sdioplatform_remove_controller);
++EXPORT_SYMBOL(sdioplatform_register_driver);
++EXPORT_SYMBOL(sdioplatform_unregister_driver);
++EXPORT_SYMBOL(sdioplatform_add_peripheral);
++EXPORT_SYMBOL(sdioplatform_remove_peripheral);
++
++
++
+Index: linux-2.6.24.7/drivers/serial/s3c2410.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/serial/s3c2410.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/serial/s3c2410.c 2008-12-11 22:46:49.000000000 +0100
+@@ -72,6 +72,7 @@
+ #include <linux/serial.h>
+ #include <linux/delay.h>
+ #include <linux/clk.h>
++#include <linux/resume-dependency.h>
+
+ #include <asm/io.h>
+ #include <asm/irq.h>
+@@ -80,6 +81,7 @@
+
+ #include <asm/plat-s3c/regs-serial.h>
+ #include <asm/arch/regs-gpio.h>
++#include <asm/arch/regs-clock.h>
+
+ /* structures */
+
+@@ -112,6 +114,9 @@ struct s3c24xx_uart_port {
+ struct clk *clk;
+ struct clk *baudclk;
+ struct uart_port port;
++
++ struct resume_dependency resume_dependency;
++ int is_suspended;
+ };
+
+
+@@ -353,7 +358,7 @@ s3c24xx_serial_rx_chars(int irq, void *d
+ port->icount.rx++;
+
+ if (unlikely(uerstat & S3C2410_UERSTAT_ANY)) {
+- dbg("rxerr: port ch=0x%02x, rxs=0x%08x\n",
++ printk(KERN_DEBUG "rxerr: port ch=0x%02x, rxs=0x%08x\n",
+ ch, uerstat);
+
+ /* check for break */
+@@ -382,7 +387,8 @@ s3c24xx_serial_rx_chars(int irq, void *d
+ if (uart_handle_sysrq_char(port, ch))
+ goto ignore_char;
+
+- uart_insert_char(port, uerstat, S3C2410_UERSTAT_OVERRUN, ch, flag);
++ uart_insert_char(port, uerstat, S3C2410_UERSTAT_OVERRUN, ch,
++ flag);
+
+ ignore_char:
+ continue;
+@@ -708,10 +714,6 @@ static unsigned int s3c24xx_serial_getcl
+ int calc_deviation;
+
+ for (sptr = res; sptr < resptr; sptr++) {
+- printk(KERN_DEBUG
+- "found clk %p (%s) quot %d, calc %d\n",
+- sptr->clksrc, sptr->clksrc->name,
+- sptr->quot, sptr->calc);
+
+ calc_deviation = baud - sptr->calc;
+ if (calc_deviation < 0)
+@@ -723,12 +725,8 @@ static unsigned int s3c24xx_serial_getcl
+ }
+ }
+
+- printk(KERN_DEBUG "best %p (deviation %d)\n", best, deviation);
+ }
+
+- printk(KERN_DEBUG "selected clock %p (%s) quot %d, calc %d\n",
+- best->clksrc, best->clksrc->name, best->quot, best->calc);
+-
+ /* store results to pass back */
+
+ *clksrc = best->clksrc;
+@@ -996,6 +994,69 @@ static struct s3c24xx_uart_port s3c24xx_
+ #endif
+ };
+
++static void s3c24xx_serial_force_debug_port_up(void)
++{
++ struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
++ CONFIG_DEBUG_S3C_UART];
++ struct s3c24xx_uart_clksrc *clksrc = NULL;
++ struct clk *clk = NULL;
++ unsigned long tmp;
++
++ s3c24xx_serial_getclk(&ourport->port, &clksrc, &clk, 115200);
++
++ tmp = __raw_readl(S3C2410_CLKCON);
++
++ /* re-start uart clocks */
++ tmp |= S3C2410_CLKCON_UART0;
++ tmp |= S3C2410_CLKCON_UART1;
++ tmp |= S3C2410_CLKCON_UART2;
++
++ __raw_writel(tmp, S3C2410_CLKCON);
++ udelay(10);
++
++ s3c24xx_serial_setsource(&ourport->port, clksrc);
++
++ if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
++ clk_disable(ourport->baudclk);
++ ourport->baudclk = NULL;
++ }
++
++ clk_enable(clk);
++
++ ourport->clksrc = clksrc;
++ ourport->baudclk = clk;
++}
++
++static void s3c2410_printascii(const char *sz)
++{
++ struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
++ CONFIG_DEBUG_S3C_UART];
++ struct uart_port *port = &ourport->port;
++
++ /* 8 N 1 */
++ wr_regl(port, S3C2410_ULCON, (rd_regl(port, S3C2410_ULCON)) | 3);
++ /* polling mode */
++ wr_regl(port, S3C2410_UCON, (rd_regl(port, S3C2410_UCON) & ~0xc0f) | 5);
++ /* disable FIFO */
++ wr_regl(port, S3C2410_UFCON, (rd_regl(port, S3C2410_UFCON) & ~0x01));
++ /* fix baud rate */
++ wr_regl(port, S3C2410_UBRDIV, 26);
++
++ while (*sz) {
++ int timeout = 10000000;
++
++ /* spin on it being busy */
++ while ((!(rd_regl(port, S3C2410_UTRSTAT) & 2)) && timeout--)
++ ;
++
++ /* transmit register */
++ wr_regl(port, S3C2410_UTXH, *sz);
++
++ sz++;
++ }
++}
++
++
+ /* s3c24xx_serial_resetport
+ *
+ * wrapper to call the specific reset for this port (reset the fifos
+@@ -1093,6 +1154,8 @@ static int s3c24xx_serial_probe(struct p
+ ourport = &s3c24xx_serial_ports[probe_index];
+ probe_index++;
+
++ init_resume_dependency_list(&ourport->resume_dependency);
++
+ dbg("%s: initialising port %p...\n", __FUNCTION__, ourport);
+
+ ret = s3c24xx_serial_init_port(ourport, info, dev);
+@@ -1126,13 +1189,28 @@ static int s3c24xx_serial_remove(struct
+ static int s3c24xx_serial_suspend(struct platform_device *dev, pm_message_t state)
+ {
+ struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
++ struct s3c24xx_uart_port *ourport = to_ourport(port);
+
+ if (port)
+ uart_suspend_port(&s3c24xx_uart_drv, port);
+
++ activate_all_resume_dependencies(&ourport->resume_dependency);
++ ourport->is_suspended = 1;
+ return 0;
+ }
+
++void s3c24xx_serial_register_resume_dependency(struct resume_dependency *
++ resume_dependency, int uart_index)
++{
++ struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[uart_index];
++
++ register_resume_dependency(&ourport->resume_dependency,
++ resume_dependency);
++ if (ourport->is_suspended)
++ activate_all_resume_dependencies(&ourport->resume_dependency);
++}
++EXPORT_SYMBOL(s3c24xx_serial_register_resume_dependency);
++
+ static int s3c24xx_serial_resume(struct platform_device *dev)
+ {
+ struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
+@@ -1146,6 +1224,9 @@ static int s3c24xx_serial_resume(struct
+ uart_resume_port(&s3c24xx_uart_drv, port);
+ }
+
++ ourport->is_suspended = 0;
++ callback_all_resume_dependencies(&ourport->resume_dependency);
++
+ return 0;
+ }
+
+@@ -1157,6 +1238,11 @@ static int s3c24xx_serial_resume(struct
+ static int s3c24xx_serial_init(struct platform_driver *drv,
+ struct s3c24xx_uart_info *info)
+ {
++ /* set up the emergency debug UART functions */
++
++ printk_emergency_debug_spew_init = s3c24xx_serial_force_debug_port_up;
++ printk_emergency_debug_spew_send_string = s3c2410_printascii;
++
+ dbg("s3c24xx_serial_init(%p,%p)\n", drv, info);
+ return platform_driver_register(drv);
+ }
+@@ -1701,6 +1787,13 @@ module_exit(s3c24xx_serial_modexit);
+ #ifdef CONFIG_SERIAL_S3C2410_CONSOLE
+
+ static struct uart_port *cons_uart;
++static int cons_silenced;
++
++void s3c24xx_serial_console_set_silence(int silenced)
++{
++ cons_silenced = silenced;
++}
++EXPORT_SYMBOL(s3c24xx_serial_console_set_silence);
+
+ static int
+ s3c24xx_serial_console_txrdy(struct uart_port *port, unsigned int ufcon)
+@@ -1725,9 +1818,21 @@ static void
+ s3c24xx_serial_console_putchar(struct uart_port *port, int ch)
+ {
+ unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON);
++ unsigned int umcon = rd_regl(cons_uart, S3C2410_UMCON);
++
++ if (cons_silenced)
++ return;
++
++ /* If auto HW flow control enabled, temporarily turn it off */
++ if (umcon & S3C2410_UMCOM_AFC)
++ wr_regl(port, S3C2410_UMCON, (umcon & !S3C2410_UMCOM_AFC));
++
+ while (!s3c24xx_serial_console_txrdy(port, ufcon))
+ barrier();
+ wr_regb(cons_uart, S3C2410_UTXH, ch);
++
++ if (umcon & S3C2410_UMCOM_AFC)
++ wr_regl(port, S3C2410_UMCON, umcon);
+ }
+
+ static void
+Index: linux-2.6.24.7/drivers/spi/spi_s3c24xx_gpio.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/spi/spi_s3c24xx_gpio.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/spi/spi_s3c24xx_gpio.c 2008-12-11 22:46:49.000000000 +0100
+@@ -91,7 +91,7 @@ static void s3c2410_spigpio_chipselect(s
+ struct s3c2410_spigpio *sg = spidev_to_sg(dev);
+
+ if (sg->info && sg->info->chip_select)
+- (sg->info->chip_select)(sg->info, value);
++ (sg->info->chip_select)(sg->info, dev->chip_select, value);
+ }
+
+ static int s3c2410_spigpio_probe(struct platform_device *dev)
+@@ -113,9 +113,11 @@ static int s3c2410_spigpio_probe(struct
+
+ platform_set_drvdata(dev, sp);
+
+- /* copy in the plkatform data */
++ /* copy in the platform data */
+ info = sp->info = dev->dev.platform_data;
+
++ master->num_chipselect = info->num_chipselect;
++
+ /* setup spi bitbang adaptor */
+ sp->bitbang.master = spi_master_get(master);
+ sp->bitbang.master->bus_num = info->bus_num;
+@@ -146,12 +148,17 @@ static int s3c2410_spigpio_probe(struct
+ /* register the chips to go with the board */
+
+ for (i = 0; i < sp->info->board_size; i++) {
++ struct spi_device *spidev;
++
+ dev_info(&dev->dev, "registering %p: %s\n",
+ &sp->info->board_info[i],
+ sp->info->board_info[i].modalias);
+
+ sp->info->board_info[i].controller_data = sp;
+- spi_new_device(master, sp->info->board_info + i);
++ spidev = spi_new_device(master, sp->info->board_info + i);
++ if (spidev)
++ spidev->max_speed_hz =
++ sp->info->board_info[i].max_speed_hz;
+ }
+
+ return 0;
+Index: linux-2.6.24.7/drivers/usb/gadget/ether.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/usb/gadget/ether.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/usb/gadget/ether.c 2008-12-11 22:48:25.000000000 +0100
+@@ -134,11 +134,8 @@ struct eth_dev {
+ * Instead: allocate your own, using normal USB-IF procedures.
+ */
+
+-/* Thanks to NetChip Technologies for donating this product ID.
+- * It's for devices with only CDC Ethernet configurations.
+- */
+-#define CDC_VENDOR_NUM 0x0525 /* NetChip */
+-#define CDC_PRODUCT_NUM 0xa4a1 /* Linux-USB Ethernet Gadget */
++#define CDC_VENDOR_NUM 0x1457 /* First International Computer */
++#define CDC_PRODUCT_NUM 0x5117 /* Linux-USB Ethernet Gadget */
+
+ /* For hardware that can't talk CDC, we use the same vendor ID that
+ * ARM Linux has used for ethernet-over-usb, both with sa1100 and
+@@ -159,8 +156,8 @@ struct eth_dev {
+ * used with CDC Ethernet, Linux 2.4 hosts will need updates to choose
+ * the non-RNDIS configuration.
+ */
+-#define RNDIS_VENDOR_NUM 0x0525 /* NetChip */
+-#define RNDIS_PRODUCT_NUM 0xa4a2 /* Ethernet/RNDIS Gadget */
++#define RNDIS_VENDOR_NUM 0x1457 /* NetChip */
++#define RNDIS_PRODUCT_NUM 0x5122 /* Ethernet/RNDIS Gadget */
+
+
+ /* Some systems will want different product identifers published in the
+@@ -464,7 +461,7 @@ eth_config = {
+ .bConfigurationValue = DEV_CONFIG_VALUE,
+ .iConfiguration = STRING_CDC,
+ .bmAttributes = USB_CONFIG_ATT_ONE | USB_CONFIG_ATT_SELFPOWER,
+- .bMaxPower = 50,
++ .bMaxPower = 250,
+ };
+
+ #ifdef CONFIG_USB_ETH_RNDIS
+@@ -478,7 +475,7 @@ rndis_config = {
+ .bConfigurationValue = DEV_RNDIS_CONFIG_VALUE,
+ .iConfiguration = STRING_RNDIS,
+ .bmAttributes = USB_CONFIG_ATT_ONE | USB_CONFIG_ATT_SELFPOWER,
+- .bMaxPower = 50,
++ .bMaxPower = 250,
+ };
+ #endif
+
+Index: linux-2.6.24.7/drivers/usb/gadget/s3c2410_udc.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/usb/gadget/s3c2410_udc.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/usb/gadget/s3c2410_udc.c 2008-12-11 22:46:49.000000000 +0100
+@@ -845,6 +845,7 @@ static void s3c2410_udc_handle_ep(struct
+ u32 ep_csr1;
+ u32 idx;
+
++handle_ep_again:
+ if (likely (!list_empty(&ep->queue)))
+ req = list_entry(ep->queue.next,
+ struct s3c2410_request, queue);
+@@ -884,6 +885,8 @@ static void s3c2410_udc_handle_ep(struct
+
+ if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) {
+ s3c2410_udc_read_fifo(ep,req);
++ if (s3c2410_udc_fifo_count_out())
++ goto handle_ep_again;
+ }
+ }
+ }
+Index: linux-2.6.24.7/drivers/usb/host/ohci-s3c2410.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/usb/host/ohci-s3c2410.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/usb/host/ohci-s3c2410.c 2008-12-11 22:46:49.000000000 +0100
+@@ -24,6 +24,7 @@
+
+ #include <asm/hardware.h>
+ #include <asm/arch/usb-control.h>
++#include <asm/arch/regs-gpio.h>
+
+ #define valid_port(idx) ((idx) == 1 || (idx) == 2)
+
+@@ -308,6 +309,42 @@ static void s3c2410_hcd_oc(struct s3c241
+ local_irq_restore(flags);
+ }
+
++/* switching of USB pads */
++static ssize_t show_usb_mode(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ if (__raw_readl(S3C24XX_MISCCR) & S3C2410_MISCCR_USBHOST)
++ return sprintf(buf, "host\n");
++
++ return sprintf(buf, "device\n");
++}
++
++static ssize_t set_usb_mode(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ if (!strncmp(buf, "host", 4)) {
++ printk("s3c2410: changing usb to host\n");
++ s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST,
++ S3C2410_MISCCR_USBHOST);
++ /* FIXME:
++ * - call machine-specific disable-pullup function i
++ * - enable +Vbus (if hardware supports it)
++ */
++ s3c2410_gpio_setpin(S3C2410_GPB9, 0);
++ } else if (!strncmp(buf, "device", 6)) {
++ printk("s3c2410: changing usb to device\n");
++ s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST, 0);
++ s3c2410_gpio_setpin(S3C2410_GPB9, 1);
++ } else {
++ printk("s3c2410: unknown mode\n");
++ return -EINVAL;
++ }
++
++ return count;
++}
++
++static DEVICE_ATTR(usb_mode, S_IRUGO | S_IWUSR, show_usb_mode, set_usb_mode);
++
+ /* may be called without controller electrically present */
+ /* may be called with controller, bus, and devices active */
+
+@@ -325,6 +362,7 @@ static void s3c2410_hcd_oc(struct s3c241
+ static void
+ usb_hcd_s3c2410_remove (struct usb_hcd *hcd, struct platform_device *dev)
+ {
++ device_remove_file(&dev->dev, &dev_attr_usb_mode);
+ usb_remove_hcd(hcd);
+ s3c2410_stop_hc(dev);
+ iounmap(hcd->regs);
+@@ -392,8 +430,15 @@ static int usb_hcd_s3c2410_probe (const
+ if (retval != 0)
+ goto err_ioremap;
+
++ retval = device_create_file(&dev->dev, &dev_attr_usb_mode);
++ if (retval != 0)
++ goto err_hcd;
++
+ return 0;
+
++ err_hcd:
++ usb_remove_hcd(hcd);
++
+ err_ioremap:
+ s3c2410_stop_hc(dev);
+ iounmap(hcd->regs);
+Index: linux-2.6.24.7/drivers/video/backlight/gta01_bl.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/video/backlight/gta01_bl.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,269 @@
++/*
++ * Backlight Driver for FIC GTA01 (Neo1973) GSM Phone
++ *
++ * Copyright (C) 2006-2007 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * based on corgi_cl.c, Copyright (c) 2004-2006 Richard Purdie
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation, version 2.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ * Javi Roman <javiroman@kernel-labs.org>:
++ * implement PWM, instead of simple on/off switching
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/mutex.h>
++#include <linux/fb.h>
++#include <linux/backlight.h>
++#include <linux/clk.h>
++
++#include <asm/arch/hardware.h>
++#include <asm/arch/gta01.h>
++#include <asm/arch/pwm.h>
++
++#include <asm/plat-s3c/regs-timer.h>
++#include <asm/plat-s3c24xx/neo1973.h>
++
++static struct backlight_properties gta01bl_prop;
++static struct backlight_device *gta01_backlight_device;
++static struct gta01bl_machinfo *bl_machinfo;
++
++static unsigned long gta01bl_flags;
++
++struct gta01bl_data {
++ int intensity;
++ struct mutex mutex;
++ struct clk *clk;
++ struct s3c2410_pwm pwm;
++};
++
++static struct gta01bl_data gta01bl;
++
++static int gta01bl_defer_resume_backlight;
++
++#define GTA01BL_SUSPENDED 0x01
++#define GTA01BL_BATTLOW 0x02
++
++/* On the GTA01 / Neo1973, we use a 50 or 66MHz PCLK, which gives
++ * us a 6.25..8.25MHz DIV8 clock, which is further divided by a
++ * prescaler of 4, resulting in a 1.56..2.06MHz tick. This results in a
++ * minimum frequency of 24..31Hz. At 400Hz, we need to set the count
++ * to something like 3906..5156, providing us a way sufficient resolution
++ * for display brightness adjustment. */
++#define GTA01BL_COUNTER 5156
++
++static int gta01bl_send_intensity(struct backlight_device *bd)
++{
++ int intensity = bd->props.brightness;
++
++ if (bd->props.power != FB_BLANK_UNBLANK)
++ intensity = 0;
++ if (bd->props.fb_blank != FB_BLANK_UNBLANK)
++ intensity = 0;
++ if (gta01bl_flags & GTA01BL_SUSPENDED)
++ intensity = 0;
++ if (gta01bl_flags & GTA01BL_BATTLOW)
++ intensity &= bl_machinfo->limit_mask;
++
++ mutex_lock(>a01bl.mutex);
++#ifdef GTA01_BACKLIGHT_ONOFF_ONLY
++ if (intensity)
++ neo1973_gpb_setpin(GTA01_GPIO_BACKLIGHT, 1);
++ else
++ neo1973_gpb_setpin(GTA01_GPIO_BACKLIGHT, 0);
++#else
++ if (intensity == bd->props.max_brightness) {
++ neo1973_gpb_setpin(GTA01_GPIO_BACKLIGHT, 1);
++ s3c2410_gpio_cfgpin(GTA01_GPIO_BACKLIGHT, S3C2410_GPIO_OUTPUT);
++ } else {
++ s3c2410_pwm_duty_cycle(intensity & 0xffff, >a01bl.pwm);
++ s3c2410_gpio_cfgpin(GTA01_GPIO_BACKLIGHT, S3C2410_GPB0_TOUT0);
++ }
++#endif
++ mutex_unlock(>a01bl.mutex);
++
++ gta01bl.intensity = intensity;
++ return 0;
++}
++
++static int gta01bl_init_hw(void)
++{
++ int rc;
++
++ rc = s3c2410_pwm_init(>a01bl.pwm);
++ if (rc)
++ return rc;
++
++ gta01bl.pwm.timerid = PWM0;
++ gta01bl.pwm.prescaler = (4 - 1);
++ gta01bl.pwm.divider = S3C2410_TCFG1_MUX0_DIV8;
++ gta01bl.pwm.counter = GTA01BL_COUNTER;
++ gta01bl.pwm.comparer = gta01bl.pwm.counter;
++
++ rc = s3c2410_pwm_enable(>a01bl.pwm);
++ if (rc)
++ return rc;
++
++ s3c2410_pwm_start(>a01bl.pwm);
++
++ gta01bl_prop.max_brightness = gta01bl.pwm.counter;
++
++ return 0;
++}
++
++#ifdef CONFIG_PM
++static int gta01bl_suspend(struct platform_device *dev, pm_message_t state)
++{
++ gta01bl_flags |= GTA01BL_SUSPENDED;
++ gta01bl_send_intensity(gta01_backlight_device);
++ neo1973_gpb_setpin(GTA01_GPIO_BACKLIGHT, 0);
++ s3c2410_gpio_cfgpin(GTA01_GPIO_BACKLIGHT, S3C2410_GPIO_OUTPUT);
++ return 0;
++}
++
++void gta01bl_deferred_resume(void)
++{
++ mutex_lock(>a01bl.mutex);
++ gta01bl_init_hw();
++ mutex_unlock(>a01bl.mutex);
++
++ gta01bl_flags &= ~GTA01BL_SUSPENDED;
++ gta01bl_send_intensity(gta01_backlight_device);
++}
++EXPORT_SYMBOL_GPL(gta01bl_deferred_resume);
++
++static int gta01bl_resume(struct platform_device *dev)
++{
++ if (!gta01bl_defer_resume_backlight)
++ gta01bl_deferred_resume();
++ return 0;
++}
++#else
++#define gta01bl_suspend NULL
++#define gta01bl_resume NULL
++#endif
++
++static int gta01bl_get_intensity(struct backlight_device *bd)
++{
++ return gta01bl.intensity;
++}
++
++static int gta01bl_set_intensity(struct backlight_device *bd)
++{
++ gta01bl_send_intensity(gta01_backlight_device);
++ return 0;
++}
++
++/*
++ * Called when the battery is low to limit the backlight intensity.
++ * If limit==0 clear any limit, otherwise limit the intensity
++ */
++void gta01bl_limit_intensity(int limit)
++{
++ if (limit)
++ gta01bl_flags |= GTA01BL_BATTLOW;
++ else
++ gta01bl_flags &= ~GTA01BL_BATTLOW;
++ gta01bl_send_intensity(gta01_backlight_device);
++}
++EXPORT_SYMBOL_GPL(gta01bl_limit_intensity);
++
++
++static struct backlight_ops gta01bl_ops = {
++ .get_brightness = gta01bl_get_intensity,
++ .update_status = gta01bl_set_intensity,
++};
++
++static int __init gta01bl_probe(struct platform_device *pdev)
++{
++ struct gta01bl_machinfo *machinfo = pdev->dev.platform_data;
++ int rc;
++
++#ifdef GTA01_BACKLIGHT_ONOFF_ONLY
++ s3c2410_gpio_cfgpin(GTA01_GPIO_BACKLIGHT, S3C2410_GPIO_OUTPUT);
++ gta01bl_prop.max_brightness = 1;
++#else
++ rc = gta01bl_init_hw();
++ if (rc < 0)
++ return rc;
++#endif
++ mutex_init(>a01bl.mutex);
++
++ if (!machinfo->limit_mask)
++ machinfo->limit_mask = -1;
++
++ gta01bl_defer_resume_backlight = machinfo->defer_resume_backlight;
++
++ gta01_backlight_device = backlight_device_register("gta01-bl",
++ &pdev->dev, NULL,
++ >a01bl_ops);
++ if (IS_ERR(gta01_backlight_device))
++ return PTR_ERR(gta01_backlight_device);
++
++ gta01bl_prop.power = FB_BLANK_UNBLANK;
++ gta01bl_prop.brightness = gta01bl_prop.max_brightness;
++ memcpy(>a01_backlight_device->props,
++ >a01bl_prop, sizeof(gta01bl_prop));
++ gta01bl_send_intensity(gta01_backlight_device);
++
++ return 0;
++}
++
++static int gta01bl_remove(struct platform_device *dev)
++{
++#ifndef GTA01_BACKLIGHT_ONOFF_ONLY
++ s3c2410_pwm_disable(>a01bl.pwm);
++#endif
++ backlight_device_unregister(gta01_backlight_device);
++ mutex_destroy(>a01bl.mutex);
++
++ s3c2410_gpio_cfgpin(GTA01_GPIO_BACKLIGHT, S3C2410_GPIO_OUTPUT);
++ neo1973_gpb_setpin(GTA01_GPIO_BACKLIGHT, 1);
++
++ return 0;
++}
++
++static struct platform_driver gta01bl_driver = {
++ .probe = gta01bl_probe,
++ .remove = gta01bl_remove,
++ .suspend = gta01bl_suspend,
++ .resume = gta01bl_resume,
++ .driver = {
++ .name = "gta01-bl",
++ },
++};
++
++static int __init gta01bl_init(void)
++{
++ return platform_driver_register(>a01bl_driver);
++}
++
++static void __exit gta01bl_exit(void)
++{
++ platform_driver_unregister(>a01bl_driver);
++}
++
++module_init(gta01bl_init);
++module_exit(gta01bl_exit);
++
++MODULE_DESCRIPTION("FIC GTA01 (Neo1973) Backlight Driver");
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.24.7/drivers/video/backlight/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/video/backlight/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/video/backlight/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -67,6 +67,14 @@ config BACKLIGHT_LOCOMO
+ If you have a Sharp Zaurus SL-5500 (Collie) or SL-5600 (Poodle) say y to
+ enable the LCD/backlight driver.
+
++config BACKLIGHT_GTA01
++ tristate "FIC Neo1973 GTA01 Backlight Driver"
++ depends on BACKLIGHT_CLASS_DEVICE && MACH_NEO1973_GTA01
++ default y
++ help
++ If you have a FIC Neo1973 GTA01, say y to enable the backlight driver.
++
++
+ config BACKLIGHT_HP680
+ tristate "HP Jornada 680 Backlight Driver"
+ depends on BACKLIGHT_CLASS_DEVICE && SH_HP6XX
+Index: linux-2.6.24.7/drivers/video/backlight/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/drivers/video/backlight/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/video/backlight/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -5,6 +5,7 @@ obj-$(CONFIG_LCD_LTV350QV) += ltv350qv.o
+
+ obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
+ obj-$(CONFIG_BACKLIGHT_CORGI) += corgi_bl.o
++obj-$(CONFIG_BACKLIGHT_GTA01) += gta01_bl.o
+ obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o
+ obj-$(CONFIG_BACKLIGHT_LOCOMO) += locomolcd.o
+ obj-$(CONFIG_BACKLIGHT_PROGEAR) += progear_bl.o
+Index: linux-2.6.24.7/drivers/video/display/jbt6k74.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/video/display/jbt6k74.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,757 @@
++/* Linux kernel driver for the tpo JBT6K74-AS LCM ASIC
++ *
++ * Copyright (C) 2006-2007 by Openmoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>,
++ * Stefan Schmidt <stefan@openmoko.org>
++ * Copyright (C) 2008 by Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++
++#include <linux/kernel.h>
++#include <linux/types.h>
++#include <linux/module.h>
++#include <linux/device.h>
++#include <linux/platform_device.h>
++#include <linux/delay.h>
++#include <linux/jbt6k74.h>
++#include <linux/fb.h>
++
++enum jbt_register {
++ JBT_REG_SLEEP_IN = 0x10,
++ JBT_REG_SLEEP_OUT = 0x11,
++
++ JBT_REG_DISPLAY_OFF = 0x28,
++ JBT_REG_DISPLAY_ON = 0x29,
++
++ JBT_REG_RGB_FORMAT = 0x3a,
++ JBT_REG_QUAD_RATE = 0x3b,
++
++ JBT_REG_POWER_ON_OFF = 0xb0,
++ JBT_REG_BOOSTER_OP = 0xb1,
++ JBT_REG_BOOSTER_MODE = 0xb2,
++ JBT_REG_BOOSTER_FREQ = 0xb3,
++ JBT_REG_OPAMP_SYSCLK = 0xb4,
++ JBT_REG_VSC_VOLTAGE = 0xb5,
++ JBT_REG_VCOM_VOLTAGE = 0xb6,
++ JBT_REG_EXT_DISPL = 0xb7,
++ JBT_REG_OUTPUT_CONTROL = 0xb8,
++ JBT_REG_DCCLK_DCEV = 0xb9,
++ JBT_REG_DISPLAY_MODE1 = 0xba,
++ JBT_REG_DISPLAY_MODE2 = 0xbb,
++ JBT_REG_DISPLAY_MODE = 0xbc,
++ JBT_REG_ASW_SLEW = 0xbd,
++ JBT_REG_DUMMY_DISPLAY = 0xbe,
++ JBT_REG_DRIVE_SYSTEM = 0xbf,
++
++ JBT_REG_SLEEP_OUT_FR_A = 0xc0,
++ JBT_REG_SLEEP_OUT_FR_B = 0xc1,
++ JBT_REG_SLEEP_OUT_FR_C = 0xc2,
++ JBT_REG_SLEEP_IN_LCCNT_D = 0xc3,
++ JBT_REG_SLEEP_IN_LCCNT_E = 0xc4,
++ JBT_REG_SLEEP_IN_LCCNT_F = 0xc5,
++ JBT_REG_SLEEP_IN_LCCNT_G = 0xc6,
++
++ JBT_REG_GAMMA1_FINE_1 = 0xc7,
++ JBT_REG_GAMMA1_FINE_2 = 0xc8,
++ JBT_REG_GAMMA1_INCLINATION = 0xc9,
++ JBT_REG_GAMMA1_BLUE_OFFSET = 0xca,
++
++ /* VGA */
++ JBT_REG_BLANK_CONTROL = 0xcf,
++ JBT_REG_BLANK_TH_TV = 0xd0,
++ JBT_REG_CKV_ON_OFF = 0xd1,
++ JBT_REG_CKV_1_2 = 0xd2,
++ JBT_REG_OEV_TIMING = 0xd3,
++ JBT_REG_ASW_TIMING_1 = 0xd4,
++ JBT_REG_ASW_TIMING_2 = 0xd5,
++
++ /* QVGA */
++ JBT_REG_BLANK_CONTROL_QVGA = 0xd6,
++ JBT_REG_BLANK_TH_TV_QVGA = 0xd7,
++ JBT_REG_CKV_ON_OFF_QVGA = 0xd8,
++ JBT_REG_CKV_1_2_QVGA = 0xd9,
++ JBT_REG_OEV_TIMING_QVGA = 0xde,
++ JBT_REG_ASW_TIMING_1_QVGA = 0xdf,
++ JBT_REG_ASW_TIMING_2_QVGA = 0xe0,
++
++
++ JBT_REG_HCLOCK_VGA = 0xec,
++ JBT_REG_HCLOCK_QVGA = 0xed,
++
++};
++
++enum jbt_state {
++ JBT_STATE_DEEP_STANDBY,
++ JBT_STATE_SLEEP,
++ JBT_STATE_NORMAL,
++ JBT_STATE_QVGA_NORMAL,
++};
++
++static const char *jbt_state_names[] = {
++ [JBT_STATE_DEEP_STANDBY] = "deep-standby",
++ [JBT_STATE_SLEEP] = "sleep",
++ [JBT_STATE_NORMAL] = "normal",
++ [JBT_STATE_QVGA_NORMAL] = "qvga-normal",
++};
++
++struct jbt_info {
++ enum jbt_state state, last_state;
++ struct spi_device *spi_dev;
++ struct mutex lock; /* protects tx_buf and reg_cache */
++ struct notifier_block fb_notif;
++ u16 tx_buf[8];
++ u16 reg_cache[0xEE];
++ int have_resumed;
++};
++
++#define JBT_COMMAND 0x000
++#define JBT_DATA 0x100
++
++
++static int jbt_reg_write_nodata(struct jbt_info *jbt, u8 reg)
++{
++ int rc;
++
++ mutex_lock(&jbt->lock);
++
++ jbt->tx_buf[0] = JBT_COMMAND | reg;
++ rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
++ 1*sizeof(u16));
++ if (rc == 0)
++ jbt->reg_cache[reg] = 0;
++ else
++ printk(KERN_ERR"jbt_reg_write_nodata spi_write ret %d\n",
++ rc);
++
++ mutex_unlock(&jbt->lock);
++
++ return rc;
++}
++
++
++static int jbt_reg_write(struct jbt_info *jbt, u8 reg, u8 data)
++{
++ int rc;
++
++ mutex_lock(&jbt->lock);
++
++ jbt->tx_buf[0] = JBT_COMMAND | reg;
++ jbt->tx_buf[1] = JBT_DATA | data;
++ rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
++ 2*sizeof(u16));
++ if (rc == 0)
++ jbt->reg_cache[reg] = data;
++ else
++ printk(KERN_ERR"jbt_reg_write spi_write ret %d\n", rc);
++
++ mutex_unlock(&jbt->lock);
++
++ return rc;
++}
++
++static int jbt_reg_write16(struct jbt_info *jbt, u8 reg, u16 data)
++{
++ int rc;
++
++ mutex_lock(&jbt->lock);
++
++ jbt->tx_buf[0] = JBT_COMMAND | reg;
++ jbt->tx_buf[1] = JBT_DATA | (data >> 8);
++ jbt->tx_buf[2] = JBT_DATA | (data & 0xff);
++
++ rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
++ 3*sizeof(u16));
++ if (rc == 0)
++ jbt->reg_cache[reg] = data;
++ else
++ printk(KERN_ERR"jbt_reg_write16 spi_write ret %d\n", rc);
++
++ mutex_unlock(&jbt->lock);
++
++ return rc;
++}
++
++static int jbt_init_regs(struct jbt_info *jbt, int qvga)
++{
++ int rc;
++
++ dev_dbg(&jbt->spi_dev->dev, "entering %cVGA mode\n", qvga ? 'Q' : ' ');
++
++ rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE1, 0x01);
++ rc |= jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE2, 0x00);
++ rc |= jbt_reg_write(jbt, JBT_REG_RGB_FORMAT, 0x60);
++ rc |= jbt_reg_write(jbt, JBT_REG_DRIVE_SYSTEM, 0x10);
++ rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_OP, 0x56);
++ rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_MODE, 0x33);
++ rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x11);
++ rc |= jbt_reg_write(jbt, JBT_REG_OPAMP_SYSCLK, 0x02);
++ rc |= jbt_reg_write(jbt, JBT_REG_VSC_VOLTAGE, 0x2b);
++ rc |= jbt_reg_write(jbt, JBT_REG_VCOM_VOLTAGE, 0x40);
++ rc |= jbt_reg_write(jbt, JBT_REG_EXT_DISPL, 0x03);
++ rc |= jbt_reg_write(jbt, JBT_REG_DCCLK_DCEV, 0x04);
++ /*
++ * default of 0x02 in JBT_REG_ASW_SLEW responsible for 72Hz requirement
++ * to avoid red / blue flicker
++ */
++ rc |= jbt_reg_write(jbt, JBT_REG_ASW_SLEW, 0x04);
++ rc |= jbt_reg_write(jbt, JBT_REG_DUMMY_DISPLAY, 0x00);
++
++ rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_A, 0x11);
++ rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_B, 0x11);
++ rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_C, 0x11);
++ rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_D, 0x2040);
++ rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_E, 0x60c0);
++ rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_F, 0x1020);
++ rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_G, 0x60c0);
++
++ rc |= jbt_reg_write16(jbt, JBT_REG_GAMMA1_FINE_1, 0x5533);
++ rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_FINE_2, 0x00);
++ rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_INCLINATION, 0x00);
++ rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00);
++
++ if (!qvga) {
++ rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_VGA, 0x1f0);
++ rc |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL, 0x02);
++ rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV, 0x0804);
++
++ rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF, 0x01);
++ rc |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2, 0x0000);
++
++ rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING, 0x0d0e);
++ rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1, 0x11a4);
++ rc |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2, 0x0e);
++ } else {
++ rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_QVGA, 0x00ff);
++ rc |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL_QVGA, 0x02);
++ rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV_QVGA, 0x0804);
++
++ rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF_QVGA, 0x01);
++ rc |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2_QVGA, 0x0008);
++
++ rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING_QVGA, 0x050a);
++ rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1_QVGA, 0x0a19);
++ rc |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2_QVGA, 0x0a);
++ }
++
++ return rc ? -EIO : 0;
++}
++
++static int standby_to_sleep(struct jbt_info *jbt)
++{
++ int rc;
++
++ /* three times command zero */
++ rc = jbt_reg_write_nodata(jbt, 0x00);
++ mdelay(1);
++ rc |= jbt_reg_write_nodata(jbt, 0x00);
++ mdelay(1);
++ rc |= jbt_reg_write_nodata(jbt, 0x00);
++ mdelay(1);
++
++ /* deep standby out */
++ rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x17);
++
++ return rc ? -EIO : 0;
++}
++
++static int sleep_to_normal(struct jbt_info *jbt)
++{
++ int rc;
++
++ /* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */
++ rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x80);
++
++ /* Quad mode off */
++ rc |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x00);
++
++ /* AVDD on, XVDD on */
++ rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x16);
++
++ /* Output control */
++ rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xfff9);
++
++ /* Sleep mode off */
++ rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
++
++ /* initialize register set */
++ rc |= jbt_init_regs(jbt, 0);
++
++ /* Turn on display */
++ rc |= jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_ON);
++
++ return rc ? -EIO : 0;
++}
++
++static int sleep_to_qvga_normal(struct jbt_info *jbt)
++{
++ int rc;
++
++ /* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */
++ rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x81);
++
++ /* Quad mode on */
++ rc |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x22);
++
++ /* AVDD on, XVDD on */
++ rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x16);
++
++ /* Output control */
++ rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xfff9);
++
++ /* Sleep mode off */
++ rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
++
++ /* initialize register set for qvga*/
++ rc |= jbt_init_regs(jbt, 1);
++
++ /* Turn on display */
++ rc |= jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_ON);
++
++ return rc ? -EIO : 0;
++}
++
++static int normal_to_sleep(struct jbt_info *jbt)
++{
++ int rc;
++
++ rc = jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_OFF);
++ rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0x8002);
++ rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_IN);
++
++ return rc ? -EIO : 0;
++}
++
++static int sleep_to_standby(struct jbt_info *jbt)
++{
++ return jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x00);
++}
++
++/* frontend function */
++int jbt6k74_enter_state(struct jbt_info *jbt, enum jbt_state new_state)
++{
++ int rc = -EINVAL;
++
++ dev_dbg(&jbt->spi_dev->dev, "entering (old_state=%u, "
++ "new_state=%u)\n", jbt->state, new_state);
++
++ switch (jbt->state) {
++ case JBT_STATE_DEEP_STANDBY:
++ switch (new_state) {
++ case JBT_STATE_DEEP_STANDBY:
++ rc = 0;
++ break;
++ case JBT_STATE_SLEEP:
++ rc = standby_to_sleep(jbt);
++ break;
++ case JBT_STATE_NORMAL:
++ /* first transition into sleep */
++ rc = standby_to_sleep(jbt);
++ /* then transition into normal */
++ rc |= sleep_to_normal(jbt);
++ break;
++ case JBT_STATE_QVGA_NORMAL:
++ /* first transition into sleep */
++ rc = standby_to_sleep(jbt);
++ /* then transition into normal */
++ rc |= sleep_to_qvga_normal(jbt);
++ break;
++ }
++ break;
++ case JBT_STATE_SLEEP:
++ switch (new_state) {
++ case JBT_STATE_SLEEP:
++ rc = 0;
++ break;
++ case JBT_STATE_DEEP_STANDBY:
++ rc = sleep_to_standby(jbt);
++ break;
++ case JBT_STATE_NORMAL:
++ rc = sleep_to_normal(jbt);
++ break;
++ case JBT_STATE_QVGA_NORMAL:
++ rc = sleep_to_qvga_normal(jbt);
++ break;
++ }
++ break;
++ case JBT_STATE_NORMAL:
++ switch (new_state) {
++ case JBT_STATE_NORMAL:
++ rc = 0;
++ break;
++ case JBT_STATE_DEEP_STANDBY:
++ /* first transition into sleep */
++ rc = normal_to_sleep(jbt);
++ /* then transition into deep standby */
++ rc |= sleep_to_standby(jbt);
++ break;
++ case JBT_STATE_SLEEP:
++ rc = normal_to_sleep(jbt);
++ break;
++ case JBT_STATE_QVGA_NORMAL:
++ /* first transition into sleep */
++ rc = normal_to_sleep(jbt);
++ /* second transition into deep standby */
++ rc |= sleep_to_standby(jbt);
++ /* third transition into sleep */
++ rc |= standby_to_sleep(jbt);
++ /* fourth transition into normal */
++ rc |= sleep_to_qvga_normal(jbt);
++ break;
++ }
++ break;
++ case JBT_STATE_QVGA_NORMAL:
++ switch (new_state) {
++ case JBT_STATE_QVGA_NORMAL:
++ rc = 0;
++ break;
++ case JBT_STATE_DEEP_STANDBY:
++ /* first transition into sleep */
++ rc = normal_to_sleep(jbt);
++ /* then transition into deep standby */
++ rc |= sleep_to_standby(jbt);
++ break;
++ case JBT_STATE_SLEEP:
++ rc = normal_to_sleep(jbt);
++ break;
++ case JBT_STATE_NORMAL:
++ /* first transition into sleep */
++ rc = normal_to_sleep(jbt);
++ /* second transition into deep standby */
++ rc |= sleep_to_standby(jbt);
++ /* third transition into sleep */
++ rc |= standby_to_sleep(jbt);
++ /* fourth transition into normal */
++ rc |= sleep_to_normal(jbt);
++ break;
++ }
++ break;
++ }
++
++ if (rc == 0)
++ jbt->state = new_state;
++
++ return rc;
++}
++EXPORT_SYMBOL_GPL(jbt6k74_enter_state);
++
++static ssize_t state_read(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct jbt_info *jbt = dev_get_drvdata(dev);
++
++ if (jbt->state >= ARRAY_SIZE(jbt_state_names))
++ return -EIO;
++
++ return sprintf(buf, "%s\n", jbt_state_names[jbt->state]);
++}
++
++static ssize_t state_write(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct jbt_info *jbt = dev_get_drvdata(dev);
++ int i, rc;
++
++ for (i = 0; i < ARRAY_SIZE(jbt_state_names); i++) {
++ if (!strncmp(buf, jbt_state_names[i],
++ strlen(jbt_state_names[i]))) {
++ rc = jbt6k74_enter_state(jbt, i);
++ if (rc)
++ return rc;
++ return count;
++ }
++ }
++
++ return -EINVAL;
++}
++
++static DEVICE_ATTR(state, 0644, state_read, state_write);
++
++static int reg_by_string(const char *name)
++{
++ if (!strcmp(name, "gamma_fine1"))
++ return JBT_REG_GAMMA1_FINE_1;
++ else if (!strcmp(name, "gamma_fine2"))
++ return JBT_REG_GAMMA1_FINE_2;
++ else if (!strcmp(name, "gamma_inclination"))
++ return JBT_REG_GAMMA1_INCLINATION;
++ else
++ return JBT_REG_GAMMA1_BLUE_OFFSET;
++}
++
++static ssize_t gamma_read(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct jbt_info *jbt = dev_get_drvdata(dev);
++ int reg = reg_by_string(attr->attr.name);
++ u16 val;
++
++ mutex_lock(&jbt->lock);
++ val = jbt->reg_cache[reg];
++ mutex_unlock(&jbt->lock);
++
++ return sprintf(buf, "0x%04x\n", val);
++}
++
++static ssize_t gamma_write(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct jbt_info *jbt = dev_get_drvdata(dev);
++ int reg = reg_by_string(attr->attr.name);
++ unsigned long val = simple_strtoul(buf, NULL, 10);
++
++ dev_info(dev, "**** jbt6k74 writing gama %lu\n", val & 0xff);
++
++ jbt_reg_write(jbt, reg, val & 0xff);
++
++ return count;
++}
++
++static DEVICE_ATTR(gamma_fine1, 0644, gamma_read, gamma_write);
++static DEVICE_ATTR(gamma_fine2, 0644, gamma_read, gamma_write);
++static DEVICE_ATTR(gamma_inclination, 0644, gamma_read, gamma_write);
++static DEVICE_ATTR(gamma_blue_offset, 0644, gamma_read, gamma_write);
++
++static struct attribute *jbt_sysfs_entries[] = {
++ &dev_attr_state.attr,
++ &dev_attr_gamma_fine1.attr,
++ &dev_attr_gamma_fine2.attr,
++ &dev_attr_gamma_inclination.attr,
++ &dev_attr_gamma_blue_offset.attr,
++ NULL,
++};
++
++static struct attribute_group jbt_attr_group = {
++ .name = NULL,
++ .attrs = jbt_sysfs_entries,
++};
++
++static int fb_notifier_callback(struct notifier_block *self,
++ unsigned long event, void *data)
++{
++ struct jbt_info *jbt;
++ struct fb_event *evdata = data;
++ int fb_blank;
++
++ if (event != FB_EVENT_BLANK && event != FB_EVENT_CONBLANK)
++ return 0;
++
++ fb_blank = *(int *)evdata->data;
++ jbt = container_of(self, struct jbt_info, fb_notif);
++
++ switch (fb_blank) {
++ case FB_BLANK_UNBLANK:
++ dev_info(&jbt->spi_dev->dev, "**** jbt6k74 unblank\n");
++ jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
++ break;
++ case FB_BLANK_NORMAL:
++ dev_info(&jbt->spi_dev->dev, "**** jbt6k74 normal\n");
++ break;
++ case FB_BLANK_VSYNC_SUSPEND:
++ dev_info(&jbt->spi_dev->dev, "**** jbt6k74 vsync suspend\n");
++ break;
++ case FB_BLANK_HSYNC_SUSPEND:
++ dev_info(&jbt->spi_dev->dev, "**** jbt6k74 hsync suspend\n");
++ /* FIXME: we disable SLEEP since it would result in
++ * a visible artefact (white screen) before the backlight
++ * is dimmed to a dark enough level */
++ /* jbt6k74_enter_state(jbt, JBT_STATE_SLEEP); */
++ break;
++ case FB_BLANK_POWERDOWN:
++ dev_info(&jbt->spi_dev->dev, "**** jbt6k74 powerdown\n");
++ /* FIXME: deep standby causes WSOD on certain devices. We use
++ * sleep as workaround */
++ jbt6k74_enter_state(jbt, JBT_STATE_SLEEP);
++ break;
++ }
++
++ return 0;
++}
++
++/* linux device model infrastructure */
++
++static int __devinit jbt_probe(struct spi_device *spi)
++{
++ int rc;
++ struct jbt_info *jbt;
++
++ /* the controller doesn't have a MISO pin; we can't do detection */
++
++ spi->mode = SPI_CPOL | SPI_CPHA;
++ spi->bits_per_word = 9;
++
++ rc = spi_setup(spi);
++ if (rc < 0) {
++ dev_err(&spi->dev,
++ "error during spi_setup of jbt6k74 driver\n");
++ return rc;
++ }
++
++ jbt = kzalloc(sizeof(*jbt), GFP_KERNEL);
++ if (!jbt)
++ return -ENOMEM;
++
++ jbt->spi_dev = spi;
++ jbt->state = JBT_STATE_DEEP_STANDBY;
++ mutex_init(&jbt->lock);
++
++ dev_set_drvdata(&spi->dev, jbt);
++
++ rc = jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
++ if (rc < 0) {
++ dev_err(&spi->dev, "cannot enter NORMAL state\n");
++ goto err_free_drvdata;
++ }
++
++ rc = sysfs_create_group(&spi->dev.kobj, &jbt_attr_group);
++ if (rc < 0) {
++ dev_err(&spi->dev, "cannot create sysfs group\n");
++ goto err_standby;
++ }
++
++ jbt->fb_notif.notifier_call = fb_notifier_callback;
++ rc = fb_register_client(&jbt->fb_notif);
++ if (rc < 0) {
++ dev_err(&spi->dev, "cannot register notifier\n");
++ goto err_sysfs;
++ }
++
++ return 0;
++
++err_sysfs:
++ sysfs_remove_group(&spi->dev.kobj, &jbt_attr_group);
++err_standby:
++ jbt6k74_enter_state(jbt, JBT_STATE_DEEP_STANDBY);
++err_free_drvdata:
++ dev_set_drvdata(&spi->dev, NULL);
++ kfree(jbt);
++
++ return rc;
++}
++
++static int __devexit jbt_remove(struct spi_device *spi)
++{
++ struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
++
++ /* We don't want to switch off the display in case the user
++ * accidentially onloads the module (whose use count normally is 0) */
++
++ fb_unregister_client(&jbt->fb_notif);
++ sysfs_remove_group(&spi->dev.kobj, &jbt_attr_group);
++ dev_set_drvdata(&spi->dev, NULL);
++ kfree(jbt);
++
++ return 0;
++}
++
++#ifdef CONFIG_PM
++static int jbt_suspend(struct spi_device *spi, pm_message_t state)
++{
++ struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
++ struct jbt6k74_platform_data *jbt6k74_pdata = spi->dev.platform_data;
++
++ dev_info(&spi->dev, "**** jbt6k74 suspend start\n");
++
++ /* platform can register resume dependencies here, if any */
++ if (jbt6k74_pdata->suspending)
++ (jbt6k74_pdata->suspending)(0, spi);
++
++ /* Save mode for resume */
++ jbt->last_state = jbt->state;
++ /* FIXME: deep standby causes WSOD on certain devices. We use
++ * sleep as workaround */
++ jbt6k74_enter_state(jbt, JBT_STATE_SLEEP);
++
++ jbt->have_resumed = 0;
++
++ dev_info(&spi->dev, "**** jbt6k74 suspend end\n");
++
++ return 0;
++}
++
++int jbt6k74_resume(struct spi_device *spi)
++{
++ struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
++ struct jbt6k74_platform_data *jbt6k74_pdata = spi->dev.platform_data;
++
++ dev_info(&spi->dev, "**** jbt6k74 resume start\n");
++ if (jbt6k74_pdata->all_dependencies_resumed)
++ if (!(jbt6k74_pdata->all_dependencies_resumed)(0))
++ return 0;
++
++ /* we can get called twice with all dependencies resumed if our core
++ * resume callback is last of all. Protect against doing anything twice
++ */
++ if (jbt->have_resumed) {
++ dev_info(&spi->dev, "**** jbt6k74 already resumed\n");
++ return 0;
++ }
++
++ jbt->have_resumed |= 1;
++
++ switch (jbt->last_state) {
++ case JBT_STATE_QVGA_NORMAL:
++ jbt6k74_enter_state(jbt, JBT_STATE_QVGA_NORMAL);
++ break;
++ default:
++ jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
++ break;
++ }
++
++ if (jbt6k74_pdata->resuming)
++ (jbt6k74_pdata->resuming)(0);
++
++ dev_info(&spi->dev, "**** jbt6k74 resume end\n");
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(jbt6k74_resume);
++
++#else
++#define jbt_suspend NULL
++#define jbt_resume NULL
++#endif
++
++static struct spi_driver jbt6k74_driver = {
++ .driver = {
++ .name = "jbt6k74",
++ .owner = THIS_MODULE,
++ },
++
++ .probe = jbt_probe,
++ .remove = __devexit_p(jbt_remove),
++ .suspend = jbt_suspend,
++ .resume = jbt6k74_resume,
++};
++
++static int __init jbt_init(void)
++{
++ return spi_register_driver(&jbt6k74_driver);
++}
++
++static void __exit jbt_exit(void)
++{
++ spi_unregister_driver(&jbt6k74_driver);
++}
++
++MODULE_DESCRIPTION("SPI driver for tpo JBT6K74-AS LCM control interface");
++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
++MODULE_LICENSE("GPL");
++
++module_init(jbt_init);
++module_exit(jbt_exit);
+Index: linux-2.6.24.7/drivers/video/display/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/video/display/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/video/display/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -21,4 +21,15 @@ config DISPLAY_SUPPORT
+ comment "Display hardware drivers"
+ depends on DISPLAY_SUPPORT
+
++config DISPLAY_JBT6K74
++ tristate "TPO JBT6K74-AS TFT display ASIC control interface"
++ depends on SPI_MASTER && SYSFS
++ help
++ SPI driver for the control interface of TFT panels containing
++ the TPO JBT6K74-AS controller ASIC, such as the TPO TD028TTEC1
++ TFT diplay module used in the FIC/Openmoko Neo1973 GSM phones.
++
++ The control interface is required for display operation, as it
++ controls power management, display timing and gamma calibration.
++
+ endmenu
+Index: linux-2.6.24.7/drivers/video/display/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/drivers/video/display/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/video/display/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -3,4 +3,5 @@
+ display-objs := display-sysfs.o
+
+ obj-$(CONFIG_DISPLAY_SUPPORT) += display.o
++obj-$(CONFIG_DISPLAY_JBT6K74) += jbt6k74.o
+
+Index: linux-2.6.24.7/drivers/video/logo/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/drivers/video/logo/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/video/logo/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -67,6 +67,11 @@ config LOGO_SUPERH_CLUT224
+ depends on SUPERH
+ default y
+
++config LOGO_OPENMOKO_CLUT224
++ bool "224-color Openmoko Linux logo"
++ depends on MACH_NEO1973_GTA01 || MACH_NEO1973_GTA02
++ default y
++
+ config LOGO_M32R_CLUT224
+ bool "224-color M32R Linux logo"
+ depends on M32R
+Index: linux-2.6.24.7/drivers/video/logo/logo.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/video/logo/logo.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/video/logo/logo.c 2008-12-11 22:46:49.000000000 +0100
+@@ -33,6 +33,7 @@ extern const struct linux_logo logo_supe
+ extern const struct linux_logo logo_superh_vga16;
+ extern const struct linux_logo logo_superh_clut224;
+ extern const struct linux_logo logo_m32r_clut224;
++extern const struct linux_logo logo_openmoko_clut224;
+
+ static int nologo;
+ module_param(nologo, bool, 0);
+@@ -105,6 +106,10 @@ const struct linux_logo * __init_refok f
+ /* M32R Linux logo */
+ logo = &logo_m32r_clut224;
+ #endif
++#ifdef CONFIG_LOGO_OPENMOKO_CLUT224
++ /* Openmoko Linux logo */
++ logo = &logo_openmoko_clut224;
++#endif
+ }
+ return logo;
+ }
+Index: linux-2.6.24.7/drivers/video/logo/logo_openmoko_clut224.ppm
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/drivers/video/logo/logo_openmoko_clut224.ppm 2008-12-11 22:46:49.000000000 +0100
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++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+Index: linux-2.6.24.7/drivers/video/logo/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/drivers/video/logo/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/video/logo/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -13,6 +13,7 @@ obj-$(CONFIG_LOGO_SUPERH_MONO) += logo_
+ obj-$(CONFIG_LOGO_SUPERH_VGA16) += logo_superh_vga16.o
+ obj-$(CONFIG_LOGO_SUPERH_CLUT224) += logo_superh_clut224.o
+ obj-$(CONFIG_LOGO_M32R_CLUT224) += logo_m32r_clut224.o
++obj-$(CONFIG_LOGO_OPENMOKO_CLUT224) += logo_openmoko_clut224.o
+
+ obj-$(CONFIG_SPU_BASE) += logo_spe_clut224.o
+
+Index: linux-2.6.24.7/drivers/video/s3c2410fb.c
+===================================================================
+--- linux-2.6.24.7.orig/drivers/video/s3c2410fb.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/drivers/video/s3c2410fb.c 2008-12-11 22:46:49.000000000 +0100
+@@ -1028,6 +1028,8 @@ static int s3c2410fb_resume(struct platf
+
+ s3c2410fb_init_registers(fbinfo);
+
++ s3c2410fb_set_par(fbinfo);
++
+ return 0;
+ }
+
+Index: linux-2.6.24.7/fs/jffs2/background.c
+===================================================================
+--- linux-2.6.24.7.orig/fs/jffs2/background.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/fs/jffs2/background.c 2008-12-11 22:46:49.000000000 +0100
+@@ -95,13 +95,17 @@ static int jffs2_garbage_collect_thread(
+ schedule();
+ }
+
+- /* This thread is purely an optimisation. But if it runs when
+- other things could be running, it actually makes things a
+- lot worse. Use yield() and put it at the back of the runqueue
+- every time. Especially during boot, pulling an inode in
+- with read_inode() is much preferable to having the GC thread
+- get there first. */
+- yield();
++ /* Problem - immediately after bootup, the GCD spends a lot
++ * of time in places like jffs2_kill_fragtree(); so much so
++ * that userspace processes (like gdm and X) are starved
++ * despite plenty of cond_resched()s and renicing. Yield()
++ * doesn't help, either (presumably because userspace and GCD
++ * are generally competing for a higher latency resource -
++ * disk).
++ * This forces the GCD to slow the hell down. Pulling an
++ * inode in with read_inode() is much preferable to having
++ * the GC thread get there first. */
++ schedule_timeout_interruptible(msecs_to_jiffies(50));
+
+ /* Put_super will send a SIGKILL and then wait on the sem.
+ */
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,58 @@
++#ifndef _LINUX_FIQ_IPC_H
++#define _LINUX_FIQ_IPC_H
++
++/*
++ * this defines the struct which is used to communicate between the FIQ
++ * world and the normal linux kernel world. One of these structs is
++ * statically defined for you in the monolithic kernel so the FIQ ISR code
++ * can safely touch it any any time.
++ *
++ * You also want to include this file in your kernel module that wants to
++ * communicate with your FIQ code. Add any kinds of vars that are used by
++ * the FIQ ISR and the module in here.
++ *
++ * To get you started there is just an int that is incremented every FIQ
++ * you can remove this when you are ready to customize, but it is useful
++ * for testing
++ */
++
++#include <asm/arch/pwm.h>
++#include <asm/plat-s3c/regs-timer.h>
++
++enum hdq_bitbang_states {
++ HDQB_IDLE = 0,
++ HDQB_TX_BREAK,
++ HDQB_TX_BREAK_RECOVERY,
++ HDQB_ADS_CALC,
++ HDQB_ADS_LOW,
++ HDQB_ADS_HIGH,
++ HDQB_WAIT_RX,
++ HDQB_DATA_RX_LOW,
++ HDQB_DATA_RX_HIGH,
++ HDQB_WAIT_TX,
++};
++
++struct fiq_ipc {
++ /* vibrator */
++ unsigned long vib_gpio_pin; /* which pin to meddle with */
++ u8 vib_pwm; /* 0 = OFF -- will ensure GPIO deasserted and stop FIQ */
++ u8 vib_pwm_latched;
++
++ /* hdq */
++ u8 hdq_probed; /* nonzero after HDQ driver probed */
++ struct mutex hdq_lock; /* if you want to use hdq, you have to take lock */
++ unsigned long hdq_gpio_pin; /* GTA02 = GPD14 which pin to meddle with */
++ u8 hdq_ads; /* b7..b6 = register address, b0 = r/w */
++ u8 hdq_tx_data; /* data to tx for write action */
++ u8 hdq_rx_data; /* data received in read action */
++ u8 hdq_request_ctr; /* incremented by "user" to request a transfer */
++ u8 hdq_transaction_ctr; /* incremented after each transfer */
++ u8 hdq_error; /* 0 = no error */
++};
++
++/* actual definition lives in arch/arm/mach-s3c2440/fiq_c_isr.c */
++extern struct fiq_ipc fiq_ipc;
++extern unsigned long _fiq_count_fiqs;
++extern void fiq_kick(void); /* provoke a FIQ "immediately" */
++
++#endif /* _LINUX_FIQ_IPC_H */
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/glofiish.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/glofiish.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,39 @@
++#ifndef _GLOFIISH_H
++#define _GLOFIISH_H
++
++#include <asm/arch/regs-gpio.h>
++
++#define M800_GPIO_USB_PULLUP S3C2410_GPA21
++
++#define M800_GPIO_BACKLIGHT S3C2410_GPB0
++#define M800_GPIO_KBDLIGHT S3C2410_GPB1
++#define M800_GPIO_GPS_POWER S3C2410_GPB6
++
++#define M800_GPIO_BT_POWER_1 S3C2410_GPC8
++#define M800_GPIO_BT_POWER_2 S3C2410_GPC9
++
++#define M800_GPIO_nKEY_POWER S3C2410_GPF0
++#define M800_GPIO_CPLD S3C2410_GPF2
++#define M800_GPIO_USB_ATTACH S3C2410_GPF3
++#define M800_GPIO_WIFI_1 S3C2410_GPF5
++#define M800_GPIO_WIFI_2 S3C2410_GPF7
++
++#define M800_GPIO_FMRADIO S3C2410_GPG0
++#define M800_GPIO_nKEY_CAMERA S3C2410_GPG2
++#define M800_GPIO_nKEY_RECORD S3C2410_GPG4
++#define M800_GPIO_SLIDE S3C2410_GPG6
++#define M800_GPIO_nSD_DETECT S3C2410_GPG7
++
++#define M800_IRQ_nKEY_POWER IRQ_EINT0
++#define M800_IRQ_CPLD_KEY IRQ_EINT2
++#define M800_IRQ_USB_ATTACH IRQ_EINT3
++#define M800_IRQ_WIFI_1 IRQ_EINT5
++#define M800_IRQ_WIFI_2 IRQ_EINT7
++#define M800_IRQ_FMRADIO IRQ_EINT8
++#define M800_IRQ_nKEY_CAMERA IRQ_EINT10
++#define M800_IRQ_nKEY_RECORD IRQ_EINT12
++#define M800_IRQ_CAPSENSE IRQ_EINT13
++#define M800_IRQ_KBD_SLIDE IRQ_EINT14
++#define M800_IRQ_nSD_DETECT IRQ_EINT15
++
++#endif
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/gpio.h
+===================================================================
+--- linux-2.6.24.7.orig/include/asm-arm/arch-s3c2410/gpio.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/gpio.h 2008-12-11 22:46:49.000000000 +0100
+@@ -61,6 +61,7 @@ static inline int gpio_direction_output(
+ #define gpio_to_irq(gpio) s3c2400_gpio_getirq(gpio)
+ #else
+ #define gpio_to_irq(gpio) s3c2410_gpio_getirq(gpio)
++#define irq_to_gpio(irq) s3c2410_irq_to_gpio(irq)
+ #endif
+
+ /* FIXME implement irq_to_gpio() */
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/gta01.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/gta01.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,74 @@
++#ifndef _GTA01_H
++#define _GTA01_H
++
++#include <asm/arch/regs-gpio.h>
++#include <asm/arch/irqs.h>
++
++/* Different hardware revisions, passed in ATAG_REVISION by u-boot */
++#define GTA01v3_SYSTEM_REV 0x00000130
++#define GTA01v4_SYSTEM_REV 0x00000140
++#define GTA01Bv2_SYSTEM_REV 0x00000220
++#define GTA01Bv3_SYSTEM_REV 0x00000230
++#define GTA01Bv4_SYSTEM_REV 0x00000240
++
++/* Backlight */
++
++extern void gta01bl_deferred_resume(void);
++
++struct gta01bl_machinfo {
++ unsigned int default_intensity;
++ unsigned int max_intensity;
++ unsigned int limit_mask;
++ unsigned int defer_resume_backlight;
++};
++
++/* Definitions common to all revisions */
++#define GTA01_GPIO_BACKLIGHT S3C2410_GPB0
++#define GTA01_GPIO_GPS_PWRON S3C2410_GPB1
++#define GTA01_GPIO_MODEM_RST S3C2410_GPB6
++#define GTA01_GPIO_MODEM_ON S3C2410_GPB7
++#define GTA01_GPIO_LCD_RESET S3C2410_GPC6
++#define GTA01_GPIO_PMU_IRQ S3C2410_GPG8
++#define GTA01_GPIO_JACK_INSERT S3C2410_GPF4
++#define GTA01_GPIO_nSD_DETECT S3C2410_GPF5
++#define GTA01_GPIO_AUX_KEY S3C2410_GPF6
++#define GTA01_GPIO_HOLD_KEY S3C2410_GPF7
++#define GTA01_GPIO_VIBRATOR_ON S3C2410_GPG11
++
++#define GTA01_IRQ_MODEM IRQ_EINT1
++#define GTA01_IRQ_JACK_INSERT IRQ_EINT4
++#define GTA01_IRQ_nSD_DETECT IRQ_EINT5
++#define GTA01_IRQ_AUX_KEY IRQ_EINT6
++#define GTA01_IRQ_PCF50606 IRQ_EINT16
++
++/* GTA01v3 */
++#define GTA01v3_GPIO_nGSM_EN S3C2410_GPG9
++
++/* GTA01v4 */
++#define GTA01_GPIO_MODEM_DNLOAD S3C2410_GPG0
++
++/* GTA01Bv2 */
++#define GTA01Bv2_GPIO_nGSM_EN S3C2410_GPF2
++#define GTA01Bv2_GPIO_VIBRATOR_ON S3C2410_GPB10
++
++/* GTA01Bv3 */
++#define GTA01_GPIO_GPS_EN_3V3 S3C2410_GPG9
++
++#define GTA01_GPIO_SDMMC_ON S3C2410_GPB2
++#define GTA01_GPIO_BT_EN S3C2410_GPB5
++#define GTA01_GPIO_AB_DETECT S3C2410_GPB8
++#define GTA01_GPIO_USB_PULLUP S3C2410_GPB9
++#define GTA01_GPIO_USB_ATTACH S3C2410_GPB10
++
++#define GTA01_GPIO_GPS_EN_2V8 S3C2410_GPG9
++#define GTA01_GPIO_GPS_EN_3V S3C2410_GPG10
++#define GTA01_GPIO_GPS_RESET S3C2410_GPC0
++
++/* GTA01Bv4 */
++#define GTA01Bv4_GPIO_nNAND_WP S3C2410_GPA16
++#define GTA01Bv4_GPIO_VIBRATOR_ON S3C2410_GPB3
++#define GTA01Bv4_GPIO_PMU_IRQ S3C2410_GPG1
++
++#define GTA01Bv4_IRQ_PCF50606 IRQ_EINT9
++
++#endif /* _GTA01_H */
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/gta02.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/gta02.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,109 @@
++#ifndef _GTA02_H
++#define _GTA02_H
++
++#include <asm/arch/regs-gpio.h>
++#include <asm/arch/irqs.h>
++
++/* Different hardware revisions, passed in ATAG_REVISION by u-boot */
++#define GTA02v1_SYSTEM_REV 0x00000310
++#define GTA02v2_SYSTEM_REV 0x00000320
++#define GTA02v3_SYSTEM_REV 0x00000330
++#define GTA02v4_SYSTEM_REV 0x00000340
++#define GTA02v5_SYSTEM_REV 0x00000350
++#define GTA02v6_SYSTEM_REV 0x00000360
++
++#define GTA02_GPIO_n3DL_GSM S3C2410_GPA13 /* v1 + v2 + v3 only */
++
++#define GTA02_GPIO_PWR_LED1 S3C2410_GPB0
++#define GTA02_GPIO_PWR_LED2 S3C2410_GPB1
++#define GTA02_GPIO_AUX_LED S3C2410_GPB2
++#define GTA02_GPIO_VIBRATOR_ON S3C2410_GPB3
++#define GTA02v1_GPIO_GPS_PWRON S3C2410_GPB4 /* v1 only */
++#define GTA02_GPIO_MODEM_RST S3C2410_GPB5
++#define GTA02_GPIO_BT_EN S3C2410_GPB6
++#define GTA02_GPIO_MODEM_ON S3C2410_GPB7
++#define GTA02v1_GPIO_EN_AGPS3V S3C2410_GPB8 /* v1 only */
++#define GTA02_GPIO_EXTINT8 S3C2410_GPB8
++#define GTA02_GPIO_USB_PULLUP S3C2410_GPB9
++
++#define GTA02v1_GPIO_nGPS_RST S3C2410_GPC0 /* v1 only */
++#define GTA02v12_GPIO_PIO3 S3C2410_GPC5 /* v1 + v2 only */
++#define GTA02_GPIO_PIO5 S3C2410_GPC5 /* v3 + v4 only */
++#define GTA02_GPIO_LCD_RESET S3C2410_GPC6 /* v1 + v2 only */
++#define GTA02v12_GPIO_PIO2 S3C2410_GPC7 /* v1 + v2 only */
++#define GTA02v2_nUSB_FLT S3C2410_GPC9 /* v2 only */
++#define GTA02v2_nUSB_OC S3C2410_GPC10 /* v2 only */
++#define GTA02v2_nGSM_OC S3C2410_GPC12 /* v2 only */
++
++#define GTA02v3_GPIO_nG1_CS S3C2410_GPD12 /* v3 + v4 only */
++#define GTA02v3_GPIO_nG2_CS S3C2410_GPD13 /* v3 + v4 only */
++#define GTA02v5_GPIO_HDQ S3C2410_GPD14 /* v5 + */
++
++#define GTA02_GPIO_nG1_INT S3C2410_GPF0
++#define GTA02_GPIO_IO1 S3C2410_GPF1
++#define GTA02v1_GPIO_nG2_INT S3C2410_GPF2 /* v1 only */
++#define GTA02_GPIO_PIO_2 S3C2410_GPF2 /* v2 + v3 + v4 only */
++#define GTA02_GPIO_JACK_INSERT S3C2410_GPF4
++#define GTA02v1_GPIO_nSD_DETECT S3C2410_GPF5 /* v1 only */
++#define GTA02_GPIO_WLAN_GPIO1 S3C2410_GPF5 /* v2 + v3 + v4 only */
++#define GTA02_GPIO_AUX_KEY S3C2410_GPF6
++#define GTA02_GPIO_HOLD_KEY S3C2410_GPF7
++
++#define GTA02_GPIO_3D_IRQ S3C2410_GPG4
++#define GTA02v1_GPIO_nG1_CS S3C2410_GPG8 /* v1 only */
++#define GTA02v2_GPIO_nG2_INT S3C2410_GPG8 /* v2 + v3 + v4 only */
++#define GTA02v3_GPIO_nUSB_OC S3C2410_GPG9 /* v3 + v4 only */
++#define GTA02v3_GPIO_nUSB_FLT S3C2410_GPG10 /* v3 + v4 only */
++#define GTA02v1_GPIO_nG2_CS S3C2410_GPG11 /* v1 only */
++#define GTA02v3_GPIO_nGSM_OC S3C2410_GPG11 /* v3 + v4 only */
++
++#define GTA02v1_GPIO_3D_RESET S3C2440_GPJ0 /* v1 only */
++#define GTA02v2_GPIO_BAT_ID S3C2440_GPJ0 /* v2 only */
++#define GTA02v1_GPIO_WLAN_GPIO8 S3C2440_GPJ1 /* v1 only */
++#define GTA02_GPIO_AMP_SHUT S3C2440_GPJ1 /* v2 + v3 + v4 only */
++#define GTA02v1_GPIO_WLAN_GPIO10 S3C2440_GPJ2
++#define GTA02_GPIO_HP_IN S3C2440_GPJ2 /* v2 + v3 + v4 only */
++#define GTA02v1_GPIO_KEEPACT S3C2440_GPJ3 /* v1 only */
++#define GTA02_GPIO_INT0 S3C2440_GPJ3 /* v2 + v3 + v4 only */
++#define GTA02_GPIO_nGSM_EN S3C2440_GPJ4
++#define GTA02_GPIO_3D_RESET S3C2440_GPJ5
++#define GTA02_GPIO_nDL_GSM S3C2440_GPJ6 /* v4 + v5 only */
++#define GTA02_GPIO_WLAN_GPIO0 S3C2440_GPJ7
++#define GTA02v1_GPIO_BAT_ID S3C2440_GPJ8
++#define GTA02_GPIO_KEEPACT S3C2440_GPJ8
++#define GTA02v1_GPIO_AMP_SHUT S3C2440_GPJ9 /* v1 only */
++#define GTA02v2_nG1_CS S3C2440_GPJ9 /* v2 only */
++#define GTA02v1_GPIO_HP_IN S3C2440_GPJ10
++#define GTA02v2_nG2_CS S3C2440_GPJ10 /* v2 only */
++#define GTA02v1_GPIO_INT0 S3C2440_GPJ11 /* v1 only */
++#define GTA02_CHIP_PWD S3C2440_GPJ11 /* v2 + v3 + v4 only */
++#define GTA02v1_GPIO_nGSM_EN S3C2440_GPJ12 /* v1 only */
++#define GTA02_GPIO_nWLAN_RESET S3C2440_GPJ12 /* v2 + v3 + v4 only */
++
++#define GTA02_IRQ_GSENSOR_1 IRQ_EINT0
++#define GTA02_IRQ_MODEM IRQ_EINT1
++#define GTA02v1_IRQ_GSENSOR_2 IRQ_EINT2 /* v1 only */
++#define GTA02_IRQ_PIO_2 IRQ_EINT2 /* v2 + v3 + v4 only */
++#define GTA02_IRQ_nJACK_INSERT IRQ_EINT4
++#define GTA02v1_IRQ_nSD_CD IRQ_EINT5 /* v1 only */
++#define GTA02_IRQ_WLAN_GPIO1 IRQ_EINT5
++#define GTA02_IRQ_AUX IRQ_EINT6
++#define GTA02_IRQ_nHOLD IRQ_EINT7
++#define GTA02v1_IRQ_nSIM_CD IRQ_EINT8 /* v1 only */
++#define GTA02_IRQ_PCF50633 IRQ_EINT9
++#define GTA02_IRQ_3D IRQ_EINT12
++#define GTA02_IRQ_GSENSOR_2 IRQ_EINT16 /* v2 + v3 + v4 only */
++#define GTA02v3_IRQ_nUSB_OC IRQ_EINT17 /* v3 + v4 only */
++#define GTA02v3_IRQ_nUSB_FLT IRQ_EINT18 /* v3 + v4 only */
++#define GTA02v3_IRQ_nGSM_OC IRQ_EINT19 /* v3 + v4 only */
++
++/* returns 00 000 on GTA02 A5 and earlier, A6 returns 01 001 */
++#define GTA02_PCB_ID1_0 S3C2410_GPC13
++#define GTA02_PCB_ID1_1 S3C2410_GPC15
++#define GTA02_PCB_ID1_2 S3C2410_GPD0
++#define GTA02_PCB_ID2_0 S3C2410_GPD3
++#define GTA02_PCB_ID2_1 S3C2410_GPD4
++
++int gta02_get_pcb_revision(void);
++
++#endif /* _GTA02_H */
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/hardware.h
+===================================================================
+--- linux-2.6.24.7.orig/include/asm-arm/arch-s3c2410/hardware.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/hardware.h 2008-12-11 22:46:49.000000000 +0100
+@@ -50,6 +50,8 @@ extern unsigned int s3c2410_gpio_getcfg(
+
+ extern int s3c2410_gpio_getirq(unsigned int pin);
+
++extern int s3c2410_irq_to_gpio(unsigned int irq);
++
+ #ifdef CONFIG_CPU_S3C2400
+
+ extern int s3c2400_gpio_getirq(unsigned int pin);
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/irqs.h
+===================================================================
+--- linux-2.6.24.7.orig/include/asm-arm/arch-s3c2410/irqs.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/irqs.h 2008-12-11 22:46:49.000000000 +0100
+@@ -155,9 +155,41 @@
+ #define IRQ_S3C2443_AC97 S3C2410_IRQSUB(28)
+
+ #ifdef CONFIG_CPU_S3C2443
+-#define NR_IRQS (IRQ_S3C2443_AC97+1)
++#define _NR_IRQS (IRQ_S3C2443_AC97+1)
+ #else
+-#define NR_IRQS (IRQ_S3C2440_AC97+1)
++#define _NR_IRQS (IRQ_S3C2440_AC97+1)
+ #endif
+
++/*
++ * The next 16 interrupts are for board specific purposes. Since
++ * the kernel can only run on one machine at a time, we can re-use
++ * these. If you need more, increase IRQ_BOARD_END, but keep it
++ * within sensible limits.
++ */
++#define IRQ_BOARD_START _NR_IRQS
++#define IRQ_BOARD_END (_NR_IRQS + 10)
++
++#if defined(CONFIG_MACH_NEO1973_GTA02)
++#define NR_IRQS (IRQ_BOARD_END)
++#else
++#define NR_IRQS (IRQ_BOARD_START)
++#endif
++
++/* Neo1973 GTA02 interrupts */
++#define NEO1973_GTA02_IRQ(x) (IRQ_BOARD_START + (x))
++#define IRQ_GLAMO(x) NEO1973_GTA02_IRQ(x)
++#define IRQ_GLAMO_HOSTBUS IRQ_GLAMO(0)
++#define IRQ_GLAMO_JPEG IRQ_GLAMO(1)
++#define IRQ_GLAMO_MPEG IRQ_GLAMO(2)
++#define IRQ_GLAMO_MPROC1 IRQ_GLAMO(3)
++#define IRQ_GLAMO_MPROC0 IRQ_GLAMO(4)
++#define IRQ_GLAMO_CMDQUEUE IRQ_GLAMO(5)
++#define IRQ_GLAMO_2D IRQ_GLAMO(6)
++#define IRQ_GLAMO_MMC IRQ_GLAMO(7)
++#define IRQ_GLAMO_RISC IRQ_GLAMO(8)
++
++/* offset for FIQ IRQ numbers - used by arm fiq.c */
++
++#define FIQ_START 0
++
+ #endif /* __ASM_ARCH_IRQ_H */
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/mci.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/mci.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,14 @@
++#ifndef _ARCH_MCI_H
++#define _ARCH_MCI_H
++
++struct s3c24xx_mci_pdata {
++ unsigned int gpio_detect;
++ unsigned int gpio_wprotect;
++ unsigned long ocr_avail;
++ unsigned int do_dma;
++ void (*set_power)(unsigned char power_mode,
++ unsigned short vdd);
++ int (*use_slow)(void);
++};
++
++#endif /* _ARCH_NCI_H */
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/neo1973-pm-gsm.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/neo1973-pm-gsm.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1 @@
++extern int gta_gsm_interrupts;
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/pwm.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/pwm.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,40 @@
++#ifndef __S3C2410_PWM_H
++#define __S3C2410_PWM_H
++
++#include <linux/err.h>
++#include <linux/platform_device.h>
++#include <linux/clk.h>
++
++#include <asm-arm/io.h>
++#include <asm/arch/hardware.h>
++#include <asm/mach-types.h>
++#include <asm/plat-s3c/regs-timer.h>
++#include <asm/arch/gta01.h>
++
++enum pwm_timer {
++ PWM0,
++ PWM1,
++ PWM2,
++ PWM3,
++ PWM4
++};
++
++struct s3c2410_pwm {
++ enum pwm_timer timerid;
++ struct clk *pclk;
++ unsigned long pclk_rate;
++ unsigned long prescaler;
++ unsigned long divider;
++ unsigned long counter;
++ unsigned long comparer;
++};
++
++int s3c2410_pwm_init(struct s3c2410_pwm *s3c2410_pwm);
++int s3c2410_pwm_enable(struct s3c2410_pwm *s3c2410_pwm);
++int s3c2410_pwm_disable(struct s3c2410_pwm *s3c2410_pwm);
++int s3c2410_pwm_start(struct s3c2410_pwm *s3c2410_pwm);
++int s3c2410_pwm_stop(struct s3c2410_pwm *s3c2410_pwm);
++int s3c2410_pwm_duty_cycle(int reg_value, struct s3c2410_pwm *s3c2410_pwm);
++int s3c2410_pwm_dumpregs(void);
++
++#endif /* __S3C2410_PWM_H */
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/regs-dsc.h
+===================================================================
+--- linux-2.6.24.7.orig/include/asm-arm/arch-s3c2410/regs-dsc.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/regs-dsc.h 2008-12-11 22:46:49.000000000 +0100
+@@ -19,7 +19,7 @@
+ #define S3C2412_DSC1 S3C2410_GPIOREG(0xe0)
+ #endif
+
+-#if defined(CONFIG_CPU_S3C2440)
++#if defined(CONFIG_CPU_S3C244X)
+
+ #define S3C2440_DSC0 S3C2410_GPIOREG(0xc4)
+ #define S3C2440_DSC1 S3C2410_GPIOREG(0xc8)
+@@ -178,7 +178,7 @@
+ #define S3C2440_DSC1_CS0_4mA (3<<0)
+ #define S3C2440_DSC1_CS0_MASK (3<<0)
+
+-#endif /* CONFIG_CPU_S3C2440 */
++#endif /* CONFIG_CPU_S3C244X */
+
+ #endif /* __ASM_ARCH_REGS_DSC_H */
+
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/regs-sdi.h
+===================================================================
+--- linux-2.6.24.7.orig/include/asm-arm/arch-s3c2410/regs-sdi.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/regs-sdi.h 2008-12-11 22:46:49.000000000 +0100
+@@ -28,9 +28,17 @@
+ #define S3C2410_SDIDCNT (0x30)
+ #define S3C2410_SDIDSTA (0x34)
+ #define S3C2410_SDIFSTA (0x38)
++
+ #define S3C2410_SDIDATA (0x3C)
++#define S3C2410_SDIDATA_BYTE (0x3C)
+ #define S3C2410_SDIIMSK (0x40)
+
++#define S3C2440_SDIDATA (0x40)
++#define S3C2440_SDIDATA_BYTE (0x48)
++#define S3C2440_SDIIMSK (0x3C)
++
++#define S3C2440_SDICON_SDRESET (1<<8)
++#define S3C2440_SDICON_MMCCLOCK (1<<5)
+ #define S3C2410_SDICON_BYTEORDER (1<<4)
+ #define S3C2410_SDICON_SDIOIRQ (1<<3)
+ #define S3C2410_SDICON_RWAITEN (1<<2)
+@@ -42,7 +50,8 @@
+ #define S3C2410_SDICMDCON_LONGRSP (1<<10)
+ #define S3C2410_SDICMDCON_WAITRSP (1<<9)
+ #define S3C2410_SDICMDCON_CMDSTART (1<<8)
+-#define S3C2410_SDICMDCON_INDEX (0xff)
++#define S3C2410_SDICMDCON_SENDERHOST (1<<6)
++#define S3C2410_SDICMDCON_INDEX (0x3f)
+
+ #define S3C2410_SDICMDSTAT_CRCFAIL (1<<12)
+ #define S3C2410_SDICMDSTAT_CMDSENT (1<<11)
+@@ -51,6 +60,9 @@
+ #define S3C2410_SDICMDSTAT_XFERING (1<<8)
+ #define S3C2410_SDICMDSTAT_INDEX (0xff)
+
++#define S3C2440_SDIDCON_DS_BYTE (0<<22)
++#define S3C2440_SDIDCON_DS_HALFWORD (1<<22)
++#define S3C2440_SDIDCON_DS_WORD (2<<22)
+ #define S3C2410_SDIDCON_IRQPERIOD (1<<21)
+ #define S3C2410_SDIDCON_TXAFTERRESP (1<<20)
+ #define S3C2410_SDIDCON_RXAFTERCMD (1<<19)
+@@ -59,6 +71,7 @@
+ #define S3C2410_SDIDCON_WIDEBUS (1<<16)
+ #define S3C2410_SDIDCON_DMAEN (1<<15)
+ #define S3C2410_SDIDCON_STOP (1<<14)
++#define S3C2440_SDIDCON_DATSTART (1<<14)
+ #define S3C2410_SDIDCON_DATMODE (3<<12)
+ #define S3C2410_SDIDCON_BLKNUM (0x7ff)
+
+@@ -68,6 +81,7 @@
+ #define S3C2410_SDIDCON_XFER_RXSTART (2<<12)
+ #define S3C2410_SDIDCON_XFER_TXSTART (3<<12)
+
++#define S3C2410_SDIDCON_BLKNUM_MASK (0xFFF)
+ #define S3C2410_SDIDCNT_BLKNUM_SHIFT (12)
+
+ #define S3C2410_SDIDSTA_RDYWAITREQ (1<<10)
+@@ -82,10 +96,12 @@
+ #define S3C2410_SDIDSTA_TXDATAON (1<<1)
+ #define S3C2410_SDIDSTA_RXDATAON (1<<0)
+
++#define S3C2440_SDIFSTA_FIFORESET (1<<16)
++#define S3C2440_SDIFSTA_FIFOFAIL (3<<14) /* 3 is correct (2 bits) */
+ #define S3C2410_SDIFSTA_TFDET (1<<13)
+ #define S3C2410_SDIFSTA_RFDET (1<<12)
+-#define S3C2410_SDIFSTA_TXHALF (1<<11)
+-#define S3C2410_SDIFSTA_TXEMPTY (1<<10)
++#define S3C2410_SDIFSTA_TFHALF (1<<11)
++#define S3C2410_SDIFSTA_TFEMPTY (1<<10)
+ #define S3C2410_SDIFSTA_RFLAST (1<<9)
+ #define S3C2410_SDIFSTA_RFFULL (1<<8)
+ #define S3C2410_SDIFSTA_RFHALF (1<<7)
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/s3c24xx-serial.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/s3c24xx-serial.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,5 @@
++#include <linux/resume-dependency.h>
++
++extern void s3c24xx_serial_console_set_silence(int silence);
++extern void s3c24xx_serial_register_resume_dependency(struct resume_dependency *
++ resume_dependency, int uart_index);
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/spi-gpio.h
+===================================================================
+--- linux-2.6.24.7.orig/include/asm-arm/arch-s3c2410/spi-gpio.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/spi-gpio.h 2008-12-11 22:46:49.000000000 +0100
+@@ -22,11 +22,12 @@ struct s3c2410_spigpio_info {
+ unsigned long pin_miso;
+
+ int bus_num;
++ int num_chipselect;
+
+ unsigned long board_size;
+ struct spi_board_info *board_info;
+
+- void (*chip_select)(struct s3c2410_spigpio_info *spi, int cs);
++ void (*chip_select)(struct s3c2410_spigpio_info *spi, int csid, int cs);
+ };
+
+
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/ts.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/ts.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,30 @@
++/* linux/include/asm/arch-s3c2410/ts.h
++ *
++ * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org>
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ *
++ * Changelog:
++ * 24-Mar-2005 RTP Created file
++ * 03-Aug-2005 RTP Renamed to ts.h
++ */
++
++#ifndef __ASM_ARM_TS_H
++#define __ASM_ARM_TS_H
++
++struct s3c2410_ts_mach_info {
++ int delay;
++ int presc;
++ int oversampling_shift;
++ int excursion_filter_len_bits;
++ int reject_threshold_vs_avg;
++};
++
++void set_s3c2410ts_info(struct s3c2410_ts_mach_info *hard_s3c2410ts_info);
++
++#endif /* __ASM_ARM_TS_H */
++
+Index: linux-2.6.24.7/include/asm-arm/arch-s3c2440/hxd8.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/asm-arm/arch-s3c2440/hxd8.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,16 @@
++#ifndef _HXD8_H
++#define _HXD8_H
++
++#include <asm/arch/regs-gpio.h>
++#include <asm/arch/irqs.h>
++
++#define HXD8v1_SYSTEM_REV 0x00000110
++
++#define HXD8_GPIO_USB_CUR_SEL S3C2410_GPA0
++#define HXD8_GPIO_BACKLIGHT S3C2410_GPB0
++#define HXD8_GPIO_USB_PULLUP S3C2410_GPB9
++#define HXD8_GPIO_PCF50606 S3C2410_GPF6
++
++#define HXD8_IRQ_PCF50606 IRQ_EINT6
++
++#endif
+Index: linux-2.6.24.7/include/asm-arm/kexec.h
+===================================================================
+--- linux-2.6.24.7.orig/include/asm-arm/kexec.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/asm-arm/kexec.h 2008-12-11 22:46:49.000000000 +0100
+@@ -1,8 +1,6 @@
+ #ifndef _ARM_KEXEC_H
+ #define _ARM_KEXEC_H
+
+-#ifdef CONFIG_KEXEC
+-
+ /* Maximum physical address we can use pages from */
+ #define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
+ /* Maximum address we can reach in physical address mode */
+@@ -16,6 +14,11 @@
+
+ #define KEXEC_BOOT_PARAMS_SIZE 1536
+
++#ifdef CONFIG_KEXEC
++
++#define KEXEC_ARM_ATAGS_OFFSET 0x1000
++#define KEXEC_ARM_ZIMAGE_OFFSET 0x8000
++
+ #ifndef __ASSEMBLY__
+
+ struct kimage;
+Index: linux-2.6.24.7/include/asm-arm/plat-s3c/nand.h
+===================================================================
+--- linux-2.6.24.7.orig/include/asm-arm/plat-s3c/nand.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/asm-arm/plat-s3c/nand.h 2008-12-11 22:46:49.000000000 +0100
+@@ -21,9 +21,12 @@
+ * partitions = mtd partition list
+ */
+
++#define S3C2410_NAND_BBT 0x0001
++
+ struct s3c2410_nand_set {
+ int nr_chips;
+ int nr_partitions;
++ unsigned int flags;
+ char *name;
+ int *nr_map;
+ struct mtd_partition *partitions;
+@@ -39,6 +42,9 @@ struct s3c2410_platform_nand {
+ int nr_sets;
+ struct s3c2410_nand_set *sets;
+
++ /* force software_ecc at runtime */
++ int software_ecc;
++
+ void (*select_chip)(struct s3c2410_nand_set *,
+ int chip);
+ };
+Index: linux-2.6.24.7/include/asm-arm/plat-s3c24xx/devs.h
+===================================================================
+--- linux-2.6.24.7.orig/include/asm-arm/plat-s3c24xx/devs.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/asm-arm/plat-s3c24xx/devs.h 2008-12-11 22:46:49.000000000 +0100
+@@ -42,6 +42,7 @@ extern struct platform_device s3c_device
+ extern struct platform_device s3c_device_timer3;
+
+ extern struct platform_device s3c_device_usbgadget;
++extern struct platform_device s3c_device_ts;
+
+ /* s3c2440 specific devices */
+
+Index: linux-2.6.24.7/include/asm-arm/plat-s3c24xx/irq.h
+===================================================================
+--- linux-2.6.24.7.orig/include/asm-arm/plat-s3c24xx/irq.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/asm-arm/plat-s3c24xx/irq.h 2008-12-11 22:46:49.000000000 +0100
+@@ -23,8 +23,15 @@ s3c_irqsub_mask(unsigned int irqno, unsi
+ {
+ unsigned long mask;
+ unsigned long submask;
++#ifdef CONFIG_S3C2440_C_FIQ
++ unsigned long flags;
++#endif
+
+ submask = __raw_readl(S3C2410_INTSUBMSK);
++#ifdef CONFIG_S3C2440_C_FIQ
++ local_save_flags(flags);
++ local_fiq_disable();
++#endif
+ mask = __raw_readl(S3C2410_INTMSK);
+
+ submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
+@@ -37,6 +44,9 @@ s3c_irqsub_mask(unsigned int irqno, unsi
+
+ /* write back masks */
+ __raw_writel(submask, S3C2410_INTSUBMSK);
++#ifdef CONFIG_S3C2440_C_FIQ
++ local_irq_restore(flags);
++#endif
+
+ }
+
+@@ -45,8 +55,15 @@ s3c_irqsub_unmask(unsigned int irqno, un
+ {
+ unsigned long mask;
+ unsigned long submask;
++#ifdef CONFIG_S3C2440_C_FIQ
++ unsigned long flags;
++#endif
+
+ submask = __raw_readl(S3C2410_INTSUBMSK);
++#ifdef CONFIG_S3C2440_C_FIQ
++ local_save_flags(flags);
++ local_fiq_disable();
++#endif
+ mask = __raw_readl(S3C2410_INTMSK);
+
+ submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
+@@ -55,6 +72,9 @@ s3c_irqsub_unmask(unsigned int irqno, un
+ /* write back masks */
+ __raw_writel(submask, S3C2410_INTSUBMSK);
+ __raw_writel(mask, S3C2410_INTMSK);
++#ifdef CONFIG_S3C2440_C_FIQ
++ local_irq_restore(flags);
++#endif
+ }
+
+
+Index: linux-2.6.24.7/include/asm-arm/plat-s3c24xx/neo1973.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/asm-arm/plat-s3c24xx/neo1973.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,33 @@
++/*
++ * include/asm-arm/plat-s3c24xx/neo1973.h
++ *
++ * Common utility code for GTA01 and GTA02
++ *
++ * Copyright (C) 2008 by Openmoko, Inc.
++ * Author: Holger Hans Peter Freyther <freyther@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++
++#ifndef NEO1973_H
++#define NEO1973_H
++
++void neo1973_gpb_add_shadow_gpio(unsigned int gpio);
++void neo1973_gpb_setpin(unsigned int pin, unsigned to);
++
++#endif
+Index: linux-2.6.24.7/include/linux/bq27000_battery.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/bq27000_battery.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,16 @@
++#ifndef __BQ27000_BATTERY_H__
++#define __BQ27000_BATTERY_H__
++
++void bq27000_charging_state_change(struct platform_device *pdev);
++
++struct bq27000_platform_data {
++ const char *name;
++ int rsense_mohms;
++ int (*hdq_read)(int);
++ int (*hdq_write)(int, u8);
++ int (*hdq_initialized)(void);
++ int (*get_charger_online_status)(void);
++ int (*get_charger_active_status)(void);
++};
++
++#endif
+Index: linux-2.6.24.7/include/linux/fb.h
+===================================================================
+--- linux-2.6.24.7.orig/include/linux/fb.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/linux/fb.h 2008-12-11 22:46:49.000000000 +0100
+@@ -120,6 +120,7 @@ struct dentry;
+ #define FB_ACCEL_XGI_VOLARI_V 47 /* XGI Volari V3XT, V5, V8 */
+ #define FB_ACCEL_XGI_VOLARI_Z 48 /* XGI Volari Z7 */
+ #define FB_ACCEL_OMAP1610 49 /* TI OMAP16xx */
++#define FB_ACCEL_GLAMO 50 /* SMedia Glamo */
+ #define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */
+ #define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */
+ #define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */
+Index: linux-2.6.24.7/include/linux/glamofb.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/glamofb.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,48 @@
++#ifndef _LINUX_GLAMOFB_H
++#define _LINUX_GLAMOFB_H
++
++#include <linux/spi/glamo.h>
++#include <linux/resume-dependency.h>
++
++struct glamofb_val {
++ unsigned int defval;
++ unsigned int min;
++ unsigned int max;
++};
++
++struct glamo_core;
++
++struct glamofb_platform_data {
++ int width, height;
++ int pixclock;
++ int left_margin, right_margin;
++ int upper_margin, lower_margin;
++ int hsync_len, vsync_len;
++ int fb_mem_size;
++
++ struct glamofb_val xres;
++ struct glamofb_val yres;
++ struct glamofb_val bpp;
++
++ struct glamo_spi_info *spi_info;
++ struct glamo_spigpio_info *spigpio_info;
++ struct glamo_core *glamo;
++
++ /* glamo mmc platform specific info */
++ void (*glamo_set_mci_power)(unsigned char power_mode,
++ unsigned short vdd);
++ /* glamo-mci asking if it should use the slow clock to card */
++ int (*glamo_mci_use_slow)(void);
++ int (*glamo_irq_is_wired)(void);
++ void (*mci_suspending)(struct platform_device *dev);
++ int (*mci_all_dependencies_resumed)(struct platform_device
++ *dev);
++};
++
++int glamofb_cmd_mode(struct glamofb_handle *gfb, int on);
++int glamofb_cmd_write(struct glamofb_handle *gfb, u_int16_t val);
++void glamo_lcm_reset(int level);
++extern void
++glamo_register_resume_dependency(struct resume_dependency * resume_dependency);
++
++#endif
+Index: linux-2.6.24.7/include/linux/glamo-gpio.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/glamo-gpio.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,99 @@
++#ifndef __GLAMO_GPIO_H
++#define __GLAMO_GPIO_H
++
++struct glamo_core;
++
++#define GLAMO_GPIO_BANKA 0x0000
++#define GLAMO_GPIO_BANKB 0x1000
++#define GLAMO_GPIO_BANKC 0x2000
++#define GLAMO_GPIO_BANKD 0x3000
++
++#define GLAMO_GPIONO(bank, pin) ((bank & 0xf000) | ((pin & 0xf) << 8))
++
++#define GLAMO_GPIO_F_IN 0x0010
++#define GLAMO_GPIO_F_OUT 0x0020
++#define GLAMO_GPIO_F_FUNC 0x0030
++
++#define GLAMO_GPIO0 GLAMO_GPIONO(GLAMO_GPIO_BANKA, 0)
++#define GLAMO_GPIO0_INPUT (GLAMO_GPIO0 | GLAMO_GPIO_F_IN)
++#define GLAMO_GPIO0_OUTPUT (GLAMO_GPIO0 | GLAMO_GPIO_F_OUT)
++#define GLAMO_GPIO0_HA20 (GLAMO_GPIO0 | GLAMO_GPIO_F_FUNC)
++
++#define GLAMO_GPIO1 GLAMO_GPIONO(GLAMO_GPIO_BANKA, 1)
++#define GLAMO_GPIO1_INPUT (GLAMO_GPIO1 | GLAMO_GPIO_F_IN)
++#define GLAMO_GPIO1_OUTPUT (GLAMO_GPIO1 | GLAMO_GPIO_F_OUT)
++#define GLAMO_GPIO1_HA21 (GLAMO_GPIO1 | GLAMO_GPIO_F_FUNC)
++
++#define GLAMO_GPIO2 GLAMO_GPIONO(GLAMO_GPIO_BANKA, 2)
++#define GLAMO_GPIO2_INPUT (GLAMO_GPIO2 | GLAMO_GPIO_F_IN)
++#define GLAMO_GPIO2_OUTPUT (GLAMO_GPIO2 | GLAMO_GPIO_F_OUT)
++#define GLAMO_GPIO2_HA22 (GLAMO_GPIO2 | GLAMO_GPIO_F_FUNC)
++
++#define GLAMO_GPIO3 GLAMO_GPIONO(GLAMO_GPIO_BANKA, 3)
++#define GLAMO_GPIO3_INPUT (GLAMO_GPIO3 | GLAMO_GPIO_F_IN)
++#define GLAMO_GPIO3_OUTPUT (GLAMO_GPIO3 | GLAMO_GPIO_F_OUT)
++#define GLAMO_GPIO3_HA23 (GLAMO_GPIO3 | GLAMO_GPIO_F_FUNC)
++
++#define GLAMO_GPIO4 GLAMO_GPIONO(GLAMO_GPIO_BANKB, 0)
++#define GLAMO_GPIO4_INPUT (GLAMO_GPIO4 | GLAMO_GPIO_F_IN)
++#define GLAMO_GPIO4_OUTPUT (GLAMO_GPIO4 | GLAMO_GPIO_F_OUT)
++#define GLAMO_GPIO4_nLCS0 (GLAMO_GPIO4 | GLAMO_GPIO_F_FUNC)
++
++#define GLAMO_GPIO5 GLAMO_GPIONO(GLAMO_GPIO_BANKB, 1)
++#define GLAMO_GPIO5_INPUT (GLAMO_GPIO5 | GLAMO_GPIO_F_IN)
++#define GLAMO_GPIO5_OUTPUT (GLAMO_GPIO5 | GLAMO_GPIO_F_OUT)
++#define GLAMO_GPIO5_nLCS1 (GLAMO_GPIO5 | GLAMO_GPIO_F_FUNC)
++
++#define GLAMO_GPIO6 GLAMO_GPIONO(GLAMO_GPIO_BANKB, 2)
++#define GLAMO_GPIO6_INPUT (GLAMO_GPIO6 | GLAMO_GPIO_F_IN)
++#define GLAMO_GPIO6_OUTPUT (GLAMO_GPIO6 | GLAMO_GPIO_F_OUT)
++#define GLAMO_GPIO6_LDCLK (GLAMO_GPIO6 | GLAMO_GPIO_F_FUNC)
++
++#define GLAMO_GPIO7 GLAMO_GPIONO(GLAMO_GPIO_BANKB, 3)
++#define GLAMO_GPIO7_INPUT (GLAMO_GPIO7 | GLAMO_GPIO_F_IN)
++#define GLAMO_GPIO7_OUTPUT (GLAMO_GPIO7 | GLAMO_GPIO_F_OUT)
++#define GLAMO_GPIO7_nLDE (GLAMO_GPIO7 | GLAMO_GPIO_F_FUNC)
++
++#define GLAMO_GPIO8 GLAMO_GPIONO(GLAMO_GPIO_BANKC, 0)
++#define GLAMO_GPIO8_INPUT (GLAMO_GPIO8 | GLAMO_GPIO_F_IN)
++#define GLAMO_GPIO8_OUTPUT (GLAMO_GPIO8 | GLAMO_GPIO_F_OUT)
++#define GLAMO_GPIO8_LD16 (GLAMO_GPIO8 | GLAMO_GPIO_F_FUNC)
++
++#define GLAMO_GPIO9 GLAMO_GPIONO(GLAMO_GPIO_BANKC, 1)
++#define GLAMO_GPIO9_INPUT (GLAMO_GPIO9 | GLAMO_GPIO_F_IN)
++#define GLAMO_GPIO9_OUTPUT (GLAMO_GPIO9 | GLAMO_GPIO_F_OUT)
++#define GLAMO_GPIO9_LD17 (GLAMO_GPIO9 | GLAMO_GPIO_F_FUNC)
++
++#define GLAMO_GPIO10 GLAMO_GPIONO(GLAMO_GPIO_BANKC, 2)
++#define GLAMO_GPIO10_INPUT (GLAMO_GPIO10 | GLAMO_GPIO_F_IN)
++#define GLAMO_GPIO10_OUTPUT (GLAMO_GPIO10 | GLAMO_GPIO_F_OUT)
++#define GLAMO_GPIO10_LSCK (GLAMO_GPIO10 | GLAMO_GPIO_F_FUNC)
++
++#define GLAMO_GPIO11 GLAMO_GPIONO(GLAMO_GPIO_BANKC, 3)
++#define GLAMO_GPIO11_INPUT (GLAMO_GPIO11 | GLAMO_GPIO_F_IN)
++#define GLAMO_GPIO11_OUTPUT (GLAMO_GPIO11 | GLAMO_GPIO_F_OUT)
++#define GLAMO_GPIO11_LSDA (GLAMO_GPIO11 | GLAMO_GPIO_F_FUNC)
++
++#define GLAMO_GPIO12 GLAMO_GPIONO(GLAMO_GPIO_BANKD, 0)
++#define GLAMO_GPIO12_INPUT (GLAMO_GPIO12 | GLAMO_GPIO_F_IN)
++#define GLAMO_GPIO12_OUTPUT (GLAMO_GPIO12 | GLAMO_GPIO_F_OUT)
++#define GLAMO_GPIO12_LSA0 (GLAMO_GPIO12 | GLAMO_GPIO_F_FUNC)
++
++
++#define REG_OF_GPIO(gpio) (((gpio & 0xf000) >> 12)*2 \
++ + GLAMO_REG_GPIO_GEN1)
++#define NUM_OF_GPIO(gpio) ((gpio & 0x0f00) >> 8)
++#define GPIO_OUT_BIT(gpio) (1 << (NUM_OF_GPIO(gpio) + 0))
++#define OUTPUT_BIT(gpio) (1 << (NUM_OF_GPIO(gpio) + 4))
++#define INPUT_BIT(gpio) (1 << (NUM_OF_GPIO(gpio) + 8))
++#define FUNC_BIT(gpio) (1 << (NUM_OF_GPIO(gpio) + 12))
++
++void glamo_gpio_setpin(struct glamo_core *glamo, unsigned int pin,
++ unsigned int value);
++
++int glamo_gpio_getpin(struct glamo_core *glamo, unsigned int pin);
++
++void glamo_gpio_cfgpin(struct glamo_core *glamo, unsigned int pinfunc);
++
++
++#endif /* _GLAMO_GPIO */
+Index: linux-2.6.24.7/include/linux/gta02_hdq.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/gta02_hdq.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,8 @@
++#ifndef __GTA02HDQ_H__
++#define __GTA02HDQ_H__
++
++int gta02hdq_read(int address);
++int gta02hdq_write(int address, u8 data);
++int gta02hdq_initialized(void);
++
++#endif
+Index: linux-2.6.24.7/include/linux/i2c-id.h
+===================================================================
+--- linux-2.6.24.7.orig/include/linux/i2c-id.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/linux/i2c-id.h 2008-12-11 22:46:49.000000000 +0100
+@@ -167,6 +167,10 @@
+ #define I2C_DRIVERID_FSCHER 1046
+ #define I2C_DRIVERID_W83L785TS 1047
+ #define I2C_DRIVERID_OV7670 1048 /* Omnivision 7670 camera */
++#define I2C_DRIVERID_PCF50606 1049
++#define I2C_DRIVERID_TSL256X 1050
++#define I2C_DRIVERID_PCF50633 1051
++#define I2C_DRIVERID_PCA9632 1052
+
+ /*
+ * ---- Adapter types ----------------------------------------------------
+Index: linux-2.6.24.7/include/linux/jbt6k74.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/jbt6k74.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,13 @@
++#ifndef __JBT6K74_H__
++#define __JBT6K74_H__
++
++#include <linux/spi/spi.h>
++
++struct jbt6k74_platform_data {
++ void (*reset)(int devindex, int level);
++ void (*resuming)(int devindex); /* called when LCM is resumed */
++ void (*suspending)(int devindex, struct spi_device *spi);
++ int (*all_dependencies_resumed)(int devindex);
++};
++
++#endif
+Index: linux-2.6.24.7/include/linux/kernel.h
+===================================================================
+--- linux-2.6.24.7.orig/include/linux/kernel.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/linux/kernel.h 2008-12-11 22:46:49.000000000 +0100
+@@ -182,6 +182,8 @@ asmlinkage int printk(const char * fmt,
+ extern int log_buf_get_len(void);
+ extern int log_buf_read(int idx);
+ extern int log_buf_copy(char *dest, int idx, int len);
++extern void (*printk_emergency_debug_spew_init)(void);
++extern void (*printk_emergency_debug_spew_send_string)(const char *);
+ #else
+ static inline int vprintk(const char *s, va_list args)
+ __attribute__ ((format (printf, 1, 0)));
+Index: linux-2.6.24.7/include/linux/kexec.h
+===================================================================
+--- linux-2.6.24.7.orig/include/linux/kexec.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/linux/kexec.h 2008-12-11 22:46:49.000000000 +0100
+@@ -1,7 +1,6 @@
+ #ifndef LINUX_KEXEC_H
+ #define LINUX_KEXEC_H
+
+-#ifdef CONFIG_KEXEC
+ #include <linux/types.h>
+ #include <linux/list.h>
+ #include <linux/linkage.h>
+@@ -11,6 +10,8 @@
+ #include <linux/elf.h>
+ #include <asm/kexec.h>
+
++#ifdef CONFIG_KEXEC
++
+ /* Verify architecture specific macros are defined */
+
+ #ifndef KEXEC_SOURCE_MEMORY_LIMIT
+Index: linux-2.6.24.7/include/linux/lis302dl.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/lis302dl.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,156 @@
++#ifndef _LINUX_LIS302DL_H
++#define _LINUX_LIS302DL_H
++
++#include <linux/types.h>
++#include <linux/spi/spi.h>
++#include <linux/input.h>
++
++
++struct lis302dl_info;
++
++struct lis302dl_platform_data {
++ char *name;
++ unsigned long pin_chip_select;
++ unsigned long pin_clk;
++ unsigned long pin_mosi;
++ unsigned long pin_miso;
++ int open_drain;
++ int interrupt;
++ void (*lis302dl_bitbang)(struct lis302dl_info *lis, u8 *tx,
++ int tx_bytes, u8 *rx, int rx_bytes);
++ void (*lis302dl_suspend_io)(struct lis302dl_info *, int resuming);
++ int (*lis302dl_bitbang_reg_read)(struct lis302dl_info *, u8 reg);
++ void (*lis302dl_bitbang_reg_write)(struct lis302dl_info *, u8 reg,
++ u8 val);
++};
++
++struct lis302dl_info {
++ struct lis302dl_platform_data *pdata;
++ struct device *dev;
++ struct input_dev *input_dev;
++ unsigned int flags;
++ unsigned int threshold;
++ unsigned int duration;
++ struct {
++ u8 cfg;
++ u8 threshold;
++ u8 duration;
++ int active;
++ } wakeup;
++ u_int8_t regs[0x40];
++};
++
++enum lis302dl_reg {
++ LIS302DL_REG_WHO_AM_I = 0x0f,
++ LIS302DL_REG_CTRL1 = 0x20,
++ LIS302DL_REG_CTRL2 = 0x21,
++ LIS302DL_REG_CTRL3 = 0x22,
++ LIS302DL_REG_HP_FILTER_RESET = 0x23,
++ LIS302DL_REG_STATUS = 0x27,
++ LIS302DL_REG_OUT_X = 0x29,
++ LIS302DL_REG_OUT_Y = 0x2b,
++ LIS302DL_REG_OUT_Z = 0x2d,
++ LIS302DL_REG_FF_WU_CFG_1 = 0x30,
++ LIS302DL_REG_FF_WU_SRC_1 = 0x31,
++ LIS302DL_REG_FF_WU_THS_1 = 0x32,
++ LIS302DL_REG_FF_WU_DURATION_1 = 0x33,
++ LIS302DL_REG_FF_WU_CFG_2 = 0x34,
++ LIS302DL_REG_FF_WU_SRC_2 = 0x35,
++ LIS302DL_REG_FF_WU_THS_2 = 0x36,
++ LIS302DL_REG_FF_WU_DURATION_2 = 0x37,
++ LIS302DL_REG_CLICK_CFG = 0x38,
++ LIS302DL_REG_CLICK_SRC = 0x39,
++ LIS302DL_REG_CLICK_THSY_X = 0x3b,
++ LIS302DL_REG_CLICK_THSZ = 0x3c,
++ LIS302DL_REG_CLICK_TIME_LIMIT = 0x3d,
++ LIS302DL_REG_CLICK_LATENCY = 0x3e,
++ LIS302DL_REG_CLICK_WINDOW = 0x3f,
++};
++
++enum lis302dl_reg_ctrl1 {
++ LIS302DL_CTRL1_Xen = 0x01,
++ LIS302DL_CTRL1_Yen = 0x02,
++ LIS302DL_CTRL1_Zen = 0x04,
++ LIS302DL_CTRL1_STM = 0x08,
++ LIS302DL_CTRL1_STP = 0x10,
++ LIS302DL_CTRL1_FS = 0x20,
++ LIS302DL_CTRL1_PD = 0x40,
++ LIS302DL_CTRL1_DR = 0x80,
++};
++
++enum lis302dl_reg_ctrl2 {
++ LIS302DL_CTRL2_HPC1 = 0x01,
++ LIS302DL_CTRL2_HPC2 = 0x02,
++ LIS302DL_CTRL2_HPFF1 = 0x04,
++ LIS302DL_CTRL2_HPFF2 = 0x08,
++ LIS302DL_CTRL2_FDS = 0x10,
++ LIS302DL_CTRL2_BOOT = 0x40,
++ LIS302DL_CTRL2_SIM = 0x80,
++};
++enum lis302dl_reg_ctrl3 {
++ LIS302DL_CTRL3_PP_OD = 0x40,
++ LIS302DL_CTRL3_IHL = 0x80,
++};
++
++enum lis302dl_reg_status {
++ LIS302DL_STATUS_XDA = 0x01,
++ LIS302DL_STATUS_YDA = 0x02,
++ LIS302DL_STATUS_ZDA = 0x04,
++ LIS302DL_STATUS_XYZDA = 0x08,
++ LIS302DL_STATUS_XOR = 0x10,
++ LIS302DL_STATUS_YOR = 0x20,
++ LIS302DL_STATUS_ZOR = 0x40,
++ LIS302DL_STATUS_XYZOR = 0x80,
++};
++
++/* Wakeup/freefall interrupt defs */
++enum lis302dl_reg_ffwucfg {
++ LIS302DL_FFWUCFG_XLIE = 0x01,
++ LIS302DL_FFWUCFG_XHIE = 0x02,
++ LIS302DL_FFWUCFG_YLIE = 0x04,
++ LIS302DL_FFWUCFG_YHIE = 0x08,
++ LIS302DL_FFWUCFG_ZLIE = 0x10,
++ LIS302DL_FFWUCFG_ZHIE = 0x20,
++ LIS302DL_FFWUCFG_LIR = 0x40,
++ LIS302DL_FFWUCFG_AOI = 0x80,
++};
++
++enum lis302dl_reg_ffwuths {
++ LIS302DL_FFWUTHS_DCRM = 0x80,
++};
++
++enum lis302dl_reg_ffwusrc {
++ LIS302DL_FFWUSRC_XL = 0x01,
++ LIS302DL_FFWUSRC_XH = 0x02,
++ LIS302DL_FFWUSRC_YL = 0x04,
++ LIS302DL_FFWUSRC_YH = 0x08,
++ LIS302DL_FFWUSRC_ZL = 0x10,
++ LIS302DL_FFWUSRC_ZH = 0x20,
++ LIS302DL_FFWUSRC_IA = 0x40,
++};
++
++enum lis302dl_reg_cloik_src {
++ LIS302DL_CLICKSRC_SINGLE_X = 0x01,
++ LIS302DL_CLICKSRC_DOUBLE_X = 0x02,
++ LIS302DL_CLICKSRC_SINGLE_Y = 0x04,
++ LIS302DL_CLICKSRC_DOUBLE_Y = 0x08,
++ LIS302DL_CLICKSRC_SINGLE_Z = 0x10,
++ LIS302DL_CLICKSRC_DOUBLE_Z = 0x20,
++ LIS302DL_CLICKSRC_IA = 0x40,
++};
++
++#define LIS302DL_WHO_AM_I_MAGIC 0x3b
++
++#define LIS302DL_F_WUP_FF_1 0x0001 /* wake up from free fall */
++#define LIS302DL_F_WUP_FF_2 0x0002
++#define LIS302DL_F_WUP_FF 0x0003
++#define LIS302DL_F_WUP_CLICK 0x0004
++#define LIS302DL_F_POWER 0x0010
++#define LIS302DL_F_FS 0x0020 /* ADC full scale */
++#define LIS302DL_F_INPUT_OPEN 0x0040 /* Set if input device is opened */
++#define LIS302DL_F_IRQ_WAKE 0x0080 /* IRQ is setup in wake mode */
++#define LIS302DL_F_DR 0x0100 /* Data rate, 400Hz/100Hz */
++
++
++#endif /* _LINUX_LIS302DL_H */
++
+Index: linux-2.6.24.7/include/linux/pcf50606.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/pcf50606.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,91 @@
++#ifndef _LINUX_PCF50606_H
++#define _LINUX_PCF50606_H
++
++#include <linux/pcf506xx.h>
++
++
++/* public in-kernel pcf50606 api */
++enum pcf50606_regulator_id {
++ PCF50606_REGULATOR_DCD,
++ PCF50606_REGULATOR_DCDE,
++ PCF50606_REGULATOR_DCUD,
++ PCF50606_REGULATOR_D1REG,
++ PCF50606_REGULATOR_D2REG,
++ PCF50606_REGULATOR_D3REG,
++ PCF50606_REGULATOR_LPREG,
++ PCF50606_REGULATOR_IOREG,
++ __NUM_PCF50606_REGULATORS
++};
++
++struct pcf50606_data;
++
++/* This is an ugly construct on how to access the (currently single/global)
++ * pcf50606 handle from other code in the kernel. I didn't really come up with
++ * a more decent method of dynamically resolving this */
++extern struct pcf50606_data *pcf50606_global;
++
++extern void
++pcf50606_go_standby(void);
++
++extern void
++pcf50606_gpo0_set(struct pcf50606_data *pcf, int on);
++
++extern int
++pcf50606_gpo0_get(struct pcf50606_data *pcf);
++
++extern int
++pcf50606_voltage_set(struct pcf50606_data *pcf,
++ enum pcf50606_regulator_id reg,
++ unsigned int millivolts);
++extern unsigned int
++pcf50606_voltage_get(struct pcf50606_data *pcf,
++ enum pcf50606_regulator_id reg);
++extern int
++pcf50606_onoff_get(struct pcf50606_data *pcf,
++ enum pcf50606_regulator_id reg);
++
++extern int
++pcf50606_onoff_set(struct pcf50606_data *pcf,
++ enum pcf50606_regulator_id reg, int on);
++
++extern void
++pcf50606_charge_fast(struct pcf50606_data *pcf, int on);
++
++
++#define PCF50606_FEAT_EXTON 0x00000001 /* not yet supported */
++#define PCF50606_FEAT_MBC 0x00000002
++#define PCF50606_FEAT_BBC 0x00000004 /* not yet supported */
++#define PCF50606_FEAT_TSC 0x00000008 /* not yet supported */
++#define PCF50606_FEAT_WDT 0x00000010
++#define PCF50606_FEAT_ACD 0x00000020
++#define PCF50606_FEAT_RTC 0x00000040
++#define PCF50606_FEAT_PWM 0x00000080
++#define PCF50606_FEAT_CHGCUR 0x00000100
++#define PCF50606_FEAT_BATVOLT 0x00000200
++#define PCF50606_FEAT_BATTEMP 0x00000400
++#define PCF50606_FEAT_PWM_BL 0x00000800
++
++struct pcf50606_platform_data {
++ /* general */
++ unsigned int used_features;
++ unsigned int onkey_seconds_required;
++
++ /* voltage regulator related */
++ struct pmu_voltage_rail rails[__NUM_PCF50606_REGULATORS];
++ unsigned int used_regulators;
++
++ /* charger related */
++ unsigned int r_fix_batt;
++ unsigned int r_fix_batt_par;
++ unsigned int r_sense_milli;
++
++ /* backlight related */
++ unsigned int init_brightness;
++
++ struct {
++ u_int8_t mbcc3; /* charger voltage / current */
++ } charger;
++ pmu_cb cb;
++};
++
++#endif
+Index: linux-2.6.24.7/include/linux/pcf50633.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/pcf50633.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,180 @@
++#ifndef _LINUX_PCF50633_H
++#define _LINUX_PCF50633_H
++
++#include <linux/pcf506xx.h>
++#include <linux/resume-dependency.h>
++
++
++/* public in-kernel pcf50633 api */
++enum pcf50633_regulator_id {
++ PCF50633_REGULATOR_AUTO,
++ PCF50633_REGULATOR_DOWN1,
++ PCF50633_REGULATOR_DOWN2,
++ PCF50633_REGULATOR_MEMLDO,
++ PCF50633_REGULATOR_LDO1,
++ PCF50633_REGULATOR_LDO2,
++ PCF50633_REGULATOR_LDO3,
++ PCF50633_REGULATOR_LDO4,
++ PCF50633_REGULATOR_LDO5,
++ PCF50633_REGULATOR_LDO6,
++ PCF50633_REGULATOR_HCLDO,
++ __NUM_PCF50633_REGULATORS
++};
++
++enum pcf50633_reg_int1 {
++ PCF50633_INT1_ADPINS = 0x01, /* Adapter inserted */
++ PCF50633_INT1_ADPREM = 0x02, /* Adapter removed */
++ PCF50633_INT1_USBINS = 0x04, /* USB inserted */
++ PCF50633_INT1_USBREM = 0x08, /* USB removed */
++ /* reserved */
++ PCF50633_INT1_ALARM = 0x40, /* RTC alarm time is reached */
++ PCF50633_INT1_SECOND = 0x80, /* RTC periodic second interrupt */
++};
++
++enum pcf50633_reg_int2 {
++ PCF50633_INT2_ONKEYR = 0x01, /* ONKEY rising edge */
++ PCF50633_INT2_ONKEYF = 0x02, /* ONKEY falling edge */
++ PCF50633_INT2_EXTON1R = 0x04, /* EXTON1 rising edge */
++ PCF50633_INT2_EXTON1F = 0x08, /* EXTON1 falling edge */
++ PCF50633_INT2_EXTON2R = 0x10, /* EXTON2 rising edge */
++ PCF50633_INT2_EXTON2F = 0x20, /* EXTON2 falling edge */
++ PCF50633_INT2_EXTON3R = 0x40, /* EXTON3 rising edge */
++ PCF50633_INT2_EXTON3F = 0x80, /* EXTON3 falling edge */
++};
++
++enum pcf50633_reg_int3 {
++ PCF50633_INT3_BATFULL = 0x01, /* Battery full */
++ PCF50633_INT3_CHGHALT = 0x02, /* Charger halt */
++ PCF50633_INT3_THLIMON = 0x04,
++ PCF50633_INT3_THLIMOFF = 0x08,
++ PCF50633_INT3_USBLIMON = 0x10,
++ PCF50633_INT3_USBLIMOFF = 0x20,
++ PCF50633_INT3_ADCRDY = 0x40, /* ADC conversion finished */
++ PCF50633_INT3_ONKEY1S = 0x80, /* ONKEY pressed 1 second */
++};
++
++enum pcf50633_reg_int4 {
++ PCF50633_INT4_LOWSYS = 0x01,
++ PCF50633_INT4_LOWBAT = 0x02,
++ PCF50633_INT4_HIGHTMP = 0x04,
++ PCF50633_INT4_AUTOPWRFAIL = 0x08,
++ PCF50633_INT4_DWN1PWRFAIL = 0x10,
++ PCF50633_INT4_DWN2PWRFAIL = 0x20,
++ PCF50633_INT4_LEDPWRFAIL = 0x40,
++ PCF50633_INT4_LEDOVP = 0x80,
++};
++
++enum pcf50633_reg_int5 {
++ PCF50633_INT5_LDO1PWRFAIL = 0x01,
++ PCF50633_INT5_LDO2PWRFAIL = 0x02,
++ PCF50633_INT5_LDO3PWRFAIL = 0x04,
++ PCF50633_INT5_LDO4PWRFAIL = 0x08,
++ PCF50633_INT5_LDO5PWRFAIL = 0x10,
++ PCF50633_INT5_LDO6PWRFAIL = 0x20,
++ PCF50633_INT5_HCLDOPWRFAIL = 0x40,
++ PCF50633_INT5_HCLDOOVL = 0x80,
++};
++
++struct pcf50633_data;
++extern struct pcf50633_data *pcf50633_global;
++
++extern void
++pcf50633_go_standby(void);
++
++enum pcf50633_gpio {
++ PCF50633_GPIO1 = 1,
++ PCF50633_GPIO2 = 2,
++ PCF50633_GPIO3 = 3,
++ PCF50633_GPO = 4,
++};
++
++extern void
++pcf50633_gpio_set(struct pcf50633_data *pcf, enum pcf50633_gpio gpio, int on);
++
++extern int
++pcf50633_gpio_get(struct pcf50633_data *pcf, enum pcf50633_gpio gpio);
++
++extern int
++pcf50633_voltage_set(struct pcf50633_data *pcf,
++ enum pcf50633_regulator_id reg,
++ unsigned int millivolts);
++extern unsigned int
++pcf50633_voltage_get(struct pcf50633_data *pcf,
++ enum pcf50633_regulator_id reg);
++
++extern int
++pcf50633_onoff_get(struct pcf50633_data *pcf,
++ enum pcf50633_regulator_id reg);
++
++extern int
++pcf50633_onoff_set(struct pcf50633_data *pcf,
++ enum pcf50633_regulator_id reg, int on);
++
++extern void
++pcf50633_backlight_resume(struct pcf50633_data *pcf);
++
++extern u_int16_t
++pcf50633_battvolt(struct pcf50633_data *pcf);
++
++extern int
++pcf50633_report_resumers(struct pcf50633_data *pcf, char *buf);
++
++extern void
++pcf50633_register_resume_dependency(struct pcf50633_data *pcf,
++ struct resume_dependency *dep);
++
++extern int
++pcf50633_notify_usb_current_limit_change(struct pcf50633_data *pcf,
++ unsigned int ma);
++extern int
++pcf50633_wait_for_ready(struct pcf50633_data *pcf, int timeout_ms,
++ char *name);
++
++/* 0 = initialized and resumed and ready to roll, !=0 = either not
++ * initialized or not resumed yet
++ */
++extern int
++pcf50633_ready(struct pcf50633_data *pcf);
++
++#define PCF50633_FEAT_EXTON 0x00000001 /* not yet supported */
++#define PCF50633_FEAT_MBC 0x00000002
++#define PCF50633_FEAT_BBC 0x00000004 /* not yet supported */
++#define PCF50633_FEAT_RTC 0x00000040
++#define PCF50633_FEAT_CHGCUR 0x00000100
++#define PCF50633_FEAT_BATVOLT 0x00000200
++#define PCF50633_FEAT_BATTEMP 0x00000400
++#define PCF50633_FEAT_PWM_BL 0x00000800
++
++struct pcf50633_platform_data {
++ /* general */
++ unsigned int used_features;
++ unsigned int onkey_seconds_sig_init;
++ unsigned int onkey_seconds_shutdown;
++
++ /* callback to attach platform children (to enforce suspend / resume
++ * ordering */
++ void (*attach_child_devices)(struct device *parent_device);
++
++ /* voltage regulator related */
++ struct pmu_voltage_rail rails[__NUM_PCF50633_REGULATORS];
++ unsigned int used_regulators;
++
++ /* charger related */
++ unsigned int r_fix_batt;
++ unsigned int r_fix_batt_par;
++ unsigned int r_sense_milli;
++ int flag_use_apm_emulation;
++
++ unsigned char resumers[5];
++
++ struct {
++ u_int8_t mbcc3; /* charger voltage / current */
++ } charger;
++ pmu_cb cb;
++
++ /* post-resume backlight bringup */
++ int defer_resume_backlight;
++ u8 resume_backlight_ramp_speed;
++};
++
++#endif /* _PCF50633_H */
+Index: linux-2.6.24.7/include/linux/pcf506xx.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/pcf506xx.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,34 @@
++#ifndef _LINUX_PCF506XX_H
++#define _LINUX_PCF506XX_H
++
++
++#define PMU_VRAIL_F_SUSPEND_ON 0x00000001 /* Remains on during suspend */
++#define PMU_VRAIL_F_UNUSED 0x00000002 /* This rail is not used */
++struct pmu_voltage_rail {
++ char *name;
++ unsigned int flags;
++ struct {
++ unsigned int init;
++ unsigned int max;
++ } voltage;
++};
++
++enum pmu_event {
++ PMU_EVT_NONE,
++ PMU_EVT_INSERT,
++ PMU_EVT_REMOVE,
++#ifdef CONFIG_SENSORS_PCF50633
++ PMU_EVT_USB_INSERT,
++ PMU_EVT_USB_REMOVE,
++#endif
++ PMU_EVT_CHARGER_ACTIVE,
++ PMU_EVT_CHARGER_IDLE,
++ PMU_EVT_CHARGER_CHANGE,
++ __NUM_PMU_EVTS
++};
++
++typedef int (*pmu_cb)(struct device *dev, unsigned int feature,
++ enum pmu_event event);
++
++
++#endif /* !_LINUX_PCF506XX_H */
+Index: linux-2.6.24.7/include/linux/resume-dependency.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/resume-dependency.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,105 @@
++#ifndef __RESUME_DEPENDENCY_H__
++#define __RESUME_DEPENDENCY_H__
++
++/* Resume dependency framework
++ *
++ * (C) 2008 Openmoko, Inc.
++ * Author: Andy Green <andy@openmoko.com>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; version 2.1.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++
++#include <linux/list.h>
++
++struct resume_dependency {
++ struct list_head list;
++
++ void (*callback)(void *); /* called with context as arg */
++ void * context;
++ int called_flag; /* set to 1 after called, use for multi dep */
++};
++
++/* if you are a driver accept to have other drivers as dependencies, you need to
++ * instantiate a struct resume_dependency above, then initialize it by invoking
++ * init_resume_dependency_list() on it
++ */
++
++#define init_resume_dependency_list(_head) \
++ INIT_LIST_HEAD(&(_head)->list);
++
++
++/* if your resume function depends on something else being resumed first, you
++ * can register the dependency by calling this in your suspend function with
++ * head being the list held by the thing you are dependent on, and dep being
++ * your struct resume_dependency
++ */
++
++#define register_resume_dependency(_head, _dep) { \
++ struct list_head *_pos, *_q; \
++ struct resume_dependency *_d; \
++\
++ (_dep)->called_flag = 1; \
++ list_for_each_safe(_pos, _q, &((_head)->list)) { \
++ _d = list_entry(_pos, struct resume_dependency, list); \
++ if (_d == (_dep)) \
++ list_del(_pos); \
++ } \
++ list_add(&(_dep)->list, &(_head)->list); \
++}
++
++/* In the resume function that things can be dependent on, at the end you
++ * invoke this macro. This calls back the dependent resumes now it is safe to
++ * use the resumed thing they were dependent on.
++ */
++
++#define callback_all_resume_dependencies(_head) { \
++ struct list_head *_pos, *_q; \
++ struct resume_dependency *_dep; \
++\
++ list_for_each_safe(_pos, _q, &((_head)->list)) { \
++ _dep = list_entry(_pos, struct resume_dependency, list); \
++ _dep->called_flag = 1; \
++ (_dep->callback)(_dep->context); \
++ list_del(_pos); \
++ } \
++}
++
++/* When a dependency is added, it is not actually active; the dependent resume
++ * handler will function as normal. The dependency is activated by the suspend
++ * handler for the driver that will be doing the callbacks. This ensures that
++ * if the suspend is aborted for any reason (error, driver busy, etc), that all
++ * suspended drivers will resume, even if the driver upon which they are
++ * dependent did not suspend, and hence will not resume, and thus would be
++ * unable to perform the callbacks.
++ */
++
++#define activate_all_resume_dependencies(_head) { \
++ struct list_head *_pos, *_q; \
++ struct resume_dependency *_dep; \
++\
++ list_for_each_safe(_pos, _q, &((_head)->list)) { \
++ _dep = list_entry(_pos, struct resume_dependency, list); \
++ _dep->called_flag = 0; \
++ } \
++}
++
++/* if your resume action is dependent on multiple drivers being resumed already,
++ * register the same callback with each driver you are dependent on, and check
++ * .called_flag for all of the struct resume_dependency. When they are all 1
++ * you know it is the last callback and you can resume, otherwise just return
++ */
++
++#endif
+Index: linux-2.6.24.7/include/linux/sdio/ctsystem.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/sdio/ctsystem.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,115 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: cpsystem.h
++
++@abstract: common system include file.
++
++@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __CPSYSTEM_H___
++#define __CPSYSTEM_H___
++
++/* SDIO stack status defines */
++/* < 0 error, >0 warning, 0 success */
++#define SDIO_IS_WARNING(status) ((status) > 0)
++#define SDIO_IS_ERROR(status) ((status) < 0)
++#define SDIO_SUCCESS(status) ((SDIO_STATUS)(status) >= 0)
++#define SDIO_STATUS_SUCCESS 0
++#define SDIO_STATUS_ERROR -1
++#define SDIO_STATUS_INVALID_PARAMETER -2
++#define SDIO_STATUS_PENDING 3
++#define SDIO_STATUS_DEVICE_NOT_FOUND -4
++#define SDIO_STATUS_DEVICE_ERROR -5
++#define SDIO_STATUS_INTERRUPTED -6
++#define SDIO_STATUS_NO_RESOURCES -7
++#define SDIO_STATUS_CANCELED -8
++#define SDIO_STATUS_BUFFER_TOO_SMALL -9
++#define SDIO_STATUS_NO_MORE_MESSAGES -10
++#define SDIO_STATUS_BUS_RESP_TIMEOUT -20 /* response timed-out */
++#define SDIO_STATUS_BUS_READ_TIMEOUT -21 /* read data timed-out */
++#define SDIO_STATUS_BUS_READ_CRC_ERR -22 /* data CRC failed */
++#define SDIO_STATUS_BUS_WRITE_ERROR -23 /* write failed */
++#define SDIO_STATUS_BUS_RESP_CRC_ERR -24 /* response received with a CRC error */
++#define SDIO_STATUS_INVALID_TUPLE_LENGTH -25 /* tuple length was invalid */
++#define SDIO_STATUS_TUPLE_NOT_FOUND -26 /* tuple could not be found */
++#define SDIO_STATUS_CIS_OUT_OF_RANGE -27 /* CIS is out of range in the tuple scan */
++#define SDIO_STATUS_FUNC_ENABLE_TIMEOUT -28 /* card timed out enabling or disabling */
++#define SDIO_STATUS_DATA_STATE_INVALID -29 /* card is in an invalid state for data */
++#define SDIO_STATUS_DATA_ERROR_UNKNOWN -30 /* card cannot process data transfer */
++#define SDIO_STATUS_INVALID_FUNC -31 /* sdio request is not valid for the function */
++#define SDIO_STATUS_FUNC_ARG_ERROR -32 /* sdio request argument is invalid or out of range */
++#define SDIO_STATUS_INVALID_COMMAND -33 /* SD COMMAND is invalid for the card state */
++#define SDIO_STATUS_SDREQ_QUEUE_FAILED -34 /* request failed to insert into queue */
++#define SDIO_STATUS_BUS_RESP_TIMEOUT_SHIFTABLE -35 /* response timed-out, possibily shiftable to correct */
++#define SDIO_STATUS_UNSUPPORTED -36 /* not supported */
++#define SDIO_STATUS_PROGRAM_TIMEOUT -37 /* memory card programming timeout */
++#define SDIO_STATUS_PROGRAM_STATUS_ERROR -38 /* memory card programming errors */
++
++#include <linux/sdio/ctsystem_linux.h>
++
++/* get structure from contained field */
++#define CONTAINING_STRUCT(address, struct_type, field_name)\
++ ((struct_type *)((ULONG_PTR)(address) - (ULONG_PTR)(&((struct_type *)0)->field_name)))
++
++#define ZERO_OBJECT(obj) memset(&(obj),0,sizeof(obj))
++#define ZERO_POBJECT(pObj) memset((pObj),0,sizeof(*(pObj)))
++
++
++/* bit field support functions */
++static INLINE void SetBit(PULONG pField, UINT position) {
++ *pField |= 1 << position;
++}
++static INLINE void ClearBit(PULONG pField, UINT position) {
++ *pField &= ~(1 << position);
++}
++static INLINE BOOL IsBitSet(PULONG pField, UINT position) {
++ return (*pField & (1 << position));
++}
++static INLINE INT FirstClearBit(PULONG pField) {
++ UINT ii;
++ for(ii = 0; ii < sizeof(ULONG)*8; ii++) {
++ if (!IsBitSet(pField, ii)) {
++ return ii;
++ }
++ }
++ /* no clear bits found */
++ return -1;
++}
++
++#endif /* __CPSYSTEM_H___ */
+Index: linux-2.6.24.7/include/linux/sdio/ctsystem_linux.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/sdio/ctsystem_linux.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,981 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: ctsystem_linux.h
++
++@abstract: common system include file for Linux.
++
++@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __CPSYSTEM_LINUX_H___
++#define __CPSYSTEM_LINUX_H___
++
++/* #define DBG_TIMESTAMP 1 */
++#define SD_TRACK_REQ 1
++
++/* LINUX support */
++#include <linux/version.h>
++
++#ifndef KERNEL_VERSION
++ #error KERNEL_VERSION macro not defined!
++#endif
++
++#ifndef LINUX_VERSION_CODE
++ #error LINUX_VERSION_CODE macro not defined!
++#endif
++
++#include <linux/autoconf.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/types.h>
++#include <linux/spinlock.h>
++#include <linux/module.h>
++
++#include <linux/interrupt.h>
++#include <linux/pnp.h>
++#include <asm/hardirq.h>
++#include <asm/semaphore.h>
++#include <asm/io.h>
++#include <asm/scatterlist.h>
++#ifdef DBG_TIMESTAMP
++#include <asm/timex.h>
++#endif /* DBG_TIMESTAMP */
++#ifndef in_atomic
++ /* released version of 2.6.9 */
++#include <linux/hardirq.h>
++#endif
++#include <linux/delay.h>
++#include <linux/device.h>
++
++/* generic types */
++typedef unsigned char UCHAR;
++typedef unsigned char * PUCHAR;
++typedef char TEXT;
++typedef char * PTEXT;
++typedef unsigned short USHORT;
++typedef unsigned short* PUSHORT;
++typedef unsigned int UINT;
++typedef unsigned int* PUINT;
++typedef int INT;
++typedef int* PINT;
++typedef unsigned long ULONG;
++typedef unsigned long* PULONG;
++typedef u8 UINT8;
++typedef u16 UINT16;
++typedef u32 UINT32;
++typedef u8* PUINT8;
++typedef u16* PUINT16;
++typedef u32* PUINT32;
++typedef unsigned char * ULONG_PTR;
++typedef void* PVOID;
++typedef unsigned char BOOL;
++typedef BOOL* PBOOL;
++typedef int SDIO_STATUS;
++typedef int SYSTEM_STATUS;
++typedef unsigned int EVENT_TYPE;
++typedef unsigned int EVENT_ARG;
++typedef unsigned int* PEVENT_TYPE;
++typedef struct semaphore OS_SEMAPHORE;
++typedef struct semaphore* POS_SEMAPHORE;
++typedef struct semaphore OS_SIGNAL; /* OS signals are just semaphores */
++typedef struct semaphore* POS_SIGNAL;
++typedef spinlock_t OS_CRITICALSECTION;
++typedef spinlock_t *POS_CRITICALSECTION;
++typedef int SDPOWER_STATE;
++typedef unsigned long ATOMIC_FLAGS;
++typedef INT THREAD_RETURN;
++typedef dma_addr_t DMA_ADDRESS;
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,9)
++typedef struct task_struct* PKERNEL_TASK;
++typedef struct device_driver OS_DRIVER;
++typedef struct device_driver* POS_DRIVER;
++typedef struct device OS_DEVICE;
++typedef struct device* POS_DEVICE;
++typedef struct pnp_driver OS_PNPDRIVER;
++typedef struct pnp_driver* POS_PNPDRIVER;
++typedef struct pnp_dev OS_PNPDEVICE;
++typedef struct pnp_dev* POS_PNPDEVICE;
++typedef struct module* POS_MODULE;
++#else
++/* 2.4 */
++typedef int PKERNEL_TASK;
++typedef PVOID OS_DRIVER;
++typedef PVOID* POS_DRIVER;
++typedef PVOID OS_DEVICE;
++typedef PVOID* POS_DEVICE;
++typedef PVOID OS_PNPDRIVER;
++typedef PVOID* POS_PNPDRIVER;
++typedef PVOID OS_PNPDEVICE;
++typedef PVOID* POS_PNPDEVICE;
++typedef struct module* POS_MODULE;
++#define module_param(a,b,c) MODULE_PARM(a, "i")
++#endif
++
++typedef int CT_DEBUG_LEVEL;
++
++
++#ifndef TRUE
++#define TRUE 1
++#endif
++#ifndef FALSE
++#define FALSE 0
++#endif
++#ifndef NULL
++#define NULL ((PVOID)0)
++#endif
++#define SDDMA_DESCRIPTION_FLAG_DMA 0x1 /* DMA enabled */
++#define SDDMA_DESCRIPTION_FLAG_SGDMA 0x2 /* Scatter-Gather DMA enabled */
++typedef struct _SDDMA_DESCRIPTION {
++ UINT16 Flags; /* SDDMA_DESCRIPTION_FLAG_xxx */
++ UINT16 MaxDescriptors; /* number of supported scatter gather entries */
++ UINT32 MaxBytesPerDescriptor; /* maximum bytes in a DMA descriptor entry */
++ u64 Mask; /* dma address mask */
++ UINT32 AddressAlignment; /* dma address alignment mask, least significant bits indicate illegal address bits */
++ UINT32 LengthAlignment; /* dma buffer length alignment mask, least significant bits indicate illegal length bits */
++}SDDMA_DESCRIPTION, *PSDDMA_DESCRIPTION;
++typedef struct scatterlist SDDMA_DESCRIPTOR, *PSDDMA_DESCRIPTOR;
++
++#define INLINE inline
++#define CT_PACK_STRUCT __attribute__ ((packed))
++
++#define CT_DECLARE_MODULE_PARAM_INTEGER(p) module_param(p, int, 0644);
++
++/* debug print macros */
++//#define SDDBG_KERNEL_PRINT_LEVEL KERN_DEBUG
++#define SDDBG_KERNEL_PRINT_LEVEL KERN_ALERT
++#define DBG_MASK_NONE 0x0
++#define DBG_MASK_HCD 0x100
++#define DBG_MASK_LIB 0x200
++#define DBG_MASK_BUS 0x400
++
++/* debug output levels, this must be order low number to higher */
++#define SDDBG_ERROR 3
++#define SDDBG_WARN 4
++#define SDDBG_DEBUG 6
++#define SDDBG_TRACE 7
++#define SDDBG_ALL 0xff
++
++#define DBG_LEVEL_NONE 0
++#define DBG_LEVEL_ERROR SDDBG_ERROR
++#define DBG_LEVEL_WARN SDDBG_WARN
++#define DBG_LEVEL_DEBUG SDDBG_DEBUG
++#define DBG_LEVEL_TRACE SDDBG_TRACE
++#define DBG_LEVEL_ALL SDDBG_ALL
++
++#define DBG_GET_LEVEL(lvl) ((lvl) & 0xff)
++#define DBG_GET_MASK(lvl) (((lvl) & 0xff00))
++
++#define DBG_SDIO_MASK (DBG_MASK_NONE | DBG_LEVEL_DEBUG)
++
++#ifdef DEBUG
++
++#define DBG_ASSERT(test) \
++{ \
++ if (!(test)) { \
++ DBG_PRINT(SDDBG_ERROR, ("Debug Assert Caught, File %s, Line: %d, Test:%s \n",__FILE__, __LINE__,#test)); \
++ } \
++}
++#define DBG_ASSERT_WITH_MSG(test,s) \
++{ \
++ if (!(test)) { \
++ DBG_PRINT(SDDBG_ERROR, ("Assert:%s File %s, Line: %d \n",(s),__FILE__, __LINE__)); \
++ } \
++}
++
++#define DBG_PRINT(lvl, args)\
++ do {\
++ if (DBG_GET_LEVEL(lvl) <= (DBG_SDIO_MASK & 0xff)) \
++ printk(_DBG_PRINTX_ARG args); \
++ } while(0);
++
++#else /* DEBUG */
++
++#define DBG_PRINT(lvl, str)
++#define DBG_ASSERT(test)
++#define DBG_ASSERT_WITH_MSG(test,s)
++#endif /* DEBUG */
++
++#define _DBG_PRINTX_ARG(arg...) arg /* unroll the parens around the var args*/
++#define DBG_GET_DEBUG_LEVEL() DBG_GET_LEVEL(DBG_SDIO_MASK)
++#define DBG_SET_DEBUG_LEVEL(v)
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Print a string to the debugger or console
++
++ @function name: REL_PRINT
++ @prototype: void REL_PRINT(INT Level, string)
++ @category: Support_Reference
++ @input: Level - debug level for the print
++
++ @output: none
++
++ @return:
++
++ @notes: If Level is less than the current debug level, the print will be
++ issued. This print cannot be conditionally compiled.
++ @see also: DBG_PRINT
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define REL_PRINT(lvl, args)\
++ {if (lvl <= DBG_GET_DEBUG_LEVEL())\
++ printk(SDDBG_KERNEL_PRINT_LEVEL _DBG_PRINTX_ARG args);\
++ }
++/* debug output levels, this must be order low number to higher */
++#define SDDBG_ERROR 3
++#define SDDBG_WARN 4
++#define SDDBG_DEBUG 6
++#define SDDBG_TRACE 7
++
++#ifdef DBG_CRIT_SECTION_RECURSE
++ /* this macro thows an exception if the lock is recursively taken
++ * the kernel must be configured with: CONFIG_DEBUG_SPINLOCK=y */
++#define call_spin_lock(pCrit) \
++{ \
++ UINT32 unlocked = 1; \
++ if ((pCrit)->lock) {unlocked = 0;} \
++ spin_lock_bh(pCrit); \
++ if (!unlocked) { \
++ unlocked = 0x01; \
++ unlocked = *((volatile UINT32 *)unlocked); \
++ } \
++}
++
++#define call_spin_lock_irqsave(pCrit,isc) \
++{ \
++ UINT32 unlocked = 1; \
++ if ((pCrit)->lock) {unlocked = 0;} \
++ spin_lock_irqsave(pCrit,isc); \
++ if (!unlocked) { \
++ unlocked = 0x01; \
++ unlocked = *((volatile UINT32 *)unlocked); \
++ } \
++}
++
++#else
++#define call_spin_lock(s) spin_lock_bh(s)
++#define call_spin_lock_irqsave(s,isc) spin_lock_irqsave(s,isc)
++#endif
++
++#define call_spin_unlock(s) spin_unlock_bh((s))
++#define call_spin_unlock_irqrestore(s,isc) spin_unlock_irqrestore(s,isc)
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,9)
++#define NonSchedulable() (in_atomic() || irqs_disabled())
++#else
++#define NonSchedulable() (irqs_disabled())
++#endif
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Initialize a critical section object.
++
++ @function name: CriticalSectionInit
++ @prototype: SDIO_STATUS CriticalSectionInit(POS_CRITICALSECTION pCrit)
++ @category: Support_Reference
++ @output: pCrit - pointer to critical section to initialize
++
++ @return: SDIO_STATUS_SUCCESS on success.
++
++ @notes: CriticalSectionDelete() must be called to cleanup any resources
++ associated with the critical section.
++
++ @see also: CriticalSectionDelete, CriticalSectionAcquire, CriticalSectionRelease
++ @example: To initialize a critical section:
++ status = CriticalSectionInit(&pDevice->ListLock);
++ if (!SDIO_SUCCESS(status)) {
++ .. failed
++ return status;
++ }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS CriticalSectionInit(POS_CRITICALSECTION pCrit) {
++ spin_lock_init(pCrit);
++ return SDIO_STATUS_SUCCESS;
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Acquire a critical section lock.
++
++ @function name: CriticalSectionAcquire
++ @prototype: SDIO_STATUS CriticalSectionAcquire(POS_CRITICALSECTION pCrit)
++ @category: Support_Reference
++
++ @input: pCrit - pointer to critical section that was initialized
++
++ @return: SDIO_STATUS_SUCCESS on success.
++
++ @notes: The critical section lock is acquired when this function returns
++ SDIO_STATUS_SUCCESS. Use CriticalSectionRelease() to release
++ the critical section lock.
++
++ @see also: CriticalSectionRelease
++
++ @example: To acquire a critical section lock:
++ status = CriticalSectionAcquire(&pDevice->ListLock);
++ if (!SDIO_SUCCESS(status)) {
++ .. failed
++ return status;
++ }
++ ... access protected data
++ // unlock
++ status = CriticalSectionRelease(&pDevice->ListLock);
++ if (!SDIO_SUCCESS(status)) {
++ .. failed
++ return status;
++ }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS CriticalSectionAcquire(POS_CRITICALSECTION pCrit) {
++ call_spin_lock(pCrit);
++ return SDIO_STATUS_SUCCESS;
++}
++
++// macro-tized versions
++#define CriticalSectionAcquire_M(pCrit) \
++ SDIO_STATUS_SUCCESS; call_spin_lock(pCrit)
++#define CriticalSectionRelease_M(pCrit) \
++ SDIO_STATUS_SUCCESS; call_spin_unlock(pCrit)
++
++#define CT_DECLARE_IRQ_SYNC_CONTEXT() unsigned long _ctSyncFlags
++
++#define CriticalSectionAcquireSyncIrq(pCrit) \
++ SDIO_STATUS_SUCCESS; call_spin_lock_irqsave(pCrit,_ctSyncFlags)
++
++#define CriticalSectionReleaseSyncIrq(pCrit) \
++ SDIO_STATUS_SUCCESS; call_spin_unlock_irqrestore(pCrit,_ctSyncFlags)
++
++
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Release a critical section lock.
++
++ @function name: CriticalSectionRelease
++ @prototype: SDIO_STATUS CriticalSectionRelease(POS_CRITICALSECTION pCrit)
++ @category: Support_Reference
++
++ @input: pCrit - pointer to critical section that was initialized
++
++ @return: SDIO_STATUS_SUCCESS on success.
++
++ @notes: The critical section lock is released when this function returns
++ SDIO_STATUS_SUCCESS.
++
++ @see also: CriticalSectionAcquire
++
++ @example: see CriticalSectionAcquire
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS CriticalSectionRelease(POS_CRITICALSECTION pCrit) {
++ call_spin_unlock(pCrit);
++ return SDIO_STATUS_SUCCESS;
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Cleanup a critical section object
++
++ @function name: CriticalSectionDelete
++ @prototype: void CriticalSectionDelete(POS_CRITICALSECTION pCrit)
++ @category: Support_Reference
++
++ @input: pCrit - an initialized critical section object
++
++ @return: SDIO_STATUS_SUCCESS on success.
++
++ @notes:
++
++ @see also: CriticalSectionInit, CriticalSectionAcquire, CriticalSectionRelease
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline void CriticalSectionDelete(POS_CRITICALSECTION pCrit) {
++ return;
++}
++
++/* internal use */
++static inline SDIO_STATUS SignalInitialize(POS_SIGNAL pSignal) {
++ sema_init(pSignal, 0);
++ return SDIO_STATUS_SUCCESS;
++}
++/* internal use */
++static inline void SignalDelete(POS_SIGNAL pSignal) {
++ return;
++}
++/* internal use */
++static inline SDIO_STATUS SignalWaitInterruptible(POS_SIGNAL pSignal) {
++ DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SignalWaitInterruptible not allowed\n");
++ if (down_interruptible(pSignal) == 0) {
++ return SDIO_STATUS_SUCCESS;
++ } else {
++ return SDIO_STATUS_INTERRUPTED;
++ }
++}
++/* internal use */
++static inline SDIO_STATUS SignalWait(POS_SIGNAL pSignal) {
++ DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SignalWait not allowed\n");
++ down(pSignal);
++ return SDIO_STATUS_SUCCESS;
++}
++
++/* internal use */
++static inline SDIO_STATUS SignalSet(POS_SIGNAL pSignal) {
++ up(pSignal);
++ return SDIO_STATUS_SUCCESS;
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Initialize a semaphore object.
++
++ @function name: SemaphoreInitialize
++ @prototype: SDIO_STATUS SemaphoreInitialize(POS_SEMAPHORE pSem, UINT value)
++ @category: Support_Reference
++
++ @input: value - initial value of the semaphore
++
++ @output: pSem - pointer to a semaphore object to initialize
++
++ @return: SDIO_STATUS_SUCCESS on success.
++
++ @notes: SemaphoreDelete() must be called to cleanup any resources
++ associated with the semaphore
++
++ @see also: SemaphoreDelete, SemaphorePend, SemaphorePendInterruptable
++
++ @example: To initialize a semaphore:
++ status = SemaphoreInitialize(&pDevice->ResourceSem,1);
++ if (!SDIO_SUCCESS(status)) {
++ .. failed
++ return status;
++ }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS SemaphoreInitialize(POS_SEMAPHORE pSem, UINT value) {
++ sema_init(pSem, value);
++ return SDIO_STATUS_SUCCESS;
++}
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Cleanup a semaphore object.
++
++ @function name: SemaphoreDelete
++ @prototype: void SemaphoreDelete(POS_SEMAPHORE pSem)
++ @category: Support_Reference
++
++ @input: pSem - pointer to a semaphore object to cleanup
++
++ @return:
++
++ @notes:
++
++ @see also: SemaphoreInitialize
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline void SemaphoreDelete(POS_SEMAPHORE pSem) {
++ return;
++}
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Acquire the semaphore or pend if the resource is not available
++
++ @function name: SemaphorePend
++ @prototype: SDIO_STATUS SemaphorePend(POS_SEMAPHORE pSem)
++ @category: Support_Reference
++
++ @input: pSem - pointer to an initialized semaphore object
++
++ @return: SDIO_STATUS_SUCCESS on success.
++
++ @notes: If the semaphore count is zero this function blocks until the count
++ becomes non-zero, otherwise the count is decremented and execution
++ continues. While waiting, the task/thread cannot be interrupted.
++ If the task or thread should be interruptible, use SemaphorePendInterruptible.
++ On some OSes SemaphorePend and SemaphorePendInterruptible behave the same.
++
++ @see also: SemaphorePendInterruptable, SemaphorePost
++ @example: To wait for a resource using a semaphore:
++ status = SemaphorePend(&pDevice->ResourceSem);
++ if (!SDIO_SUCCESS(status)) {
++ .. failed
++ return status;
++ }
++ ... resource acquired
++ SemaphorePost(&pDevice->ResourceSem);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS SemaphorePend(POS_SEMAPHORE pSem) {
++ DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SemaphorePend not allowed\n");
++ down(pSem);
++ return SDIO_STATUS_SUCCESS;
++}
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Acquire the semaphore or pend if the resource is not available
++
++ @function name: SemaphorePendInterruptable
++ @prototype: SDIO_STATUS SemaphorePendInterruptable(POS_SEMAPHORE pSem)
++ @category: Support_Reference
++
++ @input: pSem - pointer to an initialized semaphore object
++
++ @return: SDIO_STATUS_SUCCESS on success.
++
++ @notes: If the semaphore count is zero this function blocks until the count
++ becomes non-zero, otherwise the count is decremented and execution
++ continues. While waiting, the task/thread can be interrupted.
++ If the task or thread should not be interruptible, use SemaphorePend.
++
++ @see also: SemaphorePend, SemaphorePost
++ @example: To wait for a resource using a semaphore:
++ status = SemaphorePendInterruptable(&pDevice->ResourceSem);
++ if (!SDIO_SUCCESS(status)) {
++ .. failed, could have been interrupted
++ return status;
++ }
++ ... resource acquired
++ SemaphorePost(&pDevice->ResourceSem);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS SemaphorePendInterruptable(POS_SEMAPHORE pSem) {
++ DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SemaphorePendInterruptable not allowed\n");
++ if (down_interruptible(pSem) == 0) {
++ return SDIO_STATUS_SUCCESS;
++ } else {
++ return SDIO_STATUS_INTERRUPTED;
++ }
++}
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Post a semaphore.
++
++ @function name: SemaphorePost
++ @prototype: SDIO_STATUS SemaphorePost(POS_SEMAPHORE pSem)
++ @category: Support_Reference
++
++ @input: pSem - pointer to an initialized semaphore object
++
++ @return: SDIO_STATUS_SUCCESS on success.
++
++ @notes: This function increments the semaphore count.
++
++ @see also: SemaphorePend, SemaphorePendInterruptable.
++ @example: Posting a semaphore:
++ status = SemaphorePendInterruptable(&pDevice->ResourceSem);
++ if (!SDIO_SUCCESS(status)) {
++ .. failed, could have been interrupted
++ return status;
++ }
++ ... resource acquired
++ // post the semaphore
++ SemaphorePost(&pDevice->ResourceSem);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS SemaphorePost(POS_SEMAPHORE pSem) {
++ DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SemaphorePost not allowed\n");
++ up(pSem);
++ return SDIO_STATUS_SUCCESS;
++}
++
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Allocate a block of kernel accessible memory
++
++ @function name: KernelAlloc
++ @prototype: PVOID KernelAlloc(UINT size)
++ @category: Support_Reference
++
++ @input: size - size of memory block to allocate
++
++ @return: pointer to the allocated memory, NULL if allocation failed
++
++ @notes: For operating systems that use paging, the allocated memory is always
++ non-paged memory. Caller should only use KernelFree() to release the
++ block of memory. This call can potentially block and should only be called
++ from a schedulable context. Use KernelAllocIrqSafe() if the allocation
++ must be made from a non-schedulable context.
++
++ @see also: KernelFree, KernelAllocIrqSafe
++ @example: allocating memory:
++ pBlock = KernelAlloc(1024);
++ if (pBlock == NULL) {
++ .. failed, no memory
++ return SDIO_STATUS_INSUFFICIENT_RESOURCES;
++ }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline PVOID KernelAlloc(UINT size) {
++ PVOID pMem = kmalloc(size, GFP_KERNEL);
++ if (pMem != NULL) { memset(pMem,0,size); }
++ return pMem;
++}
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Free a block of kernel accessible memory.
++
++ @function name: KernelFree
++ @prototype: void KernelFree(PVOID ptr)
++ @category: Support_Reference
++
++ @input: ptr - pointer to memory allocated with KernelAlloc()
++
++ @return:
++
++ @notes: Caller should only use KernelFree() to release memory that was allocated
++ with KernelAlloc().
++
++ @see also: KernelAlloc
++ @example: KernelFree(pBlock);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline void KernelFree(PVOID ptr) {
++ kfree(ptr);
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Allocate a block of kernel accessible memory in an IRQ-safe manner
++
++ @function name: KernelAllocIrqSafe
++ @prototype: PVOID KernelAllocIrqSafe(UINT size)
++ @category: Support_Reference
++
++ @input: size - size of memory block to allocate
++
++ @return: pointer to the allocated memory, NULL if allocation failed
++
++ @notes: This variant of KernelAlloc allows the allocation of small blocks of
++ memory from an ISR or from a context where scheduling has been disabled.
++ The allocations should be small as the memory is typically allocated
++ from a critical heap. The caller should only use KernelFreeIrqSafe()
++ to release the block of memory.
++
++ @see also: KernelAlloc, KernelFreeIrqSafe
++ @example: allocating memory:
++ pBlock = KernelAllocIrqSafe(16);
++ if (pBlock == NULL) {
++ .. failed, no memory
++ return SDIO_STATUS_INSUFFICIENT_RESOURCES;
++ }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline PVOID KernelAllocIrqSafe(UINT size) {
++ return kmalloc(size, GFP_ATOMIC);
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Free a block of kernel accessible memory.
++
++ @function name: KernelFreeIrqSafe
++ @prototype: void KernelFreeIrqSafe(PVOID ptr)
++ @category: Support_Reference
++
++ @input: ptr - pointer to memory allocated with KernelAllocIrqSafe()
++
++ @return:
++
++ @notes: Caller should only use KernelFreeIrqSafe() to release memory that was allocated
++ with KernelAllocIrqSafe().
++
++ @see also: KernelAllocIrqSafe
++ @example: KernelFreeIrqSafe(pBlock);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline void KernelFreeIrqSafe(PVOID ptr) {
++ kfree(ptr);
++}
++
++/* error status conversions */
++static inline SYSTEM_STATUS SDIOErrorToOSError(SDIO_STATUS status) {
++ switch (status) {
++ case SDIO_STATUS_SUCCESS:
++ return 0;
++ case SDIO_STATUS_INVALID_PARAMETER:
++ return -EINVAL;
++ case SDIO_STATUS_PENDING:
++ return -EAGAIN; /* try again */
++ case SDIO_STATUS_DEVICE_NOT_FOUND:
++ return -ENXIO;
++ case SDIO_STATUS_DEVICE_ERROR:
++ return -EIO;
++ case SDIO_STATUS_INTERRUPTED:
++ return -EINTR;
++ case SDIO_STATUS_NO_RESOURCES:
++ return -ENOMEM;
++ case SDIO_STATUS_ERROR:
++ default:
++ return -EFAULT;
++ }
++}
++static inline SDIO_STATUS OSErrorToSDIOError(SYSTEM_STATUS status) {
++ if (status >=0) {
++ return SDIO_STATUS_SUCCESS;
++ }
++ switch (status) {
++ case -EINVAL:
++ return SDIO_STATUS_INVALID_PARAMETER;
++ case -ENXIO:
++ return SDIO_STATUS_DEVICE_NOT_FOUND;
++ case -EIO:
++ return SDIO_STATUS_DEVICE_ERROR;
++ case -EINTR:
++ return SDIO_STATUS_INTERRUPTED;
++ case -ENOMEM:
++ return SDIO_STATUS_NO_RESOURCES;
++ case -EFAULT:
++ return SDIO_STATUS_ERROR;
++ default:
++ return SDIO_STATUS_ERROR;
++ }
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Sleep or delay the execution context for a number of milliseconds.
++
++ @function name: OSSleep
++ @prototype: SDIO_STATUS OSSleep(INT SleepInterval)
++ @category: Support_Reference
++
++ @input: SleepInterval - time in milliseconds to put the execution context to sleep
++
++ @return: SDIO_STATUS_SUCCESS if sleep succeeded.
++
++ @notes: Caller should be in a context that allows it to sleep or block. The
++ minimum duration of sleep may be greater than 1 MS on some platforms and OSes.
++
++ @see also: OSSleep
++ @example: Using sleep to delay
++ EnableSlotPower(pSlot);
++ // wait for power to settle
++ status = OSSleep(100);
++ if (!SDIO_SUCCESS(status)){
++ // failed..
++ }
++
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS OSSleep(INT SleepInterval) {
++ UINT32 delta;
++
++ DBG_ASSERT_WITH_MSG(!NonSchedulable(),"OSSleep not allowed\n");
++ /* convert timeout to ticks */
++ delta = (SleepInterval * HZ)/1000;
++ if (delta == 0) {
++ delta = 1;
++ }
++ set_current_state(TASK_INTERRUPTIBLE);
++ if (schedule_timeout(delta) != 0) {
++ return SDIO_STATUS_INTERRUPTED;
++ }
++ return SDIO_STATUS_SUCCESS;
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: get the OSs device object
++
++ @function name: SD_GET_OS_DEVICE
++ @prototype: POS_DEVICE SD_GET_OS_DEVICE(PSDDEVICE pDevice)
++ @category: Support_Reference
++
++ @input: pDevice - the device on the HCD
++
++ @return: pointer to the OSs device
++
++ @see also:
++ @example: obtain low level device
++ pFunctionContext->GpsDevice.Port.dev = SD_GET_OS_DEVICE(pDevice);
++
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SD_GET_OS_DEVICE(pDevice) &((pDevice)->Device.dev)
++
++
++#ifdef __iomem
++ /* new type checking in 2.6.9 */
++ /* I/O Access macros */
++#define _READ_DWORD_REG(reg) \
++ readl((const volatile void __iomem *)(reg))
++#define _READ_WORD_REG(reg) \
++ readw((const volatile void __iomem *)(reg))
++#define _READ_BYTE_REG(reg) \
++ readb((const volatile void __iomem *)(reg))
++#define _WRITE_DWORD_REG(reg,value) \
++ writel((value),(volatile void __iomem *)(reg))
++#define _WRITE_WORD_REG(reg,value) \
++ writew((value),(volatile void __iomem *)(reg))
++#define _WRITE_BYTE_REG(reg,value) \
++ writeb((value),(volatile void __iomem *)(reg))
++#else
++ /* I/O Access macros */
++#define _READ_DWORD_REG(reg) \
++ readl((reg))
++#define _READ_WORD_REG(reg) \
++ readw((reg))
++#define _READ_BYTE_REG(reg) \
++ readb((reg))
++#define _WRITE_DWORD_REG(reg,value) \
++ writel((value),(reg))
++#define _WRITE_WORD_REG(reg,value) \
++ writew((value),(reg))
++#define _WRITE_BYTE_REG(reg,value) \
++ writeb((value),(reg))
++#endif
++ /* atomic operators */
++static inline ATOMIC_FLAGS AtomicTest_Set(volatile ATOMIC_FLAGS *pValue, INT BitNo) {
++ return test_and_set_bit(BitNo,(ATOMIC_FLAGS *)pValue);
++}
++static inline ATOMIC_FLAGS AtomicTest_Clear(volatile ATOMIC_FLAGS *pValue, INT BitNo) {
++ return test_and_clear_bit(BitNo,(ATOMIC_FLAGS *)pValue);
++}
++
++struct _OSKERNEL_HELPER;
++
++typedef THREAD_RETURN (*PHELPER_FUNCTION)(struct _OSKERNEL_HELPER *);
++
++typedef struct _OSKERNEL_HELPER {
++ PKERNEL_TASK pTask;
++ BOOL ShutDown;
++ OS_SIGNAL WakeSignal;
++ struct completion Completion;
++ PVOID pContext;
++ PHELPER_FUNCTION pHelperFunc;
++}OSKERNEL_HELPER, *POSKERNEL_HELPER;
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Wake the helper thread
++
++ @function name: SD_WAKE_OS_HELPER
++ @prototype: SD_WAKE_OS_HELPER(POSKERNEL_HELPER pOSHelper)
++ @category: Support_Reference
++
++ @input: pOSHelper - the OS helper object
++
++ @return: SDIO_STATUS
++
++ @see also: SDLIB_OSCreateHelper
++
++ @example: Waking up a helper thread
++ status = SD_WAKE_OS_HELPER(&pInstance->OSHelper);
++
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SD_WAKE_OS_HELPER(p) SignalSet(&(p)->WakeSignal)
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Obtains the context for the helper function
++
++ @function name: SD_GET_OS_HELPER_CONTEXT
++ @prototype: SD_GET_OS_HELPER_CONTEXT(POSKERNEL_HELPER pOSHelper)
++ @category: Support_Reference
++
++ @input: pOSHelper - the OS helper object
++
++ @return: helper specific context
++
++ @notes: This macro should only be called by the function associated with
++ the helper object.
++
++ @see also: SDLIB_OSCreateHelper
++
++ @example: Getting the helper specific context
++ PMYCONTEXT pContext = (PMYCONTEXT)SD_GET_OS_HELPER_CONTEXT(pHelper);
++
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SD_GET_OS_HELPER_CONTEXT(p) (p)->pContext
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Check helper function shut down flag.
++
++ @function name: SD_IS_HELPER_SHUTTING_DOWN
++ @prototype: SD_IS_HELPER_SHUTTING_DOWN(POSKERNEL_HELPER pOSHelper)
++ @category: Support_Reference
++
++ @input: pOSHelper - the OS helper object
++
++ @return: TRUE if shutting down, else FALSE
++
++ @notes: This macro should only be called by the function associated with
++ the helper object. The function should call this macro when it
++ unblocks from the call to SD_WAIT_FOR_WAKEUP(). If this function
++ returns TRUE, the function should clean up and exit.
++
++ @see also: SDLIB_OSCreateHelper , SD_WAIT_FOR_WAKEUP
++
++ @example: Checking for shutdown
++ while(1) {
++ status = SD_WAIT_FOR_WAKEUP(pHelper);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
++ ... shutting down
++ break;
++ }
++ }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SD_IS_HELPER_SHUTTING_DOWN(p) (p)->ShutDown
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Suspend and wait for wakeup signal
++
++ @function name: SD_WAIT_FOR_WAKEUP
++ @prototype: SD_WAIT_FOR_WAKEUP(POSKERNEL_HELPER pOSHelper)
++ @category: Support_Reference
++
++ @input: pOSHelper - the OS helper object
++
++ @return: SDIO_STATUS
++
++ @notes: This macro should only be called by the function associated with
++ the helper object. The function should call this function to suspend (block)
++ itself and wait for a wake up signal. The function should always check
++ whether the function should exit by calling SD_IS_HELPER_SHUTTING_DOWN.
++
++ @see also: SDLIB_OSCreateHelper , SD_IS_HELPER_SHUTTING_DOWN
++
++ @example: block on the wake signal
++ while(1) {
++ status = SD_WAIT_FOR_WAKEUP(pHelper);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
++ ... shutting down
++ break;
++ }
++ }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SD_WAIT_FOR_WAKEUP(p) SignalWaitInterruptible(&(p)->WakeSignal);
++
++#define CT_LE16_TO_CPU_ENDIAN(x) __le16_to_cpu(x)
++#define CT_LE32_TO_CPU_ENDIAN(x) __le32_to_cpu(x)
++#define CT_CPU_ENDIAN_TO_LE16(x) __cpu_to_le16(x)
++#define CT_CPU_ENDIAN_TO_LE32(x) __cpu_to_le32(x)
++
++#define CT_CPU_ENDIAN_TO_BE16(x) __cpu_to_be16(x)
++#define CT_CPU_ENDIAN_TO_BE32(x) __cpu_to_be32(x)
++#define CT_BE16_TO_CPU_ENDIAN(x) __be16_to_cpu(x)
++#define CT_BE32_TO_CPU_ENDIAN(x) __be32_to_cpu(x)
++#endif /* __CPSYSTEM_LINUX_H___ */
++
+Index: linux-2.6.24.7/include/linux/sdio/mmc_defs.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/sdio/mmc_defs.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,103 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: mmc_defs.h
++
++@abstract: MMC definitions not already defined in _sdio_defs.h
++
++@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef ___MMC_DEFS_H___
++#define ___MMC_DEFS_H___
++
++#define MMC_MAX_BUS_CLOCK 20000000 /* max clock speed in hz */
++#define MMC_HS_MAX_BUS_CLOCK 52000000 /* MMC PLUS (high speed) max clock rate in hz */
++
++/* R2 (CSD) macros */
++#define GET_MMC_CSD_TRANS_SPEED(pR) (pR)[12]
++#define GET_MMC_SPEC_VERSION(pR) (((pR)[15] >> 2) & 0x0F)
++#define MMC_SPEC_1_0_TO_1_2 0x00
++#define MMC_SPEC_1_4 0x01
++#define MMC_SPEC_2_0_TO_2_2 0x02
++#define MMC_SPEC_3_1 0x03
++#define MMC_SPEC_4_0_TO_4_1 0x04
++
++#define MMC_CMD_SWITCH 6
++#define MMC_CMD8 8
++
++#define MMC_SWITCH_CMD_SET 0
++#define MMC_SWITCH_SET_BITS 1
++#define MMC_SWITCH_CLEAR_BITS 2
++#define MMC_SWITCH_WRITE_BYTE 3
++#define MMC_SWITCH_CMD_SET0 0
++#define MMC_SWITCH_BUILD_ARG(cmdset,access,index,value) \
++ (((cmdset) & 0x07) | (((access) & 0x03) << 24) | (((index) & 0xFF) << 16) | (((value) & 0xFF) << 8))
++
++#define MMC_EXT_CSD_SIZE 512
++
++#define MMC_EXT_S_CMD_SET_OFFSET 504
++#define MMC_EXT_MIN_PERF_W_8_52_OFFSET 210
++#define MMC_EXT_MIN_PERF_R_8_52_OFFSET 209
++#define MMC_EXT_MIN_PERF_W_8_26_4_52_OFFSET 208
++#define MMC_EXT_MIN_PERF_R_8_26_4_52_OFFSET 207
++#define MMC_EXT_MIN_PERF_W_4_26_OFFSET 206
++#define MMC_EXT_MIN_PERF_R_4_56_OFFSET 205
++#define MMC_EXT_PWR_CL_26_360_OFFSET 203
++#define MMC_EXT_PWR_CL_52_360_OFFSET 202
++#define MMC_EXT_PWR_CL_26_195_OFFSET 201
++#define MMC_EXT_PWR_CL_52_195_OFFSET 200
++#define MMC_EXT_GET_PWR_CLASS(reg) ((reg) & 0xF)
++#define MMC_EXT_MAX_PWR_CLASSES 16
++#define MMC_EXT_CARD_TYPE_OFFSET 196
++#define MMC_EXT_CARD_TYPE_HS_52 (1 << 1)
++#define MMC_EXT_CARD_TYPE_HS_26 (1 << 0)
++#define MMC_EXT_CSD_VER_OFFSET 194
++#define MMC_EXT_VER_OFFSET 192
++#define MMC_EXT_VER_1_0 0
++#define MMC_EXT_VER_1_1 1
++#define MMC_EXT_CMD_SET_OFFSET 191
++#define MMC_EXT_CMD_SET_REV_OFFSET 189
++#define MMC_EXT_PWR_CLASS_OFFSET 187
++#define MMC_EXT_HS_TIMING_OFFSET 185
++#define MMC_EXT_HS_TIMING_ENABLE 0x01
++#define MMC_EXT_BUS_WIDTH_OFFSET 183
++#define MMC_EXT_BUS_WIDTH_1_BIT 0x00
++#define MMC_EXT_BUS_WIDTH_4_BIT 0x01
++#define MMC_EXT_BUS_WIDTH_8_BIT 0x02
++
++#endif
+Index: linux-2.6.24.7/include/linux/sdio/sdio_busdriver.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/sdio/sdio_busdriver.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,1435 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: sdio_busdriver.h
++
++@abstract: include file for registration of SDIO function drivers
++ and SDIO host controller bus drivers.
++
++@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __SDIO_BUSDRIVER_H___
++#define __SDIO_BUSDRIVER_H___
++
++typedef UINT8 CT_VERSION_CODE;
++#define CT_SDIO_STACK_VERSION_CODE ((CT_VERSION_CODE)0x26) /* version code that must be set in various structures */
++#define CT_SDIO_STACK_VERSION_MAJOR(v) (((v) & 0xF0) >> 4)
++#define CT_SDIO_STACK_VERSION_MINOR(v) (((v) & 0x0F))
++#define SET_SDIO_STACK_VERSION(p) (p)->Version = CT_SDIO_STACK_VERSION_CODE
++#define GET_SDIO_STACK_VERSION(p) (p)->Version
++#define GET_SDIO_STACK_VERSION_MAJOR(p) CT_SDIO_STACK_VERSION_MAJOR(GET_SDIO_STACK_VERSION(p))
++#define GET_SDIO_STACK_VERSION_MINOR(p) CT_SDIO_STACK_VERSION_MINOR(GET_SDIO_STACK_VERSION(p))
++#include "sdlist.h"
++
++/* card flags */
++typedef UINT16 CARD_INFO_FLAGS;
++#define CARD_MMC 0x0001 /* Multi-media card */
++#define CARD_SD 0x0002 /* SD-Memory present */
++#define CARD_SDIO 0x0004 /* SDIO present */
++#define CARD_RAW 0x0008 /* Raw card */
++#define CARD_COMBO (CARD_SD | CARD_SDIO) /* SDIO with SD */
++#define CARD_TYPE_MASK 0x000F /* card type mask */
++#define CARD_SD_WP 0x0010 /* SD WP on */
++#define CARD_PSEUDO 0x0020 /* pseudo card (internal use) */
++#define CARD_HIPWR 0x0040 /* card can use more than 200mA (SDIO 1.1 or greater)*/
++#define GET_CARD_TYPE(flags) ((flags) & CARD_TYPE_MASK)
++
++/* bus mode and clock rate */
++typedef UINT32 SD_BUSCLOCK_RATE; /* clock rate in hz */
++typedef UINT16 SD_BUSMODE_FLAGS;
++#define SDCONFIG_BUS_WIDTH_RESERVED 0x00
++#define SDCONFIG_BUS_WIDTH_SPI 0x01
++#define SDCONFIG_BUS_WIDTH_1_BIT 0x02
++#define SDCONFIG_BUS_WIDTH_4_BIT 0x03
++#define SDCONFIG_BUS_WIDTH_MMC8_BIT 0x04
++#define SDCONFIG_BUS_WIDTH_MASK 0x0F
++#define SDCONFIG_SET_BUS_WIDTH(flags,width) \
++{ \
++ (flags) &= ~SDCONFIG_BUS_WIDTH_MASK; \
++ (flags) |= (width); \
++}
++#define SDCONFIG_GET_BUSWIDTH(flags) ((flags) & SDCONFIG_BUS_WIDTH_MASK)
++#define SDCONFIG_BUS_MODE_SPI_NO_CRC 0x40 /* SPI bus is operating with NO CRC */
++#define SDCONFIG_BUS_MODE_SD_HS 0x80 /* set interface to SD high speed mode */
++#define SDCONFIG_BUS_MODE_MMC_HS 0x20 /* set interface to MMC high speed mode */
++
++typedef UINT16 SD_SLOT_CURRENT; /* slot current in mA */
++
++typedef UINT8 SLOT_VOLTAGE_MASK; /* slot voltage */
++#define SLOT_POWER_3_3V 0x01
++#define SLOT_POWER_3_0V 0x02
++#define SLOT_POWER_2_8V 0x04
++#define SLOT_POWER_2_0V 0x08
++#define SLOT_POWER_1_8V 0x10
++#define SLOT_POWER_1_6V 0x20
++
++#define MAX_CARD_RESPONSE_BYTES 17
++
++/* plug and play information for SD cards */
++typedef struct _SD_PNP_INFO {
++ UINT16 SDIO_ManufacturerCode; /* JEDEC Code */
++ UINT16 SDIO_ManufacturerID; /* manf-specific ID */
++ UINT8 SDIO_FunctionNo; /* function number 1-7 */
++ UINT8 SDIO_FunctionClass; /* function class */
++ UINT8 SDMMC_ManfacturerID; /* card CID's MANF-ID */
++ UINT16 SDMMC_OEMApplicationID; /* card CID's OEMAPP-ID */
++ CARD_INFO_FLAGS CardFlags; /* card flags */
++}SD_PNP_INFO, *PSD_PNP_INFO;
++
++#define IS_LAST_SDPNPINFO_ENTRY(id)\
++ (((id)->SDIO_ManufacturerCode == 0) &&\
++ ((id)->SDIO_ManufacturerID == 0) &&\
++ ((id)->SDIO_FunctionNo == 0) &&\
++ ((id)->SDIO_FunctionClass == 0) &&\
++ ((id)->SDMMC_OEMApplicationID == 0) && \
++ ((id)->CardFlags == 0))
++
++/* card properties */
++typedef struct _CARD_PROPERTIES {
++ UINT8 IOFnCount; /* number of I/O functions */
++ UINT8 SDIORevision; /* SDIO revision */
++#define SDIO_REVISION_1_00 0x00
++#define SDIO_REVISION_1_10 0x01
++#define SDIO_REVISION_1_20 0x02
++ UINT8 SD_MMC_Revision; /* SD or MMC revision */
++#define SD_REVISION_1_01 0x00
++#define SD_REVISION_1_10 0x01
++#define MMC_REVISION_1_0_2_2 0x00
++#define MMC_REVISION_3_1 0x01
++#define MMC_REVISION_4_0 0x02
++ UINT16 SDIO_ManufacturerCode; /* JEDEC Code */
++ UINT16 SDIO_ManufacturerID; /* manf-specific ID */
++ UINT32 CommonCISPtr; /* common CIS ptr */
++ UINT16 RCA; /* relative card address */
++ UINT8 SDIOCaps; /* SDIO card capabilities (refer to SDIO spec for decoding) */
++ UINT8 CardCSD[MAX_CARD_RESPONSE_BYTES]; /* for SD/MMC cards */
++ CARD_INFO_FLAGS Flags; /* card flags */
++ SD_BUSCLOCK_RATE OperBusClock; /* operational bus clock (based on HCD limit)*/
++ SD_BUSMODE_FLAGS BusMode; /* current card bus mode */
++ UINT16 OperBlockLenLimit; /* operational bytes per block length limit*/
++ UINT16 OperBlockCountLimit; /* operational number of blocks per transfer limit */
++ UINT8 CardState; /* card state flags */
++ SLOT_VOLTAGE_MASK CardVoltage; /* card operational voltage */
++#define CARD_STATE_REMOVED 0x01
++}CARD_PROPERTIES, *PCARD_PROPERTIES;
++
++/* SDREQUEST request flags */
++typedef UINT32 SDREQUEST_FLAGS;
++/* write operation */
++#define SDREQ_FLAGS_DATA_WRITE 0x8000
++/* has data (read or write) */
++#define SDREQ_FLAGS_DATA_TRANS 0x4000
++/* command is an atomic APP command, requiring CMD55 to be issued */
++#define SDREQ_FLAGS_APP_CMD 0x2000
++/* transfer should be handled asynchronously */
++#define SDREQ_FLAGS_TRANS_ASYNC 0x1000
++/* host should skip the SPI response filter for this command */
++#define SDREQ_FLAGS_RESP_SKIP_SPI_FILT 0x0800
++/* host should skip the response check for this data transfer */
++#define SDREQ_FLAGS_DATA_SKIP_RESP_CHK 0x0400
++/* flag requesting a CMD12 be automatically issued by host controller */
++#define SDREQ_FLAGS_AUTO_CMD12 0x0200
++/* flag indicating that the data buffer meets HCD's DMA restrictions */
++#define SDREQ_FLAGS_DATA_DMA 0x0010
++/* indicate to host that this is a short and quick transfer, the HCD may optimize
++ * this request to reduce interrupt overhead */
++#define SDREQ_FLAGS_DATA_SHORT_TRANSFER 0x00010000
++/* indicate to the host that this is a raw request */
++#define SDREQ_FLAGS_RAW 0x00020000
++/* auto data transfer status check for MMC and Memory cards */
++#define SDREQ_FLAGS_AUTO_TRANSFER_STATUS 0x00100000
++
++#define SDREQ_FLAGS_UNUSED1 0x00200000
++#define SDREQ_FLAGS_UNUSED2 0x00400000
++#define SDREQ_FLAGS_UNUSED3 0x00800000
++#define SDREQ_FLAGS_UNUSED4 0x01000000
++#define SDREQ_FLAGS_UNUSED5 0x02000000
++
++/* the following flags are internal use only */
++#define SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE 0x0100
++/* flag indicating that response has been converted (internal use) */
++#define SDREQ_FLAGS_RESP_SPI_CONVERTED 0x0040
++/* request was cancelled - internal use only */
++#define SDREQ_FLAGS_CANCELED 0x0020
++/* a barrier operation */
++#define SDREQ_FLAGS_BARRIER 0x00040000
++/* a pseudo bus request */
++#define SDREQ_FLAGS_PSEUDO 0x00080000
++/* queue to the head */
++#define SDREQ_FLAGS_QUEUE_HEAD 0x04000000
++
++#define SDREQ_FLAGS_I_UNUSED1 0x08000000
++#define SDREQ_FLAGS_I_UNUSED2 0x10000000
++#define SDREQ_FLAGS_I_UNUSED3 0x20000000
++#define SDREQ_FLAGS_I_UNUSED4 0x40000000
++#define SDREQ_FLAGS_I_UNUSED5 0x80000000
++
++/* response type mask */
++#define SDREQ_FLAGS_RESP_MASK 0x000F
++#define GET_SDREQ_RESP_TYPE(flags) ((flags) & SDREQ_FLAGS_RESP_MASK)
++#define IS_SDREQ_WRITE_DATA(flags) ((flags) & SDREQ_FLAGS_DATA_WRITE)
++#define IS_SDREQ_DATA_TRANS(flags) ((flags) & SDREQ_FLAGS_DATA_TRANS)
++#define IS_SDREQ_RAW(flags) ((flags) & SDREQ_FLAGS_RAW)
++#define IS_SDREQ_FORCE_DEFERRED_COMPLETE(flags) ((flags) & SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE)
++#define SDREQ_FLAGS_NO_RESP 0x0000
++#define SDREQ_FLAGS_RESP_R1 0x0001
++#define SDREQ_FLAGS_RESP_R1B 0x0002
++#define SDREQ_FLAGS_RESP_R2 0x0003
++#define SDREQ_FLAGS_RESP_R3 0x0004
++#define SDREQ_FLAGS_RESP_MMC_R4 0x0005 /* not supported, for future use */
++#define SDREQ_FLAGS_RESP_MMC_R5 0x0006 /* not supported, for future use */
++#define SDREQ_FLAGS_RESP_R6 0x0007
++#define SDREQ_FLAGS_RESP_SDIO_R4 0x0008
++#define SDREQ_FLAGS_RESP_SDIO_R5 0x0009
++
++struct _SDREQUEST;
++struct _SDFUNCTION;
++
++typedef void (*PSDEQUEST_COMPLETION)(struct _SDREQUEST *);
++
++/* defines SD/MMC and SDIO requests for the RAW-mode API */
++typedef struct _SDREQUEST {
++ SDLIST SDList; /* internal use list*/
++ UINT32 Argument; /* SD/SDIO/MMC 32 bit argument */
++ SDREQUEST_FLAGS Flags; /* request flags */
++ ATOMIC_FLAGS InternalFlags; /* internal use flags */
++ UINT8 Command; /* SD/SDIO/MMC 8 bit command */
++ UINT8 Response[MAX_CARD_RESPONSE_BYTES]; /* buffer for CMD response */
++ UINT16 BlockCount; /* number of blocks to send/rcv */
++ UINT16 BlockLen; /* length of each block */
++ UINT16 DescriptorCount; /* number of DMA descriptor entries in pDataBuffer if DMA */
++ PVOID pDataBuffer; /* starting address of buffer (or ptr to PSDDMA_DESCRIPTOR*/
++ UINT32 DataRemaining; /* number of bytes remaining in the transfer (internal use) */
++ PVOID pHcdContext; /* internal use context */
++ PSDEQUEST_COMPLETION pCompletion; /* function driver completion routine */
++ PVOID pCompleteContext; /* function driver completion context */
++ SDIO_STATUS Status; /* completion status */
++ struct _SDFUNCTION* pFunction; /* function driver that generated request (internal use)*/
++ INT RetryCount; /* number of times to retry on error, non-data cmds only */
++ PVOID pBdRsv1; /* reserved */
++ PVOID pBdRsv2;
++ PVOID pBdRsv3;
++}SDREQUEST, *PSDREQUEST;
++
++ /* a request queue */
++typedef struct _SDREQUESTQUEUE {
++ SDLIST Queue; /* the queue of requests */
++ BOOL Busy; /* busy flag */
++}SDREQUESTQUEUE, *PSDREQUESTQUEUE;
++
++
++typedef UINT16 SDCONFIG_COMMAND;
++/* SDCONFIG request flags */
++/* get operation */
++#define SDCONFIG_FLAGS_DATA_GET 0x8000
++/* put operation */
++#define SDCONFIG_FLAGS_DATA_PUT 0x4000
++/* host controller */
++#define SDCONFIG_FLAGS_HC_CONFIG 0x2000
++/* both */
++#define SDCONFIG_FLAGS_DATA_BOTH (SDCONFIG_FLAGS_DATA_GET | SDCONFIG_FLAGS_DATA_PUT)
++/* no data */
++#define SDCONFIG_FLAGS_DATA_NONE 0x0000
++
++/* SDCONFIG commands */
++#define SDCONFIG_GET_HCD_DEBUG (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_GET | 275)
++#define SDCONFIG_SET_HCD_DEBUG (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_PUT | 276)
++
++/* custom hcd commands */
++#define SDCONFIG_GET_HOST_CUSTOM (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_GET | 300)
++#define SDCONFIG_PUT_HOST_CUSTOM (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_PUT | 301)
++
++/* function commands */
++#define SDCONFIG_FUNC_ENABLE_DISABLE (SDCONFIG_FLAGS_DATA_PUT | 18)
++#define SDCONFIG_FUNC_UNMASK_IRQ (SDCONFIG_FLAGS_DATA_NONE | 21)
++#define SDCONFIG_FUNC_MASK_IRQ (SDCONFIG_FLAGS_DATA_NONE | 22)
++#define SDCONFIG_FUNC_ACK_IRQ (SDCONFIG_FLAGS_DATA_NONE | 23)
++#define SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC (SDCONFIG_FLAGS_DATA_NONE | 24)
++#define SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC (SDCONFIG_FLAGS_DATA_NONE | 25)
++#define SDCONFIG_FUNC_ALLOC_SLOT_CURRENT (SDCONFIG_FLAGS_DATA_PUT | 26)
++#define SDCONFIG_FUNC_FREE_SLOT_CURRENT (SDCONFIG_FLAGS_DATA_NONE | 27)
++#define SDCONFIG_FUNC_CHANGE_BUS_MODE (SDCONFIG_FLAGS_DATA_BOTH | 28)
++#define SDCONFIG_FUNC_CHANGE_BUS_MODE_ASYNC (SDCONFIG_FLAGS_DATA_BOTH | 29)
++#define SDCONFIG_FUNC_NO_IRQ_PEND_CHECK (SDCONFIG_FLAGS_DATA_NONE | 30)
++
++typedef UINT8 FUNC_ENABLE_DISABLE_FLAGS;
++typedef UINT32 FUNC_ENABLE_TIMEOUT;
++
++ /* function enable */
++typedef struct _SDCONFIG_FUNC_ENABLE_DISABLE_DATA {
++#define SDCONFIG_DISABLE_FUNC 0x0000
++#define SDCONFIG_ENABLE_FUNC 0x0001
++ FUNC_ENABLE_DISABLE_FLAGS EnableFlags; /* enable flags*/
++ FUNC_ENABLE_TIMEOUT TimeOut; /* timeout in milliseconds */
++ void (*pOpComplete)(PVOID Context, SDIO_STATUS status); /* reserved */
++ PVOID pOpCompleteContext; /* reserved */
++}SDCONFIG_FUNC_ENABLE_DISABLE_DATA, *PSDCONFIG_FUNC_ENABLE_DISABLE_DATA;
++
++ /* slot current allocation data */
++typedef struct _SDCONFIG_FUNC_SLOT_CURRENT_DATA {
++ SD_SLOT_CURRENT SlotCurrent; /* slot current to request in mA*/
++}SDCONFIG_FUNC_SLOT_CURRENT_DATA, *PSDCONFIG_FUNC_SLOT_CURRENT_DATA;
++
++/* slot bus mode configuration */
++typedef struct _SDCONFIG_BUS_MODE_DATA {
++ SD_BUSCLOCK_RATE ClockRate; /* clock rate in Hz */
++ SD_BUSMODE_FLAGS BusModeFlags; /* bus mode flags */
++ SD_BUSCLOCK_RATE ActualClockRate; /* actual rate in KHz */
++}SDCONFIG_BUS_MODE_DATA, *PSDCONFIG_BUS_MODE_DATA;
++
++/* defines configuration requests for the HCD */
++typedef struct _SDCONFIG {
++ SDCONFIG_COMMAND Cmd; /* configuration command */
++ PVOID pData; /* configuration data */
++ INT DataLength; /* config data length */
++}SDCONFIG, *PSDCONFIG;
++
++#define SET_SDCONFIG_CMD_INFO(pHdr,cmd,pC,len) \
++{ \
++ (pHdr)->Cmd = (cmd); \
++ (pHdr)->pData = (PVOID)(pC); \
++ (pHdr)->DataLength = (len); \
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get a pointer to the configuration command data.
++
++ @function name: GET_SDCONFIG_CMD
++ @prototype: UNIT16 GET_SDCONFIG_CMD (PSDCONFIG pCommand)
++ @category: HD_Reference
++
++ @input: pCommand - config command structure.
++
++ @return: command code
++
++ @notes: Implemented as a macro. This macro returns the command code for this
++ configuration request.
++
++ @example: getting the command code:
++ cmd = GET_SDCONFIG_CMD(pConfig);
++ switch (cmd) {
++ case SDCONFIG_GET_WP:
++ .. get write protect switch position
++ break;
++ ...
++ }
++
++ @see also: GET_SDCONFIG_CMD_LEN, GET_SDCONFIG_CMD_DATA
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define GET_SDCONFIG_CMD(pBuffer) ((pBuffer)->Cmd)
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get a pointer to the configuration command data.
++
++ @function name: GET_SDCONFIG_CMD_LEN
++ @prototype: INT GET_SDCONFIG_CMD_LEN (PSDCONFIG pCommand)
++ @category: HD_Reference
++
++ @input: pCommand - config command structure.
++
++ @return: length of config command data
++
++ @notes: Implemented as a macro. Host controller drivers can use this macro to extract
++ the number of bytes of command specific data. This can be used to validate the
++ config data buffer size.
++
++ @example: getting the data length:
++ length = GET_SDCONFIG_CMD_LEN(pConfig);
++ if (length < CUSTOM_COMMAND_XXX_SIZE) {
++ ... invalid length
++ }
++
++ @see also: GET_SDCONFIG_CMD, GET_SDCONFIG_CMD_DATA
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define GET_SDCONFIG_CMD_LEN(pBuffer) ((pBuffer)->DataLength)
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get a pointer to the configuration command data.
++
++ @function name: GET_SDCONFIG_CMD_DATA
++ @prototype: (casted ptr) GET_SDCONFIG_CMD_DATA (type, PSDCONFIG pCommand)
++ @category: HD_Reference
++
++ @input: type - pointer type to cast the returned pointer to.
++ pCommand - config command structure.
++
++ @return: type-casted pointer to the command's data
++
++ @notes: Implemented as a macro. Host controller drivers can use this macro to extract
++ a pointer to the command specific data in an HCD configuration request.
++
++ @example: getting the pointer:
++ // get interrupt control data
++ pIntControl = GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig);
++ if (pIntControl->SlotIRQEnable) {
++ ... enable slot IRQ detection
++ }
++
++ @see also: GET_SDCONFIG_CMD, GET_SDCONFIG_CMD_LEN
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define GET_SDCONFIG_CMD_DATA(type,pBuffer) ((type)((pBuffer)->pData))
++#define IS_SDCONFIG_CMD_GET(pBuffer) ((pBuffer)->Cmd & SDCONFIG_FLAGS_DATA_GET)
++#define IS_SDCONFIG_CMD_PUT(pBuffer) ((pBuffer)->Cmd & SDCONFIG_FLAGS_DATA_PUT)
++
++struct _SDDEVICE;
++struct _SDHCD;
++
++typedef UINT8 SD_FUNCTION_FLAGS;
++#define SDFUNCTION_FLAG_REMOVING 0x01
++
++/* function driver registration structure */
++typedef struct _SDFUNCTION {
++ CT_VERSION_CODE Version; /* version code of the SDIO stack */
++ SDLIST SDList; /* internal use list*/
++ PTEXT pName; /* name of registering driver */
++ UINT MaxDevices; /* maximum number of devices supported by this function */
++ UINT NumDevices; /* number of devices supported by this function */
++ PSD_PNP_INFO pIds; /* null terminated table of supported devices*/
++ BOOL (*pProbe)(struct _SDFUNCTION *pFunction, struct _SDDEVICE *pDevice);/* New device inserted */
++ /* Device removed (NULL if not a hot-plug capable driver) */
++ void (*pRemove)(struct _SDFUNCTION *pFunction, struct _SDDEVICE *pDevice);
++ SDIO_STATUS (*pSuspend)(struct _SDFUNCTION *pFunction, SDPOWER_STATE state); /* Device suspended */
++ SDIO_STATUS (*pResume)(struct _SDFUNCTION *pFunction); /* Device woken up */
++ /* Enable wake event */
++ SDIO_STATUS (*pWake) (struct _SDFUNCTION *pFunction, SDPOWER_STATE state, BOOL enable);
++ PVOID pContext; /* function driver use data */
++ OS_PNPDRIVER Driver; /* driver registration with base system */
++ SDLIST DeviceList; /* the list of devices this driver is using*/
++ OS_SIGNAL CleanupReqSig; /* wait for requests completion on cleanup (internal use) */
++ SD_FUNCTION_FLAGS Flags; /* internal flags (internal use) */
++}SDFUNCTION, *PSDFUNCTION;
++
++typedef UINT8 HCD_EVENT;
++
++ /* device info for SDIO functions */
++typedef struct _SDIO_DEVICE_INFO {
++ UINT32 FunctionCISPtr; /* function's CIS ptr */
++ UINT32 FunctionCSAPtr; /* function's CSA ptr */
++ UINT16 FunctionMaxBlockSize; /* function's reported max block size */
++}SDIO_DEVICE_INFO, *PSDIO_DEVICE_INFO;
++
++ /* device info for SD/MMC card functions */
++typedef struct _SDMMC_INFO{
++ UINT8 Unused; /* reserved */
++}SDMMC_INFO, *PSDMMC_INFO;
++
++ /* union of SDIO function and device info */
++typedef union _SDDEVICE_INFO {
++ SDIO_DEVICE_INFO AsSDIOInfo;
++ SDMMC_INFO AsSDMMCInfo;
++}SDDEVICE_INFO, *PSDDEVICE_INFO;
++
++
++typedef UINT8 SD_DEVICE_FLAGS;
++#define SDDEVICE_FLAG_REMOVING 0x01
++
++/* inserted device description, describes an inserted card */
++typedef struct _SDDEVICE {
++ SDLIST SDList; /* internal use list*/
++ SDLIST FuncListLink; /* internal use list */
++ /* read/write request function */
++ SDIO_STATUS (*pRequest)(struct _SDDEVICE *pDev, PSDREQUEST req);
++ /* get/set configuration */
++ SDIO_STATUS (*pConfigure)(struct _SDDEVICE *pDev, PSDCONFIG config);
++ PSDREQUEST (*AllocRequest)(struct _SDDEVICE *pDev); /* allocate a request */
++ void (*FreeRequest)(struct _SDDEVICE *pDev, PSDREQUEST pReq); /* free the request */
++ void (*pIrqFunction)(PVOID pContext); /* interrupt routine, synchronous calls allowed */
++ void (*pIrqAsyncFunction)(PVOID pContext); /* async IRQ function , asynch only calls */
++ PVOID IrqContext; /* irq context */
++ PVOID IrqAsyncContext; /* irq async context */
++ PSDFUNCTION pFunction; /* function driver supporting this device */
++ struct _SDHCD *pHcd; /* host controller this device is on (internal use) */
++ SDDEVICE_INFO DeviceInfo; /* device info */
++ SD_PNP_INFO pId[1]; /* id of this device */
++ OS_PNPDEVICE Device; /* device registration with base system */
++ SD_SLOT_CURRENT SlotCurrentAlloc; /* allocated slot current for this device/function (internal use) */
++ SD_DEVICE_FLAGS Flags; /* internal use flags */
++ CT_VERSION_CODE Version; /* version code of the bus driver */
++}SDDEVICE, *PSDDEVICE;
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get SDIO Bus Driver Version Major number
++
++ @function name: SDDEVICE_GET_VERSION_MAJOR
++ @prototype: INT SDDEVICE_GET_VERSION_MAJOR(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: integer value for the major version
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_GET_VERSION_MINOR
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_VERSION_MAJOR(pDev) (GET_SDIO_STACK_VERSION_MAJOR(pDev))
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get SDIO Bus Driver Version Minor number
++
++ @function name: SDDEVICE_GET_VERSION_MINOR
++ @prototype: INT SDDEVICE_GET_VERSION_MINOR(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: integer value for the minor version
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_GET_VERSION_MAJOR
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_VERSION_MINOR(pDev) (GET_SDIO_STACK_VERSION_MINOR(pDev))
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Test the SDIO revision for greater than or equal to 1.10
++
++ @function name: SDDEVICE_IS_SDIO_REV_GTEQ_1_10
++ @prototype: BOOL SDDEVICE_IS_SDIO_REV_GTEQ_1_10(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: TRUE if the revision is greater than or equal to 1.10
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_IS_SD_REV_GTEQ_1_10
++ @see also: SDDEVICE_IS_MMC_REV_GTEQ_4_0
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_IS_SDIO_REV_GTEQ_1_10(pDev) ((pDev)->pHcd->CardProperties.SDIORevision >= SDIO_REVISION_1_10)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Test the SDIO revision for greater than or equal to 1.20
++
++ @function name: SDDEVICE_IS_SDIO_REV_GTEQ_1_20
++ @prototype: BOOL SDDEVICE_IS_SDIO_REV_GTEQ_1_20(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: TRUE if the revision is greater than or equal to 1.20
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_IS_SD_REV_GTEQ_1_10
++ @see also: SDDEVICE_IS_SDIO_REV_GTEQ_1_10
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_IS_SDIO_REV_GTEQ_1_20(pDev) ((pDev)->pHcd->CardProperties.SDIORevision >= SDIO_REVISION_1_20)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Test the SD revision for greater than or equal to 1.10
++
++ @function name: SDDEVICE_IS_SD_REV_GTEQ_1_10
++ @prototype: BOOL SDDEVICE_IS_SD_REV_GTEQ_1_10(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: TRUE if the revision is greater than or equal to 1.10
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_IS_SDIO_REV_GTEQ_1_10
++ @see also: SDDEVICE_IS_MMC_REV_GTEQ_4_0
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_IS_SD_REV_GTEQ_1_10(pDev) ((pDev)->pHcd->CardProperties.SD_MMC_Revision >= SD_REVISION_1_10)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Test the MMC revision for greater than or equal to 4.0
++
++ @function name: SDDEVICE_IS_MMC_REV_GTEQ_4_0
++ @prototype: BOOL SDDEVICE_IS_MMC_REV_GTEQ_4_0(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: TRUE if the revision is greater than or equal to 4.0
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_IS_SDIO_REV_GTEQ_1_10
++ @see also: SDDEVICE_IS_SD_REV_GTEQ_1_10
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_IS_MMC_REV_GTEQ_4_0(pDev) ((pDev)->pHcd->CardProperties.SD_MMC_Revision >= MMC_REVISION_4_0)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Test for write protect enabled
++
++ @function name: SDDEVICE_IS_CARD_WP_ON
++ @prototype: BOOL SDDEVICE_IS_CARD_WP_ON(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: TRUE if device is write protected.
++
++ @notes: Implemented as a macro.
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_IS_CARD_WP_ON(pDev) ((pDev)->pHcd->CardProperties.Flags & CARD_SD_WP)
++
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the device's manufacturer specific ID
++
++ @function name: SDDEVICE_GET_SDIO_MANFID
++ @prototype: UINT16 SDDEVICE_GET_SDIO_MANFID(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: function number
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_GET_SDIO_MANFCODE
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_MANFID(pDev) (pDev)->pId[0].SDIO_ManufacturerID
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the device's manufacturer code
++
++ @function name: SDDEVICE_GET_SDIO_MANFCODE
++ @prototype: UINT16 SDDEVICE_GET_SDIO_MANFCODE(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: function number
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_GET_SDIO_MANFID
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_MANFCODE(pDev) (pDev)->pId[0].SDIO_ManufacturerCode
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the device's function number
++
++ @function name: SDDEVICE_GET_SDIO_FUNCNO
++ @prototype: UINT8 SDDEVICE_GET_SDIO_FUNCNO(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: function number
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_GET_SDIO_FUNC_CLASS
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_FUNCNO(pDev) (pDev)->pId[0].SDIO_FunctionNo
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the functions's class
++
++ @function name: SDDEVICE_GET_SDIO_FUNC_CLASS
++ @prototype: UINT8 SDDEVICE_GET_SDIO_FUNC_CLASS(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: class number
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_GET_SDIO_FUNCNO
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_FUNC_CLASS(pDev) (pDev)->pId[0].SDIO_FunctionClass
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the functions's Card Information Structure pointer
++
++ @function name: SDDEVICE_GET_SDIO_FUNC_CISPTR
++ @prototype: UINT32 SDDEVICE_GET_SDIO_FUNC_CISPTR(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: CIS offset
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_GET_SDIO_FUNC_CSAPTR
++ @see also: SDDEVICE_GET_SDIO_COMMON_CISPTR
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_FUNC_CISPTR(pDev)(pDev)->DeviceInfo.AsSDIOInfo.FunctionCISPtr
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the functions's Code Stoarge Area pointer
++
++ @function name: SDDEVICE_GET_SDIO_FUNC_CSAPTR
++ @prototype: UINT32 SDDEVICE_GET_SDIO_FUNC_CSAPTR(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: CSA offset
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_GET_SDIO_FUNC_CISPTR
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_FUNC_CSAPTR(pDev)(pDev)->DeviceInfo.AsSDIOInfo.FunctionCSAPtr
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the functions's maximum reported block size
++
++ @function name: SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE
++ @prototype: UINT16 SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: block size
++
++ @notes: Implemented as a macro.
++
++ @see also:
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE(pDev) (pDev)->DeviceInfo.AsSDIOInfo.FunctionMaxBlockSize
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the common Card Information Structure pointer
++
++ @function name: SDDEVICE_GET_SDIO_COMMON_CISPTR
++ @prototype: UINT32 SDDEVICE_GET_SDIO_COMMON_CISPTR(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: Common CIS Address (in SDIO address space)
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_GET_SDIO_FUNC_CSAPTR
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_COMMON_CISPTR(pDev) (pDev)->pHcd->CardProperties.CommonCISPtr
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the card capabilities
++
++ @function name: SDDEVICE_GET_SDIO_CARD_CAPS
++ @prototype: UINT8 SDDEVICE_GET_SDIO_CARD_CAPS(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: 8-bit card capabilities register
++
++ @notes: Implemented as a macro. Refer to SDIO spec for decoding.
++
++ @see also: SDDEVICE_GET_CARD_FLAGS
++ @see also: SDDEVICE_GET_SDIOCARD_CAPS
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_CARD_CAPS(pDev) (pDev)->pHcd->CardProperties.SDIOCaps
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the card flags
++
++ @function name: SDDEVICE_GET_CARD_FLAGS
++ @prototype: CARD_INFO_FLAGS SDDEVICE_GET_CARD_FLAGS(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: flags
++
++ @notes: Implemented as a macro.
++
++ @example: Get card type:
++ CARD_INFO_FLAGS flags;
++ flags = SDDEVICE_GET_CARD_FLAGS(pDevice);
++ switch(GET_CARD_TYPE(flags)) {
++ case CARD_MMC: // Multi-media card
++ ...
++ case CARD_SD: // SD-Memory present
++ ...
++ case CARD_SDIO: // SDIO card present
++ ...
++ case CARD_COMBO: //SDIO card with SD
++ ...
++ }
++ if (flags & CARD_SD_WP) {
++ ...SD write protect on
++ }
++
++ @see also: SDDEVICE_GET_SDIO_CARD_CAPS
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_CARD_FLAGS(pDev) (pDev)->pHcd->CardProperties.Flags
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the Relative Card Address register
++
++ @function name: SDDEVICE_GET_CARD_RCA
++ @prototype: UINT16 SDDEVICE_GET_CARD_RCA(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: register address
++
++ @notes: Implemented as a macro. Refer to SDIO spec for decoding.
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_CARD_RCA(pDev) (pDev)->pHcd->CardProperties.RCA
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get operational bus clock
++
++ @function name: SDDEVICE_GET_OPER_CLOCK
++ @prototype: SD_BUSCLOCK_RATE SDDEVICE_GET_OPER_CLOCK(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: clock rate
++
++ @notes: Implemented as a macro. Returns the current bus clock rate.
++ This may be lower than reported by the card due to Host Controller,
++ Bus driver, or power management limitations.
++
++ @see also: SDDEVICE_GET_MAX_CLOCK
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_OPER_CLOCK(pDev) (pDev)->pHcd->CardProperties.OperBusClock
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get maximum bus clock
++
++ @function name: SDDEVICE_GET_MAX_CLOCK
++ @prototype: SD_BUSCLOCK_RATE SDDEVICE_GET_MAX_CLOCK(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: clock rate
++
++ @notes: To obtain the current maximum clock rate use SDDEVICE_GET_OPER_CLOCK().
++ This rate my be lower than the host controllers maximum obtained using
++ SDDEVICE_GET_MAX_CLOCK().
++
++ @see also: SDDEVICE_GET_OPER_CLOCK
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_MAX_CLOCK(pDev) (pDev)->pHcd->MaxClockRate
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get operational maximum block length.
++
++ @function name: SDDEVICE_GET_OPER_BLOCK_LEN
++ @prototype: UINT16 SDDEVICE_GET_OPER_BLOCK_LEN(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: block size in bytes
++
++ @notes: Implemented as a macro. Returns the maximum current block length.
++ This may be lower than reported by the card due to Host Controller,
++ Bus driver, or power management limitations.
++
++ @see also: SDDEVICE_GET_MAX_BLOCK_LEN
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_OPER_BLOCK_LEN(pDev) (pDev)->pHcd->CardProperties.OperBlockLenLimit
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get maximum block length.
++
++ @function name: SDDEVICE_GET_MAX_BLOCK_LEN
++ @prototype: UINT16 SDDEVICE_GET_MAX_BLOCK_LEN(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: block size in bytes
++
++ @notes: Implemented as a macro. Use SDDEVICE_GET_OPER_BLOCK_LEN to obtain
++ the current block length.
++
++ @see also: SDDEVICE_GET_OPER_BLOCK_LEN
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_MAX_BLOCK_LEN(pDev) (pDev)->pHcd->MaxBytesPerBlock
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get operational maximum block count.
++
++ @function name: SDDEVICE_GET_OPER_BLOCKS
++ @prototype: UINT16 SDDEVICE_GET_OPER_BLOCKS(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: maximum number of blocks per transaction.
++
++ @notes: Implemented as a macro. Returns the maximum current block count.
++ This may be lower than reported by the card due to Host Controller,
++ Bus driver, or power management limitations.
++
++ @see also: SDDEVICE_GET_MAX_BLOCK_LEN
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_OPER_BLOCKS(pDev) (pDev)->pHcd->CardProperties.OperBlockCountLimit
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get maximum block count.
++
++ @function name: SDDEVICE_GET_MAX_BLOCKS
++ @prototype: UINT16 SDDEVICE_GET_MAX_BLOCKS(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: maximum number of blocks per transaction.
++
++ @notes: Implemented as a macro. Use SDDEVICE_GET_OPER_BLOCKS to obtain
++ the current block count.
++
++ @see also: SDDEVICE_GET_OPER_BLOCKS
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_MAX_BLOCKS(pDev) (pDev)->pHcd->MaxBlocksPerTrans
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get applied slot voltage
++
++ @function name: SDDEVICE_GET_SLOT_VOLTAGE_MASK
++ @prototype: SLOT_VOLTAGE_MASK SDDEVICE_GET_SLOT_VOLTAGE_MASK(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: slot voltage mask
++
++ @notes: This function returns the applied voltage on the slot. The voltage value is a
++ mask having the following values:
++ SLOT_POWER_3_3V
++ SLOT_POWER_3_0V
++ SLOT_POWER_2_8V
++ SLOT_POWER_2_0V
++ SLOT_POWER_1_8V
++ SLOT_POWER_1_6V
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SLOT_VOLTAGE_MASK(pDev) (pDev)->pHcd->CardProperties.CardVoltage
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the Card Specific Data Register.
++
++ @function name: SDDEVICE_GET_CARDCSD
++ @prototype: PUINT8 SDDEVICE_GET_CARDCSD(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: UINT8 CardCSD[MAX_CARD_RESPONSE_BYTES] array of CSD data.
++
++ @notes: Implemented as a macro.
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_CARDCSD(pDev) (pDev)->pHcd->CardProperties.CardCSD
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the bus mode flags
++
++ @function name: SDDEVICE_GET_BUSMODE_FLAGS
++ @prototype: SD_BUSMODE_FLAGS SDDEVICE_GET_BUSMODE_FLAGS(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return:
++
++ @notes: Implemented as a macro. This function returns the raw bus mode flags. This
++ is useful for function drivers that wish to override the bus clock without
++ modifying the current bus mode.
++
++ @see also: SDDEVICE_GET_BUSWIDTH
++ @see also: SDCONFIG_BUS_MODE_CTRL
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_BUSMODE_FLAGS(pDev) (pDev)->pHcd->CardProperties.BusMode
++
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the bus width.
++
++ @function name: SDDEVICE_GET_BUSWIDTH
++ @prototype: UINT8 SDDEVICE_GET_BUSWIDTH(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: bus width: SDCONFIG_BUS_WIDTH_SPI, SDCONFIG_BUS_WIDTH_1_BIT, SDCONFIG_BUS_WIDTH_4_BIT
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_IS_BUSMODE_SPI
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_BUSWIDTH(pDev) SDCONFIG_GET_BUSWIDTH((pDev)->pHcd->CardProperties.BusMode)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Is bus in SPI mode.
++
++ @function name: SDDEVICE_IS_BUSMODE_SPI
++ @prototype: BOOL SDDEVICE_IS_BUSMODE_SPI(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: TRUE, SPI mode.
++
++ @notes: Implemented as a macro.
++
++ @see also: SDDEVICE_GET_BUSWIDTH
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_IS_BUSMODE_SPI(pDev) (SDDEVICE_GET_BUSWIDTH(pDev) == SDCONFIG_BUS_WIDTH_SPI)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Send a request to a device.
++
++ @function name: SDDEVICE_CALL_REQUEST_FUNC
++ @prototype: SDIO_STATUS SDDEVICE_CALL_REQUEST_FUNC(PSDDEVICE pDevice, PSDREQUEST pRequest)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++ @input: pRequest - the request to be sent
++
++ @output: none
++
++ @return: SDIO_STATUS
++
++ @notes: Sends a request to the specified device. If the request is successfully sent, then
++ the response flags can be checked to detemine the result of the request.
++
++ @example: Example of sending a request to a device:
++ PSDREQUEST pReq = NULL;
++ //allocate a request
++ pReq = SDDeviceAllocRequest(pDevice);
++ if (NULL == pReq) {
++ return SDIO_STATUS_NO_RESOURCES;
++ }
++ //initialize the request
++ SDLIB_SetupCMD52Request(FuncNo, Address, Write, *pData, pReq);
++ //send the request to the target
++ status = SDDEVICE_CALL_REQUEST_FUNC(pDevice,pReq);
++ if (!SDIO_SUCCESS(status)) {
++ break;
++ }
++ //check the request response (based on the request type)
++ if (SD_R5_GET_RESP_FLAGS(pReq->Response) & SD_R5_ERRORS) {
++ ...
++ }
++ if (!Write) {
++ // store the byte
++ *pData = SD_R5_GET_READ_DATA(pReq->Response);
++ }
++ //free the request
++ SDDeviceFreeRequest(pDevice,pReq);
++ ...
++
++ @see also: SDDeviceAllocRequest
++ @see also: SDDEVICE_CALL_CONFIG_FUNC
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_CALL_REQUEST_FUNC(pDev,pReq) (pDev)->pRequest((pDev),(pReq))
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Send configuration to a device.
++
++ @function name: SDDEVICE_CALL_CONFIG_FUNC
++ @prototype: SDIO_STATUS SDDEVICE_CALL_CONFIG_FUNC(PSDDEVICE pDevice, PSDCONFIG pConfigure)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++ @input: pConfigure - configuration request
++
++ @output: none
++
++ @return: SDIO_STATUS
++
++ @notes: Sends a configuration request to the specified device.
++
++ @example: Example of sending a request to a device:
++ SDCONFIG configHdr;
++ SDCONFIG_FUNC_ENABLE_DISABLE_DATA fData;
++ fData.EnableFlags = SDCONFIG_ENABLE_FUNC;
++ fData.TimeOut = 500;
++ SET_SDCONFIG_CMD_INFO(&configHdr, SDCONFIG_FUNC_ENABLE_DISABLE, fData, sizeof(fData));
++ return SDDEVICE_CALL_CONFIG_FUNC(pDevice, &configHdr);
++
++ @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_CALL_CONFIG_FUNC(pDev,pCfg) (pDev)->pConfigure((pDev),(pCfg))
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Allocate a request structure.
++
++ @function name: SDDeviceAllocRequest
++ @prototype: PSDREQUEST SDDeviceAllocRequest(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: request pointer or NULL if not available.
++
++ @notes: This function must not be called in a non-schedulable (interrupts off) context.
++ Allocating memory on some OSes may block.
++
++ @see also: SDDEVICE_CALL_REQUEST_FUNC
++ @see also: SDDeviceFreeRequest
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDeviceAllocRequest(pDev) (pDev)->AllocRequest((pDev))
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Free a request structure.
++
++ @function name: SDDeviceFreeRequest
++ @prototype: void SDDeviceFreeRequest(PSDDEVICE pDevice, PSDREQUEST pRequest)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++ @input: pRequest - request allocated by SDDeviceAllocRequest().
++
++ @output: none
++
++ @return: none
++
++ @notes: This function must not be called in a non-schedulable (interrupts off) context.
++ Freeing memory on some OSes may block.
++
++ @see also: SDDEVICE_CALL_REQUEST_FUNC
++ @see also: SDDeviceAllocRequest
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDeviceFreeRequest(pDev,pReq) (pDev)->FreeRequest((pDev),pReq)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Register an interrupt handler for a device.
++
++ @function name: SDDEVICE_SET_IRQ_HANDLER
++ @prototype: void SDDEVICE_SET_IRQ_HANDLER(PSDDEVICE pDevice,
++ void (*pIrqFunction)(PVOID pContext),
++ PVOID pContext)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++ @input: pIrqFunction - the interrupt function to execute.
++ @input: pContext - context value passed into interrupt routine.
++
++ @output: none
++
++ @return: none
++
++ @notes: The registered routine will be called upon each card interrupt.
++ The interrupt function should acknowledge the interrupt when it is
++ ready to handle more interrupts using:
++ SDLIB_IssueConfig(pDevice, SDCONFIG_FUNC_ACK_IRQ, NULL, 0);
++ The interrupt handler can perform synchronous request calls.
++
++ @see also: SDDEVICE_SET_ASYNC_IRQ_HANDLER
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_SET_IRQ_HANDLER(pDev,pFn,pContext) \
++{ \
++ (pDev)->pIrqFunction = (pFn); \
++ (pDev)->IrqContext = (PVOID)(pContext); \
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Register an asynchronous interrupt handler for a device.
++
++ @function name: SDDEVICE_SET_ASYNC_IRQ_HANDLER
++ @prototype: void SDDEVICE_SET_ASYNC_IRQ_HANDLER(PSDDEVICE pDevice,
++ void (*pIrqAsyncFunction)(PVOID pContext),
++ PVOID pContext)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++ @input: pIrqAsyncFunction - the interrupt function to execute.
++ @input: pContext - context value passed into interrupt routine.
++
++ @output: none
++
++ @return: none
++
++ @notes: The registered routine will be called upon each card interrupt.
++ The interrupt function should acknowledge the interrupt when it is
++ ready to handle more interrupts using:
++ SDLIB_IssueConfig(pDevice, SDCONFIG_FUNC_ACK_IRQ, NULL, 0);
++ The interrupt handler can not perform any synchronous request calls.
++ Using this call provides a faster interrupt dispatch, but limits all
++ requests to asynchronous mode.
++
++ @see also: SDDEVICE_SET_IRQ_HANDLER
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_SET_ASYNC_IRQ_HANDLER(pDev,pFn,pContext) \
++{ \
++ (pDev)->pIrqAsyncFunction = (pFn); \
++ (pDev)->IrqAsyncContext = (PVOID)(pContext); \
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the SDIO capabilities rgeister.
++
++ @function name: SDDEVICE_GET_SDIOCARD_CAPS
++ @prototype: UINT8 SDDEVICE_GET_SDIOCARD_CAPS(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: SD capabilities
++
++ @notes: See SD specification for decoding of these capabilities.
++
++ @see also: SDDEVICE_GET_SDIO_CARD_CAPS
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIOCARD_CAPS(pDev) (pDev)->pHcd->CardProperties.SDIOCaps
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get HCD driver name
++
++ @function name: SDDEVICE_GET_HCDNAME
++ @prototype: PTEXT SDDEVICE_GET_HCDNAME(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the target device for this request
++
++ @output: none
++
++ @return: pointer to a string containing the name of the underlying HCD
++
++ @notes: Implemented as a macro.
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_HCDNAME(pDev) (pDev)->pHcd->pName
++
++
++#define SDDEVICE_CALL_IRQ_HANDLER(pDev) (pDev)->pIrqFunction((pDev)->IrqContext)
++#define SDDEVICE_CALL_IRQ_ASYNC_HANDLER(pDev) (pDev)->pIrqAsyncFunction((pDev)->IrqAsyncContext)
++
++
++#define SDDEVICE_SET_SDIO_FUNCNO(pDev,Num) (pDev)->pId[0].SDIO_FunctionNo = (Num)
++#define SDDEVICE_IS_CARD_REMOVED(pDev) ((pDev)->pHcd->CardProperties.CardState & \
++ CARD_STATE_REMOVED)
++
++
++typedef enum _SDHCD_IRQ_PROC_STATE {
++ SDHCD_IDLE = 0,
++ SDHCD_IRQ_PENDING = 1,
++ SDHCD_IRQ_HELPER = 2
++}SDHCD_IRQ_PROC_STATE, *PSDHCD_IRQ_PROC_STATE;
++
++/* host controller bus driver registration structure */
++typedef struct _SDHCD {
++ CT_VERSION_CODE Version; /* version code of the SDIO stack */
++ SDLIST SDList; /* internal use list*/
++ PTEXT pName; /* name of registering host/slot driver */
++ UINT32 Attributes; /* attributes of host controller */
++ UINT16 MaxBytesPerBlock; /* max bytes per block */
++ UINT16 MaxBlocksPerTrans; /* max blocks per transaction */
++ SD_SLOT_CURRENT MaxSlotCurrent; /* max current per slot in milli-amps */
++ UINT8 SlotNumber; /* sequential slot number for this HCD, set by bus driver */
++ SD_BUSCLOCK_RATE MaxClockRate; /* max clock rate in hz */
++ SLOT_VOLTAGE_MASK SlotVoltageCaps; /* slot voltage capabilities */
++ SLOT_VOLTAGE_MASK SlotVoltagePreferred; /* preferred slot voltage */
++ PVOID pContext; /* host controller driver use data */
++ SDIO_STATUS (*pRequest)(struct _SDHCD *pHcd);
++ /* get/set configuration */
++ SDIO_STATUS (*pConfigure)(struct _SDHCD *pHcd, PSDCONFIG pConfig);
++ /* everything below this line is for bus driver use */
++ OS_SEMAPHORE ConfigureOpsSem; /* semaphore to make specific configure ops atomic, internal use */
++ OS_CRITICALSECTION HcdCritSection; /* critical section to protect hcd data structures (internal use) */
++ SDREQUESTQUEUE RequestQueue; /* request queue, internal use */
++ PSDREQUEST pCurrentRequest; /* current request we are working on */
++ CARD_PROPERTIES CardProperties; /* properties for the currently inserted card*/
++ OSKERNEL_HELPER SDIOIrqHelper; /* synch IRQ helper, internal use */
++ SDDEVICE *pPseudoDev; /* pseudo device used for initialization (internal use) */
++ UINT8 PendingHelperIrqs; /* IRQ helper pending IRQs */
++ UINT8 PendingIrqAcks; /* pending IRQ acks from function drivers */
++ UINT8 IrqsEnabled; /* current irq enabled mask */
++ SDHCD_IRQ_PROC_STATE IrqProcState; /* irq processing state */
++ POS_DEVICE pDevice; /* device registration with base system */
++ SD_SLOT_CURRENT SlotCurrentAllocated; /* slot current allocated (internal use ) */
++ ATOMIC_FLAGS HcdFlags; /* HCD Flags */
++#define HCD_REQUEST_CALL_BIT 0
++#define HCD_IRQ_NO_PEND_CHECK 1 /* HCD flag to bypass interrupt pending register
++ check, typically done on single function cards */
++ SDREQUESTQUEUE CompletedRequestQueue; /* completed request queue, internal use */
++ PSDDMA_DESCRIPTION pDmaDescription; /* description of HCD's DMA capabilities */
++ POS_MODULE pModule; /* OS-specific module information */
++ INT Recursion; /* recursion level */
++ PVOID Reserved1;
++ PVOID Reserved2;
++}SDHCD, *PSDHCD;
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get a pointer to the HCD's DMA description
++
++ @function name: SDGET_DMA_DESCRIPTION
++ @prototype: PSDDMA_DESCRIPTION SDGET_DMA_DESCRIPTION(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - device structure
++
++ @return: PSDDMA_DESCRIPTION or NULL if no DMA support
++
++ @notes: Implemented as a macro.
++
++ @example: getting the current request:
++ PSDDMA_DESCRIPTION pDmaDescrp = SDGET_DMA_DESCRIPTION(pDevice);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDGET_DMA_DESCRIPTION(pDevice) (pDevice)->pHcd->pDmaDescription
++
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get the logical slot number the device is assigned to.
++
++ @function name: SDDEVICE_GET_SLOT_NUMBER
++ @prototype: UINT8 SDDEVICE_GET_SLOT_NUMBER(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - device structure
++
++ @return: unsigned number representing the slot number
++
++ @notes: Implemented as a macro. This value is unique for each physical slot in the system
++ and assigned by the bus driver. Devices on a multi-function card will share the same
++ slot number.
++
++ @example: getting the slot number:
++ UINT8 thisSlot = SDDEVICE_GET_SLOT_NUMBER(pDevice);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SLOT_NUMBER(pDevice) (pDevice)->pHcd->SlotNumber
++
++/* for function use */
++SDIO_STATUS SDIO_RegisterFunction(PSDFUNCTION pFunction);
++SDIO_STATUS SDIO_UnregisterFunction(PSDFUNCTION pFunction);
++
++#include "sdio_hcd_defs.h"
++#endif /* __SDIO_BUSDRIVER_H___ */
+Index: linux-2.6.24.7/include/linux/sdio/_sdio_defs.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/sdio/_sdio_defs.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,638 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: _sdio_defs.h
++
++@abstract: SD/SDIO definitions
++
++@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef ___SDIO_DEFS_H___
++#define ___SDIO_DEFS_H___
++
++#define SD_INIT_BUS_CLOCK 100000 /* initialization clock in hz */
++#define SPI_INIT_BUS_CLOCK 100000 /* initialization clock in hz */
++#define SD_MAX_BUS_CLOCK 25000000 /* max clock speed in hz */
++#define SD_HS_MAX_BUS_CLOCK 50000000 /* SD high speed max clock speed in hz */
++#define SDIO_LOW_SPEED_MAX_BUS_CLOCK 400000 /* max low speed clock in hz */
++#define SDMMC_MIN_INIT_CLOCKS 80 /* minimun number of initialization clocks */
++#define SDIO_EMPC_CURRENT_THRESHOLD 300 /* SDIO 1.10 , EMPC (mA) threshold, we add some overhead */
++
++/* commands */
++#define CMD0 0
++#define CMD1 1
++#define CMD2 2
++#define CMD3 3
++#define CMD4 4
++#define CMD5 5
++#define CMD6 6
++#define CMD7 7
++#define CMD9 9
++#define CMD10 10
++#define CMD12 12
++#define CMD13 13
++#define CMD15 15
++#define CMD16 16
++#define CMD17 17
++#define CMD18 18
++#define CMD24 24
++#define CMD25 25
++#define CMD27 27
++#define CMD28 28
++#define CMD29 29
++#define CMD30 30
++#define CMD32 32
++#define CMD33 33
++#define CMD38 38
++#define CMD42 42
++#define CMD52 52
++#define CMD53 53
++#define CMD55 55
++#define CMD56 56
++#define CMD58 58
++#define CMD59 59
++#define ACMD6 6
++#define ACMD13 13
++#define ACMD22 22
++#define ACMD23 23
++#define ACMD41 41
++#define ACMD42 42
++#define ACMD51 51
++
++#define SD_ACMD6_BUS_WIDTH_1_BIT 0x00
++#define SD_ACMD6_BUS_WIDTH_4_BIT 0x02
++
++#define SD_CMD59_CRC_OFF 0x00000000
++#define SD_CMD59_CRC_ON 0x00000001
++
++/* SD/SPI max response size */
++#define SD_MAX_CMD_RESPONSE_BYTES SD_R2_RESPONSE_BYTES
++
++#define SD_R1_RESPONSE_BYTES 6
++#define SD_R1B_RESPONSE_BYTES SD_R1_RESPONSE_BYTES
++#define SD_R1_GET_CMD(pR) ((pR)[5] & 0xC0))
++#define SD_R1_SET_CMD(pR,cmd) (pR)[5] = (cmd) & 0xC0
++#define SD_R1_GET_CARD_STATUS(pR) (((UINT32)((pR)[1])) | \
++ (((UINT32)((pR)[2])) << 8) | \
++ (((UINT32)((pR)[3])) << 16) | \
++ (((UINT32)((pR)[4])) << 24) )
++#define SD_R1_SET_CMD_STATUS(pR,status) \
++{ \
++ (pR)[1] = (UINT8)(status); \
++ (pR)[2] = (UINT8)((status) >> 8); \
++ (pR)[3] = (UINT8)((status) >> 16); \
++ (pR)[4] = (UINT8)((status) >> 24); \
++}
++
++/* SD R1 card status bit masks */
++#define SD_CS_CMD_OUT_OF_RANGE ((UINT32)(1 << 31))
++#define SD_CS_ADDRESS_ERR (1 << 30)
++#define SD_CS_BLK_LEN_ERR (1 << 29)
++#define SD_CS_ERASE_SEQ_ERR (1 << 28)
++#define SD_CS_ERASE_PARAM_ERR (1 << 27)
++#define SD_CS_WP_ERR (1 << 26)
++#define SD_CS_CARD_LOCKED (1 << 25)
++#define SD_CS_LK_UNLK_FAILED (1 << 24)
++#define SD_CS_PREV_CMD_CRC_ERR (1 << 23)
++#define SD_CS_ILLEGAL_CMD_ERR (1 << 22)
++#define SD_CS_ECC_FAILED (1 << 21)
++#define SD_CS_CARD_INTERNAL_ERR (1 << 20)
++#define SD_CS_GENERAL_ERR (1 << 19)
++#define SD_CS_CSD_OVERWR_ERR (1 << 16)
++#define SD_CS_WP_ERASE_SKIP (1 << 15)
++#define SD_CS_ECC_DISABLED (1 << 14)
++#define SD_CS_ERASE_RESET (1 << 13)
++#define SD_CS_GET_STATE(status) (((status) >> 9) & 0x0f)
++#define SD_CS_SET_STATE(status, state) \
++{ \
++ (status) &= ~(0x0F << 9); \
++ (status) |= (state) << 9 \
++}
++
++#define SD_CS_TRANSFER_ERRORS \
++ ( SD_CS_ADDRESS_ERR | \
++ SD_CS_BLK_LEN_ERR | \
++ SD_CS_ERASE_SEQ_ERR | \
++ SD_CS_ERASE_PARAM_ERR | \
++ SD_CS_WP_ERR | \
++ SD_CS_ECC_FAILED | \
++ SD_CS_CARD_INTERNAL_ERR | \
++ SD_CS_GENERAL_ERR )
++
++#define SD_CS_STATE_IDLE 0
++#define SD_CS_STATE_READY 1
++#define SD_CS_STATE_IDENT 2
++#define SD_CS_STATE_STBY 3
++#define SD_CS_STATE_TRANS 4
++#define SD_CS_STATE_DATA 5
++#define SD_CS_STATE_RCV 6
++#define SD_CS_STATE_PRG 7
++#define SD_CS_STATE_DIS 8
++#define SD_CS_READY_FOR_DATA (1 << 8)
++#define SD_CS_APP_CMD (1 << 5)
++#define SD_CS_AKE_SEQ_ERR (1 << 3)
++
++/* SD R2 response */
++#define SD_R2_RESPONSE_BYTES 17
++#define MAX_CSD_CID_BYTES 16
++#define SD_R2_SET_STUFF_BITS(pR) (pR)[16] = 0x3F
++#define GET_SD_CSD_TRANS_SPEED(pR) (pR)[12]
++#define GET_SD_CID_MANFID(pR) (pR)[15]
++#define GET_SD_CID_PN_1(pR) (pR)[12]
++#define GET_SD_CID_PN_2(pR) (pR)[11]
++#define GET_SD_CID_PN_3(pR) (pR)[10]
++#define GET_SD_CID_PN_4(pR) (pR)[9]
++#define GET_SD_CID_PN_5(pR) (pR)[8]
++#define GET_SD_CID_PN_6(pR) (pR)[7]
++
++#define GET_SD_CID_OEMID(pR) ((((UINT16)(pR)[14]) << 8 )| (UINT16)((pR)[13]))
++#define SDMMC_OCR_VOLTAGE_MASK 0x7FFFFFFF
++/* SD R3 response */
++#define SD_R3_RESPONSE_BYTES 6
++#define SD_R3_GET_OCR(pR) ((((UINT32)((pR)[1])) | \
++ (((UINT32)((pR)[2])) << 8) | \
++ (((UINT32)((pR)[3])) << 16) | \
++ (((UINT32)((pR)[4])) << 24)) & SDMMC_OCR_VOLTAGE_MASK)
++#define SD_R3_IS_CARD_READY(pR) (((pR)[4] & 0x80) == 0x80)
++
++/* OCR bit definitions */
++#define SD_OCR_CARD_PWR_UP_STATUS ((UINT32)(1 << 31))
++#define SD_OCR_3_5_TO_3_6_VDD (1 << 23)
++#define SD_OCR_3_4_TO_3_5_VDD (1 << 22)
++#define SD_OCR_3_3_TO_3_4_VDD (1 << 21)
++#define SD_OCR_3_2_TO_3_3_VDD (1 << 20)
++#define SD_OCR_3_1_TO_3_2_VDD (1 << 19)
++#define SD_OCR_3_0_TO_3_1_VDD (1 << 18)
++#define SD_OCR_2_9_TO_3_0_VDD (1 << 17)
++#define SD_OCR_2_8_TO_2_9_VDD (1 << 16)
++#define SD_OCR_2_7_TO_2_8_VDD (1 << 15)
++#define SD_OCR_2_6_TO_2_7_VDD (1 << 14)
++#define SD_OCR_2_5_TO_2_6_VDD (1 << 13)
++#define SD_OCR_2_4_TO_2_5_VDD (1 << 12)
++#define SD_OCR_2_3_TO_2_4_VDD (1 << 11)
++#define SD_OCR_2_2_TO_2_3_VDD (1 << 10)
++#define SD_OCR_2_1_TO_2_2_VDD (1 << 9)
++#define SD_OCR_2_0_TO_2_1_VDD (1 << 8)
++#define SD_OCR_1_9_TO_2_0_VDD (1 << 7)
++#define SD_OCR_1_8_TO_1_9_VDD (1 << 6)
++#define SD_OCR_1_7_TO_1_8_VDD (1 << 5)
++#define SD_OCR_1_6_TO_1_7_VDD (1 << 4)
++
++/* SD Status data block */
++#define SD_STATUS_DATA_BYTES 64
++#define SDS_GET_DATA_WIDTH(buffer) ((buffer)[0] & 0xC0)
++#define SDS_BUS_1_BIT 0x00
++#define SDS_BUS_4_BIT 0x80
++#define SDS_GET_SECURE_MODE(buffer) ((buffer)[0] & 0x20)
++#define SDS_CARD_SECURE_MODE 0x20
++#define SDS_GET_CARD_TYPE(buffer) ((buffer)[60] & 0x0F)
++#define SDS_SD_CARD_RW 0x00
++#define SDS_SD_CARD_ROM 0x01
++
++/* SD R6 response */
++#define SD_R6_RESPONSE_BYTES 6
++#define SD_R6_GET_RCA(pR) ((UINT16)((pR)[3]) | (((UINT16)((pR)[4])) << 8))
++#define SD_R6_GET_CS(pR) ((UINT16)((pR)[1]) | (((UINT16)((pR)[2])) << 8))
++
++/* SD Configuration Register (SCR) */
++#define SD_SCR_BYTES 8
++#define SCR_REV_1_0 0x00
++#define SCR_SD_SPEC_1_00 0x00
++#define SCR_SD_SPEC_1_10 0x01
++#define SCR_BUS_SUPPORTS_1_BIT 0x01
++#define SCR_BUS_SUPPORTS_4_BIT 0x04
++#define SCR_SD_SECURITY_MASK 0x70
++#define SCR_SD_NO_SECURITY 0x00
++#define SCR_SD_SECURITY_1_0 0x10
++#define SCR_SD_SECURITY_2_0 0x20
++#define SCR_DATA_STATUS_1_AFTER_ERASE 0x80
++
++#define GET_SD_SCR_STRUCT_VER(pB) ((pB)[7] >> 4)
++#define GET_SD_SCR_SDSPEC_VER(pB) ((pB)[7] & 0x0F)
++#define GET_SD_SCR_BUSWIDTHS(pB) ((pB)[6] & 0x0F)
++#define GET_SD_SCR_BUSWIDTHS_FLAGS(pB) (pB)[6]
++#define GET_SD_SCR_SECURITY(pB) (((pB)[6] >> 4) & 0x07)
++#define GET_SD_SCR_DATA_STAT_AFTER_ERASE(pB) (((pB)[6] >> 7) & 0x01)
++
++/* SDIO R4 Response */
++#define SD_SDIO_R4_RESPONSE_BYTES 6
++#define SD_SDIO_R4_GET_OCR(pR) ((UINT32)((pR)[1]) | \
++ (((UINT32)(pR)[2]) << 8) | \
++ (((UINT32)(pR)[3]) << 16))
++#define SD_SDIO_R4_IS_MEMORY_PRESENT(pR) (((pR)[4] & 0x08) == 0x08)
++#define SD_SDIO_R4_GET_IO_FUNC_COUNT(pR) (((pR)[4] >> 4) & 0x07)
++#define SD_SDIO_R4_IS_CARD_READY(pR) (((pR)[4] & 0x80) == 0x80)
++
++/* SDIO R5 response */
++#define SD_SDIO_R5_RESPONSE_BYTES 6
++#define SD_SDIO_R5_READ_DATA_OFFSET 1
++#define SD_R5_GET_READ_DATA(pR) (pR)[SD_SDIO_R5_READ_DATA_OFFSET]
++#define SD_R5_RESP_FLAGS_OFFSET 2
++#define SD_R5_GET_RESP_FLAGS(pR) (pR)[SD_R5_RESP_FLAGS_OFFSET]
++#define SD_R5_SET_CMD(pR,cmd) (pR)[5] = (cmd) & 0xC0
++#define SD_R5_RESP_CMD_ERR (1 << 7) /* for previous cmd */
++#define SD_R5_ILLEGAL_CMD (1 << 6)
++#define SD_R5_GENERAL_ERR (1 << 3)
++#define SD_R5_INVALID_FUNC (1 << 1)
++#define SD_R5_ARG_RANGE_ERR (1 << 0)
++#define SD_R5_CURRENT_CMD_ERRORS (SD_R5_ILLEGAL_CMD | SD_R5_GENERAL_ERR \
++ | SD_R5_INVALID_FUNC | SD_R5_ARG_RANGE_ERR)
++#define SD_R5_ERRORS (SD_R5_CURRENT_CMD_ERRORS)
++
++#define SD_R5_GET_IO_STATE(pR) (((pR)[2] >> 4) & 0x03)
++#define SD_R5_STATE_DIS 0x00
++#define SD_R5_STATE_CMD 0x01
++#define SD_R5_STATE_TRN 0x02
++
++/* SDIO Modified R6 Response */
++#define SD_SDIO_R6_RESPONSE_BYTES 6
++#define SD_SDIO_R6_GET_RCA(pR) ((UINT16)((pR)[3]) | ((UINT16)((pR)[4]) << 8))
++#define SD_SDIO_R6_GET_CSTAT(pR)((UINT16)((pR)[1]) | ((UINT16)((pR)[2]) << 8))
++
++/* SPI mode R1 response */
++#define SPI_R1_RESPONSE_BYTES 1
++#define GET_SPI_R1_RESP_TOKEN(pR) (pR)[0]
++#define SPI_CS_STATE_IDLE 0x01
++#define SPI_CS_ERASE_RESET (1 << 1)
++#define SPI_CS_ILLEGAL_CMD (1 << 2)
++#define SPI_CS_CMD_CRC_ERR (1 << 3)
++#define SPI_CS_ERASE_SEQ_ERR (1 << 4)
++#define SPI_CS_ADDRESS_ERR (1 << 5)
++#define SPI_CS_PARAM_ERR (1 << 6)
++#define SPI_CS_ERR_MASK 0x7c
++
++/* SPI mode R2 response */
++#define SPI_R2_RESPONSE_BYTES 2
++#define GET_SPI_R2_RESP_TOKEN(pR) (pR)[1]
++#define GET_SPI_R2_STATUS_TOKEN(pR) (pR)[0]
++/* the first response byte is defined above */
++/* the second response byte is defined below */
++#define SPI_CS_CARD_IS_LOCKED (1 << 0)
++#define SPI_CS_LOCK_UNLOCK_FAILED (1 << 1)
++#define SPI_CS_ERROR (1 << 2)
++#define SPI_CS_INTERNAL_ERROR (1 << 3)
++#define SPI_CS_ECC_FAILED (1 << 4)
++#define SPI_CS_WP_VIOLATION (1 << 5)
++#define SPI_CS_ERASE_PARAM_ERR (1 << 6)
++#define SPI_CS_OUT_OF_RANGE (1 << 7)
++
++/* SPI mode R3 response */
++#define SPI_R3_RESPONSE_BYTES 5
++#define SPI_R3_GET_OCR(pR) ((((UINT32)((pR)[0])) | \
++ (((UINT32)((pR)[1])) << 8) | \
++ (((UINT32)((pR)[2])) << 16) | \
++ (((UINT32)((pR)[3])) << 24)) & SDMMC_OCR_VOLTAGE_MASK)
++#define SPI_R3_IS_CARD_READY(pR) (((pR)[3] & 0x80) == 0x80)
++#define GET_SPI_R3_RESP_TOKEN(pR) (pR)[4]
++
++/* SPI mode SDIO R4 response */
++#define SPI_SDIO_R4_RESPONSE_BYTES 5
++#define SPI_SDIO_R4_GET_OCR(pR) ((UINT32)((pR)[0]) | \
++ (((UINT32)(pR)[1]) << 8) | \
++ (((UINT32)(pR)[2]) << 16))
++#define SPI_SDIO_R4_IS_MEMORY_PRESENT(pR) (((pR)[3] & 0x08) == 0x08)
++#define SPI_SDIO_R4_GET_IO_FUNC_COUNT(pR) (((pR)[3] >> 4) & 0x07)
++#define SPI_SDIO_R4_IS_CARD_READY(pR) (((pR)[3] & 0x80) == 0x80)
++#define GET_SPI_SDIO_R4_RESP_TOKEN(pR) (pR)[4]
++
++/* SPI Mode SDIO R5 response */
++#define SPI_SDIO_R5_RESPONSE_BYTES 2
++#define GET_SPI_SDIO_R5_RESP_TOKEN(pR) (pR)[1]
++#define GET_SPI_SDIO_R5_RESPONSE_RDATA(pR) (pR)[0]
++#define SPI_R5_IDLE_STATE 0x01
++#define SPI_R5_ILLEGAL_CMD (1 << 2)
++#define SPI_R5_CMD_CRC (1 << 3)
++#define SPI_R5_FUNC_ERR (1 << 4)
++#define SPI_R5_PARAM_ERR (1 << 6)
++
++/* SDIO COMMAND 52 Definitions */
++#define CMD52_READ 0
++#define CMD52_WRITE 1
++#define CMD52_READ_AFTER_WRITE 1
++#define CMD52_NORMAL_WRITE 0
++#define SDIO_SET_CMD52_ARG(arg,rw,func,raw,address,writedata) \
++ (arg) = (((rw) & 1) << 31) | \
++ (((func) & 0x7) << 28) | \
++ (((raw) & 1) << 27) | \
++ (1 << 26) | \
++ (((address) & 0x1FFFF) << 9) | \
++ (1 << 8) | \
++ ((writedata) & 0xFF)
++#define SDIO_SET_CMD52_READ_ARG(arg,func,address) \
++ SDIO_SET_CMD52_ARG(arg,CMD52_READ,(func),0,address,0x00)
++#define SDIO_SET_CMD52_WRITE_ARG(arg,func,address,value) \
++ SDIO_SET_CMD52_ARG(arg,CMD52_WRITE,(func),CMD52_NORMAL_WRITE,address,value)
++
++/* SDIO COMMAND 53 Definitions */
++#define CMD53_READ 0
++#define CMD53_WRITE 1
++#define CMD53_BLOCK_BASIS 1
++#define CMD53_BYTE_BASIS 0
++#define CMD53_FIXED_ADDRESS 0
++#define CMD53_INCR_ADDRESS 1
++#define SDIO_SET_CMD53_ARG(arg,rw,func,mode,opcode,address,bytes_blocks) \
++ (arg) = (((rw) & 1) << 31) | \
++ (((func) & 0x7) << 28) | \
++ (((mode) & 1) << 27) | \
++ (((opcode) & 1) << 26) | \
++ (((address) & 0x1FFFF) << 9) | \
++ ((bytes_blocks) & 0x1FF)
++
++#define SDIO_MAX_LENGTH_BYTE_BASIS 512
++#define SDIO_MAX_BLOCKS_BLOCK_BASIS 511
++#define SDIO_MAX_BYTES_PER_BLOCK 2048
++#define SDIO_COMMON_AREA_FUNCTION_NUMBER 0
++#define SDIO_FIRST_FUNCTION_NUMBER 1
++#define SDIO_LAST_FUNCTION_NUMBER 7
++
++#define CMD53_CONVERT_BYTE_BASIS_BLK_LENGTH_PARAM(b) (((b) < SDIO_MAX_LENGTH_BYTE_BASIS) ? (b) : 0)
++#define CMD53_CONVERT_BLOCK_BASIS_BLK_COUNT_PARAM(b) (((b) <= SDIO_MAX_BLOCKS_BLOCK_BASIS) ? (b) : 0)
++
++
++/* SDIO COMMON Registers */
++
++/* revision register */
++#define CCCR_SDIO_REVISION_REG 0x00
++#define CCCR_REV_MASK 0x0F
++#define CCCR_REV_1_0 0x00
++#define CCCR_REV_1_1 0x01
++#define SDIO_REV_MASK 0xF0
++#define SDIO_REV_1_00 0x00
++#define SDIO_REV_1_10 0x10
++#define SDIO_REV_1_20 0x20
++/* SD physical spec revision */
++#define SD_SPEC_REVISION_REG 0x01
++#define SD_REV_MASK 0x0F
++#define SD_REV_1_01 0x00
++#define SD_REV_1_10 0x01
++/* I/O Enable */
++#define SDIO_ENABLE_REG 0x02
++/* I/O Ready */
++#define SDIO_READY_REG 0x03
++/* Interrupt Enable */
++#define SDIO_INT_ENABLE_REG 0x04
++#define SDIO_INT_MASTER_ENABLE 0x01
++#define SDIO_INT_ALL_ENABLE 0xFE
++/* Interrupt Pending */
++#define SDIO_INT_PENDING_REG 0x05
++#define SDIO_INT_PEND_MASK 0xFE
++/* I/O Abort */
++#define SDIO_IO_ABORT_REG 0x06
++#define SDIO_IO_RESET (1 << 3)
++/* Bus Interface */
++#define SDIO_BUS_IF_REG 0x07
++#define CARD_DETECT_DISABLE 0x80
++#define SDIO_BUS_WIDTH_1_BIT 0x00
++#define SDIO_BUS_WIDTH_4_BIT 0x02
++/* Card Capabilities */
++#define SDIO_CARD_CAPS_REG 0x08
++#define SDIO_CAPS_CMD52_WHILE_DATA 0x01 /* card can issue CMD52 while data transfer */
++#define SDIO_CAPS_MULTI_BLOCK 0x02 /* card supports multi-block data transfers */
++#define SDIO_CAPS_READ_WAIT 0x04 /* card supports read-wait protocol */
++#define SDIO_CAPS_SUSPEND_RESUME 0x08 /* card supports I/O function suspend/resume */
++#define SDIO_CAPS_INT_MULTI_BLK 0x10 /* interrupts between multi-block data capable */
++#define SDIO_CAPS_ENB_INT_MULTI_BLK 0x20 /* enable ints between muli-block data */
++#define SDIO_CAPS_LOW_SPEED 0x40 /* low speed card */
++#define SDIO_CAPS_4BIT_LS 0x80 /* 4 bit low speed card */
++/* Common CIS pointer */
++#define SDIO_CMN_CIS_PTR_LOW_REG 0x09
++#define SDIO_CMN_CIS_PTR_MID_REG 0x0a
++#define SDIO_CMN_CIS_PTR_HI_REG 0x0b
++/* Bus suspend */
++#define SDIO_BUS_SUSPEND_REG 0x0c
++#define SDIO_FUNC_SUSPEND_STATUS_MASK 0x01 /* selected function is suspended */
++#define SDIO_SUSPEND_FUNCTION 0x02 /* suspend the current selected function */
++/* Function select (for bus suspension) */
++#define SDIO_FUNCTION_SELECT_REG 0x0d
++#define SDIO_SUSPEND_FUNCTION_0 0x00
++#define SDIO_SUSPEND_MEMORY_FUNC_MASK 0x08
++/* Function Execution */
++#define SDIO_FUNCTION_EXEC_REG 0x0e
++#define SDIO_MEMORY_FUNC_EXEC_MASK 0x01
++/* Function Ready */
++#define SDIO_FUNCTION_READY_REG 0x0f
++#define SDIO_MEMORY_FUNC_BUSY_MASK 0x01
++
++/* power control 1.10 only */
++#define SDIO_POWER_CONTROL_REG 0x12
++#define SDIO_POWER_CONTROL_SMPC 0x01
++#define SDIO_POWER_CONTROL_EMPC 0x02
++
++/* high speed control , 1.20 only */
++#define SDIO_HS_CONTROL_REG 0x13
++#define SDIO_HS_CONTROL_SHS 0x01
++#define SDIO_HS_CONTROL_EHS 0x02
++
++/* Function Base Registers */
++#define xFUNCTION_FBR_OFFSET(funcNo) (0x100*(funcNo))
++/* offset calculation that does not use multiplication */
++static INLINE UINT32 CalculateFBROffset(UCHAR FuncNo) {
++ UCHAR i = FuncNo;
++ UINT32 offset = 0;
++ while (i) {
++ offset += 0x100;
++ i--;
++ }
++ return offset;
++}
++/* Function info */
++#define FBR_FUNC_INFO_REG_OFFSET(fbr) ((fbr) + 0x00)
++#define FUNC_INFO_SUPPORTS_CSA_MASK 0x40
++#define FUNC_INFO_ENABLE_CSA 0x80
++#define FUNC_INFO_DEVICE_CODE_MASK 0x0F
++#define FUNC_INFO_DEVICE_CODE_LAST 0x0F
++#define FBR_FUNC_EXT_DEVICE_CODE_OFFSET(fbr) ((fbr) + 0x01)
++/* Function Power selection */
++#define FBR_FUNC_POWER_SELECT_OFFSET(fbr) ((fbr) + 0x02)
++#define FUNC_POWER_SELECT_SPS 0x01
++#define FUNC_POWER_SELECT_EPS 0x02
++/* Function CIS ptr */
++#define FBR_FUNC_CIS_LOW_OFFSET(fbr) ((fbr) + 0x09)
++#define FBR_FUNC_CIS_MID_OFFSET(fbr) ((fbr) + 0x0a)
++#define FBR_FUNC_CIS_HI_OFFSET(fbr) ((fbr) + 0x0b)
++/* Function CSA ptr */
++#define FBR_FUNC_CSA_LOW_OFFSET(fbr) ((fbr) + 0x0c)
++#define FBR_FUNC_CSA_MID_OFFSET(fbr) ((fbr) + 0x0d)
++#define FBR_FUNC_CSA_HI_OFFSET(fbr) ((fbr) + 0x0e)
++/* Function CSA data window */
++#define FBR_FUNC_CSA_DATA_OFFSET(fbr) ((fbr) + 0x0f)
++/* Function Block Size Control */
++#define FBR_FUNC_BLK_SIZE_LOW_OFFSET(fbr) ((fbr) + 0x10)
++#define FBR_FUNC_BLK_SIZE_HI_OFFSET(fbr) ((fbr) + 0x11)
++#define SDIO_CIS_AREA_BEGIN 0x00001000
++#define SDIO_CIS_AREA_END 0x00017fff
++/* Tuple definitions */
++#define CISTPL_NULL 0x00
++#define CISTPL_CHECKSUM 0x10
++#define CISTPL_VERS_1 0x15
++#define CISTPL_ALTSTR 0x16
++#define CISTPL_MANFID 0x20
++#define CISTPL_FUNCID 0x21
++#define CISTPL_FUNCE 0x22
++#define CISTPL_VENDOR 0x91
++#define CISTPL_END 0xff
++#define CISTPL_LINK_END 0xff
++
++
++/* these structures must be packed */
++
++/* Manufacturer ID tuple */
++struct SDIO_MANFID_TPL {
++ UINT16 ManufacturerCode; /* jedec code */
++ UINT16 ManufacturerInfo; /* manufacturer specific code */
++}CT_PACK_STRUCT;
++
++/* Function ID Tuple */
++struct SDIO_FUNC_ID_TPL {
++ UINT8 DeviceCode; /* device code */
++ UINT8 InitMask; /* system initialization mask (not used) */
++}CT_PACK_STRUCT;
++
++ /* Extended Function Tuple (Common) */
++struct SDIO_FUNC_EXT_COMMON_TPL {
++ UINT8 Type; /* type */
++ UINT16 Func0_MaxBlockSize; /* max function 0 block transfer size */
++ UINT8 MaxTransSpeed; /* max transfer speed (encoded) */
++#define TRANSFER_UNIT_MULTIPIER_MASK 0x07
++#define TIME_VALUE_MASK 0x78
++#define TIME_VALUE_SHIFT 3
++}CT_PACK_STRUCT;
++
++/* Extended Function Tuple (Per Function) */
++struct SDIO_FUNC_EXT_FUNCTION_TPL {
++ UINT8 Type; /* type */
++#define SDIO_FUNC_INFO_WAKEUP_SUPPORT 0x01
++ UINT8 FunctionInfo; /* function info */
++ UINT8 SDIORev; /* revision */
++ UINT32 CardPSN; /* product serial number */
++ UINT32 CSASize; /* CSA size */
++ UINT8 CSAProperties; /* CSA properties */
++ UINT16 MaxBlockSize; /* max block size for block transfers */
++ UINT32 FunctionOCR; /* optimal function OCR */
++ UINT8 OpMinPwr; /* operational min power */
++ UINT8 OpAvgPwr; /* operational average power */
++ UINT8 OpMaxPwr; /* operation maximum power */
++ UINT8 SbMinPwr; /* standby minimum power */
++ UINT8 SbAvgPwr; /* standby average power */
++ UINT8 SbMaxPwr; /* standby maximum power */
++ UINT16 MinBandWidth; /* minimum bus bandwidth */
++ UINT16 OptBandWidth; /* optimalbus bandwitdh */
++}CT_PACK_STRUCT;
++
++struct SDIO_FUNC_EXT_FUNCTION_TPL_1_1 {
++ struct SDIO_FUNC_EXT_FUNCTION_TPL CommonInfo; /* from 1.0*/
++ UINT16 EnableTimeOut; /* timeout for enable */
++ UINT16 OperPwrMaxPwr;
++ UINT16 OperPwrAvgPwr;
++ UINT16 HiPwrMaxPwr;
++ UINT16 HiPwrAvgPwr;
++ UINT16 LowPwrMaxPwr;
++ UINT16 LowPwrAvgPwr;
++}CT_PACK_STRUCT;
++
++static INLINE SDIO_STATUS ConvertCMD52ResponseToSDIOStatus(UINT8 CMD52ResponseFlags) {
++ if (!(CMD52ResponseFlags & SD_R5_ERRORS)) {
++ return SDIO_STATUS_SUCCESS;
++ }
++ if (CMD52ResponseFlags & SD_R5_ILLEGAL_CMD) {
++ return SDIO_STATUS_DATA_STATE_INVALID;
++ } else if (CMD52ResponseFlags & SD_R5_INVALID_FUNC) {
++ return SDIO_STATUS_INVALID_FUNC;
++ } else if (CMD52ResponseFlags & SD_R5_ARG_RANGE_ERR) {
++ return SDIO_STATUS_FUNC_ARG_ERROR;
++ } else {
++ return SDIO_STATUS_DATA_ERROR_UNKNOWN;
++ }
++}
++
++/* CMD6 mode switch definitions */
++
++#define SD_SWITCH_FUNC_CHECK 0
++#define SD_SWITCH_FUNC_SET ((UINT32)(1 << 31))
++#define SD_FUNC_NO_SELECT_MASK 0x00FFFFFF
++#define SD_SWITCH_GRP_1 0
++#define SD_SWITCH_GRP_2 1
++#define SD_SWITCH_GRP_3 2
++#define SD_SWITCH_GRP_4 3
++#define SD_SWITCH_GRP_5 4
++#define SD_SWITCH_GRP_6 5
++
++#define SD_SWITCH_HIGH_SPEED_GROUP SD_SWITCH_GRP_1
++#define SD_SWITCH_HIGH_SPEED_FUNC_NO 1
++
++#define SD_SWITCH_MAKE_SHIFT(grp) ((grp) * 4)
++
++#define SD_SWITCH_MAKE_GRP_PATTERN(FuncGrp,FuncNo) \
++ ((SD_FUNC_NO_SELECT_MASK & (~(0xF << SD_SWITCH_MAKE_SHIFT(FuncGrp)))) | \
++ (((FuncNo) & 0xF) << SD_SWITCH_MAKE_SHIFT(FuncGrp))) \
++
++#define SD_SWITCH_FUNC_ARG_GROUP_CHECK(FuncGrp,FuncNo) \
++ (SD_SWITCH_FUNC_CHECK | SD_SWITCH_MAKE_GRP_PATTERN(FuncGrp,FuncNo))
++
++#define SD_SWITCH_FUNC_ARG_GROUP_SET(FuncGrp,FuncNo) \
++ (SD_SWITCH_FUNC_SET | SD_SWITCH_MAKE_GRP_PATTERN(FuncGrp,FuncNo))
++
++#define SD_SWITCH_FUNC_STATUS_BLOCK_BYTES 64
++
++#define SD_SWITCH_FUNC_STATUS_GET_GRP_BIT_MASK(pBuffer,FuncGrp) \
++ (USHORT)((pBuffer)[50 + ((FuncGrp)*2)] | ((pBuffer)[51 + ((FuncGrp)*2)] << 8))
++
++#define SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pBuffer) \
++ (USHORT)((pBuffer)[62] | ((pBuffer)[63] << 8))
++
++static INLINE UINT8 SDSwitchGetSwitchResult(PUINT8 pBuffer, UINT8 FuncGrp)
++{
++ switch (FuncGrp) {
++ case 0:
++ return (pBuffer[47] & 0xF);
++ case 1:
++ return (pBuffer[47] >> 4);
++ case 2:
++ return (pBuffer[48] & 0xF);
++ case 3:
++ return (pBuffer[48] >> 4);
++ case 4:
++ return (pBuffer[49] & 0xF);
++ case 5:
++ return (pBuffer[49] >> 4);
++ default:
++ return 0xF;
++ }
++}
++
++#endif
+Index: linux-2.6.24.7/include/linux/sdio/sdio_hcd_defs.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/sdio/sdio_hcd_defs.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,219 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: sdio_hcd_defs.h
++
++@abstract: host controller driver definitions
++
++@notice: Copyright (c), 2005-2006 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __SDIO_HCD_DEFS_H___
++#define __SDIO_HCD_DEFS_H___
++
++ /* write protect switch position data */
++typedef UINT8 SDCONFIG_WP_VALUE;
++
++ /* HC commands */
++#define SDCONFIG_SEND_INIT_CLOCKS (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_PUT | 1)
++#define SDCONFIG_SDIO_INT_CTRL (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_PUT | 2)
++#define SDCONFIG_SDIO_REARM_INT (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_NONE | 3)
++#define SDCONFIG_BUS_MODE_CTRL (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_BOTH | 4)
++#define SDCONFIG_POWER_CTRL (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_PUT | 5)
++#define SDCONFIG_GET_WP (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_GET | 6)
++
++ /* slot init clocks control */
++typedef struct _SDCONFIG_INIT_CLOCKS_DATA {
++ UINT16 NumberOfClocks; /* number of clocks to issue in the current bus mode*/
++}SDCONFIG_INIT_CLOCKS_DATA, *PSDCONFIG_INIT_CLOCKS_DATA;
++
++/* slot power control */
++typedef struct _SDCONFIG_POWER_CTRL_DATA {
++ BOOL SlotPowerEnable; /* turn on/off slot power */
++ SLOT_VOLTAGE_MASK SlotPowerVoltageMask; /* slot power voltage mask */
++}SDCONFIG_POWER_CTRL_DATA, *PSDCONFIG_POWER_CTRL_DATA;
++
++typedef UINT8 SDIO_IRQ_MODE_FLAGS;
++/* SDIO Interrupt control */
++typedef struct _SDCONFIG_SDIO_INT_CTRL_DATA {
++ BOOL SlotIRQEnable; /* turn on/off Slot IRQ detection */
++ SDIO_IRQ_MODE_FLAGS IRQDetectMode; /* slot IRQ detect mode , only valid if Enabled = TRUE */
++#define IRQ_DETECT_RAW 0x00
++#define IRQ_DETECT_MULTI_BLK 0x01
++#define IRQ_DETECT_4_BIT 0x02
++#define IRQ_DETECT_1_BIT 0x04
++#define IRQ_DETECT_SPI 0x08
++}SDCONFIG_SDIO_INT_CTRL_DATA, *PSDCONFIG_SDIO_INT_CTRL_DATA;
++
++/* card insert */
++#define EVENT_HCD_ATTACH 1
++/* card remove */
++#define EVENT_HCD_DETACH 2
++/* card slot interrupt */
++#define EVENT_HCD_SDIO_IRQ_PENDING 3
++/* transfer done */
++#define EVENT_HCD_TRANSFER_DONE 4
++/* (internal use only) */
++#define EVENT_HCD_CD_POLLING 5
++/* NOP */
++#define EVENT_HCD_NOP 0
++
++/* attrib_flags */
++#define SDHCD_ATTRIB_SUPPORTS_POWER 0x0001 /* host controller driver supports power managment */
++#define SDHCD_ATTRIB_BUS_1BIT 0x0002 /* SD Native 1 - bit mode */
++#define SDHCD_ATTRIB_BUS_4BIT 0x0004 /* SD Native 4 - bit mode */
++#define SDHCD_ATTRIB_BUS_SPI 0x0008 /* SPI mode capable */
++#define SDHCD_ATTRIB_READ_WAIT 0x0010 /* read wait supported (SD-only) */
++#define SDHCD_ATTRIB_MULTI_BLK_IRQ 0x0020 /* interrupts between multi-block capable (SD-only) */
++#define SDHCD_ATTRIB_BUS_MMC8BIT 0x0040 /* MMC 8-bit */
++#define SDHCD_ATTRIB_SLOT_POLLING 0x0080 /* requires slot polling for Card Detect */
++#define SDHCD_ATTRIB_POWER_SWITCH 0x0100 /* host has power switch control, must be set if SPI
++ mode can be switched to 1 or 4 bit mode */
++#define SDHCD_ATTRIB_NO_SPI_CRC 0x0200 /* when in SPI mode,
++ host wants to run without SPI CRC */
++#define SDHCD_ATTRIB_AUTO_CMD12 0x0400 /* host controller supports auto CMD12 */
++#define SDHCD_ATTRIB_NO_4BIT_IRQ 0x0800 /* host controller does not support 4 bit IRQ mode*/
++#define SDHCD_ATTRIB_RAW_MODE 0x1000 /* host controller is a raw mode hcd*/
++#define SDHCD_ATTRIB_SD_HIGH_SPEED 0x2000 /* host controller supports SD high speed interface */
++#define SDHCD_ATTRIB_MMC_HIGH_SPEED 0x4000 /* host controller supports MMC high speed interface */
++
++#define IS_CARD_PRESENT(pHcd) ((pHcd)->CardProperties.Flags & CARD_TYPE_MASK)
++#define SET_CURRENT_REQUEST(pHcd,Req) (pHcd)->pCurrentRequest = (Req)
++#define IS_HCD_RAW(pHcd) ((pHcd)->Attributes & SDHCD_ATTRIB_RAW_MODE)
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get a pointer to the current bus request for a host controller
++
++ @function name: GET_CURRENT_REQUEST
++ @prototype: PSDREQUEST GET_CURRENT_REQUEST (PSDHCD pHcd)
++ @category: HD_Reference
++
++ @input: pHcd - host structure
++
++ @return: current SD/SDIO bus request being worked on
++
++ @notes: Implemented as a macro. This macro returns the current SD request that is
++ being worked on.
++
++ @example: getting the current request:
++ pReq = GET_CURRENT_REQUEST(&pHct->Hcd);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define GET_CURRENT_REQUEST(pHcd) (pHcd)->pCurrentRequest
++#define GET_CURRENT_BUS_WIDTH(pHcd) SDCONFIG_GET_BUSWIDTH((pHcd)->CardProperties.BusMode)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Get host controller's current operational bus clock
++
++ @function name: SDHCD_GET_OPER_CLOCK
++ @prototype: SD_BUSCLOCK_RATE SDHCD_GET_OPER_CLOCK(PSDHCD pHcd)
++ @category: HD_Reference
++
++ @input: pHcd - the registered host structure
++
++ @output: none
++
++ @return: clock rate
++
++ @notes: Implemented as a macro. Returns the current bus clock rate.
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDHCD_GET_OPER_CLOCK(pHcd) (pHcd)->CardProperties.OperBusClock
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Is host controller operating in SPI mode
++
++ @function name: IS_HCD_BUS_MODE_SPI
++ @prototype: BOOL IS_HCD_BUS_MODE_SPI (PSDHCD pHcd)
++ @category: HD_Reference
++
++ @input: pHcd - host structure
++
++ @return: TRUE if in SPI mode
++
++ @notes: Implemented as a macro. Host controllers that operate in SPI mode
++ dynamically can use this macro to check for SPI operation.
++
++ @example: testing for SPI mode:
++ if (IS_HCD_BUS_MODE_SPI(&pHct->Hcd)) {
++ .. in spi mode
++ }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define IS_HCD_BUS_MODE_SPI(pHcd) (GET_CURRENT_BUS_WIDTH(pHcd) == SDCONFIG_BUS_WIDTH_SPI)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Is host controller using SPI in non-CRC mode
++
++ @function name: IS_HCD_BUS_MODE_SPI_NO_CRC
++ @prototype: BOOL IS_HCD_BUS_MODE_SPI_NO_CRC(PSDHCD pHcd)
++ @category: HD_Reference
++
++ @input: pHcd - host structure
++
++ @return: TRUE if CRC mode is off
++
++ @notes: Implemented as a macro. SPI-capable cards and systems can operate in
++ non-CRC protected mode. In this mode the host controller should ignore
++ CRC fields and/or disable CRC generation when issuing command or data
++ packets. This option is useful for software based SPI mode where CRC
++ should be turned off in order to reduce processing overhead.
++
++ @example: test for non-CRC SPI mode:
++ if (IS_HCD_BUS_MODE_SPI_NO_CRC(&pHct->Hcd)) {
++ .. disable CRC checking in hardware.
++ }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define IS_HCD_BUS_MODE_SPI_NO_CRC(pHcd) ((pHcd)->CardProperties.BusMode & \
++ SDCONFIG_BUS_MODE_SPI_NO_CRC)
++
++typedef UINT8 SDHCD_RESPONSE_CHECK_MODE;
++/* have SDIO core check the response token and see if it is okay to continue with
++ * the data portion */
++#define SDHCD_CHECK_DATA_TRANS_OK 0x01
++/* have SDIO core check the SPI token received */
++#define SDHCD_CHECK_SPI_TOKEN 0x02
++
++/* prototypes */
++/* for HCD use */
++SDIO_STATUS SDIO_RegisterHostController(PSDHCD pHcd);
++SDIO_STATUS SDIO_UnregisterHostController(PSDHCD pHcd);
++SDIO_STATUS SDIO_HandleHcdEvent(PSDHCD pHcd, HCD_EVENT Event);
++SDIO_STATUS SDIO_CheckResponse(PSDHCD pHcd, PSDREQUEST pReq, SDHCD_RESPONSE_CHECK_MODE CheckMode);
++SDIO_STATUS SDIO_BusAddOSDevice(PSDDMA_DESCRIPTION pDma, POS_PNPDRIVER pDriver, POS_PNPDEVICE pDevice);
++void SDIO_BusRemoveOSDevice(POS_PNPDRIVER pDriver, POS_PNPDEVICE pDevice);
++
++#endif /* __SDIO_BUSDRIVER_H___ */
+Index: linux-2.6.24.7/include/linux/sdio/sdio_lib.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/sdio/sdio_lib.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,270 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: sdio_lib.h
++
++@abstract: SDIO Library include
++
++#notes:
++
++@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __SDIO_LIB_H___
++#define __SDIO_LIB_H___
++
++#ifdef UNDER_CE
++#include "wince\sdio_lib_wince.h"
++#endif /* WINCE */
++
++#define CMD52_DO_READ FALSE
++#define CMD52_DO_WRITE TRUE
++
++ /* read/write macros to any function */
++#define Cmd52WriteByteFunc(pDev,Func,Address,pValue) \
++ SDLIB_IssueCMD52((pDev),(Func),(Address),(pValue),1,CMD52_DO_WRITE)
++#define Cmd52ReadByteFunc(pDev,Func,Address,pValue) \
++ SDLIB_IssueCMD52((pDev),(Func),(Address),pValue,1,CMD52_DO_READ)
++#define Cmd52ReadMultipleFunc(pDev,Func, Address, pBuf,length) \
++ SDLIB_IssueCMD52((pDev),(Func),(Address),(pBuf),(length),CMD52_DO_READ)
++
++ /* macros to access common registers */
++#define Cmd52WriteByteCommon(pDev, Address, pValue) \
++ Cmd52WriteByteFunc((pDev),0,(Address),(pValue))
++#define Cmd52ReadByteCommon(pDev, Address, pValue) \
++ Cmd52ReadByteFunc((pDev),0,(Address),(pValue))
++#define Cmd52ReadMultipleCommon(pDev, Address, pBuf,length) \
++ Cmd52ReadMultipleFunc((pDev),0,(Address),(pBuf),(length))
++
++#define SDLIB_SetupCMD52RequestAsync(f,a,w,wd,pR) \
++{ \
++ SDLIB_SetupCMD52Request((f),(a),(w),(wd),(pR)); \
++ (pR)->Flags |= SDREQ_FLAGS_TRANS_ASYNC; \
++}
++
++ /* a message block */
++typedef struct _SDMESSAGE_BLOCK {
++ SDLIST SDList; /* list entry */
++ INT MessageLength; /* number of bytes in this message */
++ UINT8 MessageStart[1]; /* message start */
++}SDMESSAGE_BLOCK, *PSDMESSAGE_BLOCK;
++
++ /* message queue */
++typedef struct _SDMESSAGE_QUEUE {
++ SDLIST MessageList; /* message list */
++ OS_CRITICALSECTION MessageCritSection; /* message semaphore */
++ SDLIST FreeMessageList; /* free message list */
++ INT MaxMessageLength; /* max message block length */
++}SDMESSAGE_QUEUE, *PSDMESSAGE_QUEUE;
++
++/* internal library prototypes that can be proxied */
++SDIO_STATUS _SDLIB_IssueCMD52(PSDDEVICE pDevice,
++ UINT8 FuncNo,
++ UINT32 Address,
++ PUINT8 pData,
++ INT ByteCount,
++ BOOL Write);
++SDIO_STATUS _SDLIB_FindTuple(PSDDEVICE pDevice,
++ UINT8 Tuple,
++ UINT32 *pTupleScanAddress,
++ PUINT8 pBuffer,
++ UINT8 *pLength);
++SDIO_STATUS _SDLIB_IssueConfig(PSDDEVICE pDevice,
++ SDCONFIG_COMMAND Command,
++ PVOID pData,
++ INT Length);
++void _SDLIB_PrintBuffer(PUCHAR pBuffer, INT Length,PTEXT pDescription);
++void _SDLIB_SetupCMD52Request(UINT8 FuncNo,
++ UINT32 Address,
++ BOOL Write,
++ UINT8 WriteData,
++ PSDREQUEST pRequest);
++SDIO_STATUS _SDLIB_SetFunctionBlockSize(PSDDEVICE pDevice,
++ UINT16 BlockSize);
++
++SDIO_STATUS _SDLIB_GetDefaultOpCurrent(PSDDEVICE pDevice,
++ SD_SLOT_CURRENT *pOpCurrent);
++PSDMESSAGE_QUEUE _CreateMessageQueue(INT MaxMessages, INT MaxMessageLength);
++void _DeleteMessageQueue(PSDMESSAGE_QUEUE pQueue);
++SDIO_STATUS _PostMessage(PSDMESSAGE_QUEUE pQueue, PVOID pMessage, INT MessageLength);
++SDIO_STATUS _GetMessage(PSDMESSAGE_QUEUE pQueue, PVOID pData, INT *pBufferLength);
++
++#ifdef CTSYSTEM_NO_FUNCTION_PROXIES
++ /* OS port requires no proxy functions, use methods directly from the library */
++#define SDLIB_IssueCMD52 _SDLIB_IssueCMD52
++#define SDLIB_SetupCMD52Request _SDLIB_SetupCMD52Request
++#define SDLIB_FindTuple _SDLIB_FindTuple
++#define SDLIB_IssueConfig _SDLIB_IssueConfig
++#define SDLIB_SetFunctionBlockSize _SDLIB_SetFunctionBlockSize
++#define SDLIB_GetDefaultOpCurrent _SDLIB_GetDefaultOpCurrent
++#define SDLIB_CreateMessageQueue _CreateMessageQueue
++#define SDLIB_DeleteMessageQueue _DeleteMessageQueue
++#define SDLIB_PostMessage _PostMessage
++#define SDLIB_GetMessage _GetMessage
++#define SDLIB_PrintBuffer _SDLIB_PrintBuffer
++#else
++
++/* proxied versions */
++SDIO_STATUS SDLIB_IssueCMD52(PSDDEVICE pDevice,
++ UINT8 FuncNo,
++ UINT32 Address,
++ PUINT8 pData,
++ INT ByteCount,
++ BOOL Write);
++
++void SDLIB_SetupCMD52Request(UINT8 FuncNo,
++ UINT32 Address,
++ BOOL Write,
++ UINT8 WriteData,
++ PSDREQUEST pRequest);
++
++SDIO_STATUS SDLIB_FindTuple(PSDDEVICE pDevice,
++ UINT8 Tuple,
++ UINT32 *pTupleScanAddress,
++ PUINT8 pBuffer,
++ UINT8 *pLength);
++
++SDIO_STATUS SDLIB_IssueConfig(PSDDEVICE pDevice,
++ SDCONFIG_COMMAND Command,
++ PVOID pData,
++ INT Length);
++
++SDIO_STATUS SDLIB_SetFunctionBlockSize(PSDDEVICE pDevice,
++ UINT16 BlockSize);
++
++void SDLIB_PrintBuffer(PUCHAR pBuffer, INT Length,PTEXT pDescription);
++
++SDIO_STATUS SDLIB_GetDefaultOpCurrent(PSDDEVICE pDevice, SD_SLOT_CURRENT *pOpCurrent);
++
++PSDMESSAGE_QUEUE SDLIB_CreateMessageQueue(INT MaxMessages, INT MaxMessageLength);
++
++void SDLIB_DeleteMessageQueue(PSDMESSAGE_QUEUE pQueue);
++
++SDIO_STATUS SDLIB_PostMessage(PSDMESSAGE_QUEUE pQueue, PVOID pMessage, INT MessageLength);
++
++SDIO_STATUS SDLIB_GetMessage(PSDMESSAGE_QUEUE pQueue, PVOID pData, INT *pBufferLength);
++#endif /* CTSYSTEM_NO_FUNCTION_PROXIES */
++
++
++SDIO_STATUS SDLIB_OSCreateHelper(POSKERNEL_HELPER pHelper,
++ PHELPER_FUNCTION pFunction,
++ PVOID pContext);
++
++void SDLIB_OSDeleteHelper(POSKERNEL_HELPER pHelper);
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Check message queue is empty
++
++ @function name: SDLIB_IsQueueEmpty
++ @prototype: BOOL SDLIB_IsQueueEmpty(PSDMESSAGE_QUEUE pQueue)
++ @category: Support_Reference
++
++ @input: pQueue - message queue to check
++
++ @return: TRUE if empty else false
++
++ @see also: SDLIB_CreateMessageQueue
++
++ @example: Check message queue :
++ if (SDLIB_IsQueueEmpty(pInstance->pQueue)) {
++ .. message queue is empty
++ }
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static INLINE BOOL SDLIB_IsQueueEmpty(PSDMESSAGE_QUEUE pQueue) {
++ return SDLIST_IS_EMPTY(&pQueue->MessageList);
++}
++
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Issue an I/O abort request
++
++ @function name: SDLIB_IssueIOAbort
++ @prototype: SDIO_STATUS SDLIB_IssueIOAbort(PSDDEVICE pDevice)
++ @category: PD_Reference
++
++ @input: pDevice - the device that is the target of this request
++
++ @return: SDIO_STATUS
++
++ @notes: This procedure can be called to issue an I/O abort request to an I/O function.
++ This procedure cannot be used to abort a data (block) transfer already in progress.
++ It is intended to be used when a data (block) transfer completes with an error and only if
++ the I/O function requires an abort action. Some I/O functions may automatically
++ recover from such failures and not require this action. This function issues
++ the abort command synchronously and can potentially block.
++ If an async request is required, you must allocate a request and use
++ SDLIB_SetupIOAbortAsync() to prepare the request.
++
++ @example: Issuing I/O Abort synchronously :
++ .. check status from last block operation:
++ if (status == SDIO_STATUS_BUS_READ_TIMEOUT) {
++ .. on failure, issue I/O abort
++ status2 = SDLIB_IssueIOAbort(pDevice);
++ }
++ Issuing I/O Abort asynchronously:
++ ... allocate a request
++ ... setup the request:
++ SDLIB_SetupIOAbortAsync(pDevice,pReq);
++ pReq->pCompletion = myIOAbortCompletion;
++ pReq->pCompleteContext = pDevice;
++ status = SDDEVICE_CALL_REQUEST_FUNC(pDevice,pReq);
++
++ @see also: SDLIB_SetupIOAbortAsync
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static INLINE SDIO_STATUS SDLIB_IssueIOAbort(PSDDEVICE pDevice) {
++ UINT8 value = SDDEVICE_GET_SDIO_FUNCNO(pDevice);
++ return Cmd52WriteByteCommon(pDevice,0x06,&value);
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ @function: Setup an I/O abort request for async operation
++
++ @function name: SDLIB_SetupIOAbortAsync
++ @prototype: SDLIB_SetupIOAbortAsync(PSDDEVICE pDevice, PSDREQUEST pRequest)
++ @category: PD_Reference
++
++ @input: pDevice - the device that is the target of this request
++ pRequest - the request to set up
++
++ @see also: SDLIB_IssueIOAbort
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDLIB_SetupIOAbortAsync(pDevice, pReq) \
++ SDLIB_SetupCMD52RequestAsync(0,0x06,TRUE,SDDEVICE_GET_SDIO_FUNCNO(pDevice),(pReq))
++
++
++#endif /* __SDIO_LIB_H___*/
+Index: linux-2.6.24.7/include/linux/sdio/sdlist.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/sdio/sdlist.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,141 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++@file: sdlist.h
++
++@abstract: OS independent list functions
++
++@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++
++
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation;
++ *
++ * Software distributed under the License is distributed on an "AS
++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ * implied. See the License for the specific language governing
++ * rights and limitations under the License.
++ *
++ * Portions of this code were developed with information supplied from the
++ * SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ * The following conditions apply to the release of the SD simplified specification (�Simplified
++ * Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
++ * SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ * on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ * Specification may require a license from the SD Card Association or other third parties.
++ * Disclaimers:
++ * The information contained in the Simplified Specification is presented only as a standard
++ * specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ * representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ * any damages, any infringements of patents or other right of the SD Card Association or any third
++ * parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ * under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ * be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ * information, know-how or other confidential information to any third party.
++ *
++ *
++ * The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ * sdio@atheros.com
++ *
++ *
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __SDLIST_H___
++#define __SDLIST_H___
++
++/* list functions */
++/* pointers for the list */
++typedef struct _SDLIST {
++ struct _SDLIST *pPrev;
++ struct _SDLIST *pNext;
++}SDLIST, *PSDLIST;
++/*
++ * SDLIST_INIT , circular list
++*/
++#define SDLIST_INIT(pList)\
++ {(pList)->pPrev = pList; (pList)->pNext = pList;}
++#define SDLIST_INIT_DECLARE(List)\
++ SDLIST List = {&List, &List}
++
++
++#define SDLIST_IS_EMPTY(pList) (((pList)->pPrev == (pList)) && ((pList)->pNext == (pList)))
++#define SDLIST_GET_ITEM_AT_HEAD(pList) (pList)->pNext
++#define SDLIST_GET_ITEM_AT_TAIL(pList) (pList)->pPrev
++/*
++ * SDITERATE_OVER_LIST pStart is the list, pTemp is a temp list member
++ * NOT: do not use this function if the items in the list are deleted inside the
++ * iteration loop
++*/
++#define SDITERATE_OVER_LIST(pStart, pTemp) \
++ for((pTemp) =(pStart)->pNext; pTemp != (pStart); (pTemp) = (pTemp)->pNext)
++
++
++/* safe iterate macro that allows the item to be removed from the list
++ * the iteration continues to the next item in the list
++ */
++#define SDITERATE_OVER_LIST_ALLOW_REMOVE(pStart,pItem,st,offset) \
++{ \
++ PSDLIST pTemp; \
++ pTemp = (pStart)->pNext; \
++ while (pTemp != (pStart)) { \
++ (pItem) = CONTAINING_STRUCT(pTemp,st,offset); \
++ pTemp = pTemp->pNext; \
++
++#define SDITERATE_END }}
++
++/*
++ * SDListInsertTail - insert pAdd to the end of the list
++*/
++static INLINE PSDLIST SDListInsertTail(PSDLIST pList, PSDLIST pAdd) {
++ /* this assert catches when an item is added twice */
++ DBG_ASSERT(pAdd->pNext != pList);
++ /* insert at tail */
++ pAdd->pPrev = pList->pPrev;
++ pAdd->pNext = pList;
++ pList->pPrev->pNext = pAdd;
++ pList->pPrev = pAdd;
++ return pAdd;
++}
++
++/*
++ * SDListInsertHead - insert pAdd into the head of the list
++*/
++static INLINE PSDLIST SDListInsertHead(PSDLIST pList, PSDLIST pAdd) {
++ /* this assert catches when an item is added twice */
++ DBG_ASSERT(pAdd->pPrev != pList);
++ /* insert at head */
++ pAdd->pPrev = pList;
++ pAdd->pNext = pList->pNext;
++ pList->pNext->pPrev = pAdd;
++ pList->pNext = pAdd;
++ return pAdd;
++}
++
++#define SDListAdd(pList,pItem) SDListInsertHead((pList),(pItem))
++/*
++ * SDListRemove - remove pDel from list
++*/
++static INLINE PSDLIST SDListRemove(PSDLIST pDel) {
++ pDel->pNext->pPrev = pDel->pPrev;
++ pDel->pPrev->pNext = pDel->pNext;
++ /* point back to itself just to be safe, incase remove is called again */
++ pDel->pNext = pDel;
++ pDel->pPrev = pDel;
++ return pDel;
++}
++
++/*
++ * SDListRemoveItemFromHead - get a list item from the head
++*/
++static INLINE PSDLIST SDListRemoveItemFromHead(PSDLIST pList) {
++ PSDLIST pItem = NULL;
++ if (pList->pNext != pList) {
++ pItem = pList->pNext;
++ /* remove the first item from head */
++ SDListRemove(pItem);
++ }
++ return pItem;
++}
++#endif /* __SDLIST_H___ */
+Index: linux-2.6.24.7/include/linux/spi/glamo.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/include/linux/spi/glamo.h 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,28 @@
++#ifndef __GLAMO_SPI_H
++#define __GLAMO_SPI_H
++
++#include <linux/glamo-gpio.h>
++
++struct spi_board_info;
++struct glamofb_handle;
++struct glamo_core;
++
++struct glamo_spi_info {
++ unsigned long board_size;
++ struct spi_board_info *board_info;
++ struct glamofb_handle *glamofb_handle;
++};
++
++struct glamo_spigpio_info {
++ unsigned int pin_clk;
++ unsigned int pin_mosi;
++ unsigned int pin_miso;
++ unsigned int pin_cs;
++
++ unsigned int board_size;
++ struct spi_board_info *board_info;
++ struct glamo_core *glamo;
++};
++
++
++#endif
+Index: linux-2.6.24.7/include/linux/suspend.h
+===================================================================
+--- linux-2.6.24.7.orig/include/linux/suspend.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/linux/suspend.h 2008-12-11 22:46:49.000000000 +0100
+@@ -122,6 +122,12 @@ struct pbe {
+ struct pbe *next;
+ };
+
++/**
++ * global indication we are somewhere between start of suspend and end of
++ * resume, nonzero is true
++ */
++extern int global_inside_suspend;
++
+ /* mm/page_alloc.c */
+ extern void drain_local_pages(void);
+ extern void mark_free_pages(struct zone *zone);
+Index: linux-2.6.24.7/include/linux/time.h
+===================================================================
+--- linux-2.6.24.7.orig/include/linux/time.h 2008-12-11 22:46:10.000000000 +0100
++++ linux-2.6.24.7/include/linux/time.h 2008-12-11 22:48:46.000000000 +0100
+@@ -181,6 +181,10 @@ static inline void timespec_add_ns(struc
+ * optimising this loop into a modulo operation. */
+ asm("" : "+r"(ns));
+
++ /* The following asm() prevents the compiler from
++ * optimising this loop into a modulo operation. */
++ asm("" : "+r"(ns));
++
+ ns -= NSEC_PER_SEC;
+ a->tv_sec++;
+ }
+Index: linux-2.6.24.7/include/linux/vt.h
+===================================================================
+--- linux-2.6.24.7.orig/include/linux/vt.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/linux/vt.h 2008-12-11 22:46:49.000000000 +0100
+@@ -18,8 +18,19 @@ extern int unregister_vt_notifier(struct
+ * resizing).
+ */
+ #define MIN_NR_CONSOLES 1 /* must be at least 1 */
++#if (CONFIG_NR_TTY_DEVICES < 4)
++/* Lower Limit */
++#define MAX_NR_CONSOLES 4 /* serial lines start at 64 */
++#define MAX_NR_USER_CONSOLES 4 /* must be root to allocate above this */
++#elif (CONFIG_NR_TTY_DEVICES > 63)
++/* Upper Limit */
+ #define MAX_NR_CONSOLES 63 /* serial lines start at 64 */
+ #define MAX_NR_USER_CONSOLES 63 /* must be root to allocate above this */
++#else
++/* They chose a sensible number */
++#define MAX_NR_CONSOLES CONFIG_NR_TTY_DEVICES
++#define MAX_NR_USER_CONSOLES CONFIG_NR_TTY_DEVICES
++#endif
+ /* Note: the ioctl VT_GETSTATE does not work for
+ consoles 16 and higher (since it returns a short) */
+
+Index: linux-2.6.24.7/include/sound/soc-dapm.h
+===================================================================
+--- linux-2.6.24.7.orig/include/sound/soc-dapm.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/sound/soc-dapm.h 2008-12-11 22:46:49.000000000 +0100
+@@ -206,6 +206,8 @@ int snd_soc_dapm_sys_add(struct device *
+ /* dapm audio endpoint control */
+ int snd_soc_dapm_set_endpoint(struct snd_soc_codec *codec,
+ char *pin, int status);
++int snd_soc_dapm_get_endpoint(struct snd_soc_codec *codec,
++ char *pin);
+ int snd_soc_dapm_sync_endpoints(struct snd_soc_codec *codec);
+
+ /* dapm widget types */
+Index: linux-2.6.24.7/include/sound/soc.h
+===================================================================
+--- linux-2.6.24.7.orig/include/sound/soc.h 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/include/sound/soc.h 2008-12-11 22:46:49.000000000 +0100
+@@ -410,6 +410,9 @@ struct snd_soc_dai_link {
+
+ /* codec/machine specific init - e.g. add machine controls */
+ int (*init)(struct snd_soc_codec *codec);
++
++ /* DAI pcm */
++ struct snd_pcm *pcm;
+ };
+
+ /* SoC machine */
+@@ -439,6 +442,7 @@ struct snd_soc_device {
+ struct snd_soc_codec *codec;
+ struct snd_soc_codec_device *codec_dev;
+ struct delayed_work delayed_work;
++ struct work_struct deferred_resume_work;
+ void *codec_data;
+ };
+
+Index: linux-2.6.24.7/kernel/power/main.c
+===================================================================
+--- linux-2.6.24.7.orig/kernel/power/main.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/kernel/power/main.c 2008-12-11 22:46:49.000000000 +0100
+@@ -31,6 +31,10 @@ DEFINE_MUTEX(pm_mutex);
+ unsigned int pm_flags;
+ EXPORT_SYMBOL(pm_flags);
+
++int global_inside_suspend;
++EXPORT_SYMBOL(global_inside_suspend);
++
++
+ #ifdef CONFIG_SUSPEND
+
+ /* This is just an arbitrary number */
+@@ -156,10 +160,12 @@ int suspend_devices_and_enter(suspend_st
+ if (!suspend_ops)
+ return -ENOSYS;
+
++ global_inside_suspend = 1;
++
+ if (suspend_ops->set_target) {
+ error = suspend_ops->set_target(state);
+ if (error)
+- return error;
++ goto bail;
+ }
+ suspend_console();
+ error = device_suspend(PMSG_SUSPEND);
+@@ -183,6 +189,8 @@ int suspend_devices_and_enter(suspend_st
+ device_resume();
+ Resume_console:
+ resume_console();
++bail:
++ global_inside_suspend = 0;
+ return error;
+ }
+
+Index: linux-2.6.24.7/kernel/printk.c
+===================================================================
+--- linux-2.6.24.7.orig/kernel/printk.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/kernel/printk.c 2008-12-11 22:46:49.000000000 +0100
+@@ -33,8 +33,11 @@
+ #include <linux/bootmem.h>
+ #include <linux/syscalls.h>
+ #include <linux/jiffies.h>
++#include <linux/suspend.h>
+
+ #include <asm/uaccess.h>
++#include <asm/plat-s3c24xx/neo1973.h>
++#include <asm/arch/gta02.h>
+
+ #define __LOG_BUF_LEN (1 << CONFIG_LOG_BUF_SHIFT)
+
+@@ -61,6 +64,12 @@ int console_printk[4] = {
+ int oops_in_progress;
+ EXPORT_SYMBOL(oops_in_progress);
+
++void (*printk_emergency_debug_spew_init)(void) = NULL;
++EXPORT_SYMBOL(printk_emergency_debug_spew_init);
++
++void (*printk_emergency_debug_spew_send_string)(const char *) = NULL;
++EXPORT_SYMBOL(printk_emergency_debug_spew_send_string);
++
+ /*
+ * console_sem protects the console_drivers list, and also
+ * provides serialisation for access to the entire console
+@@ -653,6 +662,38 @@ asmlinkage int vprintk(const char *fmt,
+ /* Emit the output into the temporary buffer */
+ printed_len = vscnprintf(printk_buf, sizeof(printk_buf), fmt, args);
+
++ /* if you're debugging resume, the normal methods can change resume
++ * ordering behaviours because their debugging output is synchronous
++ * (ie, CONFIG_DEBUG_LL). If your problem is an OOPS, this code
++ * will not affect the speed and duration and ordering of resume
++ * actions, but will give you a chance to read the full undumped
++ * syslog AND the OOPS data when it happens
++ *
++ * if you support it, your debug device init can override the exported
++ * emergency_debug_spew_init and emergency_debug_spew_send_string to
++ * usually force polling or bitbanging on your debug console device
++ */
++ if (oops_in_progress && global_inside_suspend &&
++ printk_emergency_debug_spew_init &&
++ printk_emergency_debug_spew_send_string) {
++ unsigned long cur_index;
++ char ch[2];
++
++ if (global_inside_suspend == 1) {
++ (printk_emergency_debug_spew_init)();
++
++ ch[1] = '\0';
++ cur_index = con_start;
++ while (cur_index != log_end) {
++ ch[0] = LOG_BUF(cur_index);
++ (printk_emergency_debug_spew_send_string)(ch);
++ cur_index++;
++ }
++ global_inside_suspend++; /* only once */
++ }
++ (printk_emergency_debug_spew_send_string)(printk_buf);
++ }
++
+ /*
+ * Copy the output into log_buf. If the caller didn't provide
+ * appropriate log level tags, we insert them here
+Index: linux-2.6.24.7/MAINTAINERS
+===================================================================
+--- linux-2.6.24.7.orig/MAINTAINERS 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/MAINTAINERS 2008-12-11 22:46:49.000000000 +0100
+@@ -1536,6 +1536,14 @@ P: Akinobu Mita
+ M: akinobu.mita@gmail.com
+ S: Supported
+
++FIC/OPENMOKO NEO1973 GSM PHONE
++P: Harald Welte
++M: laforge@openmoko.org
++L: openmoko-kernel@lists.openmoko.org
++W: http://wiki.openmoko.org/wiki/Kernel
++W: http://wiki.openmoko.org/wiki/Neo1973
++S: Maintained
++
+ FRAMEBUFFER LAYER
+ P: Antonino Daplas
+ M: adaplas@gmail.com
+Index: linux-2.6.24.7/makerecovery
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/makerecovery 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,17 @@
++#!/bin/sh
++#
++# make 6MB recovery image from two moredrivers type kernels
++# placed at start and at +4MBytes
++
++if [ -z "$1" ] ; then
++ echo "Usage: $0 uImage-moredrivers-..."
++ exit 1
++fi
++cat $1 > recovery-$1
++SIZE=`ls -l $1 | tr -s ' ' ' ' | cut -d' ' -f5`
++SPACE=$(( 4 * 1024 * 1024 - $SIZE ))
++dd if=/dev/zero of=_spacer bs=1 count=$SPACE
++cat _spacer >> recovery-$1
++rm -f _spacer
++cat $1 >> recovery-$1
++
+Index: linux-2.6.24.7/remote_install_sdcard
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/remote_install_sdcard 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,20 @@
++#!/bin/sh
++
++# automatic kernel updater and reboot - Andy Green <andy@openmoko.com>
++
++GTA_DEVICE_IP=192.168.0.202
++GTA_MOUNTPOINT=/mnt
++
++# you should set up key-based auth on dropbear if you want
++# to play this game.
++#
++# 1) mkdir /home/root/.ssh
++# 2) chown root:root / /home /home/root
++# 3) chmod 700 /home/root /home/root/.ssh
++# 4) copy your id_*.pub into /home/root/.ssh/authorized_keys
++# 5) chmod 600 /home/root/.ssh/*
++
++ssh root@$GTA_DEVICE_IP "mount /dev/mmcblk0p1 $GTA_MOUNTPOINT"
++scp uImage.bin root@$GTA_DEVICE_IP:$GTA_MOUNTPOINT
++ssh root@$GTA_DEVICE_IP "umount $GTA_MOUNTPOINT ; mount /dev/mmcblk0p2 / -oremount,ro ; reboot -if &"
++
+Index: linux-2.6.24.7/scripts/mkuboot.sh
+===================================================================
+--- linux-2.6.24.7.orig/scripts/mkuboot.sh 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/scripts/mkuboot.sh 2008-12-11 22:46:49.000000000 +0100
+@@ -11,7 +11,7 @@ if [ -z "${MKIMAGE}" ]; then
+ if [ -z "${MKIMAGE}" ]; then
+ # Doesn't exist
+ echo '"mkimage" command not found - U-Boot images will not be built' >&2
+- exit 0;
++ exit 1;
+ fi
+ fi
+
+Index: linux-2.6.24.7/sound/soc/codecs/wm8753.c
+===================================================================
+--- linux-2.6.24.7.orig/sound/soc/codecs/wm8753.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/sound/soc/codecs/wm8753.c 2008-12-11 22:46:49.000000000 +0100
+@@ -198,6 +198,7 @@ static const char *wm8753_mic_sel[] = {"
+ static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
+ static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
+ "Channel Swap"};
++static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
+
+ static const struct soc_enum wm8753_enum[] = {
+ SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
+@@ -228,6 +229,7 @@ SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753
+ SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
+ SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
+ SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
++SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
+ };
+
+
+@@ -277,7 +279,7 @@ SOC_DOUBLE_R("Speaker Playback ZC Switch
+
+ SOC_SINGLE("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1),
+ SOC_SINGLE("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1),
+-SOC_SINGLE("Mono Voice Playback Volume", WM8753_MOUTM2, 4, 7, 1),
++SOC_SINGLE("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1),
+ SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
+
+ SOC_ENUM("Bass Boost", wm8753_enum[0]),
+@@ -328,6 +330,7 @@ SOC_SINGLE("Mic1 Capture Volume", WM8753
+ SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
+
+ SOC_ENUM("ADC Data Select", wm8753_enum[27]),
++SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
+ };
+
+ /* add non dapm controls */
+@@ -1582,6 +1585,9 @@ static int wm8753_init(struct snd_soc_de
+ schedule_delayed_work(&codec->delayed_work,
+ msecs_to_jiffies(caps_charge));
+
++ /* Fix reg WM8753_ADCTL2 */
++ wm8753_write(codec, WM8753_ADCTL2, 0x0000);
++
+ /* set the update bits */
+ reg = wm8753_read_reg_cache(codec, WM8753_LDAC);
+ wm8753_write(codec, WM8753_LDAC, reg | 0x0100);
+Index: linux-2.6.24.7/sound/soc/s3c24xx/Kconfig
+===================================================================
+--- linux-2.6.24.7.orig/sound/soc/s3c24xx/Kconfig 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/sound/soc/s3c24xx/Kconfig 2008-12-11 22:46:49.000000000 +0100
+@@ -25,6 +25,21 @@ config SND_S3C24XX_SOC_NEO1973_WM8753
+ Say Y if you want to add support for SoC audio on smdk2440
+ with the WM8753.
+
++config SND_S3C24XX_SOC_NEO1973_WM8753_DEBUG
++ bool "SoC I2S Audio support for NEO1973 - WM8753 debug"
++ depends on SND_S3C24XX_SOC_NEO1973_WM8753
++ help
++ Enable debugging output for the SoC I2S Audio code.
++
++config SND_S3C24XX_SOC_NEO1973_GTA02_WM8753
++ tristate "SoC I2S Audio support for NEO1973 GTA02 - WM8753"
++ depends on SND_S3C24XX_SOC && MACH_NEO1973_GTA02
++ select SND_S3C24XX_SOC_I2S
++ select SND_SOC_WM8753
++ help
++ Say Y if you want to add support for SoC audio on neo1973 gta02
++ with the WM8753 codec
++
+ config SND_S3C24XX_SOC_SMDK2443_WM9710
+ tristate "SoC AC97 Audio support for SMDK2443 - WM9710"
+ depends on SND_S3C24XX_SOC && MACH_SMDK2443
+Index: linux-2.6.24.7/sound/soc/s3c24xx/Makefile
+===================================================================
+--- linux-2.6.24.7.orig/sound/soc/s3c24xx/Makefile 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/sound/soc/s3c24xx/Makefile 2008-12-11 22:46:49.000000000 +0100
+@@ -10,6 +10,9 @@ obj-$(CONFIG_SND_S3C2443_SOC_AC97) += sn
+ # S3C24XX Machine Support
+ snd-soc-neo1973-wm8753-objs := neo1973_wm8753.o
+ snd-soc-smdk2443-wm9710-objs := smdk2443_wm9710.o
++snd-soc-neo1973-gta02-wm8753-objs := neo1973_gta02_wm8753.o
+
+ obj-$(CONFIG_SND_S3C24XX_SOC_NEO1973_WM8753) += snd-soc-neo1973-wm8753.o
+ obj-$(CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710) += snd-soc-smdk2443-wm9710.o
++obj-$(CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753) += snd-soc-neo1973-gta02-wm8753.o
++
+Index: linux-2.6.24.7/sound/soc/s3c24xx/neo1973_gta02_wm8753.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/sound/soc/s3c24xx/neo1973_gta02_wm8753.c 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,667 @@
++/*
++ * neo1973_gta02_wm8753.c -- SoC audio for Neo1973
++ *
++ * Copyright 2007 Openmoko Inc
++ * Author: Graeme Gregory <graeme@openmoko.org>
++ * Copyright 2007 Wolfson Microelectronics PLC.
++ * Author: Graeme Gregory <linux@wolfsonmicro.com>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the
++ * Free Software Foundation; either version 2 of the License, or (at your
++ * option) any later version.
++ *
++ * Revision history
++ * 06th Nov 2007 Changed from GTA01 to GTA02
++ * 20th Jan 2007 Initial version.
++ * 05th Feb 2007 Rename all to Neo1973
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/moduleparam.h>
++#include <linux/timer.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/i2c.h>
++#include <sound/driver.h>
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/soc.h>
++#include <sound/soc-dapm.h>
++
++#include <asm/mach-types.h>
++#include <asm/hardware/scoop.h>
++#include <asm/plat-s3c24xx/regs-iis.h>
++#include <asm/arch/regs-clock.h>
++#include <asm/arch/regs-gpio.h>
++#include <asm/hardware.h>
++#include <asm/arch/audio.h>
++#include <asm/io.h>
++#include <asm/arch/spi-gpio.h>
++#include <asm/arch/regs-gpioj.h>
++#include <asm/arch/gta02.h>
++#include "../codecs/wm8753.h"
++#include "s3c24xx-pcm.h"
++#include "s3c24xx-i2s.h"
++
++/* define the scenarios */
++#define NEO_AUDIO_OFF 0
++#define NEO_GSM_CALL_AUDIO_HANDSET 1
++#define NEO_GSM_CALL_AUDIO_HEADSET 2
++#define NEO_GSM_CALL_AUDIO_BLUETOOTH 3
++#define NEO_STEREO_TO_SPEAKERS 4
++#define NEO_STEREO_TO_HEADPHONES 5
++#define NEO_CAPTURE_HANDSET 6
++#define NEO_CAPTURE_HEADSET 7
++#define NEO_CAPTURE_BLUETOOTH 8
++#define NEO_STEREO_TO_HANDSET_SPK 9
++
++static struct snd_soc_machine neo1973_gta02;
++
++static int neo1973_gta02_hifi_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
++ struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai;
++ unsigned int pll_out = 0, bclk = 0;
++ int ret = 0;
++ unsigned long iis_clkrate;
++
++ iis_clkrate = s3c24xx_i2s_get_clockrate();
++
++ switch (params_rate(params)) {
++ case 8000:
++ case 16000:
++ pll_out = 12288000;
++ break;
++ case 48000:
++ bclk = WM8753_BCLK_DIV_4;
++ pll_out = 12288000;
++ break;
++ case 96000:
++ bclk = WM8753_BCLK_DIV_2;
++ pll_out = 12288000;
++ break;
++ case 11025:
++ bclk = WM8753_BCLK_DIV_16;
++ pll_out = 11289600;
++ break;
++ case 22050:
++ bclk = WM8753_BCLK_DIV_8;
++ pll_out = 11289600;
++ break;
++ case 44100:
++ bclk = WM8753_BCLK_DIV_4;
++ pll_out = 11289600;
++ break;
++ case 88200:
++ bclk = WM8753_BCLK_DIV_2;
++ pll_out = 11289600;
++ break;
++ }
++
++ /* set codec DAI configuration */
++ ret = codec_dai->dai_ops.set_fmt(codec_dai,
++ SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBM_CFM);
++ if (ret < 0)
++ return ret;
++
++ /* set cpu DAI configuration */
++ ret = cpu_dai->dai_ops.set_fmt(cpu_dai,
++ SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBM_CFM);
++ if (ret < 0)
++ return ret;
++
++ /* set the codec system clock for DAC and ADC */
++ ret = codec_dai->dai_ops.set_sysclk(codec_dai, WM8753_MCLK, pll_out,
++ SND_SOC_CLOCK_IN);
++ if (ret < 0)
++ return ret;
++
++ /* set MCLK division for sample rate */
++ ret = cpu_dai->dai_ops.set_clkdiv(cpu_dai, S3C24XX_DIV_MCLK,
++ S3C2410_IISMOD_32FS );
++ if (ret < 0)
++ return ret;
++
++ /* set codec BCLK division for sample rate */
++ ret = codec_dai->dai_ops.set_clkdiv(codec_dai,
++ WM8753_BCLKDIV, bclk);
++ if (ret < 0)
++ return ret;
++
++ /* set prescaler division for sample rate */
++ ret = cpu_dai->dai_ops.set_clkdiv(cpu_dai, S3C24XX_DIV_PRESCALER,
++ S3C24XX_PRESCALE(4,4));
++ if (ret < 0)
++ return ret;
++
++ /* codec PLL input is PCLK/4 */
++ ret = codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL1,
++ iis_clkrate / 4, pll_out);
++ if (ret < 0)
++ return ret;
++
++ return 0;
++}
++
++static int neo1973_gta02_hifi_hw_free(struct snd_pcm_substream *substream)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
++
++ /* disable the PLL */
++ return codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL1, 0, 0);
++}
++
++/*
++ * Neo1973 WM8753 HiFi DAI opserations.
++ */
++static struct snd_soc_ops neo1973_gta02_hifi_ops = {
++ .hw_params = neo1973_gta02_hifi_hw_params,
++ .hw_free = neo1973_gta02_hifi_hw_free,
++};
++
++static int neo1973_gta02_voice_hw_params(
++ struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
++ unsigned int pcmdiv = 0;
++ int ret = 0;
++ unsigned long iis_clkrate;
++
++ iis_clkrate = s3c24xx_i2s_get_clockrate();
++
++ if (params_rate(params) != 8000)
++ return -EINVAL;
++ if (params_channels(params) != 1)
++ return -EINVAL;
++
++ pcmdiv = WM8753_PCM_DIV_6; /* 2.048 MHz */
++
++ /* todo: gg check mode (DSP_B) against CSR datasheet */
++ /* set codec DAI configuration */
++ ret = codec_dai->dai_ops.set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_B |
++ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
++ if (ret < 0)
++ return ret;
++
++ /* set the codec system clock for DAC and ADC */
++ ret = codec_dai->dai_ops.set_sysclk(codec_dai, WM8753_PCMCLK,
++ 12288000, SND_SOC_CLOCK_IN);
++ if (ret < 0)
++ return ret;
++
++ /* set codec PCM division for sample rate */
++ ret = codec_dai->dai_ops.set_clkdiv(codec_dai, WM8753_PCMDIV,
++ pcmdiv);
++ if (ret < 0)
++ return ret;
++
++ /* configue and enable PLL for 12.288MHz output */
++ ret = codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL2,
++ iis_clkrate / 4, 12288000);
++ if (ret < 0)
++ return ret;
++
++ return 0;
++}
++
++static int neo1973_gta02_voice_hw_free(struct snd_pcm_substream *substream)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
++
++ /* disable the PLL */
++ return codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL2, 0, 0);
++}
++
++static struct snd_soc_ops neo1973_gta02_voice_ops = {
++ .hw_params = neo1973_gta02_voice_hw_params,
++ .hw_free = neo1973_gta02_voice_hw_free,
++};
++
++#define LM4853_AMP 1
++#define LM4853_SPK 2
++
++static u8 lm4853_state=0;
++
++static int lm4853_set_state(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ int val = ucontrol->value.integer.value[0];
++
++ if(val) {
++ lm4853_state |= LM4853_AMP;
++ s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT,0);
++ } else {
++ lm4853_state &= ~LM4853_AMP;
++ s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT,1);
++ }
++
++ return 0;
++}
++
++static int lm4853_get_state(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ ucontrol->value.integer.value[0] = lm4853_state & LM4853_AMP;
++
++ return 0;
++}
++
++static int lm4853_set_spk(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ int val = ucontrol->value.integer.value[0];
++
++ if(val) {
++ lm4853_state |= LM4853_SPK;
++ s3c2410_gpio_setpin(GTA02_GPIO_HP_IN,0);
++ } else {
++ lm4853_state &= ~LM4853_SPK;
++ s3c2410_gpio_setpin(GTA02_GPIO_HP_IN,1);
++ }
++
++ return 0;
++}
++
++static int lm4853_get_spk(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ ucontrol->value.integer.value[0] = (lm4853_state & LM4853_SPK) >> 1;
++
++ return 0;
++}
++
++static int neo1973_gta02_set_stereo_out(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
++ int val = ucontrol->value.integer.value[0];
++
++ snd_soc_dapm_set_endpoint(codec, "Stereo Out", val);
++
++ snd_soc_dapm_sync_endpoints(codec);
++
++ return 0;
++}
++
++static int neo1973_gta02_get_stereo_out(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
++
++ ucontrol->value.integer.value[0] =
++ snd_soc_dapm_get_endpoint(codec, "Stereo Out");
++
++ return 0;
++}
++
++
++static int neo1973_gta02_set_gsm_out(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
++ int val = ucontrol->value.integer.value[0];
++
++ snd_soc_dapm_set_endpoint(codec, "GSM Line Out", val);
++
++ snd_soc_dapm_sync_endpoints(codec);
++
++ return 0;
++}
++
++static int neo1973_gta02_get_gsm_out(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
++
++ ucontrol->value.integer.value[0] =
++ snd_soc_dapm_get_endpoint(codec, "GSM Line Out");
++
++ return 0;
++}
++
++static int neo1973_gta02_set_gsm_in(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
++ int val = ucontrol->value.integer.value[0];
++
++ snd_soc_dapm_set_endpoint(codec, "GSM Line In", val);
++
++ snd_soc_dapm_sync_endpoints(codec);
++
++ return 0;
++}
++
++static int neo1973_gta02_get_gsm_in(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
++
++ ucontrol->value.integer.value[0] =
++ snd_soc_dapm_get_endpoint(codec, "GSM Line In");
++
++ return 0;
++}
++
++static int neo1973_gta02_set_headset_mic(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
++ int val = ucontrol->value.integer.value[0];
++
++ snd_soc_dapm_set_endpoint(codec, "Headset Mic", val);
++
++ snd_soc_dapm_sync_endpoints(codec);
++
++ return 0;
++}
++
++static int neo1973_gta02_get_headset_mic(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
++
++ ucontrol->value.integer.value[0] =
++ snd_soc_dapm_get_endpoint(codec, "Headset Mic");
++
++ return 0;
++}
++
++static int neo1973_gta02_set_handset_mic(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
++ int val = ucontrol->value.integer.value[0];
++
++ snd_soc_dapm_set_endpoint(codec, "Handset Mic", val);
++
++ snd_soc_dapm_sync_endpoints(codec);
++
++ return 0;
++}
++
++static int neo1973_gta02_get_handset_mic(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
++
++ ucontrol->value.integer.value[0] =
++ snd_soc_dapm_get_endpoint(codec, "Handset Mic");
++
++ return 0;
++}
++
++static int neo1973_gta02_set_handset_spk(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
++ int val = ucontrol->value.integer.value[0];
++
++ snd_soc_dapm_set_endpoint(codec, "Handset Spk", val);
++
++ snd_soc_dapm_sync_endpoints(codec);
++
++ return 0;
++}
++
++static int neo1973_gta02_get_handset_spk(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
++
++ ucontrol->value.integer.value[0] =
++ snd_soc_dapm_get_endpoint(codec, "Handset Spk");
++
++ return 0;
++}
++
++static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
++ SND_SOC_DAPM_LINE("Stereo Out", NULL),
++ SND_SOC_DAPM_LINE("GSM Line Out", NULL),
++ SND_SOC_DAPM_LINE("GSM Line In", NULL),
++ SND_SOC_DAPM_MIC("Headset Mic", NULL),
++ SND_SOC_DAPM_MIC("Handset Mic", NULL),
++ SND_SOC_DAPM_SPK("Handset Spk", NULL),
++};
++
++
++/* example machine audio_mapnections */
++static const char* audio_map[][3] = {
++
++ /* Connections to the lm4853 amp */
++ {"Stereo Out", NULL, "LOUT1"},
++ {"Stereo Out", NULL, "ROUT1"},
++
++ /* Connections to the GSM Module */
++ {"GSM Line Out", NULL, "MONO1"},
++ {"GSM Line Out", NULL, "MONO2"},
++ {"RXP", NULL, "GSM Line In"},
++ {"RXN", NULL, "GSM Line In"},
++
++ /* Connections to Headset */
++ {"MIC1", NULL, "Mic Bias"},
++ {"Mic Bias", NULL, "Headset Mic"},
++
++ /* Call Mic */
++ {"MIC2", NULL, "Mic Bias"},
++ {"MIC2N", NULL, "Mic Bias"},
++ {"Mic Bias", NULL, "Handset Mic"},
++
++ /* Call Speaker */
++ {"Handset Spk", NULL, "LOUT2"},
++ {"Handset Spk", NULL, "ROUT2"},
++
++ /* Connect the ALC pins */
++ {"ACIN", NULL, "ACOP"},
++
++ {NULL, NULL, NULL},
++};
++
++static const struct snd_kcontrol_new wm8753_neo1973_gta02_controls[] = {
++ SOC_SINGLE_EXT("DAPM Stereo Out Switch", 0, 0, 1, 0,
++ neo1973_gta02_get_stereo_out,
++ neo1973_gta02_set_stereo_out),
++ SOC_SINGLE_EXT("DAPM GSM Line Out Switch", 1, 0, 1, 0,
++ neo1973_gta02_get_gsm_out,
++ neo1973_gta02_set_gsm_out),
++ SOC_SINGLE_EXT("DAPM GSM Line In Switch", 2, 0, 1, 0,
++ neo1973_gta02_get_gsm_in,
++ neo1973_gta02_set_gsm_in),
++ SOC_SINGLE_EXT("DAPM Headset Mic Switch", 3, 0, 1, 0,
++ neo1973_gta02_get_headset_mic,
++ neo1973_gta02_set_headset_mic),
++ SOC_SINGLE_EXT("DAPM Handset Mic Switch", 4, 0, 1, 0,
++ neo1973_gta02_get_handset_mic,
++ neo1973_gta02_set_handset_mic),
++ SOC_SINGLE_EXT("DAPM Handset Spk Switch", 5, 0, 1, 0,
++ neo1973_gta02_get_handset_spk,
++ neo1973_gta02_set_handset_spk),
++ SOC_SINGLE_EXT("Amp State Switch", 6, 0, 1, 0,
++ lm4853_get_state,
++ lm4853_set_state),
++ SOC_SINGLE_EXT("Amp Spk Switch", 7, 0, 1, 0,
++ lm4853_get_spk,
++ lm4853_set_spk),
++};
++
++/*
++ * This is an example machine initialisation for a wm8753 connected to a
++ * neo1973 GTA02.
++ */
++static int neo1973_gta02_wm8753_init(struct snd_soc_codec *codec)
++{
++ int i, err;
++
++ /* set up NC codec pins */
++ snd_soc_dapm_set_endpoint(codec, "OUT3", 0);
++ snd_soc_dapm_set_endpoint(codec, "OUT4", 0);
++ snd_soc_dapm_set_endpoint(codec, "LINE1", 0);
++ snd_soc_dapm_set_endpoint(codec, "LINE2", 0);
++
++ /* Add neo1973 gta02 specific widgets */
++ for (i = 0; i < ARRAY_SIZE(wm8753_dapm_widgets); i++)
++ snd_soc_dapm_new_control(codec, &wm8753_dapm_widgets[i]);
++
++ /* add neo1973 gta02 specific controls */
++ for (i = 0; i < ARRAY_SIZE(wm8753_neo1973_gta02_controls); i++) {
++ err = snd_ctl_add(codec->card,
++ snd_soc_cnew(&wm8753_neo1973_gta02_controls[i],
++ codec, NULL));
++ if (err < 0)
++ return err;
++ }
++
++ /* set up neo1973 gta02 specific audio path audio_mapnects */
++ for (i = 0; audio_map[i][0] != NULL; i++) {
++ snd_soc_dapm_connect_input(codec, audio_map[i][0],
++ audio_map[i][1], audio_map[i][2]);
++ }
++
++ /* set endpoints to default off mode */
++ snd_soc_dapm_set_endpoint(codec, "Stereo Out", 0);
++ snd_soc_dapm_set_endpoint(codec, "GSM Line Out",0);
++ snd_soc_dapm_set_endpoint(codec, "GSM Line In", 0);
++ snd_soc_dapm_set_endpoint(codec, "Headset Mic", 0);
++ snd_soc_dapm_set_endpoint(codec, "Handset Mic", 0);
++ snd_soc_dapm_set_endpoint(codec, "Handset Spk", 0);
++
++ snd_soc_dapm_sync_endpoints(codec);
++ return 0;
++}
++
++/*
++ * BT Codec DAI
++ */
++static struct snd_soc_cpu_dai bt_dai =
++{ .name = "Bluetooth",
++ .id = 0,
++ .type = SND_SOC_DAI_PCM,
++ .playback = {
++ .channels_min = 1,
++ .channels_max = 1,
++ .rates = SNDRV_PCM_RATE_8000,
++ .formats = SNDRV_PCM_FMTBIT_S16_LE,},
++ .capture = {
++ .channels_min = 1,
++ .channels_max = 1,
++ .rates = SNDRV_PCM_RATE_8000,
++ .formats = SNDRV_PCM_FMTBIT_S16_LE,},
++};
++
++static struct snd_soc_dai_link neo1973_gta02_dai[] = {
++{ /* Hifi Playback - for similatious use with voice below */
++ .name = "WM8753",
++ .stream_name = "WM8753 HiFi",
++ .cpu_dai = &s3c24xx_i2s_dai,
++ .codec_dai = &wm8753_dai[WM8753_DAI_HIFI],
++ .init = neo1973_gta02_wm8753_init,
++ .ops = &neo1973_gta02_hifi_ops,
++},
++{ /* Voice via BT */
++ .name = "Bluetooth",
++ .stream_name = "Voice",
++ .cpu_dai = &bt_dai,
++ .codec_dai = &wm8753_dai[WM8753_DAI_VOICE],
++ .ops = &neo1973_gta02_voice_ops,
++},
++};
++
++#ifdef CONFIG_PM
++int neo1973_gta02_suspend(struct platform_device *pdev, pm_message_t state)
++{
++ s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT, 1);
++
++ return 0;
++}
++
++int neo1973_gta02_resume(struct platform_device *pdev)
++{
++ if(lm4853_state & LM4853_AMP)
++ s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT, 0);
++
++ return 0;
++}
++#else
++#define neo1973_gta02_suspend NULL
++#define neo1973_gta02_resume NULL
++#endif
++
++static struct snd_soc_machine neo1973_gta02 = {
++ .name = "neo1973-gta02",
++ .suspend_pre = neo1973_gta02_suspend,
++ .resume_post = neo1973_gta02_resume,
++ .dai_link = neo1973_gta02_dai,
++ .num_links = ARRAY_SIZE(neo1973_gta02_dai),
++};
++
++static struct wm8753_setup_data neo1973_gta02_wm8753_setup = {
++ .i2c_address = 0x1a,
++};
++
++static struct snd_soc_device neo1973_gta02_snd_devdata = {
++ .machine = &neo1973_gta02,
++ .platform = &s3c24xx_soc_platform,
++ .codec_dev = &soc_codec_dev_wm8753,
++ .codec_data = &neo1973_gta02_wm8753_setup,
++};
++
++static struct platform_device *neo1973_gta02_snd_device;
++
++static int __init neo1973_gta02_init(void)
++{
++ int ret;
++
++ if (!machine_is_neo1973_gta02()) {
++ printk(KERN_INFO
++ "Only GTA02 hardware supported by ASoc driver\n");
++ return -ENODEV;
++ }
++
++ neo1973_gta02_snd_device = platform_device_alloc("soc-audio", -1);
++ if (!neo1973_gta02_snd_device)
++ return -ENOMEM;
++
++ platform_set_drvdata(neo1973_gta02_snd_device,
++ &neo1973_gta02_snd_devdata);
++ neo1973_gta02_snd_devdata.dev = &neo1973_gta02_snd_device->dev;
++ ret = platform_device_add(neo1973_gta02_snd_device);
++
++ if (ret)
++ platform_device_put(neo1973_gta02_snd_device);
++
++ /* Initialise GPIOs used by amp */
++ s3c2410_gpio_cfgpin(GTA02_GPIO_HP_IN, S3C2410_GPIO_OUTPUT);
++ s3c2410_gpio_cfgpin(GTA02_GPIO_AMP_SHUT, S3C2410_GPIO_OUTPUT);
++
++ /* Amp off by default */
++ s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT, 1);
++
++ /* Speaker off by default */
++ s3c2410_gpio_setpin(GTA02_GPIO_HP_IN, 1);
++
++ return ret;
++}
++
++static void __exit neo1973_gta02_exit(void)
++{
++ platform_device_unregister(neo1973_gta02_snd_device);
++}
++
++module_init(neo1973_gta02_init);
++module_exit(neo1973_gta02_exit);
++
++/* Module information */
++MODULE_AUTHOR("Graeme Gregory, graeme@openmoko.org");
++MODULE_DESCRIPTION("ALSA SoC WM8753 Neo1973 GTA02");
++MODULE_LICENSE("GPL");
++
+Index: linux-2.6.24.7/sound/soc/s3c24xx/neo1973_wm8753.c
+===================================================================
+--- linux-2.6.24.7.orig/sound/soc/s3c24xx/neo1973_wm8753.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/sound/soc/s3c24xx/neo1973_wm8753.c 2008-12-11 22:46:49.000000000 +0100
+@@ -30,18 +30,29 @@
+
+ #include <asm/mach-types.h>
+ #include <asm/hardware/scoop.h>
+-#include <asm/arch/regs-iis.h>
+ #include <asm/arch/regs-clock.h>
+ #include <asm/arch/regs-gpio.h>
+ #include <asm/hardware.h>
+ #include <asm/arch/audio.h>
+ #include <asm/io.h>
+ #include <asm/arch/spi-gpio.h>
++
++#include <asm/plat-s3c24xx/regs-iis.h>
++
+ #include "../codecs/wm8753.h"
+ #include "lm4857.h"
+ #include "s3c24xx-pcm.h"
+ #include "s3c24xx-i2s.h"
+
++/* Debugging stuff */
++#ifdef SND_S3C24XX_SOC_NEO1973_WM8753_DEBUG
++static int debug = 1;
++#else
++static int debug = 0;
++#endif
++
++#define dprintk(msg...) if (debug) { printk(KERN_DEBUG "wm8753: " msg); }
++
+ /* define the scenarios */
+ #define NEO_AUDIO_OFF 0
+ #define NEO_GSM_CALL_AUDIO_HANDSET 1
+@@ -66,6 +77,8 @@ static int neo1973_hifi_hw_params(struct
+ int ret = 0;
+ unsigned long iis_clkrate;
+
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ iis_clkrate = s3c24xx_i2s_get_clockrate();
+
+ switch (params_rate(params)) {
+@@ -150,6 +163,8 @@ static int neo1973_hifi_hw_free(struct s
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
+
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ /* disable the PLL */
+ return codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL1, 0, 0);
+ }
+@@ -171,6 +186,8 @@ static int neo1973_voice_hw_params(struc
+ int ret = 0;
+ unsigned long iis_clkrate;
+
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ iis_clkrate = s3c24xx_i2s_get_clockrate();
+
+ if (params_rate(params) != 8000)
+@@ -212,6 +229,8 @@ static int neo1973_voice_hw_free(struct
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
+
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ /* disable the PLL */
+ return codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL2, 0, 0);
+ }
+@@ -226,12 +245,16 @@ static int neo1973_scenario = 0;
+ static int neo1973_get_scenario(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+ {
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ ucontrol->value.integer.value[0] = neo1973_scenario;
+ return 0;
+ }
+
+ static int set_scenario_endpoints(struct snd_soc_codec *codec, int scenario)
+ {
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ switch(neo1973_scenario) {
+ case NEO_AUDIO_OFF:
+ snd_soc_dapm_set_endpoint(codec, "Audio Out", 0);
+@@ -314,6 +337,8 @@ static int neo1973_set_scenario(struct s
+ {
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ if (neo1973_scenario == ucontrol->value.integer.value[0])
+ return 0;
+
+@@ -326,6 +351,8 @@ static u8 lm4857_regs[4] = {0x00, 0x40,
+
+ static void lm4857_write_regs(void)
+ {
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ if (i2c_master_send(i2c, lm4857_regs, 4) != 4)
+ printk(KERN_ERR "lm4857: i2c write failed\n");
+ }
+@@ -337,6 +364,8 @@ static int lm4857_get_reg(struct snd_kco
+ int shift = (kcontrol->private_value >> 8) & 0x0F;
+ int mask = (kcontrol->private_value >> 16) & 0xFF;
+
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ ucontrol->value.integer.value[0] = (lm4857_regs[reg] >> shift) & mask;
+ return 0;
+ }
+@@ -348,6 +377,8 @@ static int lm4857_set_reg(struct snd_kco
+ int shift = (kcontrol->private_value >> 8) & 0x0F;
+ int mask = (kcontrol->private_value >> 16) & 0xFF;
+
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ if (((lm4857_regs[reg] >> shift ) & mask) ==
+ ucontrol->value.integer.value[0])
+ return 0;
+@@ -363,6 +394,8 @@ static int lm4857_get_mode(struct snd_kc
+ {
+ u8 value = lm4857_regs[LM4857_CTRL] & 0x0F;
+
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ if (value)
+ value -= 5;
+
+@@ -375,6 +408,8 @@ static int lm4857_set_mode(struct snd_kc
+ {
+ u8 value = ucontrol->value.integer.value[0];
+
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ if (value)
+ value += 5;
+
+@@ -482,6 +517,8 @@ static int neo1973_wm8753_init(struct sn
+ {
+ int i, err;
+
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ /* set up NC codec pins */
+ snd_soc_dapm_set_endpoint(codec, "LOUT2", 0);
+ snd_soc_dapm_set_endpoint(codec, "ROUT2", 0);
+@@ -582,6 +619,8 @@ static int lm4857_amp_probe(struct i2c_a
+ {
+ int ret;
+
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ client_template.adapter = adap;
+ client_template.addr = addr;
+
+@@ -605,6 +644,8 @@ exit_err:
+
+ static int lm4857_i2c_detach(struct i2c_client *client)
+ {
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ i2c_detach_client(client);
+ kfree(client);
+ return 0;
+@@ -612,9 +653,46 @@ static int lm4857_i2c_detach(struct i2c_
+
+ static int lm4857_i2c_attach(struct i2c_adapter *adap)
+ {
++ dprintk("Entered %s\n", __FUNCTION__);
++
+ return i2c_probe(adap, &addr_data, lm4857_amp_probe);
+ }
+
++static u8 lm4857_state;
++
++static int lm4857_suspend(struct i2c_client *dev, pm_message_t state)
++{
++ dprintk("Entered %s\n", __FUNCTION__);
++
++ dev_dbg(&dev->dev, "lm4857_suspend\n");
++ lm4857_state = lm4857_regs[LM4857_CTRL] & 0xf;
++ if (lm4857_state) {
++ lm4857_regs[LM4857_CTRL] &= 0xf0;
++ lm4857_write_regs();
++ }
++ return 0;
++}
++
++static int lm4857_resume(struct i2c_client *dev)
++{
++ dprintk("Entered %s\n", __FUNCTION__);
++
++ if (lm4857_state) {
++ lm4857_regs[LM4857_CTRL] |= (lm4857_state & 0x0f);
++ lm4857_write_regs();
++ }
++ return 0;
++}
++
++static void lm4857_shutdown(struct i2c_client *dev)
++{
++ dprintk("Entered %s\n", __FUNCTION__);
++
++ dev_dbg(&dev->dev, "lm4857_shutdown\n");
++ lm4857_regs[LM4857_CTRL] &= 0xf0;
++ lm4857_write_regs();
++}
++
+ /* corgi i2c codec control layer */
+ static struct i2c_driver lm4857_i2c_driver = {
+ .driver = {
+@@ -622,6 +700,9 @@ static struct i2c_driver lm4857_i2c_driv
+ .owner = THIS_MODULE,
+ },
+ .id = I2C_DRIVERID_LM4857,
++ .suspend = lm4857_suspend,
++ .resume = lm4857_resume,
++ .shutdown = lm4857_shutdown,
+ .attach_adapter = lm4857_i2c_attach,
+ .detach_client = lm4857_i2c_detach,
+ .command = NULL,
+@@ -638,6 +719,14 @@ static int __init neo1973_init(void)
+ {
+ int ret;
+
++ dprintk("Entered %s\n", __FUNCTION__);
++
++ if (!machine_is_neo1973_gta01()) {
++ printk(KERN_INFO
++ "Only GTA01 hardware supported by ASoc driver\n");
++ return -ENODEV;
++ }
++
+ neo1973_snd_device = platform_device_alloc("soc-audio", -1);
+ if (!neo1973_snd_device)
+ return -ENOMEM;
+@@ -658,6 +747,9 @@ static int __init neo1973_init(void)
+
+ static void __exit neo1973_exit(void)
+ {
++ dprintk("Entered %s\n", __FUNCTION__);
++
++ i2c_del_driver(&lm4857_i2c_driver);
+ platform_device_unregister(neo1973_snd_device);
+ }
+
+@@ -666,5 +758,5 @@ module_exit(neo1973_exit);
+
+ /* Module information */
+ MODULE_AUTHOR("Graeme Gregory, graeme.gregory@wolfsonmicro.com, www.wolfsonmicro.com");
+-MODULE_DESCRIPTION("ALSA SoC WM8753 Neo1973");
++MODULE_DESCRIPTION("ALSA SoC WM8753 Neo1973 GTA01");
+ MODULE_LICENSE("GPL");
+Index: linux-2.6.24.7/sound/soc/s3c24xx/s3c24xx-i2s.c
+===================================================================
+--- linux-2.6.24.7.orig/sound/soc/s3c24xx/s3c24xx-i2s.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/sound/soc/s3c24xx/s3c24xx-i2s.c 2008-12-11 22:46:49.000000000 +0100
+@@ -33,19 +33,20 @@
+
+ #include <asm/hardware.h>
+ #include <asm/io.h>
+-#include <asm/arch/regs-iis.h>
+ #include <asm/arch/regs-gpio.h>
+ #include <asm/arch/regs-clock.h>
+ #include <asm/arch/audio.h>
+ #include <asm/dma.h>
+ #include <asm/arch/dma.h>
+
++#include <asm/plat-s3c24xx/regs-iis.h>
++
+ #include "s3c24xx-pcm.h"
+ #include "s3c24xx-i2s.h"
+
+ #define S3C24XX_I2S_DEBUG 0
+ #if S3C24XX_I2S_DEBUG
+-#define DBG(x...) printk(KERN_DEBUG x)
++#define DBG(x...) printk(KERN_DEBUG "s3c24xx-i2s: " x)
+ #else
+ #define DBG(x...)
+ #endif
+@@ -75,6 +76,10 @@ static struct s3c24xx_pcm_dma_params s3c
+ struct s3c24xx_i2s_info {
+ void __iomem *regs;
+ struct clk *iis_clk;
++ u32 iiscon;
++ u32 iismod;
++ u32 iisfcon;
++ u32 iispsr;
+ };
+ static struct s3c24xx_i2s_info s3c24xx_i2s;
+
+@@ -175,7 +180,7 @@ static void s3c24xx_snd_rxctrl(int on)
+ static int s3c24xx_snd_lrsync(void)
+ {
+ u32 iiscon;
+- unsigned long timeout = jiffies + msecs_to_jiffies(5);
++ int timeout = 5; /* 500us, 125 should be enough at 8kHz */
+
+ DBG("Entered %s\n", __FUNCTION__);
+
+@@ -184,8 +189,9 @@ static int s3c24xx_snd_lrsync(void)
+ if (iiscon & S3C2410_IISCON_LRINDEX)
+ break;
+
+- if (timeout < jiffies)
++ if (!--timeout)
+ return -ETIMEDOUT;
++ udelay(100);
+ }
+
+ return 0;
+@@ -279,11 +285,14 @@ static int s3c24xx_i2s_trigger(struct sn
+ case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_RESUME:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+- if (!s3c24xx_snd_is_clkmaster()) {
+- ret = s3c24xx_snd_lrsync();
+- if (ret)
+- goto exit_err;
+- }
++ if (!s3c24xx_snd_is_clkmaster())
++ /* we ignore the return code, if it sync'd then fine,
++ * if it didn't sync, which happens after resume the
++ * first time when there was a live stream at suspend,
++ * just let it timeout, the stream picks up OK after
++ * that and LRCK is evidently working again.
++ */
++ s3c24xx_snd_lrsync();
+
+ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
+ s3c24xx_snd_rxctrl(1);
+@@ -405,6 +414,40 @@ static int s3c24xx_i2s_probe(struct plat
+ return 0;
+ }
+
++#ifdef CONFIG_PM
++int s3c24xx_i2s_suspend(struct platform_device *pdev,
++ struct snd_soc_cpu_dai *cpu_dai)
++{
++ DBG("Entered %s\n", __FUNCTION__);
++ s3c24xx_i2s.iiscon = readl(s3c24xx_i2s.regs + S3C2410_IISCON);
++ s3c24xx_i2s.iismod = readl(s3c24xx_i2s.regs + S3C2410_IISMOD);
++ s3c24xx_i2s.iisfcon = readl(s3c24xx_i2s.regs + S3C2410_IISFCON);
++ s3c24xx_i2s.iispsr = readl(s3c24xx_i2s.regs + S3C2410_IISPSR);
++
++ clk_disable(s3c24xx_i2s.iis_clk);
++
++ return 0;
++}
++
++int s3c24xx_i2s_resume(struct platform_device *pdev,
++ struct snd_soc_cpu_dai *cpu_dai)
++{
++ DBG("Entered %s\n", __FUNCTION__);
++ clk_enable(s3c24xx_i2s.iis_clk);
++
++ writel(s3c24xx_i2s.iiscon, s3c24xx_i2s.regs + S3C2410_IISCON);
++ writel(s3c24xx_i2s.iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
++ writel(s3c24xx_i2s.iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON);
++ writel(s3c24xx_i2s.iispsr, s3c24xx_i2s.regs + S3C2410_IISPSR);
++
++ return 0;
++}
++#else
++#define s3c24xx_i2s_suspend NULL
++#define s3c24xx_i2s_resume NULL
++#endif
++
++
+ #define S3C24XX_I2S_RATES \
+ (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \
+ SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
+@@ -415,6 +458,8 @@ struct snd_soc_cpu_dai s3c24xx_i2s_dai =
+ .id = 0,
+ .type = SND_SOC_DAI_I2S,
+ .probe = s3c24xx_i2s_probe,
++ .suspend = s3c24xx_i2s_suspend,
++ .resume = s3c24xx_i2s_resume,
+ .playback = {
+ .channels_min = 2,
+ .channels_max = 2,
+Index: linux-2.6.24.7/sound/soc/s3c24xx/s3c24xx-pcm.c
+===================================================================
+--- linux-2.6.24.7.orig/sound/soc/s3c24xx/s3c24xx-pcm.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/sound/soc/s3c24xx/s3c24xx-pcm.c 2008-12-11 22:46:49.000000000 +0100
+@@ -40,7 +40,7 @@
+
+ #define S3C24XX_PCM_DEBUG 0
+ #if S3C24XX_PCM_DEBUG
+-#define DBG(x...) printk(KERN_DEBUG x)
++#define DBG(x...) printk(KERN_DEBUG "s3c24xx-pcm: " x)
+ #else
+ #define DBG(x...)
+ #endif
+@@ -49,7 +49,9 @@ static const struct snd_pcm_hardware s3c
+ .info = SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+ SNDRV_PCM_INFO_MMAP |
+- SNDRV_PCM_INFO_MMAP_VALID,
++ SNDRV_PCM_INFO_MMAP_VALID |
++ SNDRV_PCM_INFO_PAUSE |
++ SNDRV_PCM_INFO_RESUME,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_U16_LE |
+ SNDRV_PCM_FMTBIT_U8 |
+@@ -176,28 +178,6 @@ static int s3c24xx_pcm_hw_params(struct
+ }
+ }
+
+- /* channel needs configuring for mem=>device, increment memory addr,
+- * sync to pclk, half-word transfers to the IIS-FIFO. */
+- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+- s3c2410_dma_devconfig(prtd->params->channel,
+- S3C2410_DMASRC_MEM, S3C2410_DISRCC_INC |
+- S3C2410_DISRCC_APB, prtd->params->dma_addr);
+-
+- s3c2410_dma_config(prtd->params->channel,
+- prtd->params->dma_size,
+- S3C2410_DCON_SYNC_PCLK |
+- S3C2410_DCON_HANDSHAKE);
+- } else {
+- s3c2410_dma_config(prtd->params->channel,
+- prtd->params->dma_size,
+- S3C2410_DCON_HANDSHAKE |
+- S3C2410_DCON_SYNC_PCLK);
+-
+- s3c2410_dma_devconfig(prtd->params->channel,
+- S3C2410_DMASRC_HW, 0x3,
+- prtd->params->dma_addr);
+- }
+-
+ s3c2410_dma_set_buffdone_fn(prtd->params->channel,
+ s3c24xx_audio_buffdone);
+
+@@ -246,6 +226,28 @@ static int s3c24xx_pcm_prepare(struct sn
+ if (!prtd->params)
+ return 0;
+
++ /* channel needs configuring for mem=>device, increment memory addr,
++ * sync to pclk, half-word transfers to the IIS-FIFO. */
++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
++ s3c2410_dma_devconfig(prtd->params->channel,
++ S3C2410_DMASRC_MEM, S3C2410_DISRCC_INC |
++ S3C2410_DISRCC_APB, prtd->params->dma_addr);
++
++ s3c2410_dma_config(prtd->params->channel,
++ prtd->params->dma_size,
++ S3C2410_DCON_SYNC_PCLK |
++ S3C2410_DCON_HANDSHAKE);
++ } else {
++ s3c2410_dma_config(prtd->params->channel,
++ prtd->params->dma_size,
++ S3C2410_DCON_HANDSHAKE |
++ S3C2410_DCON_SYNC_PCLK);
++
++ s3c2410_dma_devconfig(prtd->params->channel,
++ S3C2410_DMASRC_HW, 0x3,
++ prtd->params->dma_addr);
++ }
++
+ /* flush the DMA channel */
+ s3c2410_dma_ctrl(prtd->params->channel, S3C2410_DMAOP_FLUSH);
+ prtd->dma_loaded = 0;
+Index: linux-2.6.24.7/sound/soc/soc-core.c
+===================================================================
+--- linux-2.6.24.7.orig/sound/soc/soc-core.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/sound/soc/soc-core.c 2008-12-11 22:46:49.000000000 +0100
+@@ -632,6 +632,16 @@ static int soc_suspend(struct platform_d
+ struct snd_soc_codec *codec = socdev->codec;
+ int i;
+
++ /* Due to the resume being scheduled into a workqueue we could
++ * suspend before that's finished - wait for it to complete.
++ */
++ snd_power_lock(codec->card);
++ snd_power_wait(codec->card, SNDRV_CTL_POWER_D0);
++ snd_power_unlock(codec->card);
++
++ /* we're going to block userspace touching us until resume completes */
++ snd_power_change_state(codec->card, SNDRV_CTL_POWER_D3hot);
++
+ /* mute any active DAC's */
+ for(i = 0; i < machine->num_links; i++) {
+ struct snd_soc_codec_dai *dai = machine->dai_link[i].codec_dai;
+@@ -639,6 +649,10 @@ static int soc_suspend(struct platform_d
+ dai->dai_ops.digital_mute(dai, 1);
+ }
+
++ /* suspend all pcm's */
++ for(i = 0; i < machine->num_links; i++)
++ snd_pcm_suspend_all(machine->dai_link[i].pcm);
++
+ if (machine->suspend_pre)
+ machine->suspend_pre(pdev, state);
+
+@@ -680,16 +694,27 @@ static int soc_suspend(struct platform_d
+ return 0;
+ }
+
+-/* powers up audio subsystem after a suspend */
+-static int soc_resume(struct platform_device *pdev)
++/* deferred resume work, so resume can complete before we finished
++ * setting our codec back up, which can be very slow on I2C
++ */
++static void soc_resume_deferred(struct work_struct *work)
+ {
+- struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+- struct snd_soc_machine *machine = socdev->machine;
+- struct snd_soc_platform *platform = socdev->platform;
+- struct snd_soc_codec_device *codec_dev = socdev->codec_dev;
++ struct snd_soc_device *socdev = container_of(work,
++ struct snd_soc_device,
++ deferred_resume_work);
++ struct snd_soc_machine *machine = socdev->machine;
++ struct snd_soc_platform *platform = socdev->platform;
++ struct snd_soc_codec_device *codec_dev = socdev->codec_dev;
+ struct snd_soc_codec *codec = socdev->codec;
++ struct platform_device *pdev = to_platform_device(socdev->dev);
+ int i;
+
++ /* our power state is still SNDRV_CTL_POWER_D3hot from suspend time,
++ * so userspace apps are blocked from touching us
++ */
++
++ dev_info(socdev->dev, "starting resume work\n");
++
+ if (machine->resume_pre)
+ machine->resume_pre(pdev);
+
+@@ -731,6 +756,22 @@ static int soc_resume(struct platform_de
+ if (machine->resume_post)
+ machine->resume_post(pdev);
+
++ dev_info(socdev->dev, "resume work completed\n");
++
++ /* userspace can access us now we are back as we were before */
++ snd_power_change_state(codec->card, SNDRV_CTL_POWER_D0);
++}
++
++/* powers up audio subsystem after a suspend */
++static int soc_resume(struct platform_device *pdev)
++{
++ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
++
++ dev_info(socdev->dev, "scheduling resume work\n");
++
++ if (!schedule_work(&socdev->deferred_resume_work))
++ dev_err(socdev->dev, "work item may be lost\n");
++
+ return 0;
+ }
+
+@@ -777,6 +818,9 @@ static int soc_probe(struct platform_dev
+
+ /* DAPM stream work */
+ INIT_DELAYED_WORK(&socdev->delayed_work, close_delayed_work);
++ /* deferred resume work */
++ INIT_WORK(&socdev->deferred_resume_work, soc_resume_deferred);
++
+ return 0;
+
+ platform_err:
+@@ -873,6 +917,7 @@ static int soc_new_pcm(struct snd_soc_de
+ return ret;
+ }
+
++ dai_link->pcm = pcm;
+ pcm->private_data = rtd;
+ soc_pcm_ops.mmap = socdev->platform->pcm_ops->mmap;
+ soc_pcm_ops.pointer = socdev->platform->pcm_ops->pointer;
+@@ -923,6 +968,38 @@ static ssize_t codec_reg_show(struct dev
+ }
+ static DEVICE_ATTR(codec_reg, 0444, codec_reg_show, NULL);
+
++
++static ssize_t codec_reg_write(struct device *dev,
++ struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ u32 address;
++ u32 data;
++ char * end;
++ size_t left = count;
++ struct snd_soc_device *devdata = dev_get_drvdata(dev);
++ struct snd_soc_codec *codec = devdata->codec;
++
++ address = simple_strtoul(buf, &end, 16);
++ left -= (int)(end - buf);
++ while ((*end == ' ') && (left)) {
++ end++;
++ left--;
++ }
++ if (!left)
++ return count;
++ data = simple_strtoul(end, &end, 16);
++
++ printk(KERN_INFO"user writes Codec reg 0x%02X with Data 0x%04X\n",
++ address, data);
++
++ codec->write(codec, address, data);
++
++ return count;
++}
++
++static DEVICE_ATTR(codec_reg_write, 0644, NULL, codec_reg_write);
++
+ /**
+ * snd_soc_new_ac97_codec - initailise AC97 device
+ * @codec: audio codec
+@@ -1134,6 +1211,9 @@ int snd_soc_register_card(struct snd_soc
+ err = device_create_file(socdev->dev, &dev_attr_codec_reg);
+ if (err < 0)
+ printk(KERN_WARNING "asoc: failed to add codec sysfs entries\n");
++ err = device_create_file(socdev->dev, &dev_attr_codec_reg_write);
++ if (err < 0)
++ printk(KERN_WARNING "asoc: failed to add codec sysfs entries\n");
+ out:
+ mutex_unlock(&codec->mutex);
+ return ret;
+Index: linux-2.6.24.7/sound/soc/soc-dapm.c
+===================================================================
+--- linux-2.6.24.7.orig/sound/soc/soc-dapm.c 2008-12-11 22:46:07.000000000 +0100
++++ linux-2.6.24.7/sound/soc/soc-dapm.c 2008-12-11 22:46:49.000000000 +0100
+@@ -1305,6 +1305,30 @@ int snd_soc_dapm_set_endpoint(struct snd
+ EXPORT_SYMBOL_GPL(snd_soc_dapm_set_endpoint);
+
+ /**
++ * snd_soc_dapm_get_endpoint - get audio endpoint status
++ * @codec: audio codec
++ * @endpoint: audio signal endpoint (or start point)
++ *
++ * Get audio endpoint status - connected or disconnected.
++ *
++ * Returns status
++ */
++int snd_soc_dapm_get_endpoint(struct snd_soc_codec *codec,
++ char *endpoint)
++{
++ struct snd_soc_dapm_widget *w;
++
++ list_for_each_entry(w, &codec->dapm_widgets, list) {
++ if (!strcmp(w->name, endpoint)) {
++ return w->connected;
++ }
++ }
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(snd_soc_dapm_get_endpoint);
++
++/**
+ * snd_soc_dapm_free - free dapm resources
+ * @socdev: SoC device
+ *
+Index: linux-2.6.24.7/synthesize-gta-module-configs.mak
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.24.7/synthesize-gta-module-configs.mak 2008-12-11 22:46:49.000000000 +0100
+@@ -0,0 +1,9 @@
++all: defconfig-gta01 defconfig-gta02
++
++defconfig-gta01: \
++ defconfig-2.6.24-maxmodules
++ cp $< $@
++
++defconfig-gta02: \
++ defconfig-2.6.24-maxmodules
++ sed '/UART.*=0$$/s/=0/=2/' <$< >$@ || { rm -f $@; exit 1; }