// SPDX-License-Identifier: GPL-2.0-or-later OR MIT #include "mt7621.dtsi" #include #include #include / { aliases { led-boot = &led_power; led-failsafe = &led_power; led-running = &led_power; led-upgrade = &led_power; }; leds { compatible = "gpio-leds"; wps { gpios = <&gpio 7 GPIO_ACTIVE_HIGH>; color = ; function = LED_FUNCTION_WPS; }; led_power: power { gpios = <&gpio 12 GPIO_ACTIVE_HIGH>; color = ; function = LED_FUNCTION_POWER; }; wlan2g { gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; color = ; function = LED_FUNCTION_WLAN; function-enumerator = <1>; linux,default-trigger = "phy0tpt"; }; wlan5g { gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; color = ; function = LED_FUNCTION_WLAN; function-enumerator = <2>; linux,default-trigger = "phy1tpt"; }; }; keys { compatible = "gpio-keys"; auto { label = "auto"; gpios = <&gpio 13 GPIO_ACTIVE_LOW>; linux,code = ; linux,input-type = ; }; reset { label = "reset"; gpios = <&gpio 16 GPIO_ACTIVE_LOW>; linux,code = ; }; wps { label = "wps"; gpios = <&gpio 18 GPIO_ACTIVE_LOW>; linux,code = ; }; }; }; &spi0 { status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <40000000>; partitions: partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "u-boot"; reg = <0x0 0x30000>; read-only; }; partition@30000 { label = "u-boot-env"; reg = <0x30000 0x10000>; read-only; }; partition@40000 { label = "factory"; reg = <0x40000 0x10000>; read-only; nvmem-layout { compatible = "fixed-layout"; #address-cells = <1>; #size-cells = <1>; eeprom_factory_0: eeprom@0 { reg = <0x0 0x4da8>; }; eeprom_factory_8000: eeprom@8000 { reg = <0x8000 0x4da8>; }; }; }; }; }; }; &gmac1 { status = "okay"; label = "wan"; phy-handle = <ðphy0>; }; ðphy0 { /delete-property/ interrupts; }; &switch0 { ports { port@1 { status = "okay"; label = "lan4"; }; port@2 { status = "okay"; label = "lan3"; }; port@3 { status = "okay"; label = "lan2"; }; port@4 { status = "okay"; label = "lan1"; }; }; }; &state_default { gpio { groups = "uart2", "uart3", "jtag", "wdt"; function = "gpio"; }; }; &pcie { status = "okay"; }; &pcie0 { wifi@0,0 { compatible = "mediatek,mt76"; reg = <0x0000 0 0 0 0>; nvmem-cells = <&eeprom_factory_0>; nvmem-cell-names = "eeprom"; ieee80211-freq-limit = <2400000 2500000>; }; }; &pcie1 { wifi@0,0 { compatible = "mediatek,mt76"; reg = <0x0000 0 0 0 0>; nvmem-cells = <&eeprom_factory_8000>; nvmem-cell-names = "eeprom"; ieee80211-freq-limit = <5000000 6000000>; }; }; &xhci { status = "disabled"; };