uboot-sunxi: update to version 2018.05

[openwrt/openwrt.git] / package / boot / uboot-sunxi / patches / 091-sun6i-sync-PLL1-multdiv-with-Boot1.patch

diff --git a/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch b/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch
index cf41c4f1f12cfa942b335b688ddea5adb6c80d43..bcf2faa186dd169f04924e49d8c2bcd278abc4a8 100644 (file)
--- a/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch
+++ b/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch
@@ -14,7 +14,7 @@ More specifically, the following settings are now used:
 
 --- a/arch/arm/mach-sunxi/clock_sun6i.c
 +++ b/arch/arm/mach-sunxi/clock_sun6i.c
-@@ -113,11 +113,12 @@ void clock_set_pll1(unsigned int clk)
+@@ -112,11 +112,12 @@ void clock_set_pll1(unsigned int clk)
        struct sunxi_ccm_reg * const ccm =
                (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
        const int p = 0;