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valgrind: Update to version 3.18.1
[openwrt/openwrt.git]
/
package
/
devel
/
valgrind
/
patches
/
130-mips_fix_soft_float.patch
diff --git
a/package/devel/valgrind/patches/130-mips_fix_soft_float.patch
b/package/devel/valgrind/patches/130-mips_fix_soft_float.patch
index 05be099ca5e4e77efd5fe1fa05ddb03a5279c3e2..427aa85524c38c976e155e4e83a835ae6ff9be68 100644
(file)
--- a/
package/devel/valgrind/patches/130-mips_fix_soft_float.patch
+++ b/
package/devel/valgrind/patches/130-mips_fix_soft_float.patch
@@
-14,7
+14,7
@@
This fixes the following error message when compiling with a GCC 10 MIPS BE 32:
--- a/VEX/priv/guest_mips_helpers.c
+++ b/VEX/priv/guest_mips_helpers.c
--- a/VEX/priv/guest_mips_helpers.c
+++ b/VEX/priv/guest_mips_helpers.c
-@@ -61
7,6 +617
,7 @@ extern UInt mips_dirtyhelper_calculate_F
+@@ -61
6,6 +616
,7 @@ extern UInt mips_dirtyhelper_calculate_F
flt_op inst )
{
UInt ret = 0;
flt_op inst )
{
UInt ret = 0;
@@
-22,7
+22,7
@@
This fixes the following error message when compiling with a GCC 10 MIPS BE 32:
#if defined(__mips__)
VexGuestMIPS32State* guest_state = (VexGuestMIPS32State*)gs;
UInt loFsVal, hiFsVal, loFtVal, hiFtVal;
#if defined(__mips__)
VexGuestMIPS32State* guest_state = (VexGuestMIPS32State*)gs;
UInt loFsVal, hiFsVal, loFtVal, hiFtVal;
-@@ -69
9,6 +700
,7 @@ extern UInt mips_dirtyhelper_calculate_F
+@@ -69
8,6 +699
,7 @@ extern UInt mips_dirtyhelper_calculate_F
break;
}
#endif
break;
}
#endif
@@
-30,7
+30,7
@@
This fixes the following error message when compiling with a GCC 10 MIPS BE 32:
return ret;
}
return ret;
}
-@@ -70
8,6 +710
,7 @@ extern UInt mips_dirtyhelper_calculate_F
+@@ -70
7,6 +709
,7 @@ extern UInt mips_dirtyhelper_calculate_F
flt_op inst )
{
UInt ret = 0;
flt_op inst )
{
UInt ret = 0;
@@
-38,7
+38,7
@@
This fixes the following error message when compiling with a GCC 10 MIPS BE 32:
#if defined(__mips__) && ((__mips == 64) || \
(defined(__mips_isa_rev) && (__mips_isa_rev >= 2)))
#if defined(VGA_mips32)
#if defined(__mips__) && ((__mips == 64) || \
(defined(__mips_isa_rev) && (__mips_isa_rev >= 2)))
#if defined(VGA_mips32)
-@@ -8
60,6 +863
,7 @@ extern UInt mips_dirtyhelper_calculate_F
+@@ -8
59,6 +862
,7 @@ extern UInt mips_dirtyhelper_calculate_F
break;
}
#endif
break;
}
#endif
@@
-48,7
+48,7
@@
This fixes the following error message when compiling with a GCC 10 MIPS BE 32:
--- a/coregrind/m_machine.c
+++ b/coregrind/m_machine.c
--- a/coregrind/m_machine.c
+++ b/coregrind/m_machine.c
-@@ -
1828,6 +1828
,7 @@ Bool VG_(machine_get_hwcaps)( void )
+@@ -
2103,6 +2103
,7 @@ Bool VG_(machine_get_hwcaps)( void )
we are using alternative way to determine FP mode */
ULong result = 0;
we are using alternative way to determine FP mode */
ULong result = 0;
@@
-56,7
+56,7
@@
This fixes the following error message when compiling with a GCC 10 MIPS BE 32:
if (!VG_MINIMAL_SETJMP(env_unsup_insn)) {
__asm__ volatile (
".set push\n\t"
if (!VG_MINIMAL_SETJMP(env_unsup_insn)) {
__asm__ volatile (
".set push\n\t"
-@@ -
1845,6 +1846
,9 @@ Bool VG_(machine_get_hwcaps)( void )
+@@ -
2120,6 +2121
,9 @@ Bool VG_(machine_get_hwcaps)( void )
fpmode = (result != 0x3FF0000000000000ull);
}
fpmode = (result != 0x3FF0000000000000ull);
}