--- /dev/null
+From 7e1047f3cf8dcdb4825f3c785f7f708d07508096 Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Mon, 3 Oct 2016 00:29:13 +0200
+Subject: [v2 PATCH 7/7] ath9k: define all EEPROM fields in Little Endian format
+
+The ar9300_eeprom logic is already using only 8-bit (endian neutral),
+__le16 and __le32 fields to state explicitly how the values should be
+interpreted.
+All other EEPROM implementations (4k, 9287 and def) were using u16 and
+u32 fields with additional logic to swap the values (read from the
+original EEPROM) so they match the current CPUs endianness.
+
+The EEPROM format defaults to "all values are Little Endian", indicated
+by the absence of the AR5416_EEPMISC_BIG_ENDIAN in the u8 EEPMISC
+register. If we detect that the EEPROM indicates Big Endian mode
+(AR5416_EEPMISC_BIG_ENDIAN is set in the EEPMISC register) then we'll
+swap the values to convert them into Little Endian. This is done by
+activating the EEPMISC based logic in ath9k_hw_nvram_swap_data even if
+AH_NO_EEP_SWAP is set (this makes ath9k behave like the FreeBSD driver,
+which also does not have a flag to enable swapping based on the
+AR5416_EEPMISC_BIG_ENDIAN bit). Before this logic was only used to
+enable swapping when "current CPU endianness != EEPROM endianness".
+
+After changing all relevant fields to __le16 and __le32 sparse was used
+to check that all code which reads any of these fields uses
+le{16,32}_to_cpu.
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+---
+ drivers/net/wireless/ath/ath9k/eeprom.c | 27 ++-----
+ drivers/net/wireless/ath/ath9k/eeprom.h | 75 ++++++++++--------
+ drivers/net/wireless/ath/ath9k/eeprom_4k.c | 94 +++++++++-------------
+ drivers/net/wireless/ath/ath9k/eeprom_9287.c | 98 ++++++++++-------------
+ drivers/net/wireless/ath/ath9k/eeprom_def.c | 114 ++++++++++++---------------
+ 5 files changed, 174 insertions(+), 234 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath9k/eeprom.c
++++ b/drivers/net/wireless/ath/ath9k/eeprom.c
+@@ -155,17 +155,10 @@ bool ath9k_hw_nvram_read(struct ath_hw *
+ return ret;
+ }
+
+-#ifdef __BIG_ENDIAN
+-#define EXPECTED_EEPMISC_ENDIAN AR5416_EEPMISC_BIG_ENDIAN
+-#else
+-#define EXPECTED_EEPMISC_ENDIAN 0
+-#endif
+-
+ int ath9k_hw_nvram_swap_data(struct ath_hw *ah, bool *swap_needed, int size)
+ {
+ u16 magic;
+ u16 *eepdata;
+- u8 eepmisc;
+ int i;
+ bool needs_byteswap = false;
+ struct ath_common *common = ath9k_hw_common(ah);
+@@ -203,25 +196,17 @@ int ath9k_hw_nvram_swap_data(struct ath_
+ }
+ }
+
+- *swap_needed = false;
+-
+- eepmisc = ah->eep_ops->get_eepmisc(ah);
+- if ((eepmisc & AR5416_EEPMISC_BIG_ENDIAN) != EXPECTED_EEPMISC_ENDIAN) {
+- if (ah->ah_flags & AH_NO_EEP_SWAP) {
+- ath_info(common,
+- "Ignoring endianness difference in eepmisc register.\n");
+- } else {
+- *swap_needed = true;
+- ath_dbg(common, EEPROM,
+- "EEPROM needs swapping according to the eepmisc register.\n");
+- }
++ if (ah->eep_ops->get_eepmisc(ah) & AR5416_EEPMISC_BIG_ENDIAN) {
++ *swap_needed = true;
++ ath_dbg(common, EEPROM,
++ "Big Endian EEPROM detected according to EEPMISC register.\n");
++ } else {
++ *swap_needed = false;
+ }
+
+ return 0;
+ }
+
+-#undef EXPECTED_EEPMISC_VAL
+-
+ bool ath9k_hw_nvram_validate_checksum(struct ath_hw *ah, int size)
+ {
+ u32 i, sum = 0;
+--- a/drivers/net/wireless/ath/ath9k/eeprom.h
++++ b/drivers/net/wireless/ath/ath9k/eeprom.h
+@@ -23,6 +23,17 @@
+ #include <net/cfg80211.h>
+ #include "ar9003_eeprom.h"
+
++/* helpers to swap EEPROM fields, which are stored as __le16 or __le32. Since
++ * we are 100% sure about it we __force these to u16/u32 for the swab calls to
++ * silence the sparse checks. These macros are used when we have a Big Endian
++ * EEPROM (according to AR5416_EEPMISC_BIG_ENDIAN) and need to convert the
++ * fields to __le16/__le32.
++ */
++#define EEPROM_FIELD_SWAB16(field) \
++ (field = (__force __le16)swab16((__force u16)field))
++#define EEPROM_FIELD_SWAB32(field) \
++ (field = (__force __le32)swab32((__force u32)field))
++
+ #ifdef __BIG_ENDIAN
+ #define AR5416_EEPROM_MAGIC 0x5aa5
+ #else
+@@ -270,19 +281,19 @@ enum ath9k_hal_freq_band {
+ };
+
+ struct base_eep_header {
+- u16 length;
+- u16 checksum;
+- u16 version;
++ __le16 length;
++ __le16 checksum;
++ __le16 version;
+ u8 opCapFlags;
+ u8 eepMisc;
+- u16 regDmn[2];
++ __le16 regDmn[2];
+ u8 macAddr[6];
+ u8 rxMask;
+ u8 txMask;
+- u16 rfSilent;
+- u16 blueToothOptions;
+- u16 deviceCap;
+- u32 binBuildNumber;
++ __le16 rfSilent;
++ __le16 blueToothOptions;
++ __le16 deviceCap;
++ __le32 binBuildNumber;
+ u8 deviceType;
+ u8 pwdclkind;
+ u8 fastClk5g;
+@@ -300,33 +311,33 @@ struct base_eep_header {
+ } __packed;
+
+ struct base_eep_header_4k {
+- u16 length;
+- u16 checksum;
+- u16 version;
++ __le16 length;
++ __le16 checksum;
++ __le16 version;
+ u8 opCapFlags;
+ u8 eepMisc;
+- u16 regDmn[2];
++ __le16 regDmn[2];
+ u8 macAddr[6];
+ u8 rxMask;
+ u8 txMask;
+- u16 rfSilent;
+- u16 blueToothOptions;
+- u16 deviceCap;
+- u32 binBuildNumber;
++ __le16 rfSilent;
++ __le16 blueToothOptions;
++ __le16 deviceCap;
++ __le32 binBuildNumber;
+ u8 deviceType;
+ u8 txGainType;
+ } __packed;
+
+
+ struct spur_chan {
+- u16 spurChan;
++ __le16 spurChan;
+ u8 spurRangeLow;
+ u8 spurRangeHigh;
+ } __packed;
+
+ struct modal_eep_header {
+- u32 antCtrlChain[AR5416_MAX_CHAINS];
+- u32 antCtrlCommon;
++ __le32 antCtrlChain[AR5416_MAX_CHAINS];
++ __le32 antCtrlCommon;
+ u8 antennaGainCh[AR5416_MAX_CHAINS];
+ u8 switchSettling;
+ u8 txRxAttenCh[AR5416_MAX_CHAINS];
+@@ -361,7 +372,7 @@ struct modal_eep_header {
+ u8 db_ch1;
+ u8 lna_ctl;
+ u8 miscBits;
+- u16 xpaBiasLvlFreq[3];
++ __le16 xpaBiasLvlFreq[3];
+ u8 futureModal[6];
+
+ struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS];
+@@ -375,8 +386,8 @@ struct calDataPerFreqOpLoop {
+ } __packed;
+
+ struct modal_eep_4k_header {
+- u32 antCtrlChain[AR5416_EEP4K_MAX_CHAINS];
+- u32 antCtrlCommon;
++ __le32 antCtrlChain[AR5416_EEP4K_MAX_CHAINS];
++ __le32 antCtrlCommon;
+ u8 antennaGainCh[AR5416_EEP4K_MAX_CHAINS];
+ u8 switchSettling;
+ u8 txRxAttenCh[AR5416_EEP4K_MAX_CHAINS];
+@@ -440,19 +451,19 @@ struct modal_eep_4k_header {
+ } __packed;
+
+ struct base_eep_ar9287_header {
+- u16 length;
+- u16 checksum;
+- u16 version;
++ __le16 length;
++ __le16 checksum;
++ __le16 version;
+ u8 opCapFlags;
+ u8 eepMisc;
+- u16 regDmn[2];
++ __le16 regDmn[2];
+ u8 macAddr[6];
+ u8 rxMask;
+ u8 txMask;
+- u16 rfSilent;
+- u16 blueToothOptions;
+- u16 deviceCap;
+- u32 binBuildNumber;
++ __le16 rfSilent;
++ __le16 blueToothOptions;
++ __le16 deviceCap;
++ __le32 binBuildNumber;
+ u8 deviceType;
+ u8 openLoopPwrCntl;
+ int8_t pwrTableOffset;
+@@ -462,8 +473,8 @@ struct base_eep_ar9287_header {
+ } __packed;
+
+ struct modal_eep_ar9287_header {
+- u32 antCtrlChain[AR9287_MAX_CHAINS];
+- u32 antCtrlCommon;
++ __le32 antCtrlChain[AR9287_MAX_CHAINS];
++ __le32 antCtrlCommon;
+ int8_t antennaGainCh[AR9287_MAX_CHAINS];
+ u8 switchSettling;
+ u8 txRxAttenCh[AR9287_MAX_CHAINS];
+--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
++++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
+@@ -20,7 +20,7 @@
+
+ static int ath9k_hw_4k_get_eeprom_ver(struct ath_hw *ah)
+ {
+- u16 version = ah->eeprom.map4k.baseEepHeader.version;
++ u16 version = le16_to_cpu(ah->eeprom.map4k.baseEepHeader.version);
+
+ return (version & AR5416_EEP_VER_MAJOR_MASK) >>
+ AR5416_EEP_VER_MAJOR_SHIFT;
+@@ -28,7 +28,7 @@ static int ath9k_hw_4k_get_eeprom_ver(st
+
+ static int ath9k_hw_4k_get_eeprom_rev(struct ath_hw *ah)
+ {
+- u16 version = ah->eeprom.map4k.baseEepHeader.version;
++ u16 version = le16_to_cpu(ah->eeprom.map4k.baseEepHeader.version);
+
+ return version & AR5416_EEP_VER_MINOR_MASK;
+ }
+@@ -76,8 +76,8 @@ static bool ath9k_hw_4k_fill_eeprom(stru
+ static u32 ath9k_dump_4k_modal_eeprom(char *buf, u32 len, u32 size,
+ struct modal_eep_4k_header *modal_hdr)
+ {
+- PR_EEP("Chain0 Ant. Control", modal_hdr->antCtrlChain[0]);
+- PR_EEP("Ant. Common Control", modal_hdr->antCtrlCommon);
++ PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0]));
++ PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon));
+ PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]);
+ PR_EEP("Switch Settle", modal_hdr->switchSettling);
+ PR_EEP("Chain0 TxRxAtten", modal_hdr->txRxAttenCh[0]);
+@@ -132,6 +132,7 @@ static u32 ath9k_hw_4k_dump_eeprom(struc
+ {
+ struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k;
+ struct base_eep_header_4k *pBase = &eep->baseEepHeader;
++ u32 binBuildNumber = le32_to_cpu(pBase->binBuildNumber);
+
+ if (!dump_base_hdr) {
+ len += scnprintf(buf + len, size - len,
+@@ -143,10 +144,10 @@ static u32 ath9k_hw_4k_dump_eeprom(struc
+
+ PR_EEP("Major Version", ath9k_hw_4k_get_eeprom_ver(ah));
+ PR_EEP("Minor Version", ath9k_hw_4k_get_eeprom_rev(ah));
+- PR_EEP("Checksum", pBase->checksum);
+- PR_EEP("Length", pBase->length);
+- PR_EEP("RegDomain1", pBase->regDmn[0]);
+- PR_EEP("RegDomain2", pBase->regDmn[1]);
++ PR_EEP("Checksum", le16_to_cpu(pBase->checksum));
++ PR_EEP("Length", le16_to_cpu(pBase->length));
++ PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0]));
++ PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1]));
+ PR_EEP("TX Mask", pBase->txMask);
+ PR_EEP("RX Mask", pBase->rxMask);
+ PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A));
+@@ -160,9 +161,9 @@ static u32 ath9k_hw_4k_dump_eeprom(struc
+ PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags &
+ AR5416_OPFLAGS_N_5G_HT40));
+ PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN));
+- PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF);
+- PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF);
+- PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF);
++ PR_EEP("Cal Bin Major Ver", (binBuildNumber >> 24) & 0xFF);
++ PR_EEP("Cal Bin Minor Ver", (binBuildNumber >> 16) & 0xFF);
++ PR_EEP("Cal Bin Build", (binBuildNumber >> 8) & 0xFF);
+ PR_EEP("TX Gain type", pBase->txGainType);
+
+ len += scnprintf(buf + len, size - len, "%20s : %pM\n", "MacAddress",
+@@ -194,54 +195,31 @@ static int ath9k_hw_4k_check_eeprom(stru
+ return err;
+
+ if (need_swap)
+- el = swab16(eep->baseEepHeader.length);
++ el = swab16((__force u16)eep->baseEepHeader.length);
+ else
+- el = eep->baseEepHeader.length;
++ el = le16_to_cpu(eep->baseEepHeader.length);
+
+ el = min(el / sizeof(u16), SIZE_EEPROM_4K);
+ if (!ath9k_hw_nvram_validate_checksum(ah, el))
+ return -EINVAL;
+
+ if (need_swap) {
+- u32 integer;
+- u16 word;
+-
+- word = swab16(eep->baseEepHeader.length);
+- eep->baseEepHeader.length = word;
+-
+- word = swab16(eep->baseEepHeader.checksum);
+- eep->baseEepHeader.checksum = word;
+-
+- word = swab16(eep->baseEepHeader.version);
+- eep->baseEepHeader.version = word;
+-
+- word = swab16(eep->baseEepHeader.regDmn[0]);
+- eep->baseEepHeader.regDmn[0] = word;
+-
+- word = swab16(eep->baseEepHeader.regDmn[1]);
+- eep->baseEepHeader.regDmn[1] = word;
+-
+- word = swab16(eep->baseEepHeader.rfSilent);
+- eep->baseEepHeader.rfSilent = word;
+-
+- word = swab16(eep->baseEepHeader.blueToothOptions);
+- eep->baseEepHeader.blueToothOptions = word;
+-
+- word = swab16(eep->baseEepHeader.deviceCap);
+- eep->baseEepHeader.deviceCap = word;
+-
+- integer = swab32(eep->modalHeader.antCtrlCommon);
+- eep->modalHeader.antCtrlCommon = integer;
+-
+- for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++) {
+- integer = swab32(eep->modalHeader.antCtrlChain[i]);
+- eep->modalHeader.antCtrlChain[i] = integer;
+- }
+-
+- for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
+- word = swab16(eep->modalHeader.spurChans[i].spurChan);
+- eep->modalHeader.spurChans[i].spurChan = word;
+- }
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.length);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.checksum);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.version);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[0]);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[1]);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.rfSilent);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.blueToothOptions);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.deviceCap);
++ EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlCommon);
++
++ for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++)
++ EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlChain[i]);
++
++ for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++)
++ EEPROM_FIELD_SWAB16(
++ eep->modalHeader.spurChans[i].spurChan);
+ }
+
+ if (!ath9k_hw_nvram_check_version(ah, AR5416_EEP_VER,
+@@ -270,13 +248,13 @@ static u32 ath9k_hw_4k_get_eeprom(struct
+ case EEP_MAC_MSW:
+ return get_unaligned_be16(pBase->macAddr + 4);
+ case EEP_REG_0:
+- return pBase->regDmn[0];
++ return le16_to_cpu(pBase->regDmn[0]);
+ case EEP_OP_CAP:
+- return pBase->deviceCap;
++ return le16_to_cpu(pBase->deviceCap);
+ case EEP_OP_MODE:
+ return pBase->opCapFlags;
+ case EEP_RF_SILENT:
+- return pBase->rfSilent;
++ return le16_to_cpu(pBase->rfSilent);
+ case EEP_OB_2:
+ return pModal->ob_0;
+ case EEP_DB_2:
+@@ -724,7 +702,7 @@ static void ath9k_hw_4k_set_gain(struct
+ {
+ ENABLE_REG_RMW_BUFFER(ah);
+ REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0,
+- pModal->antCtrlChain[0], 0);
++ le32_to_cpu(pModal->antCtrlChain[0]), 0);
+
+ REG_RMW(ah, AR_PHY_TIMING_CTRL4(0),
+ SM(pModal->iqCalICh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) |
+@@ -790,7 +768,7 @@ static void ath9k_hw_4k_set_board_values
+ pModal = &eep->modalHeader;
+ txRxAttenLocal = 23;
+
+- REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon);
++ REG_WRITE(ah, AR_PHY_SWITCH_COM, le32_to_cpu(pModal->antCtrlCommon));
+
+ /* Single chain for 4K EEPROM*/
+ ath9k_hw_4k_set_gain(ah, pModal, eep, txRxAttenLocal);
+@@ -1054,7 +1032,7 @@ static void ath9k_hw_4k_set_board_values
+
+ static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
+ {
+- return ah->eeprom.map4k.modalHeader.spurChans[i].spurChan;
++ return le16_to_cpu(ah->eeprom.map4k.modalHeader.spurChans[i].spurChan);
+ }
+
+ static u8 ath9k_hw_4k_get_eepmisc(struct ath_hw *ah)
+--- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
++++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
+@@ -22,7 +22,7 @@
+
+ static int ath9k_hw_ar9287_get_eeprom_ver(struct ath_hw *ah)
+ {
+- u16 version = ah->eeprom.map9287.baseEepHeader.version;
++ u16 version = le16_to_cpu(ah->eeprom.map9287.baseEepHeader.version);
+
+ return (version & AR5416_EEP_VER_MAJOR_MASK) >>
+ AR5416_EEP_VER_MAJOR_SHIFT;
+@@ -30,7 +30,7 @@ static int ath9k_hw_ar9287_get_eeprom_ve
+
+ static int ath9k_hw_ar9287_get_eeprom_rev(struct ath_hw *ah)
+ {
+- u16 version = ah->eeprom.map9287.baseEepHeader.version;
++ u16 version = le16_to_cpu(ah->eeprom.map9287.baseEepHeader.version);
+
+ return version & AR5416_EEP_VER_MINOR_MASK;
+ }
+@@ -79,9 +79,9 @@ static bool ath9k_hw_ar9287_fill_eeprom(
+ static u32 ar9287_dump_modal_eeprom(char *buf, u32 len, u32 size,
+ struct modal_eep_ar9287_header *modal_hdr)
+ {
+- PR_EEP("Chain0 Ant. Control", modal_hdr->antCtrlChain[0]);
+- PR_EEP("Chain1 Ant. Control", modal_hdr->antCtrlChain[1]);
+- PR_EEP("Ant. Common Control", modal_hdr->antCtrlCommon);
++ PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0]));
++ PR_EEP("Chain1 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[1]));
++ PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon));
+ PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]);
+ PR_EEP("Chain1 Ant. Gain", modal_hdr->antennaGainCh[1]);
+ PR_EEP("Switch Settle", modal_hdr->switchSettling);
+@@ -128,6 +128,7 @@ static u32 ath9k_hw_ar9287_dump_eeprom(s
+ {
+ struct ar9287_eeprom *eep = &ah->eeprom.map9287;
+ struct base_eep_ar9287_header *pBase = &eep->baseEepHeader;
++ u32 binBuildNumber = le32_to_cpu(pBase->binBuildNumber);
+
+ if (!dump_base_hdr) {
+ len += scnprintf(buf + len, size - len,
+@@ -139,10 +140,10 @@ static u32 ath9k_hw_ar9287_dump_eeprom(s
+
+ PR_EEP("Major Version", ath9k_hw_ar9287_get_eeprom_ver(ah));
+ PR_EEP("Minor Version", ath9k_hw_ar9287_get_eeprom_rev(ah));
+- PR_EEP("Checksum", pBase->checksum);
+- PR_EEP("Length", pBase->length);
+- PR_EEP("RegDomain1", pBase->regDmn[0]);
+- PR_EEP("RegDomain2", pBase->regDmn[1]);
++ PR_EEP("Checksum", le16_to_cpu(pBase->checksum));
++ PR_EEP("Length", le16_to_cpu(pBase->length));
++ PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0]));
++ PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1]));
+ PR_EEP("TX Mask", pBase->txMask);
+ PR_EEP("RX Mask", pBase->rxMask);
+ PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A));
+@@ -156,9 +157,9 @@ static u32 ath9k_hw_ar9287_dump_eeprom(s
+ PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags &
+ AR5416_OPFLAGS_N_5G_HT40));
+ PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN));
+- PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF);
+- PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF);
+- PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF);
++ PR_EEP("Cal Bin Major Ver", (binBuildNumber >> 24) & 0xFF);
++ PR_EEP("Cal Bin Minor Ver", (binBuildNumber >> 16) & 0xFF);
++ PR_EEP("Cal Bin Build", (binBuildNumber >> 8) & 0xFF);
+ PR_EEP("Power Table Offset", pBase->pwrTableOffset);
+ PR_EEP("OpenLoop Power Ctrl", pBase->openLoopPwrCntl);
+
+@@ -182,8 +183,7 @@ static u32 ath9k_hw_ar9287_dump_eeprom(s
+
+ static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah)
+ {
+- u32 el, integer;
+- u16 word;
++ u32 el;
+ int i, err;
+ bool need_swap;
+ struct ar9287_eeprom *eep = &ah->eeprom.map9287;
+@@ -193,51 +193,31 @@ static int ath9k_hw_ar9287_check_eeprom(
+ return err;
+
+ if (need_swap)
+- el = swab16(eep->baseEepHeader.length);
++ el = swab16((__force u16)eep->baseEepHeader.length);
+ else
+- el = eep->baseEepHeader.length;
++ el = le16_to_cpu(eep->baseEepHeader.length);
+
+ el = min(el / sizeof(u16), SIZE_EEPROM_AR9287);
+ if (!ath9k_hw_nvram_validate_checksum(ah, el))
+ return -EINVAL;
+
+ if (need_swap) {
+- word = swab16(eep->baseEepHeader.length);
+- eep->baseEepHeader.length = word;
+-
+- word = swab16(eep->baseEepHeader.checksum);
+- eep->baseEepHeader.checksum = word;
+-
+- word = swab16(eep->baseEepHeader.version);
+- eep->baseEepHeader.version = word;
+-
+- word = swab16(eep->baseEepHeader.regDmn[0]);
+- eep->baseEepHeader.regDmn[0] = word;
+-
+- word = swab16(eep->baseEepHeader.regDmn[1]);
+- eep->baseEepHeader.regDmn[1] = word;
+-
+- word = swab16(eep->baseEepHeader.rfSilent);
+- eep->baseEepHeader.rfSilent = word;
+-
+- word = swab16(eep->baseEepHeader.blueToothOptions);
+- eep->baseEepHeader.blueToothOptions = word;
+-
+- word = swab16(eep->baseEepHeader.deviceCap);
+- eep->baseEepHeader.deviceCap = word;
+-
+- integer = swab32(eep->modalHeader.antCtrlCommon);
+- eep->modalHeader.antCtrlCommon = integer;
+-
+- for (i = 0; i < AR9287_MAX_CHAINS; i++) {
+- integer = swab32(eep->modalHeader.antCtrlChain[i]);
+- eep->modalHeader.antCtrlChain[i] = integer;
+- }
+-
+- for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
+- word = swab16(eep->modalHeader.spurChans[i].spurChan);
+- eep->modalHeader.spurChans[i].spurChan = word;
+- }
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.length);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.checksum);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.version);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[0]);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[1]);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.rfSilent);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.blueToothOptions);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.deviceCap);
++ EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlCommon);
++
++ for (i = 0; i < AR9287_MAX_CHAINS; i++)
++ EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlChain[i]);
++
++ for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++)
++ EEPROM_FIELD_SWAB16(
++ eep->modalHeader.spurChans[i].spurChan);
+ }
+
+ if (!ath9k_hw_nvram_check_version(ah, AR9287_EEP_VER,
+@@ -267,13 +247,13 @@ static u32 ath9k_hw_ar9287_get_eeprom(st
+ case EEP_MAC_MSW:
+ return get_unaligned_be16(pBase->macAddr + 4);
+ case EEP_REG_0:
+- return pBase->regDmn[0];
++ return le16_to_cpu(pBase->regDmn[0]);
+ case EEP_OP_CAP:
+- return pBase->deviceCap;
++ return le16_to_cpu(pBase->deviceCap);
+ case EEP_OP_MODE:
+ return pBase->opCapFlags;
+ case EEP_RF_SILENT:
+- return pBase->rfSilent;
++ return le16_to_cpu(pBase->rfSilent);
+ case EEP_TX_MASK:
+ return pBase->txMask;
+ case EEP_RX_MASK:
+@@ -878,13 +858,13 @@ static void ath9k_hw_ar9287_set_board_va
+
+ pModal = &eep->modalHeader;
+
+- REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon);
++ REG_WRITE(ah, AR_PHY_SWITCH_COM, le32_to_cpu(pModal->antCtrlCommon));
+
+ for (i = 0; i < AR9287_MAX_CHAINS; i++) {
+ regChainOffset = i * 0x1000;
+
+ REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset,
+- pModal->antCtrlChain[i]);
++ le32_to_cpu(pModal->antCtrlChain[i]));
+
+ REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,
+ (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset)
+@@ -982,7 +962,9 @@ static void ath9k_hw_ar9287_set_board_va
+ static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah,
+ u16 i, bool is2GHz)
+ {
+- return ah->eeprom.map9287.modalHeader.spurChans[i].spurChan;
++ __le16 spur_ch = ah->eeprom.map9287.modalHeader.spurChans[i].spurChan;
++
++ return le16_to_cpu(spur_ch);
+ }
+
+ static u8 ath9k_hw_ar9287_get_eepmisc(struct ath_hw *ah)
+--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
++++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
+@@ -79,7 +79,7 @@ static void ath9k_olc_get_pdadcs(struct
+
+ static int ath9k_hw_def_get_eeprom_ver(struct ath_hw *ah)
+ {
+- u16 version = ah->eeprom.def.baseEepHeader.version;
++ u16 version = le16_to_cpu(ah->eeprom.def.baseEepHeader.version);
+
+ return (version & AR5416_EEP_VER_MAJOR_MASK) >>
+ AR5416_EEP_VER_MAJOR_SHIFT;
+@@ -87,7 +87,7 @@ static int ath9k_hw_def_get_eeprom_ver(s
+
+ static int ath9k_hw_def_get_eeprom_rev(struct ath_hw *ah)
+ {
+- u16 version = ah->eeprom.def.baseEepHeader.version;
++ u16 version = le16_to_cpu(ah->eeprom.def.baseEepHeader.version);
+
+ return version & AR5416_EEP_VER_MINOR_MASK;
+ }
+@@ -135,10 +135,10 @@ static bool ath9k_hw_def_fill_eeprom(str
+ static u32 ath9k_def_dump_modal_eeprom(char *buf, u32 len, u32 size,
+ struct modal_eep_header *modal_hdr)
+ {
+- PR_EEP("Chain0 Ant. Control", modal_hdr->antCtrlChain[0]);
+- PR_EEP("Chain1 Ant. Control", modal_hdr->antCtrlChain[1]);
+- PR_EEP("Chain2 Ant. Control", modal_hdr->antCtrlChain[2]);
+- PR_EEP("Ant. Common Control", modal_hdr->antCtrlCommon);
++ PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0]));
++ PR_EEP("Chain1 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[1]));
++ PR_EEP("Chain2 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[2]));
++ PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon));
+ PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]);
+ PR_EEP("Chain1 Ant. Gain", modal_hdr->antennaGainCh[1]);
+ PR_EEP("Chain2 Ant. Gain", modal_hdr->antennaGainCh[2]);
+@@ -194,9 +194,9 @@ static u32 ath9k_def_dump_modal_eeprom(c
+ PR_EEP("Chain1 OutputBias", modal_hdr->ob_ch1);
+ PR_EEP("Chain1 DriverBias", modal_hdr->db_ch1);
+ PR_EEP("LNA Control", modal_hdr->lna_ctl);
+- PR_EEP("XPA Bias Freq0", modal_hdr->xpaBiasLvlFreq[0]);
+- PR_EEP("XPA Bias Freq1", modal_hdr->xpaBiasLvlFreq[1]);
+- PR_EEP("XPA Bias Freq2", modal_hdr->xpaBiasLvlFreq[2]);
++ PR_EEP("XPA Bias Freq0", le16_to_cpu(modal_hdr->xpaBiasLvlFreq[0]));
++ PR_EEP("XPA Bias Freq1", le16_to_cpu(modal_hdr->xpaBiasLvlFreq[1]));
++ PR_EEP("XPA Bias Freq2", le16_to_cpu(modal_hdr->xpaBiasLvlFreq[2]));
+
+ return len;
+ }
+@@ -206,6 +206,7 @@ static u32 ath9k_hw_def_dump_eeprom(stru
+ {
+ struct ar5416_eeprom_def *eep = &ah->eeprom.def;
+ struct base_eep_header *pBase = &eep->baseEepHeader;
++ u32 binBuildNumber = le32_to_cpu(pBase->binBuildNumber);
+
+ if (!dump_base_hdr) {
+ len += scnprintf(buf + len, size - len,
+@@ -221,10 +222,10 @@ static u32 ath9k_hw_def_dump_eeprom(stru
+
+ PR_EEP("Major Version", ath9k_hw_def_get_eeprom_ver(ah));
+ PR_EEP("Minor Version", ath9k_hw_def_get_eeprom_rev(ah));
+- PR_EEP("Checksum", pBase->checksum);
+- PR_EEP("Length", pBase->length);
+- PR_EEP("RegDomain1", pBase->regDmn[0]);
+- PR_EEP("RegDomain2", pBase->regDmn[1]);
++ PR_EEP("Checksum", le16_to_cpu(pBase->checksum));
++ PR_EEP("Length", le16_to_cpu(pBase->length));
++ PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0]));
++ PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1]));
+ PR_EEP("TX Mask", pBase->txMask);
+ PR_EEP("RX Mask", pBase->rxMask);
+ PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A));
+@@ -238,9 +239,9 @@ static u32 ath9k_hw_def_dump_eeprom(stru
+ PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags &
+ AR5416_OPFLAGS_N_5G_HT40));
+ PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN));
+- PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF);
+- PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF);
+- PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF);
++ PR_EEP("Cal Bin Major Ver", (binBuildNumber >> 24) & 0xFF);
++ PR_EEP("Cal Bin Minor Ver", (binBuildNumber >> 16) & 0xFF);
++ PR_EEP("Cal Bin Build", (binBuildNumber >> 8) & 0xFF);
+ PR_EEP("OpenLoop Power Ctrl", pBase->openLoopPwrCntl);
+
+ len += scnprintf(buf + len, size - len, "%20s : %pM\n", "MacAddress",
+@@ -273,61 +274,40 @@ static int ath9k_hw_def_check_eeprom(str
+ return err;
+
+ if (need_swap)
+- el = swab16(eep->baseEepHeader.length);
++ el = swab16((__force u16)eep->baseEepHeader.length);
+ else
+- el = eep->baseEepHeader.length;
++ el = le16_to_cpu(eep->baseEepHeader.length);
+
+ el = min(el / sizeof(u16), SIZE_EEPROM_DEF);
+ if (!ath9k_hw_nvram_validate_checksum(ah, el))
+ return -EINVAL;
+
+ if (need_swap) {
+- u32 integer, j;
+- u16 word;
++ u32 j;
+
+- word = swab16(eep->baseEepHeader.length);
+- eep->baseEepHeader.length = word;
+-
+- word = swab16(eep->baseEepHeader.checksum);
+- eep->baseEepHeader.checksum = word;
+-
+- word = swab16(eep->baseEepHeader.version);
+- eep->baseEepHeader.version = word;
+-
+- word = swab16(eep->baseEepHeader.regDmn[0]);
+- eep->baseEepHeader.regDmn[0] = word;
+-
+- word = swab16(eep->baseEepHeader.regDmn[1]);
+- eep->baseEepHeader.regDmn[1] = word;
+-
+- word = swab16(eep->baseEepHeader.rfSilent);
+- eep->baseEepHeader.rfSilent = word;
+-
+- word = swab16(eep->baseEepHeader.blueToothOptions);
+- eep->baseEepHeader.blueToothOptions = word;
+-
+- word = swab16(eep->baseEepHeader.deviceCap);
+- eep->baseEepHeader.deviceCap = word;
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.length);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.checksum);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.version);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[0]);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[1]);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.rfSilent);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.blueToothOptions);
++ EEPROM_FIELD_SWAB16(eep->baseEepHeader.deviceCap);
+
+ for (j = 0; j < ARRAY_SIZE(eep->modalHeader); j++) {
+ struct modal_eep_header *pModal =
+ &eep->modalHeader[j];
+- integer = swab32(pModal->antCtrlCommon);
+- pModal->antCtrlCommon = integer;
++ EEPROM_FIELD_SWAB32(pModal->antCtrlCommon);
+
+- for (i = 0; i < AR5416_MAX_CHAINS; i++) {
+- integer = swab32(pModal->antCtrlChain[i]);
+- pModal->antCtrlChain[i] = integer;
+- }
+- for (i = 0; i < 3; i++) {
+- word = swab16(pModal->xpaBiasLvlFreq[i]);
+- pModal->xpaBiasLvlFreq[i] = word;
+- }
++ for (i = 0; i < AR5416_MAX_CHAINS; i++)
++ EEPROM_FIELD_SWAB32(pModal->antCtrlChain[i]);
+
+- for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
+- word = swab16(pModal->spurChans[i].spurChan);
+- pModal->spurChans[i].spurChan = word;
+- }
++ for (i = 0; i < 3; i++)
++ EEPROM_FIELD_SWAB16(pModal->xpaBiasLvlFreq[i]);
++
++ for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++)
++ EEPROM_FIELD_SWAB16(
++ pModal->spurChans[i].spurChan);
+ }
+ }
+
+@@ -337,7 +317,7 @@ static int ath9k_hw_def_check_eeprom(str
+
+ /* Enable fixup for AR_AN_TOP2 if necessary */
+ if ((ah->hw_version.devid == AR9280_DEVID_PCI) &&
+- ((eep->baseEepHeader.version & 0xff) > 0x0a) &&
++ ((le16_to_cpu(eep->baseEepHeader.version) & 0xff) > 0x0a) &&
+ (eep->baseEepHeader.pwdclkind == 0))
+ ah->need_an_top2_fixup = true;
+
+@@ -370,13 +350,13 @@ static u32 ath9k_hw_def_get_eeprom(struc
+ case EEP_MAC_MSW:
+ return get_unaligned_be16(pBase->macAddr + 4);
+ case EEP_REG_0:
+- return pBase->regDmn[0];
++ return le16_to_cpu(pBase->regDmn[0]);
+ case EEP_OP_CAP:
+- return pBase->deviceCap;
++ return le16_to_cpu(pBase->deviceCap);
+ case EEP_OP_MODE:
+ return pBase->opCapFlags;
+ case EEP_RF_SILENT:
+- return pBase->rfSilent;
++ return le16_to_cpu(pBase->rfSilent);
+ case EEP_OB_5:
+ return pModal[0].ob;
+ case EEP_DB_5:
+@@ -490,11 +470,13 @@ static void ath9k_hw_def_set_board_value
+ struct ar5416_eeprom_def *eep = &ah->eeprom.def;
+ int i, regChainOffset;
+ u8 txRxAttenLocal;
++ u32 antCtrlCommon;
+
+ pModal = &(eep->modalHeader[IS_CHAN_2GHZ(chan)]);
+ txRxAttenLocal = IS_CHAN_2GHZ(chan) ? 23 : 44;
++ antCtrlCommon = le32_to_cpu(pModal->antCtrlCommon);
+
+- REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon & 0xffff);
++ REG_WRITE(ah, AR_PHY_SWITCH_COM, antCtrlCommon & 0xffff);
+
+ for (i = 0; i < AR5416_MAX_CHAINS; i++) {
+ if (AR_SREV_9280(ah)) {
+@@ -508,7 +490,7 @@ static void ath9k_hw_def_set_board_value
+ regChainOffset = i * 0x1000;
+
+ REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset,
+- pModal->antCtrlChain[i]);
++ le32_to_cpu(pModal->antCtrlChain[i]));
+
+ REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,
+ (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) &
+@@ -655,7 +637,7 @@ static void ath9k_hw_def_set_board_value
+ static void ath9k_hw_def_set_addac(struct ath_hw *ah,
+ struct ath9k_channel *chan)
+ {
+-#define XPA_LVL_FREQ(cnt) (pModal->xpaBiasLvlFreq[cnt])
++#define XPA_LVL_FREQ(cnt) (le16_to_cpu(pModal->xpaBiasLvlFreq[cnt]))
+ struct modal_eep_header *pModal;
+ struct ar5416_eeprom_def *eep = &ah->eeprom.def;
+ u8 biaslevel;
+@@ -1315,7 +1297,9 @@ static void ath9k_hw_def_set_txpower(str
+
+ static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
+ {
+- return ah->eeprom.def.modalHeader[is2GHz].spurChans[i].spurChan;
++ __le16 spch = ah->eeprom.def.modalHeader[is2GHz].spurChans[i].spurChan;
++
++ return le16_to_cpu(spch);
+ }
+
+ static u8 ath9k_hw_def_get_eepmisc(struct ath_hw *ah)
projects / openwrt / openwrt.git / blobdiff