ar71xx: add support for MikroTik RouterBOARD wAP G-5HacT2HnD (wAP AC)

[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-rbspi.c

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c
index cfd7373164eeea274462e7cee61bf8f33d4eb59a..8d8dd40e8a59ed5659cb25c3ef12d4d814a2a99b 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c
@@ -12,6 +12,7 @@
  *  - MikroTik RouterBOARD 750 r2
  *  - MikroTik RouterBOARD LHG 5nD
  *  - MikroTik RouterBOARD wAP2nD
+ *  - MikroTik RouterBOARD wAP G-5HacT2HnDwAP (wAP AC)
  *
  *  Preliminary support for the following hardware
  *  - MikroTik RouterBOARD cAP2nD
@@ -41,6 +42,8 @@
 #include <linux/mtd/partitions.h>
 
 #include <linux/ar8216_platform.h>
+#include <linux/platform_data/phy-at803x.h>
+#include <linux/platform_data/mdio-gpio.h>
 
 #include <asm/prom.h>
 #include <asm/mach-ath79/ar71xx_regs.h>
@@ -134,10 +137,22 @@ static struct flash_platform_data rbspi_spi_flash_data = {
        .nr_parts = ARRAY_SIZE(rbspi_spi_partitions),
 };
 
-/* Several boards only have a single reset button wired to GPIO 16 */
+/* Several boards only have a single reset button, wired to GPIO 1, 16 or 20 */
+#define RBSPI_GPIO_BTN_RESET01 1
 #define RBSPI_GPIO_BTN_RESET16 16
 #define RBSPI_GPIO_BTN_RESET20 20
 
+static struct gpio_keys_button rbspi_gpio_keys_reset01[] __initdata = {
+       {
+               .desc = "Reset button",
+               .type = EV_KEY,
+               .code = KEY_RESTART,
+               .debounce_interval = RBSPI_KEYS_DEBOUNCE_INTERVAL,
+               .gpio = RBSPI_GPIO_BTN_RESET01,
+               .active_low = 1,
+       },
+};
+
 static struct gpio_keys_button rbspi_gpio_keys_reset16[] __initdata = {
        {
                .desc = "Reset button",
@@ -485,6 +500,40 @@ static struct gpio_keys_button rblhg_gpio_keys[] __initdata = {
        },
 };
 
+/* RB w APG-5HacT2HnD (wAP AC) gpios*/
+#define RBWAPGSC_LED1          1
+#define RBWAPGSC_LED2          8
+#define RBWAPGSC_LED3          9
+#define RBWAPGSC_POWERLED              16
+#define RBWAPGSC_GPIO_MDIO_MDC         12
+#define RBWAPGSC_GPIO_MDIO_DATA                11
+#define RBWAPGSC_MDIO_PHYADDR          0
+
+static struct gpio_led rbwapgsc_leds[] __initdata = {
+       {
+               .name = "rb:green:led1",
+               .gpio = RBWAPGSC_LED1,
+               .active_low = 1,
+       },{
+               .name = "rb:blue:power",
+               .gpio = RBWAPGSC_POWERLED,
+               .active_low = 1,
+       },
+};
+
+static struct mdio_gpio_platform_data rbwapgsc_mdio_data = {
+       .mdc = RBWAPGSC_GPIO_MDIO_MDC,
+       .mdio = RBWAPGSC_GPIO_MDIO_DATA,
+       .phy_mask = ~BIT(RBWAPGSC_MDIO_PHYADDR),
+};
+
+static struct platform_device rbwapgsc_phy_device = {
+       .name = "mdio-gpio",
+       .id = 1,
+       .dev = {
+               .platform_data = &rbwapgsc_mdio_data
+       },
+};
 
 static struct gen_74x164_chip_platform_data rbspi_ssr_data = {
        .base = RBSPI_SSR_GPIO_BASE,
@@ -538,7 +587,7 @@ void __init rbspi_wlan_init(u16 id, int wmac_offset)
 }
 
 #define RBSPI_MACH_BUFLEN      64
-/* 
+/*
  * Common platform init routine for all SPI NOR devices.
  */
 static int __init rbspi_platform_setup(void)
@@ -641,7 +690,7 @@ static void __init rbspi_network_setup(u32 flags, int gmac1_offset,
                rbspi_wlan_init(1, wmac1_offset);
 }
 
-/* 
+/*
  * Init the mAP lite hardware (QCA953x).
  * The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0.
  * Trying to use GMAC0 in direct mode was unsucessful, so we're
@@ -958,6 +1007,47 @@ static void __init rbmap_setup(void)
                                        rbspi_gpio_keys_reset16);
 }
 
+/*
+ * Init the wAPGSC (RB wAPG-5HacT2HnD // wAP AC) hardware.
+ * The wAPGSC has one Ethernet port via AR8033 with PoE input, dual radio (SoC
+ * 2.4 GHz and external QCA9880) and a ZT2046Q temperature and voltage sensor
+ * (currently not supported).
+ */
+static void __init rbwapgsc_setup(void)
+{
+       u32 flags = RBSPI_HAS_PCI;
+
+       if (rbspi_platform_setup())
+               return;
+
+       rbspi_peripherals_setup(flags);
+
+       platform_device_register(&rbwapgsc_phy_device);
+
+       ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0);
+       ath79_eth1_data.mii_bus_dev = &rbwapgsc_phy_device.dev;
+       ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
+       ath79_eth1_data.phy_mask = BIT(RBWAPGSC_MDIO_PHYADDR);
+       ath79_eth1_pll_data.pll_1000 = 0x03000101;
+       ath79_eth1_pll_data.pll_100 = 0x80000101;
+       ath79_eth1_pll_data.pll_10 = 0x80001313;
+       ath79_eth1_data.speed = SPEED_1000;
+       ath79_eth1_data.duplex = DUPLEX_FULL;
+       ath79_register_eth(1);
+
+       rbspi_wlan_init(1, 2);
+
+       ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL,
+               ARRAY_SIZE(rbspi_gpio_keys_reset01),
+               rbspi_gpio_keys_reset01);
+
+       ath79_gpio_function_enable(QCA955X_GPIO_FUNC_JTAG_DISABLE|
+                               QCA955X_GPIO_REG_OUT_FUNC4|
+                               QCA955X_GPIO_REG_OUT_FUNC3);
+
+       ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwapgsc_leds),
+                       rbwapgsc_leds);
+}
 
 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL, "map-hb", rbmapl_setup);
 MIPS_MACHINE_NONAME(ATH79_MACH_RB_941, "H951L", rbhapl_setup);
@@ -968,3 +1058,4 @@ MIPS_MACHINE_NONAME(ATH79_MACH_RB_LHG5, "lhg", rblhg_setup);
 MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAP, "wap-hb", rbwap_setup);
 MIPS_MACHINE_NONAME(ATH79_MACH_RB_CAP, "cap-hb", rbcap_setup);
 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAP, "map2-hb", rbmap_setup);
+MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAPAC, "wapg-sc", rbwapgsc_setup);