// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
+
+#include "ar9341.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
-
-#include "ar9341.dtsi"
+#include <dt-bindings/mtd/partitions/uimage.h>
/ {
model = "PISEN WMB001N";
compatible = "pisen,wmb001n", "qca,ar9341";
aliases {
- serial0 = &uart;
led-boot = &led_wifi;
led-failsafe = &led_wifi;
led-running = &led_wifi;
pinctrl-0 = <&jtag_disable_pins>;
volume1 {
- label = "wmb001n:blue:volume1";
+ label = "blue:volume1";
gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
};
volume2 {
- label = "wmb001n:blue:volume2";
+ label = "blue:volume2";
gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
};
volume3 {
- label = "wmb001n:blue:volume3";
+ label = "blue:volume3";
gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
};
volume4 {
- label = "wmb001n:blue:volume4";
+ label = "blue:volume4";
gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
};
volume5 {
- label = "wmb001n:blue:volume5";
+ label = "blue:volume5";
gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
};
led_wifi: wifi {
- label = "wmb001n:blue:wifi";
+ label = "blue:wifi";
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
};
};
virtual_flash {
compatible = "mtd-concat";
- devices = <&fwpart1 &fwpart2>;
+ devices = <&fwconcat0 &fwconcat1>;
partitions {
compatible = "fixed-partitions";
partition@0 {
reg = <0x0 0x0>;
label = "firmware";
- compatible = "openwrt,okli";
+ compatible = "openwrt,uimage", "denx,uimage";
+ openwrt,ih-magic = <IH_MAGIC_OKLI>;
};
};
};
clock-frequency = <25000000>;
};
-&uart {
- status = "okay";
-};
-
&spi {
- num-cs = <1>;
-
status = "okay";
flash@0 {
read-only;
};
- fwpart1: partition@20000 {
- label = "fwpart1";
+ fwconcat0: partition@20000 {
+ label = "fwconcat0";
reg = <0x20000 0xdc0000>;
};
reg = <0xde0000 0x10000>;
};
- fwpart2: partition@df0000 {
- label = "fwpart2";
+ fwconcat1: partition@df0000 {
+ label = "fwconcat1";
reg = <0xdf0000 0x1f0000>;
};
ð0 {
status = "okay";
phy-handle = <&swphy4>;
- mtd-mac-address = <&art 0x0>;
+ nvmem-cells = <&macaddr_art_0>;
+ nvmem-cell-names = "mac-address";
};
ð1 {
status = "okay";
mtd-cal-data = <&art 0x1000>;
};
+
+&art {
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_art_0: macaddr@0 {
+ reg = <0x0 0x6>;
+ };
+};