ath79: enable UART in SoC DTSI files

[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9531_glinet_gl-ar300m.dtsi

diff --git a/target/linux/ath79/dts/qca9531_glinet_gl-ar300m.dtsi b/target/linux/ath79/dts/qca9531_glinet_gl-ar300m.dtsi
index f06305c47f204f07ebf341222ce42a5f0c4401aa..d0b0d88c484bf21a90efb02779a92b93a242c9f3 100644 (file)
--- a/target/linux/ath79/dts/qca9531_glinet_gl-ar300m.dtsi
+++ b/target/linux/ath79/dts/qca9531_glinet_gl-ar300m.dtsi
@@ -1,9 +1,8 @@
+#include "qca953x.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
-#include "qca953x.dtsi"
-
 / {
        aliases {
                led-boot = &led_status;
@@ -44,17 +43,17 @@
                // Colors for non-Lite versions
 
                led_status: status {
-                       label = "gl-ar300m:green:status";
+                       label = "green:status";
                        gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
                };
 
-               led_lan: lan {
-                       label = "gl-ar300m:green:lan";
+               lan {
+                       label = "green:lan";
                        gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
                };
 
                led_wlan: wlan {
-                       label = "gl-ar300m:red:wlan";
+                       label = "red:wlan";
                        gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
                        linux,default-trigger = "phy0tpt";
                };
@@ -75,9 +74,6 @@
 &spi {
        status = "okay";
 
-       num-cs = <2>;
-       cs-gpios = <0>, <0>;
-
        flash@0 {
                compatible = "jedec,spi-nor";
                reg = <0>;
@@ -135,10 +131,6 @@
        };
 };
 
-&uart {
-       status = "okay";
-};
-
 &usb0 {
        #address-cells = <1>;
        #size-cells = <0>;
@@ -151,8 +143,10 @@
 
 &eth0 {
        status = "okay";
-       mtd-mac-address = <&art 0x0>;
+
        phy-handle = <&swphy4>;
+
+       mtd-mac-address = <&art 0x0>;
 };
 
 &eth1 {