remove support for 3.6 kernel

[openwrt/openwrt.git] / target / linux / brcm63xx / patches-3.6 / 427-MIPS-BCM63XX-Register-SPI-flash-if-present.patch

diff --git a/target/linux/brcm63xx/patches-3.6/427-MIPS-BCM63XX-Register-SPI-flash-if-present.patch b/target/linux/brcm63xx/patches-3.6/427-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
deleted file mode 100644 (file)
index 14776af..0000000
--- a/target/linux/brcm63xx/patches-3.6/427-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
+++ /dev/null
@@ -1,102 +0,0 @@
-From d135d94b3d1fe599d13e7198d5f502912d694c13 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 3 Jul 2011 15:00:38 +0200
-Subject: [PATCH 29/60] MIPS: BCM63XX: Register SPI flash if present
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/dev-flash.c                     |   33 +++++++++++++++++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |    2 +
- 2 files changed, 33 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -16,9 +16,12 @@
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
- #include <linux/mtd/physmap.h>
-+#include <linux/spi/spi.h>
-+#include <linux/spi/flash.h>
- 
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_flash.h>
-+#include <bcm63xx_dev_hsspi.h>
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
- 
-@@ -55,6 +58,21 @@ static struct platform_device mtd_dev =
-       },
- };
- 
-+static struct flash_platform_data bcm63xx_flash_data = {
-+      .part_probe_types       = bcm63xx_part_types,
-+};
-+
-+static struct spi_board_info bcm63xx_spi_flash_info[] = {
-+      {
-+              .bus_num        = 0,
-+              .chip_select    = 0,
-+              .mode           = 0,
-+              .max_speed_hz   = 781000,
-+              .modalias       = "m25p80",
-+              .platform_data  = &bcm63xx_flash_data,
-+      },
-+};
-+
- static int __init bcm63xx_detect_flash_type(void)
- {
-       u32 val;
-@@ -62,6 +80,11 @@ static int __init bcm63xx_detect_flash_t
-       switch (bcm63xx_get_cpu_id()) {
-       case BCM6328_CPU_ID:
-               val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
-+              if (val & STRAPBUS_6328_HSSPI_CLK_FAST)
-+                      bcm63xx_spi_flash_info[0].max_speed_hz = 33333334;
-+              else
-+                      bcm63xx_spi_flash_info[0].max_speed_hz = 16666667;
-+
-               if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
-                       return BCM63XX_FLASH_TYPE_SERIAL;
-               else
-@@ -79,6 +102,9 @@ static int __init bcm63xx_detect_flash_t
-                       return BCM63XX_FLASH_TYPE_SERIAL;
-       case BCM6368_CPU_ID:
-               val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
-+              if (val & STRAPBUS_6368_SPI_CLK_FAST)
-+                      bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
-+
-               switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
-               case STRAPBUS_6368_BOOT_SEL_NAND:
-                       return BCM63XX_FLASH_TYPE_NAND;
-@@ -110,8 +136,11 @@ int __init bcm63xx_flash_register(void)
- 
-               return platform_device_register(&mtd_dev);
-       case BCM63XX_FLASH_TYPE_SERIAL:
--              pr_warn("unsupported serial flash detected\n");
--              return -ENODEV;
-+              if (BCMCPU_IS_6328())
-+                      bcm63xx_flash_data.max_transfer_len = HSSPI_BUFFER_LEN;
-+
-+              return spi_register_board_info(bcm63xx_spi_flash_info,
-+                                      ARRAY_SIZE(bcm63xx_spi_flash_info));
-       case BCM63XX_FLASH_TYPE_NAND:
-               pr_warn("unsupported NAND flash detected\n");
-               return -ENODEV;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -614,6 +614,7 @@
- #define GPIO_STRAPBUS_REG             0x40
- #define STRAPBUS_6358_BOOT_SEL_PARALLEL       (1 << 1)
- #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1)
-+#define STRAPBUS_6368_SPI_CLK_FAST    (1 << 6)
- #define STRAPBUS_6368_BOOT_SEL_MASK   0x3
- #define STRAPBUS_6368_BOOT_SEL_NAND   0
- #define STRAPBUS_6368_BOOT_SEL_SERIAL 1
-@@ -1308,6 +1309,7 @@
- #define STRAPBUS_6362_BOOT_SEL_NAND   (0 << 15)
- 
- #define MISC_STRAPBUS_6328_REG                0x240
-+#define STRAPBUS_6328_HSSPI_CLK_FAST  (1 << 4)
- #define STRAPBUS_6328_FCVO_SHIFT      7
- #define STRAPBUS_6328_FCVO_MASK               (0x1f << STRAPBUS_6328_FCVO_SHIFT)
- #define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 28)