ipq40xx: split files in 6.1 and 6.6 dedicated directory
[openwrt/openwrt.git] / target / linux / ipq40xx / files-6.1 / arch / arm / boot / dts / qcom-ipq40x9-dr40x9.dts
diff --git a/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts
new file mode 100644 (file)
index 0000000..271a972
--- /dev/null
@@ -0,0 +1,424 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq4019.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
+
+/ {
+       model = "Wallystech DR40X9";
+       compatible = "wallys,dr40x9";
+
+       chosen {
+               bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
+       };
+
+       soc {
+               counter@4a1000 {
+                       compatible = "qcom,qca-gcnt";
+                       reg = <0x4a1000 0x4>;
+               };
+
+               tcsr@1949000 {
+                       compatible = "qcom,tcsr";
+                       reg = <0x1949000 0x100>;
+                       qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+               };
+
+               tcsr@194b000 {
+                       status = "okay";
+
+                       /* select hostmode */
+                       compatible = "qcom,tcsr";
+                       reg = <0x194b000 0x100>;
+                       qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+               };
+
+               ess_tcsr@1953000 {
+                       compatible = "qcom,tcsr";
+                       reg = <0x1953000 0x1000>;
+                       qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+               };
+
+               tcsr@1957000 {
+                       compatible = "qcom,tcsr";
+                       reg = <0x1957000 0x100>;
+                       qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+               };
+       };
+
+       keys {
+               compatible = "gpio-keys";
+
+               reset {
+                       label = "reset";
+                       gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               wlan2g {
+                       label = "dr4029:green:wlan2g";
+                       gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
+                       linux,default-trigger = "phy0tpt";
+               };
+
+               wlan5g {
+                       label = "dr4029:green:wlan5g";
+                       gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
+                       linux,default-trigger = "phy1tpt";
+               };
+
+               wlan2g-strength {
+                       label = "dr4029:green:wlan2g-strength";
+                       gpios = <&tlmm 36 GPIO_ACTIVE_LOW>;
+               };
+
+               wlan5g-strength {
+                       label = "dr4029:green:wlan5g-strength";
+                       gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
+               };
+       };
+};
+
+&tlmm {
+       mdio_pins: mdio_pinmux {
+               mux_1 {
+                       pins = "gpio6";
+                       function = "mdio";
+                       bias-pull-up;
+               };
+               mux_2 {
+                       pins = "gpio7";
+                       function = "mdc";
+                       bias-pull-up;
+               };
+       };
+
+       serial0_pins: serial0_pinmux {
+               mux {
+                       pins = "gpio16", "gpio17";
+                       function = "blsp_uart0";
+                       bias-disable;
+               };
+       };
+
+       serial1_pins: serial1_pinmux {
+               mux {
+                       pins = "gpio8", "gpio9";
+                       function = "blsp_uart1";
+                       bias-disable;
+               };
+       };
+
+       spi_0_pins: spi_0_pinmux {
+               pinmux {
+                       function = "blsp_spi0";
+                       pins = "gpio13", "gpio14", "gpio15";
+                       drive-strength = <12>;
+                       bias-disable;
+               };
+               pinmux_cs {
+                       function = "gpio";
+                       pins = "gpio12";
+                       drive-strength = <2>;
+                       bias-disable;
+                       output-high;
+               };
+       };
+
+       nand_pins: nand_pins {
+               pullups {
+                       pins =  "gpio52", "gpio53", "gpio58", "gpio59";
+                       function = "qpic";
+                       bias-pull-up;
+               };
+
+               pulldowns {
+                       pins = "gpio54", "gpio55", "gpio56", "gpio57",
+                               "gpio60", "gpio62", "gpio63", "gpio64",
+                               "gpio65", "gpio66", "gpio67", "gpio68",
+                               "gpio69";
+                       function = "qpic";
+                       bias-pull-down;
+               };
+       };
+
+       sd_pins: sd_pins {
+               pinmux {
+                       function = "sdio";
+                       pins = "gpio23", "gpio24", "gpio25", "gpio26",
+                               "gpio28", "gpio29", "gpio30", "gpio31";
+                       drive-strength = <10>;
+               };
+               pinmux_sd_clk {
+                       function = "sdio";
+                       pins = "gpio27";
+                       drive-strength = <16>;
+               };
+               pinmux_sd7 {
+                       function = "sdio";
+                       pins = "gpio32";
+                       drive-strength = <10>;
+                       bias-disable;
+               };
+       };
+};
+
+&blsp_dma {
+       status = "okay";
+};
+
+&blsp1_spi1 {
+       status = "okay";
+
+       pinctrl-0 = <&spi_0_pins>;
+       pinctrl-names = "default";
+
+       cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               spi-max-frequency = <24000000>;
+               reg = <0>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition0@0 {
+                               label = "0:SBL1";
+                               reg = <0x00000000 0x00040000>;
+                               read-only;
+                       };
+
+                       partition1@40000 {
+                               label = "0:MIBIB";
+                               reg = <0x00040000 0x00020000>;
+                               read-only;
+                       };
+
+                       partition2@60000 {
+                               label = "0:QSEE";
+                               reg = <0x00060000 0x00060000>;
+                               read-only;
+                       };
+
+                       partition3@c0000 {
+                               label = "0:CDT";
+                               reg = <0x000c0000 0x00010000>;
+                               read-only;
+                       };
+
+                       partition4@d0000 {
+                               label = "0:DDRPARAMS";
+                               reg = <0x000d0000 0x00010000>;
+                               read-only;
+                       };
+
+                       partition5@e0000 {
+                               label = "0:APPSBLENV"; /* uboot env */
+                               reg = <0x000e0000 0x00010000>;
+                               read-only;
+                       };
+
+                       partition6@f0000 {
+                               label = "0:APPSBL"; /* uboot */
+                               reg = <0x000f0000 0x00080000>;
+                               read-only;
+                       };
+
+                       partition7@170000 {
+                               label = "0:ART";
+                               reg = <0x00170000 0x00010000>;
+                               read-only;
+
+                               nvmem-layout {
+                                       compatible = "fixed-layout";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       macaddr_art_0: mac-address@0 {
+                                               reg = <0x0 0x6>;
+                                       };
+
+                                       macaddr_art_6: mac-address@6 {
+                                               reg = <0x6 0x6>;
+                                       };
+
+                                       precal_art_1000: precal@1000 {
+                                               reg = <0x1000 0x2f20>;
+                                       };
+
+                                       macaddr_art_1006: mac-address@1006 {
+                                               reg = <0x1006 0x6>;
+                                       };
+
+                                       precal_art_5000: precal@5000 {
+                                               reg = <0x5000 0x2f20>;
+                                       };
+
+                                       macaddr_art_5006: mac-address@5006 {
+                                               reg = <0x5006 0x6>;
+                                       };
+                               };
+                       };
+
+                       partition8@180000 {
+                               label = "0:CONFIG";
+                               reg = <0x00180000 0x00010000>;
+                               read-only;
+                       };
+               };
+       };
+};
+
+&qpic_bam {
+       status = "okay";
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       nand@0 {
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "ubi";
+                               reg = <0x00000000 0x04000000>;
+                       };
+               };
+       };
+};
+
+&blsp1_uart1 {
+       status = "okay";
+       pinctrl-0 = <&serial0_pins>;
+       pinctrl-names = "default";
+};
+
+&blsp1_uart2 {
+       status = "okay";
+       pinctrl-0 = <&serial1_pins>;
+       pinctrl-names = "default";
+};
+
+&crypto {
+       status = "okay";
+};
+
+&cryptobam {
+       num-channels = <4>;
+       qcom,num-ees = <2>;
+       status = "okay";
+};
+
+&mdio {
+       status = "okay";
+       pinctrl-0 = <&mdio_pins>;
+       pinctrl-names = "default";
+       reset-gpios = <&tlmm 41 GPIO_ACTIVE_LOW>;
+       reset-delay-us = <2000>;
+};
+
+&pcie0 {
+       status = "okay";
+
+       perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+       wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
+
+       /* Unpolulated slot */
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+       };
+};
+
+&vqmmc {
+       status = "okay";
+};
+
+&sdhci {
+       status = "okay";
+       pinctrl-0 = <&sd_pins>;
+       pinctrl-names = "default";
+       cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
+       vqmmc-supply = <&vqmmc>;
+};
+
+&gmac {
+       status = "okay";
+};
+
+&switch {
+       status = "okay";
+};
+
+&swport4 {
+       status = "okay";
+       label = "wan";
+       nvmem-cells = <&macaddr_art_0>;
+       nvmem-cell-names = "mac-address";
+};
+
+&swport5 {
+       status = "okay";
+       label = "lan";
+       nvmem-cells = <&macaddr_art_6>;
+       nvmem-cell-names = "mac-address";
+};
+
+&wifi0 {
+       status = "okay";
+       nvmem-cells = <&precal_art_1000>, <&macaddr_art_1006>;
+       nvmem-cell-names = "pre-calibration", "mac-address";
+       qcom,ath10k-calibration-variant = "Wallys-DR40X9";
+};
+
+&wifi1 {
+       status = "okay";
+       nvmem-cell-names = "pre-calibration", "mac-address";
+       nvmem-cells = <&precal_art_5000>, <&macaddr_art_5006>;
+       qcom,ath10k-calibration-variant = "Wallys-DR40X9";
+};
+
+&usb2 {
+       status = "okay";
+};
+
+&usb2_hs_phy {
+       status = "okay";
+};
+
+&usb3 {
+       status = "okay";
+};
+
+&usb3_ss_phy {
+       status = "okay";
+};
+
+&usb3_hs_phy {
+       status = "okay";
+};
+
+&prng {
+       status = "okay";
+};
+
+&watchdog {
+       status = "okay";
+};
+