kernel: bump 5.4 to 5.4.63

[openwrt/openwrt.git] / target / linux / ipq806x / patches-5.4 / 093-2-v5.8-ipq806x-PCI-qcom-Change-duplicate-PCI-reset-to-phy-reset.patch

diff --git a/target/linux/ipq806x/patches-5.4/093-2-v5.8-ipq806x-PCI-qcom-Change-duplicate-PCI-reset-to-phy-reset.patch b/target/linux/ipq806x/patches-5.4/093-2-v5.8-ipq806x-PCI-qcom-Change-duplicate-PCI-reset-to-phy-reset.patch
deleted file mode 100644 (file)
index 9600419..0000000
--- a/target/linux/ipq806x/patches-5.4/093-2-v5.8-ipq806x-PCI-qcom-Change-duplicate-PCI-reset-to-phy-reset.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From dd58318c019f10bc94db36df66af6c55d4c0cbba Mon Sep 17 00:00:00 2001
-From: Abhishek Sahu <absahu@codeaurora.org>
-Date: Mon, 15 Jun 2020 23:05:59 +0200
-Subject: PCI: qcom: Change duplicate PCI reset to phy reset
-
-The deinit issues reset_control_assert for PCI twice and does not contain
-phy reset.
-
-Link: https://lore.kernel.org/r/20200615210608.21469-4-ansuelsmth@gmail.com
-Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
-Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-Reviewed-by: Rob Herring <robh@kernel.org>
-Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
----
- drivers/pci/controller/dwc/pcie-qcom.c | 18 ++++++++----------
- 1 file changed, 8 insertions(+), 10 deletions(-)
-
---- a/drivers/pci/controller/dwc/pcie-qcom.c
-+++ b/drivers/pci/controller/dwc/pcie-qcom.c
-@@ -287,14 +287,14 @@ static void qcom_pcie_deinit_2_1_0(struc
- {
-       struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
- 
-+      clk_disable_unprepare(res->phy_clk);
-       reset_control_assert(res->pci_reset);
-       reset_control_assert(res->axi_reset);
-       reset_control_assert(res->ahb_reset);
-       reset_control_assert(res->por_reset);
--      reset_control_assert(res->pci_reset);
-+      reset_control_assert(res->phy_reset);
-       clk_disable_unprepare(res->iface_clk);
-       clk_disable_unprepare(res->core_clk);
--      clk_disable_unprepare(res->phy_clk);
-       clk_disable_unprepare(res->aux_clk);
-       clk_disable_unprepare(res->ref_clk);
-       regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
-@@ -333,12 +333,6 @@ static int qcom_pcie_init_2_1_0(struct q
-               goto err_clk_core;
-       }
- 
--      ret = clk_prepare_enable(res->phy_clk);
--      if (ret) {
--              dev_err(dev, "cannot prepare/enable phy clock\n");
--              goto err_clk_phy;
--      }
--
-       ret = clk_prepare_enable(res->aux_clk);
-       if (ret) {
-               dev_err(dev, "cannot prepare/enable aux clock\n");
-@@ -411,6 +405,12 @@ static int qcom_pcie_init_2_1_0(struct q
-               return ret;
-       }
- 
-+      ret = clk_prepare_enable(res->phy_clk);
-+      if (ret) {
-+              dev_err(dev, "cannot prepare/enable phy clock\n");
-+              goto err_deassert_ahb;
-+      }
-+
-       /* wait for clock acquisition */
-       usleep_range(1000, 1500);
- 
-@@ -428,8 +428,6 @@ err_deassert_ahb:
- err_clk_ref:
-       clk_disable_unprepare(res->aux_clk);
- err_clk_aux:
--      clk_disable_unprepare(res->phy_clk);
--err_clk_phy:
-       clk_disable_unprepare(res->core_clk);
- err_clk_core:
-       clk_disable_unprepare(res->iface_clk);