-From 6eeff55fd4756f271ad09a914078c9aa45f8359d Mon Sep 17 00:00:00 2001
-From: Biwen Li <biwen.li@nxp.com>
-Date: Fri, 16 Nov 2018 14:23:40 +0800
-Subject: [PATCH 04/39] arch: support layerscape
+From f29db0048a07384ee4cd962c676b750e13e5d6b0 Mon Sep 17 00:00:00 2001
+From: Yangbo Lu <yangbo.lu@nxp.com>
+Date: Mon, 6 May 2019 17:17:58 +0800
+Subject: [PATCH] arch: support layerscape
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
This is an integrated patch of arch for layerscape
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
+Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Guanhua <guanhua.gao@nxp.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Pan Jiafei <Jiafei.Pan@nxp.com>
+Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
+Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
-Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
- arch/arm/include/asm/delay.h | 16 ++++++++++++++
- arch/arm/include/asm/io.h | 31 +++++++++++++++++++++++++++
- arch/arm/include/asm/mach/map.h | 4 ++--
- arch/arm/include/asm/pgtable.h | 7 ++++++
- arch/arm/kernel/time.c | 3 +++
- arch/arm/mm/dma-mapping.c | 1 +
- arch/arm/mm/ioremap.c | 7 ++++++
- arch/arm/mm/mmu.c | 9 ++++++++
- arch/arm64/include/asm/cache.h | 2 +-
- arch/arm64/include/asm/io.h | 1 +
- arch/arm64/include/asm/pgtable-prot.h | 3 +++
- arch/arm64/include/asm/pgtable.h | 5 +++++
- arch/arm64/mm/dma-mapping.c | 1 +
- arch/arm64/mm/init.c | 12 +++++++----
- 14 files changed, 95 insertions(+), 7 deletions(-)
+ arch/arm/include/asm/delay.h | 16 ++++++
+ arch/arm/include/asm/io.h | 31 ++++++++++
+ arch/arm/include/asm/mach/map.h | 4 +-
+ arch/arm/include/asm/pgtable.h | 7 +++
+ arch/arm/kernel/time.c | 3 +
+ arch/arm/mm/dma-mapping.c | 1 +
+ arch/arm/mm/ioremap.c | 7 +++
+ arch/arm/mm/mmu.c | 9 +++
+ arch/arm64/include/asm/cache.h | 2 +-
+ arch/arm64/include/asm/io.h | 1 +
+ arch/arm64/include/asm/pgtable-prot.h | 3 +
+ arch/arm64/include/asm/pgtable.h | 5 ++
+ arch/arm64/mm/dma-mapping.c | 1 +
+ arch/arm64/mm/init.c | 12 ++--
+ drivers/soc/fsl/guts.c | 9 +++
+ drivers/soc/fsl/qixis_ctrl.c | 105 ++++++++++++++++++++++++++++++++++
+ 16 files changed, 209 insertions(+), 7 deletions(-)
+ create mode 100644 drivers/soc/fsl/qixis_ctrl.c
--- a/arch/arm/include/asm/delay.h
+++ b/arch/arm/include/asm/delay.h
high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
dma_contiguous_reserve(arm64_dma_phys_limit);
+--- a/drivers/soc/fsl/guts.c
++++ b/drivers/soc/fsl/guts.c
+@@ -100,6 +100,11 @@ static const struct fsl_soc_die_attr fsl
+ .svr = 0x87000000,
+ .mask = 0xfff70000,
+ },
++ /* Die: LX2160A, SoC: LX2160A/LX2120A/LX2080A */
++ { .die = "LX2160A",
++ .svr = 0x87360000,
++ .mask = 0xff3f0000,
++ },
+ { },
+ };
+
+@@ -213,6 +218,10 @@ static const struct of_device_id fsl_gut
+ { .compatible = "fsl,ls1021a-dcfg", },
+ { .compatible = "fsl,ls1043a-dcfg", },
+ { .compatible = "fsl,ls2080a-dcfg", },
++ { .compatible = "fsl,ls1088a-dcfg", },
++ { .compatible = "fsl,ls1012a-dcfg", },
++ { .compatible = "fsl,ls1046a-dcfg", },
++ { .compatible = "fsl,lx2160a-dcfg", },
+ {}
+ };
+ MODULE_DEVICE_TABLE(of, fsl_guts_of_match);
+--- /dev/null
++++ b/drivers/soc/fsl/qixis_ctrl.c
+@@ -0,0 +1,105 @@
++// SPDX-License-Identifier: GPL-2.0+
++
++/* Freescale QIXIS system controller driver.
++ *
++ * Copyright 2015 Freescale Semiconductor, Inc.
++ * Copyright 2018-2019 NXP
++ */
++
++#include <linux/err.h>
++#include <linux/i2c.h>
++#include <linux/module.h>
++#include <linux/mfd/core.h>
++#include <linux/of.h>
++#include <linux/regmap.h>
++
++/* QIXIS MAP */
++struct fsl_qixis_regs {
++ u8 id; /* Identification Registers */
++ u8 version; /* Version Register */
++ u8 qixis_ver; /* QIXIS Version Register */
++ u8 reserved1[0x1f];
++};
++
++struct qixis_priv {
++ struct regmap *regmap;
++};
++
++static struct regmap_config qixis_regmap_config = {
++ .reg_bits = 8,
++ .val_bits = 8,
++};
++
++static const struct mfd_cell fsl_qixis_devs[] = {
++ {
++ .name = "reg-mux",
++ .of_compatible = "reg-mux",
++ },
++};
++
++static int fsl_qixis_i2c_probe(struct i2c_client *client)
++{
++ struct qixis_priv *priv;
++ int ret = 0;
++ u32 qver;
++
++ if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
++ return -EOPNOTSUPP;
++
++ priv = devm_kzalloc(&client->dev, sizeof(struct qixis_priv),
++ GFP_KERNEL);
++ if (!priv)
++ return -ENOMEM;
++
++ priv->regmap = regmap_init_i2c(client, &qixis_regmap_config);
++ regmap_read(priv->regmap, offsetof(struct fsl_qixis_regs, qixis_ver),
++ &qver);
++ pr_info("Freescale QIXIS Version: 0x%08x\n", qver);
++
++ i2c_set_clientdata(client, priv);
++
++ if (of_device_is_compatible(client->dev.of_node, "simple-mfd"))
++ ret = devm_mfd_add_devices(&client->dev, -1, fsl_qixis_devs,
++ ARRAY_SIZE(fsl_qixis_devs), NULL, 0,
++ NULL);
++ if (ret)
++ goto error;
++
++ return ret;
++error:
++ regmap_exit(priv->regmap);
++
++ return ret;
++}
++
++static int fsl_qixis_i2c_remove(struct i2c_client *client)
++{
++ struct qixis_priv *priv;
++
++ priv = i2c_get_clientdata(client);
++ regmap_exit(priv->regmap);
++
++ return 0;
++}
++
++static const struct of_device_id fsl_qixis_i2c_of_match[] = {
++ { .compatible = "fsl,fpga-qixis-i2c" },
++ {}
++};
++MODULE_DEVICE_TABLE(of, fsl_qixis_i2c_of_match);
++
++static struct i2c_driver fsl_qixis_i2c_driver = {
++ .driver = {
++ .name = "qixis_ctrl_i2c",
++ .owner = THIS_MODULE,
++ .of_match_table = of_match_ptr(fsl_qixis_i2c_of_match),
++ },
++ .probe_new = fsl_qixis_i2c_probe,
++ .remove = fsl_qixis_i2c_remove,
++};
++module_i2c_driver(fsl_qixis_i2c_driver);
++
++MODULE_AUTHOR("Wang Dongsheng <dongsheng.wang@freescale.com>");
++MODULE_DESCRIPTION("Freescale QIXIS system controller driver");
++MODULE_LICENSE("GPL");
++
projects / openwrt / openwrt.git / blobdiff