kernel: pick patches for MediaTek Ethernet from linux-next

[openwrt/openwrt.git] / target / linux / mediatek / files-5.15 / arch / arm64 / boot / dts / mediatek / mt7986a.dtsi

diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index 17adda15544ff1975a02b3650738de32ed338456..601c859617e73dd962fbf111d1c9a319e303d165 100644 (file)
--- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -397,6 +397,28 @@
                         #reset-cells = <1>;
                };
 
+               wed_pcie: wed-pcie@10003000 {
+                       compatible = "mediatek,mt7986-wed-pcie",
+                                    "syscon";
+                       reg = <0 0x10003000 0 0x10>;
+               };
+
+               wed0: wed@15010000 {
+                       compatible = "mediatek,mt7986-wed",
+                                    "syscon";
+                       reg = <0 0x15010000 0 0x1000>;
+                       interrupt-parent = <&gic>;
+                       interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               wed1: wed@15011000 {
+                       compatible = "mediatek,mt7986-wed",
+                                    "syscon";
+                       reg = <0 0x15011000 0 0x1000>;
+                       interrupt-parent = <&gic>;
+                       interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
                eth: ethernet@15100000 {
                        compatible = "mediatek,mt7986-eth";
                        reg = <0 0x15100000 0 0x80000>;
@@ -431,6 +453,8 @@
                                                 <&apmixedsys CLK_APMIXED_SGMPLL>;
                        mediatek,ethsys = <&ethsys>;
                        mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>;
+                       mediatek,wed-pcie = <&wed_pcie>;
+                       mediatek,wed = <&wed0>, <&wed1>;
                        #reset-cells = <1>;
                        #address-cells = <1>;
                        #size-cells = <0>;