mvebu: move files to files-6.1
[openwrt/openwrt.git] / target / linux / mvebu / files-6.1 / arch / arm64 / boot / dts / marvell / armada-3720-espressobin-ultra.dts
diff --git a/target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts b/target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
new file mode 100644 (file)
index 0000000..1a6594e
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for ESPRESSObin-Ultra
+ * Copyright (C) 2019 Globalscale technologies, Inc.
+ *
+ * Jason Hung <jhung@globalscaletechnologies.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-372x.dtsi"
+
+/ {
+       model = "Globalscale Marvell ESPRESSOBin Ultra Board";
+       compatible = "globalscale,espressobin-ultra", "marvell,armada3720",
+                    "marvell,armada3710";
+
+       aliases {
+               /* for dsa slave device */
+               ethernet1 = &switch0port1;
+               ethernet2 = &switch0port2;
+               ethernet3 = &switch0port3;
+               ethernet4 = &switch0port4;
+               ethernet5 = &switch0port5;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
+       };
+
+       reg_usb3_vbus: usb3-vbus {
+               compatible = "regulator-fixed";
+               regulator-name = "usb3-vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               enable-active-high;
+               gpio = <&gpionb 19 GPIO_ACTIVE_HIGH>;
+       };
+
+       usb3_phy: usb3-phy {
+               compatible = "usb-nop-xceiv";
+               vcc-supply = <&reg_usb3_vbus>;
+       };
+
+       leds {
+               pinctrl-names = "default";
+               compatible = "gpio-leds";
+               /* No assigned functions to the LEDs by default */
+               led1 {
+                       label = "ebin-ultra:blue:led1";
+                       gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
+               };
+               led2 {
+                       label = "ebin-ultra:green:led2";
+                       gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
+               };
+               led3 {
+                       label = "ebin-ultra:red:led3";
+                       gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
+               };
+               led4 {
+                       label = "ebin-ultra:yellow:led4";
+                       gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
+               };
+       };
+};
+
+&pcie0 {
+       status = "okay";
+};
+
+&sata {
+       status = "okay";
+};
+
+&sdhci0 {
+       status = "okay";
+       non-removable;
+       bus-width = <8>;
+       mmc-ddr-1_8v;
+       mmc-hs400-1_8v;
+       marvell,pad-type = "fixed-1-8v";
+};
+
+&spi0 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi_quad_pins>;
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <108000000>;
+               spi-rx-bus-width = <4>;
+               spi-tx-bus-width = <4>;
+               m25p,fast-read;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "firmware";
+                               reg = <0x0 0x3e0000>;
+                       };
+                       partition@3e0000 {
+                               label = "hw-info";
+                               reg = <0x3e0000 0x10000>;
+                               read-only;
+                       };
+                       partition@3f0000 {
+                               label = "u-boot-env";
+                               reg = <0x3f0000 0x10000>;
+                       };
+               };
+       };
+};
+
+&uart0 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_pins>;
+};
+
+&i2c0 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c1_pins>;
+
+       clock-frequency = <100000>;
+
+       rtc@51 {
+               compatible = "nxp,pcf8563";
+               reg = <0x51>;
+       };
+};
+
+&usb3 {
+       status = "okay";
+       usb-phy = <&usb3_phy>;
+};
+
+&usb2 {
+       status = "okay";
+};
+
+&eth0 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&rgmii_pins>;
+       phy-mode = "rgmii-id";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&mdio {
+       status = "okay";
+
+       extphy: ethernet-phy@0 {
+               reg = <1>;
+       };
+
+       switch0: switch0@1 {
+               compatible = "marvell,mv88e6085";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <3>;
+
+               dsa,member = <0 0>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       switch0port0: port@0 {
+                               reg = <0>;
+                               ethernet = <&eth0>;
+                       };
+
+                       switch0port1: port@1 {
+                               reg = <1>;
+                               label = "lan0";
+                               phy-handle = <&switch0phy1>;
+                       };
+
+                       switch0port2: port@2 {
+                               reg = <2>;
+                               label = "lan1";
+                               phy-handle = <&switch0phy2>;
+                       };
+
+                       switch0port3: port@3 {
+                               reg = <3>;
+                               label = "lan2";
+                               phy-handle = <&switch0phy3>;
+                       };
+
+                       switch0port4: port@4 {
+                               reg = <4>;
+                               label = "lan3";
+                               phy-handle = <&switch0phy4>;
+                       };
+
+                       switch0port5: port@5 {
+                               reg = <5>;
+                               label = "wan";
+                               phy-handle = <&extphy>;
+                               phy-mode = "sgmii";
+                       };
+               };
+
+               mdio {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       switch0phy1: switch0phy1@11 {
+                               reg = <0x11>;
+                       };
+                       switch0phy2: switch0phy2@12 {
+                               reg = <0x12>;
+                       };
+                       switch0phy3: switch0phy3@13 {
+                               reg = <0x13>;
+                       };
+                       switch0phy4: switch0phy4@14 {
+                               reg = <0x14>;
+                       };
+               };
+       };
+};