ralink: refresh patches

[openwrt/openwrt.git] / target / linux / ramips / patches-3.10 / 0203-owrt-MIPS-add-OWRTDTB-secion.patch

diff --git a/target/linux/ramips/patches-3.10/0203-owrt-MIPS-add-OWRTDTB-secion.patch b/target/linux/ramips/patches-3.10/0203-owrt-MIPS-add-OWRTDTB-secion.patch
deleted file mode 100644 (file)
index 71d8fe9..0000000
--- a/target/linux/ramips/patches-3.10/0203-owrt-MIPS-add-OWRTDTB-secion.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From c174d2250e402399ad7dbdd57d51883d8804bba0 Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Mon, 15 Jul 2013 00:40:37 +0200
-Subject: [PATCH 31/33] owrt: MIPS: add OWRTDTB secion
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- arch/mips/kernel/head.S   |    3 +++
- arch/mips/ralink/Makefile |    2 +-
- arch/mips/ralink/of.c     |    4 +++-
- 3 files changed, 7 insertions(+), 2 deletions(-)
-
---- a/arch/mips/kernel/head.S
-+++ b/arch/mips/kernel/head.S
-@@ -146,6 +146,9 @@ EXPORT(__image_cmdline)
-       .fill   0x400
- #endif /* CONFIG_IMAGE_CMDLINE_HACK */
- 
-+      .ascii  "OWRTDTB:"
-+      EXPORT(__image_dtb)
-+      .fill   0x4000
-       __REF
- 
- NESTED(kernel_entry, 16, sp)                  # kernel entry point
---- a/arch/mips/ralink/Makefile
-+++ b/arch/mips/ralink/Makefile
-@@ -21,4 +21,4 @@ obj-$(CONFIG_EARLY_PRINTK) += early_prin
- 
- obj-$(CONFIG_DEBUG_FS) += bootrom.o
- 
--obj-y += dts/
-+#obj-y += dts/
---- a/arch/mips/ralink/of.c
-+++ b/arch/mips/ralink/of.c
-@@ -77,6 +77,8 @@ void __init device_tree_init(void)
-       //free_bootmem(base, size);
- }
- 
-+extern struct boot_param_header __image_dtb;
-+
- void __init plat_mem_setup(void)
- {
-       set_io_port_base(KSEG1);
-@@ -85,7 +87,7 @@ void __init plat_mem_setup(void)
-        * Load the builtin devicetree. This causes the chosen node to be
-        * parsed resulting in our memory appearing
-        */
--      __dt_setup_arch(&__dtb_start);
-+      __dt_setup_arch(&__image_dtb);
- 
-       if (soc_info.mem_size)
-               add_memory_region(soc_info.mem_base, soc_info.mem_size * SZ_1M,