--- /dev/null
+++ b/drivers/net/ethernet/mediatek/gsw_mt7621.c
-@@ -0,0 +1,284 @@
+@@ -0,0 +1,287 @@
+/* This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License
+ usleep_range(10, 20);
+
+ if ((rt_sysc_r32(SYSC_REG_CHIP_REV_ID) & 0xFFFF) == 0x0101) {
-+ /* (GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 1536) */
-+ mtk_switch_w32(gsw, 0x2105e30b, 0x100);
++ /* (GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 2k) */
++ mtk_switch_w32(gsw, 0x2305e30b, GSW_REG_MAC_P0_MCR);
+ mt7530_mdio_w32(gsw, 0x3600, 0x5e30b);
+ } else {
-+ /* (GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 1536) */
-+ mtk_switch_w32(gsw, 0x2105e33b, 0x100);
++ /* (GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 2k) */
++ mtk_switch_w32(gsw, 0x2305e33b, GSW_REG_MAC_P0_MCR);
+ mt7530_mdio_w32(gsw, 0x3600, 0x5e33b);
+ }
+
+ /* (GE2, Link down) */
-+ mtk_switch_w32(gsw, 0x8000, 0x200);
++ mtk_switch_w32(gsw, 0x8000, GSW_REG_MAC_P1_MCR);
++
++ /* Set switch max RX frame length to 2k */
++ mt7530_mdio_w32(gsw, GSW_REG_GMACCR, 0x3F0B);
+
+ /* Enable Port 6, P5 as GMAC5, P5 disable */
+ val = mt7530_mdio_r32(gsw, 0x7804);