realtek: d-link: add support for dgs-1210-28mp-f

[openwrt/openwrt.git] / target / linux / realtek / dts-5.10 / rtl8382_d-link_dgs-1210-28.dts

diff --git a/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28.dts b/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28.dts
index cf7b888fc9c5b7abab99df1c2066edfa6f5aa1f8..0bcb196b7c97328a7a04f47fe43bf9453d7aba4a 100644 (file)
--- a/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28.dts
+++ b/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28.dts
@@ -3,98 +3,9 @@
 #include "rtl838x.dtsi"
 #include "rtl83xx_d-link_dgs-1210_common.dtsi"
 #include "rtl83xx_d-link_dgs-1210_gpio.dtsi"
+#include "rtl8382_d-link_dgs-1210-28_common.dtsi"
 
 / {
        compatible = "d-link,dgs-1210-28", "realtek,rtl838x-soc";
        model = "D-Link DGS-1210-28";
 };
-
-&ethernet0 {
-       mdio: mdio-bus {
-               compatible = "realtek,rtl838x-mdio";
-               regmap = <&ethernet0>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               EXTERNAL_PHY(0)
-               EXTERNAL_PHY(1)
-               EXTERNAL_PHY(2)
-               EXTERNAL_PHY(3)
-               EXTERNAL_PHY(4)
-               EXTERNAL_PHY(5)
-               EXTERNAL_PHY(6)
-               EXTERNAL_PHY(7)
-
-               INTERNAL_PHY(8)
-               INTERNAL_PHY(9)
-               INTERNAL_PHY(10)
-               INTERNAL_PHY(11)
-               INTERNAL_PHY(12)
-               INTERNAL_PHY(13)
-               INTERNAL_PHY(14)
-               INTERNAL_PHY(15)
-
-               EXTERNAL_PHY(16)
-               EXTERNAL_PHY(17)
-               EXTERNAL_PHY(18)
-               EXTERNAL_PHY(19)
-               EXTERNAL_PHY(20)
-               EXTERNAL_PHY(21)
-               EXTERNAL_PHY(22)
-               EXTERNAL_PHY(23)
-
-               EXTERNAL_SFP_PHY(24)
-               EXTERNAL_SFP_PHY(25)
-               EXTERNAL_SFP_PHY(26)
-               EXTERNAL_SFP_PHY(27)
-       };
-};
-
-&switch0 {
-       ports {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               SWITCH_PORT(0, 1, qsgmii)
-               SWITCH_PORT(1, 2, qsgmii)
-               SWITCH_PORT(2, 3, qsgmii)
-               SWITCH_PORT(3, 4, qsgmii)
-               SWITCH_PORT(4, 5, qsgmii)
-               SWITCH_PORT(5, 6, qsgmii)
-               SWITCH_PORT(6, 7, qsgmii)
-               SWITCH_PORT(7, 8, qsgmii)
-
-               SWITCH_PORT(8, 9, internal)
-               SWITCH_PORT(9, 10, internal)
-               SWITCH_PORT(10, 11, internal)
-               SWITCH_PORT(11, 12, internal)
-               SWITCH_PORT(12, 13, internal)
-               SWITCH_PORT(13, 14, internal)
-               SWITCH_PORT(14, 15, internal)
-               SWITCH_PORT(15, 16, internal)
-
-               SWITCH_PORT(16, 17, qsgmii)
-               SWITCH_PORT(17, 18, qsgmii)
-               SWITCH_PORT(18, 19, qsgmii)
-               SWITCH_PORT(19, 20, qsgmii)
-               SWITCH_PORT(20, 21, qsgmii)
-               SWITCH_PORT(21, 22, qsgmii)
-               SWITCH_PORT(22, 23, qsgmii)
-               SWITCH_PORT(23, 24, qsgmii)
-
-               SWITCH_PORT(24, 25, qsgmii)
-               SWITCH_PORT(25, 26, qsgmii)
-               SWITCH_PORT(26, 27, qsgmii)
-               SWITCH_PORT(27, 28, qsgmii)
-
-               port@28 {
-                       ethernet = <&ethernet0>;
-                       reg = <28>;
-                       phy-mode = "internal";
-                       fixed-link {
-                               speed = <1000>;
-                               full-duplex;
-                       };
-               };
-       };
-};